* config/tc-mn10300.c (xr_registers): Added `pc'.
[deliverable/binutils-gdb.git] / gas / config / tc-mn10300.c
CommitLineData
252b5132 1/* tc-mn10300.c -- Assembler code for the Matsushita 10300
f7e42eb4
NC
2 Copyright 1996, 1997, 1998, 1999, 2000, 2001
3 Free Software Foundation, Inc.
252b5132
RH
4
5 This file is part of GAS, the GNU Assembler.
6
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22#include <stdio.h>
23#include <ctype.h>
24#include "as.h"
87271fa6 25#include "subsegs.h"
252b5132 26#include "opcode/mn10300.h"
e8b1cae5 27#include "dwarf2dbg.h"
252b5132
RH
28\f
29/* Structure to hold information about predefined registers. */
30struct reg_name
31{
32 const char *name;
33 int value;
34};
35
87271fa6
NC
36/* Generic assembler global variables which must be defined by all
37 targets. */
252b5132 38
87271fa6 39/* Characters which always start a comment. */
252b5132
RH
40const char comment_chars[] = "#";
41
42/* Characters which start a comment at the beginning of a line. */
43const char line_comment_chars[] = ";#";
44
87271fa6 45/* Characters which may be used to separate multiple commands on a
252b5132
RH
46 single line. */
47const char line_separator_chars[] = ";";
48
87271fa6 49/* Characters which are used to indicate an exponent in a floating
252b5132
RH
50 point number. */
51const char EXP_CHARS[] = "eE";
52
87271fa6 53/* Characters which mean that a number is a floating point constant,
252b5132
RH
54 as in 0d1.0. */
55const char FLT_CHARS[] = "dD";
56\f
252b5132 57const relax_typeS md_relax_table[] = {
87271fa6 58 /* bCC relaxing */
252b5132
RH
59 {0x7f, -0x80, 2, 1},
60 {0x7fff, -0x8000, 5, 2},
61 {0x7fffffff, -0x80000000, 7, 0},
62
87271fa6 63 /* bCC relaxing (uncommon cases) */
252b5132
RH
64 {0x7f, -0x80, 3, 4},
65 {0x7fff, -0x8000, 6, 5},
66 {0x7fffffff, -0x80000000, 8, 0},
67
87271fa6 68 /* call relaxing */
252b5132
RH
69 {0x7fff, -0x8000, 5, 7},
70 {0x7fffffff, -0x80000000, 7, 0},
71
87271fa6 72 /* calls relaxing */
252b5132
RH
73 {0x7fff, -0x8000, 4, 9},
74 {0x7fffffff, -0x80000000, 6, 0},
75
87271fa6 76 /* jmp relaxing */
252b5132
RH
77 {0x7f, -0x80, 2, 11},
78 {0x7fff, -0x8000, 3, 12},
79 {0x7fffffff, -0x80000000, 5, 0},
80
81};
82
87271fa6 83/* Local functions. */
252b5132
RH
84static void mn10300_insert_operand PARAMS ((unsigned long *, unsigned long *,
85 const struct mn10300_operand *,
86 offsetT, char *, unsigned,
87 unsigned));
88static unsigned long check_operand PARAMS ((unsigned long,
89 const struct mn10300_operand *,
90 offsetT));
91static int reg_name_search PARAMS ((const struct reg_name *, int, const char *));
92static boolean data_register_name PARAMS ((expressionS *expressionP));
93static boolean address_register_name PARAMS ((expressionS *expressionP));
94static boolean other_register_name PARAMS ((expressionS *expressionP));
95static void set_arch_mach PARAMS ((int));
96
1485d400
EC
97/* Set linkrelax here to avoid fixups in most sections. */
98int linkrelax = 1;
99
252b5132
RH
100static int current_machine;
101
87271fa6 102/* Fixups. */
252b5132
RH
103#define MAX_INSN_FIXUPS (5)
104struct mn10300_fixup
105{
106 expressionS exp;
107 int opindex;
108 bfd_reloc_code_real_type reloc;
109};
110struct mn10300_fixup fixups[MAX_INSN_FIXUPS];
111static int fc;
112
113/* We must store the value of each register operand so that we can
114 verify that certain registers do not match. */
115int mn10300_reg_operands[MN10300_MAX_OPERANDS];
116\f
117const char *md_shortopts = "";
118struct option md_longopts[] = {
119 {NULL, no_argument, NULL, 0}
120};
87271fa6 121size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH
122
123/* The target specific pseudo-ops which we support. */
124const pseudo_typeS md_pseudo_table[] =
125{
b4c1ea07
EC
126 { "file", dwarf2_directive_file, 0 },
127 { "loc", dwarf2_directive_loc, 0 },
0a727238
AO
128 { "am30", set_arch_mach, AM30 },
129 { "am33", set_arch_mach, AM33 },
130 { "mn10300", set_arch_mach, MN103 },
252b5132
RH
131 {NULL, 0, 0}
132};
133
0a727238 134#define HAVE_AM33 (current_machine == AM33)
aa15f6f7 135#define HAVE_AM30 (current_machine == AM30)
0a727238 136
252b5132
RH
137/* Opcode hash table. */
138static struct hash_control *mn10300_hash;
139
87271fa6 140/* This table is sorted. Suitable for searching by a binary search. */
252b5132
RH
141static const struct reg_name data_registers[] =
142{
143 { "d0", 0 },
144 { "d1", 1 },
145 { "d2", 2 },
146 { "d3", 3 },
147};
87271fa6
NC
148#define DATA_REG_NAME_CNT \
149 (sizeof (data_registers) / sizeof (struct reg_name))
252b5132
RH
150
151static const struct reg_name address_registers[] =
152{
153 { "a0", 0 },
154 { "a1", 1 },
155 { "a2", 2 },
156 { "a3", 3 },
157};
87271fa6
NC
158
159#define ADDRESS_REG_NAME_CNT \
160 (sizeof (address_registers) / sizeof (struct reg_name))
252b5132 161
85cb2cf9
JL
162static const struct reg_name r_registers[] =
163{
164 { "a0", 8 },
165 { "a1", 9 },
166 { "a2", 10 },
167 { "a3", 11 },
168 { "d0", 12 },
169 { "d1", 13 },
170 { "d2", 14 },
171 { "d3", 15 },
172 { "e0", 0 },
173 { "e1", 1 },
174 { "e10", 10 },
175 { "e11", 11 },
176 { "e12", 12 },
177 { "e13", 13 },
178 { "e14", 14 },
179 { "e15", 15 },
180 { "e2", 2 },
181 { "e3", 3 },
182 { "e4", 4 },
183 { "e5", 5 },
184 { "e6", 6 },
185 { "e7", 7 },
186 { "e8", 8 },
187 { "e9", 9 },
188 { "r0", 0 },
189 { "r1", 1 },
190 { "r10", 10 },
191 { "r11", 11 },
192 { "r12", 12 },
193 { "r13", 13 },
194 { "r14", 14 },
195 { "r15", 15 },
196 { "r2", 2 },
197 { "r3", 3 },
198 { "r4", 4 },
199 { "r5", 5 },
200 { "r6", 6 },
201 { "r7", 7 },
202 { "r8", 8 },
203 { "r9", 9 },
204};
87271fa6
NC
205
206#define R_REG_NAME_CNT \
207 (sizeof (r_registers) / sizeof (struct reg_name))
85cb2cf9
JL
208
209static const struct reg_name xr_registers[] =
210{
211 { "mcrh", 2 },
212 { "mcrl", 3 },
213 { "mcvf", 4 },
214 { "mdrq", 1 },
4dfea105 215 { "pc", 0 },
85cb2cf9
JL
216 { "sp", 0 },
217 { "xr0", 0 },
218 { "xr1", 1 },
219 { "xr10", 10 },
220 { "xr11", 11 },
221 { "xr12", 12 },
222 { "xr13", 13 },
223 { "xr14", 14 },
224 { "xr15", 15 },
225 { "xr2", 2 },
226 { "xr3", 3 },
227 { "xr4", 4 },
228 { "xr5", 5 },
229 { "xr6", 6 },
230 { "xr7", 7 },
231 { "xr8", 8 },
232 { "xr9", 9 },
233};
85cb2cf9 234
87271fa6
NC
235#define XR_REG_NAME_CNT \
236 (sizeof (xr_registers) / sizeof (struct reg_name))
252b5132
RH
237
238static const struct reg_name other_registers[] =
239{
240 { "mdr", 0 },
241 { "psw", 0 },
242 { "sp", 0 },
243};
87271fa6
NC
244
245#define OTHER_REG_NAME_CNT \
246 (sizeof (other_registers) / sizeof (struct reg_name))
252b5132
RH
247
248/* reg_name_search does a binary search of the given register table
249 to see if "name" is a valid regiter name. Returns the register
87271fa6 250 number from the array on success, or -1 on failure. */
252b5132
RH
251
252static int
253reg_name_search (regs, regcount, name)
254 const struct reg_name *regs;
255 int regcount;
256 const char *name;
257{
258 int middle, low, high;
259 int cmp;
260
261 low = 0;
262 high = regcount - 1;
263
264 do
265 {
266 middle = (low + high) / 2;
267 cmp = strcasecmp (name, regs[middle].name);
268 if (cmp < 0)
269 high = middle - 1;
270 else if (cmp > 0)
271 low = middle + 1;
87271fa6
NC
272 else
273 return regs[middle].value;
252b5132
RH
274 }
275 while (low <= high);
276 return -1;
277}
278
85cb2cf9
JL
279/* Summary of register_name().
280 *
281 * in: Input_line_pointer points to 1st char of operand.
282 *
283 * out: A expressionS.
284 * The operand may have been a register: in this case, X_op == O_register,
285 * X_add_number is set to the register number, and truth is returned.
286 * Input_line_pointer->(next non-blank) char after operand, or is in
287 * its original state.
288 */
87271fa6 289
85cb2cf9
JL
290static boolean
291r_register_name (expressionP)
292 expressionS *expressionP;
293{
294 int reg_number;
295 char *name;
296 char *start;
297 char c;
298
87271fa6 299 /* Find the spelling of the operand. */
85cb2cf9
JL
300 start = name = input_line_pointer;
301
302 c = get_symbol_end ();
303 reg_number = reg_name_search (r_registers, R_REG_NAME_CNT, name);
304
87271fa6
NC
305 /* Look to see if it's in the register table. */
306 if (reg_number >= 0)
85cb2cf9
JL
307 {
308 expressionP->X_op = O_register;
309 expressionP->X_add_number = reg_number;
310
87271fa6 311 /* Make the rest nice. */
85cb2cf9
JL
312 expressionP->X_add_symbol = NULL;
313 expressionP->X_op_symbol = NULL;
87271fa6
NC
314
315 /* Put back the delimiting char. */
316 *input_line_pointer = c;
85cb2cf9
JL
317 return true;
318 }
319 else
320 {
87271fa6
NC
321 /* Reset the line as if we had not done anything. */
322 /* Put back the delimiting char. */
323 *input_line_pointer = c;
324
325 /* Reset input_line pointer. */
326 input_line_pointer = start;
85cb2cf9
JL
327 return false;
328 }
329}
330
331/* Summary of register_name().
332 *
333 * in: Input_line_pointer points to 1st char of operand.
334 *
335 * out: A expressionS.
336 * The operand may have been a register: in this case, X_op == O_register,
337 * X_add_number is set to the register number, and truth is returned.
338 * Input_line_pointer->(next non-blank) char after operand, or is in
339 * its original state.
340 */
87271fa6 341
85cb2cf9
JL
342static boolean
343xr_register_name (expressionP)
344 expressionS *expressionP;
345{
346 int reg_number;
347 char *name;
348 char *start;
349 char c;
350
87271fa6 351 /* Find the spelling of the operand. */
85cb2cf9
JL
352 start = name = input_line_pointer;
353
354 c = get_symbol_end ();
355 reg_number = reg_name_search (xr_registers, XR_REG_NAME_CNT, name);
356
87271fa6
NC
357 /* Look to see if it's in the register table. */
358 if (reg_number >= 0)
85cb2cf9
JL
359 {
360 expressionP->X_op = O_register;
361 expressionP->X_add_number = reg_number;
362
87271fa6 363 /* Make the rest nice. */
85cb2cf9
JL
364 expressionP->X_add_symbol = NULL;
365 expressionP->X_op_symbol = NULL;
87271fa6
NC
366
367 /* Put back the delimiting char. */
368 *input_line_pointer = c;
85cb2cf9
JL
369 return true;
370 }
371 else
372 {
87271fa6
NC
373 /* Reset the line as if we had not done anything. */
374 /* Put back the delimiting char. */
375 *input_line_pointer = c;
376
377 /* Reset input_line pointer. */
378 input_line_pointer = start;
85cb2cf9
JL
379 return false;
380 }
381}
252b5132
RH
382
383/* Summary of register_name().
384 *
385 * in: Input_line_pointer points to 1st char of operand.
386 *
387 * out: A expressionS.
388 * The operand may have been a register: in this case, X_op == O_register,
389 * X_add_number is set to the register number, and truth is returned.
390 * Input_line_pointer->(next non-blank) char after operand, or is in
391 * its original state.
392 */
87271fa6 393
252b5132
RH
394static boolean
395data_register_name (expressionP)
396 expressionS *expressionP;
397{
398 int reg_number;
399 char *name;
400 char *start;
401 char c;
402
87271fa6 403 /* Find the spelling of the operand. */
252b5132
RH
404 start = name = input_line_pointer;
405
406 c = get_symbol_end ();
407 reg_number = reg_name_search (data_registers, DATA_REG_NAME_CNT, name);
408
87271fa6
NC
409 /* Look to see if it's in the register table. */
410 if (reg_number >= 0)
252b5132
RH
411 {
412 expressionP->X_op = O_register;
413 expressionP->X_add_number = reg_number;
414
87271fa6 415 /* Make the rest nice. */
252b5132
RH
416 expressionP->X_add_symbol = NULL;
417 expressionP->X_op_symbol = NULL;
87271fa6
NC
418
419 /* Put back the delimiting char. */
420 *input_line_pointer = c;
252b5132
RH
421 return true;
422 }
423 else
424 {
87271fa6
NC
425 /* Reset the line as if we had not done anything. */
426 /* Put back the delimiting char. */
427 *input_line_pointer = c;
428
429 /* Reset input_line pointer. */
430 input_line_pointer = start;
252b5132
RH
431 return false;
432 }
433}
434
435/* Summary of register_name().
436 *
437 * in: Input_line_pointer points to 1st char of operand.
438 *
439 * out: A expressionS.
440 * The operand may have been a register: in this case, X_op == O_register,
441 * X_add_number is set to the register number, and truth is returned.
442 * Input_line_pointer->(next non-blank) char after operand, or is in
443 * its original state.
444 */
87271fa6 445
252b5132
RH
446static boolean
447address_register_name (expressionP)
448 expressionS *expressionP;
449{
450 int reg_number;
451 char *name;
452 char *start;
453 char c;
454
87271fa6 455 /* Find the spelling of the operand. */
252b5132
RH
456 start = name = input_line_pointer;
457
458 c = get_symbol_end ();
459 reg_number = reg_name_search (address_registers, ADDRESS_REG_NAME_CNT, name);
460
87271fa6
NC
461 /* Look to see if it's in the register table. */
462 if (reg_number >= 0)
252b5132
RH
463 {
464 expressionP->X_op = O_register;
465 expressionP->X_add_number = reg_number;
466
87271fa6 467 /* Make the rest nice. */
252b5132
RH
468 expressionP->X_add_symbol = NULL;
469 expressionP->X_op_symbol = NULL;
87271fa6
NC
470
471 /* Put back the delimiting char. */
472 *input_line_pointer = c;
252b5132
RH
473 return true;
474 }
475 else
476 {
87271fa6
NC
477 /* Reset the line as if we had not done anything. */
478 /* Put back the delimiting char. */
479 *input_line_pointer = c;
480
481 /* Reset input_line pointer. */
482 input_line_pointer = start;
483
252b5132
RH
484 return false;
485 }
486}
487
488/* Summary of register_name().
489 *
490 * in: Input_line_pointer points to 1st char of operand.
491 *
492 * out: A expressionS.
493 * The operand may have been a register: in this case, X_op == O_register,
494 * X_add_number is set to the register number, and truth is returned.
495 * Input_line_pointer->(next non-blank) char after operand, or is in
496 * its original state.
497 */
87271fa6 498
252b5132
RH
499static boolean
500other_register_name (expressionP)
501 expressionS *expressionP;
502{
503 int reg_number;
504 char *name;
505 char *start;
506 char c;
507
87271fa6 508 /* Find the spelling of the operand. */
252b5132
RH
509 start = name = input_line_pointer;
510
511 c = get_symbol_end ();
512 reg_number = reg_name_search (other_registers, OTHER_REG_NAME_CNT, name);
513
87271fa6
NC
514 /* Look to see if it's in the register table. */
515 if (reg_number >= 0)
252b5132
RH
516 {
517 expressionP->X_op = O_register;
518 expressionP->X_add_number = reg_number;
519
87271fa6 520 /* Make the rest nice. */
252b5132
RH
521 expressionP->X_add_symbol = NULL;
522 expressionP->X_op_symbol = NULL;
87271fa6
NC
523
524 /* Put back the delimiting char. */
525 *input_line_pointer = c;
252b5132
RH
526 return true;
527 }
528 else
529 {
87271fa6
NC
530 /* Reset the line as if we had not done anything. */
531 /* Put back the delimiting char. */
532 *input_line_pointer = c;
533
534 /* Reset input_line pointer. */
535 input_line_pointer = start;
252b5132
RH
536 return false;
537 }
538}
539
540void
541md_show_usage (stream)
87271fa6 542 FILE *stream;
252b5132 543{
87271fa6 544 fprintf (stream, _("MN10300 options:\n\
252b5132 545none yet\n"));
87271fa6 546}
252b5132
RH
547
548int
549md_parse_option (c, arg)
b4c1ea07
EC
550 int c ATTRIBUTE_UNUSED;
551 char *arg ATTRIBUTE_UNUSED;
252b5132
RH
552{
553 return 0;
554}
555
556symbolS *
557md_undefined_symbol (name)
b4c1ea07 558 char *name ATTRIBUTE_UNUSED;
252b5132
RH
559{
560 return 0;
561}
562
563char *
564md_atof (type, litp, sizep)
87271fa6
NC
565 int type;
566 char *litp;
567 int *sizep;
252b5132
RH
568{
569 int prec;
570 LITTLENUM_TYPE words[4];
571 char *t;
572 int i;
573
574 switch (type)
575 {
576 case 'f':
577 prec = 2;
578 break;
579
580 case 'd':
581 prec = 4;
582 break;
583
584 default:
585 *sizep = 0;
586 return "bad call to md_atof";
587 }
87271fa6 588
252b5132
RH
589 t = atof_ieee (input_line_pointer, type, words);
590 if (t)
591 input_line_pointer = t;
592
593 *sizep = prec * 2;
594
595 for (i = prec - 1; i >= 0; i--)
596 {
597 md_number_to_chars (litp, (valueT) words[i], 2);
598 litp += 2;
599 }
600
601 return NULL;
602}
603
252b5132
RH
604void
605md_convert_frag (abfd, sec, fragP)
b4c1ea07 606 bfd *abfd ATTRIBUTE_UNUSED;
87271fa6
NC
607 asection *sec;
608 fragS *fragP;
252b5132
RH
609{
610 static unsigned long label_count = 0;
611 char buf[40];
612
613 subseg_change (sec, 0);
614 if (fragP->fr_subtype == 0)
615 {
616 fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol,
617 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
618 fragP->fr_var = 0;
619 fragP->fr_fix += 2;
620 }
621 else if (fragP->fr_subtype == 1)
622 {
623 /* Reverse the condition of the first branch. */
624 int offset = fragP->fr_fix;
625 int opcode = fragP->fr_literal[offset] & 0xff;
626
627 switch (opcode)
628 {
629 case 0xc8:
630 opcode = 0xc9;
631 break;
632 case 0xc9:
633 opcode = 0xc8;
634 break;
635 case 0xc0:
636 opcode = 0xc2;
637 break;
638 case 0xc2:
639 opcode = 0xc0;
640 break;
641 case 0xc3:
642 opcode = 0xc1;
643 break;
644 case 0xc1:
645 opcode = 0xc3;
646 break;
647 case 0xc4:
648 opcode = 0xc6;
649 break;
650 case 0xc6:
651 opcode = 0xc4;
652 break;
653 case 0xc7:
654 opcode = 0xc5;
655 break;
656 case 0xc5:
657 opcode = 0xc7;
658 break;
659 default:
660 abort ();
661 }
662 fragP->fr_literal[offset] = opcode;
663
664 /* Create a fixup for the reversed conditional branch. */
0aa529cb 665 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
252b5132
RH
666 fix_new (fragP, fragP->fr_fix + 1, 1,
667 symbol_new (buf, sec, 0, fragP->fr_next),
668 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
669
670 /* Now create the unconditional branch + fixup to the
671 final target. */
672 fragP->fr_literal[offset + 2] = 0xcc;
673 fix_new (fragP, fragP->fr_fix + 3, 2, fragP->fr_symbol,
674 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
675 fragP->fr_var = 0;
676 fragP->fr_fix += 5;
677 }
678 else if (fragP->fr_subtype == 2)
679 {
680 /* Reverse the condition of the first branch. */
681 int offset = fragP->fr_fix;
682 int opcode = fragP->fr_literal[offset] & 0xff;
683
684 switch (opcode)
685 {
686 case 0xc8:
687 opcode = 0xc9;
688 break;
689 case 0xc9:
690 opcode = 0xc8;
691 break;
692 case 0xc0:
693 opcode = 0xc2;
694 break;
695 case 0xc2:
696 opcode = 0xc0;
697 break;
698 case 0xc3:
699 opcode = 0xc1;
700 break;
701 case 0xc1:
702 opcode = 0xc3;
703 break;
704 case 0xc4:
705 opcode = 0xc6;
706 break;
707 case 0xc6:
708 opcode = 0xc4;
709 break;
710 case 0xc7:
711 opcode = 0xc5;
712 break;
713 case 0xc5:
714 opcode = 0xc7;
715 break;
716 default:
717 abort ();
718 }
719 fragP->fr_literal[offset] = opcode;
720
721 /* Create a fixup for the reversed conditional branch. */
0aa529cb 722 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
252b5132
RH
723 fix_new (fragP, fragP->fr_fix + 1, 1,
724 symbol_new (buf, sec, 0, fragP->fr_next),
725 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
726
727 /* Now create the unconditional branch + fixup to the
728 final target. */
729 fragP->fr_literal[offset + 2] = 0xdc;
730 fix_new (fragP, fragP->fr_fix + 3, 4, fragP->fr_symbol,
731 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
732 fragP->fr_var = 0;
733 fragP->fr_fix += 7;
734 }
735 else if (fragP->fr_subtype == 3)
736 {
737 fix_new (fragP, fragP->fr_fix + 2, 1, fragP->fr_symbol,
738 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
739 fragP->fr_var = 0;
740 fragP->fr_fix += 3;
741 }
742 else if (fragP->fr_subtype == 4)
743 {
744 /* Reverse the condition of the first branch. */
745 int offset = fragP->fr_fix;
746 int opcode = fragP->fr_literal[offset + 1] & 0xff;
747
748 switch (opcode)
749 {
750 case 0xe8:
751 opcode = 0xe9;
752 break;
753 case 0xe9:
754 opcode = 0xe8;
755 break;
756 case 0xea:
757 opcode = 0xeb;
758 break;
759 case 0xeb:
760 opcode = 0xea;
761 break;
762 default:
763 abort ();
764 }
765 fragP->fr_literal[offset + 1] = opcode;
766
767 /* Create a fixup for the reversed conditional branch. */
0aa529cb 768 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
252b5132
RH
769 fix_new (fragP, fragP->fr_fix + 2, 1,
770 symbol_new (buf, sec, 0, fragP->fr_next),
771 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
772
773 /* Now create the unconditional branch + fixup to the
774 final target. */
775 fragP->fr_literal[offset + 3] = 0xcc;
776 fix_new (fragP, fragP->fr_fix + 4, 2, fragP->fr_symbol,
777 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
778 fragP->fr_var = 0;
779 fragP->fr_fix += 6;
780 }
781 else if (fragP->fr_subtype == 5)
782 {
783 /* Reverse the condition of the first branch. */
784 int offset = fragP->fr_fix;
785 int opcode = fragP->fr_literal[offset + 1] & 0xff;
786
787 switch (opcode)
788 {
789 case 0xe8:
790 opcode = 0xe9;
791 break;
792 case 0xea:
793 opcode = 0xeb;
794 break;
795 case 0xeb:
796 opcode = 0xea;
797 break;
798 default:
799 abort ();
800 }
801 fragP->fr_literal[offset + 1] = opcode;
802
803 /* Create a fixup for the reversed conditional branch. */
0aa529cb 804 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
252b5132
RH
805 fix_new (fragP, fragP->fr_fix + 2, 1,
806 symbol_new (buf, sec, 0, fragP->fr_next),
807 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
808
809 /* Now create the unconditional branch + fixup to the
810 final target. */
811 fragP->fr_literal[offset + 3] = 0xdc;
812 fix_new (fragP, fragP->fr_fix + 4, 4, fragP->fr_symbol,
813 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
814 fragP->fr_var = 0;
815 fragP->fr_fix += 8;
816 }
817 else if (fragP->fr_subtype == 6)
818 {
819 int offset = fragP->fr_fix;
820 fragP->fr_literal[offset] = 0xcd;
821 fix_new (fragP, fragP->fr_fix + 1, 2, fragP->fr_symbol,
822 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
823 fragP->fr_var = 0;
824 fragP->fr_fix += 5;
825 }
826 else if (fragP->fr_subtype == 7)
827 {
828 int offset = fragP->fr_fix;
829 fragP->fr_literal[offset] = 0xdd;
830 fragP->fr_literal[offset + 5] = fragP->fr_literal[offset + 3];
831 fragP->fr_literal[offset + 6] = fragP->fr_literal[offset + 4];
832
833 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
834 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
835 fragP->fr_var = 0;
836 fragP->fr_fix += 7;
837 }
838 else if (fragP->fr_subtype == 8)
839 {
840 int offset = fragP->fr_fix;
841 fragP->fr_literal[offset] = 0xfa;
842 fragP->fr_literal[offset + 1] = 0xff;
843 fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol,
844 fragP->fr_offset + 2, 1, BFD_RELOC_16_PCREL);
845 fragP->fr_var = 0;
846 fragP->fr_fix += 4;
847 }
848 else if (fragP->fr_subtype == 9)
849 {
850 int offset = fragP->fr_fix;
851 fragP->fr_literal[offset] = 0xfc;
852 fragP->fr_literal[offset + 1] = 0xff;
853
854 fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol,
855 fragP->fr_offset + 2, 1, BFD_RELOC_32_PCREL);
856 fragP->fr_var = 0;
857 fragP->fr_fix += 6;
858 }
859 else if (fragP->fr_subtype == 10)
860 {
861 fragP->fr_literal[fragP->fr_fix] = 0xca;
862 fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol,
863 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
864 fragP->fr_var = 0;
865 fragP->fr_fix += 2;
866 }
867 else if (fragP->fr_subtype == 11)
868 {
869 int offset = fragP->fr_fix;
870 fragP->fr_literal[offset] = 0xcc;
871
872 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
873 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
874 fragP->fr_var = 0;
875 fragP->fr_fix += 3;
876 }
877 else if (fragP->fr_subtype == 12)
878 {
879 int offset = fragP->fr_fix;
880 fragP->fr_literal[offset] = 0xdc;
881
882 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
883 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
884 fragP->fr_var = 0;
885 fragP->fr_fix += 5;
886 }
887 else
888 abort ();
889}
890
891valueT
892md_section_align (seg, addr)
893 asection *seg;
894 valueT addr;
895{
896 int align = bfd_get_section_alignment (stdoutput, seg);
897 return ((addr + (1 << align) - 1) & (-1 << align));
898}
899
900void
901md_begin ()
902{
903 char *prev_name = "";
904 register const struct mn10300_opcode *op;
905
87271fa6 906 mn10300_hash = hash_new ();
252b5132
RH
907
908 /* Insert unique names into hash table. The MN10300 instruction set
909 has many identical opcode names that have different opcodes based
910 on the operands. This hash table then provides a quick index to
911 the first opcode with a particular name in the opcode table. */
912
913 op = mn10300_opcodes;
914 while (op->name)
915 {
87271fa6 916 if (strcmp (prev_name, op->name))
252b5132
RH
917 {
918 prev_name = (char *) op->name;
919 hash_insert (mn10300_hash, op->name, (char *) op);
920 }
921 op++;
922 }
923
252b5132 924 /* Set the default machine type. */
0a727238 925 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, MN103))
252b5132
RH
926 as_warn (_("could not set architecture and machine"));
927
0a727238 928 current_machine = MN103;
252b5132
RH
929}
930
931void
87271fa6 932md_assemble (str)
252b5132
RH
933 char *str;
934{
935 char *s;
936 struct mn10300_opcode *opcode;
937 struct mn10300_opcode *next_opcode;
938 const unsigned char *opindex_ptr;
939 int next_opindex, relaxable;
3c07fb76 940 unsigned long insn, extension, size = 0, real_size;
252b5132
RH
941 char *f;
942 int i;
943 int match;
944
945 /* Get the opcode. */
87271fa6 946 for (s = str; *s != '\0' && !isspace (*s); s++)
252b5132
RH
947 ;
948 if (*s != '\0')
949 *s++ = '\0';
950
87271fa6
NC
951 /* Find the first opcode with the proper name. */
952 opcode = (struct mn10300_opcode *) hash_find (mn10300_hash, str);
252b5132
RH
953 if (opcode == NULL)
954 {
955 as_bad (_("Unrecognized opcode: `%s'"), str);
956 return;
957 }
958
959 str = s;
960 while (isspace (*str))
961 ++str;
962
963 input_line_pointer = str;
964
87271fa6 965 for (;;)
252b5132
RH
966 {
967 const char *errmsg;
968 int op_idx;
969 char *hold;
970 int extra_shift = 0;
971
252b5132
RH
972 errmsg = _("Invalid opcode/operands");
973
974 /* Reset the array of register operands. */
975 memset (mn10300_reg_operands, -1, sizeof (mn10300_reg_operands));
976
977 relaxable = 0;
978 fc = 0;
979 match = 0;
980 next_opindex = 0;
981 insn = opcode->opcode;
982 extension = 0;
983
984 /* If the instruction is not available on the current machine
985 then it can not possibly match. */
986 if (opcode->machine
aa15f6f7
AO
987 && !(opcode->machine == AM33 && HAVE_AM33)
988 && !(opcode->machine == AM30 && HAVE_AM30))
252b5132
RH
989 goto error;
990
991 for (op_idx = 1, opindex_ptr = opcode->operands;
992 *opindex_ptr != 0;
993 opindex_ptr++, op_idx++)
994 {
995 const struct mn10300_operand *operand;
996 expressionS ex;
997
998 if (next_opindex == 0)
999 {
1000 operand = &mn10300_operands[*opindex_ptr];
1001 }
1002 else
1003 {
1004 operand = &mn10300_operands[next_opindex];
1005 next_opindex = 0;
1006 }
1007
1008 while (*str == ' ' || *str == ',')
1009 ++str;
1010
1011 if (operand->flags & MN10300_OPERAND_RELAX)
1012 relaxable = 1;
1013
87271fa6 1014 /* Gather the operand. */
252b5132
RH
1015 hold = input_line_pointer;
1016 input_line_pointer = str;
1017
1018 if (operand->flags & MN10300_OPERAND_PAREN)
1019 {
1020 if (*input_line_pointer != ')' && *input_line_pointer != '(')
1021 {
1022 input_line_pointer = hold;
1023 str = hold;
1024 goto error;
1025 }
1026 input_line_pointer++;
1027 goto keep_going;
1028 }
1029 /* See if we can match the operands. */
1030 else if (operand->flags & MN10300_OPERAND_DREG)
1031 {
1032 if (!data_register_name (&ex))
1033 {
1034 input_line_pointer = hold;
1035 str = hold;
1036 goto error;
1037 }
1038 }
1039 else if (operand->flags & MN10300_OPERAND_AREG)
1040 {
1041 if (!address_register_name (&ex))
1042 {
1043 input_line_pointer = hold;
1044 str = hold;
1045 goto error;
1046 }
1047 }
1048 else if (operand->flags & MN10300_OPERAND_SP)
1049 {
1050 char *start = input_line_pointer;
1051 char c = get_symbol_end ();
1052
1053 if (strcasecmp (start, "sp") != 0)
1054 {
1055 *input_line_pointer = c;
1056 input_line_pointer = hold;
1057 str = hold;
1058 goto error;
1059 }
1060 *input_line_pointer = c;
1061 goto keep_going;
1062 }
85cb2cf9
JL
1063 else if (operand->flags & MN10300_OPERAND_RREG)
1064 {
1065 if (!r_register_name (&ex))
1066 {
1067 input_line_pointer = hold;
1068 str = hold;
1069 goto error;
1070 }
1071 }
1072 else if (operand->flags & MN10300_OPERAND_XRREG)
1073 {
1074 if (!xr_register_name (&ex))
1075 {
1076 input_line_pointer = hold;
1077 str = hold;
1078 goto error;
1079 }
1080 }
1081 else if (operand->flags & MN10300_OPERAND_USP)
1082 {
1083 char *start = input_line_pointer;
1084 char c = get_symbol_end ();
1085
1086 if (strcasecmp (start, "usp") != 0)
1087 {
1088 *input_line_pointer = c;
1089 input_line_pointer = hold;
1090 str = hold;
1091 goto error;
1092 }
1093 *input_line_pointer = c;
1094 goto keep_going;
1095 }
1096 else if (operand->flags & MN10300_OPERAND_SSP)
1097 {
1098 char *start = input_line_pointer;
1099 char c = get_symbol_end ();
1100
1101 if (strcasecmp (start, "ssp") != 0)
1102 {
1103 *input_line_pointer = c;
1104 input_line_pointer = hold;
1105 str = hold;
1106 goto error;
1107 }
1108 *input_line_pointer = c;
1109 goto keep_going;
1110 }
1111 else if (operand->flags & MN10300_OPERAND_MSP)
1112 {
1113 char *start = input_line_pointer;
1114 char c = get_symbol_end ();
1115
1116 if (strcasecmp (start, "msp") != 0)
1117 {
1118 *input_line_pointer = c;
1119 input_line_pointer = hold;
1120 str = hold;
1121 goto error;
1122 }
1123 *input_line_pointer = c;
1124 goto keep_going;
1125 }
1126 else if (operand->flags & MN10300_OPERAND_PC)
1127 {
1128 char *start = input_line_pointer;
1129 char c = get_symbol_end ();
1130
1131 if (strcasecmp (start, "pc") != 0)
1132 {
1133 *input_line_pointer = c;
1134 input_line_pointer = hold;
1135 str = hold;
1136 goto error;
1137 }
1138 *input_line_pointer = c;
1139 goto keep_going;
1140 }
1141 else if (operand->flags & MN10300_OPERAND_EPSW)
1142 {
1143 char *start = input_line_pointer;
1144 char c = get_symbol_end ();
1145
1146 if (strcasecmp (start, "epsw") != 0)
1147 {
1148 *input_line_pointer = c;
1149 input_line_pointer = hold;
1150 str = hold;
1151 goto error;
1152 }
1153 *input_line_pointer = c;
1154 goto keep_going;
1155 }
1156 else if (operand->flags & MN10300_OPERAND_PLUS)
1157 {
1158 if (*input_line_pointer != '+')
1159 {
1160 input_line_pointer = hold;
1161 str = hold;
1162 goto error;
1163 }
1164 input_line_pointer++;
1165 goto keep_going;
1166 }
252b5132
RH
1167 else if (operand->flags & MN10300_OPERAND_PSW)
1168 {
1169 char *start = input_line_pointer;
1170 char c = get_symbol_end ();
1171
1172 if (strcasecmp (start, "psw") != 0)
1173 {
1174 *input_line_pointer = c;
1175 input_line_pointer = hold;
1176 str = hold;
1177 goto error;
1178 }
1179 *input_line_pointer = c;
1180 goto keep_going;
1181 }
1182 else if (operand->flags & MN10300_OPERAND_MDR)
1183 {
1184 char *start = input_line_pointer;
1185 char c = get_symbol_end ();
1186
1187 if (strcasecmp (start, "mdr") != 0)
1188 {
1189 *input_line_pointer = c;
1190 input_line_pointer = hold;
1191 str = hold;
1192 goto error;
1193 }
1194 *input_line_pointer = c;
1195 goto keep_going;
1196 }
1197 else if (operand->flags & MN10300_OPERAND_REG_LIST)
1198 {
1199 unsigned int value = 0;
1200 if (*input_line_pointer != '[')
1201 {
1202 input_line_pointer = hold;
1203 str = hold;
1204 goto error;
1205 }
1206
1207 /* Eat the '['. */
1208 input_line_pointer++;
87271fa6 1209
252b5132 1210 /* We used to reject a null register list here; however,
87271fa6
NC
1211 we accept it now so the compiler can emit "call"
1212 instructions for all calls to named functions.
252b5132
RH
1213
1214 The linker can then fill in the appropriate bits for the
1215 register list and stack size or change the instruction
1216 into a "calls" if using "call" is not profitable. */
1217 while (*input_line_pointer != ']')
1218 {
1219 char *start;
1220 char c;
1221
1222 if (*input_line_pointer == ',')
1223 input_line_pointer++;
1224
1225 start = input_line_pointer;
1226 c = get_symbol_end ();
1227
1228 if (strcasecmp (start, "d2") == 0)
1229 {
1230 value |= 0x80;
1231 *input_line_pointer = c;
1232 }
1233 else if (strcasecmp (start, "d3") == 0)
1234 {
1235 value |= 0x40;
1236 *input_line_pointer = c;
1237 }
1238 else if (strcasecmp (start, "a2") == 0)
1239 {
1240 value |= 0x20;
1241 *input_line_pointer = c;
1242 }
1243 else if (strcasecmp (start, "a3") == 0)
1244 {
1245 value |= 0x10;
1246 *input_line_pointer = c;
1247 }
1248 else if (strcasecmp (start, "other") == 0)
1249 {
1250 value |= 0x08;
1251 *input_line_pointer = c;
1252 }
0a727238 1253 else if (HAVE_AM33
85cb2cf9
JL
1254 && strcasecmp (start, "exreg0") == 0)
1255 {
1256 value |= 0x04;
1257 *input_line_pointer = c;
1258 }
0a727238 1259 else if (HAVE_AM33
85cb2cf9
JL
1260 && strcasecmp (start, "exreg1") == 0)
1261 {
1262 value |= 0x02;
1263 *input_line_pointer = c;
1264 }
0a727238 1265 else if (HAVE_AM33
85cb2cf9
JL
1266 && strcasecmp (start, "exother") == 0)
1267 {
1268 value |= 0x01;
1269 *input_line_pointer = c;
1270 }
0a727238 1271 else if (HAVE_AM33
85cb2cf9
JL
1272 && strcasecmp (start, "all") == 0)
1273 {
1274 value |= 0xff;
1275 *input_line_pointer = c;
1276 }
252b5132
RH
1277 else
1278 {
1279 input_line_pointer = hold;
1280 str = hold;
1281 goto error;
1282 }
1283 }
1284 input_line_pointer++;
1285 mn10300_insert_operand (&insn, &extension, operand,
1286 value, (char *) NULL, 0, 0);
1287 goto keep_going;
1288
1289 }
1290 else if (data_register_name (&ex))
1291 {
1292 input_line_pointer = hold;
1293 str = hold;
1294 goto error;
1295 }
1296 else if (address_register_name (&ex))
1297 {
1298 input_line_pointer = hold;
1299 str = hold;
1300 goto error;
1301 }
1302 else if (other_register_name (&ex))
1303 {
1304 input_line_pointer = hold;
1305 str = hold;
1306 goto error;
1307 }
0a727238 1308 else if (HAVE_AM33 && r_register_name (&ex))
85cb2cf9
JL
1309 {
1310 input_line_pointer = hold;
1311 str = hold;
1312 goto error;
1313 }
0a727238 1314 else if (HAVE_AM33 && xr_register_name (&ex))
85cb2cf9
JL
1315 {
1316 input_line_pointer = hold;
1317 str = hold;
1318 goto error;
1319 }
252b5132
RH
1320 else if (*str == ')' || *str == '(')
1321 {
1322 input_line_pointer = hold;
1323 str = hold;
1324 goto error;
1325 }
1326 else
1327 {
1328 expression (&ex);
1329 }
1330
87271fa6 1331 switch (ex.X_op)
252b5132
RH
1332 {
1333 case O_illegal:
1334 errmsg = _("illegal operand");
1335 goto error;
1336 case O_absent:
1337 errmsg = _("missing operand");
1338 goto error;
1339 case O_register:
1340 {
1341 int mask;
1342
1343 mask = MN10300_OPERAND_DREG | MN10300_OPERAND_AREG;
0a727238
AO
1344 if (HAVE_AM33)
1345 mask |= MN10300_OPERAND_RREG | MN10300_OPERAND_XRREG;
252b5132
RH
1346 if ((operand->flags & mask) == 0)
1347 {
1348 input_line_pointer = hold;
1349 str = hold;
1350 goto error;
1351 }
87271fa6 1352
252b5132
RH
1353 if (opcode->format == FMT_D1 || opcode->format == FMT_S1)
1354 extra_shift = 8;
1355 else if (opcode->format == FMT_D2
1356 || opcode->format == FMT_D4
1357 || opcode->format == FMT_S2
1358 || opcode->format == FMT_S4
1359 || opcode->format == FMT_S6
1360 || opcode->format == FMT_D5)
1361 extra_shift = 16;
85cb2cf9
JL
1362 else if (opcode->format == FMT_D7)
1363 extra_shift = 8;
1364 else if (opcode->format == FMT_D8 || opcode->format == FMT_D9)
1365 extra_shift = 8;
252b5132
RH
1366 else
1367 extra_shift = 0;
87271fa6 1368
252b5132
RH
1369 mn10300_insert_operand (&insn, &extension, operand,
1370 ex.X_add_number, (char *) NULL,
1371 0, extra_shift);
1372
252b5132
RH
1373 /* And note the register number in the register array. */
1374 mn10300_reg_operands[op_idx - 1] = ex.X_add_number;
1375 break;
1376 }
1377
1378 case O_constant:
1379 /* If this operand can be promoted, and it doesn't
1380 fit into the allocated bitfield for this insn,
1381 then promote it (ie this opcode does not match). */
1382 if (operand->flags
1383 & (MN10300_OPERAND_PROMOTE | MN10300_OPERAND_RELAX)
87271fa6 1384 && !check_operand (insn, operand, ex.X_add_number))
252b5132
RH
1385 {
1386 input_line_pointer = hold;
1387 str = hold;
1388 goto error;
1389 }
1390
1391 mn10300_insert_operand (&insn, &extension, operand,
1392 ex.X_add_number, (char *) NULL,
1393 0, 0);
1394 break;
1395
1396 default:
1397 /* If this operand can be promoted, then this opcode didn't
1398 match since we can't know if it needed promotion! */
1399 if (operand->flags & MN10300_OPERAND_PROMOTE)
1400 {
1401 input_line_pointer = hold;
1402 str = hold;
1403 goto error;
1404 }
1405
1406 /* We need to generate a fixup for this expression. */
1407 if (fc >= MAX_INSN_FIXUPS)
1408 as_fatal (_("too many fixups"));
1409 fixups[fc].exp = ex;
1410 fixups[fc].opindex = *opindex_ptr;
1411 fixups[fc].reloc = BFD_RELOC_UNUSED;
1412 ++fc;
1413 break;
1414 }
1415
1416keep_going:
1417 str = input_line_pointer;
1418 input_line_pointer = hold;
1419
1420 while (*str == ' ' || *str == ',')
1421 ++str;
1422
1423 }
1424
1425 /* Make sure we used all the operands! */
1426 if (*str != ',')
1427 match = 1;
1428
1429 /* If this instruction has registers that must not match, verify
1430 that they do indeed not match. */
1431 if (opcode->no_match_operands)
1432 {
1433 int i;
1434
1435 /* Look at each operand to see if it's marked. */
1436 for (i = 0; i < MN10300_MAX_OPERANDS; i++)
1437 {
1438 if ((1 << i) & opcode->no_match_operands)
1439 {
1440 int j;
1441
1442 /* operand I is marked. Check that it does not match any
1443 operands > I which are marked. */
1444 for (j = i + 1; j < MN10300_MAX_OPERANDS; j++)
1445 {
1446 if (((1 << j) & opcode->no_match_operands)
1447 && mn10300_reg_operands[i] == mn10300_reg_operands[j])
1448 {
1449 errmsg = _("Invalid register specification.");
1450 match = 0;
1451 goto error;
1452 }
1453 }
1454 }
1455 }
1456 }
1457
1458 error:
1459 if (match == 0)
87271fa6 1460 {
252b5132 1461 next_opcode = opcode + 1;
87271fa6 1462 if (!strcmp (next_opcode->name, opcode->name))
252b5132
RH
1463 {
1464 opcode = next_opcode;
1465 continue;
1466 }
87271fa6 1467
252b5132
RH
1468 as_bad ("%s", errmsg);
1469 return;
87271fa6 1470 }
252b5132
RH
1471 break;
1472 }
87271fa6 1473
252b5132
RH
1474 while (isspace (*str))
1475 ++str;
1476
1477 if (*str != '\0')
1478 as_bad (_("junk at end of line: `%s'"), str);
1479
1480 input_line_pointer = str;
1481
1482 /* Determine the size of the instruction. */
1483 if (opcode->format == FMT_S0)
1484 size = 1;
1485
1486 if (opcode->format == FMT_S1 || opcode->format == FMT_D0)
1487 size = 2;
1488
1489 if (opcode->format == FMT_S2 || opcode->format == FMT_D1)
1490 size = 3;
1491
85cb2cf9
JL
1492 if (opcode->format == FMT_D6)
1493 size = 3;
1494
1495 if (opcode->format == FMT_D7 || opcode->format == FMT_D10)
1496 size = 4;
1497
1498 if (opcode->format == FMT_D8)
1499 size = 6;
1500
1501 if (opcode->format == FMT_D9)
1502 size = 7;
252b5132
RH
1503
1504 if (opcode->format == FMT_S4)
1505 size = 5;
1506
1507 if (opcode->format == FMT_S6 || opcode->format == FMT_D5)
1508 size = 7;
1509
1510 if (opcode->format == FMT_D2)
1511 size = 4;
1512
1513 if (opcode->format == FMT_D4)
1514 size = 6;
1515
3c07fb76
AO
1516 real_size = size;
1517
252b5132
RH
1518 if (relaxable && fc > 0)
1519 {
1520 int type;
1521
87271fa6 1522 /* bCC */
252b5132
RH
1523 if (size == 2)
1524 {
1525 /* Handle bra specially. Basically treat it like jmp so
1526 that we automatically handle 8, 16 and 32 bit offsets
1527 correctly as well as jumps to an undefined address.
1528
1529 It is also important to not treat it like other bCC
1530 instructions since the long forms of bra is different
1531 from other bCC instructions. */
1532 if (opcode->opcode == 0xca00)
1533 type = 10;
1534 else
1535 type = 0;
1536 }
87271fa6 1537 /* call */
252b5132 1538 else if (size == 5)
87271fa6
NC
1539 type = 6;
1540 /* calls */
252b5132
RH
1541 else if (size == 4)
1542 type = 8;
87271fa6 1543 /* jmp */
252b5132
RH
1544 else if (size == 3 && opcode->opcode == 0xcc0000)
1545 type = 10;
87271fa6 1546 /* bCC (uncommon cases) */
252b5132
RH
1547 else
1548 type = 3;
1549
1550 f = frag_var (rs_machine_dependent, 8, 8 - size, type,
1551 fixups[0].exp.X_add_symbol,
1552 fixups[0].exp.X_add_number,
1553 (char *)fixups[0].opindex);
87271fa6 1554
252b5132
RH
1555 /* This is pretty hokey. We basically just care about the
1556 opcode, so we have to write out the first word big endian.
1557
1558 The exception is "call", which has two operands that we
1559 care about.
1560
1561 The first operand (the register list) happens to be in the
1562 first instruction word, and will be in the right place if
1563 we output the first word in big endian mode.
1564
1565 The second operand (stack size) is in the extension word,
1566 and we want it to appear as the first character in the extension
1567 word (as it appears in memory). Luckily, writing the extension
1568 word in big endian format will do what we want. */
1569 number_to_chars_bigendian (f, insn, size > 4 ? 4 : size);
1570 if (size > 8)
1571 {
1572 number_to_chars_bigendian (f + 4, extension, 4);
1573 number_to_chars_bigendian (f + 8, 0, size - 8);
1574 }
1575 else if (size > 4)
1576 number_to_chars_bigendian (f + 4, extension, size - 4);
1577 }
1578 else
1579 {
1580 /* Allocate space for the instruction. */
1581 f = frag_more (size);
1582
1583 /* Fill in bytes for the instruction. Note that opcode fields
1584 are written big-endian, 16 & 32bit immediates are written
1585 little endian. Egad. */
1586 if (opcode->format == FMT_S0
1587 || opcode->format == FMT_S1
1588 || opcode->format == FMT_D0
85cb2cf9
JL
1589 || opcode->format == FMT_D6
1590 || opcode->format == FMT_D7
1591 || opcode->format == FMT_D10
252b5132
RH
1592 || opcode->format == FMT_D1)
1593 {
1594 number_to_chars_bigendian (f, insn, size);
1595 }
1596 else if (opcode->format == FMT_S2
1597 && opcode->opcode != 0xdf0000
1598 && opcode->opcode != 0xde0000)
1599 {
1600 /* A format S2 instruction that is _not_ "ret" and "retf". */
1601 number_to_chars_bigendian (f, (insn >> 16) & 0xff, 1);
1602 number_to_chars_littleendian (f + 1, insn & 0xffff, 2);
1603 }
1604 else if (opcode->format == FMT_S2)
1605 {
1606 /* This must be a ret or retf, which is written entirely in
1607 big-endian format. */
1608 number_to_chars_bigendian (f, insn, 3);
1609 }
1610 else if (opcode->format == FMT_S4
1611 && opcode->opcode != 0xdc000000)
1612 {
1613 /* This must be a format S4 "call" instruction. What a pain. */
1614 unsigned long temp = (insn >> 8) & 0xffff;
1615 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
1616 number_to_chars_littleendian (f + 1, temp, 2);
1617 number_to_chars_bigendian (f + 3, insn & 0xff, 1);
1618 number_to_chars_bigendian (f + 4, extension & 0xff, 1);
1619 }
1620 else if (opcode->format == FMT_S4)
1621 {
1622 /* This must be a format S4 "jmp" instruction. */
1623 unsigned long temp = ((insn & 0xffffff) << 8) | (extension & 0xff);
1624 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
1625 number_to_chars_littleendian (f + 1, temp, 4);
1626 }
1627 else if (opcode->format == FMT_S6)
1628 {
1629 unsigned long temp = ((insn & 0xffffff) << 8)
1630 | ((extension >> 16) & 0xff);
1631 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
1632 number_to_chars_littleendian (f + 1, temp, 4);
1633 number_to_chars_bigendian (f + 5, (extension >> 8) & 0xff, 1);
1634 number_to_chars_bigendian (f + 6, extension & 0xff, 1);
1635 }
1636 else if (opcode->format == FMT_D2
1637 && opcode->opcode != 0xfaf80000
1638 && opcode->opcode != 0xfaf00000
1639 && opcode->opcode != 0xfaf40000)
1640 {
1641 /* A format D2 instruction where the 16bit immediate is
1642 really a single 16bit value, not two 8bit values. */
1643 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
1644 number_to_chars_littleendian (f + 2, insn & 0xffff, 2);
1645 }
1646 else if (opcode->format == FMT_D2)
1647 {
1648 /* A format D2 instruction where the 16bit immediate
1649 is really two 8bit immediates. */
1650 number_to_chars_bigendian (f, insn, 4);
1651 }
1652 else if (opcode->format == FMT_D4)
1653 {
1654 unsigned long temp = ((insn & 0xffff) << 16) | (extension & 0xffff);
87271fa6 1655
252b5132
RH
1656 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
1657 number_to_chars_littleendian (f + 2, temp, 4);
1658 }
1659 else if (opcode->format == FMT_D5)
1660 {
87271fa6
NC
1661 unsigned long temp = (((insn & 0xffff) << 16)
1662 | ((extension >> 8) & 0xffff));
1663
252b5132
RH
1664 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
1665 number_to_chars_littleendian (f + 2, temp, 4);
1666 number_to_chars_bigendian (f + 6, extension & 0xff, 1);
1667 }
85cb2cf9
JL
1668 else if (opcode->format == FMT_D8)
1669 {
87271fa6
NC
1670 unsigned long temp = ((insn & 0xff) << 16) | (extension & 0xffff);
1671
1672 number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3);
1673 number_to_chars_bigendian (f + 3, (temp & 0xff), 1);
1674 number_to_chars_littleendian (f + 4, temp >> 8, 2);
85cb2cf9
JL
1675 }
1676 else if (opcode->format == FMT_D9)
1677 {
87271fa6
NC
1678 unsigned long temp = ((insn & 0xff) << 24) | (extension & 0xffffff);
1679
1680 number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3);
1681 number_to_chars_littleendian (f + 3, temp, 4);
85cb2cf9 1682 }
252b5132
RH
1683
1684 /* Create any fixups. */
1685 for (i = 0; i < fc; i++)
1686 {
1687 const struct mn10300_operand *operand;
1688
1689 operand = &mn10300_operands[fixups[i].opindex];
1690 if (fixups[i].reloc != BFD_RELOC_UNUSED)
1691 {
1692 reloc_howto_type *reloc_howto;
1693 int size;
1694 int offset;
1695 fixS *fixP;
1696
87271fa6
NC
1697 reloc_howto = bfd_reloc_type_lookup (stdoutput,
1698 fixups[i].reloc);
252b5132
RH
1699
1700 if (!reloc_howto)
87271fa6
NC
1701 abort ();
1702
252b5132
RH
1703 size = bfd_get_reloc_size (reloc_howto);
1704
1705 if (size < 1 || size > 4)
87271fa6 1706 abort ();
252b5132
RH
1707
1708 offset = 4 - size;
1709 fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset,
1710 size, &fixups[i].exp,
1711 reloc_howto->pc_relative,
1712 fixups[i].reloc);
1713 }
1714 else
1715 {
1716 int reloc, pcrel, reloc_size, offset;
1717 fixS *fixP;
1718
1719 reloc = BFD_RELOC_NONE;
1720 /* How big is the reloc? Remember SPLIT relocs are
1721 implicitly 32bits. */
1722 if ((operand->flags & MN10300_OPERAND_SPLIT) != 0)
1723 reloc_size = 32;
85cb2cf9
JL
1724 else if ((operand->flags & MN10300_OPERAND_24BIT) != 0)
1725 reloc_size = 24;
252b5132
RH
1726 else
1727 reloc_size = operand->bits;
1728
1729 /* Is the reloc pc-relative? */
1730 pcrel = (operand->flags & MN10300_OPERAND_PCREL) != 0;
1731
1732 /* Gross. This disgusting hack is to make sure we
87271fa6 1733 get the right offset for the 16/32 bit reloc in
252b5132
RH
1734 "call" instructions. Basically they're a pain
1735 because the reloc isn't at the end of the instruction. */
1736 if ((size == 5 || size == 7)
1737 && (((insn >> 24) & 0xff) == 0xcd
1738 || ((insn >> 24) & 0xff) == 0xdd))
1739 size -= 2;
1740
1741 /* Similarly for certain bit instructions which don't
1742 hav their 32bit reloc at the tail of the instruction. */
1743 if (size == 7
1744 && (((insn >> 16) & 0xffff) == 0xfe00
1745 || ((insn >> 16) & 0xffff) == 0xfe01
1746 || ((insn >> 16) & 0xffff) == 0xfe02))
1747 size -= 1;
87271fa6 1748
252b5132
RH
1749 offset = size - reloc_size / 8;
1750
1751 /* Choose a proper BFD relocation type. */
1752 if (pcrel)
1753 {
1754 if (reloc_size == 32)
1755 reloc = BFD_RELOC_32_PCREL;
1756 else if (reloc_size == 16)
1757 reloc = BFD_RELOC_16_PCREL;
1758 else if (reloc_size == 8)
1759 reloc = BFD_RELOC_8_PCREL;
1760 else
1761 abort ();
1762 }
1763 else
1764 {
1765 if (reloc_size == 32)
1766 reloc = BFD_RELOC_32;
1767 else if (reloc_size == 16)
1768 reloc = BFD_RELOC_16;
1769 else if (reloc_size == 8)
1770 reloc = BFD_RELOC_8;
1771 else
1772 abort ();
1773 }
1774
1775 /* Convert the size of the reloc into what fix_new_exp wants. */
1776 reloc_size = reloc_size / 8;
1777 if (reloc_size == 8)
1778 reloc_size = 0;
1779 else if (reloc_size == 16)
1780 reloc_size = 1;
1781 else if (reloc_size == 32)
1782 reloc_size = 2;
1783
1784 fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset,
1785 reloc_size, &fixups[i].exp, pcrel,
1786 ((bfd_reloc_code_real_type) reloc));
1787
1788 if (pcrel)
1789 fixP->fx_offset += offset;
1790 }
1791 }
1792 }
e8b1cae5 1793
4dc7ead9 1794 dwarf2_emit_insn (real_size);
252b5132
RH
1795}
1796
87271fa6
NC
1797/* If while processing a fixup, a reloc really needs to be created
1798 then it is done here. */
252b5132 1799
252b5132
RH
1800arelent *
1801tc_gen_reloc (seg, fixp)
b4c1ea07 1802 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH
1803 fixS *fixp;
1804{
1805 arelent *reloc;
1806 reloc = (arelent *) xmalloc (sizeof (arelent));
1807
1808 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1809 if (reloc->howto == (reloc_howto_type *) NULL)
1810 {
1811 as_bad_where (fixp->fx_file, fixp->fx_line,
87271fa6
NC
1812 _("reloc %d not supported by object file format"),
1813 (int) fixp->fx_r_type);
252b5132
RH
1814 return NULL;
1815 }
1816 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1817
1818 if (fixp->fx_addsy && fixp->fx_subsy)
1819 {
87271fa6 1820
252b5132
RH
1821 if ((S_GET_SEGMENT (fixp->fx_addsy) != S_GET_SEGMENT (fixp->fx_subsy))
1822 || S_GET_SEGMENT (fixp->fx_addsy) == undefined_section)
1823 {
1824 as_bad_where (fixp->fx_file, fixp->fx_line,
1825 "Difference of symbols in different sections is not supported");
1826 return NULL;
1827 }
1828
0aa529cb 1829 reloc->sym_ptr_ptr = (asymbol **) &bfd_abs_symbol;
252b5132
RH
1830 reloc->addend = (S_GET_VALUE (fixp->fx_addsy)
1831 - S_GET_VALUE (fixp->fx_subsy) + fixp->fx_offset);
1832 }
87271fa6 1833 else
252b5132 1834 {
87271fa6 1835 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
310b5aa2 1836 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH
1837 reloc->addend = fixp->fx_offset;
1838 }
1839 return reloc;
1840}
1841
1842int
1843md_estimate_size_before_relax (fragp, seg)
1844 fragS *fragp;
1845 asection *seg;
1846{
93c2a809
AM
1847 if (fragp->fr_subtype == 6
1848 && (!S_IS_DEFINED (fragp->fr_symbol)
1849 || seg != S_GET_SEGMENT (fragp->fr_symbol)))
1850 fragp->fr_subtype = 7;
1851 else if (fragp->fr_subtype == 8
1852 && (!S_IS_DEFINED (fragp->fr_symbol)
1853 || seg != S_GET_SEGMENT (fragp->fr_symbol)))
1854 fragp->fr_subtype = 9;
1855 else if (fragp->fr_subtype == 10
1856 && (!S_IS_DEFINED (fragp->fr_symbol)
1857 || seg != S_GET_SEGMENT (fragp->fr_symbol)))
1858 fragp->fr_subtype = 12;
1859
1860 if (fragp->fr_subtype >= sizeof (md_relax_table) / sizeof (md_relax_table[0]))
1861 abort ();
1862
1863 return md_relax_table[fragp->fr_subtype].rlx_length;
87271fa6 1864}
252b5132
RH
1865
1866long
1867md_pcrel_from (fixp)
1868 fixS *fixp;
1869{
87271fa6 1870 if (fixp->fx_addsy != (symbolS *) NULL && !S_IS_DEFINED (fixp->fx_addsy))
252b5132
RH
1871 {
1872 /* The symbol is undefined. Let the linker figure it out. */
1873 return 0;
1874 }
1875 return fixp->fx_frag->fr_address + fixp->fx_where;
252b5132
RH
1876}
1877
1878int
1879md_apply_fix3 (fixp, valuep, seg)
1880 fixS *fixp;
c51ce5f0 1881 valueT *valuep;
252b5132
RH
1882 segT seg;
1883{
58a77e41
EC
1884 char *fixpos = fixp->fx_where + fixp->fx_frag->fr_literal;
1885 int size = 0;
c51ce5f0 1886 int value;
58a77e41
EC
1887
1888 assert (fixp->fx_r_type < BFD_RELOC_UNUSED);
1889
1890 /* This should never happen. */
1891 if (seg->flags & SEC_ALLOC)
1892 abort ();
1893
c51ce5f0
EC
1894 /* The value we are passed in *valuep includes the symbol values.
1895 Since we are using BFD_ASSEMBLER, if we are doing this relocation
1896 the code in write.c is going to call bfd_install_relocation, which
1897 is also going to use the symbol value. That means that if the
1898 reloc is fully resolved we want to use *valuep since
1899 bfd_install_relocation is not being used.
1900
1901 However, if the reloc is not fully resolved we do not want to use
1902 *valuep, and must use fx_offset instead. However, if the reloc
1903 is PC relative, we do want to use *valuep since it includes the
1904 result of md_pcrel_from. */
1905 if (fixp->fx_addsy == (symbolS *) NULL || fixp->fx_pcrel)
1906 value = *valuep;
1907 else
1908 value = fixp->fx_offset;
1909
58a77e41
EC
1910 /* If the fix is relative to a symbol which is not defined, or not
1911 in the same segment as the fix, we cannot resolve it here. */
1912 if (fixp->fx_addsy != NULL
1913 && (! S_IS_DEFINED (fixp->fx_addsy)
1914 || (S_GET_SEGMENT (fixp->fx_addsy) != seg)))
1915 {
1916 fixp->fx_done = 0;
1917 return 0;
1918 }
1919
1920 switch (fixp->fx_r_type)
1921 {
1922 case BFD_RELOC_8:
1923 size = 1;
1924 break;
1925
1926 case BFD_RELOC_16:
1927 size = 2;
1928 break;
1929
1930 case BFD_RELOC_32:
1931 size = 4;
1932 break;
1933
1934 case BFD_RELOC_VTABLE_INHERIT:
1935 case BFD_RELOC_VTABLE_ENTRY:
1936 fixp->fx_done = 0;
1937 return 1;
1938
1939 case BFD_RELOC_NONE:
1940 default:
1941 as_bad_where (fixp->fx_file, fixp->fx_line,
1942 _("Bad relocation fixup type (%d)"), fixp->fx_r_type);
1943 }
1944
c51ce5f0 1945 md_number_to_chars (fixpos, value, size);
58a77e41 1946
b653e7f9
NC
1947 /* If a symbol remains, pass the fixup, as a reloc, onto the linker. */
1948 if (fixp->fx_addsy == NULL)
1949 fixp->fx_done = 1;
58a77e41 1950
b653e7f9 1951 return 0;
58a77e41
EC
1952}
1953
1954/* Return nonzero if the fixup in FIXP will require a relocation,
1955 even it if appears that the fixup could be completely handled
1956 within GAS. */
1957
1958int
1959mn10300_force_relocation (fixp)
1960 struct fix *fixp;
1961{
1962 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
1963 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
1964 return 1;
1965
1966 return 0;
1967}
1968
1969/* Return zero if the fixup in fixp should be left alone and not
1970 adjusted. */
1971
1972boolean
1973mn10300_fix_adjustable (fixp)
1974 struct fix *fixp;
1975{
1976 /* Prevent all adjustments to global symbols. */
1977 if (S_IS_EXTERN (fixp->fx_addsy) || S_IS_WEAK (fixp->fx_addsy))
1978 return 0;
1979
1980 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
1981 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
1982 return 0;
1983
1984 return 1;
252b5132
RH
1985}
1986
1987/* Insert an operand value into an instruction. */
1988
1989static void
1990mn10300_insert_operand (insnp, extensionp, operand, val, file, line, shift)
1991 unsigned long *insnp;
1992 unsigned long *extensionp;
1993 const struct mn10300_operand *operand;
1994 offsetT val;
1995 char *file;
1996 unsigned int line;
1997 unsigned int shift;
1998{
1999 /* No need to check 32bit operands for a bit. Note that
2000 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
2001 if (operand->bits != 32
2002 && (operand->flags & MN10300_OPERAND_SPLIT) == 0)
2003 {
2004 long min, max;
2005 offsetT test;
2006 int bits;
2007
2008 bits = operand->bits;
85cb2cf9
JL
2009 if (operand->flags & MN10300_OPERAND_24BIT)
2010 bits = 24;
252b5132
RH
2011
2012 if ((operand->flags & MN10300_OPERAND_SIGNED) != 0)
2013 {
2014 max = (1 << (bits - 1)) - 1;
2015 min = - (1 << (bits - 1));
2016 }
2017 else
87271fa6
NC
2018 {
2019 max = (1 << bits) - 1;
2020 min = 0;
2021 }
252b5132
RH
2022
2023 test = val;
2024
252b5132 2025 if (test < (offsetT) min || test > (offsetT) max)
87271fa6
NC
2026 {
2027 const char *err =
2028 _("operand out of range (%s not between %ld and %ld)");
2029 char buf[100];
2030
2031 sprint_value (buf, test);
2032 if (file == (char *) NULL)
2033 as_warn (err, buf, min, max);
2034 else
2035 as_warn_where (file, line, err, buf, min, max);
2036 }
252b5132
RH
2037 }
2038
2039 if ((operand->flags & MN10300_OPERAND_SPLIT) != 0)
2040 {
2041 *insnp |= (val >> (32 - operand->bits)) & ((1 << operand->bits) - 1);
2042 *extensionp |= ((val & ((1 << (32 - operand->bits)) - 1))
2043 << operand->shift);
2044 }
85cb2cf9
JL
2045 else if ((operand->flags & MN10300_OPERAND_24BIT) != 0)
2046 {
2047 *insnp |= (val >> (24 - operand->bits)) & ((1 << operand->bits) - 1);
2048 *extensionp |= ((val & ((1 << (24 - operand->bits)) - 1))
2049 << operand->shift);
2050 }
252b5132
RH
2051 else if ((operand->flags & MN10300_OPERAND_EXTENDED) == 0)
2052 {
2053 *insnp |= (((long) val & ((1 << operand->bits) - 1))
2054 << (operand->shift + shift));
2055
2056 if ((operand->flags & MN10300_OPERAND_REPEATED) != 0)
2057 *insnp |= (((long) val & ((1 << operand->bits) - 1))
2058 << (operand->shift + shift + operand->bits));
2059 }
2060 else
2061 {
2062 *extensionp |= (((long) val & ((1 << operand->bits) - 1))
2063 << (operand->shift + shift));
2064
2065 if ((operand->flags & MN10300_OPERAND_REPEATED) != 0)
2066 *extensionp |= (((long) val & ((1 << operand->bits) - 1))
2067 << (operand->shift + shift + operand->bits));
2068 }
2069}
2070
2071static unsigned long
2072check_operand (insn, operand, val)
b4c1ea07 2073 unsigned long insn ATTRIBUTE_UNUSED;
252b5132
RH
2074 const struct mn10300_operand *operand;
2075 offsetT val;
2076{
2077 /* No need to check 32bit operands for a bit. Note that
2078 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
2079 if (operand->bits != 32
2080 && (operand->flags & MN10300_OPERAND_SPLIT) == 0)
2081 {
2082 long min, max;
2083 offsetT test;
2084 int bits;
2085
2086 bits = operand->bits;
85cb2cf9
JL
2087 if (operand->flags & MN10300_OPERAND_24BIT)
2088 bits = 24;
252b5132
RH
2089
2090 if ((operand->flags & MN10300_OPERAND_SIGNED) != 0)
2091 {
2092 max = (1 << (bits - 1)) - 1;
2093 min = - (1 << (bits - 1));
2094 }
2095 else
87271fa6
NC
2096 {
2097 max = (1 << bits) - 1;
2098 min = 0;
2099 }
252b5132
RH
2100
2101 test = val;
2102
252b5132
RH
2103 if (test < (offsetT) min || test > (offsetT) max)
2104 return 0;
2105 else
2106 return 1;
2107 }
2108 return 1;
2109}
2110
2111static void
2112set_arch_mach (mach)
2113 int mach;
2114{
2115 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, mach))
2116 as_warn (_("could not set architecture and machine"));
2117
2118 current_machine = mach;
2119}
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