Make -mlittle-endian switch set the target_big_endian variable to false.
[deliverable/binutils-gdb.git] / gas / config / tc-mn10300.c
CommitLineData
252b5132 1/* tc-mn10300.c -- Assembler code for the Matsushita 10300
aef6203b 2 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004
f7e42eb4 3 Free Software Foundation, Inc.
252b5132
RH
4
5 This file is part of GAS, the GNU Assembler.
6
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22#include <stdio.h>
252b5132 23#include "as.h"
3882b010 24#include "safe-ctype.h"
87271fa6 25#include "subsegs.h"
252b5132 26#include "opcode/mn10300.h"
e8b1cae5 27#include "dwarf2dbg.h"
252b5132
RH
28\f
29/* Structure to hold information about predefined registers. */
30struct reg_name
31{
32 const char *name;
33 int value;
34};
35
87271fa6
NC
36/* Generic assembler global variables which must be defined by all
37 targets. */
252b5132 38
87271fa6 39/* Characters which always start a comment. */
252b5132
RH
40const char comment_chars[] = "#";
41
42/* Characters which start a comment at the beginning of a line. */
43const char line_comment_chars[] = ";#";
44
87271fa6 45/* Characters which may be used to separate multiple commands on a
252b5132
RH
46 single line. */
47const char line_separator_chars[] = ";";
48
87271fa6 49/* Characters which are used to indicate an exponent in a floating
252b5132
RH
50 point number. */
51const char EXP_CHARS[] = "eE";
52
87271fa6 53/* Characters which mean that a number is a floating point constant,
252b5132
RH
54 as in 0d1.0. */
55const char FLT_CHARS[] = "dD";
56\f
dae1b34e
NC
57const relax_typeS md_relax_table[] =
58{
59 /* The plus values for the bCC and fBCC instructions in the table below
60 are because the branch instruction is translated into a jump
61 instruction that is now +2 or +3 bytes further on in memory, and the
62 correct size of jump instruction must be selected. */
87271fa6 63 /* bCC relaxing */
252b5132 64 {0x7f, -0x80, 2, 1},
dae1b34e 65 {0x7fff + 2, -0x8000 + 2, 5, 2},
252b5132
RH
66 {0x7fffffff, -0x80000000, 7, 0},
67
dae1b34e 68 /* bCC relaxing (uncommon cases for 3byte length instructions) */
252b5132 69 {0x7f, -0x80, 3, 4},
dae1b34e 70 {0x7fff + 3, -0x8000 + 3, 6, 5},
252b5132
RH
71 {0x7fffffff, -0x80000000, 8, 0},
72
87271fa6 73 /* call relaxing */
252b5132
RH
74 {0x7fff, -0x8000, 5, 7},
75 {0x7fffffff, -0x80000000, 7, 0},
76
87271fa6 77 /* calls relaxing */
252b5132
RH
78 {0x7fff, -0x8000, 4, 9},
79 {0x7fffffff, -0x80000000, 6, 0},
80
87271fa6 81 /* jmp relaxing */
252b5132
RH
82 {0x7f, -0x80, 2, 11},
83 {0x7fff, -0x8000, 3, 12},
84 {0x7fffffff, -0x80000000, 5, 0},
85
e7b71525
AO
86 /* fbCC relaxing */
87 {0x7f, -0x80, 3, 14},
dae1b34e 88 {0x7fff + 3, -0x8000 + 3, 6, 15},
e7b71525
AO
89 {0x7fffffff, -0x80000000, 8, 0},
90
252b5132
RH
91};
92
87271fa6 93/* Local functions. */
252b5132
RH
94static void mn10300_insert_operand PARAMS ((unsigned long *, unsigned long *,
95 const struct mn10300_operand *,
96 offsetT, char *, unsigned,
97 unsigned));
98static unsigned long check_operand PARAMS ((unsigned long,
99 const struct mn10300_operand *,
100 offsetT));
101static int reg_name_search PARAMS ((const struct reg_name *, int, const char *));
b34976b6
AM
102static bfd_boolean data_register_name PARAMS ((expressionS *expressionP));
103static bfd_boolean address_register_name PARAMS ((expressionS *expressionP));
104static bfd_boolean other_register_name PARAMS ((expressionS *expressionP));
497f322d
AO
105static bfd_boolean r_register_name PARAMS ((expressionS *expressionP));
106static bfd_boolean xr_register_name PARAMS ((expressionS *expressionP));
107static void set_arch_mach PARAMS ((int));
252b5132 108
1485d400
EC
109/* Set linkrelax here to avoid fixups in most sections. */
110int linkrelax = 1;
111
252b5132
RH
112static int current_machine;
113
87271fa6 114/* Fixups. */
252b5132
RH
115#define MAX_INSN_FIXUPS (5)
116struct mn10300_fixup
117{
118 expressionS exp;
119 int opindex;
120 bfd_reloc_code_real_type reloc;
121};
122struct mn10300_fixup fixups[MAX_INSN_FIXUPS];
123static int fc;
124
125/* We must store the value of each register operand so that we can
126 verify that certain registers do not match. */
127int mn10300_reg_operands[MN10300_MAX_OPERANDS];
128\f
129const char *md_shortopts = "";
130struct option md_longopts[] = {
131 {NULL, no_argument, NULL, 0}
132};
87271fa6 133size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH
134
135/* The target specific pseudo-ops which we support. */
136const pseudo_typeS md_pseudo_table[] =
137{
0a727238
AO
138 { "am30", set_arch_mach, AM30 },
139 { "am33", set_arch_mach, AM33 },
e7b71525 140 { "am33_2", (void (*) PARAMS ((int))) set_arch_mach, AM33_2 },
0a727238 141 { "mn10300", set_arch_mach, MN103 },
252b5132
RH
142 {NULL, 0, 0}
143};
144
e7b71525
AO
145#define HAVE_AM33_2 (current_machine == AM33_2)
146#define HAVE_AM33 (current_machine == AM33 || HAVE_AM33_2)
aa15f6f7 147#define HAVE_AM30 (current_machine == AM30)
0a727238 148
252b5132
RH
149/* Opcode hash table. */
150static struct hash_control *mn10300_hash;
151
87271fa6 152/* This table is sorted. Suitable for searching by a binary search. */
252b5132
RH
153static const struct reg_name data_registers[] =
154{
155 { "d0", 0 },
156 { "d1", 1 },
157 { "d2", 2 },
158 { "d3", 3 },
159};
87271fa6
NC
160#define DATA_REG_NAME_CNT \
161 (sizeof (data_registers) / sizeof (struct reg_name))
252b5132
RH
162
163static const struct reg_name address_registers[] =
164{
165 { "a0", 0 },
166 { "a1", 1 },
167 { "a2", 2 },
168 { "a3", 3 },
169};
87271fa6
NC
170
171#define ADDRESS_REG_NAME_CNT \
172 (sizeof (address_registers) / sizeof (struct reg_name))
252b5132 173
85cb2cf9
JL
174static const struct reg_name r_registers[] =
175{
176 { "a0", 8 },
177 { "a1", 9 },
178 { "a2", 10 },
179 { "a3", 11 },
180 { "d0", 12 },
181 { "d1", 13 },
182 { "d2", 14 },
183 { "d3", 15 },
184 { "e0", 0 },
185 { "e1", 1 },
186 { "e10", 10 },
187 { "e11", 11 },
188 { "e12", 12 },
189 { "e13", 13 },
190 { "e14", 14 },
191 { "e15", 15 },
192 { "e2", 2 },
193 { "e3", 3 },
194 { "e4", 4 },
195 { "e5", 5 },
196 { "e6", 6 },
197 { "e7", 7 },
198 { "e8", 8 },
199 { "e9", 9 },
200 { "r0", 0 },
201 { "r1", 1 },
202 { "r10", 10 },
203 { "r11", 11 },
204 { "r12", 12 },
205 { "r13", 13 },
206 { "r14", 14 },
207 { "r15", 15 },
208 { "r2", 2 },
209 { "r3", 3 },
210 { "r4", 4 },
211 { "r5", 5 },
212 { "r6", 6 },
213 { "r7", 7 },
214 { "r8", 8 },
215 { "r9", 9 },
216};
87271fa6
NC
217
218#define R_REG_NAME_CNT \
219 (sizeof (r_registers) / sizeof (struct reg_name))
85cb2cf9
JL
220
221static const struct reg_name xr_registers[] =
222{
223 { "mcrh", 2 },
224 { "mcrl", 3 },
225 { "mcvf", 4 },
226 { "mdrq", 1 },
227 { "sp", 0 },
228 { "xr0", 0 },
229 { "xr1", 1 },
230 { "xr10", 10 },
231 { "xr11", 11 },
232 { "xr12", 12 },
233 { "xr13", 13 },
234 { "xr14", 14 },
235 { "xr15", 15 },
236 { "xr2", 2 },
237 { "xr3", 3 },
238 { "xr4", 4 },
239 { "xr5", 5 },
240 { "xr6", 6 },
241 { "xr7", 7 },
242 { "xr8", 8 },
243 { "xr9", 9 },
244};
85cb2cf9 245
87271fa6
NC
246#define XR_REG_NAME_CNT \
247 (sizeof (xr_registers) / sizeof (struct reg_name))
252b5132 248
913572ec
AO
249/* We abuse the `value' field, that would be otherwise unused, to
250 encode the architecture on which (access to) the register was
251 introduced. FIXME: we should probably warn when we encounter a
252 register name when assembling for an architecture that doesn't
253 support it, before parsing it as a symbol name. */
252b5132
RH
254static const struct reg_name other_registers[] =
255{
913572ec 256 { "epsw", AM33 },
252b5132 257 { "mdr", 0 },
913572ec 258 { "pc", AM33 },
252b5132
RH
259 { "psw", 0 },
260 { "sp", 0 },
261};
87271fa6
NC
262
263#define OTHER_REG_NAME_CNT \
264 (sizeof (other_registers) / sizeof (struct reg_name))
252b5132 265
e7b71525
AO
266static const struct reg_name float_registers[] =
267{
268 { "fs0", 0 },
269 { "fs1", 1 },
270 { "fs10", 10 },
271 { "fs11", 11 },
272 { "fs12", 12 },
273 { "fs13", 13 },
274 { "fs14", 14 },
275 { "fs15", 15 },
276 { "fs16", 16 },
277 { "fs17", 17 },
278 { "fs18", 18 },
279 { "fs19", 19 },
280 { "fs2", 2 },
281 { "fs20", 20 },
282 { "fs21", 21 },
283 { "fs22", 22 },
284 { "fs23", 23 },
285 { "fs24", 24 },
286 { "fs25", 25 },
287 { "fs26", 26 },
288 { "fs27", 27 },
289 { "fs28", 28 },
290 { "fs29", 29 },
291 { "fs3", 3 },
292 { "fs30", 30 },
293 { "fs31", 31 },
294 { "fs4", 4 },
295 { "fs5", 5 },
296 { "fs6", 6 },
297 { "fs7", 7 },
298 { "fs8", 8 },
299 { "fs9", 9 },
300};
301
302#define FLOAT_REG_NAME_CNT \
303 (sizeof (float_registers) / sizeof (struct reg_name))
304
305static const struct reg_name double_registers[] =
306{
307 { "fd0", 0 },
308 { "fd10", 10 },
309 { "fd12", 12 },
310 { "fd14", 14 },
311 { "fd16", 16 },
312 { "fd18", 18 },
313 { "fd2", 2 },
314 { "fd20", 20 },
315 { "fd22", 22 },
316 { "fd24", 24 },
317 { "fd26", 26 },
318 { "fd28", 28 },
319 { "fd30", 30 },
320 { "fd4", 4 },
321 { "fd6", 6 },
322 { "fd8", 8 },
323};
324
325#define DOUBLE_REG_NAME_CNT \
326 (sizeof (double_registers) / sizeof (struct reg_name))
327
328
252b5132
RH
329/* reg_name_search does a binary search of the given register table
330 to see if "name" is a valid regiter name. Returns the register
87271fa6 331 number from the array on success, or -1 on failure. */
252b5132
RH
332
333static int
334reg_name_search (regs, regcount, name)
335 const struct reg_name *regs;
336 int regcount;
337 const char *name;
338{
339 int middle, low, high;
340 int cmp;
341
342 low = 0;
343 high = regcount - 1;
344
345 do
346 {
347 middle = (low + high) / 2;
348 cmp = strcasecmp (name, regs[middle].name);
349 if (cmp < 0)
350 high = middle - 1;
351 else if (cmp > 0)
352 low = middle + 1;
87271fa6
NC
353 else
354 return regs[middle].value;
252b5132
RH
355 }
356 while (low <= high);
357 return -1;
358}
359
85cb2cf9
JL
360/* Summary of register_name().
361 *
362 * in: Input_line_pointer points to 1st char of operand.
363 *
b6ff326e 364 * out: An expressionS.
85cb2cf9
JL
365 * The operand may have been a register: in this case, X_op == O_register,
366 * X_add_number is set to the register number, and truth is returned.
367 * Input_line_pointer->(next non-blank) char after operand, or is in
368 * its original state.
369 */
87271fa6 370
b34976b6 371static bfd_boolean
85cb2cf9
JL
372r_register_name (expressionP)
373 expressionS *expressionP;
374{
375 int reg_number;
376 char *name;
377 char *start;
378 char c;
379
87271fa6 380 /* Find the spelling of the operand. */
85cb2cf9
JL
381 start = name = input_line_pointer;
382
383 c = get_symbol_end ();
384 reg_number = reg_name_search (r_registers, R_REG_NAME_CNT, name);
385
468cced8
AM
386 /* Put back the delimiting char. */
387 *input_line_pointer = c;
388
87271fa6
NC
389 /* Look to see if it's in the register table. */
390 if (reg_number >= 0)
85cb2cf9
JL
391 {
392 expressionP->X_op = O_register;
393 expressionP->X_add_number = reg_number;
394
87271fa6 395 /* Make the rest nice. */
85cb2cf9
JL
396 expressionP->X_add_symbol = NULL;
397 expressionP->X_op_symbol = NULL;
87271fa6 398
b34976b6 399 return TRUE;
85cb2cf9 400 }
87271fa6 401
468cced8
AM
402 /* Reset the line as if we had not done anything. */
403 input_line_pointer = start;
b34976b6 404 return FALSE;
85cb2cf9
JL
405}
406
407/* Summary of register_name().
408 *
409 * in: Input_line_pointer points to 1st char of operand.
410 *
b6ff326e 411 * out: An expressionS.
85cb2cf9
JL
412 * The operand may have been a register: in this case, X_op == O_register,
413 * X_add_number is set to the register number, and truth is returned.
414 * Input_line_pointer->(next non-blank) char after operand, or is in
415 * its original state.
416 */
87271fa6 417
b34976b6 418static bfd_boolean
85cb2cf9
JL
419xr_register_name (expressionP)
420 expressionS *expressionP;
421{
422 int reg_number;
423 char *name;
424 char *start;
425 char c;
426
87271fa6 427 /* Find the spelling of the operand. */
85cb2cf9
JL
428 start = name = input_line_pointer;
429
430 c = get_symbol_end ();
431 reg_number = reg_name_search (xr_registers, XR_REG_NAME_CNT, name);
432
468cced8
AM
433 /* Put back the delimiting char. */
434 *input_line_pointer = c;
435
87271fa6
NC
436 /* Look to see if it's in the register table. */
437 if (reg_number >= 0)
85cb2cf9
JL
438 {
439 expressionP->X_op = O_register;
440 expressionP->X_add_number = reg_number;
441
87271fa6 442 /* Make the rest nice. */
85cb2cf9
JL
443 expressionP->X_add_symbol = NULL;
444 expressionP->X_op_symbol = NULL;
87271fa6 445
b34976b6 446 return TRUE;
85cb2cf9 447 }
87271fa6 448
468cced8
AM
449 /* Reset the line as if we had not done anything. */
450 input_line_pointer = start;
b34976b6 451 return FALSE;
85cb2cf9 452}
252b5132
RH
453
454/* Summary of register_name().
455 *
456 * in: Input_line_pointer points to 1st char of operand.
457 *
b6ff326e 458 * out: An expressionS.
252b5132
RH
459 * The operand may have been a register: in this case, X_op == O_register,
460 * X_add_number is set to the register number, and truth is returned.
461 * Input_line_pointer->(next non-blank) char after operand, or is in
462 * its original state.
463 */
87271fa6 464
b34976b6 465static bfd_boolean
252b5132
RH
466data_register_name (expressionP)
467 expressionS *expressionP;
468{
469 int reg_number;
470 char *name;
471 char *start;
472 char c;
473
87271fa6 474 /* Find the spelling of the operand. */
252b5132
RH
475 start = name = input_line_pointer;
476
477 c = get_symbol_end ();
478 reg_number = reg_name_search (data_registers, DATA_REG_NAME_CNT, name);
479
468cced8
AM
480 /* Put back the delimiting char. */
481 *input_line_pointer = c;
482
87271fa6
NC
483 /* Look to see if it's in the register table. */
484 if (reg_number >= 0)
252b5132
RH
485 {
486 expressionP->X_op = O_register;
487 expressionP->X_add_number = reg_number;
488
87271fa6 489 /* Make the rest nice. */
252b5132
RH
490 expressionP->X_add_symbol = NULL;
491 expressionP->X_op_symbol = NULL;
87271fa6 492
b34976b6 493 return TRUE;
252b5132 494 }
87271fa6 495
468cced8
AM
496 /* Reset the line as if we had not done anything. */
497 input_line_pointer = start;
b34976b6 498 return FALSE;
252b5132
RH
499}
500
501/* Summary of register_name().
502 *
503 * in: Input_line_pointer points to 1st char of operand.
504 *
b6ff326e 505 * out: An expressionS.
252b5132
RH
506 * The operand may have been a register: in this case, X_op == O_register,
507 * X_add_number is set to the register number, and truth is returned.
508 * Input_line_pointer->(next non-blank) char after operand, or is in
509 * its original state.
510 */
87271fa6 511
b34976b6 512static bfd_boolean
252b5132
RH
513address_register_name (expressionP)
514 expressionS *expressionP;
515{
516 int reg_number;
517 char *name;
518 char *start;
519 char c;
520
87271fa6 521 /* Find the spelling of the operand. */
252b5132
RH
522 start = name = input_line_pointer;
523
524 c = get_symbol_end ();
525 reg_number = reg_name_search (address_registers, ADDRESS_REG_NAME_CNT, name);
526
468cced8
AM
527 /* Put back the delimiting char. */
528 *input_line_pointer = c;
529
87271fa6
NC
530 /* Look to see if it's in the register table. */
531 if (reg_number >= 0)
252b5132
RH
532 {
533 expressionP->X_op = O_register;
534 expressionP->X_add_number = reg_number;
535
87271fa6 536 /* Make the rest nice. */
252b5132
RH
537 expressionP->X_add_symbol = NULL;
538 expressionP->X_op_symbol = NULL;
87271fa6 539
b34976b6 540 return TRUE;
252b5132 541 }
87271fa6 542
468cced8
AM
543 /* Reset the line as if we had not done anything. */
544 input_line_pointer = start;
b34976b6 545 return FALSE;
252b5132
RH
546}
547
548/* Summary of register_name().
549 *
550 * in: Input_line_pointer points to 1st char of operand.
551 *
b6ff326e 552 * out: An expressionS.
252b5132
RH
553 * The operand may have been a register: in this case, X_op == O_register,
554 * X_add_number is set to the register number, and truth is returned.
555 * Input_line_pointer->(next non-blank) char after operand, or is in
556 * its original state.
557 */
87271fa6 558
b34976b6 559static bfd_boolean
252b5132
RH
560other_register_name (expressionP)
561 expressionS *expressionP;
562{
563 int reg_number;
564 char *name;
565 char *start;
566 char c;
567
87271fa6 568 /* Find the spelling of the operand. */
252b5132
RH
569 start = name = input_line_pointer;
570
571 c = get_symbol_end ();
572 reg_number = reg_name_search (other_registers, OTHER_REG_NAME_CNT, name);
573
468cced8
AM
574 /* Put back the delimiting char. */
575 *input_line_pointer = c;
576
87271fa6 577 /* Look to see if it's in the register table. */
913572ec
AO
578 if (reg_number == 0
579 || (reg_number == AM33 && HAVE_AM33))
252b5132
RH
580 {
581 expressionP->X_op = O_register;
913572ec 582 expressionP->X_add_number = 0;
252b5132 583
87271fa6 584 /* Make the rest nice. */
252b5132
RH
585 expressionP->X_add_symbol = NULL;
586 expressionP->X_op_symbol = NULL;
87271fa6 587
b34976b6 588 return TRUE;
252b5132 589 }
87271fa6 590
468cced8
AM
591 /* Reset the line as if we had not done anything. */
592 input_line_pointer = start;
b34976b6 593 return FALSE;
252b5132
RH
594}
595
e7b71525
AO
596static bfd_boolean double_register_name PARAMS ((expressionS *));
597static bfd_boolean float_register_name PARAMS ((expressionS *));
598
599/* Summary of float_register_name:
600
601 in: Input_line_pointer points to 1st char of operand.
602
603 out: A expressionS.
604 The operand may have been a register: in this case, X_op == O_register,
605 X_add_number is set to the register number, and truth is returned.
606 Input_line_pointer->(next non-blank) char after operand, or is in
607 its original state. */
608
609static bfd_boolean
610float_register_name (expressionP)
611 expressionS *expressionP;
612{
613 int reg_number;
614 char *name;
615 char *start;
616 char c;
617
618 /* Find the spelling of the operand. */
619 start = name = input_line_pointer;
620
621 c = get_symbol_end ();
622 reg_number = reg_name_search (float_registers, FLOAT_REG_NAME_CNT, name);
623
624 /* Put back the delimiting char. */
625 * input_line_pointer = c;
626
627 /* Look to see if it's in the register table. */
628 if (reg_number >= 0)
629 {
630 expressionP->X_op = O_register;
631 expressionP->X_add_number = reg_number;
632
633 /* Make the rest nice. */
634 expressionP->X_add_symbol = NULL;
635 expressionP->X_op_symbol = NULL;
636
637 return TRUE;
638 }
639
640 /* Reset the line as if we had not done anything. */
641 input_line_pointer = start;
642 return FALSE;
643}
644
645/* Summary of double_register_name:
646
647 in: Input_line_pointer points to 1st char of operand.
648
649 out: A expressionS.
650 The operand may have been a register: in this case, X_op == O_register,
651 X_add_number is set to the register number, and truth is returned.
652 Input_line_pointer->(next non-blank) char after operand, or is in
653 its original state. */
654
655static bfd_boolean
656double_register_name (expressionP)
657 expressionS *expressionP;
658{
659 int reg_number;
660 char *name;
661 char *start;
662 char c;
663
664 /* Find the spelling of the operand. */
665 start = name = input_line_pointer;
666
667 c = get_symbol_end ();
668 reg_number = reg_name_search (double_registers, DOUBLE_REG_NAME_CNT, name);
669
670 /* Put back the delimiting char. */
671 * input_line_pointer = c;
672
673 /* Look to see if it's in the register table. */
674 if (reg_number >= 0)
675 {
676 expressionP->X_op = O_register;
677 expressionP->X_add_number = reg_number;
678
679 /* Make the rest nice. */
680 expressionP->X_add_symbol = NULL;
681 expressionP->X_op_symbol = NULL;
682
683 return TRUE;
684 }
685
686 /* Reset the line as if we had not done anything. */
687 input_line_pointer = start;
688 return FALSE;
689}
690
252b5132
RH
691void
692md_show_usage (stream)
87271fa6 693 FILE *stream;
252b5132 694{
87271fa6 695 fprintf (stream, _("MN10300 options:\n\
252b5132 696none yet\n"));
87271fa6 697}
252b5132
RH
698
699int
700md_parse_option (c, arg)
b4c1ea07
EC
701 int c ATTRIBUTE_UNUSED;
702 char *arg ATTRIBUTE_UNUSED;
252b5132
RH
703{
704 return 0;
705}
706
707symbolS *
708md_undefined_symbol (name)
b4c1ea07 709 char *name ATTRIBUTE_UNUSED;
252b5132
RH
710{
711 return 0;
712}
713
714char *
715md_atof (type, litp, sizep)
87271fa6
NC
716 int type;
717 char *litp;
718 int *sizep;
252b5132
RH
719{
720 int prec;
721 LITTLENUM_TYPE words[4];
722 char *t;
723 int i;
724
725 switch (type)
726 {
727 case 'f':
728 prec = 2;
729 break;
730
731 case 'd':
732 prec = 4;
733 break;
734
735 default:
736 *sizep = 0;
737 return "bad call to md_atof";
738 }
87271fa6 739
252b5132
RH
740 t = atof_ieee (input_line_pointer, type, words);
741 if (t)
742 input_line_pointer = t;
743
744 *sizep = prec * 2;
745
746 for (i = prec - 1; i >= 0; i--)
747 {
748 md_number_to_chars (litp, (valueT) words[i], 2);
749 litp += 2;
750 }
751
752 return NULL;
753}
754
252b5132
RH
755void
756md_convert_frag (abfd, sec, fragP)
b4c1ea07 757 bfd *abfd ATTRIBUTE_UNUSED;
87271fa6
NC
758 asection *sec;
759 fragS *fragP;
252b5132
RH
760{
761 static unsigned long label_count = 0;
762 char buf[40];
763
764 subseg_change (sec, 0);
765 if (fragP->fr_subtype == 0)
766 {
767 fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol,
768 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
769 fragP->fr_var = 0;
770 fragP->fr_fix += 2;
771 }
772 else if (fragP->fr_subtype == 1)
773 {
774 /* Reverse the condition of the first branch. */
775 int offset = fragP->fr_fix;
776 int opcode = fragP->fr_literal[offset] & 0xff;
777
778 switch (opcode)
779 {
780 case 0xc8:
781 opcode = 0xc9;
782 break;
783 case 0xc9:
784 opcode = 0xc8;
785 break;
786 case 0xc0:
787 opcode = 0xc2;
788 break;
789 case 0xc2:
790 opcode = 0xc0;
791 break;
792 case 0xc3:
793 opcode = 0xc1;
794 break;
795 case 0xc1:
796 opcode = 0xc3;
797 break;
798 case 0xc4:
799 opcode = 0xc6;
800 break;
801 case 0xc6:
802 opcode = 0xc4;
803 break;
804 case 0xc7:
805 opcode = 0xc5;
806 break;
807 case 0xc5:
808 opcode = 0xc7;
809 break;
810 default:
811 abort ();
812 }
813 fragP->fr_literal[offset] = opcode;
814
815 /* Create a fixup for the reversed conditional branch. */
0aa529cb 816 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
252b5132
RH
817 fix_new (fragP, fragP->fr_fix + 1, 1,
818 symbol_new (buf, sec, 0, fragP->fr_next),
819 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
820
821 /* Now create the unconditional branch + fixup to the
822 final target. */
823 fragP->fr_literal[offset + 2] = 0xcc;
824 fix_new (fragP, fragP->fr_fix + 3, 2, fragP->fr_symbol,
825 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
826 fragP->fr_var = 0;
827 fragP->fr_fix += 5;
828 }
829 else if (fragP->fr_subtype == 2)
830 {
831 /* Reverse the condition of the first branch. */
832 int offset = fragP->fr_fix;
833 int opcode = fragP->fr_literal[offset] & 0xff;
834
835 switch (opcode)
836 {
837 case 0xc8:
838 opcode = 0xc9;
839 break;
840 case 0xc9:
841 opcode = 0xc8;
842 break;
843 case 0xc0:
844 opcode = 0xc2;
845 break;
846 case 0xc2:
847 opcode = 0xc0;
848 break;
849 case 0xc3:
850 opcode = 0xc1;
851 break;
852 case 0xc1:
853 opcode = 0xc3;
854 break;
855 case 0xc4:
856 opcode = 0xc6;
857 break;
858 case 0xc6:
859 opcode = 0xc4;
860 break;
861 case 0xc7:
862 opcode = 0xc5;
863 break;
864 case 0xc5:
865 opcode = 0xc7;
866 break;
867 default:
868 abort ();
869 }
870 fragP->fr_literal[offset] = opcode;
871
872 /* Create a fixup for the reversed conditional branch. */
0aa529cb 873 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
252b5132
RH
874 fix_new (fragP, fragP->fr_fix + 1, 1,
875 symbol_new (buf, sec, 0, fragP->fr_next),
876 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
877
878 /* Now create the unconditional branch + fixup to the
879 final target. */
880 fragP->fr_literal[offset + 2] = 0xdc;
881 fix_new (fragP, fragP->fr_fix + 3, 4, fragP->fr_symbol,
882 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
883 fragP->fr_var = 0;
884 fragP->fr_fix += 7;
885 }
886 else if (fragP->fr_subtype == 3)
887 {
888 fix_new (fragP, fragP->fr_fix + 2, 1, fragP->fr_symbol,
889 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
890 fragP->fr_var = 0;
891 fragP->fr_fix += 3;
892 }
893 else if (fragP->fr_subtype == 4)
894 {
895 /* Reverse the condition of the first branch. */
896 int offset = fragP->fr_fix;
897 int opcode = fragP->fr_literal[offset + 1] & 0xff;
898
899 switch (opcode)
900 {
901 case 0xe8:
902 opcode = 0xe9;
903 break;
904 case 0xe9:
905 opcode = 0xe8;
906 break;
907 case 0xea:
908 opcode = 0xeb;
909 break;
910 case 0xeb:
911 opcode = 0xea;
912 break;
913 default:
914 abort ();
915 }
916 fragP->fr_literal[offset + 1] = opcode;
917
918 /* Create a fixup for the reversed conditional branch. */
0aa529cb 919 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
252b5132
RH
920 fix_new (fragP, fragP->fr_fix + 2, 1,
921 symbol_new (buf, sec, 0, fragP->fr_next),
922 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
923
924 /* Now create the unconditional branch + fixup to the
925 final target. */
926 fragP->fr_literal[offset + 3] = 0xcc;
927 fix_new (fragP, fragP->fr_fix + 4, 2, fragP->fr_symbol,
928 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
929 fragP->fr_var = 0;
930 fragP->fr_fix += 6;
931 }
932 else if (fragP->fr_subtype == 5)
933 {
934 /* Reverse the condition of the first branch. */
935 int offset = fragP->fr_fix;
936 int opcode = fragP->fr_literal[offset + 1] & 0xff;
937
938 switch (opcode)
939 {
940 case 0xe8:
941 opcode = 0xe9;
942 break;
943 case 0xea:
944 opcode = 0xeb;
945 break;
946 case 0xeb:
947 opcode = 0xea;
948 break;
949 default:
950 abort ();
951 }
952 fragP->fr_literal[offset + 1] = opcode;
953
954 /* Create a fixup for the reversed conditional branch. */
0aa529cb 955 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
252b5132
RH
956 fix_new (fragP, fragP->fr_fix + 2, 1,
957 symbol_new (buf, sec, 0, fragP->fr_next),
958 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
959
960 /* Now create the unconditional branch + fixup to the
961 final target. */
962 fragP->fr_literal[offset + 3] = 0xdc;
963 fix_new (fragP, fragP->fr_fix + 4, 4, fragP->fr_symbol,
964 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
965 fragP->fr_var = 0;
966 fragP->fr_fix += 8;
967 }
968 else if (fragP->fr_subtype == 6)
969 {
970 int offset = fragP->fr_fix;
971 fragP->fr_literal[offset] = 0xcd;
972 fix_new (fragP, fragP->fr_fix + 1, 2, fragP->fr_symbol,
973 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
974 fragP->fr_var = 0;
975 fragP->fr_fix += 5;
976 }
977 else if (fragP->fr_subtype == 7)
978 {
979 int offset = fragP->fr_fix;
980 fragP->fr_literal[offset] = 0xdd;
981 fragP->fr_literal[offset + 5] = fragP->fr_literal[offset + 3];
982 fragP->fr_literal[offset + 6] = fragP->fr_literal[offset + 4];
983
984 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
985 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
986 fragP->fr_var = 0;
987 fragP->fr_fix += 7;
988 }
989 else if (fragP->fr_subtype == 8)
990 {
991 int offset = fragP->fr_fix;
992 fragP->fr_literal[offset] = 0xfa;
993 fragP->fr_literal[offset + 1] = 0xff;
994 fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol,
995 fragP->fr_offset + 2, 1, BFD_RELOC_16_PCREL);
996 fragP->fr_var = 0;
997 fragP->fr_fix += 4;
998 }
999 else if (fragP->fr_subtype == 9)
1000 {
1001 int offset = fragP->fr_fix;
1002 fragP->fr_literal[offset] = 0xfc;
1003 fragP->fr_literal[offset + 1] = 0xff;
1004
1005 fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol,
1006 fragP->fr_offset + 2, 1, BFD_RELOC_32_PCREL);
1007 fragP->fr_var = 0;
1008 fragP->fr_fix += 6;
1009 }
1010 else if (fragP->fr_subtype == 10)
1011 {
1012 fragP->fr_literal[fragP->fr_fix] = 0xca;
1013 fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol,
1014 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
1015 fragP->fr_var = 0;
1016 fragP->fr_fix += 2;
1017 }
1018 else if (fragP->fr_subtype == 11)
1019 {
1020 int offset = fragP->fr_fix;
1021 fragP->fr_literal[offset] = 0xcc;
1022
1023 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
1024 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
1025 fragP->fr_var = 0;
1026 fragP->fr_fix += 3;
1027 }
1028 else if (fragP->fr_subtype == 12)
1029 {
1030 int offset = fragP->fr_fix;
1031 fragP->fr_literal[offset] = 0xdc;
1032
1033 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
1034 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
1035 fragP->fr_var = 0;
1036 fragP->fr_fix += 5;
1037 }
e7b71525
AO
1038 else if (fragP->fr_subtype == 13)
1039 {
1040 fix_new (fragP, fragP->fr_fix + 2, 1, fragP->fr_symbol,
1041 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
1042 fragP->fr_var = 0;
1043 fragP->fr_fix += 3;
1044 }
1045 else if (fragP->fr_subtype == 14)
1046 {
1047 /* Reverse the condition of the first branch. */
1048 int offset = fragP->fr_fix;
1049 int opcode = fragP->fr_literal[offset + 1] & 0xff;
1050
1051 switch (opcode)
1052 {
1053 case 0xd0:
1054 opcode = 0xd1;
1055 break;
1056 case 0xd1:
1057 opcode = 0xd0;
1058 break;
1059 case 0xd2:
1060 opcode = 0xdc;
1061 break;
1062 case 0xd3:
1063 opcode = 0xdb;
1064 break;
1065 case 0xd4:
1066 opcode = 0xda;
1067 break;
1068 case 0xd5:
1069 opcode = 0xd9;
1070 break;
1071 case 0xd6:
1072 opcode = 0xd8;
1073 break;
1074 case 0xd7:
1075 opcode = 0xdd;
1076 break;
1077 case 0xd8:
1078 opcode = 0xd6;
1079 break;
1080 case 0xd9:
1081 opcode = 0xd5;
1082 break;
1083 case 0xda:
1084 opcode = 0xd4;
1085 break;
1086 case 0xdb:
1087 opcode = 0xd3;
1088 break;
1089 case 0xdc:
1090 opcode = 0xd2;
1091 break;
1092 case 0xdd:
1093 opcode = 0xd7;
1094 break;
1095 default:
1096 abort ();
1097 }
1098 fragP->fr_literal[offset + 1] = opcode;
1099
1100 /* Create a fixup for the reversed conditional branch. */
1101 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
1102 fix_new (fragP, fragP->fr_fix + 2, 1,
1103 symbol_new (buf, sec, 0, fragP->fr_next),
1104 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
1105
1106 /* Now create the unconditional branch + fixup to the
1107 final target. */
1108 fragP->fr_literal[offset + 3] = 0xcc;
1109 fix_new (fragP, fragP->fr_fix + 4, 2, fragP->fr_symbol,
1110 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
1111 fragP->fr_var = 0;
1112 fragP->fr_fix += 6;
1113 }
1114 else if (fragP->fr_subtype == 15)
1115 {
1116 /* Reverse the condition of the first branch. */
1117 int offset = fragP->fr_fix;
1118 int opcode = fragP->fr_literal[offset + 1] & 0xff;
1119
1120 switch (opcode)
1121 {
1122 case 0xd0:
1123 opcode = 0xd1;
1124 break;
1125 case 0xd1:
1126 opcode = 0xd0;
1127 break;
1128 case 0xd2:
1129 opcode = 0xdc;
1130 break;
1131 case 0xd3:
1132 opcode = 0xdb;
1133 break;
1134 case 0xd4:
1135 opcode = 0xda;
1136 break;
1137 case 0xd5:
1138 opcode = 0xd9;
1139 break;
1140 case 0xd6:
1141 opcode = 0xd8;
1142 break;
1143 case 0xd7:
1144 opcode = 0xdd;
1145 break;
1146 case 0xd8:
1147 opcode = 0xd6;
1148 break;
1149 case 0xd9:
1150 opcode = 0xd5;
1151 break;
1152 case 0xda:
1153 opcode = 0xd4;
1154 break;
1155 case 0xdb:
1156 opcode = 0xd3;
1157 break;
1158 case 0xdc:
1159 opcode = 0xd2;
1160 break;
1161 case 0xdd:
1162 opcode = 0xd7;
1163 break;
1164 default:
1165 abort ();
1166 }
1167 fragP->fr_literal[offset + 1] = opcode;
1168
1169 /* Create a fixup for the reversed conditional branch. */
1170 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
1171 fix_new (fragP, fragP->fr_fix + 2, 1,
1172 symbol_new (buf, sec, 0, fragP->fr_next),
1173 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
1174
1175 /* Now create the unconditional branch + fixup to the
1176 final target. */
1177 fragP->fr_literal[offset + 3] = 0xdc;
1178 fix_new (fragP, fragP->fr_fix + 4, 4, fragP->fr_symbol,
1179 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
1180 fragP->fr_var = 0;
1181 fragP->fr_fix += 8;
1182 }
252b5132
RH
1183 else
1184 abort ();
1185}
1186
1187valueT
1188md_section_align (seg, addr)
1189 asection *seg;
1190 valueT addr;
1191{
1192 int align = bfd_get_section_alignment (stdoutput, seg);
1193 return ((addr + (1 << align) - 1) & (-1 << align));
1194}
1195
1196void
1197md_begin ()
1198{
1199 char *prev_name = "";
1200 register const struct mn10300_opcode *op;
1201
87271fa6 1202 mn10300_hash = hash_new ();
252b5132
RH
1203
1204 /* Insert unique names into hash table. The MN10300 instruction set
1205 has many identical opcode names that have different opcodes based
1206 on the operands. This hash table then provides a quick index to
1207 the first opcode with a particular name in the opcode table. */
1208
1209 op = mn10300_opcodes;
1210 while (op->name)
1211 {
87271fa6 1212 if (strcmp (prev_name, op->name))
252b5132
RH
1213 {
1214 prev_name = (char *) op->name;
1215 hash_insert (mn10300_hash, op->name, (char *) op);
1216 }
1217 op++;
1218 }
1219
252b5132 1220 /* Set the default machine type. */
2ce28d43
AO
1221#ifdef TE_LINUX
1222 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, AM33_2))
1223 as_warn (_("could not set architecture and machine"));
1224
1225 current_machine = AM33_2;
1226#else
0a727238 1227 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, MN103))
252b5132
RH
1228 as_warn (_("could not set architecture and machine"));
1229
0a727238 1230 current_machine = MN103;
2ce28d43 1231#endif
252b5132
RH
1232}
1233
bf6f0d0c
AO
1234static symbolS *GOT_symbol;
1235
1236static inline int mn10300_check_fixup PARAMS ((struct mn10300_fixup *));
1237static inline int mn10300_PIC_related_p PARAMS ((symbolS *));
1238
1239static inline int
1240mn10300_PIC_related_p (sym)
1241 symbolS *sym;
1242{
1243 expressionS *exp;
1244
1245 if (! sym)
1246 return 0;
1247
1248 if (sym == GOT_symbol)
1249 return 1;
1250
1251 exp = symbol_get_value_expression (sym);
1252
1253 return (exp->X_op == O_PIC_reloc
1254 || mn10300_PIC_related_p (exp->X_add_symbol)
1255 || mn10300_PIC_related_p (exp->X_op_symbol));
1256}
1257
1258static inline int
1259mn10300_check_fixup (fixup)
1260 struct mn10300_fixup *fixup;
1261{
1262 expressionS *exp = &fixup->exp;
1263
1264 repeat:
1265 switch (exp->X_op)
1266 {
1267 case O_add:
1268 case O_subtract: /* If we're sufficiently unlucky that the label
1269 and the expression that references it happen
1270 to end up in different frags, the subtract
1271 won't be simplified within expression(). */
1272 /* The PIC-related operand must be the first operand of a sum. */
1273 if (exp != &fixup->exp || mn10300_PIC_related_p (exp->X_op_symbol))
1274 return 1;
1275
1276 if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol)
1277 fixup->reloc = BFD_RELOC_32_GOT_PCREL;
1278
1279 exp = symbol_get_value_expression (exp->X_add_symbol);
1280 goto repeat;
1281
1282 case O_symbol:
1283 if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol)
1284 fixup->reloc = BFD_RELOC_32_GOT_PCREL;
1285 break;
1286
1287 case O_PIC_reloc:
1288 fixup->reloc = exp->X_md;
1289 exp->X_op = O_symbol;
1290 if (fixup->reloc == BFD_RELOC_32_PLT_PCREL
1291 && fixup->opindex >= 0
1292 && (mn10300_operands[fixup->opindex].flags
1293 & MN10300_OPERAND_RELAX))
1294 return 1;
1295 break;
1296
1297 default:
1298 return (mn10300_PIC_related_p (exp->X_add_symbol)
1299 || mn10300_PIC_related_p (exp->X_op_symbol));
1300 }
1301
1302 return 0;
1303}
1304
1305void
1306mn10300_cons_fix_new (frag, off, size, exp)
1307 fragS *frag;
1308 int off, size;
1309 expressionS *exp;
1310{
1311 struct mn10300_fixup fixup;
1312
1313 fixup.opindex = -1;
1314 fixup.exp = *exp;
1315 fixup.reloc = BFD_RELOC_UNUSED;
1316
1317 mn10300_check_fixup (&fixup);
1318
1319 if (fixup.reloc == BFD_RELOC_MN10300_GOT32)
1320 switch (size)
1321 {
1322 case 2:
1323 fixup.reloc = BFD_RELOC_MN10300_GOT16;
1324 break;
1325
1326 case 3:
1327 fixup.reloc = BFD_RELOC_MN10300_GOT24;
1328 break;
1329
1330 case 4:
1331 break;
1332
1333 default:
1334 goto error;
1335 }
1336 else if (fixup.reloc == BFD_RELOC_UNUSED)
1337 switch (size)
1338 {
1339 case 1:
1340 fixup.reloc = BFD_RELOC_8;
1341 break;
1342
1343 case 2:
1344 fixup.reloc = BFD_RELOC_16;
1345 break;
1346
1347 case 3:
1348 fixup.reloc = BFD_RELOC_24;
1349 break;
1350
1351 case 4:
1352 fixup.reloc = BFD_RELOC_32;
1353 break;
1354
1355 default:
1356 goto error;
1357 }
1358 else if (size != 4)
1359 {
1360 error:
1361 as_bad (_("unsupported BFD relocation size %u"), size);
1362 fixup.reloc = BFD_RELOC_UNUSED;
1363 }
1364
1365 fix_new_exp (frag, off, size, &fixup.exp, 0, fixup.reloc);
1366}
1367
252b5132 1368void
87271fa6 1369md_assemble (str)
252b5132
RH
1370 char *str;
1371{
1372 char *s;
1373 struct mn10300_opcode *opcode;
1374 struct mn10300_opcode *next_opcode;
1375 const unsigned char *opindex_ptr;
1376 int next_opindex, relaxable;
eb0dfd58 1377 unsigned long insn, extension, size = 0;
252b5132
RH
1378 char *f;
1379 int i;
1380 int match;
1381
1382 /* Get the opcode. */
3882b010 1383 for (s = str; *s != '\0' && !ISSPACE (*s); s++)
252b5132
RH
1384 ;
1385 if (*s != '\0')
1386 *s++ = '\0';
1387
87271fa6
NC
1388 /* Find the first opcode with the proper name. */
1389 opcode = (struct mn10300_opcode *) hash_find (mn10300_hash, str);
252b5132
RH
1390 if (opcode == NULL)
1391 {
1392 as_bad (_("Unrecognized opcode: `%s'"), str);
1393 return;
1394 }
1395
1396 str = s;
3882b010 1397 while (ISSPACE (*str))
252b5132
RH
1398 ++str;
1399
1400 input_line_pointer = str;
1401
87271fa6 1402 for (;;)
252b5132
RH
1403 {
1404 const char *errmsg;
1405 int op_idx;
1406 char *hold;
1407 int extra_shift = 0;
1408
252b5132
RH
1409 errmsg = _("Invalid opcode/operands");
1410
1411 /* Reset the array of register operands. */
1412 memset (mn10300_reg_operands, -1, sizeof (mn10300_reg_operands));
1413
1414 relaxable = 0;
1415 fc = 0;
1416 match = 0;
1417 next_opindex = 0;
1418 insn = opcode->opcode;
1419 extension = 0;
1420
1421 /* If the instruction is not available on the current machine
1422 then it can not possibly match. */
1423 if (opcode->machine
e7b71525 1424 && !(opcode->machine == AM33_2 && HAVE_AM33_2)
aa15f6f7
AO
1425 && !(opcode->machine == AM33 && HAVE_AM33)
1426 && !(opcode->machine == AM30 && HAVE_AM30))
252b5132
RH
1427 goto error;
1428
1429 for (op_idx = 1, opindex_ptr = opcode->operands;
1430 *opindex_ptr != 0;
1431 opindex_ptr++, op_idx++)
1432 {
1433 const struct mn10300_operand *operand;
1434 expressionS ex;
1435
1436 if (next_opindex == 0)
1437 {
1438 operand = &mn10300_operands[*opindex_ptr];
1439 }
1440 else
1441 {
1442 operand = &mn10300_operands[next_opindex];
1443 next_opindex = 0;
1444 }
1445
1446 while (*str == ' ' || *str == ',')
1447 ++str;
1448
1449 if (operand->flags & MN10300_OPERAND_RELAX)
1450 relaxable = 1;
1451
87271fa6 1452 /* Gather the operand. */
252b5132
RH
1453 hold = input_line_pointer;
1454 input_line_pointer = str;
1455
1456 if (operand->flags & MN10300_OPERAND_PAREN)
1457 {
1458 if (*input_line_pointer != ')' && *input_line_pointer != '(')
1459 {
1460 input_line_pointer = hold;
1461 str = hold;
1462 goto error;
1463 }
1464 input_line_pointer++;
1465 goto keep_going;
1466 }
1467 /* See if we can match the operands. */
1468 else if (operand->flags & MN10300_OPERAND_DREG)
1469 {
1470 if (!data_register_name (&ex))
1471 {
1472 input_line_pointer = hold;
1473 str = hold;
1474 goto error;
1475 }
1476 }
1477 else if (operand->flags & MN10300_OPERAND_AREG)
1478 {
1479 if (!address_register_name (&ex))
1480 {
1481 input_line_pointer = hold;
1482 str = hold;
1483 goto error;
1484 }
1485 }
1486 else if (operand->flags & MN10300_OPERAND_SP)
1487 {
1488 char *start = input_line_pointer;
1489 char c = get_symbol_end ();
1490
1491 if (strcasecmp (start, "sp") != 0)
1492 {
1493 *input_line_pointer = c;
1494 input_line_pointer = hold;
1495 str = hold;
1496 goto error;
1497 }
1498 *input_line_pointer = c;
1499 goto keep_going;
1500 }
85cb2cf9
JL
1501 else if (operand->flags & MN10300_OPERAND_RREG)
1502 {
1503 if (!r_register_name (&ex))
1504 {
1505 input_line_pointer = hold;
1506 str = hold;
1507 goto error;
1508 }
1509 }
1510 else if (operand->flags & MN10300_OPERAND_XRREG)
1511 {
1512 if (!xr_register_name (&ex))
1513 {
1514 input_line_pointer = hold;
1515 str = hold;
1516 goto error;
1517 }
1518 }
e7b71525
AO
1519 else if (operand->flags & MN10300_OPERAND_FSREG)
1520 {
1521 if (!float_register_name (&ex))
1522 {
1523 input_line_pointer = hold;
1524 str = hold;
1525 goto error;
1526 }
1527 }
1528 else if (operand->flags & MN10300_OPERAND_FDREG)
1529 {
1530 if (!double_register_name (&ex))
1531 {
1532 input_line_pointer = hold;
1533 str = hold;
1534 goto error;
1535 }
1536 }
1537 else if (operand->flags & MN10300_OPERAND_FPCR)
1538 {
1539 char *start = input_line_pointer;
1540 char c = get_symbol_end ();
1541
1542 if (strcasecmp (start, "fpcr") != 0)
1543 {
1544 *input_line_pointer = c;
1545 input_line_pointer = hold;
1546 str = hold;
1547 goto error;
1548 }
1549 *input_line_pointer = c;
1550 goto keep_going;
1551 }
85cb2cf9
JL
1552 else if (operand->flags & MN10300_OPERAND_USP)
1553 {
1554 char *start = input_line_pointer;
1555 char c = get_symbol_end ();
1556
1557 if (strcasecmp (start, "usp") != 0)
1558 {
1559 *input_line_pointer = c;
1560 input_line_pointer = hold;
1561 str = hold;
1562 goto error;
1563 }
1564 *input_line_pointer = c;
1565 goto keep_going;
1566 }
1567 else if (operand->flags & MN10300_OPERAND_SSP)
1568 {
1569 char *start = input_line_pointer;
1570 char c = get_symbol_end ();
1571
1572 if (strcasecmp (start, "ssp") != 0)
1573 {
1574 *input_line_pointer = c;
1575 input_line_pointer = hold;
1576 str = hold;
1577 goto error;
1578 }
1579 *input_line_pointer = c;
1580 goto keep_going;
1581 }
1582 else if (operand->flags & MN10300_OPERAND_MSP)
1583 {
1584 char *start = input_line_pointer;
1585 char c = get_symbol_end ();
1586
1587 if (strcasecmp (start, "msp") != 0)
1588 {
1589 *input_line_pointer = c;
1590 input_line_pointer = hold;
1591 str = hold;
1592 goto error;
1593 }
1594 *input_line_pointer = c;
1595 goto keep_going;
1596 }
1597 else if (operand->flags & MN10300_OPERAND_PC)
1598 {
1599 char *start = input_line_pointer;
1600 char c = get_symbol_end ();
1601
1602 if (strcasecmp (start, "pc") != 0)
1603 {
1604 *input_line_pointer = c;
1605 input_line_pointer = hold;
1606 str = hold;
1607 goto error;
1608 }
1609 *input_line_pointer = c;
1610 goto keep_going;
1611 }
1612 else if (operand->flags & MN10300_OPERAND_EPSW)
1613 {
1614 char *start = input_line_pointer;
1615 char c = get_symbol_end ();
1616
1617 if (strcasecmp (start, "epsw") != 0)
1618 {
1619 *input_line_pointer = c;
1620 input_line_pointer = hold;
1621 str = hold;
1622 goto error;
1623 }
1624 *input_line_pointer = c;
1625 goto keep_going;
1626 }
1627 else if (operand->flags & MN10300_OPERAND_PLUS)
1628 {
1629 if (*input_line_pointer != '+')
1630 {
1631 input_line_pointer = hold;
1632 str = hold;
1633 goto error;
1634 }
1635 input_line_pointer++;
1636 goto keep_going;
1637 }
252b5132
RH
1638 else if (operand->flags & MN10300_OPERAND_PSW)
1639 {
1640 char *start = input_line_pointer;
1641 char c = get_symbol_end ();
1642
1643 if (strcasecmp (start, "psw") != 0)
1644 {
1645 *input_line_pointer = c;
1646 input_line_pointer = hold;
1647 str = hold;
1648 goto error;
1649 }
1650 *input_line_pointer = c;
1651 goto keep_going;
1652 }
1653 else if (operand->flags & MN10300_OPERAND_MDR)
1654 {
1655 char *start = input_line_pointer;
1656 char c = get_symbol_end ();
1657
1658 if (strcasecmp (start, "mdr") != 0)
1659 {
1660 *input_line_pointer = c;
1661 input_line_pointer = hold;
1662 str = hold;
1663 goto error;
1664 }
1665 *input_line_pointer = c;
1666 goto keep_going;
1667 }
1668 else if (operand->flags & MN10300_OPERAND_REG_LIST)
1669 {
1670 unsigned int value = 0;
1671 if (*input_line_pointer != '[')
1672 {
1673 input_line_pointer = hold;
1674 str = hold;
1675 goto error;
1676 }
1677
1678 /* Eat the '['. */
1679 input_line_pointer++;
87271fa6 1680
252b5132 1681 /* We used to reject a null register list here; however,
87271fa6
NC
1682 we accept it now so the compiler can emit "call"
1683 instructions for all calls to named functions.
252b5132
RH
1684
1685 The linker can then fill in the appropriate bits for the
1686 register list and stack size or change the instruction
1687 into a "calls" if using "call" is not profitable. */
1688 while (*input_line_pointer != ']')
1689 {
1690 char *start;
1691 char c;
1692
1693 if (*input_line_pointer == ',')
1694 input_line_pointer++;
1695
1696 start = input_line_pointer;
1697 c = get_symbol_end ();
1698
1699 if (strcasecmp (start, "d2") == 0)
1700 {
1701 value |= 0x80;
1702 *input_line_pointer = c;
1703 }
1704 else if (strcasecmp (start, "d3") == 0)
1705 {
1706 value |= 0x40;
1707 *input_line_pointer = c;
1708 }
1709 else if (strcasecmp (start, "a2") == 0)
1710 {
1711 value |= 0x20;
1712 *input_line_pointer = c;
1713 }
1714 else if (strcasecmp (start, "a3") == 0)
1715 {
1716 value |= 0x10;
1717 *input_line_pointer = c;
1718 }
1719 else if (strcasecmp (start, "other") == 0)
1720 {
1721 value |= 0x08;
1722 *input_line_pointer = c;
1723 }
0a727238 1724 else if (HAVE_AM33
85cb2cf9
JL
1725 && strcasecmp (start, "exreg0") == 0)
1726 {
1727 value |= 0x04;
1728 *input_line_pointer = c;
1729 }
0a727238 1730 else if (HAVE_AM33
85cb2cf9
JL
1731 && strcasecmp (start, "exreg1") == 0)
1732 {
1733 value |= 0x02;
1734 *input_line_pointer = c;
1735 }
0a727238 1736 else if (HAVE_AM33
85cb2cf9
JL
1737 && strcasecmp (start, "exother") == 0)
1738 {
1739 value |= 0x01;
1740 *input_line_pointer = c;
1741 }
0a727238 1742 else if (HAVE_AM33
85cb2cf9
JL
1743 && strcasecmp (start, "all") == 0)
1744 {
1745 value |= 0xff;
1746 *input_line_pointer = c;
1747 }
252b5132
RH
1748 else
1749 {
1750 input_line_pointer = hold;
1751 str = hold;
1752 goto error;
1753 }
1754 }
1755 input_line_pointer++;
1756 mn10300_insert_operand (&insn, &extension, operand,
1757 value, (char *) NULL, 0, 0);
1758 goto keep_going;
1759
1760 }
1761 else if (data_register_name (&ex))
1762 {
1763 input_line_pointer = hold;
1764 str = hold;
1765 goto error;
1766 }
1767 else if (address_register_name (&ex))
1768 {
1769 input_line_pointer = hold;
1770 str = hold;
1771 goto error;
1772 }
1773 else if (other_register_name (&ex))
1774 {
1775 input_line_pointer = hold;
1776 str = hold;
1777 goto error;
1778 }
0a727238 1779 else if (HAVE_AM33 && r_register_name (&ex))
85cb2cf9
JL
1780 {
1781 input_line_pointer = hold;
1782 str = hold;
1783 goto error;
1784 }
0a727238 1785 else if (HAVE_AM33 && xr_register_name (&ex))
85cb2cf9
JL
1786 {
1787 input_line_pointer = hold;
1788 str = hold;
1789 goto error;
1790 }
e7b71525
AO
1791 else if (HAVE_AM33_2 && float_register_name (&ex))
1792 {
1793 input_line_pointer = hold;
1794 str = hold;
1795 goto error;
1796 }
1797 else if (HAVE_AM33_2 && double_register_name (&ex))
1798 {
1799 input_line_pointer = hold;
1800 str = hold;
1801 goto error;
1802 }
252b5132
RH
1803 else if (*str == ')' || *str == '(')
1804 {
1805 input_line_pointer = hold;
1806 str = hold;
1807 goto error;
1808 }
1809 else
1810 {
1811 expression (&ex);
1812 }
1813
87271fa6 1814 switch (ex.X_op)
252b5132
RH
1815 {
1816 case O_illegal:
1817 errmsg = _("illegal operand");
1818 goto error;
1819 case O_absent:
1820 errmsg = _("missing operand");
1821 goto error;
1822 case O_register:
1823 {
1824 int mask;
1825
1826 mask = MN10300_OPERAND_DREG | MN10300_OPERAND_AREG;
0a727238
AO
1827 if (HAVE_AM33)
1828 mask |= MN10300_OPERAND_RREG | MN10300_OPERAND_XRREG;
e7b71525
AO
1829 if (HAVE_AM33_2)
1830 mask |= MN10300_OPERAND_FSREG | MN10300_OPERAND_FDREG;
252b5132
RH
1831 if ((operand->flags & mask) == 0)
1832 {
1833 input_line_pointer = hold;
1834 str = hold;
1835 goto error;
1836 }
87271fa6 1837
252b5132
RH
1838 if (opcode->format == FMT_D1 || opcode->format == FMT_S1)
1839 extra_shift = 8;
1840 else if (opcode->format == FMT_D2
1841 || opcode->format == FMT_D4
1842 || opcode->format == FMT_S2
1843 || opcode->format == FMT_S4
1844 || opcode->format == FMT_S6
1845 || opcode->format == FMT_D5)
1846 extra_shift = 16;
85cb2cf9
JL
1847 else if (opcode->format == FMT_D7)
1848 extra_shift = 8;
1849 else if (opcode->format == FMT_D8 || opcode->format == FMT_D9)
1850 extra_shift = 8;
252b5132
RH
1851 else
1852 extra_shift = 0;
87271fa6 1853
252b5132
RH
1854 mn10300_insert_operand (&insn, &extension, operand,
1855 ex.X_add_number, (char *) NULL,
1856 0, extra_shift);
1857
252b5132
RH
1858 /* And note the register number in the register array. */
1859 mn10300_reg_operands[op_idx - 1] = ex.X_add_number;
1860 break;
1861 }
1862
1863 case O_constant:
1864 /* If this operand can be promoted, and it doesn't
1865 fit into the allocated bitfield for this insn,
1866 then promote it (ie this opcode does not match). */
1867 if (operand->flags
1868 & (MN10300_OPERAND_PROMOTE | MN10300_OPERAND_RELAX)
87271fa6 1869 && !check_operand (insn, operand, ex.X_add_number))
252b5132
RH
1870 {
1871 input_line_pointer = hold;
1872 str = hold;
1873 goto error;
1874 }
1875
1876 mn10300_insert_operand (&insn, &extension, operand,
1877 ex.X_add_number, (char *) NULL,
1878 0, 0);
1879 break;
1880
1881 default:
1882 /* If this operand can be promoted, then this opcode didn't
1883 match since we can't know if it needed promotion! */
1884 if (operand->flags & MN10300_OPERAND_PROMOTE)
1885 {
1886 input_line_pointer = hold;
1887 str = hold;
1888 goto error;
1889 }
1890
1891 /* We need to generate a fixup for this expression. */
1892 if (fc >= MAX_INSN_FIXUPS)
1893 as_fatal (_("too many fixups"));
1894 fixups[fc].exp = ex;
1895 fixups[fc].opindex = *opindex_ptr;
1896 fixups[fc].reloc = BFD_RELOC_UNUSED;
bf6f0d0c
AO
1897 if (mn10300_check_fixup (& fixups[fc]))
1898 goto error;
252b5132
RH
1899 ++fc;
1900 break;
1901 }
1902
1903keep_going:
1904 str = input_line_pointer;
1905 input_line_pointer = hold;
1906
1907 while (*str == ' ' || *str == ',')
1908 ++str;
1909
1910 }
1911
1912 /* Make sure we used all the operands! */
1913 if (*str != ',')
1914 match = 1;
1915
1916 /* If this instruction has registers that must not match, verify
1917 that they do indeed not match. */
1918 if (opcode->no_match_operands)
1919 {
1920 int i;
1921
1922 /* Look at each operand to see if it's marked. */
1923 for (i = 0; i < MN10300_MAX_OPERANDS; i++)
1924 {
1925 if ((1 << i) & opcode->no_match_operands)
1926 {
1927 int j;
1928
1929 /* operand I is marked. Check that it does not match any
1930 operands > I which are marked. */
1931 for (j = i + 1; j < MN10300_MAX_OPERANDS; j++)
1932 {
1933 if (((1 << j) & opcode->no_match_operands)
1934 && mn10300_reg_operands[i] == mn10300_reg_operands[j])
1935 {
1936 errmsg = _("Invalid register specification.");
1937 match = 0;
1938 goto error;
1939 }
1940 }
1941 }
1942 }
1943 }
1944
1945 error:
1946 if (match == 0)
87271fa6 1947 {
252b5132 1948 next_opcode = opcode + 1;
87271fa6 1949 if (!strcmp (next_opcode->name, opcode->name))
252b5132
RH
1950 {
1951 opcode = next_opcode;
1952 continue;
1953 }
87271fa6 1954
252b5132
RH
1955 as_bad ("%s", errmsg);
1956 return;
87271fa6 1957 }
252b5132
RH
1958 break;
1959 }
87271fa6 1960
3882b010 1961 while (ISSPACE (*str))
252b5132
RH
1962 ++str;
1963
1964 if (*str != '\0')
1965 as_bad (_("junk at end of line: `%s'"), str);
1966
1967 input_line_pointer = str;
1968
1969 /* Determine the size of the instruction. */
1970 if (opcode->format == FMT_S0)
1971 size = 1;
1972
1973 if (opcode->format == FMT_S1 || opcode->format == FMT_D0)
1974 size = 2;
1975
1976 if (opcode->format == FMT_S2 || opcode->format == FMT_D1)
1977 size = 3;
1978
85cb2cf9
JL
1979 if (opcode->format == FMT_D6)
1980 size = 3;
1981
1982 if (opcode->format == FMT_D7 || opcode->format == FMT_D10)
1983 size = 4;
1984
1985 if (opcode->format == FMT_D8)
1986 size = 6;
1987
1988 if (opcode->format == FMT_D9)
1989 size = 7;
252b5132
RH
1990
1991 if (opcode->format == FMT_S4)
1992 size = 5;
1993
1994 if (opcode->format == FMT_S6 || opcode->format == FMT_D5)
1995 size = 7;
1996
1997 if (opcode->format == FMT_D2)
1998 size = 4;
1999
e7b71525
AO
2000 if (opcode->format == FMT_D3)
2001 size = 5;
2002
252b5132
RH
2003 if (opcode->format == FMT_D4)
2004 size = 6;
2005
2006 if (relaxable && fc > 0)
2007 {
2008 int type;
2009
076dc439
AO
2010 /* We want to anchor the line info to the previous frag (if
2011 there isn't one, create it), so that, when the insn is
2012 resized, we still get the right address for the beginning of
2013 the region. */
2014 f = frag_more (0);
2015 dwarf2_emit_insn (0);
2016
87271fa6 2017 /* bCC */
252b5132
RH
2018 if (size == 2)
2019 {
2020 /* Handle bra specially. Basically treat it like jmp so
2021 that we automatically handle 8, 16 and 32 bit offsets
2022 correctly as well as jumps to an undefined address.
2023
2024 It is also important to not treat it like other bCC
2025 instructions since the long forms of bra is different
2026 from other bCC instructions. */
2027 if (opcode->opcode == 0xca00)
2028 type = 10;
2029 else
2030 type = 0;
2031 }
87271fa6 2032 /* call */
252b5132 2033 else if (size == 5)
87271fa6
NC
2034 type = 6;
2035 /* calls */
252b5132
RH
2036 else if (size == 4)
2037 type = 8;
87271fa6 2038 /* jmp */
252b5132
RH
2039 else if (size == 3 && opcode->opcode == 0xcc0000)
2040 type = 10;
e7b71525
AO
2041 else if (size == 3 && (opcode->opcode & 0xfff000) == 0xf8d000)
2042 type = 13;
87271fa6 2043 /* bCC (uncommon cases) */
252b5132
RH
2044 else
2045 type = 3;
2046
2047 f = frag_var (rs_machine_dependent, 8, 8 - size, type,
2048 fixups[0].exp.X_add_symbol,
2049 fixups[0].exp.X_add_number,
2050 (char *)fixups[0].opindex);
87271fa6 2051
252b5132
RH
2052 /* This is pretty hokey. We basically just care about the
2053 opcode, so we have to write out the first word big endian.
2054
2055 The exception is "call", which has two operands that we
2056 care about.
2057
2058 The first operand (the register list) happens to be in the
2059 first instruction word, and will be in the right place if
2060 we output the first word in big endian mode.
2061
2062 The second operand (stack size) is in the extension word,
2063 and we want it to appear as the first character in the extension
2064 word (as it appears in memory). Luckily, writing the extension
2065 word in big endian format will do what we want. */
2066 number_to_chars_bigendian (f, insn, size > 4 ? 4 : size);
2067 if (size > 8)
2068 {
2069 number_to_chars_bigendian (f + 4, extension, 4);
2070 number_to_chars_bigendian (f + 8, 0, size - 8);
2071 }
2072 else if (size > 4)
2073 number_to_chars_bigendian (f + 4, extension, size - 4);
2074 }
2075 else
2076 {
2077 /* Allocate space for the instruction. */
2078 f = frag_more (size);
2079
2080 /* Fill in bytes for the instruction. Note that opcode fields
2081 are written big-endian, 16 & 32bit immediates are written
2082 little endian. Egad. */
2083 if (opcode->format == FMT_S0
2084 || opcode->format == FMT_S1
2085 || opcode->format == FMT_D0
85cb2cf9
JL
2086 || opcode->format == FMT_D6
2087 || opcode->format == FMT_D7
2088 || opcode->format == FMT_D10
252b5132
RH
2089 || opcode->format == FMT_D1)
2090 {
2091 number_to_chars_bigendian (f, insn, size);
2092 }
2093 else if (opcode->format == FMT_S2
2094 && opcode->opcode != 0xdf0000
2095 && opcode->opcode != 0xde0000)
2096 {
2097 /* A format S2 instruction that is _not_ "ret" and "retf". */
2098 number_to_chars_bigendian (f, (insn >> 16) & 0xff, 1);
2099 number_to_chars_littleendian (f + 1, insn & 0xffff, 2);
2100 }
2101 else if (opcode->format == FMT_S2)
2102 {
2103 /* This must be a ret or retf, which is written entirely in
2104 big-endian format. */
2105 number_to_chars_bigendian (f, insn, 3);
2106 }
2107 else if (opcode->format == FMT_S4
2108 && opcode->opcode != 0xdc000000)
2109 {
2110 /* This must be a format S4 "call" instruction. What a pain. */
2111 unsigned long temp = (insn >> 8) & 0xffff;
2112 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
2113 number_to_chars_littleendian (f + 1, temp, 2);
2114 number_to_chars_bigendian (f + 3, insn & 0xff, 1);
2115 number_to_chars_bigendian (f + 4, extension & 0xff, 1);
2116 }
2117 else if (opcode->format == FMT_S4)
2118 {
2119 /* This must be a format S4 "jmp" instruction. */
2120 unsigned long temp = ((insn & 0xffffff) << 8) | (extension & 0xff);
2121 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
2122 number_to_chars_littleendian (f + 1, temp, 4);
2123 }
2124 else if (opcode->format == FMT_S6)
2125 {
2126 unsigned long temp = ((insn & 0xffffff) << 8)
2127 | ((extension >> 16) & 0xff);
2128 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
2129 number_to_chars_littleendian (f + 1, temp, 4);
2130 number_to_chars_bigendian (f + 5, (extension >> 8) & 0xff, 1);
2131 number_to_chars_bigendian (f + 6, extension & 0xff, 1);
2132 }
2133 else if (opcode->format == FMT_D2
2134 && opcode->opcode != 0xfaf80000
2135 && opcode->opcode != 0xfaf00000
2136 && opcode->opcode != 0xfaf40000)
2137 {
2138 /* A format D2 instruction where the 16bit immediate is
2139 really a single 16bit value, not two 8bit values. */
2140 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
2141 number_to_chars_littleendian (f + 2, insn & 0xffff, 2);
2142 }
2143 else if (opcode->format == FMT_D2)
2144 {
2145 /* A format D2 instruction where the 16bit immediate
2146 is really two 8bit immediates. */
2147 number_to_chars_bigendian (f, insn, 4);
2148 }
e7b71525
AO
2149 else if (opcode->format == FMT_D3)
2150 {
2151 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
2152 number_to_chars_littleendian (f + 2, insn & 0xffff, 2);
2153 number_to_chars_bigendian (f + 4, extension & 0xff, 1);
2154 }
252b5132
RH
2155 else if (opcode->format == FMT_D4)
2156 {
2157 unsigned long temp = ((insn & 0xffff) << 16) | (extension & 0xffff);
87271fa6 2158
252b5132
RH
2159 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
2160 number_to_chars_littleendian (f + 2, temp, 4);
2161 }
2162 else if (opcode->format == FMT_D5)
2163 {
87271fa6
NC
2164 unsigned long temp = (((insn & 0xffff) << 16)
2165 | ((extension >> 8) & 0xffff));
2166
252b5132
RH
2167 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
2168 number_to_chars_littleendian (f + 2, temp, 4);
2169 number_to_chars_bigendian (f + 6, extension & 0xff, 1);
2170 }
85cb2cf9
JL
2171 else if (opcode->format == FMT_D8)
2172 {
87271fa6
NC
2173 unsigned long temp = ((insn & 0xff) << 16) | (extension & 0xffff);
2174
2175 number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3);
2176 number_to_chars_bigendian (f + 3, (temp & 0xff), 1);
2177 number_to_chars_littleendian (f + 4, temp >> 8, 2);
85cb2cf9
JL
2178 }
2179 else if (opcode->format == FMT_D9)
2180 {
87271fa6
NC
2181 unsigned long temp = ((insn & 0xff) << 24) | (extension & 0xffffff);
2182
2183 number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3);
2184 number_to_chars_littleendian (f + 3, temp, 4);
85cb2cf9 2185 }
252b5132
RH
2186
2187 /* Create any fixups. */
2188 for (i = 0; i < fc; i++)
2189 {
2190 const struct mn10300_operand *operand;
2191
2192 operand = &mn10300_operands[fixups[i].opindex];
bf6f0d0c
AO
2193 if (fixups[i].reloc != BFD_RELOC_UNUSED
2194 && fixups[i].reloc != BFD_RELOC_32_GOT_PCREL
2195 && fixups[i].reloc != BFD_RELOC_32_GOTOFF
2196 && fixups[i].reloc != BFD_RELOC_32_PLT_PCREL
2197 && fixups[i].reloc != BFD_RELOC_MN10300_GOT32)
252b5132
RH
2198 {
2199 reloc_howto_type *reloc_howto;
2200 int size;
2201 int offset;
2202 fixS *fixP;
2203
87271fa6
NC
2204 reloc_howto = bfd_reloc_type_lookup (stdoutput,
2205 fixups[i].reloc);
252b5132
RH
2206
2207 if (!reloc_howto)
87271fa6
NC
2208 abort ();
2209
252b5132
RH
2210 size = bfd_get_reloc_size (reloc_howto);
2211
2212 if (size < 1 || size > 4)
87271fa6 2213 abort ();
252b5132
RH
2214
2215 offset = 4 - size;
2216 fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset,
2217 size, &fixups[i].exp,
2218 reloc_howto->pc_relative,
2219 fixups[i].reloc);
2220 }
2221 else
2222 {
2223 int reloc, pcrel, reloc_size, offset;
2224 fixS *fixP;
2225
2226 reloc = BFD_RELOC_NONE;
bf6f0d0c
AO
2227 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2228 reloc = fixups[i].reloc;
252b5132
RH
2229 /* How big is the reloc? Remember SPLIT relocs are
2230 implicitly 32bits. */
2231 if ((operand->flags & MN10300_OPERAND_SPLIT) != 0)
2232 reloc_size = 32;
85cb2cf9
JL
2233 else if ((operand->flags & MN10300_OPERAND_24BIT) != 0)
2234 reloc_size = 24;
252b5132
RH
2235 else
2236 reloc_size = operand->bits;
2237
2238 /* Is the reloc pc-relative? */
2239 pcrel = (operand->flags & MN10300_OPERAND_PCREL) != 0;
bf6f0d0c
AO
2240 if (reloc != BFD_RELOC_NONE)
2241 pcrel = bfd_reloc_type_lookup (stdoutput, reloc)->pc_relative;
252b5132 2242
a7c92dae 2243 offset = size - (reloc_size + operand->shift) / 8;
eb0dfd58 2244
252b5132 2245 /* Choose a proper BFD relocation type. */
bf6f0d0c
AO
2246 if (reloc != BFD_RELOC_NONE)
2247 ;
2248 else if (pcrel)
252b5132
RH
2249 {
2250 if (reloc_size == 32)
2251 reloc = BFD_RELOC_32_PCREL;
2252 else if (reloc_size == 16)
2253 reloc = BFD_RELOC_16_PCREL;
2254 else if (reloc_size == 8)
2255 reloc = BFD_RELOC_8_PCREL;
2256 else
2257 abort ();
2258 }
2259 else
2260 {
2261 if (reloc_size == 32)
2262 reloc = BFD_RELOC_32;
2263 else if (reloc_size == 16)
2264 reloc = BFD_RELOC_16;
2265 else if (reloc_size == 8)
2266 reloc = BFD_RELOC_8;
2267 else
2268 abort ();
2269 }
2270
2271 /* Convert the size of the reloc into what fix_new_exp wants. */
2272 reloc_size = reloc_size / 8;
2273 if (reloc_size == 8)
2274 reloc_size = 0;
2275 else if (reloc_size == 16)
2276 reloc_size = 1;
2277 else if (reloc_size == 32)
2278 reloc_size = 2;
2279
2280 fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset,
2281 reloc_size, &fixups[i].exp, pcrel,
2282 ((bfd_reloc_code_real_type) reloc));
2283
2284 if (pcrel)
2285 fixP->fx_offset += offset;
2286 }
2287 }
e8b1cae5 2288
076dc439
AO
2289 dwarf2_emit_insn (size);
2290 }
252b5132
RH
2291}
2292
87271fa6
NC
2293/* If while processing a fixup, a reloc really needs to be created
2294 then it is done here. */
252b5132 2295
252b5132
RH
2296arelent *
2297tc_gen_reloc (seg, fixp)
b4c1ea07 2298 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH
2299 fixS *fixp;
2300{
2301 arelent *reloc;
2302 reloc = (arelent *) xmalloc (sizeof (arelent));
2303
2304 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
2305 if (reloc->howto == (reloc_howto_type *) NULL)
2306 {
2307 as_bad_where (fixp->fx_file, fixp->fx_line,
87271fa6
NC
2308 _("reloc %d not supported by object file format"),
2309 (int) fixp->fx_r_type);
252b5132
RH
2310 return NULL;
2311 }
2312 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
2313
bf6f0d0c
AO
2314 if (fixp->fx_subsy
2315 && S_GET_SEGMENT (fixp->fx_subsy) == absolute_section)
2316 {
2317 fixp->fx_offset -= S_GET_VALUE (fixp->fx_subsy);
2318 fixp->fx_subsy = 0;
2319 }
2320
252b5132
RH
2321 if (fixp->fx_addsy && fixp->fx_subsy)
2322 {
7dc8f5ce
AO
2323 reloc->sym_ptr_ptr = NULL;
2324
4e75439a
AO
2325 /* If we got a difference between two symbols, and the
2326 subtracted symbol is in the current section, use a
2327 PC-relative relocation. If both symbols are in the same
2328 section, the difference would have already been simplified
2329 to a constant. */
2330 if (S_GET_SEGMENT (fixp->fx_subsy) == seg)
2331 {
2332 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
2333 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
2334 reloc->addend = (reloc->address - S_GET_VALUE (fixp->fx_subsy)
2335 + fixp->fx_offset);
2336
2337 switch (fixp->fx_r_type)
2338 {
2339 case BFD_RELOC_8:
2340 reloc->howto = bfd_reloc_type_lookup (stdoutput,
2341 BFD_RELOC_8_PCREL);
2342 return reloc;
5d6255fe 2343
4e75439a
AO
2344 case BFD_RELOC_16:
2345 reloc->howto = bfd_reloc_type_lookup (stdoutput,
2346 BFD_RELOC_16_PCREL);
2347 return reloc;
2348
2349 case BFD_RELOC_24:
2350 reloc->howto = bfd_reloc_type_lookup (stdoutput,
2351 BFD_RELOC_24_PCREL);
2352 return reloc;
2353
2354 case BFD_RELOC_32:
2355 reloc->howto = bfd_reloc_type_lookup (stdoutput,
2356 BFD_RELOC_32_PCREL);
2357 return reloc;
2358
2359 default:
2360 /* Try to compute the absolute value below. */
2361 break;
2362 }
2363 }
87271fa6 2364
252b5132
RH
2365 if ((S_GET_SEGMENT (fixp->fx_addsy) != S_GET_SEGMENT (fixp->fx_subsy))
2366 || S_GET_SEGMENT (fixp->fx_addsy) == undefined_section)
2367 {
2368 as_bad_where (fixp->fx_file, fixp->fx_line,
2369 "Difference of symbols in different sections is not supported");
252b5132 2370 }
6e22e505
AO
2371 else
2372 {
2373 char *fixpos = fixp->fx_where + fixp->fx_frag->fr_literal;
2374
2375 reloc->addend = (S_GET_VALUE (fixp->fx_addsy)
2376 - S_GET_VALUE (fixp->fx_subsy) + fixp->fx_offset);
2377
2378 switch (fixp->fx_r_type)
2379 {
2380 case BFD_RELOC_8:
2381 md_number_to_chars (fixpos, reloc->addend, 1);
2382 break;
5d6255fe 2383
6e22e505
AO
2384 case BFD_RELOC_16:
2385 md_number_to_chars (fixpos, reloc->addend, 2);
2386 break;
252b5132 2387
6e22e505
AO
2388 case BFD_RELOC_24:
2389 md_number_to_chars (fixpos, reloc->addend, 3);
2390 break;
2391
2392 case BFD_RELOC_32:
2393 md_number_to_chars (fixpos, reloc->addend, 4);
2394 break;
2395
2396 default:
2397 reloc->sym_ptr_ptr = (asymbol **) &bfd_abs_symbol;
2398 return reloc;
2399 }
2400 }
2401
7dc8f5ce
AO
2402 if (reloc->sym_ptr_ptr)
2403 free (reloc->sym_ptr_ptr);
6e22e505
AO
2404 free (reloc);
2405 return NULL;
252b5132 2406 }
87271fa6 2407 else
252b5132 2408 {
87271fa6 2409 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
310b5aa2 2410 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH
2411 reloc->addend = fixp->fx_offset;
2412 }
2413 return reloc;
2414}
2415
2416int
2417md_estimate_size_before_relax (fragp, seg)
2418 fragS *fragp;
2419 asection *seg;
2420{
93c2a809
AM
2421 if (fragp->fr_subtype == 6
2422 && (!S_IS_DEFINED (fragp->fr_symbol)
2423 || seg != S_GET_SEGMENT (fragp->fr_symbol)))
2424 fragp->fr_subtype = 7;
2425 else if (fragp->fr_subtype == 8
2426 && (!S_IS_DEFINED (fragp->fr_symbol)
2427 || seg != S_GET_SEGMENT (fragp->fr_symbol)))
2428 fragp->fr_subtype = 9;
2429 else if (fragp->fr_subtype == 10
2430 && (!S_IS_DEFINED (fragp->fr_symbol)
2431 || seg != S_GET_SEGMENT (fragp->fr_symbol)))
2432 fragp->fr_subtype = 12;
2433
e7b71525
AO
2434 if (fragp->fr_subtype == 13)
2435 return 3;
93c2a809
AM
2436 if (fragp->fr_subtype >= sizeof (md_relax_table) / sizeof (md_relax_table[0]))
2437 abort ();
2438
2439 return md_relax_table[fragp->fr_subtype].rlx_length;
87271fa6 2440}
252b5132
RH
2441
2442long
2443md_pcrel_from (fixp)
2444 fixS *fixp;
2445{
87271fa6 2446 if (fixp->fx_addsy != (symbolS *) NULL && !S_IS_DEFINED (fixp->fx_addsy))
252b5132
RH
2447 {
2448 /* The symbol is undefined. Let the linker figure it out. */
2449 return 0;
2450 }
2451 return fixp->fx_frag->fr_address + fixp->fx_where;
252b5132
RH
2452}
2453
94f592af
NC
2454void
2455md_apply_fix3 (fixP, valP, seg)
2456 fixS * fixP;
2457 valueT * valP;
252b5132
RH
2458 segT seg;
2459{
94f592af 2460 char * fixpos = fixP->fx_where + fixP->fx_frag->fr_literal;
58a77e41 2461 int size = 0;
94f592af 2462 int value = (int) * valP;
58a77e41 2463
94f592af 2464 assert (fixP->fx_r_type < BFD_RELOC_UNUSED);
58a77e41
EC
2465
2466 /* This should never happen. */
2467 if (seg->flags & SEC_ALLOC)
94f592af 2468 abort ();
58a77e41 2469
c51ce5f0
EC
2470 /* The value we are passed in *valuep includes the symbol values.
2471 Since we are using BFD_ASSEMBLER, if we are doing this relocation
2472 the code in write.c is going to call bfd_install_relocation, which
2473 is also going to use the symbol value. That means that if the
2474 reloc is fully resolved we want to use *valuep since
2475 bfd_install_relocation is not being used.
2476
2477 However, if the reloc is not fully resolved we do not want to use
2478 *valuep, and must use fx_offset instead. However, if the reloc
2479 is PC relative, we do want to use *valuep since it includes the
2480 result of md_pcrel_from. */
94f592af
NC
2481 if (fixP->fx_addsy != (symbolS *) NULL && ! fixP->fx_pcrel)
2482 value = fixP->fx_offset;
c51ce5f0 2483
58a77e41
EC
2484 /* If the fix is relative to a symbol which is not defined, or not
2485 in the same segment as the fix, we cannot resolve it here. */
94f592af
NC
2486 if (fixP->fx_addsy != NULL
2487 && (! S_IS_DEFINED (fixP->fx_addsy)
2488 || (S_GET_SEGMENT (fixP->fx_addsy) != seg)))
58a77e41 2489 {
94f592af
NC
2490 fixP->fx_done = 0;
2491 return;
58a77e41
EC
2492 }
2493
94f592af 2494 switch (fixP->fx_r_type)
58a77e41
EC
2495 {
2496 case BFD_RELOC_8:
96f37af6 2497 case BFD_RELOC_8_PCREL:
58a77e41
EC
2498 size = 1;
2499 break;
2500
2501 case BFD_RELOC_16:
96f37af6 2502 case BFD_RELOC_16_PCREL:
58a77e41
EC
2503 size = 2;
2504 break;
2505
2506 case BFD_RELOC_32:
96f37af6 2507 case BFD_RELOC_32_PCREL:
58a77e41
EC
2508 size = 4;
2509 break;
2510
2511 case BFD_RELOC_VTABLE_INHERIT:
2512 case BFD_RELOC_VTABLE_ENTRY:
94f592af
NC
2513 fixP->fx_done = 0;
2514 return;
58a77e41
EC
2515
2516 case BFD_RELOC_NONE:
2517 default:
94f592af
NC
2518 as_bad_where (fixP->fx_file, fixP->fx_line,
2519 _("Bad relocation fixup type (%d)"), fixP->fx_r_type);
58a77e41
EC
2520 }
2521
c51ce5f0 2522 md_number_to_chars (fixpos, value, size);
58a77e41 2523
b653e7f9 2524 /* If a symbol remains, pass the fixup, as a reloc, onto the linker. */
94f592af
NC
2525 if (fixP->fx_addsy == NULL)
2526 fixP->fx_done = 1;
58a77e41
EC
2527}
2528
58a77e41
EC
2529/* Return zero if the fixup in fixp should be left alone and not
2530 adjusted. */
2531
b34976b6 2532bfd_boolean
58a77e41
EC
2533mn10300_fix_adjustable (fixp)
2534 struct fix *fixp;
2535{
bf6f0d0c
AO
2536 if (! TC_RELOC_RTSYM_LOC_FIXUP (fixp))
2537 return 0;
2538
58a77e41
EC
2539 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
2540 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
2541 return 0;
2542
7e8f4100
AO
2543 /* Do not adjust relocations involving symbols in code sections,
2544 because it breaks linker relaxations. This could be fixed in the
2545 linker, but this fix is simpler, and it pretty much only affects
2546 object size a little bit. */
2547 if (S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_CODE)
2548 return 0;
2549
53cb0362
DD
2550 /* Likewise, do not adjust symbols that won't be merged, or debug
2551 symbols, because they too break relaxation. We do want to adjust
2552 other mergable symbols, like .rodata, because code relaxations
2553 need section-relative symbols to properly relax them. */
2554 if (! (S_GET_SEGMENT(fixp->fx_addsy)->flags & SEC_MERGE))
2555 return 0;
2556 if (strncmp (S_GET_SEGMENT (fixp->fx_addsy)->name, ".debug", 6) == 0)
2557 return 0;
2558
58a77e41 2559 return 1;
252b5132
RH
2560}
2561
2562/* Insert an operand value into an instruction. */
2563
2564static void
2565mn10300_insert_operand (insnp, extensionp, operand, val, file, line, shift)
2566 unsigned long *insnp;
2567 unsigned long *extensionp;
2568 const struct mn10300_operand *operand;
2569 offsetT val;
2570 char *file;
2571 unsigned int line;
2572 unsigned int shift;
2573{
2574 /* No need to check 32bit operands for a bit. Note that
2575 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
2576 if (operand->bits != 32
2577 && (operand->flags & MN10300_OPERAND_SPLIT) == 0)
2578 {
2579 long min, max;
2580 offsetT test;
2581 int bits;
2582
2583 bits = operand->bits;
85cb2cf9
JL
2584 if (operand->flags & MN10300_OPERAND_24BIT)
2585 bits = 24;
252b5132
RH
2586
2587 if ((operand->flags & MN10300_OPERAND_SIGNED) != 0)
2588 {
2589 max = (1 << (bits - 1)) - 1;
2590 min = - (1 << (bits - 1));
2591 }
2592 else
87271fa6
NC
2593 {
2594 max = (1 << bits) - 1;
2595 min = 0;
2596 }
252b5132
RH
2597
2598 test = val;
2599
252b5132 2600 if (test < (offsetT) min || test > (offsetT) max)
e5976317 2601 as_warn_value_out_of_range (_("operand"), test, (offsetT) min, (offsetT) max, file, line);
252b5132
RH
2602 }
2603
2604 if ((operand->flags & MN10300_OPERAND_SPLIT) != 0)
2605 {
2606 *insnp |= (val >> (32 - operand->bits)) & ((1 << operand->bits) - 1);
2607 *extensionp |= ((val & ((1 << (32 - operand->bits)) - 1))
2608 << operand->shift);
2609 }
85cb2cf9
JL
2610 else if ((operand->flags & MN10300_OPERAND_24BIT) != 0)
2611 {
2612 *insnp |= (val >> (24 - operand->bits)) & ((1 << operand->bits) - 1);
2613 *extensionp |= ((val & ((1 << (24 - operand->bits)) - 1))
2614 << operand->shift);
2615 }
e7b71525
AO
2616 else if ((operand->flags & (MN10300_OPERAND_FSREG | MN10300_OPERAND_FDREG)))
2617 {
2618 /* See devo/opcodes/m10300-opc.c just before #define FSM0 for an
2619 explanation of these variables. Note that FMT-implied shifts
2620 are not taken into account for FP registers. */
2621 unsigned long mask_low, mask_high;
2622 int shl_low, shr_high, shl_high;
2623
2624 switch (operand->bits)
2625 {
2626 case 5:
2627 /* Handle regular FP registers. */
2628 if (operand->shift >= 0)
2629 {
2630 /* This is an `m' register. */
2631 shl_low = operand->shift;
2632 shl_high = 8 + (8 & shl_low) + (shl_low & 4) / 4;
2633 }
2634 else
2635 {
2636 /* This is an `n' register. */
2637 shl_low = -operand->shift;
2638 shl_high = shl_low / 4;
2639 }
2640
2641 mask_low = 0x0f;
2642 mask_high = 0x10;
2643 shr_high = 4;
2644 break;
2645
2646 case 3:
2647 /* Handle accumulators. */
2648 shl_low = -operand->shift;
2649 shl_high = 0;
2650 mask_low = 0x03;
2651 mask_high = 0x04;
2652 shr_high = 2;
2653 break;
2654
2655 default:
2656 abort ();
2657 }
2658 *insnp |= ((((val & mask_high) >> shr_high) << shl_high)
2659 | ((val & mask_low) << shl_low));
2660 }
252b5132
RH
2661 else if ((operand->flags & MN10300_OPERAND_EXTENDED) == 0)
2662 {
2663 *insnp |= (((long) val & ((1 << operand->bits) - 1))
2664 << (operand->shift + shift));
2665
2666 if ((operand->flags & MN10300_OPERAND_REPEATED) != 0)
2667 *insnp |= (((long) val & ((1 << operand->bits) - 1))
2668 << (operand->shift + shift + operand->bits));
2669 }
2670 else
2671 {
2672 *extensionp |= (((long) val & ((1 << operand->bits) - 1))
2673 << (operand->shift + shift));
2674
2675 if ((operand->flags & MN10300_OPERAND_REPEATED) != 0)
2676 *extensionp |= (((long) val & ((1 << operand->bits) - 1))
2677 << (operand->shift + shift + operand->bits));
2678 }
2679}
2680
2681static unsigned long
2682check_operand (insn, operand, val)
b4c1ea07 2683 unsigned long insn ATTRIBUTE_UNUSED;
252b5132
RH
2684 const struct mn10300_operand *operand;
2685 offsetT val;
2686{
2687 /* No need to check 32bit operands for a bit. Note that
2688 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
2689 if (operand->bits != 32
2690 && (operand->flags & MN10300_OPERAND_SPLIT) == 0)
2691 {
2692 long min, max;
2693 offsetT test;
2694 int bits;
2695
2696 bits = operand->bits;
85cb2cf9
JL
2697 if (operand->flags & MN10300_OPERAND_24BIT)
2698 bits = 24;
252b5132
RH
2699
2700 if ((operand->flags & MN10300_OPERAND_SIGNED) != 0)
2701 {
2702 max = (1 << (bits - 1)) - 1;
2703 min = - (1 << (bits - 1));
2704 }
2705 else
87271fa6
NC
2706 {
2707 max = (1 << bits) - 1;
2708 min = 0;
2709 }
252b5132
RH
2710
2711 test = val;
2712
252b5132
RH
2713 if (test < (offsetT) min || test > (offsetT) max)
2714 return 0;
2715 else
2716 return 1;
2717 }
2718 return 1;
2719}
2720
2721static void
2722set_arch_mach (mach)
497f322d 2723 int mach;
252b5132
RH
2724{
2725 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, mach))
2726 as_warn (_("could not set architecture and machine"));
2727
2728 current_machine = mach;
2729}
bf6f0d0c
AO
2730
2731static inline char * mn10300_end_of_match PARAMS ((char *, char *));
2732
2733static inline char *
2734mn10300_end_of_match (cont, what)
2735 char *cont, *what;
2736{
2737 int len = strlen (what);
2738
2739 if (strncmp (cont, what, strlen (what)) == 0
2740 && ! is_part_of_name (cont[len]))
2741 return cont + len;
2742
2743 return NULL;
2744}
2745
2746int
2747mn10300_parse_name (name, exprP, nextcharP)
2748 char const *name;
2749 expressionS *exprP;
2750 char *nextcharP;
2751{
2752 char *next = input_line_pointer;
2753 char *next_end;
2754 int reloc_type;
2755 segT segment;
2756
2757 exprP->X_op_symbol = NULL;
2758
2759 if (strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0)
2760 {
2761 if (! GOT_symbol)
2762 GOT_symbol = symbol_find_or_make (name);
2763
2764 exprP->X_add_symbol = GOT_symbol;
2765 no_suffix:
2766 /* If we have an absolute symbol or a reg,
2767 then we know its value now. */
2768 segment = S_GET_SEGMENT (exprP->X_add_symbol);
2769 if (segment == absolute_section)
2770 {
2771 exprP->X_op = O_constant;
2772 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol);
2773 exprP->X_add_symbol = NULL;
2774 }
2775 else if (segment == reg_section)
2776 {
2777 exprP->X_op = O_register;
2778 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol);
2779 exprP->X_add_symbol = NULL;
2780 }
2781 else
2782 {
2783 exprP->X_op = O_symbol;
2784 exprP->X_add_number = 0;
2785 }
2786
2787 return 1;
2788 }
2789
2790 exprP->X_add_symbol = symbol_find_or_make (name);
2791
2792 if (*nextcharP != '@')
2793 goto no_suffix;
2794 else if ((next_end = mn10300_end_of_match (next + 1, "GOTOFF")))
2795 reloc_type = BFD_RELOC_32_GOTOFF;
2796 else if ((next_end = mn10300_end_of_match (next + 1, "GOT")))
2797 reloc_type = BFD_RELOC_MN10300_GOT32;
2798 else if ((next_end = mn10300_end_of_match (next + 1, "PLT")))
2799 reloc_type = BFD_RELOC_32_PLT_PCREL;
2800 else
2801 goto no_suffix;
2802
2803 *input_line_pointer = *nextcharP;
2804 input_line_pointer = next_end;
2805 *nextcharP = *input_line_pointer;
2806 *input_line_pointer = '\0';
2807
2808 exprP->X_op = O_PIC_reloc;
2809 exprP->X_add_number = 0;
2810 exprP->X_md = reloc_type;
2811
2812 return 1;
2813}
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