Commit | Line | Data |
---|---|---|
252b5132 | 1 | /* tc-mn10300.c -- Assembler code for the Matsushita 10300 |
f7e42eb4 NC |
2 | Copyright 1996, 1997, 1998, 1999, 2000, 2001 |
3 | Free Software Foundation, Inc. | |
252b5132 RH |
4 | |
5 | This file is part of GAS, the GNU Assembler. | |
6 | ||
7 | GAS is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GAS is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GAS; see the file COPYING. If not, write to | |
19 | the Free Software Foundation, 59 Temple Place - Suite 330, | |
20 | Boston, MA 02111-1307, USA. */ | |
21 | ||
22 | #include <stdio.h> | |
23 | #include <ctype.h> | |
24 | #include "as.h" | |
87271fa6 | 25 | #include "subsegs.h" |
252b5132 | 26 | #include "opcode/mn10300.h" |
e8b1cae5 | 27 | #include "dwarf2dbg.h" |
252b5132 RH |
28 | \f |
29 | /* Structure to hold information about predefined registers. */ | |
30 | struct reg_name | |
31 | { | |
32 | const char *name; | |
33 | int value; | |
34 | }; | |
35 | ||
87271fa6 NC |
36 | /* Generic assembler global variables which must be defined by all |
37 | targets. */ | |
252b5132 | 38 | |
87271fa6 | 39 | /* Characters which always start a comment. */ |
252b5132 RH |
40 | const char comment_chars[] = "#"; |
41 | ||
42 | /* Characters which start a comment at the beginning of a line. */ | |
43 | const char line_comment_chars[] = ";#"; | |
44 | ||
87271fa6 | 45 | /* Characters which may be used to separate multiple commands on a |
252b5132 RH |
46 | single line. */ |
47 | const char line_separator_chars[] = ";"; | |
48 | ||
87271fa6 | 49 | /* Characters which are used to indicate an exponent in a floating |
252b5132 RH |
50 | point number. */ |
51 | const char EXP_CHARS[] = "eE"; | |
52 | ||
87271fa6 | 53 | /* Characters which mean that a number is a floating point constant, |
252b5132 RH |
54 | as in 0d1.0. */ |
55 | const char FLT_CHARS[] = "dD"; | |
56 | \f | |
252b5132 | 57 | const relax_typeS md_relax_table[] = { |
87271fa6 | 58 | /* bCC relaxing */ |
252b5132 RH |
59 | {0x7f, -0x80, 2, 1}, |
60 | {0x7fff, -0x8000, 5, 2}, | |
61 | {0x7fffffff, -0x80000000, 7, 0}, | |
62 | ||
87271fa6 | 63 | /* bCC relaxing (uncommon cases) */ |
252b5132 RH |
64 | {0x7f, -0x80, 3, 4}, |
65 | {0x7fff, -0x8000, 6, 5}, | |
66 | {0x7fffffff, -0x80000000, 8, 0}, | |
67 | ||
87271fa6 | 68 | /* call relaxing */ |
252b5132 RH |
69 | {0x7fff, -0x8000, 5, 7}, |
70 | {0x7fffffff, -0x80000000, 7, 0}, | |
71 | ||
87271fa6 | 72 | /* calls relaxing */ |
252b5132 RH |
73 | {0x7fff, -0x8000, 4, 9}, |
74 | {0x7fffffff, -0x80000000, 6, 0}, | |
75 | ||
87271fa6 | 76 | /* jmp relaxing */ |
252b5132 RH |
77 | {0x7f, -0x80, 2, 11}, |
78 | {0x7fff, -0x8000, 3, 12}, | |
79 | {0x7fffffff, -0x80000000, 5, 0}, | |
80 | ||
81 | }; | |
82 | ||
87271fa6 | 83 | /* Local functions. */ |
252b5132 RH |
84 | static void mn10300_insert_operand PARAMS ((unsigned long *, unsigned long *, |
85 | const struct mn10300_operand *, | |
86 | offsetT, char *, unsigned, | |
87 | unsigned)); | |
88 | static unsigned long check_operand PARAMS ((unsigned long, | |
89 | const struct mn10300_operand *, | |
90 | offsetT)); | |
91 | static int reg_name_search PARAMS ((const struct reg_name *, int, const char *)); | |
92 | static boolean data_register_name PARAMS ((expressionS *expressionP)); | |
93 | static boolean address_register_name PARAMS ((expressionS *expressionP)); | |
94 | static boolean other_register_name PARAMS ((expressionS *expressionP)); | |
95 | static void set_arch_mach PARAMS ((int)); | |
96 | ||
1485d400 EC |
97 | /* Set linkrelax here to avoid fixups in most sections. */ |
98 | int linkrelax = 1; | |
99 | ||
252b5132 RH |
100 | static int current_machine; |
101 | ||
87271fa6 | 102 | /* Fixups. */ |
252b5132 RH |
103 | #define MAX_INSN_FIXUPS (5) |
104 | struct mn10300_fixup | |
105 | { | |
106 | expressionS exp; | |
107 | int opindex; | |
108 | bfd_reloc_code_real_type reloc; | |
109 | }; | |
110 | struct mn10300_fixup fixups[MAX_INSN_FIXUPS]; | |
111 | static int fc; | |
112 | ||
113 | /* We must store the value of each register operand so that we can | |
114 | verify that certain registers do not match. */ | |
115 | int mn10300_reg_operands[MN10300_MAX_OPERANDS]; | |
116 | \f | |
117 | const char *md_shortopts = ""; | |
118 | struct option md_longopts[] = { | |
119 | {NULL, no_argument, NULL, 0} | |
120 | }; | |
87271fa6 | 121 | size_t md_longopts_size = sizeof (md_longopts); |
252b5132 RH |
122 | |
123 | /* The target specific pseudo-ops which we support. */ | |
124 | const pseudo_typeS md_pseudo_table[] = | |
125 | { | |
b4c1ea07 EC |
126 | { "file", dwarf2_directive_file, 0 }, |
127 | { "loc", dwarf2_directive_loc, 0 }, | |
0a727238 AO |
128 | { "am30", set_arch_mach, AM30 }, |
129 | { "am33", set_arch_mach, AM33 }, | |
130 | { "mn10300", set_arch_mach, MN103 }, | |
252b5132 RH |
131 | {NULL, 0, 0} |
132 | }; | |
133 | ||
0a727238 | 134 | #define HAVE_AM33 (current_machine == AM33) |
aa15f6f7 | 135 | #define HAVE_AM30 (current_machine == AM30) |
0a727238 | 136 | |
252b5132 RH |
137 | /* Opcode hash table. */ |
138 | static struct hash_control *mn10300_hash; | |
139 | ||
87271fa6 | 140 | /* This table is sorted. Suitable for searching by a binary search. */ |
252b5132 RH |
141 | static const struct reg_name data_registers[] = |
142 | { | |
143 | { "d0", 0 }, | |
144 | { "d1", 1 }, | |
145 | { "d2", 2 }, | |
146 | { "d3", 3 }, | |
147 | }; | |
87271fa6 NC |
148 | #define DATA_REG_NAME_CNT \ |
149 | (sizeof (data_registers) / sizeof (struct reg_name)) | |
252b5132 RH |
150 | |
151 | static const struct reg_name address_registers[] = | |
152 | { | |
153 | { "a0", 0 }, | |
154 | { "a1", 1 }, | |
155 | { "a2", 2 }, | |
156 | { "a3", 3 }, | |
157 | }; | |
87271fa6 NC |
158 | |
159 | #define ADDRESS_REG_NAME_CNT \ | |
160 | (sizeof (address_registers) / sizeof (struct reg_name)) | |
252b5132 | 161 | |
85cb2cf9 JL |
162 | static const struct reg_name r_registers[] = |
163 | { | |
164 | { "a0", 8 }, | |
165 | { "a1", 9 }, | |
166 | { "a2", 10 }, | |
167 | { "a3", 11 }, | |
168 | { "d0", 12 }, | |
169 | { "d1", 13 }, | |
170 | { "d2", 14 }, | |
171 | { "d3", 15 }, | |
172 | { "e0", 0 }, | |
173 | { "e1", 1 }, | |
174 | { "e10", 10 }, | |
175 | { "e11", 11 }, | |
176 | { "e12", 12 }, | |
177 | { "e13", 13 }, | |
178 | { "e14", 14 }, | |
179 | { "e15", 15 }, | |
180 | { "e2", 2 }, | |
181 | { "e3", 3 }, | |
182 | { "e4", 4 }, | |
183 | { "e5", 5 }, | |
184 | { "e6", 6 }, | |
185 | { "e7", 7 }, | |
186 | { "e8", 8 }, | |
187 | { "e9", 9 }, | |
188 | { "r0", 0 }, | |
189 | { "r1", 1 }, | |
190 | { "r10", 10 }, | |
191 | { "r11", 11 }, | |
192 | { "r12", 12 }, | |
193 | { "r13", 13 }, | |
194 | { "r14", 14 }, | |
195 | { "r15", 15 }, | |
196 | { "r2", 2 }, | |
197 | { "r3", 3 }, | |
198 | { "r4", 4 }, | |
199 | { "r5", 5 }, | |
200 | { "r6", 6 }, | |
201 | { "r7", 7 }, | |
202 | { "r8", 8 }, | |
203 | { "r9", 9 }, | |
204 | }; | |
87271fa6 NC |
205 | |
206 | #define R_REG_NAME_CNT \ | |
207 | (sizeof (r_registers) / sizeof (struct reg_name)) | |
85cb2cf9 JL |
208 | |
209 | static const struct reg_name xr_registers[] = | |
210 | { | |
211 | { "mcrh", 2 }, | |
212 | { "mcrl", 3 }, | |
213 | { "mcvf", 4 }, | |
214 | { "mdrq", 1 }, | |
215 | { "sp", 0 }, | |
216 | { "xr0", 0 }, | |
217 | { "xr1", 1 }, | |
218 | { "xr10", 10 }, | |
219 | { "xr11", 11 }, | |
220 | { "xr12", 12 }, | |
221 | { "xr13", 13 }, | |
222 | { "xr14", 14 }, | |
223 | { "xr15", 15 }, | |
224 | { "xr2", 2 }, | |
225 | { "xr3", 3 }, | |
226 | { "xr4", 4 }, | |
227 | { "xr5", 5 }, | |
228 | { "xr6", 6 }, | |
229 | { "xr7", 7 }, | |
230 | { "xr8", 8 }, | |
231 | { "xr9", 9 }, | |
232 | }; | |
85cb2cf9 | 233 | |
87271fa6 NC |
234 | #define XR_REG_NAME_CNT \ |
235 | (sizeof (xr_registers) / sizeof (struct reg_name)) | |
252b5132 RH |
236 | |
237 | static const struct reg_name other_registers[] = | |
238 | { | |
239 | { "mdr", 0 }, | |
240 | { "psw", 0 }, | |
241 | { "sp", 0 }, | |
242 | }; | |
87271fa6 NC |
243 | |
244 | #define OTHER_REG_NAME_CNT \ | |
245 | (sizeof (other_registers) / sizeof (struct reg_name)) | |
252b5132 RH |
246 | |
247 | /* reg_name_search does a binary search of the given register table | |
248 | to see if "name" is a valid regiter name. Returns the register | |
87271fa6 | 249 | number from the array on success, or -1 on failure. */ |
252b5132 RH |
250 | |
251 | static int | |
252 | reg_name_search (regs, regcount, name) | |
253 | const struct reg_name *regs; | |
254 | int regcount; | |
255 | const char *name; | |
256 | { | |
257 | int middle, low, high; | |
258 | int cmp; | |
259 | ||
260 | low = 0; | |
261 | high = regcount - 1; | |
262 | ||
263 | do | |
264 | { | |
265 | middle = (low + high) / 2; | |
266 | cmp = strcasecmp (name, regs[middle].name); | |
267 | if (cmp < 0) | |
268 | high = middle - 1; | |
269 | else if (cmp > 0) | |
270 | low = middle + 1; | |
87271fa6 NC |
271 | else |
272 | return regs[middle].value; | |
252b5132 RH |
273 | } |
274 | while (low <= high); | |
275 | return -1; | |
276 | } | |
277 | ||
85cb2cf9 JL |
278 | /* Summary of register_name(). |
279 | * | |
280 | * in: Input_line_pointer points to 1st char of operand. | |
281 | * | |
282 | * out: A expressionS. | |
283 | * The operand may have been a register: in this case, X_op == O_register, | |
284 | * X_add_number is set to the register number, and truth is returned. | |
285 | * Input_line_pointer->(next non-blank) char after operand, or is in | |
286 | * its original state. | |
287 | */ | |
87271fa6 | 288 | |
85cb2cf9 JL |
289 | static boolean |
290 | r_register_name (expressionP) | |
291 | expressionS *expressionP; | |
292 | { | |
293 | int reg_number; | |
294 | char *name; | |
295 | char *start; | |
296 | char c; | |
297 | ||
87271fa6 | 298 | /* Find the spelling of the operand. */ |
85cb2cf9 JL |
299 | start = name = input_line_pointer; |
300 | ||
301 | c = get_symbol_end (); | |
302 | reg_number = reg_name_search (r_registers, R_REG_NAME_CNT, name); | |
303 | ||
87271fa6 NC |
304 | /* Look to see if it's in the register table. */ |
305 | if (reg_number >= 0) | |
85cb2cf9 JL |
306 | { |
307 | expressionP->X_op = O_register; | |
308 | expressionP->X_add_number = reg_number; | |
309 | ||
87271fa6 | 310 | /* Make the rest nice. */ |
85cb2cf9 JL |
311 | expressionP->X_add_symbol = NULL; |
312 | expressionP->X_op_symbol = NULL; | |
87271fa6 NC |
313 | |
314 | /* Put back the delimiting char. */ | |
315 | *input_line_pointer = c; | |
85cb2cf9 JL |
316 | return true; |
317 | } | |
318 | else | |
319 | { | |
87271fa6 NC |
320 | /* Reset the line as if we had not done anything. */ |
321 | /* Put back the delimiting char. */ | |
322 | *input_line_pointer = c; | |
323 | ||
324 | /* Reset input_line pointer. */ | |
325 | input_line_pointer = start; | |
85cb2cf9 JL |
326 | return false; |
327 | } | |
328 | } | |
329 | ||
330 | /* Summary of register_name(). | |
331 | * | |
332 | * in: Input_line_pointer points to 1st char of operand. | |
333 | * | |
334 | * out: A expressionS. | |
335 | * The operand may have been a register: in this case, X_op == O_register, | |
336 | * X_add_number is set to the register number, and truth is returned. | |
337 | * Input_line_pointer->(next non-blank) char after operand, or is in | |
338 | * its original state. | |
339 | */ | |
87271fa6 | 340 | |
85cb2cf9 JL |
341 | static boolean |
342 | xr_register_name (expressionP) | |
343 | expressionS *expressionP; | |
344 | { | |
345 | int reg_number; | |
346 | char *name; | |
347 | char *start; | |
348 | char c; | |
349 | ||
87271fa6 | 350 | /* Find the spelling of the operand. */ |
85cb2cf9 JL |
351 | start = name = input_line_pointer; |
352 | ||
353 | c = get_symbol_end (); | |
354 | reg_number = reg_name_search (xr_registers, XR_REG_NAME_CNT, name); | |
355 | ||
87271fa6 NC |
356 | /* Look to see if it's in the register table. */ |
357 | if (reg_number >= 0) | |
85cb2cf9 JL |
358 | { |
359 | expressionP->X_op = O_register; | |
360 | expressionP->X_add_number = reg_number; | |
361 | ||
87271fa6 | 362 | /* Make the rest nice. */ |
85cb2cf9 JL |
363 | expressionP->X_add_symbol = NULL; |
364 | expressionP->X_op_symbol = NULL; | |
87271fa6 NC |
365 | |
366 | /* Put back the delimiting char. */ | |
367 | *input_line_pointer = c; | |
85cb2cf9 JL |
368 | return true; |
369 | } | |
370 | else | |
371 | { | |
87271fa6 NC |
372 | /* Reset the line as if we had not done anything. */ |
373 | /* Put back the delimiting char. */ | |
374 | *input_line_pointer = c; | |
375 | ||
376 | /* Reset input_line pointer. */ | |
377 | input_line_pointer = start; | |
85cb2cf9 JL |
378 | return false; |
379 | } | |
380 | } | |
252b5132 RH |
381 | |
382 | /* Summary of register_name(). | |
383 | * | |
384 | * in: Input_line_pointer points to 1st char of operand. | |
385 | * | |
386 | * out: A expressionS. | |
387 | * The operand may have been a register: in this case, X_op == O_register, | |
388 | * X_add_number is set to the register number, and truth is returned. | |
389 | * Input_line_pointer->(next non-blank) char after operand, or is in | |
390 | * its original state. | |
391 | */ | |
87271fa6 | 392 | |
252b5132 RH |
393 | static boolean |
394 | data_register_name (expressionP) | |
395 | expressionS *expressionP; | |
396 | { | |
397 | int reg_number; | |
398 | char *name; | |
399 | char *start; | |
400 | char c; | |
401 | ||
87271fa6 | 402 | /* Find the spelling of the operand. */ |
252b5132 RH |
403 | start = name = input_line_pointer; |
404 | ||
405 | c = get_symbol_end (); | |
406 | reg_number = reg_name_search (data_registers, DATA_REG_NAME_CNT, name); | |
407 | ||
87271fa6 NC |
408 | /* Look to see if it's in the register table. */ |
409 | if (reg_number >= 0) | |
252b5132 RH |
410 | { |
411 | expressionP->X_op = O_register; | |
412 | expressionP->X_add_number = reg_number; | |
413 | ||
87271fa6 | 414 | /* Make the rest nice. */ |
252b5132 RH |
415 | expressionP->X_add_symbol = NULL; |
416 | expressionP->X_op_symbol = NULL; | |
87271fa6 NC |
417 | |
418 | /* Put back the delimiting char. */ | |
419 | *input_line_pointer = c; | |
252b5132 RH |
420 | return true; |
421 | } | |
422 | else | |
423 | { | |
87271fa6 NC |
424 | /* Reset the line as if we had not done anything. */ |
425 | /* Put back the delimiting char. */ | |
426 | *input_line_pointer = c; | |
427 | ||
428 | /* Reset input_line pointer. */ | |
429 | input_line_pointer = start; | |
252b5132 RH |
430 | return false; |
431 | } | |
432 | } | |
433 | ||
434 | /* Summary of register_name(). | |
435 | * | |
436 | * in: Input_line_pointer points to 1st char of operand. | |
437 | * | |
438 | * out: A expressionS. | |
439 | * The operand may have been a register: in this case, X_op == O_register, | |
440 | * X_add_number is set to the register number, and truth is returned. | |
441 | * Input_line_pointer->(next non-blank) char after operand, or is in | |
442 | * its original state. | |
443 | */ | |
87271fa6 | 444 | |
252b5132 RH |
445 | static boolean |
446 | address_register_name (expressionP) | |
447 | expressionS *expressionP; | |
448 | { | |
449 | int reg_number; | |
450 | char *name; | |
451 | char *start; | |
452 | char c; | |
453 | ||
87271fa6 | 454 | /* Find the spelling of the operand. */ |
252b5132 RH |
455 | start = name = input_line_pointer; |
456 | ||
457 | c = get_symbol_end (); | |
458 | reg_number = reg_name_search (address_registers, ADDRESS_REG_NAME_CNT, name); | |
459 | ||
87271fa6 NC |
460 | /* Look to see if it's in the register table. */ |
461 | if (reg_number >= 0) | |
252b5132 RH |
462 | { |
463 | expressionP->X_op = O_register; | |
464 | expressionP->X_add_number = reg_number; | |
465 | ||
87271fa6 | 466 | /* Make the rest nice. */ |
252b5132 RH |
467 | expressionP->X_add_symbol = NULL; |
468 | expressionP->X_op_symbol = NULL; | |
87271fa6 NC |
469 | |
470 | /* Put back the delimiting char. */ | |
471 | *input_line_pointer = c; | |
252b5132 RH |
472 | return true; |
473 | } | |
474 | else | |
475 | { | |
87271fa6 NC |
476 | /* Reset the line as if we had not done anything. */ |
477 | /* Put back the delimiting char. */ | |
478 | *input_line_pointer = c; | |
479 | ||
480 | /* Reset input_line pointer. */ | |
481 | input_line_pointer = start; | |
482 | ||
252b5132 RH |
483 | return false; |
484 | } | |
485 | } | |
486 | ||
487 | /* Summary of register_name(). | |
488 | * | |
489 | * in: Input_line_pointer points to 1st char of operand. | |
490 | * | |
491 | * out: A expressionS. | |
492 | * The operand may have been a register: in this case, X_op == O_register, | |
493 | * X_add_number is set to the register number, and truth is returned. | |
494 | * Input_line_pointer->(next non-blank) char after operand, or is in | |
495 | * its original state. | |
496 | */ | |
87271fa6 | 497 | |
252b5132 RH |
498 | static boolean |
499 | other_register_name (expressionP) | |
500 | expressionS *expressionP; | |
501 | { | |
502 | int reg_number; | |
503 | char *name; | |
504 | char *start; | |
505 | char c; | |
506 | ||
87271fa6 | 507 | /* Find the spelling of the operand. */ |
252b5132 RH |
508 | start = name = input_line_pointer; |
509 | ||
510 | c = get_symbol_end (); | |
511 | reg_number = reg_name_search (other_registers, OTHER_REG_NAME_CNT, name); | |
512 | ||
87271fa6 NC |
513 | /* Look to see if it's in the register table. */ |
514 | if (reg_number >= 0) | |
252b5132 RH |
515 | { |
516 | expressionP->X_op = O_register; | |
517 | expressionP->X_add_number = reg_number; | |
518 | ||
87271fa6 | 519 | /* Make the rest nice. */ |
252b5132 RH |
520 | expressionP->X_add_symbol = NULL; |
521 | expressionP->X_op_symbol = NULL; | |
87271fa6 NC |
522 | |
523 | /* Put back the delimiting char. */ | |
524 | *input_line_pointer = c; | |
252b5132 RH |
525 | return true; |
526 | } | |
527 | else | |
528 | { | |
87271fa6 NC |
529 | /* Reset the line as if we had not done anything. */ |
530 | /* Put back the delimiting char. */ | |
531 | *input_line_pointer = c; | |
532 | ||
533 | /* Reset input_line pointer. */ | |
534 | input_line_pointer = start; | |
252b5132 RH |
535 | return false; |
536 | } | |
537 | } | |
538 | ||
539 | void | |
540 | md_show_usage (stream) | |
87271fa6 | 541 | FILE *stream; |
252b5132 | 542 | { |
87271fa6 | 543 | fprintf (stream, _("MN10300 options:\n\ |
252b5132 | 544 | none yet\n")); |
87271fa6 | 545 | } |
252b5132 RH |
546 | |
547 | int | |
548 | md_parse_option (c, arg) | |
b4c1ea07 EC |
549 | int c ATTRIBUTE_UNUSED; |
550 | char *arg ATTRIBUTE_UNUSED; | |
252b5132 RH |
551 | { |
552 | return 0; | |
553 | } | |
554 | ||
555 | symbolS * | |
556 | md_undefined_symbol (name) | |
b4c1ea07 | 557 | char *name ATTRIBUTE_UNUSED; |
252b5132 RH |
558 | { |
559 | return 0; | |
560 | } | |
561 | ||
562 | char * | |
563 | md_atof (type, litp, sizep) | |
87271fa6 NC |
564 | int type; |
565 | char *litp; | |
566 | int *sizep; | |
252b5132 RH |
567 | { |
568 | int prec; | |
569 | LITTLENUM_TYPE words[4]; | |
570 | char *t; | |
571 | int i; | |
572 | ||
573 | switch (type) | |
574 | { | |
575 | case 'f': | |
576 | prec = 2; | |
577 | break; | |
578 | ||
579 | case 'd': | |
580 | prec = 4; | |
581 | break; | |
582 | ||
583 | default: | |
584 | *sizep = 0; | |
585 | return "bad call to md_atof"; | |
586 | } | |
87271fa6 | 587 | |
252b5132 RH |
588 | t = atof_ieee (input_line_pointer, type, words); |
589 | if (t) | |
590 | input_line_pointer = t; | |
591 | ||
592 | *sizep = prec * 2; | |
593 | ||
594 | for (i = prec - 1; i >= 0; i--) | |
595 | { | |
596 | md_number_to_chars (litp, (valueT) words[i], 2); | |
597 | litp += 2; | |
598 | } | |
599 | ||
600 | return NULL; | |
601 | } | |
602 | ||
252b5132 RH |
603 | void |
604 | md_convert_frag (abfd, sec, fragP) | |
b4c1ea07 | 605 | bfd *abfd ATTRIBUTE_UNUSED; |
87271fa6 NC |
606 | asection *sec; |
607 | fragS *fragP; | |
252b5132 RH |
608 | { |
609 | static unsigned long label_count = 0; | |
610 | char buf[40]; | |
611 | ||
612 | subseg_change (sec, 0); | |
613 | if (fragP->fr_subtype == 0) | |
614 | { | |
615 | fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol, | |
616 | fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL); | |
617 | fragP->fr_var = 0; | |
618 | fragP->fr_fix += 2; | |
619 | } | |
620 | else if (fragP->fr_subtype == 1) | |
621 | { | |
622 | /* Reverse the condition of the first branch. */ | |
623 | int offset = fragP->fr_fix; | |
624 | int opcode = fragP->fr_literal[offset] & 0xff; | |
625 | ||
626 | switch (opcode) | |
627 | { | |
628 | case 0xc8: | |
629 | opcode = 0xc9; | |
630 | break; | |
631 | case 0xc9: | |
632 | opcode = 0xc8; | |
633 | break; | |
634 | case 0xc0: | |
635 | opcode = 0xc2; | |
636 | break; | |
637 | case 0xc2: | |
638 | opcode = 0xc0; | |
639 | break; | |
640 | case 0xc3: | |
641 | opcode = 0xc1; | |
642 | break; | |
643 | case 0xc1: | |
644 | opcode = 0xc3; | |
645 | break; | |
646 | case 0xc4: | |
647 | opcode = 0xc6; | |
648 | break; | |
649 | case 0xc6: | |
650 | opcode = 0xc4; | |
651 | break; | |
652 | case 0xc7: | |
653 | opcode = 0xc5; | |
654 | break; | |
655 | case 0xc5: | |
656 | opcode = 0xc7; | |
657 | break; | |
658 | default: | |
659 | abort (); | |
660 | } | |
661 | fragP->fr_literal[offset] = opcode; | |
662 | ||
663 | /* Create a fixup for the reversed conditional branch. */ | |
0aa529cb | 664 | sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++); |
252b5132 RH |
665 | fix_new (fragP, fragP->fr_fix + 1, 1, |
666 | symbol_new (buf, sec, 0, fragP->fr_next), | |
667 | fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL); | |
668 | ||
669 | /* Now create the unconditional branch + fixup to the | |
670 | final target. */ | |
671 | fragP->fr_literal[offset + 2] = 0xcc; | |
672 | fix_new (fragP, fragP->fr_fix + 3, 2, fragP->fr_symbol, | |
673 | fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL); | |
674 | fragP->fr_var = 0; | |
675 | fragP->fr_fix += 5; | |
676 | } | |
677 | else if (fragP->fr_subtype == 2) | |
678 | { | |
679 | /* Reverse the condition of the first branch. */ | |
680 | int offset = fragP->fr_fix; | |
681 | int opcode = fragP->fr_literal[offset] & 0xff; | |
682 | ||
683 | switch (opcode) | |
684 | { | |
685 | case 0xc8: | |
686 | opcode = 0xc9; | |
687 | break; | |
688 | case 0xc9: | |
689 | opcode = 0xc8; | |
690 | break; | |
691 | case 0xc0: | |
692 | opcode = 0xc2; | |
693 | break; | |
694 | case 0xc2: | |
695 | opcode = 0xc0; | |
696 | break; | |
697 | case 0xc3: | |
698 | opcode = 0xc1; | |
699 | break; | |
700 | case 0xc1: | |
701 | opcode = 0xc3; | |
702 | break; | |
703 | case 0xc4: | |
704 | opcode = 0xc6; | |
705 | break; | |
706 | case 0xc6: | |
707 | opcode = 0xc4; | |
708 | break; | |
709 | case 0xc7: | |
710 | opcode = 0xc5; | |
711 | break; | |
712 | case 0xc5: | |
713 | opcode = 0xc7; | |
714 | break; | |
715 | default: | |
716 | abort (); | |
717 | } | |
718 | fragP->fr_literal[offset] = opcode; | |
719 | ||
720 | /* Create a fixup for the reversed conditional branch. */ | |
0aa529cb | 721 | sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++); |
252b5132 RH |
722 | fix_new (fragP, fragP->fr_fix + 1, 1, |
723 | symbol_new (buf, sec, 0, fragP->fr_next), | |
724 | fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL); | |
725 | ||
726 | /* Now create the unconditional branch + fixup to the | |
727 | final target. */ | |
728 | fragP->fr_literal[offset + 2] = 0xdc; | |
729 | fix_new (fragP, fragP->fr_fix + 3, 4, fragP->fr_symbol, | |
730 | fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL); | |
731 | fragP->fr_var = 0; | |
732 | fragP->fr_fix += 7; | |
733 | } | |
734 | else if (fragP->fr_subtype == 3) | |
735 | { | |
736 | fix_new (fragP, fragP->fr_fix + 2, 1, fragP->fr_symbol, | |
737 | fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL); | |
738 | fragP->fr_var = 0; | |
739 | fragP->fr_fix += 3; | |
740 | } | |
741 | else if (fragP->fr_subtype == 4) | |
742 | { | |
743 | /* Reverse the condition of the first branch. */ | |
744 | int offset = fragP->fr_fix; | |
745 | int opcode = fragP->fr_literal[offset + 1] & 0xff; | |
746 | ||
747 | switch (opcode) | |
748 | { | |
749 | case 0xe8: | |
750 | opcode = 0xe9; | |
751 | break; | |
752 | case 0xe9: | |
753 | opcode = 0xe8; | |
754 | break; | |
755 | case 0xea: | |
756 | opcode = 0xeb; | |
757 | break; | |
758 | case 0xeb: | |
759 | opcode = 0xea; | |
760 | break; | |
761 | default: | |
762 | abort (); | |
763 | } | |
764 | fragP->fr_literal[offset + 1] = opcode; | |
765 | ||
766 | /* Create a fixup for the reversed conditional branch. */ | |
0aa529cb | 767 | sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++); |
252b5132 RH |
768 | fix_new (fragP, fragP->fr_fix + 2, 1, |
769 | symbol_new (buf, sec, 0, fragP->fr_next), | |
770 | fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL); | |
771 | ||
772 | /* Now create the unconditional branch + fixup to the | |
773 | final target. */ | |
774 | fragP->fr_literal[offset + 3] = 0xcc; | |
775 | fix_new (fragP, fragP->fr_fix + 4, 2, fragP->fr_symbol, | |
776 | fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL); | |
777 | fragP->fr_var = 0; | |
778 | fragP->fr_fix += 6; | |
779 | } | |
780 | else if (fragP->fr_subtype == 5) | |
781 | { | |
782 | /* Reverse the condition of the first branch. */ | |
783 | int offset = fragP->fr_fix; | |
784 | int opcode = fragP->fr_literal[offset + 1] & 0xff; | |
785 | ||
786 | switch (opcode) | |
787 | { | |
788 | case 0xe8: | |
789 | opcode = 0xe9; | |
790 | break; | |
791 | case 0xea: | |
792 | opcode = 0xeb; | |
793 | break; | |
794 | case 0xeb: | |
795 | opcode = 0xea; | |
796 | break; | |
797 | default: | |
798 | abort (); | |
799 | } | |
800 | fragP->fr_literal[offset + 1] = opcode; | |
801 | ||
802 | /* Create a fixup for the reversed conditional branch. */ | |
0aa529cb | 803 | sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++); |
252b5132 RH |
804 | fix_new (fragP, fragP->fr_fix + 2, 1, |
805 | symbol_new (buf, sec, 0, fragP->fr_next), | |
806 | fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL); | |
807 | ||
808 | /* Now create the unconditional branch + fixup to the | |
809 | final target. */ | |
810 | fragP->fr_literal[offset + 3] = 0xdc; | |
811 | fix_new (fragP, fragP->fr_fix + 4, 4, fragP->fr_symbol, | |
812 | fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL); | |
813 | fragP->fr_var = 0; | |
814 | fragP->fr_fix += 8; | |
815 | } | |
816 | else if (fragP->fr_subtype == 6) | |
817 | { | |
818 | int offset = fragP->fr_fix; | |
819 | fragP->fr_literal[offset] = 0xcd; | |
820 | fix_new (fragP, fragP->fr_fix + 1, 2, fragP->fr_symbol, | |
821 | fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL); | |
822 | fragP->fr_var = 0; | |
823 | fragP->fr_fix += 5; | |
824 | } | |
825 | else if (fragP->fr_subtype == 7) | |
826 | { | |
827 | int offset = fragP->fr_fix; | |
828 | fragP->fr_literal[offset] = 0xdd; | |
829 | fragP->fr_literal[offset + 5] = fragP->fr_literal[offset + 3]; | |
830 | fragP->fr_literal[offset + 6] = fragP->fr_literal[offset + 4]; | |
831 | ||
832 | fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol, | |
833 | fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL); | |
834 | fragP->fr_var = 0; | |
835 | fragP->fr_fix += 7; | |
836 | } | |
837 | else if (fragP->fr_subtype == 8) | |
838 | { | |
839 | int offset = fragP->fr_fix; | |
840 | fragP->fr_literal[offset] = 0xfa; | |
841 | fragP->fr_literal[offset + 1] = 0xff; | |
842 | fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol, | |
843 | fragP->fr_offset + 2, 1, BFD_RELOC_16_PCREL); | |
844 | fragP->fr_var = 0; | |
845 | fragP->fr_fix += 4; | |
846 | } | |
847 | else if (fragP->fr_subtype == 9) | |
848 | { | |
849 | int offset = fragP->fr_fix; | |
850 | fragP->fr_literal[offset] = 0xfc; | |
851 | fragP->fr_literal[offset + 1] = 0xff; | |
852 | ||
853 | fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol, | |
854 | fragP->fr_offset + 2, 1, BFD_RELOC_32_PCREL); | |
855 | fragP->fr_var = 0; | |
856 | fragP->fr_fix += 6; | |
857 | } | |
858 | else if (fragP->fr_subtype == 10) | |
859 | { | |
860 | fragP->fr_literal[fragP->fr_fix] = 0xca; | |
861 | fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol, | |
862 | fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL); | |
863 | fragP->fr_var = 0; | |
864 | fragP->fr_fix += 2; | |
865 | } | |
866 | else if (fragP->fr_subtype == 11) | |
867 | { | |
868 | int offset = fragP->fr_fix; | |
869 | fragP->fr_literal[offset] = 0xcc; | |
870 | ||
871 | fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol, | |
872 | fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL); | |
873 | fragP->fr_var = 0; | |
874 | fragP->fr_fix += 3; | |
875 | } | |
876 | else if (fragP->fr_subtype == 12) | |
877 | { | |
878 | int offset = fragP->fr_fix; | |
879 | fragP->fr_literal[offset] = 0xdc; | |
880 | ||
881 | fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol, | |
882 | fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL); | |
883 | fragP->fr_var = 0; | |
884 | fragP->fr_fix += 5; | |
885 | } | |
886 | else | |
887 | abort (); | |
888 | } | |
889 | ||
890 | valueT | |
891 | md_section_align (seg, addr) | |
892 | asection *seg; | |
893 | valueT addr; | |
894 | { | |
895 | int align = bfd_get_section_alignment (stdoutput, seg); | |
896 | return ((addr + (1 << align) - 1) & (-1 << align)); | |
897 | } | |
898 | ||
899 | void | |
900 | md_begin () | |
901 | { | |
902 | char *prev_name = ""; | |
903 | register const struct mn10300_opcode *op; | |
904 | ||
87271fa6 | 905 | mn10300_hash = hash_new (); |
252b5132 RH |
906 | |
907 | /* Insert unique names into hash table. The MN10300 instruction set | |
908 | has many identical opcode names that have different opcodes based | |
909 | on the operands. This hash table then provides a quick index to | |
910 | the first opcode with a particular name in the opcode table. */ | |
911 | ||
912 | op = mn10300_opcodes; | |
913 | while (op->name) | |
914 | { | |
87271fa6 | 915 | if (strcmp (prev_name, op->name)) |
252b5132 RH |
916 | { |
917 | prev_name = (char *) op->name; | |
918 | hash_insert (mn10300_hash, op->name, (char *) op); | |
919 | } | |
920 | op++; | |
921 | } | |
922 | ||
252b5132 | 923 | /* Set the default machine type. */ |
0a727238 | 924 | if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, MN103)) |
252b5132 RH |
925 | as_warn (_("could not set architecture and machine")); |
926 | ||
0a727238 | 927 | current_machine = MN103; |
252b5132 RH |
928 | } |
929 | ||
930 | void | |
87271fa6 | 931 | md_assemble (str) |
252b5132 RH |
932 | char *str; |
933 | { | |
934 | char *s; | |
935 | struct mn10300_opcode *opcode; | |
936 | struct mn10300_opcode *next_opcode; | |
937 | const unsigned char *opindex_ptr; | |
938 | int next_opindex, relaxable; | |
3c07fb76 | 939 | unsigned long insn, extension, size = 0, real_size; |
252b5132 RH |
940 | char *f; |
941 | int i; | |
942 | int match; | |
943 | ||
944 | /* Get the opcode. */ | |
87271fa6 | 945 | for (s = str; *s != '\0' && !isspace (*s); s++) |
252b5132 RH |
946 | ; |
947 | if (*s != '\0') | |
948 | *s++ = '\0'; | |
949 | ||
87271fa6 NC |
950 | /* Find the first opcode with the proper name. */ |
951 | opcode = (struct mn10300_opcode *) hash_find (mn10300_hash, str); | |
252b5132 RH |
952 | if (opcode == NULL) |
953 | { | |
954 | as_bad (_("Unrecognized opcode: `%s'"), str); | |
955 | return; | |
956 | } | |
957 | ||
958 | str = s; | |
959 | while (isspace (*str)) | |
960 | ++str; | |
961 | ||
962 | input_line_pointer = str; | |
963 | ||
87271fa6 | 964 | for (;;) |
252b5132 RH |
965 | { |
966 | const char *errmsg; | |
967 | int op_idx; | |
968 | char *hold; | |
969 | int extra_shift = 0; | |
970 | ||
252b5132 RH |
971 | errmsg = _("Invalid opcode/operands"); |
972 | ||
973 | /* Reset the array of register operands. */ | |
974 | memset (mn10300_reg_operands, -1, sizeof (mn10300_reg_operands)); | |
975 | ||
976 | relaxable = 0; | |
977 | fc = 0; | |
978 | match = 0; | |
979 | next_opindex = 0; | |
980 | insn = opcode->opcode; | |
981 | extension = 0; | |
982 | ||
983 | /* If the instruction is not available on the current machine | |
984 | then it can not possibly match. */ | |
985 | if (opcode->machine | |
aa15f6f7 AO |
986 | && !(opcode->machine == AM33 && HAVE_AM33) |
987 | && !(opcode->machine == AM30 && HAVE_AM30)) | |
252b5132 RH |
988 | goto error; |
989 | ||
990 | for (op_idx = 1, opindex_ptr = opcode->operands; | |
991 | *opindex_ptr != 0; | |
992 | opindex_ptr++, op_idx++) | |
993 | { | |
994 | const struct mn10300_operand *operand; | |
995 | expressionS ex; | |
996 | ||
997 | if (next_opindex == 0) | |
998 | { | |
999 | operand = &mn10300_operands[*opindex_ptr]; | |
1000 | } | |
1001 | else | |
1002 | { | |
1003 | operand = &mn10300_operands[next_opindex]; | |
1004 | next_opindex = 0; | |
1005 | } | |
1006 | ||
1007 | while (*str == ' ' || *str == ',') | |
1008 | ++str; | |
1009 | ||
1010 | if (operand->flags & MN10300_OPERAND_RELAX) | |
1011 | relaxable = 1; | |
1012 | ||
87271fa6 | 1013 | /* Gather the operand. */ |
252b5132 RH |
1014 | hold = input_line_pointer; |
1015 | input_line_pointer = str; | |
1016 | ||
1017 | if (operand->flags & MN10300_OPERAND_PAREN) | |
1018 | { | |
1019 | if (*input_line_pointer != ')' && *input_line_pointer != '(') | |
1020 | { | |
1021 | input_line_pointer = hold; | |
1022 | str = hold; | |
1023 | goto error; | |
1024 | } | |
1025 | input_line_pointer++; | |
1026 | goto keep_going; | |
1027 | } | |
1028 | /* See if we can match the operands. */ | |
1029 | else if (operand->flags & MN10300_OPERAND_DREG) | |
1030 | { | |
1031 | if (!data_register_name (&ex)) | |
1032 | { | |
1033 | input_line_pointer = hold; | |
1034 | str = hold; | |
1035 | goto error; | |
1036 | } | |
1037 | } | |
1038 | else if (operand->flags & MN10300_OPERAND_AREG) | |
1039 | { | |
1040 | if (!address_register_name (&ex)) | |
1041 | { | |
1042 | input_line_pointer = hold; | |
1043 | str = hold; | |
1044 | goto error; | |
1045 | } | |
1046 | } | |
1047 | else if (operand->flags & MN10300_OPERAND_SP) | |
1048 | { | |
1049 | char *start = input_line_pointer; | |
1050 | char c = get_symbol_end (); | |
1051 | ||
1052 | if (strcasecmp (start, "sp") != 0) | |
1053 | { | |
1054 | *input_line_pointer = c; | |
1055 | input_line_pointer = hold; | |
1056 | str = hold; | |
1057 | goto error; | |
1058 | } | |
1059 | *input_line_pointer = c; | |
1060 | goto keep_going; | |
1061 | } | |
85cb2cf9 JL |
1062 | else if (operand->flags & MN10300_OPERAND_RREG) |
1063 | { | |
1064 | if (!r_register_name (&ex)) | |
1065 | { | |
1066 | input_line_pointer = hold; | |
1067 | str = hold; | |
1068 | goto error; | |
1069 | } | |
1070 | } | |
1071 | else if (operand->flags & MN10300_OPERAND_XRREG) | |
1072 | { | |
1073 | if (!xr_register_name (&ex)) | |
1074 | { | |
1075 | input_line_pointer = hold; | |
1076 | str = hold; | |
1077 | goto error; | |
1078 | } | |
1079 | } | |
1080 | else if (operand->flags & MN10300_OPERAND_USP) | |
1081 | { | |
1082 | char *start = input_line_pointer; | |
1083 | char c = get_symbol_end (); | |
1084 | ||
1085 | if (strcasecmp (start, "usp") != 0) | |
1086 | { | |
1087 | *input_line_pointer = c; | |
1088 | input_line_pointer = hold; | |
1089 | str = hold; | |
1090 | goto error; | |
1091 | } | |
1092 | *input_line_pointer = c; | |
1093 | goto keep_going; | |
1094 | } | |
1095 | else if (operand->flags & MN10300_OPERAND_SSP) | |
1096 | { | |
1097 | char *start = input_line_pointer; | |
1098 | char c = get_symbol_end (); | |
1099 | ||
1100 | if (strcasecmp (start, "ssp") != 0) | |
1101 | { | |
1102 | *input_line_pointer = c; | |
1103 | input_line_pointer = hold; | |
1104 | str = hold; | |
1105 | goto error; | |
1106 | } | |
1107 | *input_line_pointer = c; | |
1108 | goto keep_going; | |
1109 | } | |
1110 | else if (operand->flags & MN10300_OPERAND_MSP) | |
1111 | { | |
1112 | char *start = input_line_pointer; | |
1113 | char c = get_symbol_end (); | |
1114 | ||
1115 | if (strcasecmp (start, "msp") != 0) | |
1116 | { | |
1117 | *input_line_pointer = c; | |
1118 | input_line_pointer = hold; | |
1119 | str = hold; | |
1120 | goto error; | |
1121 | } | |
1122 | *input_line_pointer = c; | |
1123 | goto keep_going; | |
1124 | } | |
1125 | else if (operand->flags & MN10300_OPERAND_PC) | |
1126 | { | |
1127 | char *start = input_line_pointer; | |
1128 | char c = get_symbol_end (); | |
1129 | ||
1130 | if (strcasecmp (start, "pc") != 0) | |
1131 | { | |
1132 | *input_line_pointer = c; | |
1133 | input_line_pointer = hold; | |
1134 | str = hold; | |
1135 | goto error; | |
1136 | } | |
1137 | *input_line_pointer = c; | |
1138 | goto keep_going; | |
1139 | } | |
1140 | else if (operand->flags & MN10300_OPERAND_EPSW) | |
1141 | { | |
1142 | char *start = input_line_pointer; | |
1143 | char c = get_symbol_end (); | |
1144 | ||
1145 | if (strcasecmp (start, "epsw") != 0) | |
1146 | { | |
1147 | *input_line_pointer = c; | |
1148 | input_line_pointer = hold; | |
1149 | str = hold; | |
1150 | goto error; | |
1151 | } | |
1152 | *input_line_pointer = c; | |
1153 | goto keep_going; | |
1154 | } | |
1155 | else if (operand->flags & MN10300_OPERAND_PLUS) | |
1156 | { | |
1157 | if (*input_line_pointer != '+') | |
1158 | { | |
1159 | input_line_pointer = hold; | |
1160 | str = hold; | |
1161 | goto error; | |
1162 | } | |
1163 | input_line_pointer++; | |
1164 | goto keep_going; | |
1165 | } | |
252b5132 RH |
1166 | else if (operand->flags & MN10300_OPERAND_PSW) |
1167 | { | |
1168 | char *start = input_line_pointer; | |
1169 | char c = get_symbol_end (); | |
1170 | ||
1171 | if (strcasecmp (start, "psw") != 0) | |
1172 | { | |
1173 | *input_line_pointer = c; | |
1174 | input_line_pointer = hold; | |
1175 | str = hold; | |
1176 | goto error; | |
1177 | } | |
1178 | *input_line_pointer = c; | |
1179 | goto keep_going; | |
1180 | } | |
1181 | else if (operand->flags & MN10300_OPERAND_MDR) | |
1182 | { | |
1183 | char *start = input_line_pointer; | |
1184 | char c = get_symbol_end (); | |
1185 | ||
1186 | if (strcasecmp (start, "mdr") != 0) | |
1187 | { | |
1188 | *input_line_pointer = c; | |
1189 | input_line_pointer = hold; | |
1190 | str = hold; | |
1191 | goto error; | |
1192 | } | |
1193 | *input_line_pointer = c; | |
1194 | goto keep_going; | |
1195 | } | |
1196 | else if (operand->flags & MN10300_OPERAND_REG_LIST) | |
1197 | { | |
1198 | unsigned int value = 0; | |
1199 | if (*input_line_pointer != '[') | |
1200 | { | |
1201 | input_line_pointer = hold; | |
1202 | str = hold; | |
1203 | goto error; | |
1204 | } | |
1205 | ||
1206 | /* Eat the '['. */ | |
1207 | input_line_pointer++; | |
87271fa6 | 1208 | |
252b5132 | 1209 | /* We used to reject a null register list here; however, |
87271fa6 NC |
1210 | we accept it now so the compiler can emit "call" |
1211 | instructions for all calls to named functions. | |
252b5132 RH |
1212 | |
1213 | The linker can then fill in the appropriate bits for the | |
1214 | register list and stack size or change the instruction | |
1215 | into a "calls" if using "call" is not profitable. */ | |
1216 | while (*input_line_pointer != ']') | |
1217 | { | |
1218 | char *start; | |
1219 | char c; | |
1220 | ||
1221 | if (*input_line_pointer == ',') | |
1222 | input_line_pointer++; | |
1223 | ||
1224 | start = input_line_pointer; | |
1225 | c = get_symbol_end (); | |
1226 | ||
1227 | if (strcasecmp (start, "d2") == 0) | |
1228 | { | |
1229 | value |= 0x80; | |
1230 | *input_line_pointer = c; | |
1231 | } | |
1232 | else if (strcasecmp (start, "d3") == 0) | |
1233 | { | |
1234 | value |= 0x40; | |
1235 | *input_line_pointer = c; | |
1236 | } | |
1237 | else if (strcasecmp (start, "a2") == 0) | |
1238 | { | |
1239 | value |= 0x20; | |
1240 | *input_line_pointer = c; | |
1241 | } | |
1242 | else if (strcasecmp (start, "a3") == 0) | |
1243 | { | |
1244 | value |= 0x10; | |
1245 | *input_line_pointer = c; | |
1246 | } | |
1247 | else if (strcasecmp (start, "other") == 0) | |
1248 | { | |
1249 | value |= 0x08; | |
1250 | *input_line_pointer = c; | |
1251 | } | |
0a727238 | 1252 | else if (HAVE_AM33 |
85cb2cf9 JL |
1253 | && strcasecmp (start, "exreg0") == 0) |
1254 | { | |
1255 | value |= 0x04; | |
1256 | *input_line_pointer = c; | |
1257 | } | |
0a727238 | 1258 | else if (HAVE_AM33 |
85cb2cf9 JL |
1259 | && strcasecmp (start, "exreg1") == 0) |
1260 | { | |
1261 | value |= 0x02; | |
1262 | *input_line_pointer = c; | |
1263 | } | |
0a727238 | 1264 | else if (HAVE_AM33 |
85cb2cf9 JL |
1265 | && strcasecmp (start, "exother") == 0) |
1266 | { | |
1267 | value |= 0x01; | |
1268 | *input_line_pointer = c; | |
1269 | } | |
0a727238 | 1270 | else if (HAVE_AM33 |
85cb2cf9 JL |
1271 | && strcasecmp (start, "all") == 0) |
1272 | { | |
1273 | value |= 0xff; | |
1274 | *input_line_pointer = c; | |
1275 | } | |
252b5132 RH |
1276 | else |
1277 | { | |
1278 | input_line_pointer = hold; | |
1279 | str = hold; | |
1280 | goto error; | |
1281 | } | |
1282 | } | |
1283 | input_line_pointer++; | |
1284 | mn10300_insert_operand (&insn, &extension, operand, | |
1285 | value, (char *) NULL, 0, 0); | |
1286 | goto keep_going; | |
1287 | ||
1288 | } | |
1289 | else if (data_register_name (&ex)) | |
1290 | { | |
1291 | input_line_pointer = hold; | |
1292 | str = hold; | |
1293 | goto error; | |
1294 | } | |
1295 | else if (address_register_name (&ex)) | |
1296 | { | |
1297 | input_line_pointer = hold; | |
1298 | str = hold; | |
1299 | goto error; | |
1300 | } | |
1301 | else if (other_register_name (&ex)) | |
1302 | { | |
1303 | input_line_pointer = hold; | |
1304 | str = hold; | |
1305 | goto error; | |
1306 | } | |
0a727238 | 1307 | else if (HAVE_AM33 && r_register_name (&ex)) |
85cb2cf9 JL |
1308 | { |
1309 | input_line_pointer = hold; | |
1310 | str = hold; | |
1311 | goto error; | |
1312 | } | |
0a727238 | 1313 | else if (HAVE_AM33 && xr_register_name (&ex)) |
85cb2cf9 JL |
1314 | { |
1315 | input_line_pointer = hold; | |
1316 | str = hold; | |
1317 | goto error; | |
1318 | } | |
252b5132 RH |
1319 | else if (*str == ')' || *str == '(') |
1320 | { | |
1321 | input_line_pointer = hold; | |
1322 | str = hold; | |
1323 | goto error; | |
1324 | } | |
1325 | else | |
1326 | { | |
1327 | expression (&ex); | |
1328 | } | |
1329 | ||
87271fa6 | 1330 | switch (ex.X_op) |
252b5132 RH |
1331 | { |
1332 | case O_illegal: | |
1333 | errmsg = _("illegal operand"); | |
1334 | goto error; | |
1335 | case O_absent: | |
1336 | errmsg = _("missing operand"); | |
1337 | goto error; | |
1338 | case O_register: | |
1339 | { | |
1340 | int mask; | |
1341 | ||
1342 | mask = MN10300_OPERAND_DREG | MN10300_OPERAND_AREG; | |
0a727238 AO |
1343 | if (HAVE_AM33) |
1344 | mask |= MN10300_OPERAND_RREG | MN10300_OPERAND_XRREG; | |
252b5132 RH |
1345 | if ((operand->flags & mask) == 0) |
1346 | { | |
1347 | input_line_pointer = hold; | |
1348 | str = hold; | |
1349 | goto error; | |
1350 | } | |
87271fa6 | 1351 | |
252b5132 RH |
1352 | if (opcode->format == FMT_D1 || opcode->format == FMT_S1) |
1353 | extra_shift = 8; | |
1354 | else if (opcode->format == FMT_D2 | |
1355 | || opcode->format == FMT_D4 | |
1356 | || opcode->format == FMT_S2 | |
1357 | || opcode->format == FMT_S4 | |
1358 | || opcode->format == FMT_S6 | |
1359 | || opcode->format == FMT_D5) | |
1360 | extra_shift = 16; | |
85cb2cf9 JL |
1361 | else if (opcode->format == FMT_D7) |
1362 | extra_shift = 8; | |
1363 | else if (opcode->format == FMT_D8 || opcode->format == FMT_D9) | |
1364 | extra_shift = 8; | |
252b5132 RH |
1365 | else |
1366 | extra_shift = 0; | |
87271fa6 | 1367 | |
252b5132 RH |
1368 | mn10300_insert_operand (&insn, &extension, operand, |
1369 | ex.X_add_number, (char *) NULL, | |
1370 | 0, extra_shift); | |
1371 | ||
252b5132 RH |
1372 | /* And note the register number in the register array. */ |
1373 | mn10300_reg_operands[op_idx - 1] = ex.X_add_number; | |
1374 | break; | |
1375 | } | |
1376 | ||
1377 | case O_constant: | |
1378 | /* If this operand can be promoted, and it doesn't | |
1379 | fit into the allocated bitfield for this insn, | |
1380 | then promote it (ie this opcode does not match). */ | |
1381 | if (operand->flags | |
1382 | & (MN10300_OPERAND_PROMOTE | MN10300_OPERAND_RELAX) | |
87271fa6 | 1383 | && !check_operand (insn, operand, ex.X_add_number)) |
252b5132 RH |
1384 | { |
1385 | input_line_pointer = hold; | |
1386 | str = hold; | |
1387 | goto error; | |
1388 | } | |
1389 | ||
1390 | mn10300_insert_operand (&insn, &extension, operand, | |
1391 | ex.X_add_number, (char *) NULL, | |
1392 | 0, 0); | |
1393 | break; | |
1394 | ||
1395 | default: | |
1396 | /* If this operand can be promoted, then this opcode didn't | |
1397 | match since we can't know if it needed promotion! */ | |
1398 | if (operand->flags & MN10300_OPERAND_PROMOTE) | |
1399 | { | |
1400 | input_line_pointer = hold; | |
1401 | str = hold; | |
1402 | goto error; | |
1403 | } | |
1404 | ||
1405 | /* We need to generate a fixup for this expression. */ | |
1406 | if (fc >= MAX_INSN_FIXUPS) | |
1407 | as_fatal (_("too many fixups")); | |
1408 | fixups[fc].exp = ex; | |
1409 | fixups[fc].opindex = *opindex_ptr; | |
1410 | fixups[fc].reloc = BFD_RELOC_UNUSED; | |
1411 | ++fc; | |
1412 | break; | |
1413 | } | |
1414 | ||
1415 | keep_going: | |
1416 | str = input_line_pointer; | |
1417 | input_line_pointer = hold; | |
1418 | ||
1419 | while (*str == ' ' || *str == ',') | |
1420 | ++str; | |
1421 | ||
1422 | } | |
1423 | ||
1424 | /* Make sure we used all the operands! */ | |
1425 | if (*str != ',') | |
1426 | match = 1; | |
1427 | ||
1428 | /* If this instruction has registers that must not match, verify | |
1429 | that they do indeed not match. */ | |
1430 | if (opcode->no_match_operands) | |
1431 | { | |
1432 | int i; | |
1433 | ||
1434 | /* Look at each operand to see if it's marked. */ | |
1435 | for (i = 0; i < MN10300_MAX_OPERANDS; i++) | |
1436 | { | |
1437 | if ((1 << i) & opcode->no_match_operands) | |
1438 | { | |
1439 | int j; | |
1440 | ||
1441 | /* operand I is marked. Check that it does not match any | |
1442 | operands > I which are marked. */ | |
1443 | for (j = i + 1; j < MN10300_MAX_OPERANDS; j++) | |
1444 | { | |
1445 | if (((1 << j) & opcode->no_match_operands) | |
1446 | && mn10300_reg_operands[i] == mn10300_reg_operands[j]) | |
1447 | { | |
1448 | errmsg = _("Invalid register specification."); | |
1449 | match = 0; | |
1450 | goto error; | |
1451 | } | |
1452 | } | |
1453 | } | |
1454 | } | |
1455 | } | |
1456 | ||
1457 | error: | |
1458 | if (match == 0) | |
87271fa6 | 1459 | { |
252b5132 | 1460 | next_opcode = opcode + 1; |
87271fa6 | 1461 | if (!strcmp (next_opcode->name, opcode->name)) |
252b5132 RH |
1462 | { |
1463 | opcode = next_opcode; | |
1464 | continue; | |
1465 | } | |
87271fa6 | 1466 | |
252b5132 RH |
1467 | as_bad ("%s", errmsg); |
1468 | return; | |
87271fa6 | 1469 | } |
252b5132 RH |
1470 | break; |
1471 | } | |
87271fa6 | 1472 | |
252b5132 RH |
1473 | while (isspace (*str)) |
1474 | ++str; | |
1475 | ||
1476 | if (*str != '\0') | |
1477 | as_bad (_("junk at end of line: `%s'"), str); | |
1478 | ||
1479 | input_line_pointer = str; | |
1480 | ||
1481 | /* Determine the size of the instruction. */ | |
1482 | if (opcode->format == FMT_S0) | |
1483 | size = 1; | |
1484 | ||
1485 | if (opcode->format == FMT_S1 || opcode->format == FMT_D0) | |
1486 | size = 2; | |
1487 | ||
1488 | if (opcode->format == FMT_S2 || opcode->format == FMT_D1) | |
1489 | size = 3; | |
1490 | ||
85cb2cf9 JL |
1491 | if (opcode->format == FMT_D6) |
1492 | size = 3; | |
1493 | ||
1494 | if (opcode->format == FMT_D7 || opcode->format == FMT_D10) | |
1495 | size = 4; | |
1496 | ||
1497 | if (opcode->format == FMT_D8) | |
1498 | size = 6; | |
1499 | ||
1500 | if (opcode->format == FMT_D9) | |
1501 | size = 7; | |
252b5132 RH |
1502 | |
1503 | if (opcode->format == FMT_S4) | |
1504 | size = 5; | |
1505 | ||
1506 | if (opcode->format == FMT_S6 || opcode->format == FMT_D5) | |
1507 | size = 7; | |
1508 | ||
1509 | if (opcode->format == FMT_D2) | |
1510 | size = 4; | |
1511 | ||
1512 | if (opcode->format == FMT_D4) | |
1513 | size = 6; | |
1514 | ||
3c07fb76 AO |
1515 | real_size = size; |
1516 | ||
252b5132 RH |
1517 | if (relaxable && fc > 0) |
1518 | { | |
1519 | int type; | |
1520 | ||
87271fa6 | 1521 | /* bCC */ |
252b5132 RH |
1522 | if (size == 2) |
1523 | { | |
1524 | /* Handle bra specially. Basically treat it like jmp so | |
1525 | that we automatically handle 8, 16 and 32 bit offsets | |
1526 | correctly as well as jumps to an undefined address. | |
1527 | ||
1528 | It is also important to not treat it like other bCC | |
1529 | instructions since the long forms of bra is different | |
1530 | from other bCC instructions. */ | |
1531 | if (opcode->opcode == 0xca00) | |
1532 | type = 10; | |
1533 | else | |
1534 | type = 0; | |
1535 | } | |
87271fa6 | 1536 | /* call */ |
252b5132 | 1537 | else if (size == 5) |
87271fa6 NC |
1538 | type = 6; |
1539 | /* calls */ | |
252b5132 RH |
1540 | else if (size == 4) |
1541 | type = 8; | |
87271fa6 | 1542 | /* jmp */ |
252b5132 RH |
1543 | else if (size == 3 && opcode->opcode == 0xcc0000) |
1544 | type = 10; | |
87271fa6 | 1545 | /* bCC (uncommon cases) */ |
252b5132 RH |
1546 | else |
1547 | type = 3; | |
1548 | ||
1549 | f = frag_var (rs_machine_dependent, 8, 8 - size, type, | |
1550 | fixups[0].exp.X_add_symbol, | |
1551 | fixups[0].exp.X_add_number, | |
1552 | (char *)fixups[0].opindex); | |
87271fa6 | 1553 | |
252b5132 RH |
1554 | /* This is pretty hokey. We basically just care about the |
1555 | opcode, so we have to write out the first word big endian. | |
1556 | ||
1557 | The exception is "call", which has two operands that we | |
1558 | care about. | |
1559 | ||
1560 | The first operand (the register list) happens to be in the | |
1561 | first instruction word, and will be in the right place if | |
1562 | we output the first word in big endian mode. | |
1563 | ||
1564 | The second operand (stack size) is in the extension word, | |
1565 | and we want it to appear as the first character in the extension | |
1566 | word (as it appears in memory). Luckily, writing the extension | |
1567 | word in big endian format will do what we want. */ | |
1568 | number_to_chars_bigendian (f, insn, size > 4 ? 4 : size); | |
1569 | if (size > 8) | |
1570 | { | |
1571 | number_to_chars_bigendian (f + 4, extension, 4); | |
1572 | number_to_chars_bigendian (f + 8, 0, size - 8); | |
1573 | } | |
1574 | else if (size > 4) | |
1575 | number_to_chars_bigendian (f + 4, extension, size - 4); | |
1576 | } | |
1577 | else | |
1578 | { | |
1579 | /* Allocate space for the instruction. */ | |
1580 | f = frag_more (size); | |
1581 | ||
1582 | /* Fill in bytes for the instruction. Note that opcode fields | |
1583 | are written big-endian, 16 & 32bit immediates are written | |
1584 | little endian. Egad. */ | |
1585 | if (opcode->format == FMT_S0 | |
1586 | || opcode->format == FMT_S1 | |
1587 | || opcode->format == FMT_D0 | |
85cb2cf9 JL |
1588 | || opcode->format == FMT_D6 |
1589 | || opcode->format == FMT_D7 | |
1590 | || opcode->format == FMT_D10 | |
252b5132 RH |
1591 | || opcode->format == FMT_D1) |
1592 | { | |
1593 | number_to_chars_bigendian (f, insn, size); | |
1594 | } | |
1595 | else if (opcode->format == FMT_S2 | |
1596 | && opcode->opcode != 0xdf0000 | |
1597 | && opcode->opcode != 0xde0000) | |
1598 | { | |
1599 | /* A format S2 instruction that is _not_ "ret" and "retf". */ | |
1600 | number_to_chars_bigendian (f, (insn >> 16) & 0xff, 1); | |
1601 | number_to_chars_littleendian (f + 1, insn & 0xffff, 2); | |
1602 | } | |
1603 | else if (opcode->format == FMT_S2) | |
1604 | { | |
1605 | /* This must be a ret or retf, which is written entirely in | |
1606 | big-endian format. */ | |
1607 | number_to_chars_bigendian (f, insn, 3); | |
1608 | } | |
1609 | else if (opcode->format == FMT_S4 | |
1610 | && opcode->opcode != 0xdc000000) | |
1611 | { | |
1612 | /* This must be a format S4 "call" instruction. What a pain. */ | |
1613 | unsigned long temp = (insn >> 8) & 0xffff; | |
1614 | number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1); | |
1615 | number_to_chars_littleendian (f + 1, temp, 2); | |
1616 | number_to_chars_bigendian (f + 3, insn & 0xff, 1); | |
1617 | number_to_chars_bigendian (f + 4, extension & 0xff, 1); | |
1618 | } | |
1619 | else if (opcode->format == FMT_S4) | |
1620 | { | |
1621 | /* This must be a format S4 "jmp" instruction. */ | |
1622 | unsigned long temp = ((insn & 0xffffff) << 8) | (extension & 0xff); | |
1623 | number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1); | |
1624 | number_to_chars_littleendian (f + 1, temp, 4); | |
1625 | } | |
1626 | else if (opcode->format == FMT_S6) | |
1627 | { | |
1628 | unsigned long temp = ((insn & 0xffffff) << 8) | |
1629 | | ((extension >> 16) & 0xff); | |
1630 | number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1); | |
1631 | number_to_chars_littleendian (f + 1, temp, 4); | |
1632 | number_to_chars_bigendian (f + 5, (extension >> 8) & 0xff, 1); | |
1633 | number_to_chars_bigendian (f + 6, extension & 0xff, 1); | |
1634 | } | |
1635 | else if (opcode->format == FMT_D2 | |
1636 | && opcode->opcode != 0xfaf80000 | |
1637 | && opcode->opcode != 0xfaf00000 | |
1638 | && opcode->opcode != 0xfaf40000) | |
1639 | { | |
1640 | /* A format D2 instruction where the 16bit immediate is | |
1641 | really a single 16bit value, not two 8bit values. */ | |
1642 | number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2); | |
1643 | number_to_chars_littleendian (f + 2, insn & 0xffff, 2); | |
1644 | } | |
1645 | else if (opcode->format == FMT_D2) | |
1646 | { | |
1647 | /* A format D2 instruction where the 16bit immediate | |
1648 | is really two 8bit immediates. */ | |
1649 | number_to_chars_bigendian (f, insn, 4); | |
1650 | } | |
1651 | else if (opcode->format == FMT_D4) | |
1652 | { | |
1653 | unsigned long temp = ((insn & 0xffff) << 16) | (extension & 0xffff); | |
87271fa6 | 1654 | |
252b5132 RH |
1655 | number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2); |
1656 | number_to_chars_littleendian (f + 2, temp, 4); | |
1657 | } | |
1658 | else if (opcode->format == FMT_D5) | |
1659 | { | |
87271fa6 NC |
1660 | unsigned long temp = (((insn & 0xffff) << 16) |
1661 | | ((extension >> 8) & 0xffff)); | |
1662 | ||
252b5132 RH |
1663 | number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2); |
1664 | number_to_chars_littleendian (f + 2, temp, 4); | |
1665 | number_to_chars_bigendian (f + 6, extension & 0xff, 1); | |
1666 | } | |
85cb2cf9 JL |
1667 | else if (opcode->format == FMT_D8) |
1668 | { | |
87271fa6 NC |
1669 | unsigned long temp = ((insn & 0xff) << 16) | (extension & 0xffff); |
1670 | ||
1671 | number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3); | |
1672 | number_to_chars_bigendian (f + 3, (temp & 0xff), 1); | |
1673 | number_to_chars_littleendian (f + 4, temp >> 8, 2); | |
85cb2cf9 JL |
1674 | } |
1675 | else if (opcode->format == FMT_D9) | |
1676 | { | |
87271fa6 NC |
1677 | unsigned long temp = ((insn & 0xff) << 24) | (extension & 0xffffff); |
1678 | ||
1679 | number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3); | |
1680 | number_to_chars_littleendian (f + 3, temp, 4); | |
85cb2cf9 | 1681 | } |
252b5132 RH |
1682 | |
1683 | /* Create any fixups. */ | |
1684 | for (i = 0; i < fc; i++) | |
1685 | { | |
1686 | const struct mn10300_operand *operand; | |
1687 | ||
1688 | operand = &mn10300_operands[fixups[i].opindex]; | |
1689 | if (fixups[i].reloc != BFD_RELOC_UNUSED) | |
1690 | { | |
1691 | reloc_howto_type *reloc_howto; | |
1692 | int size; | |
1693 | int offset; | |
1694 | fixS *fixP; | |
1695 | ||
87271fa6 NC |
1696 | reloc_howto = bfd_reloc_type_lookup (stdoutput, |
1697 | fixups[i].reloc); | |
252b5132 RH |
1698 | |
1699 | if (!reloc_howto) | |
87271fa6 NC |
1700 | abort (); |
1701 | ||
252b5132 RH |
1702 | size = bfd_get_reloc_size (reloc_howto); |
1703 | ||
1704 | if (size < 1 || size > 4) | |
87271fa6 | 1705 | abort (); |
252b5132 RH |
1706 | |
1707 | offset = 4 - size; | |
1708 | fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset, | |
1709 | size, &fixups[i].exp, | |
1710 | reloc_howto->pc_relative, | |
1711 | fixups[i].reloc); | |
1712 | } | |
1713 | else | |
1714 | { | |
1715 | int reloc, pcrel, reloc_size, offset; | |
1716 | fixS *fixP; | |
1717 | ||
1718 | reloc = BFD_RELOC_NONE; | |
1719 | /* How big is the reloc? Remember SPLIT relocs are | |
1720 | implicitly 32bits. */ | |
1721 | if ((operand->flags & MN10300_OPERAND_SPLIT) != 0) | |
1722 | reloc_size = 32; | |
85cb2cf9 JL |
1723 | else if ((operand->flags & MN10300_OPERAND_24BIT) != 0) |
1724 | reloc_size = 24; | |
252b5132 RH |
1725 | else |
1726 | reloc_size = operand->bits; | |
1727 | ||
1728 | /* Is the reloc pc-relative? */ | |
1729 | pcrel = (operand->flags & MN10300_OPERAND_PCREL) != 0; | |
1730 | ||
1731 | /* Gross. This disgusting hack is to make sure we | |
87271fa6 | 1732 | get the right offset for the 16/32 bit reloc in |
252b5132 RH |
1733 | "call" instructions. Basically they're a pain |
1734 | because the reloc isn't at the end of the instruction. */ | |
1735 | if ((size == 5 || size == 7) | |
1736 | && (((insn >> 24) & 0xff) == 0xcd | |
1737 | || ((insn >> 24) & 0xff) == 0xdd)) | |
1738 | size -= 2; | |
1739 | ||
1740 | /* Similarly for certain bit instructions which don't | |
1741 | hav their 32bit reloc at the tail of the instruction. */ | |
1742 | if (size == 7 | |
1743 | && (((insn >> 16) & 0xffff) == 0xfe00 | |
1744 | || ((insn >> 16) & 0xffff) == 0xfe01 | |
1745 | || ((insn >> 16) & 0xffff) == 0xfe02)) | |
1746 | size -= 1; | |
87271fa6 | 1747 | |
252b5132 RH |
1748 | offset = size - reloc_size / 8; |
1749 | ||
1750 | /* Choose a proper BFD relocation type. */ | |
1751 | if (pcrel) | |
1752 | { | |
1753 | if (reloc_size == 32) | |
1754 | reloc = BFD_RELOC_32_PCREL; | |
1755 | else if (reloc_size == 16) | |
1756 | reloc = BFD_RELOC_16_PCREL; | |
1757 | else if (reloc_size == 8) | |
1758 | reloc = BFD_RELOC_8_PCREL; | |
1759 | else | |
1760 | abort (); | |
1761 | } | |
1762 | else | |
1763 | { | |
1764 | if (reloc_size == 32) | |
1765 | reloc = BFD_RELOC_32; | |
1766 | else if (reloc_size == 16) | |
1767 | reloc = BFD_RELOC_16; | |
1768 | else if (reloc_size == 8) | |
1769 | reloc = BFD_RELOC_8; | |
1770 | else | |
1771 | abort (); | |
1772 | } | |
1773 | ||
1774 | /* Convert the size of the reloc into what fix_new_exp wants. */ | |
1775 | reloc_size = reloc_size / 8; | |
1776 | if (reloc_size == 8) | |
1777 | reloc_size = 0; | |
1778 | else if (reloc_size == 16) | |
1779 | reloc_size = 1; | |
1780 | else if (reloc_size == 32) | |
1781 | reloc_size = 2; | |
1782 | ||
1783 | fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset, | |
1784 | reloc_size, &fixups[i].exp, pcrel, | |
1785 | ((bfd_reloc_code_real_type) reloc)); | |
1786 | ||
1787 | if (pcrel) | |
1788 | fixP->fx_offset += offset; | |
1789 | } | |
1790 | } | |
1791 | } | |
e8b1cae5 | 1792 | |
4dc7ead9 | 1793 | dwarf2_emit_insn (real_size); |
252b5132 RH |
1794 | } |
1795 | ||
87271fa6 NC |
1796 | /* If while processing a fixup, a reloc really needs to be created |
1797 | then it is done here. */ | |
252b5132 | 1798 | |
252b5132 RH |
1799 | arelent * |
1800 | tc_gen_reloc (seg, fixp) | |
b4c1ea07 | 1801 | asection *seg ATTRIBUTE_UNUSED; |
252b5132 RH |
1802 | fixS *fixp; |
1803 | { | |
1804 | arelent *reloc; | |
1805 | reloc = (arelent *) xmalloc (sizeof (arelent)); | |
1806 | ||
1807 | reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); | |
1808 | if (reloc->howto == (reloc_howto_type *) NULL) | |
1809 | { | |
1810 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
87271fa6 NC |
1811 | _("reloc %d not supported by object file format"), |
1812 | (int) fixp->fx_r_type); | |
252b5132 RH |
1813 | return NULL; |
1814 | } | |
1815 | reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; | |
1816 | ||
1817 | if (fixp->fx_addsy && fixp->fx_subsy) | |
1818 | { | |
87271fa6 | 1819 | |
252b5132 RH |
1820 | if ((S_GET_SEGMENT (fixp->fx_addsy) != S_GET_SEGMENT (fixp->fx_subsy)) |
1821 | || S_GET_SEGMENT (fixp->fx_addsy) == undefined_section) | |
1822 | { | |
1823 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
1824 | "Difference of symbols in different sections is not supported"); | |
1825 | return NULL; | |
1826 | } | |
1827 | ||
0aa529cb | 1828 | reloc->sym_ptr_ptr = (asymbol **) &bfd_abs_symbol; |
252b5132 RH |
1829 | reloc->addend = (S_GET_VALUE (fixp->fx_addsy) |
1830 | - S_GET_VALUE (fixp->fx_subsy) + fixp->fx_offset); | |
1831 | } | |
87271fa6 | 1832 | else |
252b5132 | 1833 | { |
87271fa6 | 1834 | reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); |
310b5aa2 | 1835 | *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); |
252b5132 RH |
1836 | reloc->addend = fixp->fx_offset; |
1837 | } | |
1838 | return reloc; | |
1839 | } | |
1840 | ||
1841 | int | |
1842 | md_estimate_size_before_relax (fragp, seg) | |
1843 | fragS *fragp; | |
1844 | asection *seg; | |
1845 | { | |
1846 | if (fragp->fr_subtype == 0) | |
1847 | return 2; | |
1848 | if (fragp->fr_subtype == 3) | |
1849 | return 3; | |
1850 | if (fragp->fr_subtype == 6) | |
1851 | { | |
1852 | if (!S_IS_DEFINED (fragp->fr_symbol) | |
1853 | || seg != S_GET_SEGMENT (fragp->fr_symbol)) | |
1854 | { | |
1855 | fragp->fr_subtype = 7; | |
1856 | return 7; | |
1857 | } | |
1858 | else | |
1859 | return 5; | |
1860 | } | |
1861 | if (fragp->fr_subtype == 8) | |
1862 | { | |
1863 | if (!S_IS_DEFINED (fragp->fr_symbol) | |
1864 | || seg != S_GET_SEGMENT (fragp->fr_symbol)) | |
1865 | { | |
1866 | fragp->fr_subtype = 9; | |
1867 | return 6; | |
1868 | } | |
1869 | else | |
1870 | return 4; | |
1871 | } | |
1872 | if (fragp->fr_subtype == 10) | |
1873 | { | |
1874 | if (!S_IS_DEFINED (fragp->fr_symbol) | |
1875 | || seg != S_GET_SEGMENT (fragp->fr_symbol)) | |
1876 | { | |
1877 | fragp->fr_subtype = 12; | |
1878 | return 5; | |
1879 | } | |
1880 | else | |
1881 | return 2; | |
1882 | } | |
0aa529cb | 1883 | abort (); |
87271fa6 | 1884 | } |
252b5132 RH |
1885 | |
1886 | long | |
1887 | md_pcrel_from (fixp) | |
1888 | fixS *fixp; | |
1889 | { | |
87271fa6 | 1890 | if (fixp->fx_addsy != (symbolS *) NULL && !S_IS_DEFINED (fixp->fx_addsy)) |
252b5132 RH |
1891 | { |
1892 | /* The symbol is undefined. Let the linker figure it out. */ | |
1893 | return 0; | |
1894 | } | |
1895 | return fixp->fx_frag->fr_address + fixp->fx_where; | |
252b5132 RH |
1896 | } |
1897 | ||
1898 | int | |
1899 | md_apply_fix3 (fixp, valuep, seg) | |
1900 | fixS *fixp; | |
c51ce5f0 | 1901 | valueT *valuep; |
252b5132 RH |
1902 | segT seg; |
1903 | { | |
58a77e41 EC |
1904 | char *fixpos = fixp->fx_where + fixp->fx_frag->fr_literal; |
1905 | int size = 0; | |
c51ce5f0 | 1906 | int value; |
58a77e41 EC |
1907 | |
1908 | assert (fixp->fx_r_type < BFD_RELOC_UNUSED); | |
1909 | ||
1910 | /* This should never happen. */ | |
1911 | if (seg->flags & SEC_ALLOC) | |
1912 | abort (); | |
1913 | ||
c51ce5f0 EC |
1914 | /* The value we are passed in *valuep includes the symbol values. |
1915 | Since we are using BFD_ASSEMBLER, if we are doing this relocation | |
1916 | the code in write.c is going to call bfd_install_relocation, which | |
1917 | is also going to use the symbol value. That means that if the | |
1918 | reloc is fully resolved we want to use *valuep since | |
1919 | bfd_install_relocation is not being used. | |
1920 | ||
1921 | However, if the reloc is not fully resolved we do not want to use | |
1922 | *valuep, and must use fx_offset instead. However, if the reloc | |
1923 | is PC relative, we do want to use *valuep since it includes the | |
1924 | result of md_pcrel_from. */ | |
1925 | if (fixp->fx_addsy == (symbolS *) NULL || fixp->fx_pcrel) | |
1926 | value = *valuep; | |
1927 | else | |
1928 | value = fixp->fx_offset; | |
1929 | ||
58a77e41 EC |
1930 | /* If the fix is relative to a symbol which is not defined, or not |
1931 | in the same segment as the fix, we cannot resolve it here. */ | |
1932 | if (fixp->fx_addsy != NULL | |
1933 | && (! S_IS_DEFINED (fixp->fx_addsy) | |
1934 | || (S_GET_SEGMENT (fixp->fx_addsy) != seg))) | |
1935 | { | |
1936 | fixp->fx_done = 0; | |
1937 | return 0; | |
1938 | } | |
1939 | ||
1940 | switch (fixp->fx_r_type) | |
1941 | { | |
1942 | case BFD_RELOC_8: | |
1943 | size = 1; | |
1944 | break; | |
1945 | ||
1946 | case BFD_RELOC_16: | |
1947 | size = 2; | |
1948 | break; | |
1949 | ||
1950 | case BFD_RELOC_32: | |
1951 | size = 4; | |
1952 | break; | |
1953 | ||
1954 | case BFD_RELOC_VTABLE_INHERIT: | |
1955 | case BFD_RELOC_VTABLE_ENTRY: | |
1956 | fixp->fx_done = 0; | |
1957 | return 1; | |
1958 | ||
1959 | case BFD_RELOC_NONE: | |
1960 | default: | |
1961 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
1962 | _("Bad relocation fixup type (%d)"), fixp->fx_r_type); | |
1963 | } | |
1964 | ||
c51ce5f0 | 1965 | md_number_to_chars (fixpos, value, size); |
58a77e41 | 1966 | |
b653e7f9 NC |
1967 | /* If a symbol remains, pass the fixup, as a reloc, onto the linker. */ |
1968 | if (fixp->fx_addsy == NULL) | |
1969 | fixp->fx_done = 1; | |
58a77e41 | 1970 | |
b653e7f9 | 1971 | return 0; |
58a77e41 EC |
1972 | } |
1973 | ||
1974 | /* Return nonzero if the fixup in FIXP will require a relocation, | |
1975 | even it if appears that the fixup could be completely handled | |
1976 | within GAS. */ | |
1977 | ||
1978 | int | |
1979 | mn10300_force_relocation (fixp) | |
1980 | struct fix *fixp; | |
1981 | { | |
1982 | if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT | |
1983 | || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY) | |
1984 | return 1; | |
1985 | ||
1986 | return 0; | |
1987 | } | |
1988 | ||
1989 | /* Return zero if the fixup in fixp should be left alone and not | |
1990 | adjusted. */ | |
1991 | ||
1992 | boolean | |
1993 | mn10300_fix_adjustable (fixp) | |
1994 | struct fix *fixp; | |
1995 | { | |
1996 | /* Prevent all adjustments to global symbols. */ | |
1997 | if (S_IS_EXTERN (fixp->fx_addsy) || S_IS_WEAK (fixp->fx_addsy)) | |
1998 | return 0; | |
1999 | ||
2000 | if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT | |
2001 | || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY) | |
2002 | return 0; | |
2003 | ||
2004 | return 1; | |
252b5132 RH |
2005 | } |
2006 | ||
2007 | /* Insert an operand value into an instruction. */ | |
2008 | ||
2009 | static void | |
2010 | mn10300_insert_operand (insnp, extensionp, operand, val, file, line, shift) | |
2011 | unsigned long *insnp; | |
2012 | unsigned long *extensionp; | |
2013 | const struct mn10300_operand *operand; | |
2014 | offsetT val; | |
2015 | char *file; | |
2016 | unsigned int line; | |
2017 | unsigned int shift; | |
2018 | { | |
2019 | /* No need to check 32bit operands for a bit. Note that | |
2020 | MN10300_OPERAND_SPLIT is an implicit 32bit operand. */ | |
2021 | if (operand->bits != 32 | |
2022 | && (operand->flags & MN10300_OPERAND_SPLIT) == 0) | |
2023 | { | |
2024 | long min, max; | |
2025 | offsetT test; | |
2026 | int bits; | |
2027 | ||
2028 | bits = operand->bits; | |
85cb2cf9 JL |
2029 | if (operand->flags & MN10300_OPERAND_24BIT) |
2030 | bits = 24; | |
252b5132 RH |
2031 | |
2032 | if ((operand->flags & MN10300_OPERAND_SIGNED) != 0) | |
2033 | { | |
2034 | max = (1 << (bits - 1)) - 1; | |
2035 | min = - (1 << (bits - 1)); | |
2036 | } | |
2037 | else | |
87271fa6 NC |
2038 | { |
2039 | max = (1 << bits) - 1; | |
2040 | min = 0; | |
2041 | } | |
252b5132 RH |
2042 | |
2043 | test = val; | |
2044 | ||
252b5132 | 2045 | if (test < (offsetT) min || test > (offsetT) max) |
87271fa6 NC |
2046 | { |
2047 | const char *err = | |
2048 | _("operand out of range (%s not between %ld and %ld)"); | |
2049 | char buf[100]; | |
2050 | ||
2051 | sprint_value (buf, test); | |
2052 | if (file == (char *) NULL) | |
2053 | as_warn (err, buf, min, max); | |
2054 | else | |
2055 | as_warn_where (file, line, err, buf, min, max); | |
2056 | } | |
252b5132 RH |
2057 | } |
2058 | ||
2059 | if ((operand->flags & MN10300_OPERAND_SPLIT) != 0) | |
2060 | { | |
2061 | *insnp |= (val >> (32 - operand->bits)) & ((1 << operand->bits) - 1); | |
2062 | *extensionp |= ((val & ((1 << (32 - operand->bits)) - 1)) | |
2063 | << operand->shift); | |
2064 | } | |
85cb2cf9 JL |
2065 | else if ((operand->flags & MN10300_OPERAND_24BIT) != 0) |
2066 | { | |
2067 | *insnp |= (val >> (24 - operand->bits)) & ((1 << operand->bits) - 1); | |
2068 | *extensionp |= ((val & ((1 << (24 - operand->bits)) - 1)) | |
2069 | << operand->shift); | |
2070 | } | |
252b5132 RH |
2071 | else if ((operand->flags & MN10300_OPERAND_EXTENDED) == 0) |
2072 | { | |
2073 | *insnp |= (((long) val & ((1 << operand->bits) - 1)) | |
2074 | << (operand->shift + shift)); | |
2075 | ||
2076 | if ((operand->flags & MN10300_OPERAND_REPEATED) != 0) | |
2077 | *insnp |= (((long) val & ((1 << operand->bits) - 1)) | |
2078 | << (operand->shift + shift + operand->bits)); | |
2079 | } | |
2080 | else | |
2081 | { | |
2082 | *extensionp |= (((long) val & ((1 << operand->bits) - 1)) | |
2083 | << (operand->shift + shift)); | |
2084 | ||
2085 | if ((operand->flags & MN10300_OPERAND_REPEATED) != 0) | |
2086 | *extensionp |= (((long) val & ((1 << operand->bits) - 1)) | |
2087 | << (operand->shift + shift + operand->bits)); | |
2088 | } | |
2089 | } | |
2090 | ||
2091 | static unsigned long | |
2092 | check_operand (insn, operand, val) | |
b4c1ea07 | 2093 | unsigned long insn ATTRIBUTE_UNUSED; |
252b5132 RH |
2094 | const struct mn10300_operand *operand; |
2095 | offsetT val; | |
2096 | { | |
2097 | /* No need to check 32bit operands for a bit. Note that | |
2098 | MN10300_OPERAND_SPLIT is an implicit 32bit operand. */ | |
2099 | if (operand->bits != 32 | |
2100 | && (operand->flags & MN10300_OPERAND_SPLIT) == 0) | |
2101 | { | |
2102 | long min, max; | |
2103 | offsetT test; | |
2104 | int bits; | |
2105 | ||
2106 | bits = operand->bits; | |
85cb2cf9 JL |
2107 | if (operand->flags & MN10300_OPERAND_24BIT) |
2108 | bits = 24; | |
252b5132 RH |
2109 | |
2110 | if ((operand->flags & MN10300_OPERAND_SIGNED) != 0) | |
2111 | { | |
2112 | max = (1 << (bits - 1)) - 1; | |
2113 | min = - (1 << (bits - 1)); | |
2114 | } | |
2115 | else | |
87271fa6 NC |
2116 | { |
2117 | max = (1 << bits) - 1; | |
2118 | min = 0; | |
2119 | } | |
252b5132 RH |
2120 | |
2121 | test = val; | |
2122 | ||
252b5132 RH |
2123 | if (test < (offsetT) min || test > (offsetT) max) |
2124 | return 0; | |
2125 | else | |
2126 | return 1; | |
2127 | } | |
2128 | return 1; | |
2129 | } | |
2130 | ||
2131 | static void | |
2132 | set_arch_mach (mach) | |
2133 | int mach; | |
2134 | { | |
2135 | if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, mach)) | |
2136 | as_warn (_("could not set architecture and machine")); | |
2137 | ||
2138 | current_machine = mach; | |
2139 | } |