* config/tc-sh.c (md_assemble): For branches, check & update
[deliverable/binutils-gdb.git] / gas / config / tc-msp430.c
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1/* tc-msp430.c -- Assembler code for the Texas Instruments MSP430
2
df25fda5 3 Copyright (C) 2002, 2003 Free Software Foundation, Inc.
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4 Contributed by Dmitry Diky <diwil@mail.ru>
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
22
23#include <stdio.h>
24#include <string.h>
25#include <stdlib.h>
26#include <limits.h>
27
28#define PUSH_1X_WORKAROUND
29#include "as.h"
30#include "subsegs.h"
31#include "opcode/msp430.h"
32#include "safe-ctype.h"
33
34const char comment_chars[] = ";";
35const char line_comment_chars[] = "#";
36const char line_separator_chars[] = "";
37const char EXP_CHARS[] = "eE";
38const char FLT_CHARS[] = "dD";
39
40/* Handle long expressions. */
41extern LITTLENUM_TYPE generic_bignum[];
42
43static struct hash_control *msp430_hash;
44
45static unsigned int msp430_operands
46 PARAMS ((struct msp430_opcode_s *, char *));
47static int msp430_srcoperand
48 PARAMS ((struct msp430_operand_s *, char *, int, int *));
49static int msp430_dstoperand
50 PARAMS ((struct msp430_operand_s *, char *, int));
51static char *parse_exp
52 PARAMS ((char *, expressionS *));
53static inline char *skip_space
54 PARAMS ((char *));
55static int check_reg
56 PARAMS ((char *));
57static void msp430_set_arch
58 PARAMS ((int));
59static void show_mcu_list
60 PARAMS ((FILE *));
61static void del_spaces
62 PARAMS ((char *));
63
64#define MAX_OP_LEN 64
65
66struct mcu_type_s
67{
68 char *name;
69 int isa;
70 int mach;
71};
72
73#define MSP430_ISA_11 11
74#define MSP430_ISA_12 12
75#define MSP430_ISA_13 13
76#define MSP430_ISA_14 14
77#define MSP430_ISA_41 41
78#define MSP430_ISA_31 31
79#define MSP430_ISA_32 32
80#define MSP430_ISA_33 33
81#define MSP430_ISA_110 110
82#define MSP430_ISA_43 43
83#define MSP430_ISA_44 44
84#define MSP430_ISA_15 15
85#define MSP430_ISA_16 16
86
87#define CHECK_RELOC_MSP430 ((imm_op || byte_op)?BFD_RELOC_MSP430_16_BYTE:BFD_RELOC_MSP430_16)
88#define CHECK_RELOC_MSP430_PCREL ((imm_op || byte_op)?BFD_RELOC_MSP430_16_PCREL_BYTE:BFD_RELOC_MSP430_16_PCREL)
89
90static struct mcu_type_s mcu_types[] =
91{
92 {"msp1", MSP430_ISA_11, bfd_mach_msp11},
93 {"msp2", MSP430_ISA_14, bfd_mach_msp14},
94 {"msp430x110", MSP430_ISA_11, bfd_mach_msp11},
95 {"msp430x112", MSP430_ISA_11, bfd_mach_msp11},
96 {"msp430x122", MSP430_ISA_12, bfd_mach_msp12},
97 {"msp430x122", MSP430_ISA_12, bfd_mach_msp12},
98 {"msp430x1222",MSP430_ISA_12, bfd_mach_msp12},
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99 {"msp430x1122",MSP430_ISA_11, bfd_mach_msp110},
100 {"msp430x1132",MSP430_ISA_11, bfd_mach_msp110},
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101 {"msp430x123", MSP430_ISA_12, bfd_mach_msp12},
102 {"msp430x1232",MSP430_ISA_12, bfd_mach_msp12},
103 {"msp430x133", MSP430_ISA_13, bfd_mach_msp13},
104 {"msp430x135", MSP430_ISA_13, bfd_mach_msp13},
105 {"msp430x147", MSP430_ISA_14, bfd_mach_msp14},
106 {"msp430x148", MSP430_ISA_14, bfd_mach_msp14},
107 {"msp430x149", MSP430_ISA_14, bfd_mach_msp14},
108 {"msp430x412", MSP430_ISA_41, bfd_mach_msp41},
109 {"msp430x413", MSP430_ISA_41, bfd_mach_msp41},
110 {"msp430x311", MSP430_ISA_31, bfd_mach_msp31},
111 {"msp430x312", MSP430_ISA_31, bfd_mach_msp31},
112 {"msp430x313", MSP430_ISA_31, bfd_mach_msp31},
113 {"msp430x314", MSP430_ISA_31, bfd_mach_msp31},
114 {"msp430x315", MSP430_ISA_31, bfd_mach_msp31},
115 {"msp430x323", MSP430_ISA_32, bfd_mach_msp32},
116 {"msp430x325", MSP430_ISA_32, bfd_mach_msp32},
117 {"msp430x336", MSP430_ISA_33, bfd_mach_msp33},
118 {"msp430x337", MSP430_ISA_33, bfd_mach_msp33},
119 {"msp430x1101",MSP430_ISA_110, bfd_mach_msp110},
120 {"msp430x1111",MSP430_ISA_110, bfd_mach_msp110},
121 {"msp430x1121",MSP430_ISA_110, bfd_mach_msp110},
122 {"msp430x1331",MSP430_ISA_13, bfd_mach_msp13},
123 {"msp430x1351",MSP430_ISA_13, bfd_mach_msp13},
124 {"msp430x435", MSP430_ISA_43, bfd_mach_msp43},
125 {"msp430x436", MSP430_ISA_43, bfd_mach_msp43},
11d78a89 126 {"msp430x437", MSP430_ISA_43, bfd_mach_msp43},
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127 {"msp430x447", MSP430_ISA_44, bfd_mach_msp44},
128 {"msp430x448", MSP430_ISA_44, bfd_mach_msp44},
129 {"msp430x449", MSP430_ISA_44, bfd_mach_msp44},
130 {"msp430x167", MSP430_ISA_16, bfd_mach_msp16},
131 {"msp430x168", MSP430_ISA_16, bfd_mach_msp16},
132 {"msp430x169", MSP430_ISA_16, bfd_mach_msp16},
133 {"msp430x155", MSP430_ISA_15, bfd_mach_msp15},
134 {"msp430x156", MSP430_ISA_15, bfd_mach_msp15},
135 {"msp430x157", MSP430_ISA_15, bfd_mach_msp15},
136
137 {NULL, 0, 0}
138};
139
140
141static struct mcu_type_s default_mcu =
142 { "msp430x11", MSP430_ISA_11, bfd_mach_msp11 };
143
144static struct mcu_type_s *msp430_mcu = &default_mcu;
145
146const pseudo_typeS md_pseudo_table[] =
147{
148 {"arch", msp430_set_arch, 0},
149 {NULL, NULL, 0}
150};
151
152#define OPTION_MMCU 'm'
153
154const char *md_shortopts = "m:";
155
156struct option md_longopts[] =
157{
158 {"mmcu", required_argument, NULL, OPTION_MMCU},
159 {NULL, no_argument, NULL, 0}
160};
161
162size_t md_longopts_size = sizeof (md_longopts);
163
164static void
165show_mcu_list (stream)
166 FILE *stream;
167{
168 int i;
169
170 fprintf (stream, _("Known MCU names:\n"));
171
172 for (i = 0; mcu_types[i].name; i++)
173 fprintf (stream, _("\t %s\n"), mcu_types[i].name);
174
175 fprintf (stream, "\n");
176}
177
178void
179md_show_usage (stream)
180 FILE *stream;
181{
182 fprintf (stream,
183 _("MSP430 options:\n"
184 " -mmcu=[msp430-name] select microcontroller type\n"
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185 " msp430x110 msp430x112\n"
186 " msp430x1101 msp430x1111\n"
187 " msp430x1121 msp430x1122 msp430x1132\n"
188 " msp430x122 msp430x123\n"
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189 " msp430x1222 msp430x1232\n"
190 " msp430x133 msp430x135\n"
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191 " msp430x1331 msp430x1351\n"
192 " msp430x147 msp430x148 msp430x149\n"
193 " msp430x155 msp430x156 msp430x157\n"
194 " msp430x167 msp430x168 msp430x169\n"
195 " msp430x311 msp430x312 msp430x313 msp430x314 msp430x315\n"
196 " msp430x323 msp430x325\n"
197 " msp430x336 msp430x337\n"
198 " msp430x412 msp430x413\n"
199 " msp430x435 msp430x436 msp430x437\n"
200 " msp430x447 msp430x448 msp430x449\n"));
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201
202 show_mcu_list (stream);
203}
204
205static char *
206extract_word (char *from, char *to, int limit)
207{
208 char *op_start;
209 char *op_end;
210 int size = 0;
211
212 /* Drop leading whitespace. */
213 from = skip_space (from);
214 *to = 0;
215
216 /* Find the op code end. */
217 for (op_start = op_end = from; *op_end != 0 && is_part_of_name (*op_end);)
218 {
219 to[size++] = *op_end++;
220 if (size + 1 >= limit)
221 break;
222 }
223
224 to[size] = 0;
225 return op_end;
226}
227
228static void
229msp430_set_arch (dummy)
230 int dummy ATTRIBUTE_UNUSED;
231{
232 char *str = (char *) alloca (32); /* 32 for good measure. */
233
234 input_line_pointer = extract_word (input_line_pointer, str, 32);
235
236 md_parse_option (OPTION_MMCU, str);
237 bfd_set_arch_mach (stdoutput, TARGET_ARCH, msp430_mcu->mach);
238}
239
240int
241md_parse_option (c, arg)
242 int c;
243 char *arg;
244{
245 int i;
246
247 switch (c)
248 {
249 case OPTION_MMCU:
250 for (i = 0; mcu_types[i].name; ++i)
251 if (strcmp (mcu_types[i].name, arg) == 0)
252 break;
253
254 if (!mcu_types[i].name)
255 {
256 show_mcu_list (stderr);
257 as_fatal (_("unknown MCU: %s\n"), arg);
258 }
259
260 if (msp430_mcu == &default_mcu || msp430_mcu->mach == mcu_types[i].mach)
261 msp430_mcu = &mcu_types[i];
262 else
263 as_fatal (_("redefinition of mcu type %s' to %s'"),
264 msp430_mcu->name, mcu_types[i].name);
265 return 1;
266 }
267
268 return 0;
269}
270
271symbolS *
272md_undefined_symbol (name)
273 char *name ATTRIBUTE_UNUSED;
274{
275 return 0;
276}
277
278static inline char *
279skip_space (s)
280 char *s;
281{
282 while (ISSPACE (*s))
283 ++s;
284 return s;
285}
286
287/* Delete spaces from s: X ( r 1 2) => X(r12). */
288
289static void
290del_spaces (s)
291 char *s;
292{
293 while (*s)
294 {
295 if (ISSPACE (*s))
296 {
297 char *m = s + 1;
298
299 while (ISSPACE (*m) && *m)
300 m++;
301 memmove (s, m, strlen (m) + 1);
302 }
303 else
304 s++;
305 }
306}
307
308/* Extract one word from FROM and copy it to TO. Delimeters are ",;\n" */
309
310static char *
311extract_operand (char *from, char *to, int limit)
312{
313 int size = 0;
314
315 /* Drop leading whitespace. */
316 from = skip_space (from);
317
318 while (size < limit && *from)
319 {
320 *(to + size) = *from;
321 if (*from == ',' || *from == ';' || *from == '\n')
322 break;
323 from++;
324 size++;
325 }
326
327 *(to + size) = 0;
328 del_spaces (to);
329
330 from++;
331
332 return from;
333}
334
335static char *
336extract_cmd (char *from, char *to, int limit)
337{
338 int size = 0;
339
340 while (*from && ! ISSPACE (*from) && *from != '.' && limit > size)
341 {
342 *(to + size) = *from;
343 from++;
344 size++;
345 }
346
347 *(to + size) = 0;
348
349 return from;
350}
351
352/* Turn a string in input_line_pointer into a floating point constant
353 of type TYPE, and store the appropriate bytes in *LITP. The number
354 of LITTLENUMS emitted is stored in *SIZEP. An error message is
355 returned, or NULL on OK. */
356
357char *
358md_atof (type, litP, sizeP)
359 int type;
360 char *litP;
361 int *sizeP;
362{
363 int prec;
364 LITTLENUM_TYPE words[4];
365 LITTLENUM_TYPE *wordP;
366 char *t;
367
368 switch (type)
369 {
370 case 'f':
371 prec = 2;
372 break;
373 case 'd':
374 prec = 4;
375 break;
376 default:
377 *sizeP = 0;
378 return _("bad call to md_atof");
379 }
380
381 t = atof_ieee (input_line_pointer, type, words);
382 if (t)
383 input_line_pointer = t;
384
385 *sizeP = prec * sizeof (LITTLENUM_TYPE);
386
387 /* This loop outputs the LITTLENUMs in REVERSE order. */
388 for (wordP = words + prec - 1; prec--;)
389 {
390 md_number_to_chars (litP, (valueT) (*wordP--), sizeof (LITTLENUM_TYPE));
391 litP += sizeof (LITTLENUM_TYPE);
392 }
393
394 return NULL;
395}
396
397void
398md_convert_frag (abfd, sec, fragP)
399 bfd *abfd ATTRIBUTE_UNUSED;
400 asection *sec ATTRIBUTE_UNUSED;
401 fragS *fragP ATTRIBUTE_UNUSED;
402{
403 abort ();
404}
405
406void
407md_begin ()
408{
409 struct msp430_opcode_s *opcode;
410 msp430_hash = hash_new ();
411
412 for (opcode = msp430_opcodes; opcode->name; opcode++)
413 hash_insert (msp430_hash, opcode->name, (char *) opcode);
414
415 bfd_set_arch_mach (stdoutput, TARGET_ARCH, msp430_mcu->mach);
416}
417
418void
419md_assemble (str)
420 char *str;
421{
422 struct msp430_opcode_s *opcode;
423 char cmd[32];
424 unsigned int i = 0;
425
426 str = skip_space (str); /* Skip leading spaces. */
427 str = extract_cmd (str, cmd, sizeof (cmd));
428
429 while (cmd[i] && i < sizeof (cmd))
430 {
df25fda5 431 char a = TOLOWER (cmd[i]);
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432 cmd[i] = a;
433 i++;
434 }
435
436 if (!cmd[0])
437 {
438 as_bad (_("can't find opcode "));
439 return;
440 }
441
442 opcode = (struct msp430_opcode_s *) hash_find (msp430_hash, cmd);
443
444 if (opcode == NULL)
445 {
446 as_bad (_("unknown opcode `%s'"), cmd);
447 return;
448 }
449
450 {
451 char *__t = input_line_pointer;
452 msp430_operands (opcode, str);
453 input_line_pointer = __t;
454 }
455}
456
457/* Parse instruction operands.
458 Return binary opcode. */
459
460static unsigned int
461msp430_operands (opcode, line)
462 struct msp430_opcode_s *opcode;
463 char *line;
464{
465 int bin = opcode->bin_opcode; /* opcode mask. */
466 int __is;
467 char l1[MAX_OP_LEN], l2[MAX_OP_LEN];
468 char *frag;
469 int where;
470 struct msp430_operand_s op1, op2;
471 int res = 0;
472 static short ZEROS = 0;
473 int byte_op, imm_op;
474
475 /* opcode is the one from opcodes table
476 line contains something like
477 [.w] @r2+, 5(R1)
478 or
479 .b @r2+, 5(R1). */
480
481 /* Check if byte or word operation. */
df25fda5 482 if (*line == '.' && TOLOWER (*(line + 1)) == 'b')
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483 {
484 bin |= BYTE_OPERATION;
485 byte_op = 1;
486 }
487 else
488 byte_op = 0;
489
490 /* skip .[bwBW]. */
491 while (! ISSPACE (*line) && *line)
492 line++;
493
494 if (opcode->insn_opnumb && (!*line || *line == '\n'))
495 {
496 as_bad (_("instruction %s requires %d operand(s)"),
497 opcode->name, opcode->insn_opnumb);
498 return 0;
499 }
500
501 memset (l1, 0, sizeof (l1));
502 memset (l2, 0, sizeof (l2));
503 memset (&op1, 0, sizeof (op1));
504 memset (&op2, 0, sizeof (op2));
505
506 imm_op = 0;
507
508 switch (opcode->fmt)
509 {
510 case 0: /* Emulated. */
511 switch (opcode->insn_opnumb)
512 {
513 case 0:
514 /* Set/clear bits instructions. */
515 __is = 2;
516 frag = frag_more (__is);
517 bfd_putl16 ((bfd_vma) bin, frag);
518 break;
519 case 1:
520 /* Something which works with destination operand. */
521 line = extract_operand (line, l1, sizeof (l1));
522 res = msp430_dstoperand (&op1, l1, opcode->bin_opcode);
523 if (res)
524 break;
525
526 bin |= (op1.reg | (op1.am << 7));
527 __is = 1 + op1.ol;
528 frag = frag_more (2 * __is);
529 where = frag - frag_now->fr_literal;
530 bfd_putl16 ((bfd_vma) bin, frag);
531
532 if (op1.mode == OP_EXP)
533 {
534 where += 2;
535 bfd_putl16 ((bfd_vma) ZEROS, frag + 2);
536
537 if (op1.reg)
538 fix_new_exp (frag_now, where, 2,
539 &(op1.exp), FALSE, CHECK_RELOC_MSP430);
540 else
541 fix_new_exp (frag_now, where, 2,
542 &(op1.exp), TRUE, CHECK_RELOC_MSP430_PCREL);
543 }
544 break;
545
546 case 2:
547 {
548 char l2[16];
549
550 /* Shift instruction. */
551 line = extract_operand (line, l1, sizeof (l1));
552 strncpy (l2, l1, 16);
553 res = msp430_srcoperand (&op1, l1, opcode->bin_opcode, &imm_op);
554 res += msp430_dstoperand (&op2, l2, opcode->bin_opcode);
555
556 if (res)
557 break; /* An error occured. All warnings were done before. */
558
559 bin |= (op2.reg | (op1.reg << 8) | (op1.am << 4) | (op2.am << 7));
560
561 __is = 1 + op1.ol + op2.ol; /* insn size in words. */
562 frag = frag_more (2 * __is);
563 where = frag - frag_now->fr_literal;
564 bfd_putl16 ((bfd_vma) bin, frag);
565
566 if (op1.mode == OP_EXP)
567 {
568 where += 2; /* Advance 'where' as we do not know _where_. */
569 bfd_putl16 ((bfd_vma) ZEROS, frag + 2);
570
571 if (op1.reg || (op1.reg == 0 && op1.am == 3)) /* Not PC relative. */
572 fix_new_exp (frag_now, where, 2,
573 &(op1.exp), FALSE, CHECK_RELOC_MSP430);
574 else
575 fix_new_exp (frag_now, where, 2,
576 &(op1.exp), TRUE, CHECK_RELOC_MSP430_PCREL);
577 }
578
579 if (op2.mode == OP_EXP)
580 {
581 imm_op = 0;
582 bfd_putl16 ((bfd_vma) ZEROS, frag + 2 + ((__is == 3) ? 2 : 0));
583
584 if (op2.reg) /* Not PC relative. */
585 fix_new_exp (frag_now, where + 2, 2,
586 &(op2.exp), FALSE, CHECK_RELOC_MSP430);
587 else
588 fix_new_exp (frag_now, where + 2, 2,
589 &(op2.exp), TRUE, CHECK_RELOC_MSP430_PCREL);
590 }
591 break;
592 }
593 case 3:
594 /* Branch instruction => mov dst, r0. */
595 line = extract_operand (line, l1, sizeof (l1));
596
597 res = msp430_srcoperand (&op1, l1, opcode->bin_opcode, &imm_op);
598 if (res)
599 break;
600
601 byte_op = 0;
602 imm_op = 0;
603
604 bin |= ((op1.reg << 8) | (op1.am << 4));
605 __is = 1 + op1.ol;
606 frag = frag_more (2 * __is);
607 where = frag - frag_now->fr_literal;
608 bfd_putl16 ((bfd_vma) bin, frag);
609
610 if (op1.mode == OP_EXP)
611 {
612 where += 2;
613 bfd_putl16 ((bfd_vma) ZEROS, frag + 2);
614
615 if (op1.reg || (op1.reg == 0 && op1.am == 3))
616 fix_new_exp (frag_now, where, 2,
617 &(op1.exp), FALSE, CHECK_RELOC_MSP430);
618 else
619 fix_new_exp (frag_now, where, 2,
620 &(op1.exp), TRUE, CHECK_RELOC_MSP430_PCREL);
621 }
622 break;
623 }
624 break;
625
626 case 1: /* Format 1, double operand. */
627 line = extract_operand (line, l1, sizeof (l1));
628 line = extract_operand (line, l2, sizeof (l2));
629 res = msp430_srcoperand (&op1, l1, opcode->bin_opcode, &imm_op);
630 res += msp430_dstoperand (&op2, l2, opcode->bin_opcode);
631
632 if (res)
633 break; /* Error occured. All warnings were done before. */
634
635 bin |= (op2.reg | (op1.reg << 8) | (op1.am << 4) | (op2.am << 7));
636
637 __is = 1 + op1.ol + op2.ol; /* insn size in words. */
638 frag = frag_more (2 * __is);
639 where = frag - frag_now->fr_literal;
640 bfd_putl16 ((bfd_vma) bin, frag);
641
642 if (op1.mode == OP_EXP)
643 {
644 where += 2; /* Advance where as we do not know _where_. */
645 bfd_putl16 ((bfd_vma) ZEROS, frag + 2);
646
647 if (op1.reg || (op1.reg == 0 && op1.am == 3)) /* Not PC relative. */
648 fix_new_exp (frag_now, where, 2,
649 &(op1.exp), FALSE, CHECK_RELOC_MSP430);
650 else
651 fix_new_exp (frag_now, where, 2,
652 &(op1.exp), TRUE, CHECK_RELOC_MSP430_PCREL);
653 }
654
655 if (op2.mode == OP_EXP)
656 {
657 imm_op = 0;
658 bfd_putl16 ((bfd_vma) ZEROS, frag + 2 + ((__is == 3) ? 2 : 0));
659
660 if (op2.reg) /* Not PC relative. */
661 fix_new_exp (frag_now, where + 2, 2,
662 &(op2.exp), FALSE, CHECK_RELOC_MSP430);
663 else
664 fix_new_exp (frag_now, where + 2, 2,
665 &(op2.exp), TRUE, CHECK_RELOC_MSP430_PCREL);
666 }
667 break;
668
669 case 2: /* Single-operand mostly instr. */
670 if (opcode->insn_opnumb == 0)
671 {
672 /* reti instruction. */
673 frag = frag_more (2);
674 bfd_putl16 ((bfd_vma) bin, frag);
675 break;
676 }
677
678 line = extract_operand (line, l1, sizeof (l1));
679 res = msp430_srcoperand (&op1, l1, opcode->bin_opcode, &imm_op);
680 if (res)
681 break; /* Error in operand. */
682
683 bin |= op1.reg | (op1.am << 4);
684 __is = 1 + op1.ol;
685 frag = frag_more (2 * __is);
686 where = frag - frag_now->fr_literal;
687 bfd_putl16 ((bfd_vma) bin, frag);
688
689 if (op1.mode == OP_EXP)
690 {
691 bfd_putl16 ((bfd_vma) ZEROS, frag + 2);
692
693 if (op1.reg || (op1.reg == 0 && op1.am == 3)) /* Not PC relative. */
694 fix_new_exp (frag_now, where + 2, 2,
695 &(op1.exp), FALSE, CHECK_RELOC_MSP430);
696 else
697 fix_new_exp (frag_now, where + 2, 2,
698 &(op1.exp), TRUE, CHECK_RELOC_MSP430_PCREL);
699 }
700 break;
701
702 case 3: /* Conditional jumps instructions. */
703 line = extract_operand (line, l1, sizeof (l1));
704 /* l1 is a label. */
705 if (l1[0])
706 {
707 char *m = l1;
708 expressionS exp;
709
710 if (*m == '$')
711 m++;
712
713 parse_exp (m, &exp);
714 frag = frag_more (2); /* Instr size is 1 word. */
715
716 /* In order to handle something like:
717
718 and #0x8000, r5
719 tst r5
720 jz 4 ; skip next 4 bytes
721 inv r5
722 inc r5
723 nop ; will jump here if r5 positive or zero
724
725 jCOND -n ;assumes jump n bytes backward:
726
727 mov r5,r6
728 jmp -2
729
730 is equial to:
731 lab:
732 mov r5,r6
733 jmp lab
734
735 jCOND $n ; jump from PC in either direction. */
736
737 if (exp.X_op == O_constant)
738 {
739 int x = exp.X_add_number;
740
741 if (x & 1)
742 {
743 as_warn (_("Even number required. Rounded to %d"), x + 1);
744 x++;
745 }
746
747 if ((*l1 == '$' && x > 0) || x < 0)
748 x -= 2;
749
750 x >>= 1;
751
752 if (x > 512 || x < -511)
753 {
754 as_bad (_("Wrong displacement %d"), x << 1);
755 break;
756 }
757
758 bin |= x & 0x3ff;
759 bfd_putl16 ((bfd_vma) bin, frag);
760 }
761 else if (exp.X_op == O_symbol && *l1 != '$')
762 {
763 where = frag - frag_now->fr_literal;
764 fix_new_exp (frag_now, where, 2,
765 &exp, TRUE, BFD_RELOC_MSP430_10_PCREL);
766
767 bfd_putl16 ((bfd_vma) bin, frag);
768 }
769 else if (*l1 == '$')
770 {
771 as_bad (_("instruction requires label sans '$'"));
772 break;
773 }
774 else
775 {
776 as_bad (_
777 ("instruction requires label or value in range -511:512"));
778 break;
779 }
780 }
781 else
782 {
783 as_bad (_("instruction requires label"));
784 break;
785 }
786 break;
787
788 default:
789 as_bad (_("Ilegal instruction or not implmented opcode."));
790 }
791
792 input_line_pointer = line;
793 return 0;
794}
795
796static int
797msp430_dstoperand (op, l, bin)
798 struct msp430_operand_s *op;
799 char *l;
800 int bin;
801{
802 int dummy;
803 int ret = msp430_srcoperand (op, l, bin, &dummy);
804 if (ret)
805 return ret;
806
807 if (op->am == 2)
808 {
809 char *__tl = "0";
810
811 op->mode = OP_EXP;
812 op->am = 1;
813 op->ol = 1;
814 parse_exp (__tl, &(op->exp));
815 if (op->exp.X_op != O_constant || op->exp.X_add_number != 0)
816 {
817 as_bad (_("Internal bug. Try to use 0(r%d) instead of @r%d"),
818 op->reg, op->reg);
819 return 1;
820 }
821 return 0;
822 }
823
824 if (op->am > 1)
825 {
826 as_bad (_
827 ("this addressing mode is not applicable for destination operand"));
828 return 1;
829 }
830 return 0;
831}
832
833
834static int
835check_reg (t)
836 char *t;
837{
838 /* If this is a reg numb, str 't' must be a number from 0 - 15. */
839
840 if (strlen (t) > 2 && *(t + 2) != '+')
841 return 1;
842
843 while (*t)
844 {
845 if ((*t < '0' || *t > '9') && *t != '+')
846 break;
847 t++;
848 }
849
850 if (*t)
851 return 1;
852
853 return 0;
854}
855
856
857static int
858msp430_srcoperand (op, l, bin, imm_op)
859 struct msp430_operand_s *op;
860 char *l;
861 int bin;
862 int *imm_op;
863{
864 char *__tl = l;
865
866 /* Check if an immediate #VALUE. The hash sign should be only at the beginning! */
867 if (*l == '#')
868 {
869 char *h = l;
870 int vshift = -1;
871 int rval = 0;
872
873 /* Check if there is:
874 llo(x) - least significant 16 bits, x &= 0xffff
875 lhi(x) - x = (x >> 16) & 0xffff,
876 hlo(x) - x = (x >> 32) & 0xffff,
877 hhi(x) - x = (x >> 48) & 0xffff
878 The value _MUST_ be constant expression: #hlo(1231231231). */
879
880 *imm_op = 1;
881
882 if (strncasecmp (h, "#llo(", 5) == 0)
883 {
884 vshift = 0;
885 rval = 3;
886 }
887 else if (strncasecmp (h, "#lhi(", 5) == 0)
888 {
889 vshift = 1;
890 rval = 3;
891 }
892 else if (strncasecmp (h, "#hlo(", 5) == 0)
893 {
894 vshift = 2;
895 rval = 3;
896 }
897 else if (strncasecmp (h, "#hhi(", 5) == 0)
898 {
899 vshift = 3;
900 rval = 3;
901 }
902 else if (strncasecmp (h, "#lo(", 4) == 0)
903 {
904 vshift = 0;
905 rval = 2;
906 }
907 else if (strncasecmp (h, "#hi(", 4) == 0)
908 {
909 vshift = 1;
910 rval = 2;
911 }
912
913 op->reg = 0; /* Reg PC. */
914 op->am = 3;
915 op->ol = 1; /* Immediate will follow an instruction. */
916 __tl = h + 1 + rval;
917 op->mode = OP_EXP;
918 parse_exp (__tl, &(op->exp));
919 if (op->exp.X_op == O_constant)
920 {
921 int x = op->exp.X_add_number;
922
923 if (vshift == 0)
924 {
925 x = x & 0xffff;
926 op->exp.X_add_number = x;
927 }
928 else if (vshift == 1)
929 {
930 x = (x >> 16) & 0xffff;
931 op->exp.X_add_number = x;
932 }
933 else if (vshift > 1)
934 {
935 if (x < 0)
936 op->exp.X_add_number = -1;
937 else
938 op->exp.X_add_number = 0; /* Nothing left. */
939 x = op->exp.X_add_number;
940 }
941
942 if (op->exp.X_add_number > 65535 || op->exp.X_add_number < -32768)
943 {
944 as_bad (_("value %ld out of range. Use #lo() or #hi()"), x);
945 return 1;
946 }
947
948 /* Now check constants. */
949 /* Substitude register mode with a constant generator if applicable. */
950
951 x = (short) x; /* Extend sign. */
952
953 if (x == 0)
954 {
955 op->reg = 3;
956 op->am = 0;
957 op->ol = 0;
958 op->mode = OP_REG;
959 }
960 else if (x == 1)
961 {
962 op->reg = 3;
963 op->am = 1;
964 op->ol = 0;
965 op->mode = OP_REG;
966 }
967 else if (x == 2)
968 {
969 op->reg = 3;
970 op->am = 2;
971 op->ol = 0;
972 op->mode = OP_REG;
973 }
974 else if (x == -1)
975 {
976 op->reg = 3;
977 op->am = 3;
978 op->ol = 0;
979 op->mode = OP_REG;
980 }
981 else if (x == 4)
982 {
983#ifdef PUSH_1X_WORKAROUND
984 if (bin == 0x1200
985 && (msp430_mcu->isa == MSP430_ISA_11
986 || msp430_mcu->isa == MSP430_ISA_12
987 || msp430_mcu->isa == MSP430_ISA_13
988 || msp430_mcu->isa == MSP430_ISA_14))
989 {
990 /* Remove warning as confusing.
991 as_warn(_("Hardware push bug workaround")); */
992 }
993 else
994#endif
995 {
996 op->reg = 2;
997 op->am = 2;
998 op->ol = 0;
999 op->mode = OP_REG;
1000 }
1001 }
1002 else if (x == 8)
1003 {
1004#ifdef PUSH_1X_WORKAROUND
1005 if (bin == 0x1200
1006 && (msp430_mcu->isa == MSP430_ISA_11
1007 || msp430_mcu->isa == MSP430_ISA_12
1008 || msp430_mcu->isa == MSP430_ISA_13
1009 || msp430_mcu->isa == MSP430_ISA_14))
1010 {
1011 /* Remove warning as confusing.
1012 as_warn(_("Hardware push bug workaround")); */
1013 }
1014 else
1015#endif
1016 {
1017 op->reg = 2;
1018 op->am = 3;
1019 op->ol = 0;
1020 op->mode = OP_REG;
1021 }
1022 }
1023 }
1024 else if (op->exp.X_op == O_symbol)
1025 {
1026 op->mode = OP_EXP;
1027 }
1028 else if (op->exp.X_op == O_big)
1029 {
1030 short x;
1031 if (vshift != -1)
1032 {
1033 op->exp.X_op = O_constant;
1034 op->exp.X_add_number = 0xffff & generic_bignum[vshift];
1035 x = op->exp.X_add_number;
1036 }
1037 else
1038 {
1039 as_bad (_
1040 ("unknown expression in operand %s. use #llo() #lhi() #hlo() #hhi() "),
1041 l);
1042 return 1;
1043 }
1044
1045 if (x == 0)
1046 {
1047 op->reg = 3;
1048 op->am = 0;
1049 op->ol = 0;
1050 op->mode = OP_REG;
1051 }
1052 else if (x == 1)
1053 {
1054 op->reg = 3;
1055 op->am = 1;
1056 op->ol = 0;
1057 op->mode = OP_REG;
1058 }
1059 else if (x == 2)
1060 {
1061 op->reg = 3;
1062 op->am = 2;
1063 op->ol = 0;
1064 op->mode = OP_REG;
1065 }
1066 else if (x == -1)
1067 {
1068 op->reg = 3;
1069 op->am = 3;
1070 op->ol = 0;
1071 op->mode = OP_REG;
1072 }
1073 else if (x == 4)
1074 {
1075 op->reg = 2;
1076 op->am = 2;
1077 op->ol = 0;
1078 op->mode = OP_REG;
1079 }
1080 else if (x == 8)
1081 {
1082 op->reg = 2;
1083 op->am = 3;
1084 op->ol = 0;
1085 op->mode = OP_REG;
1086 }
1087 }
1088 else
1089 {
1090 as_bad (_("unknown operand %s"), l);
1091 }
1092 return 0;
1093 }
1094
1095 /* Check if absolute &VALUE (assume that we can construct something like ((a&b)<<7 + 25). */
1096 if (*l == '&')
1097 {
1098 char *h = l;
1099
1100 op->reg = 2; /* reg 2 in absolute addr mode. */
1101 op->am = 1; /* mode As == 01 bin. */
1102 op->ol = 1; /* Immediate value followed by instruction. */
1103 __tl = h + 1;
1104 parse_exp (__tl, &(op->exp));
1105 op->mode = OP_EXP;
1106 if (op->exp.X_op == O_constant)
1107 {
1108 int x = op->exp.X_add_number;
1109 if (x > 65535 || x < -32768)
1110 {
1111 as_bad (_("value out of range: %d"), x);
1112 return 1;
1113 }
1114 }
1115 else if (op->exp.X_op == O_symbol)
1116 {
1117 }
1118 else
1119 {
1120 as_bad (_("unknown expression in operand %s"), l);
1121 return 1;
1122 }
1123 return 0;
1124 }
1125
1126 /* Check if inderect register mode @Rn / postincrement @Rn+. */
1127 if (*l == '@')
1128 {
1129 char *t = l;
1130 char *m = strchr (l, '+');
1131
1132 if (t != l)
1133 {
1134 as_bad (_("unknown addressing mode %s"), l);
1135 return 1;
1136 }
1137
1138 t++;
1139 if (*t != 'r' && *t != 'R')
1140 {
1141 as_bad (_("unknown addressing mode %s"), l);
1142 return 1;
1143 }
1144
1145 t++; /* Points to the reg value. */
1146
1147 if (check_reg (t))
1148 {
1149 as_bad (_("Bad register name r%s"), t);
1150 return 1;
1151 }
1152
1153 op->mode = OP_REG;
1154 op->am = m ? 3 : 2;
1155 op->ol = 0;
1156 if (m)
1157 *m = 0; /* strip '+' */
1158 op->reg = atoi (t);
1159 if (op->reg < 0 || op->reg > 15)
1160 {
1161 as_bad (_("MSP430 does not have %d registers"), op->reg);
1162 return 1;
1163 }
1164
1165 return 0;
1166 }
1167
1168 /* Check if register indexed X(Rn). */
1169 do
1170 {
1171 char *h = strrchr (l, '(');
1172 char *m = strrchr (l, ')');
1173 char *t;
1174
1175 *imm_op = 1;
1176
1177 if (!h)
1178 break;
1179 if (!m)
1180 {
1181 as_bad (_("')' required"));
1182 return 1;
1183 }
1184
1185 t = h;
1186 op->am = 1;
1187 op->ol = 1;
1188 /* Extract a register. */
1189 t++; /* Advance pointer. */
1190
1191 if (*t != 'r' && *t != 'R')
1192 {
1193 as_bad (_
1194 ("unknown operator %s. Did you mean X(Rn) or #[hl][hl][oi](CONST) ?"),
1195 l);
1196 return 1;
1197 }
1198 t++;
1199
1200 op->reg = *t - '0';
1201 if (op->reg > 9 || op->reg < 0)
1202 {
1203 as_bad (_("unknown operator (r%s substituded as a register name"),
1204 t);
1205 return 1;
1206 }
1207 t++;
1208 if (*t != ')')
1209 {
1210 op->reg = op->reg * 10;
1211 op->reg += *t - '0';
1212
1213 if (op->reg > 15)
1214 {
1215 as_bad (_("unknown operator %s"), l);
1216 return 1;
1217 }
1218 if (op->reg == 2)
1219 {
1220 as_bad (_("r2 should not be used in indexed addressing mode"));
1221 return 1;
1222 }
1223
1224 if (*(t + 1) != ')')
1225 {
1226 as_bad (_("unknown operator %s"), l);
1227 return 1;
1228 }
1229 }
1230
1231 /* Extract constant. */
1232 __tl = l;
1233 *h = 0;
1234 op->mode = OP_EXP;
1235 parse_exp (__tl, &(op->exp));
1236 if (op->exp.X_op == O_constant)
1237 {
1238 int x = op->exp.X_add_number;
1239
1240 if (x > 65535 || x < -32768)
1241 {
1242 as_bad (_("value out of range: %d"), x);
1243 return 1;
1244 }
1245
1246 if (x == 0)
1247 {
1248 op->mode = OP_REG;
1249 op->am = 2;
1250 op->ol = 0;
1251 return 0;
1252 }
1253 }
1254 else if (op->exp.X_op == O_symbol)
1255 {
1256 }
1257 else
1258 {
1259 as_bad (_("unknown expression in operand %s"), l);
1260 return 1;
1261 }
1262
1263 return 0;
1264 }
1265 while (0);
1266
1267 /* Register mode 'mov r1,r2'. */
1268 do
1269 {
1270 char *t = l;
1271
1272 /* Operand should be a register. */
1273 if (*t == 'r' || *t == 'R')
1274 {
1275 int x = atoi (t + 1);
1276
1277 if (check_reg (t + 1))
1278 break;
1279
1280 if (x < 0 || x > 15)
1281 break; /* Symbolic mode. */
1282
1283 op->mode = OP_REG;
1284 op->am = 0;
1285 op->ol = 0;
1286 op->reg = x;
1287 return 0;
1288 }
1289 }
1290 while (0);
1291
1292 /* Symbolic mode 'mov a, b' == 'mov x(pc), y(pc)'. */
1293 do
1294 {
1295 char *t = l;
1296
1297 __tl = l;
1298
1299 while (*t)
1300 {
1301 /* alpha/number underline dot for labels. */
1302 if (! ISALNUM (*t) && *t != '_' && *t != '.')
1303 {
1304 as_bad (_("unknown operand %s"), l);
1305 return 1;
1306 }
1307 t++;
1308 }
1309
1310 op->mode = OP_EXP;
1311 op->reg = 0; /* PC relative... be careful. */
1312 op->am = 1;
1313 op->ol = 1;
1314 __tl = l;
1315 parse_exp (__tl, &(op->exp));
1316 return 0;
1317 }
1318 while (0);
1319
1320 /* Unreachable. */
1321 as_bad (_("unknown addressing mode for operand %s"), l);
1322 return 1;
1323}
1324
1325
1326/* GAS will call this function for each section at the end of the assembly,
1327 to permit the CPU backend to adjust the alignment of a section. */
1328
1329valueT
1330md_section_align (seg, addr)
1331 asection *seg;
1332 valueT addr;
1333{
1334 int align = bfd_get_section_alignment (stdoutput, seg);
1335
1336 return ((addr + (1 << align) - 1) & (-1 << align));
1337}
1338
1339/* If you define this macro, it should return the offset between the
1340 address of a PC relative fixup and the position from which the PC
1341 relative adjustment should be made. On many processors, the base
1342 of a PC relative instruction is the next instruction, so this
1343 macro would return the length of an instruction. */
1344
1345long
1346md_pcrel_from_section (fixp, sec)
1347 fixS *fixp;
1348 segT sec;
1349{
1350 if (fixp->fx_addsy != (symbolS *) NULL
1351 && (!S_IS_DEFINED (fixp->fx_addsy)
1352 || (S_GET_SEGMENT (fixp->fx_addsy) != sec)))
1353 return 0;
1354
1355 return fixp->fx_frag->fr_address + fixp->fx_where;
1356}
1357
1358/* GAS will call this for each fixup. It should store the correct
1359 value in the object file. */
1360
1361void
1362md_apply_fix3 (fixp, valuep, seg)
1363 fixS *fixp;
1364 valueT *valuep;
1365 segT seg;
1366{
1367 unsigned char *where;
1368 unsigned long insn;
1369 long value;
1370
1371 if (fixp->fx_addsy == (symbolS *) NULL)
1372 {
1373 value = *valuep;
1374 fixp->fx_done = 1;
1375 }
1376 else if (fixp->fx_pcrel)
1377 {
1378 segT s = S_GET_SEGMENT (fixp->fx_addsy);
1379
1380 if (fixp->fx_addsy && (s == seg || s == absolute_section))
1381 {
1382 value = S_GET_VALUE (fixp->fx_addsy) + *valuep;
1383 fixp->fx_done = 1;
1384 }
1385 else
1386 value = *valuep;
1387 }
1388 else
1389 {
1390 value = fixp->fx_offset;
1391
1392 if (fixp->fx_subsy != (symbolS *) NULL)
1393 {
1394 if (S_GET_SEGMENT (fixp->fx_subsy) == absolute_section)
1395 {
1396 value -= S_GET_VALUE (fixp->fx_subsy);
1397 fixp->fx_done = 1;
1398 }
1399 else
1400 {
1401 /* We don't actually support subtracting a symbol. */
1402 as_bad_where (fixp->fx_file, fixp->fx_line,
1403 _("expression too complex"));
1404 }
1405 }
1406 }
1407
1408 switch (fixp->fx_r_type)
1409 {
1410 default:
1411 fixp->fx_no_overflow = 1;
1412 break;
1413 case BFD_RELOC_MSP430_10_PCREL:
1414 break;
1415 }
1416
1417 if (fixp->fx_done)
1418 {
1419 /* Fetch the instruction, insert the fully resolved operand
1420 value, and stuff the instruction back again. */
1421
1422 where = fixp->fx_frag->fr_literal + fixp->fx_where;
1423
1424 insn = bfd_getl16 (where);
1425
1426 switch (fixp->fx_r_type)
1427 {
1428 case BFD_RELOC_MSP430_10_PCREL:
1429 if (value & 1)
1430 as_bad_where (fixp->fx_file, fixp->fx_line,
1431 _("odd address operand: %ld"), value);
1432
1433 /* Jumps are in words. */
1434 value >>= 1;
1435 --value; /* Correct PC. */
1436
1437 if (value < -512 || value > 511)
1438 as_bad_where (fixp->fx_file, fixp->fx_line,
1439 _("operand out of range: %ld"), value);
1440
1441 value &= 0x3ff; /* get rid of extended sign */
1442 bfd_putl16 ((bfd_vma) (value | insn), where);
1443 break;
1444
1445 case BFD_RELOC_MSP430_16_PCREL:
1446 if (value & 1)
1447 as_bad_where (fixp->fx_file, fixp->fx_line,
1448 _("odd address operand: %ld"), value);
1449
1450 /* Nothing to be corrected here. */
1451 if (value < -32768 || value > 65536)
1452 as_bad_where (fixp->fx_file, fixp->fx_line,
1453 _("operand out of range: %ld"), value);
1454
1455 value &= 0xffff; /* Get rid of extended sign. */
1456 bfd_putl16 ((bfd_vma) value, where);
1457 break;
1458
1459 case BFD_RELOC_MSP430_16_PCREL_BYTE:
1460 /* Nothing to be corrected here. */
1461 if (value < -32768 || value > 65536)
1462 as_bad_where (fixp->fx_file, fixp->fx_line,
1463 _("operand out of range: %ld"), value);
1464
1465 value &= 0xffff; /* Get rid of extended sign. */
1466 bfd_putl16 ((bfd_vma) value, where);
1467 break;
1468
1469 case BFD_RELOC_32:
1470 bfd_putl16 ((bfd_vma) value, where);
1471 break;
1472
1473 case BFD_RELOC_MSP430_16:
1474 case BFD_RELOC_16:
1475 case BFD_RELOC_MSP430_16_BYTE:
1476 value &= 0xffff;
1477 bfd_putl16 ((bfd_vma) value, where);
1478 break;
1479
1480 default:
1481 as_fatal (_("line %d: unknown relocation type: 0x%x"),
1482 fixp->fx_line, fixp->fx_r_type);
1483 break;
1484 }
1485 }
1486 else
1487 {
1488 fixp->fx_addnumber = value;
1489 }
1490 return;
1491}
1492
1493/* A `BFD_ASSEMBLER' GAS will call this to generate a reloc. GAS
1494 will pass the resulting reloc to `bfd_install_relocation'. This
1495 currently works poorly, as `bfd_install_relocation' often does the
1496 wrong thing, and instances of `tc_gen_reloc' have been written to
1497 work around the problems, which in turns makes it difficult to fix
1498 `bfd_install_relocation'. */
1499
1500/* If while processing a fixup, a reloc really needs to be created
1501 then it is done here. */
1502
1503arelent *
1504tc_gen_reloc (seg, fixp)
1505 asection *seg ATTRIBUTE_UNUSED;
1506 fixS *fixp;
1507{
1508 arelent *reloc;
1509
1510 reloc = (arelent *) xmalloc (sizeof (arelent));
1511
1512 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
1513 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1514
1515 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1516 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1517 if (reloc->howto == (reloc_howto_type *) NULL)
1518 {
1519 as_bad_where (fixp->fx_file, fixp->fx_line,
1520 _("reloc %d not supported by object file format"),
1521 (int) fixp->fx_r_type);
1522 return NULL;
1523 }
1524
1525 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
1526 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
1527 reloc->address = fixp->fx_offset;
1528
1529 reloc->addend = fixp->fx_offset;
1530
1531 return reloc;
1532}
1533
1534/* Parse ordinary expression. */
1535
1536static char *
1537parse_exp (s, op)
1538 char *s;
1539 expressionS *op;
1540{
1541 input_line_pointer = s;
1542 expression (op);
1543 if (op->X_op == O_absent)
1544 as_bad (_("missing operand"));
1545 return input_line_pointer;
1546}
1547
1548
1549int
1550md_estimate_size_before_relax (fragp, seg)
1551 fragS *fragp ATTRIBUTE_UNUSED;
1552 asection *seg ATTRIBUTE_UNUSED;
1553{
1554 abort ();
1555 return 0;
1556}
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