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[deliverable/binutils-gdb.git] / gas / config / tc-nios2.c
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36591ba1 1/* Altera Nios II assembler.
6f2750fe 2 Copyright (C) 2012-2016 Free Software Foundation, Inc.
36591ba1
SL		 3 Contributed by Nigel Gray (ngray@altera.com).
4 Contributed by Mentor Graphics, Inc.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
21 02110-1301, USA. */
22
23#include "as.h"
24#include "opcode/nios2.h"
25#include "elf/nios2.h"
26#include "tc-nios2.h"
27#include "bfd.h"
965b1d80 28#include "libbfd.h"
36591ba1
SL		 29#include "dwarf2dbg.h"
30#include "subsegs.h"
31#include "safe-ctype.h"
32#include "dw2gencfi.h"
33
34#ifndef OBJ_ELF
35/* We are not supporting any other target so we throw a compile time error. */
36OBJ_ELF not defined
37#endif
38
39/* We can choose our endianness at run-time, regardless of configuration. */
40extern int target_big_endian;
41
42/* This array holds the chars that always start a comment. If the
43 pre-processor is disabled, these aren't very useful. */
44const char comment_chars[] = "#";
45
46/* This array holds the chars that only start a comment at the beginning of
47 a line. If the line seems to have the form '# 123 filename'
48 .line and .file directives will appear in the pre-processed output. */
49/* Note that input_file.c hand checks for '#' at the beginning of the
50 first line of the input file. This is because the compiler outputs
51 #NO_APP at the beginning of its output. */
52/* Also note that C style comments are always supported. */
53const char line_comment_chars[] = "#";
54
55/* This array holds machine specific line separator characters. */
56const char line_separator_chars[] = ";";
57
58/* Chars that can be used to separate mant from exp in floating point nums. */
59const char EXP_CHARS[] = "eE";
60
61/* Chars that mean this number is a floating point constant. */
62/* As in 0f12.456 */
63/* or 0d1.2345e12 */
64const char FLT_CHARS[] = "rRsSfFdDxXpP";
65
66/* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be
67 changed in read.c. Ideally it shouldn't have to know about it at all,
68 but nothing is ideal around here. */
69
70/* Machine-dependent command-line options. */
71
72const char *md_shortopts = "r";
73
74struct option md_longopts[] = {
75#define OPTION_RELAX_ALL (OPTION_MD_BASE + 0)
76 {"relax-all", no_argument, NULL, OPTION_RELAX_ALL},
77#define OPTION_NORELAX (OPTION_MD_BASE + 1)
78 {"no-relax", no_argument, NULL, OPTION_NORELAX},
79#define OPTION_RELAX_SECTION (OPTION_MD_BASE + 2)
80 {"relax-section", no_argument, NULL, OPTION_RELAX_SECTION},
81#define OPTION_EB (OPTION_MD_BASE + 3)
82 {"EB", no_argument, NULL, OPTION_EB},
83#define OPTION_EL (OPTION_MD_BASE + 4)
965b1d80
SL		 84 {"EL", no_argument, NULL, OPTION_EL},
85#define OPTION_MARCH (OPTION_MD_BASE + 5)
86 {"march", required_argument, NULL, OPTION_MARCH}
36591ba1
SL		 87};
88
89size_t md_longopts_size = sizeof (md_longopts);
90
91/* The assembler supports three different relaxation modes, controlled by
92 command-line options. */
93typedef enum
94{
95 relax_section = 0,
96 relax_none,
97 relax_all
98} relax_optionT;
99
100/* Struct contains all assembler options set with .set. */
101struct
102{
103 /* .set noat -> noat = 1 allows assembly code to use at without warning
104 and macro expansions generate a warning.
105 .set at -> noat = 0, assembly code using at warn but macro expansions
106 do not generate warnings. */
107 bfd_boolean noat;
108
3739860c 109 /* .set nobreak -> nobreak = 1 allows assembly code to use ba,bt without
36591ba1
SL		 110 warning.
111 .set break -> nobreak = 0, assembly code using ba,bt warns. */
112 bfd_boolean nobreak;
113
114 /* .cmd line option -relax-all allows all branches and calls to be replaced
115 with longer versions.
116 -no-relax inhibits branch/call conversion.
117 The default value is relax_section, which relaxes branches within
118 a section. */
119 relax_optionT relax;
120
121} nios2_as_options = {FALSE, FALSE, relax_section};
122
123
124typedef struct nios2_insn_reloc
125{
126 /* Any expression in the instruction is parsed into this field,
127 which is passed to fix_new_exp() to generate a fixup. */
128 expressionS reloc_expression;
129
130 /* The type of the relocation to be applied. */
131 bfd_reloc_code_real_type reloc_type;
132
133 /* PC-relative. */
134 unsigned int reloc_pcrel;
135
136 /* The next relocation to be applied to the instruction. */
137 struct nios2_insn_reloc *reloc_next;
138} nios2_insn_relocS;
139
140/* This struct is used to hold state when assembling instructions. */
141typedef struct nios2_insn_info
142{
143 /* Assembled instruction. */
144 unsigned long insn_code;
96ba4233
SL		 145
146 /* Constant bits masked into insn_code for self-check mode. */
147 unsigned long constant_bits;
3739860c 148
36591ba1
SL		 149 /* Pointer to the relevant bit of the opcode table. */
150 const struct nios2_opcode *insn_nios2_opcode;
151 /* After parsing ptrs to the tokens in the instruction fill this array
152 it is terminated with a null pointer (hence the first +1).
153 The second +1 is because in some parts of the code the opcode
154 is not counted as a token, but still placed in this array. */
155 const char *insn_tokens[NIOS2_MAX_INSN_TOKENS + 1 + 1];
156
157 /* This holds information used to generate fixups
158 and eventually relocations if it is not null. */
159 nios2_insn_relocS *insn_reloc;
160} nios2_insn_infoS;
161
36591ba1
SL		 162
163/* This struct is used to convert Nios II pseudo-ops into the
164 corresponding real op. */
165typedef struct nios2_ps_insn_info
166{
167 /* Map this pseudo_op... */
168 const char *pseudo_insn;
169
170 /* ...to this real instruction. */
171 const char *insn;
172
173 /* Call this function to modify the operands.... */
174 void (*arg_modifer_func) (char ** parsed_args, const char *arg, int num,
175 int start);
176
177 /* ...with these arguments. */
178 const char *arg_modifier;
179 int num;
180 int index;
181
182 /* If arg_modifier_func allocates new memory, provide this function
183 to free it afterwards. */
184 void (*arg_cleanup_func) (char **parsed_args, int num, int start);
185} nios2_ps_insn_infoS;
186
187/* Opcode hash table. */
188static struct hash_control *nios2_opcode_hash = NULL;
189#define nios2_opcode_lookup(NAME) \
190 ((struct nios2_opcode *) hash_find (nios2_opcode_hash, (NAME)))
191
192/* Register hash table. */
193static struct hash_control *nios2_reg_hash = NULL;
194#define nios2_reg_lookup(NAME) \
195 ((struct nios2_reg *) hash_find (nios2_reg_hash, (NAME)))
196
36591ba1
SL		 197
198/* Pseudo-op hash table. */
199static struct hash_control *nios2_ps_hash = NULL;
200#define nios2_ps_lookup(NAME) \
201 ((nios2_ps_insn_infoS *) hash_find (nios2_ps_hash, (NAME)))
202
203/* The known current alignment of the current section. */
204static int nios2_current_align;
205static segT nios2_current_align_seg;
206
207static int nios2_auto_align_on = 1;
208
209/* The last seen label in the current section. This is used to auto-align
210 labels preceeding instructions. */
211static symbolS *nios2_last_label;
212
c8c8175b
SL		 213/* If we saw a 16-bit CDX instruction, we can align on 2-byte boundaries
214 instead of 4-bytes. Use this to keep track of the minimum power-of-2
215 alignment. */
216static int nios2_min_align = 2;
217
36591ba1
SL		 218#ifdef OBJ_ELF
219/* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
220symbolS *GOT_symbol;
221#endif
222
965b1d80
SL		 223/* The processor architecture value, EF_NIOS2_ARCH_R1 by default. */
224static int nios2_architecture = EF_NIOS2_ARCH_R1;
225
36591ba1
SL		 226\f
227/** Utility routines. */
228/* Function md_chars_to_number takes the sequence of
229 bytes in buf and returns the corresponding value
230 in an int. n must be 1, 2 or 4. */
231static valueT
232md_chars_to_number (char *buf, int n)
233{
234 int i;
235 valueT val;
236
237 gas_assert (n == 1 || n == 2 || n == 4);
238
239 val = 0;
240 if (target_big_endian)
241 for (i = 0; i < n; ++i)
242 val = val | ((buf[i] & 0xff) << 8 * (n - (i + 1)));
243 else
244 for (i = 0; i < n; ++i)
245 val = val | ((buf[i] & 0xff) << 8 * i);
246 return val;
247}
248
249
250/* This function turns a C long int, short int or char
251 into the series of bytes that represent the number
252 on the target machine. */
253void
254md_number_to_chars (char *buf, valueT val, int n)
255{
256 gas_assert (n == 1 || n == 2 || n == 4 || n == 8);
257 if (target_big_endian)
258 number_to_chars_bigendian (buf, val, n);
259 else
260 number_to_chars_littleendian (buf, val, n);
261}
262
263/* Turn a string in input_line_pointer into a floating point constant
264 of type TYPE, and store the appropriate bytes in *LITP. The number
265 of LITTLENUMS emitted is stored in *SIZEP. An error message is
266 returned, or NULL on OK. */
6d4af3c2 267const char *
36591ba1
SL		 268md_atof (int type, char *litP, int *sizeP)
269{
270 int prec;
271 LITTLENUM_TYPE words[4];
272 char *t;
273 int i;
274
275 switch (type)
276 {
277 case 'f':
278 prec = 2;
279 break;
280 case 'd':
281 prec = 4;
282 break;
283 default:
284 *sizeP = 0;
285 return _("bad call to md_atof");
286 }
287
288 t = atof_ieee (input_line_pointer, type, words);
289 if (t)
290 input_line_pointer = t;
291
292 *sizeP = prec * 2;
293
294 if (! target_big_endian)
295 for (i = prec - 1; i >= 0; i--, litP += 2)
296 md_number_to_chars (litP, (valueT) words[i], 2);
297 else
298 for (i = 0; i < prec; i++, litP += 2)
299 md_number_to_chars (litP, (valueT) words[i], 2);
300
301 return NULL;
302}
303
304/* Return true if STR starts with PREFIX, which should be a string literal. */
305#define strprefix(STR, PREFIX) \
306 (strncmp ((STR), PREFIX, strlen (PREFIX)) == 0)
307
36591ba1
SL		 308
309/* Return true if STR is prefixed with a special relocation operator. */
310static int
311nios2_special_relocation_p (const char *str)
312{
313 return (strprefix (str, "%lo")
314 || strprefix (str, "%hi")
315 || strprefix (str, "%hiadj")
316 || strprefix (str, "%gprel")
317 || strprefix (str, "%got")
318 || strprefix (str, "%call")
319 || strprefix (str, "%gotoff_lo")
320 || strprefix (str, "%gotoff_hiadj")
321 || strprefix (str, "%tls_gd")
322 || strprefix (str, "%tls_ldm")
323 || strprefix (str, "%tls_ldo")
324 || strprefix (str, "%tls_ie")
325 || strprefix (str, "%tls_le")
326 || strprefix (str, "%gotoff"));
327}
328
36591ba1 329
c8c8175b
SL		 330/* nop fill patterns for text section. */
331static char const nop_r1[4] = { 0x3a, 0x88, 0x01, 0x00 };
332static char const nop_r2[4] = { 0x20, 0x00, 0x00, 0xc4 };
333static char const nop_r2_cdx[2] = { 0x3b, 0x00 };
334static char const *nop32 = nop_r1;
335static char const *nop16 = NULL;
36591ba1
SL		 336
337/* Handles all machine-dependent alignment needs. */
338static void
339nios2_align (int log_size, const char *pfill, symbolS *label)
340{
341 int align;
342 long max_alignment = 15;
343
344 /* The front end is prone to changing segments out from under us
345 temporarily when -g is in effect. */
346 int switched_seg_p = (nios2_current_align_seg != now_seg);
347
348 align = log_size;
349 if (align > max_alignment)
350 {
351 align = max_alignment;
352 as_bad (_("Alignment too large: %d. assumed"), align);
353 }
354 else if (align < 0)
355 {
356 as_warn (_("Alignment negative: 0 assumed"));
357 align = 0;
358 }
359
360 if (align != 0)
361 {
c8c8175b 362 if (subseg_text_p (now_seg) && align >= nios2_min_align)
36591ba1 363 {
c8c8175b 364 /* First, make sure we're on the minimum boundary, in case
36591ba1 365 someone has been putting .byte values the text section. */
c8c8175b
SL		 366 if (nios2_current_align < nios2_min_align || switched_seg_p)
367 frag_align (nios2_min_align, 0, 0);
368
369 /* If we might be on a 2-byte boundary, first align to a
370 4-byte boundary using the 2-byte nop as fill. */
371 if (nios2_min_align == 1
372 && align > nios2_min_align
373 && pfill == nop32 )
374 {
375 gas_assert (nop16);
376 frag_align_pattern (2, nop16, 2, 0);
377 }
36591ba1
SL		 378
379 /* Now fill in the alignment pattern. */
380 if (pfill != NULL)
c8c8175b 381 frag_align_pattern (align, pfill, 4, 0);
36591ba1
SL		 382 else
383 frag_align (align, 0, 0);
384 }
385 else
386 frag_align (align, 0, 0);
387
388 if (!switched_seg_p)
389 nios2_current_align = align;
390
391 /* If the last label was in a different section we can't align it. */
392 if (label != NULL && !switched_seg_p)
393 {
394 symbolS *sym;
395 int label_seen = FALSE;
396 struct frag *old_frag;
397 valueT old_value;
398 valueT new_value;
399
400 gas_assert (S_GET_SEGMENT (label) == now_seg);
401
402 old_frag = symbol_get_frag (label);
403 old_value = S_GET_VALUE (label);
404 new_value = (valueT) frag_now_fix ();
405
406 /* It is possible to have more than one label at a particular
407 address, especially if debugging is enabled, so we must
408 take care to adjust all the labels at this address in this
409 fragment. To save time we search from the end of the symbol
410 list, backwards, since the symbols we are interested in are
411 almost certainly the ones that were most recently added.
412 Also to save time we stop searching once we have seen at least
413 one matching label, and we encounter a label that is no longer
414 in the target fragment. Note, this search is guaranteed to
415 find at least one match when sym == label, so no special case
416 code is necessary. */
417 for (sym = symbol_lastP; sym != NULL; sym = symbol_previous (sym))
418 if (symbol_get_frag (sym) == old_frag
419 && S_GET_VALUE (sym) == old_value)
420 {
421 label_seen = TRUE;
422 symbol_set_frag (sym, frag_now);
423 S_SET_VALUE (sym, new_value);
424 }
425 else if (label_seen && symbol_get_frag (sym) != old_frag)
426 break;
427 }
428 record_alignment (now_seg, align);
429 }
430}
431
432\f
433/** Support for self-check mode. */
434
435/* Mode of the assembler. */
436typedef enum
437{
438 NIOS2_MODE_ASSEMBLE, /* Ordinary operation. */
439 NIOS2_MODE_TEST /* Hidden mode used for self testing. */
440} NIOS2_MODE;
441
442static NIOS2_MODE nios2_mode = NIOS2_MODE_ASSEMBLE;
443
444/* This function is used to in self-checking mode
445 to check the assembled instruction
446 opcode should be the assembled opcode, and exp_opcode
447 the parsed string representing the expected opcode. */
448static void
449nios2_check_assembly (unsigned int opcode, const char *exp_opcode)
450{
451 if (nios2_mode == NIOS2_MODE_TEST)
452 {
453 if (exp_opcode == NULL)
454 as_bad (_("expecting opcode string in self test mode"));
455 else if (opcode != strtoul (exp_opcode, NULL, 16))
456 as_bad (_("assembly 0x%08x, expected %s"), opcode, exp_opcode);
457 }
458}
459
460\f
461/** Support for machine-dependent assembler directives. */
462/* Handle the .align pseudo-op. This aligns to a power of two. It
463 also adjusts any current instruction label. We treat this the same
464 way the MIPS port does: .align 0 turns off auto alignment. */
465static void
466s_nios2_align (int ignore ATTRIBUTE_UNUSED)
467{
468 int align;
469 char fill;
470 const char *pfill = NULL;
471 long max_alignment = 15;
472
473 align = get_absolute_expression ();
474 if (align > max_alignment)
475 {
476 align = max_alignment;
477 as_bad (_("Alignment too large: %d. assumed"), align);
478 }
479 else if (align < 0)
480 {
481 as_warn (_("Alignment negative: 0 assumed"));
482 align = 0;
483 }
484
485 if (*input_line_pointer == ',')
486 {
487 input_line_pointer++;
488 fill = get_absolute_expression ();
489 pfill = (const char *) &fill;
490 }
491 else if (subseg_text_p (now_seg))
c8c8175b 492 pfill = (const char *) nop32;
36591ba1
SL		 493 else
494 {
495 pfill = NULL;
496 nios2_last_label = NULL;
497 }
498
499 if (align != 0)
500 {
501 nios2_auto_align_on = 1;
502 nios2_align (align, pfill, nios2_last_label);
503 nios2_last_label = NULL;
504 }
505 else
506 nios2_auto_align_on = 0;
507
508 demand_empty_rest_of_line ();
509}
510
511/* Handle the .text pseudo-op. This is like the usual one, but it
512 clears the saved last label and resets known alignment. */
513static void
514s_nios2_text (int i)
515{
516 s_text (i);
517 nios2_last_label = NULL;
518 nios2_current_align = 0;
519 nios2_current_align_seg = now_seg;
520}
521
522/* Handle the .data pseudo-op. This is like the usual one, but it
523 clears the saved last label and resets known alignment. */
524static void
525s_nios2_data (int i)
526{
527 s_data (i);
528 nios2_last_label = NULL;
529 nios2_current_align = 0;
530 nios2_current_align_seg = now_seg;
531}
532
533/* Handle the .section pseudo-op. This is like the usual one, but it
534 clears the saved last label and resets known alignment. */
535static void
536s_nios2_section (int ignore)
537{
538 obj_elf_section (ignore);
539 nios2_last_label = NULL;
540 nios2_current_align = 0;
541 nios2_current_align_seg = now_seg;
542}
543
544/* Explicitly unaligned cons. */
545static void
546s_nios2_ucons (int nbytes)
547{
548 int hold;
549 hold = nios2_auto_align_on;
550 nios2_auto_align_on = 0;
551 cons (nbytes);
552 nios2_auto_align_on = hold;
553}
554
555/* Handle the .sdata directive. */
556static void
557s_nios2_sdata (int ignore ATTRIBUTE_UNUSED)
558{
559 get_absolute_expression (); /* Ignored. */
560 subseg_new (".sdata", 0);
561 demand_empty_rest_of_line ();
562}
563
564/* .set sets assembler options eg noat/at and is also used
565 to set symbol values (.equ, .equiv ). */
566static void
567s_nios2_set (int equiv)
568{
2e57ce7b 569 char *save = input_line_pointer;
d02603dc
NC		 570 char *directive;
571 char delim = get_symbol_name (&directive);
36591ba1 572 char *endline = input_line_pointer;
d02603dc
NC		 573
574 (void) restore_line_pointer (delim);
36591ba1
SL		 575
576 /* We only want to handle ".set XXX" if the
577 user has tried ".set XXX, YYY" they are not
578 trying a directive. This prevents
579 us from polluting the name space. */
580 SKIP_WHITESPACE ();
3739860c 581 if (is_end_of_line[(unsigned char) *input_line_pointer])
36591ba1
SL		 582 {
583 bfd_boolean done = TRUE;
584 *endline = 0;
3739860c 585
36591ba1
SL		 586 if (!strcmp (directive, "noat"))
587 nios2_as_options.noat = TRUE;
588 else if (!strcmp (directive, "at"))
589 nios2_as_options.noat = FALSE;
590 else if (!strcmp (directive, "nobreak"))
591 nios2_as_options.nobreak = TRUE;
592 else if (!strcmp (directive, "break"))
593 nios2_as_options.nobreak = FALSE;
594 else if (!strcmp (directive, "norelax"))
595 nios2_as_options.relax = relax_none;
596 else if (!strcmp (directive, "relaxsection"))
597 nios2_as_options.relax = relax_section;
598 else if (!strcmp (directive, "relaxall"))
599 nios2_as_options.relax = relax_all;
600 else
601 done = FALSE;
3739860c 602
36591ba1
SL		 603 if (done)
604 {
605 *endline = delim;
606 demand_empty_rest_of_line ();
607 return;
608 }
609 }
610
611 /* If we fall through to here, either we have ".set XXX, YYY"
3739860c 612 or we have ".set XXX" where XXX is unknown or we have
36591ba1 613 a syntax error. */
2e57ce7b 614 input_line_pointer = save;
36591ba1
SL		 615 s_set (equiv);
616}
617
618/* Machine-dependent assembler directives.
619 Format of each entry is:
620 { "directive", handler_func, param } */
621const pseudo_typeS md_pseudo_table[] = {
622 {"align", s_nios2_align, 0},
623 {"text", s_nios2_text, 0},
624 {"data", s_nios2_data, 0},
625 {"section", s_nios2_section, 0},
626 {"section.s", s_nios2_section, 0},
627 {"sect", s_nios2_section, 0},
628 {"sect.s", s_nios2_section, 0},
629 /* .dword and .half are included for compatibility with MIPS. */
630 {"dword", cons, 8},
631 {"half", cons, 2},
632 /* NIOS2 native word size is 4 bytes, so we override
633 the GAS default of 2. */
634 {"word", cons, 4},
635 /* Explicitly unaligned directives. */
636 {"2byte", s_nios2_ucons, 2},
637 {"4byte", s_nios2_ucons, 4},
638 {"8byte", s_nios2_ucons, 8},
639 {"16byte", s_nios2_ucons, 16},
640#ifdef OBJ_ELF
641 {"sdata", s_nios2_sdata, 0},
642#endif
643 {"set", s_nios2_set, 0},
644 {NULL, NULL, 0}
645};
646
647\f
648/** Relaxation support. */
649
650/* We support two relaxation modes: a limited PC-relative mode with
651 -relax-section (the default), and an absolute jump mode with -relax-all.
652
653 Nios II PC-relative branch instructions only support 16-bit offsets.
654 And, there's no good way to add a 32-bit constant to the PC without
655 using two registers.
3739860c 656
36591ba1
SL		 657 To deal with this, for the pc-relative relaxation mode we convert
658 br label
659 into a series of 16-bit adds, like:
660 nextpc at
661 addi at, at, 32767
662 ...
663 addi at, at, remainder
664 jmp at
665
666 Similarly, conditional branches are converted from
667 b(condition) r, s, label
668 into a series like:
669 b(opposite condition) r, s, skip
670 nextpc at
671 addi at, at, 32767
672 ...
673 addi at, at, remainder
674 jmp at
675 skip:
676
677 The compiler can do a better job, either by converting the branch
678 directly into a JMP (going through the GOT for PIC) or by allocating
679 a second register for the 32-bit displacement.
680
681 For the -relax-all relaxation mode, the conversions are
682 movhi at, %hi(symbol+offset)
683 ori at, %lo(symbol+offset)
684 jmp at
685 and
686 b(opposite condition), r, s, skip
687 movhi at, %hi(symbol+offset)
688 ori at, %lo(symbol+offset)
689 jmp at
690 skip:
691 respectively.
c8c8175b
SL		 692
693 16-bit CDX branch instructions are relaxed first into equivalent
694 32-bit branches and then the above transformations are applied
3739860c 695 if necessary.
c8c8175b 696
36591ba1
SL		 697*/
698
699/* Arbitrarily limit the number of addis we can insert; we need to be able
700 to specify the maximum growth size for each frag that contains a
701 relaxable branch. There's no point in specifying a huge number here
702 since that means the assembler needs to allocate that much extra
703 memory for every branch, and almost no real code will ever need it.
704 Plus, as already noted a better solution is to just use a jmp, or
705 allocate a second register to hold a 32-bit displacement.
706 FIXME: Rather than making this a constant, it could be controlled by
707 a command-line argument. */
708#define RELAX_MAX_ADDI 32
709
710/* The fr_subtype field represents the target-specific relocation state.
711 It has type relax_substateT (unsigned int). We use it to track the
712 number of addis necessary, plus a bit to track whether this is a
c8c8175b 713 conditional branch and a bit for 16-bit CDX instructions.
36591ba1
SL		 714 Regardless of the smaller RELAX_MAX_ADDI limit, we reserve 16 bits
715 in the fr_subtype to encode the number of addis so that the whole
716 theoretically-valid range is representable.
717 For the -relax-all mode, N = 0 represents an in-range branch and N = 1
718 represents a branch that needs to be relaxed. */
719#define UBRANCH (0 << 16)
720#define CBRANCH (1 << 16)
c8c8175b 721#define CDXBRANCH (1 << 17)
36591ba1
SL		 722#define IS_CBRANCH(SUBTYPE) ((SUBTYPE) & CBRANCH)
723#define IS_UBRANCH(SUBTYPE) (!IS_CBRANCH (SUBTYPE))
c8c8175b 724#define IS_CDXBRANCH(SUBTYPE) ((SUBTYPE) & CDXBRANCH)
36591ba1
SL		 725#define UBRANCH_SUBTYPE(N) (UBRANCH | (N))
726#define CBRANCH_SUBTYPE(N) (CBRANCH | (N))
c8c8175b
SL		 727#define CDX_UBRANCH_SUBTYPE(N) (CDXBRANCH | UBRANCH | (N))
728#define CDX_CBRANCH_SUBTYPE(N) (CDXBRANCH | CBRANCH | (N))
36591ba1
SL		 729#define SUBTYPE_ADDIS(SUBTYPE) ((SUBTYPE) & 0xffff)
730
731/* For the -relax-section mode, unconditional branches require 2 extra i
732 nstructions besides the addis, conditional branches require 3. */
733#define UBRANCH_ADDIS_TO_SIZE(N) (((N) + 2) * 4)
734#define CBRANCH_ADDIS_TO_SIZE(N) (((N) + 3) * 4)
735
736/* For the -relax-all mode, unconditional branches require 3 instructions
737 and conditional branches require 4. */
738#define UBRANCH_JUMP_SIZE 12
739#define CBRANCH_JUMP_SIZE 16
740
741/* Maximum sizes of relaxation sequences. */
742#define UBRANCH_MAX_SIZE \
743 (nios2_as_options.relax == relax_all \
744 ? UBRANCH_JUMP_SIZE \
745 : UBRANCH_ADDIS_TO_SIZE (RELAX_MAX_ADDI))
746#define CBRANCH_MAX_SIZE \
747 (nios2_as_options.relax == relax_all \
748 ? CBRANCH_JUMP_SIZE \
749 : CBRANCH_ADDIS_TO_SIZE (RELAX_MAX_ADDI))
750
751/* Register number of AT, the assembler temporary. */
752#define AT_REGNUM 1
753
754/* Determine how many bytes are required to represent the sequence
755 indicated by SUBTYPE. */
756static int
757nios2_relax_subtype_size (relax_substateT subtype)
758{
759 int n = SUBTYPE_ADDIS (subtype);
760 if (n == 0)
761 /* Regular conditional/unconditional branch instruction. */
c8c8175b 762 return (IS_CDXBRANCH (subtype) ? 2 : 4);
36591ba1
SL		 763 else if (nios2_as_options.relax == relax_all)
764 return (IS_CBRANCH (subtype) ? CBRANCH_JUMP_SIZE : UBRANCH_JUMP_SIZE);
765 else if (IS_CBRANCH (subtype))
766 return CBRANCH_ADDIS_TO_SIZE (n);
767 else
768 return UBRANCH_ADDIS_TO_SIZE (n);
769}
770
771/* Estimate size of fragp before relaxation.
772 This could also examine the offset in fragp and adjust
773 fragp->fr_subtype, but we will do that in nios2_relax_frag anyway. */
774int
775md_estimate_size_before_relax (fragS *fragp, segT segment ATTRIBUTE_UNUSED)
776{
777 return nios2_relax_subtype_size (fragp->fr_subtype);
778}
779
780/* Implement md_relax_frag, returning the change in size of the frag. */
781long
782nios2_relax_frag (segT segment, fragS *fragp, long stretch)
783{
784 addressT target = fragp->fr_offset;
785 relax_substateT subtype = fragp->fr_subtype;
786 symbolS *symbolp = fragp->fr_symbol;
787
788 if (symbolp)
789 {
790 fragS *sym_frag = symbol_get_frag (symbolp);
791 offsetT offset;
792 int n;
c8c8175b 793 bfd_boolean is_cdx = FALSE;
36591ba1
SL		 794
795 target += S_GET_VALUE (symbolp);
796
797 /* See comments in write.c:relax_frag about handling of stretch. */
798 if (stretch != 0
799 && sym_frag->relax_marker != fragp->relax_marker)
800 {
801 if (stretch < 0 || sym_frag->region == fragp->region)
802 target += stretch;
803 else if (target < fragp->fr_address)
804 target = fragp->fr_next->fr_address + stretch;
805 }
806
96ba4233
SL		 807 /* We subtract fr_var (4 for 32-bit insns) because all pc relative
808 branches are from the next instruction. */
809 offset = target - fragp->fr_address - fragp->fr_fix - fragp->fr_var;
c8c8175b
SL		 810 if (IS_CDXBRANCH (subtype) && IS_UBRANCH (subtype)
811 && offset >= -1024 && offset < 1024)
812 /* PC-relative CDX branch with 11-bit offset. */
813 is_cdx = TRUE;
814 else if (IS_CDXBRANCH (subtype) && IS_CBRANCH (subtype)
815 && offset >= -128 && offset < 128)
816 /* PC-relative CDX branch with 8-bit offset. */
817 is_cdx = TRUE;
818 else if (offset >= -32768 && offset < 32768)
36591ba1
SL		 819 /* Fits in PC-relative branch. */
820 n = 0;
821 else if (nios2_as_options.relax == relax_all)
822 /* Convert to jump. */
823 n = 1;
824 else if (nios2_as_options.relax == relax_section
825 && S_GET_SEGMENT (symbolp) == segment
826 && S_IS_DEFINED (symbolp))
827 /* Attempt a PC-relative relaxation on a branch to a defined
828 symbol in the same segment. */
829 {
830 /* The relaxation for conditional branches is offset by 4
831 bytes because we insert the inverted branch around the
832 sequence. */
833 if (IS_CBRANCH (subtype))
834 offset = offset - 4;
835 if (offset > 0)
836 n = offset / 32767 + 1;
837 else
838 n = offset / -32768 + 1;
839
840 /* Bail out immediately if relaxation has failed. If we try to
841 defer the diagnostic to md_convert_frag, some pathological test
842 cases (e.g. gcc/testsuite/gcc.c-torture/compile/20001226-1.c)
843 apparently never converge. By returning 0 here we could pretend
844 to the caller that nothing has changed, but that leaves things
845 in an inconsistent state when we get to md_convert_frag. */
846 if (n > RELAX_MAX_ADDI)
847 {
848 as_bad_where (fragp->fr_file, fragp->fr_line,
849 _("branch offset out of range\n"));
850 as_fatal (_("branch relaxation failed\n"));
851 }
852 }
853 else
854 /* We cannot handle this case, diagnose overflow later. */
855 return 0;
856
c8c8175b
SL		 857 if (is_cdx)
858 fragp->fr_subtype = subtype;
859 else if (IS_CBRANCH (subtype))
36591ba1
SL		 860 fragp->fr_subtype = CBRANCH_SUBTYPE (n);
861 else
862 fragp->fr_subtype = UBRANCH_SUBTYPE (n);
863
864 return (nios2_relax_subtype_size (fragp->fr_subtype)
865 - nios2_relax_subtype_size (subtype));
866 }
867
868 /* If we got here, it's probably an error. */
869 return 0;
870}
871
872
873/* Complete fragp using the data from the relaxation pass. */
874void
875md_convert_frag (bfd *headers ATTRIBUTE_UNUSED, segT segment ATTRIBUTE_UNUSED,
876 fragS *fragp)
877{
878 char *buffer = fragp->fr_literal + fragp->fr_fix;
879 relax_substateT subtype = fragp->fr_subtype;
880 int n = SUBTYPE_ADDIS (subtype);
881 addressT target = fragp->fr_offset;
882 symbolS *symbolp = fragp->fr_symbol;
883 offsetT offset;
c8c8175b 884 unsigned int addend_mask, addi_mask, op;
36591ba1
SL		 885 offsetT addend, remainder;
886 int i;
c8c8175b
SL		 887 bfd_boolean is_r2 = (bfd_get_mach (stdoutput) == bfd_mach_nios2r2);
888
889 /* If this is a CDX branch we're not relaxing, just generate the fixup. */
890 if (IS_CDXBRANCH (subtype))
891 {
892 gas_assert (is_r2);
893 fix_new (fragp, fragp->fr_fix, 2, fragp->fr_symbol,
894 fragp->fr_offset, 1,
895 (IS_UBRANCH (subtype)
896 ? BFD_RELOC_NIOS2_R2_I10_1_PCREL
897 : BFD_RELOC_NIOS2_R2_T1I7_1_PCREL));
898 fragp->fr_fix += 2;
899 return;
900 }
901
902 /* If this is a CDX branch we are relaxing, turn it into an equivalent
903 32-bit branch and then fall through to the normal non-CDX cases. */
904 if (fragp->fr_var == 2)
905 {
906 unsigned int opcode = md_chars_to_number (buffer, 2);
907 gas_assert (is_r2);
908 if (IS_CBRANCH (subtype))
909 {
910 unsigned int reg = nios2_r2_reg3_mappings[GET_IW_T1I7_A3 (opcode)];
911 if (GET_IW_R2_OP (opcode) == R2_OP_BNEZ_N)
912 opcode = MATCH_R2_BNE | SET_IW_F2I16_A (reg);
913 else
914 opcode = MATCH_R2_BEQ | SET_IW_F2I16_A (reg);
915 }
916 else
917 opcode = MATCH_R2_BR;
918 md_number_to_chars (buffer, opcode, 4);
919 fragp->fr_var = 4;
920 }
36591ba1
SL		 921
922 /* If we didn't or can't relax, this is a regular branch instruction.
923 We just need to generate the fixup for the symbol and offset. */
924 if (n == 0)
925 {
c8c8175b
SL		 926 fix_new (fragp, fragp->fr_fix, 4, fragp->fr_symbol,
927 fragp->fr_offset, 1, BFD_RELOC_16_PCREL);
36591ba1
SL		 928 fragp->fr_fix += 4;
929 return;
930 }
931
932 /* Replace the cbranch at fr_fix with one that has the opposite condition
933 in order to jump around the block of instructions we'll be adding. */
934 if (IS_CBRANCH (subtype))
935 {
936 unsigned int br_opcode;
96ba4233 937 unsigned int old_op, new_op;
36591ba1
SL		 938 int nbytes;
939
940 /* Account for the nextpc and jmp in the pc-relative case, or the two
941 load instructions and jump in the absolute case. */
942 if (nios2_as_options.relax == relax_section)
943 nbytes = (n + 2) * 4;
944 else
945 nbytes = 12;
946
947 br_opcode = md_chars_to_number (buffer, 4);
c8c8175b 948 if (is_r2)
36591ba1 949 {
c8c8175b
SL		 950 old_op = GET_IW_R2_OP (br_opcode);
951 switch (old_op)
952 {
953 case R2_OP_BEQ:
954 new_op = R2_OP_BNE;
955 break;
956 case R2_OP_BNE:
957 new_op = R2_OP_BEQ;
958 break;
959 case R2_OP_BGE:
960 new_op = R2_OP_BLT;
961 break;
962 case R2_OP_BGEU:
963 new_op = R2_OP_BLTU;
964 break;
965 case R2_OP_BLT:
966 new_op = R2_OP_BGE;
967 break;
968 case R2_OP_BLTU:
969 new_op = R2_OP_BGEU;
970 break;
971 default:
972 abort ();
973 }
974 br_opcode = ((br_opcode & ~IW_R2_OP_SHIFTED_MASK)
975 | SET_IW_R2_OP (new_op));
976 br_opcode = br_opcode | SET_IW_F2I16_IMM16 (nbytes);
977 }
978 else
979 {
980 old_op = GET_IW_R1_OP (br_opcode);
981 switch (old_op)
982 {
983 case R1_OP_BEQ:
984 new_op = R1_OP_BNE;
985 break;
986 case R1_OP_BNE:
987 new_op = R1_OP_BEQ;
988 break;
989 case R1_OP_BGE:
990 new_op = R1_OP_BLT;
991 break;
992 case R1_OP_BGEU:
993 new_op = R1_OP_BLTU;
994 break;
995 case R1_OP_BLT:
996 new_op = R1_OP_BGE;
997 break;
998 case R1_OP_BLTU:
999 new_op = R1_OP_BGEU;
1000 break;
1001 default:
1002 abort ();
1003 }
1004 br_opcode = ((br_opcode & ~IW_R1_OP_SHIFTED_MASK)
1005 | SET_IW_R1_OP (new_op));
1006 br_opcode = br_opcode | SET_IW_I_IMM16 (nbytes);
36591ba1 1007 }
36591ba1
SL		 1008 md_number_to_chars (buffer, br_opcode, 4);
1009 fragp->fr_fix += 4;
1010 buffer += 4;
1011 }
1012
1013 /* Load at for the PC-relative case. */
1014 if (nios2_as_options.relax == relax_section)
1015 {
1016 /* Insert the nextpc instruction. */
c8c8175b
SL		 1017 if (is_r2)
1018 op = MATCH_R2_NEXTPC | SET_IW_F3X6L5_C (AT_REGNUM);
1019 else
1020 op = MATCH_R1_NEXTPC | SET_IW_R_C (AT_REGNUM);
1021 md_number_to_chars (buffer, op, 4);
36591ba1
SL		 1022 fragp->fr_fix += 4;
1023 buffer += 4;
3739860c 1024
36591ba1
SL		 1025 /* We need to know whether the offset is positive or negative. */
1026 target += S_GET_VALUE (symbolp);
1027 offset = target - fragp->fr_address - fragp->fr_fix;
1028 if (offset > 0)
1029 addend = 32767;
1030 else
1031 addend = -32768;
c8c8175b
SL		 1032 if (is_r2)
1033 addend_mask = SET_IW_F2I16_IMM16 ((unsigned int)addend);
1034 else
1035 addend_mask = SET_IW_I_IMM16 ((unsigned int)addend);
36591ba1
SL		 1036
1037 /* Insert n-1 addi instructions. */
c8c8175b
SL		 1038 if (is_r2)
1039 addi_mask = (MATCH_R2_ADDI
1040 | SET_IW_F2I16_B (AT_REGNUM)
1041 | SET_IW_F2I16_A (AT_REGNUM));
1042 else
1043 addi_mask = (MATCH_R1_ADDI
1044 | SET_IW_I_B (AT_REGNUM)
1045 | SET_IW_I_A (AT_REGNUM));
36591ba1
SL		 1046 for (i = 0; i < n - 1; i ++)
1047 {
1048 md_number_to_chars (buffer, addi_mask | addend_mask, 4);
1049 fragp->fr_fix += 4;
1050 buffer += 4;
1051 }
1052
1053 /* Insert the last addi instruction to hold the remainder. */
1054 remainder = offset - addend * (n - 1);
1055 gas_assert (remainder >= -32768 && remainder <= 32767);
c8c8175b
SL		 1056 if (is_r2)
1057 addend_mask = SET_IW_F2I16_IMM16 ((unsigned int)remainder);
1058 else
1059 addend_mask = SET_IW_I_IMM16 ((unsigned int)remainder);
36591ba1
SL		 1060 md_number_to_chars (buffer, addi_mask | addend_mask, 4);
1061 fragp->fr_fix += 4;
1062 buffer += 4;
1063 }
1064
1065 /* Load at for the absolute case. */
1066 else
1067 {
c8c8175b
SL		 1068 if (is_r2)
1069 op = MATCH_R2_ORHI | SET_IW_F2I16_B (AT_REGNUM) | SET_IW_F2I16_A (0);
1070 else
1071 op = MATCH_R1_ORHI | SET_IW_I_B (AT_REGNUM) | SET_IW_I_A (0);
1072 md_number_to_chars (buffer, op, 4);
36591ba1
SL		 1073 fix_new (fragp, fragp->fr_fix, 4, fragp->fr_symbol, fragp->fr_offset,
1074 0, BFD_RELOC_NIOS2_HI16);
1075 fragp->fr_fix += 4;
1076 buffer += 4;
c8c8175b
SL		 1077 if (is_r2)
1078 op = (MATCH_R2_ORI | SET_IW_F2I16_B (AT_REGNUM)
1079 | SET_IW_F2I16_A (AT_REGNUM));
1080 else
1081 op = (MATCH_R1_ORI | SET_IW_I_B (AT_REGNUM)
1082 | SET_IW_I_A (AT_REGNUM));
1083 md_number_to_chars (buffer, op, 4);
36591ba1
SL		 1084 fix_new (fragp, fragp->fr_fix, 4, fragp->fr_symbol, fragp->fr_offset,
1085 0, BFD_RELOC_NIOS2_LO16);
1086 fragp->fr_fix += 4;
1087 buffer += 4;
1088 }
1089
1090 /* Insert the jmp instruction. */
c8c8175b
SL		 1091 if (is_r2)
1092 op = MATCH_R2_JMP | SET_IW_F3X6L5_A (AT_REGNUM);
1093 else
1094 op = MATCH_R1_JMP | SET_IW_R_A (AT_REGNUM);
1095 md_number_to_chars (buffer, op, 4);
36591ba1
SL		 1096 fragp->fr_fix += 4;
1097 buffer += 4;
1098}
1099
1100\f
1101/** Fixups and overflow checking. */
1102
1103/* Check a fixup for overflow. */
1104static bfd_boolean
1105nios2_check_overflow (valueT fixup, reloc_howto_type *howto)
1106{
c8c8175b
SL		 1107 /* If there is a rightshift, check that the low-order bits are
1108 zero before applying it. */
1109 if (howto->rightshift)
1110 {
1111 if ((~(~((valueT) 0) << howto->rightshift) & fixup)
1112 && howto->complain_on_overflow != complain_overflow_dont)
1113 return TRUE;
1114 fixup = ((signed)fixup) >> howto->rightshift;
1115 }
36591ba1
SL		 1116
1117 /* Check for overflow - return TRUE if overflow, FALSE if not. */
1118 switch (howto->complain_on_overflow)
1119 {
1120 case complain_overflow_dont:
1121 break;
1122 case complain_overflow_bitfield:
1123 if ((fixup >> howto->bitsize) != 0
1124 && ((signed) fixup >> howto->bitsize) != -1)
1125 return TRUE;
1126 break;
1127 case complain_overflow_signed:
1128 if ((fixup & 0x80000000) > 0)
1129 {
1130 /* Check for negative overflow. */
c8c8175b 1131 if ((signed) fixup < ((signed) ~0 << (howto->bitsize-1)))
36591ba1
SL		 1132 return TRUE;
1133 }
1134 else
1135 {
1136 /* Check for positive overflow. */
1137 if (fixup >= ((unsigned) 1 << (howto->bitsize - 1)))
1138 return TRUE;
1139 }
1140 break;
1141 case complain_overflow_unsigned:
1142 if ((fixup >> howto->bitsize) != 0)
1143 return TRUE;
1144 break;
1145 default:
1146 as_bad (_("error checking for overflow - broken assembler"));
1147 break;
1148 }
1149 return FALSE;
1150}
1151
1152/* Emit diagnostic for fixup overflow. */
1153static void
1154nios2_diagnose_overflow (valueT fixup, reloc_howto_type *howto,
1155 fixS *fixP, valueT value)
1156{
1157 if (fixP->fx_r_type == BFD_RELOC_8
1158 || fixP->fx_r_type == BFD_RELOC_16
1159 || fixP->fx_r_type == BFD_RELOC_32)
1160 /* These relocs are against data, not instructions. */
1161 as_bad_where (fixP->fx_file, fixP->fx_line,
1162 _("immediate value 0x%x truncated to 0x%x"),
1163 (unsigned int) fixup,
1164 (unsigned int) (~(~(valueT) 0 << howto->bitsize) & fixup));
1165 else
1166 {
1167 /* What opcode is the instruction? This will determine
1168 whether we check for overflow in immediate values
1169 and what error message we get. */
1170 const struct nios2_opcode *opcode;
1171 enum overflow_type overflow_msg_type;
1172 unsigned int range_min;
1173 unsigned int range_max;
1174 unsigned int address;
96ba4233 1175
b4714c7c 1176 opcode = nios2_find_opcode_hash (value, bfd_get_mach (stdoutput));
36591ba1 1177 gas_assert (opcode);
96ba4233 1178 gas_assert (fixP->fx_size == opcode->size);
36591ba1
SL		 1179 overflow_msg_type = opcode->overflow_msg;
1180 switch (overflow_msg_type)
1181 {
1182 case call_target_overflow:
1183 range_min
1184 = ((fixP->fx_frag->fr_address + fixP->fx_where) & 0xf0000000);
1185 range_max = range_min + 0x0fffffff;
1186 address = fixup | range_min;
3739860c 1187
36591ba1
SL		 1188 as_bad_where (fixP->fx_file, fixP->fx_line,
1189 _("call target address 0x%08x out of range 0x%08x to 0x%08x"),
1190 address, range_min, range_max);
1191 break;
1192 case branch_target_overflow:
c8c8175b
SL		 1193 if (opcode->format == iw_i_type || opcode->format == iw_F2I16_type)
1194 as_bad_where (fixP->fx_file, fixP->fx_line,
1195 _("branch offset %d out of range %d to %d"),
1196 (int)fixup, -32768, 32767);
1197 else
1198 as_bad_where (fixP->fx_file, fixP->fx_line,
1199 _("branch offset %d out of range"),
1200 (int)fixup);
36591ba1
SL		 1201 break;
1202 case address_offset_overflow:
c8c8175b
SL		 1203 if (opcode->format == iw_i_type || opcode->format == iw_F2I16_type)
1204 as_bad_where (fixP->fx_file, fixP->fx_line,
1205 _("%s offset %d out of range %d to %d"),
1206 opcode->name, (int)fixup, -32768, 32767);
1207 else
1208 as_bad_where (fixP->fx_file, fixP->fx_line,
1209 _("%s offset %d out of range"),
1210 opcode->name, (int)fixup);
36591ba1
SL		 1211 break;
1212 case signed_immed16_overflow:
1213 as_bad_where (fixP->fx_file, fixP->fx_line,
1214 _("immediate value %d out of range %d to %d"),
1215 (int)fixup, -32768, 32767);
1216 break;
1217 case unsigned_immed16_overflow:
1218 as_bad_where (fixP->fx_file, fixP->fx_line,
1219 _("immediate value %u out of range %u to %u"),
1220 (unsigned int)fixup, 0, 65535);
1221 break;
1222 case unsigned_immed5_overflow:
1223 as_bad_where (fixP->fx_file, fixP->fx_line,
1224 _("immediate value %u out of range %u to %u"),
1225 (unsigned int)fixup, 0, 31);
1226 break;
c8c8175b
SL		 1227 case signed_immed12_overflow:
1228 as_bad_where (fixP->fx_file, fixP->fx_line,
1229 _("immediate value %d out of range %d to %d"),
1230 (int)fixup, -2048, 2047);
1231 break;
36591ba1
SL		 1232 case custom_opcode_overflow:
1233 as_bad_where (fixP->fx_file, fixP->fx_line,
1234 _("custom instruction opcode %u out of range %u to %u"),
1235 (unsigned int)fixup, 0, 255);
1236 break;
1237 default:
1238 as_bad_where (fixP->fx_file, fixP->fx_line,
1239 _("overflow in immediate argument"));
1240 break;
1241 }
1242 }
1243}
1244
1245/* Apply a fixup to the object file. */
1246void
1247md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
1248{
1249 /* Assert that the fixup is one we can handle. */
1250 gas_assert (fixP != NULL && valP != NULL
1251 && (fixP->fx_r_type == BFD_RELOC_8
1252 || fixP->fx_r_type == BFD_RELOC_16
1253 || fixP->fx_r_type == BFD_RELOC_32
1254 || fixP->fx_r_type == BFD_RELOC_64
1255 || fixP->fx_r_type == BFD_RELOC_NIOS2_S16
1256 || fixP->fx_r_type == BFD_RELOC_NIOS2_U16
1257 || fixP->fx_r_type == BFD_RELOC_16_PCREL
1258 || fixP->fx_r_type == BFD_RELOC_NIOS2_CALL26
1259 || fixP->fx_r_type == BFD_RELOC_NIOS2_IMM5
1260 || fixP->fx_r_type == BFD_RELOC_NIOS2_CACHE_OPX
1261 || fixP->fx_r_type == BFD_RELOC_NIOS2_IMM6
1262 || fixP->fx_r_type == BFD_RELOC_NIOS2_IMM8
1263 || fixP->fx_r_type == BFD_RELOC_NIOS2_HI16
1264 || fixP->fx_r_type == BFD_RELOC_NIOS2_LO16
1265 || fixP->fx_r_type == BFD_RELOC_NIOS2_HIADJ16
1266 || fixP->fx_r_type == BFD_RELOC_NIOS2_GPREL
1267 || fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
1268 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY
1269 || fixP->fx_r_type == BFD_RELOC_NIOS2_UJMP
1270 || fixP->fx_r_type == BFD_RELOC_NIOS2_CJMP
1271 || fixP->fx_r_type == BFD_RELOC_NIOS2_CALLR
1272 || fixP->fx_r_type == BFD_RELOC_NIOS2_ALIGN
1273 || fixP->fx_r_type == BFD_RELOC_NIOS2_GOT16
1274 || fixP->fx_r_type == BFD_RELOC_NIOS2_CALL16
1275 || fixP->fx_r_type == BFD_RELOC_NIOS2_GOTOFF_LO
1276 || fixP->fx_r_type == BFD_RELOC_NIOS2_GOTOFF_HA
1277 || fixP->fx_r_type == BFD_RELOC_NIOS2_TLS_GD16
1278 || fixP->fx_r_type == BFD_RELOC_NIOS2_TLS_LDM16
1279 || fixP->fx_r_type == BFD_RELOC_NIOS2_TLS_LDO16
1280 || fixP->fx_r_type == BFD_RELOC_NIOS2_TLS_IE16
1281 || fixP->fx_r_type == BFD_RELOC_NIOS2_TLS_LE16
1282 || fixP->fx_r_type == BFD_RELOC_NIOS2_GOTOFF
1283 || fixP->fx_r_type == BFD_RELOC_NIOS2_TLS_DTPREL
1c2de463
SL		 1284 || fixP->fx_r_type == BFD_RELOC_NIOS2_CALL26_NOAT
1285 || fixP->fx_r_type == BFD_RELOC_NIOS2_GOT_LO
1286 || fixP->fx_r_type == BFD_RELOC_NIOS2_GOT_HA
1287 || fixP->fx_r_type == BFD_RELOC_NIOS2_CALL_LO
1288 || fixP->fx_r_type == BFD_RELOC_NIOS2_CALL_HA
c8c8175b
SL		 1289 || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_S12
1290 || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_I10_1_PCREL
1291 || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_T1I7_1_PCREL
1292 || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_T1I7_2
1293 || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_T2I4
1294 || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_T2I4_1
1295 || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_T2I4_2
1296 || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_X1I7_2
1297 || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_X2L5
1298 || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_F1I5_2
1299 || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_L5I4X1
1300 || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_T1X1I6
1301 || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_T1X1I6_2
36591ba1
SL		 1302 /* Add other relocs here as we generate them. */
1303 ));
1304
1305 if (fixP->fx_r_type == BFD_RELOC_64)
1306 {
1307 /* We may reach here due to .8byte directives, but we never output
3739860c 1308 BFD_RELOC_64; it must be resolved. */
36591ba1
SL		 1309 if (fixP->fx_addsy != NULL)
1310 as_bad_where (fixP->fx_file, fixP->fx_line,
1311 _("cannot create 64-bit relocation"));
1312 else
1313 {
1314 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
1315 *valP, 8);
1316 fixP->fx_done = 1;
1317 }
1318 return;
1319 }
1320
1321 /* The value passed in valP can be the value of a fully
1322 resolved expression, or it can be the value of a partially
1323 resolved expression. In the former case, both fixP->fx_addsy
1324 and fixP->fx_subsy are NULL, and fixP->fx_offset == *valP, and
1325 we can fix up the instruction that fixP relates to.
1326 In the latter case, one or both of fixP->fx_addsy and
1327 fixP->fx_subsy are not NULL, and fixP->fx_offset may or may not
1328 equal *valP. We don't need to check for fixP->fx_subsy being null
1329 because the generic part of the assembler generates an error if
1330 it is not an absolute symbol. */
1331 if (fixP->fx_addsy != NULL)
1332 /* Partially resolved expression. */
1333 {
1334 fixP->fx_addnumber = fixP->fx_offset;
1335 fixP->fx_done = 0;
1336
1337 switch (fixP->fx_r_type)
1338 {
1339 case BFD_RELOC_NIOS2_TLS_GD16:
1340 case BFD_RELOC_NIOS2_TLS_LDM16:
1341 case BFD_RELOC_NIOS2_TLS_LDO16:
1342 case BFD_RELOC_NIOS2_TLS_IE16:
1343 case BFD_RELOC_NIOS2_TLS_LE16:
1344 case BFD_RELOC_NIOS2_TLS_DTPMOD:
1345 case BFD_RELOC_NIOS2_TLS_DTPREL:
1346 case BFD_RELOC_NIOS2_TLS_TPREL:
1347 S_SET_THREAD_LOCAL (fixP->fx_addsy);
1348 break;
1349 default:
1350 break;
1351 }
1352 }
1353 else
1354 /* Fully resolved fixup. */
1355 {
1356 reloc_howto_type *howto
1357 = bfd_reloc_type_lookup (stdoutput, fixP->fx_r_type);
1358
1359 if (howto == NULL)
1360 as_bad_where (fixP->fx_file, fixP->fx_line,
1361 _("relocation is not supported"));
1362 else
1363 {
1364 valueT fixup = *valP;
1365 valueT value;
1366 char *buf;
1367
1368 /* If this is a pc-relative relocation, we need to
1369 subtract the current offset within the object file
1370 FIXME : for some reason fixP->fx_pcrel isn't 1 when it should be
1371 so I'm using the howto structure instead to determine this. */
1372 if (howto->pc_relative == 1)
c8c8175b
SL		 1373 {
1374 fixup = (fixup - (fixP->fx_frag->fr_address + fixP->fx_where
1375 + fixP->fx_size));
1376 *valP = fixup;
1377 }
36591ba1
SL		 1378
1379 /* Get the instruction or data to be fixed up. */
1380 buf = fixP->fx_frag->fr_literal + fixP->fx_where;
1381 value = md_chars_to_number (buf, fixP->fx_size);
1382
1383 /* Check for overflow, emitting a diagnostic if necessary. */
1384 if (nios2_check_overflow (fixup, howto))
1385 nios2_diagnose_overflow (fixup, howto, fixP, value);
1386
1387 /* Apply the right shift. */
1388 fixup = ((signed)fixup) >> howto->rightshift;
1389
1390 /* Truncate the fixup to right size. */
1391 switch (fixP->fx_r_type)
1392 {
1393 case BFD_RELOC_NIOS2_HI16:
1394 fixup = (fixup >> 16) & 0xFFFF;
1395 break;
1396 case BFD_RELOC_NIOS2_LO16:
1397 fixup = fixup & 0xFFFF;
1398 break;
1399 case BFD_RELOC_NIOS2_HIADJ16:
5d5755a7
SL		 1400 fixup = ((((fixup >> 16) & 0xFFFF) + ((fixup >> 15) & 0x01))
1401 & 0xFFFF);
36591ba1
SL		 1402 break;
1403 default:
1404 {
1405 int n = sizeof (fixup) * 8 - howto->bitsize;
1406 fixup = (fixup << n) >> n;
1407 break;
1408 }
1409 }
1410
1411 /* Fix up the instruction. */
1412 value = (value & ~howto->dst_mask) | (fixup << howto->bitpos);
1413 md_number_to_chars (buf, value, fixP->fx_size);
1414 }
1415
1416 fixP->fx_done = 1;
1417 }
1418
1419 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT)
1420 {
1421 fixP->fx_done = 0;
1422 if (fixP->fx_addsy
1423 && !S_IS_DEFINED (fixP->fx_addsy) && !S_IS_WEAK (fixP->fx_addsy))
1424 S_SET_WEAK (fixP->fx_addsy);
1425 }
1426 else if (fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
1427 fixP->fx_done = 0;
1428}
1429
1430
1431\f
1432/** Instruction parsing support. */
1433
96ba4233
SL		 1434/* General internal error routine. */
1435
1436static void
1437bad_opcode (const struct nios2_opcode *op)
1438{
1439 fprintf (stderr, _("internal error: broken opcode descriptor for `%s %s'\n"),
1440 op->name, op->args);
1441 as_fatal (_("Broken assembler. No assembly attempted."));
1442}
1443
36591ba1
SL		 1444/* Special relocation directive strings. */
1445
1446struct nios2_special_relocS
1447{
1448 const char *string;
1449 bfd_reloc_code_real_type reloc_type;
1450};
1451
1c2de463
SL		 1452/* This table is sorted so that prefix strings are listed after the longer
1453 strings that include them -- e.g., %got after %got_hiadj, etc. */
1454
36591ba1
SL		 1455struct nios2_special_relocS nios2_special_reloc[] = {
1456 {"%hiadj", BFD_RELOC_NIOS2_HIADJ16},
1457 {"%hi", BFD_RELOC_NIOS2_HI16},
1458 {"%lo", BFD_RELOC_NIOS2_LO16},
1459 {"%gprel", BFD_RELOC_NIOS2_GPREL},
1c2de463
SL		 1460 {"%call_lo", BFD_RELOC_NIOS2_CALL_LO},
1461 {"%call_hiadj", BFD_RELOC_NIOS2_CALL_HA},
36591ba1
SL		 1462 {"%call", BFD_RELOC_NIOS2_CALL16},
1463 {"%gotoff_lo", BFD_RELOC_NIOS2_GOTOFF_LO},
1464 {"%gotoff_hiadj", BFD_RELOC_NIOS2_GOTOFF_HA},
1c2de463
SL		 1465 {"%gotoff", BFD_RELOC_NIOS2_GOTOFF},
1466 {"%got_hiadj", BFD_RELOC_NIOS2_GOT_HA},
1467 {"%got_lo", BFD_RELOC_NIOS2_GOT_LO},
1468 {"%got", BFD_RELOC_NIOS2_GOT16},
36591ba1
SL		 1469 {"%tls_gd", BFD_RELOC_NIOS2_TLS_GD16},
1470 {"%tls_ldm", BFD_RELOC_NIOS2_TLS_LDM16},
1471 {"%tls_ldo", BFD_RELOC_NIOS2_TLS_LDO16},
1472 {"%tls_ie", BFD_RELOC_NIOS2_TLS_IE16},
1473 {"%tls_le", BFD_RELOC_NIOS2_TLS_LE16},
36591ba1
SL		 1474};
1475
1476#define NIOS2_NUM_SPECIAL_RELOCS \
1477 (sizeof(nios2_special_reloc)/sizeof(nios2_special_reloc[0]))
1478const int nios2_num_special_relocs = NIOS2_NUM_SPECIAL_RELOCS;
1479
1480/* Creates a new nios2_insn_relocS and returns a pointer to it. */
1481static nios2_insn_relocS *
1482nios2_insn_reloc_new (bfd_reloc_code_real_type reloc_type, unsigned int pcrel)
1483{
1484 nios2_insn_relocS *retval;
1485 retval = (nios2_insn_relocS *) malloc (sizeof (nios2_insn_relocS));
1486 if (retval == NULL)
1487 {
1488 as_bad (_("can't create relocation"));
1489 abort ();
1490 }
1491
1492 /* Fill out the fields with default values. */
1493 retval->reloc_next = NULL;
1494 retval->reloc_type = reloc_type;
1495 retval->reloc_pcrel = pcrel;
1496 return retval;
1497}
1498
1499/* Frees up memory previously allocated by nios2_insn_reloc_new(). */
1500/* FIXME: this is never called; memory leak? */
1501#if 0
1502static void
1503nios2_insn_reloc_destroy (nios2_insn_relocS *reloc)
1504{
1505 gas_assert (reloc != NULL);
1506 free (reloc);
1507}
1508#endif
1509
96ba4233
SL		 1510/* Look up a register name and validate it for the given regtype.
1511 Return the register mapping or NULL on failure. */
1512static struct nios2_reg *
1513nios2_parse_reg (const char *token, unsigned long regtype)
1514{
1515 struct nios2_reg *reg = nios2_reg_lookup (token);
1516
1517 if (reg == NULL)
1518 {
1519 as_bad (_("unknown register %s"), token);
1520 return NULL;
1521 }
1522
1523 /* Matched a register, but is it the wrong type? */
1524 if (!(regtype & reg->regtype))
1525 {
1526 if (regtype & REG_CONTROL)
1527 as_bad (_("expecting control register"));
1528 else if (reg->regtype & REG_CONTROL)
1529 as_bad (_("illegal use of control register"));
1530 else if (reg->regtype & REG_COPROCESSOR)
1531 as_bad (_("illegal use of coprocessor register"));
1532 else
1533 as_bad (_("invalid register %s"), token);
1534 return NULL;
1535 }
1536
1537 /* Warn for explicit use of special registers. */
1538 if (reg->regtype & REG_NORMAL)
1539 {
1540 if (!nios2_as_options.noat && reg->index == 1)
1541 as_warn (_("Register at (r1) can sometimes be corrupted by "
1542 "assembler optimizations.\n"
1543 "Use .set noat to turn off those optimizations "
1544 "(and this warning)."));
1545 if (!nios2_as_options.nobreak && reg->index == 25)
1546 as_warn (_("The debugger will corrupt bt (r25).\n"
1547 "If you don't need to debug this "
1548 "code use .set nobreak to turn off this warning."));
1549 if (!nios2_as_options.nobreak && reg->index == 30)
1550 as_warn (_("The debugger will corrupt sstatus/ba (r30).\n"
1551 "If you don't need to debug this "
1552 "code use .set nobreak to turn off this warning."));
1553 }
1554
1555 return reg;
1556}
1557
c8c8175b
SL		 1558/* This function parses a reglist for ldwm/stwm and push.n/pop.n
1559 instructions, given as a brace-enclosed register list. The tokenizer
1560 has replaced commas in the token with spaces.
1561 The return value is a bitmask of registers in the set. It also
1562 sets nios2_reglist_mask and nios2_reglist_dir to allow error checking
1563 when parsing the base register. */
1564
1565static unsigned long nios2_reglist_mask;
1566static int nios2_reglist_dir;
1567
1568static unsigned long
1569nios2_parse_reglist (char *token, const struct nios2_opcode *op)
1570{
1571 unsigned long mask = 0;
1572 int dir = 0;
1573 unsigned long regtype = 0;
1574 int last = -1;
1575 const char *regname;
1576
1577 nios2_reglist_mask = 0;
1578 nios2_reglist_dir = 0;
1579
1580 if (op->match == MATCH_R2_LDWM || op->match == MATCH_R2_STWM)
1581 {
1582 regtype = REG_LDWM;
1583 dir = 0;
1584 }
1585 else if (op->match == MATCH_R2_PUSH_N)
1586 {
1587 regtype = REG_POP;
1588 dir = -1;
1589 }
1590 else if (op->match == MATCH_R2_POP_N)
1591 {
1592 regtype = REG_POP;
1593 dir = 1;
1594 }
1595 else
1596 bad_opcode (op);
1597
1598 for (regname = strtok (token, "{ }");
1599 regname;
1600 regname = strtok (NULL, "{ }"))
1601 {
1602 int regno;
1603 struct nios2_reg *reg = nios2_parse_reg (regname, regtype);
1604
1605 if (!reg)
1606 break;
1607 regno = reg->index;
1608
1609 /* Make sure registers are listed in proper sequence. */
1610 if (last >= 0)
1611 {
1612 if (regno == last)
1613 {
1614 as_bad ("duplicate register %s\n", reg->name);
1615 return 0;
1616 }
1617 else if (dir == 0)
1618 dir = (regno < last ? -1 : 1);
1619 else if ((dir > 0 && regno < last)
1620 || (dir < 0 && regno > last)
1621 || (op->match == MATCH_R2_PUSH_N
1622 && ! ((last == 31 && regno == 28)
1623 || (last == 31 && regno <= 23)
1624 || (last == 28 && regno <= 23)
1625 || (regno < 23 && regno == last - 1)))
1626 || (op->match == MATCH_R2_POP_N
1627 && ! ((regno == 31 && last == 28)
1628 || (regno == 31 && last <= 23)
1629 || (regno == 28 && last <= 23)
1630 || (last < 23 && last == regno - 1))))
1631 {
1632 as_bad ("invalid register order");
1633 return 0;
1634 }
1635 }
1636
1637 mask |= 1 << regno;
1638 last = regno;
1639 }
1640
1641 /* Check that all ldwm/stwm regs belong to the same set. */
1642 if ((op->match == MATCH_R2_LDWM || op->match == MATCH_R2_STWM)
1643 && (mask & 0x00003ffc) && (mask & 0x90ffc000))
1644 {
1645 as_bad ("invalid register set in reglist");
1646 return 0;
1647 }
1648
1649 /* Check that push.n/pop.n regs include RA. */
1650 if ((op->match == MATCH_R2_PUSH_N || op->match == MATCH_R2_POP_N)
1651 && ((mask & 0x80000000) == 0))
1652 {
1653 as_bad ("reglist must include ra (r31)");
1654 return 0;
1655 }
1656
1657 /* Check that there is at least one register in the set. */
1658 if (!mask)
1659 {
1660 as_bad ("reglist must include at least one register");
1661 return 0;
1662 }
1663
1664 /* OK, reglist passed validation. */
1665 nios2_reglist_mask = mask;
1666 nios2_reglist_dir = dir;
1667 return mask;
1668}
1669
1670/* This function parses the base register and options used by the ldwm/stwm
1671 instructions. Returns the base register and sets the option arguments
1672 accordingly. On failure, returns NULL. */
1673static struct nios2_reg *
1674nios2_parse_base_register (char *str, int *direction, int *writeback, int *ret)
1675{
1676 char *regname;
1677 struct nios2_reg *reg;
1678
1679 *direction = 0;
1680 *writeback = 0;
1681 *ret = 0;
1682
1683 /* Check for --. */
1684 if (strncmp (str, "--", 2) == 0)
1685 {
1686 str += 2;
1687 *direction -= 1;
1688 }
1689
1690 /* Extract the base register. */
1691 if (*str != '(')
1692 {
1693 as_bad ("expected '(' before base register");
1694 return NULL;
1695 }
1696 str++;
1697 regname = str;
1698 str = strchr (str, ')');
1699 if (!str)
1700 {
1701 as_bad ("expected ')' after base register");
1702 return NULL;
1703 }
1704 *str = '\0';
1705 str++;
1706 reg = nios2_parse_reg (regname, REG_NORMAL);
1707 if (reg == NULL)
1708 return NULL;
1709
1710 /* Check for ++. */
1711 if (strncmp (str, "++", 2) == 0)
1712 {
1713 str += 2;
1714 *direction += 1;
1715 }
1716
1717 /* Ensure that either -- or ++ is specified, but not both. */
1718 if (*direction == 0)
1719 {
1720 as_bad ("invalid base register syntax");
1721 return NULL;;
1722 }
1723
1724 /* Check for options. The tokenizer has replaced commas with spaces. */
1725 while (*str)
1726 {
1727 while (*str == ' ')
1728 str++;
1729 if (strncmp (str, "writeback", 9) == 0)
1730 {
1731 *writeback = 1;
1732 str += 9;
1733 }
1734 else if (strncmp (str, "ret", 3) == 0)
1735 {
1736 *ret = 1;
1737 str += 3;
1738 }
1739 else if (*str)
1740 {
1741 as_bad ("invalid option syntax");
1742 return NULL;
1743 }
1744 }
1745
1746 return reg;
1747}
1748
1749
36591ba1
SL		 1750/* The various nios2_assemble_* functions call this
1751 function to generate an expression from a string representing an expression.
1752 It then tries to evaluate the expression, and if it can, returns its value.
3739860c 1753 If not, it creates a new nios2_insn_relocS and stores the expression and
36591ba1
SL		 1754 reloc_type for future use. */
1755static unsigned long
1756nios2_assemble_expression (const char *exprstr,
1757 nios2_insn_infoS *insn,
c8c8175b 1758 bfd_reloc_code_real_type orig_reloc_type,
36591ba1
SL		 1759 unsigned int pcrel)
1760{
1761 nios2_insn_relocS *reloc;
1762 char *saved_line_ptr;
c8c8175b 1763 unsigned long value = 0;
36591ba1 1764 int i;
c8c8175b 1765 bfd_reloc_code_real_type reloc_type = orig_reloc_type;
36591ba1
SL		 1766
1767 gas_assert (exprstr != NULL);
1768 gas_assert (insn != NULL);
1769
1770 /* Check for relocation operators.
1771 Change the relocation type and advance the ptr to the start of
1772 the expression proper. */
1773 for (i = 0; i < nios2_num_special_relocs; i++)
1774 if (strstr (exprstr, nios2_special_reloc[i].string) != NULL)
1775 {
1776 reloc_type = nios2_special_reloc[i].reloc_type;
1777 exprstr += strlen (nios2_special_reloc[i].string) + 1;
3739860c 1778
36591ba1
SL		 1779 /* %lo and %hiadj have different meanings for PC-relative
1780 expressions. */
1781 if (pcrel)
1782 {
1783 if (reloc_type == BFD_RELOC_NIOS2_LO16)
1784 reloc_type = BFD_RELOC_NIOS2_PCREL_LO;
1785 if (reloc_type == BFD_RELOC_NIOS2_HIADJ16)
1786 reloc_type = BFD_RELOC_NIOS2_PCREL_HA;
1787 }
3739860c 1788
36591ba1
SL		 1789 break;
1790 }
1791
c8c8175b
SL		 1792 /* No relocation allowed; we must have a constant expression. */
1793 if (orig_reloc_type == BFD_RELOC_NONE)
1794 {
1795 expressionS exp;
1796
1797 /* Parse the expression string. */
1798 saved_line_ptr = input_line_pointer;
1799 input_line_pointer = (char *) exprstr;
1800 expression (&exp);
1801 input_line_pointer = saved_line_ptr;
1802
1803 /* If we don't have a constant, give an error. */
1804 if (reloc_type != orig_reloc_type || exp.X_op != O_constant)
1805 as_bad (_("expression must be constant"));
1806 else
1807 value = exp.X_add_number;
1808 return (unsigned long) value;
1809 }
1810
36591ba1
SL		 1811 /* We potentially have a relocation. */
1812 reloc = nios2_insn_reloc_new (reloc_type, pcrel);
96ba4233
SL		 1813 reloc->reloc_next = insn->insn_reloc;
1814 insn->insn_reloc = reloc;
36591ba1
SL		 1815
1816 /* Parse the expression string. */
1817 saved_line_ptr = input_line_pointer;
1818 input_line_pointer = (char *) exprstr;
1819 expression (&reloc->reloc_expression);
1820 input_line_pointer = saved_line_ptr;
1821
1822 /* This is redundant as the fixup will put this into
1823 the instruction, but it is included here so that
1824 self-test mode (-r) works. */
36591ba1
SL		 1825 if (nios2_mode == NIOS2_MODE_TEST
1826 && reloc->reloc_expression.X_op == O_constant)
1827 value = reloc->reloc_expression.X_add_number;
1828
1829 return (unsigned long) value;
1830}
1831
c8c8175b
SL		 1832/* Encode a 3-bit register number, giving an error if this is not possible. */
1833static unsigned int
1834nios2_assemble_reg3 (const char *token)
1835{
1836 struct nios2_reg *reg = nios2_parse_reg (token, REG_3BIT);
1837 int j;
1838
1839 if (reg == NULL)
1840 return 0;
1841
1842 for (j = 0; j < nios2_num_r2_reg3_mappings; j++)
1843 if (nios2_r2_reg3_mappings[j] == reg->index)
1844 return j;
1845
1846 /* Should never get here if we passed validation. */
1847 as_bad (_("invalid register %s"), token);
1848 return 0;
1849}
36591ba1 1850
96ba4233 1851/* Argument assemble functions. */
c8c8175b
SL		 1852
1853
1854/* Control register index. */
3739860c 1855static void
96ba4233 1856nios2_assemble_arg_c (const char *token, nios2_insn_infoS *insn)
36591ba1 1857{
96ba4233
SL		 1858 struct nios2_reg *reg = nios2_parse_reg (token, REG_CONTROL);
1859 const struct nios2_opcode *op = insn->insn_nios2_opcode;
36591ba1 1860
96ba4233
SL		 1861 if (reg == NULL)
1862 return;
36591ba1 1863
96ba4233
SL		 1864 switch (op->format)
1865 {
1866 case iw_r_type:
1867 insn->insn_code |= SET_IW_R_IMM5 (reg->index);
1868 break;
c8c8175b
SL		 1869 case iw_F3X6L5_type:
1870 insn->insn_code |= SET_IW_F3X6L5_IMM5 (reg->index);
1871 break;
96ba4233
SL		 1872 default:
1873 bad_opcode (op);
36591ba1
SL		 1874 }
1875}
1876
c8c8175b 1877/* Destination register. */
3739860c 1878static void
96ba4233 1879nios2_assemble_arg_d (const char *token, nios2_insn_infoS *insn)
36591ba1 1880{
96ba4233
SL		 1881 const struct nios2_opcode *op = insn->insn_nios2_opcode;
1882 unsigned long regtype = REG_NORMAL;
1883 struct nios2_reg *reg;
36591ba1 1884
c8c8175b 1885 if (op->format == iw_custom_type || op->format == iw_F3X8_type)
96ba4233
SL		 1886 regtype |= REG_COPROCESSOR;
1887 reg = nios2_parse_reg (token, regtype);
1888 if (reg == NULL)
1889 return;
36591ba1 1890
96ba4233 1891 switch (op->format)
36591ba1 1892 {
96ba4233
SL		 1893 case iw_r_type:
1894 insn->insn_code |= SET_IW_R_C (reg->index);
1895 break;
1896 case iw_custom_type:
1897 insn->insn_code |= SET_IW_CUSTOM_C (reg->index);
1898 if (reg->regtype & REG_COPROCESSOR)
1899 insn->insn_code |= SET_IW_CUSTOM_READC (0);
36591ba1 1900 else
96ba4233
SL		 1901 insn->insn_code |= SET_IW_CUSTOM_READC (1);
1902 break;
c8c8175b
SL		 1903 case iw_F3X6L5_type:
1904 case iw_F3X6_type:
1905 insn->insn_code |= SET_IW_F3X6L5_C (reg->index);
1906 break;
1907 case iw_F3X8_type:
1908 insn->insn_code |= SET_IW_F3X8_C (reg->index);
1909 if (reg->regtype & REG_COPROCESSOR)
1910 insn->insn_code |= SET_IW_F3X8_READC (0);
1911 else
1912 insn->insn_code |= SET_IW_F3X8_READC (1);
1913 break;
1914 case iw_F2_type:
1915 insn->insn_code |= SET_IW_F2_B (reg->index);
1916 break;
96ba4233
SL		 1917 default:
1918 bad_opcode (op);
36591ba1
SL		 1919 }
1920}
1921
c8c8175b 1922/* Source register 1. */
3739860c 1923static void
96ba4233 1924nios2_assemble_arg_s (const char *token, nios2_insn_infoS *insn)
36591ba1 1925{
96ba4233
SL		 1926 const struct nios2_opcode *op = insn->insn_nios2_opcode;
1927 unsigned long regtype = REG_NORMAL;
1928 struct nios2_reg *reg;
36591ba1 1929
c8c8175b 1930 if (op->format == iw_custom_type || op->format == iw_F3X8_type)
96ba4233
SL		 1931 regtype |= REG_COPROCESSOR;
1932 reg = nios2_parse_reg (token, regtype);
1933 if (reg == NULL)
1934 return;
36591ba1 1935
96ba4233 1936 switch (op->format)
36591ba1 1937 {
96ba4233 1938 case iw_r_type:
c8c8175b
SL		 1939 if (op->match == MATCH_R1_JMP && reg->index == 31)
1940 as_bad (_("r31 cannot be used with jmp; use ret instead"));
96ba4233
SL		 1941 insn->insn_code |= SET_IW_R_A (reg->index);
1942 break;
1943 case iw_i_type:
1944 insn->insn_code |= SET_IW_I_A (reg->index);
1945 break;
1946 case iw_custom_type:
1947 insn->insn_code |= SET_IW_CUSTOM_A (reg->index);
1948 if (reg->regtype & REG_COPROCESSOR)
1949 insn->insn_code |= SET_IW_CUSTOM_READA (0);
1950 else
1951 insn->insn_code |= SET_IW_CUSTOM_READA (1);
1952 break;
c8c8175b
SL		 1953 case iw_F2I16_type:
1954 insn->insn_code |= SET_IW_F2I16_A (reg->index);
1955 break;
1956 case iw_F2X4I12_type:
1957 insn->insn_code |= SET_IW_F2X4I12_A (reg->index);
1958 break;
1959 case iw_F1X4I12_type:
1960 insn->insn_code |= SET_IW_F1X4I12_A (reg->index);
1961 break;
1962 case iw_F1X4L17_type:
1963 insn->insn_code |= SET_IW_F1X4L17_A (reg->index);
1964 break;
1965 case iw_F3X6L5_type:
1966 case iw_F3X6_type:
1967 if (op->match == MATCH_R2_JMP && reg->index == 31)
1968 as_bad (_("r31 cannot be used with jmp; use ret instead"));
1969 insn->insn_code |= SET_IW_F3X6L5_A (reg->index);
1970 break;
1971 case iw_F2X6L10_type:
1972 insn->insn_code |= SET_IW_F2X6L10_A (reg->index);
1973 break;
1974 case iw_F3X8_type:
1975 insn->insn_code |= SET_IW_F3X8_A (reg->index);
1976 if (reg->regtype & REG_COPROCESSOR)
1977 insn->insn_code |= SET_IW_F3X8_READA (0);
1978 else
1979 insn->insn_code |= SET_IW_F3X8_READA (1);
1980 break;
1981 case iw_F1X1_type:
1982 if (op->match == MATCH_R2_JMPR_N && reg->index == 31)
1983 as_bad (_("r31 cannot be used with jmpr.n; use ret.n instead"));
1984 insn->insn_code |= SET_IW_F1X1_A (reg->index);
1985 break;
1986 case iw_F1I5_type:
1987 /* Implicit stack pointer reference. */
1988 if (reg->index != 27)
1989 as_bad (_("invalid register %s"), token);
1990 break;
1991 case iw_F2_type:
1992 insn->insn_code |= SET_IW_F2_A (reg->index);
1993 break;
96ba4233
SL		 1994 default:
1995 bad_opcode (op);
36591ba1
SL		 1996 }
1997}
1998
c8c8175b 1999/* Source register 2. */
3739860c 2000static void
96ba4233 2001nios2_assemble_arg_t (const char *token, nios2_insn_infoS *insn)
36591ba1 2002{
96ba4233
SL		 2003 const struct nios2_opcode *op = insn->insn_nios2_opcode;
2004 unsigned long regtype = REG_NORMAL;
2005 struct nios2_reg *reg;
36591ba1 2006
c8c8175b 2007 if (op->format == iw_custom_type || op->format == iw_F3X8_type)
96ba4233
SL		 2008 regtype |= REG_COPROCESSOR;
2009 reg = nios2_parse_reg (token, regtype);
2010 if (reg == NULL)
2011 return;
36591ba1 2012
96ba4233
SL		 2013 switch (op->format)
2014 {
2015 case iw_r_type:
2016 insn->insn_code |= SET_IW_R_B (reg->index);
2017 break;
2018 case iw_i_type:
2019 insn->insn_code |= SET_IW_I_B (reg->index);
2020 break;
2021 case iw_custom_type:
2022 insn->insn_code |= SET_IW_CUSTOM_B (reg->index);
2023 if (reg->regtype & REG_COPROCESSOR)
2024 insn->insn_code |= SET_IW_CUSTOM_READB (0);
36591ba1 2025 else
96ba4233
SL		 2026 insn->insn_code |= SET_IW_CUSTOM_READB (1);
2027 break;
c8c8175b
SL		 2028 case iw_F2I16_type:
2029 insn->insn_code |= SET_IW_F2I16_B (reg->index);
2030 break;
2031 case iw_F2X4I12_type:
2032 insn->insn_code |= SET_IW_F2X4I12_B (reg->index);
2033 break;
2034 case iw_F3X6L5_type:
2035 case iw_F3X6_type:
2036 insn->insn_code |= SET_IW_F3X6L5_B (reg->index);
2037 break;
2038 case iw_F2X6L10_type:
2039 insn->insn_code |= SET_IW_F2X6L10_B (reg->index);
2040 break;
2041 case iw_F3X8_type:
2042 insn->insn_code |= SET_IW_F3X8_B (reg->index);
2043 if (reg->regtype & REG_COPROCESSOR)
2044 insn->insn_code |= SET_IW_F3X8_READB (0);
2045 else
2046 insn->insn_code |= SET_IW_F3X8_READB (1);
2047 break;
2048 case iw_F1I5_type:
2049 insn->insn_code |= SET_IW_F1I5_B (reg->index);
2050 break;
2051 case iw_F2_type:
2052 insn->insn_code |= SET_IW_F2_B (reg->index);
2053 break;
2054 case iw_T1X1I6_type:
2055 /* Implicit zero register reference. */
2056 if (reg->index != 0)
2057 as_bad (_("invalid register %s"), token);
2058 break;
2059
96ba4233
SL		 2060 default:
2061 bad_opcode (op);
36591ba1
SL		 2062 }
2063}
2064
c8c8175b 2065/* Destination register w/3-bit encoding. */
3739860c 2066static void
c8c8175b 2067nios2_assemble_arg_D (const char *token, nios2_insn_infoS *insn)
36591ba1 2068{
96ba4233 2069 const struct nios2_opcode *op = insn->insn_nios2_opcode;
c8c8175b 2070 int reg = nios2_assemble_reg3 (token);
3739860c 2071
96ba4233 2072 switch (op->format)
36591ba1 2073 {
c8c8175b
SL		 2074 case iw_T1I7_type:
2075 insn->insn_code |= SET_IW_T1I7_A3 (reg);
2076 break;
2077 case iw_T2X1L3_type:
2078 insn->insn_code |= SET_IW_T2X1L3_B3 (reg);
2079 break;
2080 case iw_T2X1I3_type:
2081 insn->insn_code |= SET_IW_T2X1I3_B3 (reg);
2082 break;
2083 case iw_T3X1_type:
2084 insn->insn_code |= SET_IW_T3X1_C3 (reg);
2085 break;
2086 case iw_T2X3_type:
2087 /* Some instructions using this encoding take 3 register arguments,
2088 requiring the destination register to be the same as the first
2089 source register. */
2090 if (op->num_args == 3)
2091 insn->insn_code |= SET_IW_T2X3_A3 (reg);
2092 else
2093 insn->insn_code |= SET_IW_T2X3_B3 (reg);
96ba4233
SL		 2094 break;
2095 default:
2096 bad_opcode (op);
36591ba1
SL		 2097 }
2098}
2099
c8c8175b 2100/* Source register w/3-bit encoding. */
3739860c 2101static void
c8c8175b 2102nios2_assemble_arg_S (const char *token, nios2_insn_infoS *insn)
36591ba1 2103{
96ba4233 2104 const struct nios2_opcode *op = insn->insn_nios2_opcode;
c8c8175b 2105 int reg = nios2_assemble_reg3 (token);
3739860c 2106
96ba4233 2107 switch (op->format)
36591ba1 2108 {
c8c8175b
SL		 2109 case iw_T1I7_type:
2110 insn->insn_code |= SET_IW_T1I7_A3 (reg);
2111 break;
2112 case iw_T2I4_type:
2113 insn->insn_code |= SET_IW_T2I4_A3 (reg);
2114 break;
2115 case iw_T2X1L3_type:
2116 insn->insn_code |= SET_IW_T2X1L3_A3 (reg);
2117 break;
2118 case iw_T2X1I3_type:
2119 insn->insn_code |= SET_IW_T2X1I3_A3 (reg);
2120 break;
2121 case iw_T3X1_type:
2122 insn->insn_code |= SET_IW_T3X1_A3 (reg);
2123 break;
2124 case iw_T2X3_type:
2125 /* Some instructions using this encoding take 3 register arguments,
2126 requiring the destination register to be the same as the first
2127 source register. */
2128 if (op->num_args == 3)
2129 {
2130 int dreg = GET_IW_T2X3_A3 (insn->insn_code);
2131 if (dreg != reg)
2132 as_bad ("source and destination registers must be the same");
2133 }
2134 else
2135 insn->insn_code |= SET_IW_T2X3_A3 (reg);
2136 break;
2137 case iw_T1X1I6_type:
2138 insn->insn_code |= SET_IW_T1X1I6_A3 (reg);
96ba4233
SL		 2139 break;
2140 default:
2141 bad_opcode (op);
36591ba1
SL		 2142 }
2143}
2144
c8c8175b 2145/* Source register 2 w/3-bit encoding. */
3739860c 2146static void
c8c8175b 2147nios2_assemble_arg_T (const char *token, nios2_insn_infoS *insn)
36591ba1 2148{
96ba4233 2149 const struct nios2_opcode *op = insn->insn_nios2_opcode;
c8c8175b 2150 int reg = nios2_assemble_reg3 (token);
3739860c 2151
96ba4233
SL		 2152 switch (op->format)
2153 {
c8c8175b
SL		 2154 case iw_T2I4_type:
2155 insn->insn_code |= SET_IW_T2I4_B3 (reg);
2156 break;
2157 case iw_T3X1_type:
2158 insn->insn_code |= SET_IW_T3X1_B3 (reg);
2159 break;
2160 case iw_T2X3_type:
2161 insn->insn_code |= SET_IW_T2X3_B3 (reg);
96ba4233
SL		 2162 break;
2163 default:
2164 bad_opcode (op);
36591ba1
SL		 2165 }
2166}
2167
c8c8175b 2168/* 16-bit signed immediate. */
3739860c 2169static void
c8c8175b 2170nios2_assemble_arg_i (const char *token, nios2_insn_infoS *insn)
dad60f8e 2171{
96ba4233
SL		 2172 const struct nios2_opcode *op = insn->insn_nios2_opcode;
2173 unsigned int val;
dad60f8e 2174
96ba4233
SL		 2175 switch (op->format)
2176 {
c8c8175b 2177 case iw_i_type:
96ba4233 2178 val = nios2_assemble_expression (token, insn,
c8c8175b
SL		 2179 BFD_RELOC_NIOS2_S16, 0);
2180 insn->constant_bits |= SET_IW_I_IMM16 (val);
2181 break;
2182 case iw_F2I16_type:
2183 val = nios2_assemble_expression (token, insn,
2184 BFD_RELOC_NIOS2_S16, 0);
2185 insn->constant_bits |= SET_IW_F2I16_IMM16 (val);
96ba4233
SL		 2186 break;
2187 default:
2188 bad_opcode (op);
dad60f8e
SL		 2189 }
2190}
2191
c8c8175b 2192/* 12-bit signed immediate. */
3739860c 2193static void
c8c8175b 2194nios2_assemble_arg_I (const char *token, nios2_insn_infoS *insn)
36591ba1 2195{
96ba4233
SL		 2196 const struct nios2_opcode *op = insn->insn_nios2_opcode;
2197 unsigned int val;
36591ba1 2198
96ba4233
SL		 2199 switch (op->format)
2200 {
c8c8175b 2201 case iw_F2X4I12_type:
96ba4233 2202 val = nios2_assemble_expression (token, insn,
c8c8175b
SL		 2203 BFD_RELOC_NIOS2_R2_S12, 0);
2204 insn->constant_bits |= SET_IW_F2X4I12_IMM12 (val);
2205 break;
2206 case iw_F1X4I12_type:
2207 val = nios2_assemble_expression (token, insn,
2208 BFD_RELOC_NIOS2_R2_S12, 0);
2209 insn->constant_bits |= SET_IW_F2X4I12_IMM12 (val);
96ba4233
SL		 2210 break;
2211 default:
2212 bad_opcode (op);
36591ba1
SL		 2213 }
2214}
2215
c8c8175b 2216/* 16-bit unsigned immediate. */
3739860c 2217static void
c8c8175b 2218nios2_assemble_arg_u (const char *token, nios2_insn_infoS *insn)
36591ba1 2219{
96ba4233
SL		 2220 const struct nios2_opcode *op = insn->insn_nios2_opcode;
2221 unsigned int val;
36591ba1 2222
96ba4233 2223 switch (op->format)
36591ba1 2224 {
c8c8175b
SL		 2225 case iw_i_type:
2226 val = nios2_assemble_expression (token, insn,
2227 BFD_RELOC_NIOS2_U16, 0);
2228 insn->constant_bits |= SET_IW_I_IMM16 (val);
2229 break;
2230 case iw_F2I16_type:
2231 val = nios2_assemble_expression (token, insn,
2232 BFD_RELOC_NIOS2_U16, 0);
2233 insn->constant_bits |= SET_IW_F2I16_IMM16 (val);
2234 break;
2235 default:
2236 bad_opcode (op);
2237 }
2238}
2239
2240/* 7-bit unsigned immediate with 2-bit shift. */
3739860c 2241static void
c8c8175b
SL		 2242nios2_assemble_arg_U (const char *token, nios2_insn_infoS *insn)
2243{
2244 const struct nios2_opcode *op = insn->insn_nios2_opcode;
2245 unsigned int val;
2246
2247 switch (op->format)
2248 {
2249 case iw_T1I7_type:
2250 val = nios2_assemble_expression (token, insn,
2251 BFD_RELOC_NIOS2_R2_T1I7_2, 0);
2252 insn->constant_bits |= SET_IW_T1I7_IMM7 (val >> 2);
2253 break;
2254 case iw_X1I7_type:
2255 val = nios2_assemble_expression (token, insn,
2256 BFD_RELOC_NIOS2_R2_X1I7_2, 0);
2257 insn->constant_bits |= SET_IW_X1I7_IMM7 (val >> 2);
2258 break;
2259 default:
2260 bad_opcode (op);
2261 }
2262}
2263
2264/* 5-bit unsigned immediate with 2-bit shift. */
3739860c 2265static void
c8c8175b
SL		 2266nios2_assemble_arg_V (const char *token, nios2_insn_infoS *insn)
2267{
2268 const struct nios2_opcode *op = insn->insn_nios2_opcode;
2269 unsigned int val;
2270
2271 switch (op->format)
2272 {
2273 case iw_F1I5_type:
2274 val = nios2_assemble_expression (token, insn,
2275 BFD_RELOC_NIOS2_R2_F1I5_2, 0);
2276 insn->constant_bits |= SET_IW_F1I5_IMM5 (val >> 2);
2277 break;
2278 default:
2279 bad_opcode (op);
2280 }
2281}
2282
2283/* 4-bit unsigned immediate with 2-bit shift. */
3739860c 2284static void
c8c8175b
SL		 2285nios2_assemble_arg_W (const char *token, nios2_insn_infoS *insn)
2286{
2287 const struct nios2_opcode *op = insn->insn_nios2_opcode;
2288 unsigned int val;
2289
2290 switch (op->format)
2291 {
2292 case iw_T2I4_type:
2293 val = nios2_assemble_expression (token, insn,
2294 BFD_RELOC_NIOS2_R2_T2I4_2, 0);
2295 insn->constant_bits |= SET_IW_T2I4_IMM4 (val >> 2);
2296 break;
2297 case iw_L5I4X1_type:
3739860c 2298 /* This argument is optional for push.n/pop.n, and defaults to
c8c8175b
SL		 2299 zero if unspecified. */
2300 if (token == NULL)
2301 return;
2302
2303 val = nios2_assemble_expression (token, insn,
2304 BFD_RELOC_NIOS2_R2_L5I4X1, 0);
2305 insn->constant_bits |= SET_IW_L5I4X1_IMM4 (val >> 2);
2306 break;
2307 default:
2308 bad_opcode (op);
2309 }
2310}
2311
2312/* 4-bit unsigned immediate with 1-bit shift. */
3739860c 2313static void
c8c8175b
SL		 2314nios2_assemble_arg_X (const char *token, nios2_insn_infoS *insn)
2315{
2316 const struct nios2_opcode *op = insn->insn_nios2_opcode;
2317 unsigned int val;
2318
2319 switch (op->format)
2320 {
2321 case iw_T2I4_type:
2322 val = nios2_assemble_expression (token, insn,
2323 BFD_RELOC_NIOS2_R2_T2I4_1, 0);
2324 insn->constant_bits |= SET_IW_T2I4_IMM4 (val >> 1);
2325 break;
2326 default:
2327 bad_opcode (op);
2328 }
2329}
2330
2331/* 4-bit unsigned immediate without shift. */
3739860c 2332static void
c8c8175b
SL		 2333nios2_assemble_arg_Y (const char *token, nios2_insn_infoS *insn)
2334{
2335 const struct nios2_opcode *op = insn->insn_nios2_opcode;
2336 unsigned int val;
2337
2338 switch (op->format)
2339 {
2340 case iw_T2I4_type:
2341 val = nios2_assemble_expression (token, insn,
2342 BFD_RELOC_NIOS2_R2_T2I4, 0);
2343 insn->constant_bits |= SET_IW_T2I4_IMM4 (val);
2344 break;
2345 default:
2346 bad_opcode (op);
2347 }
2348}
2349
2350
2351/* 16-bit signed immediate address offset. */
3739860c 2352static void
c8c8175b
SL		 2353nios2_assemble_arg_o (const char *token, nios2_insn_infoS *insn)
2354{
2355 const struct nios2_opcode *op = insn->insn_nios2_opcode;
2356 unsigned int val;
2357
2358 switch (op->format)
2359 {
2360 case iw_i_type:
2361 val = nios2_assemble_expression (token, insn,
2362 BFD_RELOC_16_PCREL, 1);
2363 insn->constant_bits |= SET_IW_I_IMM16 (val);
2364 break;
2365 case iw_F2I16_type:
2366 val = nios2_assemble_expression (token, insn,
2367 BFD_RELOC_16_PCREL, 1);
2368 insn->constant_bits |= SET_IW_F2I16_IMM16 (val);
2369 break;
2370 default:
2371 bad_opcode (op);
2372 }
2373}
2374
2375/* 10-bit signed address offset with 1-bit shift. */
3739860c 2376static void
c8c8175b
SL		 2377nios2_assemble_arg_O (const char *token, nios2_insn_infoS *insn)
2378{
2379 const struct nios2_opcode *op = insn->insn_nios2_opcode;
2380 unsigned int val;
2381
2382 switch (op->format)
2383 {
2384 case iw_I10_type:
2385 val = nios2_assemble_expression (token, insn,
2386 BFD_RELOC_NIOS2_R2_I10_1_PCREL, 1);
2387 insn->constant_bits |= SET_IW_I10_IMM10 (val >> 1);
2388 break;
2389 default:
2390 bad_opcode (op);
2391 }
2392}
2393
2394/* 7-bit signed address offset with 1-bit shift. */
3739860c 2395static void
c8c8175b
SL		 2396nios2_assemble_arg_P (const char *token, nios2_insn_infoS *insn)
2397{
2398 const struct nios2_opcode *op = insn->insn_nios2_opcode;
2399 unsigned int val;
2400
2401 switch (op->format)
2402 {
2403 case iw_T1I7_type:
2404 val = nios2_assemble_expression (token, insn,
2405 BFD_RELOC_NIOS2_R2_T1I7_1_PCREL, 1);
2406 insn->constant_bits |= SET_IW_T1I7_IMM7 (val >> 1);
2407 break;
2408 default:
2409 bad_opcode (op);
2410 }
2411}
2412
2413/* 5-bit unsigned immediate. */
3739860c 2414static void
c8c8175b
SL		 2415nios2_assemble_arg_j (const char *token, nios2_insn_infoS *insn)
2416{
2417 const struct nios2_opcode *op = insn->insn_nios2_opcode;
2418 unsigned int val;
2419
2420 switch (op->format)
2421 {
2422 case iw_r_type:
2423 val = nios2_assemble_expression (token, insn,
2424 BFD_RELOC_NIOS2_IMM5, 0);
2425 insn->constant_bits |= SET_IW_R_IMM5 (val);
2426 break;
2427 case iw_F3X6L5_type:
2428 if (op->match == MATCH_R2_ENI)
2429 /* Value must be constant 0 or 1. */
2430 {
2431 val = nios2_assemble_expression (token, insn, BFD_RELOC_NONE, 0);
2432 if (val != 0 && val != 1)
2433 as_bad ("invalid eni argument %u", val);
2434 insn->insn_code |= SET_IW_F3X6L5_IMM5 (val);
2435 }
2436 else
2437 {
2438 val = nios2_assemble_expression (token, insn,
2439 BFD_RELOC_NIOS2_IMM5, 0);
2440 insn->constant_bits |= SET_IW_F3X6L5_IMM5 (val);
2441 }
2442 break;
2443 case iw_F2X6L10_type:
2444 /* Only constant expression without relocation permitted for
2445 bit position. */
2446 val = nios2_assemble_expression (token, insn, BFD_RELOC_NONE, 0);
2447 if (val > 31)
2448 as_bad ("invalid bit position %u", val);
2449 insn->insn_code |= SET_IW_F2X6L10_MSB (val);
2450 break;
2451 case iw_X2L5_type:
2452 val = nios2_assemble_expression (token, insn,
2453 BFD_RELOC_NIOS2_R2_X2L5, 0);
2454 insn->constant_bits |= SET_IW_X2L5_IMM5 (val);
2455 break;
2456 default:
2457 bad_opcode (op);
2458 }
2459}
2460
2461/* Second 5-bit unsigned immediate field. */
3739860c 2462static void
c8c8175b
SL		 2463nios2_assemble_arg_k (const char *token, nios2_insn_infoS *insn)
2464{
2465 const struct nios2_opcode *op = insn->insn_nios2_opcode;
2466 unsigned int val;
2467
2468 switch (op->format)
2469 {
2470 case iw_F2X6L10_type:
2471 /* Only constant expression without relocation permitted for
2472 bit position. */
2473 val = nios2_assemble_expression (token, insn,
2474 BFD_RELOC_NONE, 0);
2475 if (val > 31)
2476 as_bad ("invalid bit position %u", val);
2477 else if (GET_IW_F2X6L10_MSB (insn->insn_code) < val)
2478 as_bad ("MSB must be greater than or equal to LSB");
2479 insn->insn_code |= SET_IW_F2X6L10_LSB (val);
2480 break;
2481 default:
2482 bad_opcode (op);
2483 }
2484}
2485
2486/* 8-bit unsigned immediate. */
3739860c 2487static void
c8c8175b
SL		 2488nios2_assemble_arg_l (const char *token, nios2_insn_infoS *insn)
2489{
2490 const struct nios2_opcode *op = insn->insn_nios2_opcode;
2491 unsigned int val;
2492
2493 switch (op->format)
2494 {
2495 case iw_custom_type:
2496 val = nios2_assemble_expression (token, insn,
2497 BFD_RELOC_NIOS2_IMM8, 0);
2498 insn->constant_bits |= SET_IW_CUSTOM_N (val);
2499 break;
2500 case iw_F3X8_type:
2501 val = nios2_assemble_expression (token, insn,
2502 BFD_RELOC_NIOS2_IMM8, 0);
2503 insn->constant_bits |= SET_IW_F3X8_N (val);
2504 break;
2505 default:
2506 bad_opcode (op);
2507 }
2508}
2509
2510/* 26-bit unsigned immediate. */
3739860c 2511static void
c8c8175b
SL		 2512nios2_assemble_arg_m (const char *token, nios2_insn_infoS *insn)
2513{
2514 const struct nios2_opcode *op = insn->insn_nios2_opcode;
2515 unsigned int val;
2516
2517 switch (op->format)
2518 {
2519 case iw_j_type:
96ba4233
SL		 2520 val = nios2_assemble_expression (token, insn,
2521 (nios2_as_options.noat
2522 ? BFD_RELOC_NIOS2_CALL26_NOAT
2523 : BFD_RELOC_NIOS2_CALL26),
2524 0);
2525 insn->constant_bits |= SET_IW_J_IMM26 (val);
2526 break;
c8c8175b
SL		 2527 case iw_L26_type:
2528 val = nios2_assemble_expression (token, insn,
2529 (nios2_as_options.noat
2530 ? BFD_RELOC_NIOS2_CALL26_NOAT
2531 : BFD_RELOC_NIOS2_CALL26),
2532 0);
2533 insn->constant_bits |= SET_IW_L26_IMM26 (val);
2534 break;
2535 default:
2536 bad_opcode (op);
2537 }
2538}
2539
2540/* 6-bit unsigned immediate with no shifting. */
3739860c 2541static void
c8c8175b
SL		 2542nios2_assemble_arg_M (const char *token, nios2_insn_infoS *insn)
2543{
2544 const struct nios2_opcode *op = insn->insn_nios2_opcode;
2545 unsigned int val;
2546
2547 switch (op->format)
2548 {
2549 case iw_T1X1I6_type:
2550 val = nios2_assemble_expression (token, insn,
2551 BFD_RELOC_NIOS2_R2_T1X1I6, 0);
2552 insn->constant_bits |= SET_IW_T1X1I6_IMM6 (val);
2553 break;
2554 default:
2555 bad_opcode (op);
2556 }
2557}
2558
2559/* 6-bit unsigned immediate with 2-bit shift. */
3739860c 2560static void
c8c8175b
SL		 2561nios2_assemble_arg_N (const char *token, nios2_insn_infoS *insn)
2562{
2563 const struct nios2_opcode *op = insn->insn_nios2_opcode;
2564 unsigned int val;
2565
2566 switch (op->format)
2567 {
2568 case iw_T1X1I6_type:
2569 val = nios2_assemble_expression (token, insn,
2570 BFD_RELOC_NIOS2_R2_T1X1I6_2, 0);
2571 insn->constant_bits |= SET_IW_T1X1I6_IMM6 (val >> 2);
2572 break;
2573 default:
2574 bad_opcode (op);
2575 }
2576}
2577
2578
2579/* Encoded enumeration for addi.n/subi.n. */
3739860c 2580static void
c8c8175b
SL		 2581nios2_assemble_arg_e (const char *token, nios2_insn_infoS *insn)
2582{
2583 const struct nios2_opcode *op = insn->insn_nios2_opcode;
2584 unsigned int val;
2585 int i;
2586
2587 switch (op->format)
2588 {
2589 case iw_T2X1I3_type:
2590 val = nios2_assemble_expression (token, insn, BFD_RELOC_NONE, 0);
2591 for (i = 0; i < nios2_num_r2_asi_n_mappings; i++)
2592 if (val == nios2_r2_asi_n_mappings[i])
2593 break;
2594 if (i == nios2_num_r2_asi_n_mappings)
2595 {
2596 as_bad (_("Invalid constant operand %s"), token);
2597 return;
2598 }
2599 insn->insn_code |= SET_IW_T2X1I3_IMM3 ((unsigned)i);
2600 break;
2601 default:
2602 bad_opcode (op);
2603 }
2604}
2605
2606/* Encoded enumeration for slli.n/srli.n. */
3739860c 2607static void
c8c8175b
SL		 2608nios2_assemble_arg_f (const char *token, nios2_insn_infoS *insn)
2609{
2610 const struct nios2_opcode *op = insn->insn_nios2_opcode;
2611 unsigned int val;
2612 int i;
2613
2614 switch (op->format)
2615 {
2616 case iw_T2X1L3_type:
2617 val = nios2_assemble_expression (token, insn, BFD_RELOC_NONE, 0);
2618 for (i = 0; i < nios2_num_r2_shi_n_mappings; i++)
2619 if (val == nios2_r2_shi_n_mappings[i])
2620 break;
2621 if (i == nios2_num_r2_shi_n_mappings)
2622 {
2623 as_bad (_("Invalid constant operand %s"), token);
2624 return;
2625 }
2626 insn->insn_code |= SET_IW_T2X1L3_SHAMT ((unsigned)i);
2627 break;
2628 default:
2629 bad_opcode (op);
2630 }
2631}
2632
2633/* Encoded enumeration for andi.n. */
3739860c 2634static void
c8c8175b
SL		 2635nios2_assemble_arg_g (const char *token, nios2_insn_infoS *insn)
2636{
2637 const struct nios2_opcode *op = insn->insn_nios2_opcode;
2638 unsigned int val;
2639 int i;
2640
2641 switch (op->format)
2642 {
2643 case iw_T2I4_type:
2644 val = nios2_assemble_expression (token, insn, BFD_RELOC_NONE, 0);
2645 for (i = 0; i < nios2_num_r2_andi_n_mappings; i++)
2646 if (val == nios2_r2_andi_n_mappings[i])
2647 break;
2648 if (i == nios2_num_r2_andi_n_mappings)
2649 {
2650 as_bad (_("Invalid constant operand %s"), token);
2651 return;
2652 }
2653 insn->insn_code |= SET_IW_T2I4_IMM4 ((unsigned)i);
2654 break;
2655 default:
2656 bad_opcode (op);
2657 }
2658}
2659
2660/* Encoded enumeration for movi.n. */
3739860c 2661static void
c8c8175b
SL		 2662nios2_assemble_arg_h (const char *token, nios2_insn_infoS *insn)
2663{
2664 const struct nios2_opcode *op = insn->insn_nios2_opcode;
2665 unsigned int val;
2666 int i;
2667
2668 switch (op->format)
2669 {
2670 case iw_T1I7_type:
2671 val = nios2_assemble_expression (token, insn, BFD_RELOC_NONE, 0);
2672 i = (signed) val;
2673 if ((signed) i == -1)
2674 val = 127;
2675 else if (i == -2)
2676 val = 126;
2677 else if (i == 0xff)
2678 val = 125;
2679 else if (i < 0 || i > 125)
2680 {
2681 as_bad (_("Invalid constant operand %s"), token);
2682 return;
2683 }
2684 insn->insn_code |= SET_IW_T1I7_IMM7 (val);
2685 break;
2686 default:
2687 bad_opcode (op);
2688 }
2689}
2690
2691/* Encoded REGMASK for ldwm/stwm or push.n/pop.n. */
3739860c 2692static void
c8c8175b
SL		 2693nios2_assemble_arg_R (const char *token, nios2_insn_infoS *insn)
2694{
2695 const struct nios2_opcode *op = insn->insn_nios2_opcode;
2696 unsigned long mask;
2697 char *buf = strdup (token);
2698 unsigned long reglist = nios2_parse_reglist (buf, op);
2699 free (buf);
2700
2701 if (reglist == 0)
2702 return;
2703
2704 switch (op->format)
2705 {
2706 case iw_F1X4L17_type:
2707 /* Encoding for ldwm/stwm. */
2708 if (reglist & 0x00003ffc)
2709 mask = reglist >> 2;
2710 else
2711 {
2712 insn->insn_code |= SET_IW_F1X4L17_RS (1);
2713 mask = (reglist & 0x00ffc000) >> 14;
2714 if (reglist & (1 << 28))
2715 mask |= 1 << 10;
2716 if (reglist & (1 << 31))
2717 mask |= 1 << 11;
2718 }
2719 insn->insn_code |= SET_IW_F1X4L17_REGMASK (mask);
2720 break;
2721
2722 case iw_L5I4X1_type:
2723 /* Encoding for push.n/pop.n. */
2724 if (reglist & (1 << 28))
2725 insn->insn_code |= SET_IW_L5I4X1_FP (1);
2726 mask = reglist & 0x00ff0000;
2727 if (mask)
2728 {
2729 int i;
2730
2731 for (i = 0; i < nios2_num_r2_reg_range_mappings; i++)
2732 if (nios2_r2_reg_range_mappings[i] == mask)
2733 break;
2734 if (i == nios2_num_r2_reg_range_mappings)
2735 {
2736 as_bad ("invalid reglist");
2737 return;
2738 }
2739 insn->insn_code |= SET_IW_L5I4X1_REGRANGE (i);
2740 insn->insn_code |= SET_IW_L5I4X1_CS (1);
2741 }
2742 break;
3739860c 2743
c8c8175b
SL		 2744 default:
2745 bad_opcode (op);
2746 }
2747}
2748
2749/* Base register for ldwm/stwm. */
3739860c 2750static void
c8c8175b
SL		 2751nios2_assemble_arg_B (const char *token, nios2_insn_infoS *insn)
2752{
2753 const struct nios2_opcode *op = insn->insn_nios2_opcode;
2754 int direction, writeback, ret;
2755 char *str = strdup (token);
2756 struct nios2_reg *reg
2757 = nios2_parse_base_register (str, &direction, &writeback, &ret);
2758
2759 free (str);
2760 if (!reg)
2761 return;
2762
2763 switch (op->format)
2764 {
2765 case iw_F1X4L17_type:
3739860c 2766 /* For ldwm, check to see if the base register is already inside the
c8c8175b
SL		 2767 register list. */
2768 if (op->match == MATCH_R2_LDWM
2769 && (nios2_reglist_mask & (1 << reg->index)))
2770 {
2771 as_bad ("invalid base register; %s is inside the reglist", reg->name);
2772 return;
2773 }
2774
2775 /* For stwm, ret option is not allowed. */
2776 if (op->match == MATCH_R2_STWM && ret)
2777 {
2778 as_bad ("invalid option syntax");
2779 return;
2780 }
2781
2782 /* Check that the direction matches the ordering of the reglist. */
2783 if (nios2_reglist_dir && direction != nios2_reglist_dir)
2784 {
2785 as_bad ("reglist order does not match increment/decrement mode");
2786 return;
2787 }
2788
2789 insn->insn_code |= SET_IW_F1X4L17_A (reg->index);
2790 if (direction > 0)
2791 insn->insn_code |= SET_IW_F1X4L17_ID (1);
2792 if (writeback)
2793 insn->insn_code |= SET_IW_F1X4L17_WB (1);
2794 if (ret)
2795 insn->insn_code |= SET_IW_F1X4L17_PC (1);
2796 break;
2797
96ba4233
SL		 2798 default:
2799 bad_opcode (op);
36591ba1
SL		 2800 }
2801}
2802
2803static void
96ba4233 2804nios2_assemble_args (nios2_insn_infoS *insn)
36591ba1 2805{
96ba4233
SL		 2806 const struct nios2_opcode *op = insn->insn_nios2_opcode;
2807 const char *argptr;
2808 unsigned int tokidx, ntok;
36591ba1 2809
96ba4233
SL		 2810 /* Make sure there are enough arguments. */
2811 ntok = (op->pinfo & NIOS2_INSN_OPTARG) ? op->num_args - 1 : op->num_args;
2812 for (tokidx = 1; tokidx <= ntok; tokidx++)
2813 if (insn->insn_tokens[tokidx] == NULL)
2814 {
2815 as_bad ("missing argument");
2816 return;
2817 }
36591ba1 2818
96ba4233
SL		 2819 for (argptr = op->args, tokidx = 1;
2820 *argptr && insn->insn_tokens[tokidx];
2821 argptr++)
2822 switch (*argptr)
2823 {
2824 case ',':
2825 case '(':
2826 case ')':
2827 break;
36591ba1 2828
96ba4233
SL		 2829 case 'c':
2830 nios2_assemble_arg_c (insn->insn_tokens[tokidx++], insn);
2831 break;
3739860c 2832
96ba4233
SL		 2833 case 'd':
2834 nios2_assemble_arg_d (insn->insn_tokens[tokidx++], insn);
2835 break;
3739860c 2836
96ba4233
SL		 2837 case 's':
2838 nios2_assemble_arg_s (insn->insn_tokens[tokidx++], insn);
2839 break;
3739860c 2840
96ba4233
SL		 2841 case 't':
2842 nios2_assemble_arg_t (insn->insn_tokens[tokidx++], insn);
2843 break;
3739860c 2844
c8c8175b
SL		 2845 case 'D':
2846 nios2_assemble_arg_D (insn->insn_tokens[tokidx++], insn);
2847 break;
3739860c 2848
c8c8175b
SL		 2849 case 'S':
2850 nios2_assemble_arg_S (insn->insn_tokens[tokidx++], insn);
2851 break;
3739860c 2852
c8c8175b
SL		 2853 case 'T':
2854 nios2_assemble_arg_T (insn->insn_tokens[tokidx++], insn);
2855 break;
3739860c 2856
96ba4233
SL		 2857 case 'i':
2858 nios2_assemble_arg_i (insn->insn_tokens[tokidx++], insn);
2859 break;
3739860c 2860
c8c8175b
SL		 2861 case 'I':
2862 nios2_assemble_arg_I (insn->insn_tokens[tokidx++], insn);
2863 break;
3739860c 2864
96ba4233
SL		 2865 case 'u':
2866 nios2_assemble_arg_u (insn->insn_tokens[tokidx++], insn);
2867 break;
3739860c 2868
c8c8175b
SL		 2869 case 'U':
2870 nios2_assemble_arg_U (insn->insn_tokens[tokidx++], insn);
2871 break;
3739860c 2872
c8c8175b
SL		 2873 case 'V':
2874 nios2_assemble_arg_V (insn->insn_tokens[tokidx++], insn);
2875 break;
3739860c 2876
c8c8175b
SL		 2877 case 'W':
2878 nios2_assemble_arg_W (insn->insn_tokens[tokidx++], insn);
2879 break;
3739860c 2880
c8c8175b
SL		 2881 case 'X':
2882 nios2_assemble_arg_X (insn->insn_tokens[tokidx++], insn);
2883 break;
3739860c 2884
c8c8175b
SL		 2885 case 'Y':
2886 nios2_assemble_arg_Y (insn->insn_tokens[tokidx++], insn);
2887 break;
3739860c 2888
96ba4233
SL		 2889 case 'o':
2890 nios2_assemble_arg_o (insn->insn_tokens[tokidx++], insn);
2891 break;
3739860c 2892
c8c8175b
SL		 2893 case 'O':
2894 nios2_assemble_arg_O (insn->insn_tokens[tokidx++], insn);
2895 break;
3739860c 2896
c8c8175b
SL		 2897 case 'P':
2898 nios2_assemble_arg_P (insn->insn_tokens[tokidx++], insn);
2899 break;
2900
96ba4233
SL		 2901 case 'j':
2902 nios2_assemble_arg_j (insn->insn_tokens[tokidx++], insn);
2903 break;
3739860c 2904
c8c8175b
SL		 2905 case 'k':
2906 nios2_assemble_arg_k (insn->insn_tokens[tokidx++], insn);
2907 break;
3739860c 2908
96ba4233
SL		 2909 case 'l':
2910 nios2_assemble_arg_l (insn->insn_tokens[tokidx++], insn);
2911 break;
3739860c 2912
96ba4233
SL		 2913 case 'm':
2914 nios2_assemble_arg_m (insn->insn_tokens[tokidx++], insn);
2915 break;
c8c8175b
SL		 2916
2917 case 'M':
2918 nios2_assemble_arg_M (insn->insn_tokens[tokidx++], insn);
2919 break;
2920
2921 case 'N':
2922 nios2_assemble_arg_N (insn->insn_tokens[tokidx++], insn);
2923 break;
2924
2925 case 'e':
2926 nios2_assemble_arg_e (insn->insn_tokens[tokidx++], insn);
2927 break;
3739860c 2928
c8c8175b
SL		 2929 case 'f':
2930 nios2_assemble_arg_f (insn->insn_tokens[tokidx++], insn);
2931 break;
3739860c 2932
c8c8175b
SL		 2933 case 'g':
2934 nios2_assemble_arg_g (insn->insn_tokens[tokidx++], insn);
2935 break;
3739860c 2936
c8c8175b
SL		 2937 case 'h':
2938 nios2_assemble_arg_h (insn->insn_tokens[tokidx++], insn);
2939 break;
3739860c 2940
c8c8175b
SL		 2941 case 'R':
2942 nios2_assemble_arg_R (insn->insn_tokens[tokidx++], insn);
2943 break;
2944
2945 case 'B':
2946 nios2_assemble_arg_B (insn->insn_tokens[tokidx++], insn);
2947 break;
2948
96ba4233
SL		 2949 default:
2950 bad_opcode (op);
2951 break;
2952 }
36591ba1 2953
3739860c 2954 /* Perform argument checking. */
96ba4233
SL		 2955 nios2_check_assembly (insn->insn_code | insn->constant_bits,
2956 insn->insn_tokens[tokidx]);
2957}
36591ba1 2958
36591ba1
SL		 2959
2960/* The function consume_arg takes a pointer into a string
2961 of instruction tokens (args) and a pointer into a string
2962 representing the expected sequence of tokens and separators.
2963 It checks whether the first argument in argstr is of the
2964 expected type, throwing an error if it is not, and returns
2965 the pointer argstr. */
2966static char *
96ba4233 2967nios2_consume_arg (char *argstr, const char *parsestr)
36591ba1
SL		 2968{
2969 char *temp;
3739860c 2970
36591ba1
SL		 2971 switch (*parsestr)
2972 {
2973 case 'c':
36591ba1
SL		 2974 case 'd':
2975 case 's':
2976 case 't':
c8c8175b
SL		 2977 case 'D':
2978 case 'S':
2979 case 'T':
36591ba1 2980 break;
96ba4233 2981
36591ba1
SL		 2982 case 'i':
2983 case 'u':
2984 if (*argstr == '%')
2985 {
2986 if (nios2_special_relocation_p (argstr))
2987 {
2988 /* We zap the parentheses because we don't want them confused
2989 with separators. */
2990 temp = strchr (argstr, '(');
2991 if (temp != NULL)
2992 *temp = ' ';
2993 temp = strchr (argstr, ')');
2994 if (temp != NULL)
2995 *temp = ' ';
2996 }
2997 else
2998 as_bad (_("badly formed expression near %s"), argstr);
2999 }
3000 break;
3001 case 'm':
3002 case 'j':
c8c8175b 3003 case 'k':
36591ba1 3004 case 'l':
c8c8175b
SL		 3005 case 'I':
3006 case 'U':
3007 case 'V':
3008 case 'W':
3009 case 'X':
3010 case 'Y':
3011 case 'O':
3012 case 'P':
3013 case 'e':
3014 case 'f':
3015 case 'g':
3016 case 'h':
3017 case 'M':
3018 case 'N':
3739860c 3019
36591ba1
SL		 3020 /* We can't have %hi, %lo or %hiadj here. */
3021 if (*argstr == '%')
3022 as_bad (_("badly formed expression near %s"), argstr);
3023 break;
c8c8175b
SL		 3024
3025 case 'R':
3026 /* Register list for ldwm/stwm or push.n/pop.n. Replace the commas
3027 in the list with spaces so we don't confuse them with separators. */
3028 if (*argstr != '{')
3029 {
3030 as_bad ("missing '{' in register list");
3031 break;
3032 }
3033 for (temp = argstr + 1; *temp; temp++)
3034 {
3035 if (*temp == '}')
3036 break;
3037 else if (*temp == ',')
3038 *temp = ' ';
3039 }
3040 if (!*temp)
3041 {
3042 as_bad ("missing '}' in register list");
3043 break;
3044 }
3045 break;
3046
3047 case 'B':
3048 /* Base register and options for ldwm/stwm. This is the final argument
3049 and consumes the rest of the argument string; replace commas
3050 with spaces so that the token splitter doesn't think they are
3051 separate arguments. */
3052 for (temp = argstr; *temp; temp++)
3053 if (*temp == ',')
3054 *temp = ' ';
3055 break;
3056
531a94fd 3057 case 'o':
fad16e30 3058 case 'E':
531a94fd 3059 break;
36591ba1 3060 default:
531a94fd 3061 BAD_CASE (*parsestr);
36591ba1
SL		 3062 break;
3063 }
3064
3065 return argstr;
3066}
3067
3068/* The function consume_separator takes a pointer into a string
3069 of instruction tokens (args) and a pointer into a string representing
3070 the expected sequence of tokens and separators. It finds the first
3071 instance of the character pointed to by separator in argstr, and
3072 returns a pointer to the next element of argstr, which is the
3073 following token in the sequence. */
3074static char *
3075nios2_consume_separator (char *argstr, const char *separator)
3076{
3077 char *p;
3078
3079 /* If we have a opcode reg, expr(reg) type instruction, and
3080 * we are separating the expr from the (reg), we find the last
3081 * (, just in case the expression has parentheses. */
3082
3083 if (*separator == '(')
3084 p = strrchr (argstr, *separator);
3085 else
3086 p = strchr (argstr, *separator);
3087
3088 if (p != NULL)
3089 *p++ = 0;
36591ba1
SL		 3090 return p;
3091}
3092
36591ba1
SL		 3093/* The principal argument parsing function which takes a string argstr
3094 representing the instruction arguments for insn, and extracts the argument
3095 tokens matching parsestr into parsed_args. */
3096static void
3097nios2_parse_args (nios2_insn_infoS *insn, char *argstr,
3098 const char *parsestr, char **parsed_args)
3099{
3100 char *p;
3101 char *end = NULL;
3102 int i;
3103 p = argstr;
3104 i = 0;
3105 bfd_boolean terminate = FALSE;
3739860c 3106
36591ba1
SL		 3107 /* This rest of this function is it too fragile and it mostly works,
3108 therefore special case this one. */
3109 if (*parsestr == 0 && argstr != 0)
3110 {
3111 as_bad (_("too many arguments"));
3112 parsed_args[0] = NULL;
3113 return;
3114 }
3739860c 3115
36591ba1
SL		 3116 while (p != NULL && !terminate && i < NIOS2_MAX_INSN_TOKENS)
3117 {
96ba4233 3118 parsed_args[i] = nios2_consume_arg (p, parsestr);
36591ba1 3119 ++parsestr;
96ba4233 3120 while (*parsestr == '(' || *parsestr == ')' || *parsestr == ',')
36591ba1 3121 {
96ba4233 3122 char *context = p;
36591ba1 3123 p = nios2_consume_separator (p, parsestr);
96ba4233
SL		 3124 /* Check for missing separators. */
3125 if (!p && !(insn->insn_nios2_opcode->pinfo & NIOS2_INSN_OPTARG))
3126 {
3127 as_bad (_("expecting %c near %s"), *parsestr, context);
3128 break;
3129 }
36591ba1
SL		 3130 ++parsestr;
3131 }
96ba4233
SL		 3132
3133 if (*parsestr == '\0')
36591ba1
SL		 3134 {
3135 /* Check that the argument string has no trailing arguments. */
96ba4233 3136 end = strpbrk (p, ",");
36591ba1
SL		 3137 if (end != NULL)
3138 as_bad (_("too many arguments"));
3139 }
3140
3141 if (*parsestr == '\0' || (p != NULL && *p == '\0'))
3142 terminate = TRUE;
3143 ++i;
3144 }
3145
3146 parsed_args[i] = NULL;
36591ba1
SL		 3147}
3148
3149
3150\f
3151/** Support for pseudo-op parsing. These are macro-like opcodes that
3152 expand into real insns by suitable fiddling with the operands. */
3153
3154/* Append the string modifier to the string contained in the argument at
3155 parsed_args[ndx]. */
3156static void
3157nios2_modify_arg (char **parsed_args, const char *modifier,
3158 int unused ATTRIBUTE_UNUSED, int ndx)
3159{
3160 char *tmp = parsed_args[ndx];
3161
3162 parsed_args[ndx]
3163 = (char *) malloc (strlen (parsed_args[ndx]) + strlen (modifier) + 1);
3164 strcpy (parsed_args[ndx], tmp);
3165 strcat (parsed_args[ndx], modifier);
3166}
3167
3168/* Modify parsed_args[ndx] by negating that argument. */
3169static void
3170nios2_negate_arg (char **parsed_args, const char *modifier ATTRIBUTE_UNUSED,
3171 int unused ATTRIBUTE_UNUSED, int ndx)
3172{
3173 char *tmp = parsed_args[ndx];
3174
3175 parsed_args[ndx]
3176 = (char *) malloc (strlen ("~(") + strlen (parsed_args[ndx]) +
3177 strlen (")+1") + 1);
3178
3179 strcpy (parsed_args[ndx], "~(");
3180 strcat (parsed_args[ndx], tmp);
3181 strcat (parsed_args[ndx], ")+1");
3182}
3183
3184/* The function nios2_swap_args swaps the pointers at indices index_1 and
3185 index_2 in the array parsed_args[] - this is used for operand swapping
3186 for comparison operations. */
3187static void
3188nios2_swap_args (char **parsed_args, const char *unused ATTRIBUTE_UNUSED,
3189 int index_1, int index_2)
3190{
3191 char *tmp;
3192 gas_assert (index_1 < NIOS2_MAX_INSN_TOKENS
3193 && index_2 < NIOS2_MAX_INSN_TOKENS);
3194 tmp = parsed_args[index_1];
3195 parsed_args[index_1] = parsed_args[index_2];
3196 parsed_args[index_2] = tmp;
3197}
3198
3199/* This function appends the string appnd to the array of strings in
3200 parsed_args num times starting at index start in the array. */
3201static void
3202nios2_append_arg (char **parsed_args, const char *appnd, int num,
3203 int start)
3204{
3205 int i, count;
3206 char *tmp;
3207
3208 gas_assert ((start + num) < NIOS2_MAX_INSN_TOKENS);
3209
3210 if (nios2_mode == NIOS2_MODE_TEST)
3211 tmp = parsed_args[start];
3212 else
3213 tmp = NULL;
3214
3215 for (i = start, count = num; count > 0; ++i, --count)
3216 parsed_args[i] = (char *) appnd;
3217
3218 gas_assert (i == (start + num));
3219 parsed_args[i] = tmp;
3220 parsed_args[i + 1] = NULL;
3221}
3222
3739860c 3223/* This function inserts the string insert num times in the array
36591ba1
SL		 3224 parsed_args, starting at the index start. */
3225static void
3226nios2_insert_arg (char **parsed_args, const char *insert, int num,
3227 int start)
3228{
3229 int i, count;
3230
3231 gas_assert ((start + num) < NIOS2_MAX_INSN_TOKENS);
3232
3233 /* Move the existing arguments up to create space. */
3234 for (i = NIOS2_MAX_INSN_TOKENS; i - num >= start; --i)
3235 parsed_args[i] = parsed_args[i - num];
3236
3237 for (i = start, count = num; count > 0; ++i, --count)
3238 parsed_args[i] = (char *) insert;
3239}
3240
3241/* Cleanup function to free malloc'ed arg strings. */
3242static void
3243nios2_free_arg (char **parsed_args, int num ATTRIBUTE_UNUSED, int start)
3244{
3245 if (parsed_args[start])
3246 {
3247 free (parsed_args[start]);
3248 parsed_args[start] = NULL;
3249 }
3250}
3251
3252/* This function swaps the pseudo-op for a real op. */
3253static nios2_ps_insn_infoS*
3254nios2_translate_pseudo_insn (nios2_insn_infoS *insn)
3255{
3256
3257 nios2_ps_insn_infoS *ps_insn;
3258
3259 /* Find which real insn the pseudo-op transates to and
3260 switch the insn_info ptr to point to it. */
3261 ps_insn = nios2_ps_lookup (insn->insn_nios2_opcode->name);
3262
3263 if (ps_insn != NULL)
3264 {
3265 insn->insn_nios2_opcode = nios2_opcode_lookup (ps_insn->insn);
3266 insn->insn_tokens[0] = insn->insn_nios2_opcode->name;
3267 /* Modify the args so they work with the real insn. */
3268 ps_insn->arg_modifer_func ((char **) insn->insn_tokens,
3269 ps_insn->arg_modifier, ps_insn->num,
3270 ps_insn->index);
3271 }
3272 else
3273 /* we cannot recover from this. */
3274 as_fatal (_("unrecognized pseudo-instruction %s"),
c8c8175b 3275 insn->insn_nios2_opcode->name);
36591ba1
SL		 3276 return ps_insn;
3277}
3278
3279/* Invoke the cleanup handler for pseudo-insn ps_insn on insn. */
3280static void
3281nios2_cleanup_pseudo_insn (nios2_insn_infoS *insn,
3282 nios2_ps_insn_infoS *ps_insn)
3283{
3284 if (ps_insn->arg_cleanup_func)
3285 (ps_insn->arg_cleanup_func) ((char **) insn->insn_tokens,
3286 ps_insn->num, ps_insn->index);
3287}
3288
3289const nios2_ps_insn_infoS nios2_ps_insn_info_structs[] = {
3290 /* pseudo-op, real-op, arg, arg_modifier_func, num, index, arg_cleanup_func */
3291 {"mov", "add", nios2_append_arg, "zero", 1, 3, NULL},
3292 {"movi", "addi", nios2_insert_arg, "zero", 1, 2, NULL},
3293 {"movhi", "orhi", nios2_insert_arg, "zero", 1, 2, NULL},
3294 {"movui", "ori", nios2_insert_arg, "zero", 1, 2, NULL},
3295 {"movia", "orhi", nios2_insert_arg, "zero", 1, 2, NULL},
3296 {"nop", "add", nios2_append_arg, "zero", 3, 1, NULL},
3297 {"bgt", "blt", nios2_swap_args, "", 1, 2, NULL},
3298 {"bgtu", "bltu", nios2_swap_args, "", 1, 2, NULL},
3299 {"ble", "bge", nios2_swap_args, "", 1, 2, NULL},
3300 {"bleu", "bgeu", nios2_swap_args, "", 1, 2, NULL},
3301 {"cmpgt", "cmplt", nios2_swap_args, "", 2, 3, NULL},
3302 {"cmpgtu", "cmpltu", nios2_swap_args, "", 2, 3, NULL},
3303 {"cmple", "cmpge", nios2_swap_args, "", 2, 3, NULL},
3304 {"cmpleu", "cmpgeu", nios2_swap_args, "", 2, 3, NULL},
3305 {"cmpgti", "cmpgei", nios2_modify_arg, "+1", 0, 3, nios2_free_arg},
3306 {"cmpgtui", "cmpgeui", nios2_modify_arg, "+1", 0, 3, nios2_free_arg},
3307 {"cmplei", "cmplti", nios2_modify_arg, "+1", 0, 3, nios2_free_arg},
3308 {"cmpleui", "cmpltui", nios2_modify_arg, "+1", 0, 3, nios2_free_arg},
c8c8175b
SL		 3309 {"subi", "addi", nios2_negate_arg, "", 0, 3, nios2_free_arg},
3310 {"nop.n", "mov.n", nios2_append_arg, "zero", 2, 1, NULL}
36591ba1
SL		 3311 /* Add further pseudo-ops here. */
3312};
3313
3314#define NIOS2_NUM_PSEUDO_INSNS \
3315 ((sizeof(nios2_ps_insn_info_structs)/ \
3316 sizeof(nios2_ps_insn_info_structs[0])))
3317const int nios2_num_ps_insn_info_structs = NIOS2_NUM_PSEUDO_INSNS;
3318
3319\f
3320/** Assembler output support. */
3321
36591ba1
SL		 3322/* Output a normal instruction. */
3323static void
3324output_insn (nios2_insn_infoS *insn)
3325{
3326 char *f;
3739860c 3327 nios2_insn_relocS *reloc;
96ba4233 3328 f = frag_more (insn->insn_nios2_opcode->size);
36591ba1
SL		 3329 /* This allocates enough space for the instruction
3330 and puts it in the current frag. */
96ba4233 3331 md_number_to_chars (f, insn->insn_code, insn->insn_nios2_opcode->size);
36591ba1 3332 /* Emit debug info. */
96ba4233 3333 dwarf2_emit_insn (insn->insn_nios2_opcode->size);
36591ba1 3334 /* Create any fixups to be acted on later. */
96ba4233 3335
36591ba1 3336 for (reloc = insn->insn_reloc; reloc != NULL; reloc = reloc->reloc_next)
96ba4233
SL		 3337 fix_new_exp (frag_now, f - frag_now->fr_literal,
3338 insn->insn_nios2_opcode->size,
36591ba1
SL		 3339 &reloc->reloc_expression, reloc->reloc_pcrel,
3340 reloc->reloc_type);
3341}
3342
3343/* Output an unconditional branch. */
3344static void
3345output_ubranch (nios2_insn_infoS *insn)
3346{
3347 nios2_insn_relocS *reloc = insn->insn_reloc;
3348
3349 /* If the reloc is NULL, there was an error assembling the branch. */
3350 if (reloc != NULL)
3351 {
3352 symbolS *symp = reloc->reloc_expression.X_add_symbol;
3353 offsetT offset = reloc->reloc_expression.X_add_number;
3354 char *f;
c8c8175b 3355 bfd_boolean is_cdx = (insn->insn_nios2_opcode->size == 2);
36591ba1
SL		 3356
3357 /* Tag dwarf2 debug info to the address at the start of the insn.
3358 We must do it before frag_var() below closes off the frag. */
3359 dwarf2_emit_insn (0);
3360
3361 /* We create a machine dependent frag which can grow
3362 to accommodate the largest possible instruction sequence
3363 this may generate. */
3364 f = frag_var (rs_machine_dependent,
96ba4233 3365 UBRANCH_MAX_SIZE, insn->insn_nios2_opcode->size,
c8c8175b
SL		 3366 (is_cdx ? CDX_UBRANCH_SUBTYPE (0) : UBRANCH_SUBTYPE (0)),
3367 symp, offset, NULL);
36591ba1 3368
96ba4233 3369 md_number_to_chars (f, insn->insn_code, insn->insn_nios2_opcode->size);
36591ba1
SL		 3370
3371 /* We leave fixup generation to md_convert_frag. */
3372 }
3373}
3374
3375/* Output a conditional branch. */
3376static void
3377output_cbranch (nios2_insn_infoS *insn)
3378{
3379 nios2_insn_relocS *reloc = insn->insn_reloc;
3380
3381 /* If the reloc is NULL, there was an error assembling the branch. */
3382 if (reloc != NULL)
3383 {
3384 symbolS *symp = reloc->reloc_expression.X_add_symbol;
3385 offsetT offset = reloc->reloc_expression.X_add_number;
3386 char *f;
c8c8175b 3387 bfd_boolean is_cdx = (insn->insn_nios2_opcode->size == 2);
36591ba1
SL		 3388
3389 /* Tag dwarf2 debug info to the address at the start of the insn.
3390 We must do it before frag_var() below closes off the frag. */
3391 dwarf2_emit_insn (0);
3392
3393 /* We create a machine dependent frag which can grow
3394 to accommodate the largest possible instruction sequence
3395 this may generate. */
3396 f = frag_var (rs_machine_dependent,
96ba4233 3397 CBRANCH_MAX_SIZE, insn->insn_nios2_opcode->size,
c8c8175b
SL		 3398 (is_cdx ? CDX_CBRANCH_SUBTYPE (0) : CBRANCH_SUBTYPE (0)),
3399 symp, offset, NULL);
36591ba1 3400
96ba4233 3401 md_number_to_chars (f, insn->insn_code, insn->insn_nios2_opcode->size);
36591ba1
SL		 3402
3403 /* We leave fixup generation to md_convert_frag. */
3404 }
3405}
3406
3407/* Output a call sequence. Since calls are not pc-relative for NIOS2,
3408 but are page-relative, we cannot tell at any stage in assembly
3409 whether a call will be out of range since a section may be linked
3410 at any address. So if we are relaxing, we convert all call instructions
3411 to long call sequences, and rely on the linker to relax them back to
3412 short calls. */
3413static void
3414output_call (nios2_insn_infoS *insn)
3415{
3416 /* This allocates enough space for the instruction
3417 and puts it in the current frag. */
3418 char *f = frag_more (12);
3419 nios2_insn_relocS *reloc = insn->insn_reloc;
c8c8175b 3420 const struct nios2_opcode *op = insn->insn_nios2_opcode;
36591ba1 3421
c8c8175b
SL		 3422 switch (op->format)
3423 {
3424 case iw_j_type:
3425 md_number_to_chars (f,
3426 (MATCH_R1_ORHI | SET_IW_I_B (AT_REGNUM)
3427 | SET_IW_I_A (0)),
3428 4);
3429 dwarf2_emit_insn (4);
3430 fix_new_exp (frag_now, f - frag_now->fr_literal, 4,
3431 &reloc->reloc_expression, 0, BFD_RELOC_NIOS2_HI16);
3432 md_number_to_chars (f + 4,
3433 (MATCH_R1_ORI | SET_IW_I_B (AT_REGNUM)
3434 | SET_IW_I_A (AT_REGNUM)),
3435 4);
3436 dwarf2_emit_insn (4);
3437 fix_new_exp (frag_now, f - frag_now->fr_literal + 4, 4,
3438 &reloc->reloc_expression, 0, BFD_RELOC_NIOS2_LO16);
3439 md_number_to_chars (f + 8, MATCH_R1_CALLR | SET_IW_R_A (AT_REGNUM), 4);
3440 dwarf2_emit_insn (4);
3441 break;
3442 case iw_L26_type:
3443 md_number_to_chars (f,
3444 (MATCH_R2_ORHI | SET_IW_F2I16_B (AT_REGNUM)
3445 | SET_IW_F2I16_A (0)),
3446 4);
3447 dwarf2_emit_insn (4);
3448 fix_new_exp (frag_now, f - frag_now->fr_literal, 4,
3449 &reloc->reloc_expression, 0, BFD_RELOC_NIOS2_HI16);
3450 md_number_to_chars (f + 4,
3451 (MATCH_R2_ORI | SET_IW_F2I16_B (AT_REGNUM)
3452 | SET_IW_F2I16_A (AT_REGNUM)),
3453 4);
3454 dwarf2_emit_insn (4);
3455 fix_new_exp (frag_now, f - frag_now->fr_literal + 4, 4,
3456 &reloc->reloc_expression, 0, BFD_RELOC_NIOS2_LO16);
3457 md_number_to_chars (f + 8, MATCH_R2_CALLR | SET_IW_F3X6L5_A (AT_REGNUM),
3458 4);
3459 dwarf2_emit_insn (4);
3460 break;
3461 default:
3462 bad_opcode (op);
3463 }
36591ba1
SL		 3464}
3465
36591ba1
SL		 3466/* Output a movhi/addi pair for the movia pseudo-op. */
3467static void
3468output_movia (nios2_insn_infoS *insn)
3469{
3470 /* This allocates enough space for the instruction
3471 and puts it in the current frag. */
3472 char *f = frag_more (8);
3473 nios2_insn_relocS *reloc = insn->insn_reloc;
3facb0e9 3474 unsigned long reg, code = 0;
c8c8175b 3475 const struct nios2_opcode *op = insn->insn_nios2_opcode;
36591ba1
SL		 3476
3477 /* If the reloc is NULL, there was an error assembling the movia. */
3478 if (reloc != NULL)
3479 {
c8c8175b
SL		 3480 switch (op->format)
3481 {
3482 case iw_i_type:
3483 reg = GET_IW_I_B (insn->insn_code);
3484 code = MATCH_R1_ADDI | SET_IW_I_A (reg) | SET_IW_I_B (reg);
3485 break;
3486 case iw_F2I16_type:
3487 reg = GET_IW_F2I16_B (insn->insn_code);
3488 code = MATCH_R2_ADDI | SET_IW_F2I16_A (reg) | SET_IW_F2I16_B (reg);
3489 break;
3490 default:
3491 bad_opcode (op);
3492 }
3493
36591ba1
SL		 3494 md_number_to_chars (f, insn->insn_code, 4);
3495 dwarf2_emit_insn (4);
36591ba1
SL		 3496 fix_new (frag_now, f - frag_now->fr_literal, 4,
3497 reloc->reloc_expression.X_add_symbol,
3498 reloc->reloc_expression.X_add_number, 0,
3499 BFD_RELOC_NIOS2_HIADJ16);
c8c8175b 3500 md_number_to_chars (f + 4, code, 4);
96ba4233 3501 dwarf2_emit_insn (4);
36591ba1
SL		 3502 fix_new (frag_now, f + 4 - frag_now->fr_literal, 4,
3503 reloc->reloc_expression.X_add_symbol,
3504 reloc->reloc_expression.X_add_number, 0, BFD_RELOC_NIOS2_LO16);
3505 }
3506}
3507
3508
3509\f
3510/** External interfaces. */
3511
965b1d80
SL		 3512/* Update the selected architecture based on ARCH, giving an error if
3513 ARCH is an invalid value. */
3514
3515static void
3516nios2_use_arch (const char *arch)
3517{
3518 if (strcmp (arch, "nios2") == 0 || strcmp (arch, "r1") == 0)
3519 {
3520 nios2_architecture |= EF_NIOS2_ARCH_R1;
3521 nios2_opcodes = (struct nios2_opcode *) nios2_r1_opcodes;
3522 nios2_num_opcodes = nios2_num_r1_opcodes;
3523 nop32 = nop_r1;
3524 nop16 = NULL;
3525 return;
3526 }
3527 else if (strcmp (arch, "r2") == 0)
3528 {
3529 nios2_architecture |= EF_NIOS2_ARCH_R2;
3530 nios2_opcodes = (struct nios2_opcode *) nios2_r2_opcodes;
3531 nios2_num_opcodes = nios2_num_r2_opcodes;
3532 nop32 = nop_r2;
3533 nop16 = nop_r2_cdx;
3534 return;
3535 }
3536
3537 as_bad (_("unknown architecture '%s'"), arch);
3538}
3539
36591ba1
SL		 3540/* The following functions are called by machine-independent parts of
3541 the assembler. */
3542int
17b9d67d 3543md_parse_option (int c, const char *arg ATTRIBUTE_UNUSED)
36591ba1
SL		 3544{
3545 switch (c)
3546 {
3547 case 'r':
3548 /* Hidden option for self-test mode. */
3549 nios2_mode = NIOS2_MODE_TEST;
3550 break;
3551 case OPTION_RELAX_ALL:
3552 nios2_as_options.relax = relax_all;
3553 break;
3554 case OPTION_NORELAX:
3555 nios2_as_options.relax = relax_none;
3556 break;
3557 case OPTION_RELAX_SECTION:
3558 nios2_as_options.relax = relax_section;
3559 break;
3560 case OPTION_EB:
3561 target_big_endian = 1;
3562 break;
3563 case OPTION_EL:
3564 target_big_endian = 0;
3565 break;
965b1d80
SL		 3566 case OPTION_MARCH:
3567 nios2_use_arch (arg);
3568 break;
36591ba1
SL		 3569 default:
3570 return 0;
3571 break;
3572 }
3573
3574 return 1;
3575}
3576
3577/* Implement TARGET_FORMAT. We can choose to be big-endian or
3578 little-endian at runtime based on a switch. */
3579const char *
3580nios2_target_format (void)
3581{
3582 return target_big_endian ? "elf32-bignios2" : "elf32-littlenios2";
3583}
3584
3585/* Machine-dependent usage message. */
3586void
3587md_show_usage (FILE *stream)
3588{
3589 fprintf (stream, " NIOS2 options:\n"
3590 " -relax-all replace all branch and call "
3591 "instructions with jmp and callr sequences\n"
3592 " -relax-section replace identified out of range "
3593 "branches with jmp sequences (default)\n"
3594 " -no-relax do not replace any branches or calls\n"
3595 " -EB force big-endian byte ordering\n"
965b1d80
SL		 3596 " -EL force little-endian byte ordering\n"
3597 " -march=ARCH enable instructions from architecture ARCH\n");
36591ba1
SL		 3598}
3599
965b1d80 3600
36591ba1
SL		 3601/* This function is called once, at assembler startup time.
3602 It should set up all the tables, etc. that the MD part of the
3603 assembler will need. */
3604void
3605md_begin (void)
3606{
3607 int i;
3608 const char *inserted;
3609
965b1d80
SL		 3610 switch (nios2_architecture)
3611 {
3612 default:
3613 case EF_NIOS2_ARCH_R1:
3614 bfd_default_set_arch_mach (stdoutput, bfd_arch_nios2, bfd_mach_nios2r1);
3615 break;
3616 case EF_NIOS2_ARCH_R2:
3617 if (target_big_endian)
3618 as_fatal (_("Big-endian R2 is not supported."));
3619 bfd_default_set_arch_mach (stdoutput, bfd_arch_nios2, bfd_mach_nios2r2);
3620 break;
3621 }
3622
3739860c 3623 /* Create and fill a hashtable for the Nios II opcodes, registers and
36591ba1
SL		 3624 arguments. */
3625 nios2_opcode_hash = hash_new ();
3626 nios2_reg_hash = hash_new ();
36591ba1
SL		 3627 nios2_ps_hash = hash_new ();
3628
96ba4233 3629 for (i = 0; i < nios2_num_opcodes; ++i)
36591ba1
SL		 3630 {
3631 inserted
3632 = hash_insert (nios2_opcode_hash, nios2_opcodes[i].name,
3633 (PTR) & nios2_opcodes[i]);
3634 if (inserted != NULL)
3635 {
3636 fprintf (stderr, _("internal error: can't hash `%s': %s\n"),
3637 nios2_opcodes[i].name, inserted);
3638 /* Probably a memory allocation problem? Give up now. */
3639 as_fatal (_("Broken assembler. No assembly attempted."));
3640 }
3641 }
3642
3643 for (i = 0; i < nios2_num_regs; ++i)
3644 {
3645 inserted
3646 = hash_insert (nios2_reg_hash, nios2_regs[i].name,
3647 (PTR) & nios2_regs[i]);
3648 if (inserted != NULL)
3649 {
3650 fprintf (stderr, _("internal error: can't hash `%s': %s\n"),
3651 nios2_regs[i].name, inserted);
3652 /* Probably a memory allocation problem? Give up now. */
3653 as_fatal (_("Broken assembler. No assembly attempted."));
3654 }
3655
3656 }
3657
36591ba1
SL		 3658 for (i = 0; i < nios2_num_ps_insn_info_structs; ++i)
3659 {
3660 inserted
3661 = hash_insert (nios2_ps_hash, nios2_ps_insn_info_structs[i].pseudo_insn,
3662 (PTR) & nios2_ps_insn_info_structs[i]);
3663 if (inserted != NULL)
3664 {
3665 fprintf (stderr, _("internal error: can't hash `%s': %s\n"),
3666 nios2_ps_insn_info_structs[i].pseudo_insn, inserted);
3667 /* Probably a memory allocation problem? Give up now. */
3668 as_fatal (_("Broken assembler. No assembly attempted."));
3669 }
3670 }
3671
3672 /* Assembler option defaults. */
3673 nios2_as_options.noat = FALSE;
3674 nios2_as_options.nobreak = FALSE;
3675
3676 /* Debug information is incompatible with relaxation. */
3677 if (debug_type != DEBUG_UNSPECIFIED)
3678 nios2_as_options.relax = relax_none;
3679
3680 /* Initialize the alignment data. */
3681 nios2_current_align_seg = now_seg;
3682 nios2_last_label = NULL;
3683 nios2_current_align = 0;
c8c8175b 3684 nios2_min_align = 2;
36591ba1
SL		 3685}
3686
3687
3688/* Assembles a single line of Nios II assembly language. */
3689void
3690md_assemble (char *op_str)
3691{
3739860c 3692 char *argstr;
36591ba1 3693 char *op_strdup = NULL;
36591ba1
SL		 3694 unsigned long saved_pinfo = 0;
3695 nios2_insn_infoS thisinsn;
3696 nios2_insn_infoS *insn = &thisinsn;
3697
c8c8175b
SL		 3698 /* Make sure we are aligned on an appropriate boundary. */
3699 if (nios2_current_align < nios2_min_align)
3700 nios2_align (nios2_min_align, NULL, nios2_last_label);
3701 else if (nios2_current_align > nios2_min_align)
3702 nios2_current_align = nios2_min_align;
36591ba1
SL		 3703 nios2_last_label = NULL;
3704
3705 /* We don't want to clobber to op_str
3706 because we want to be able to use it in messages. */
3707 op_strdup = strdup (op_str);
3708 insn->insn_tokens[0] = strtok (op_strdup, " ");
3709 argstr = strtok (NULL, "");
3710
3711 /* Assemble the opcode. */
3712 insn->insn_nios2_opcode = nios2_opcode_lookup (insn->insn_tokens[0]);
3713 insn->insn_reloc = NULL;
3714
3715 if (insn->insn_nios2_opcode != NULL)
3716 {
3717 nios2_ps_insn_infoS *ps_insn = NULL;
c8c8175b
SL		 3718
3719 /* Note if we've seen a 16-bit instruction. */
3720 if (insn->insn_nios2_opcode->size == 2)
3721 nios2_min_align = 1;
3722
36591ba1
SL		 3723 /* Set the opcode for the instruction. */
3724 insn->insn_code = insn->insn_nios2_opcode->match;
96ba4233 3725 insn->constant_bits = 0;
36591ba1
SL		 3726
3727 /* Parse the arguments pointed to by argstr. */
3728 if (nios2_mode == NIOS2_MODE_ASSEMBLE)
3729 nios2_parse_args (insn, argstr, insn->insn_nios2_opcode->args,
3730 (char **) &insn->insn_tokens[1]);
3731 else
3732 nios2_parse_args (insn, argstr, insn->insn_nios2_opcode->args_test,
3733 (char **) &insn->insn_tokens[1]);
3734
3739860c 3735 /* We need to preserve the MOVIA macro as this is clobbered by
36591ba1
SL		 3736 translate_pseudo_insn. */
3737 if (insn->insn_nios2_opcode->pinfo == NIOS2_INSN_MACRO_MOVIA)
3738 saved_pinfo = NIOS2_INSN_MACRO_MOVIA;
3739860c 3739 /* If the instruction is an pseudo-instruction, we want to replace it
36591ba1
SL		 3740 with its real equivalent, and then continue. */
3741 if ((insn->insn_nios2_opcode->pinfo & NIOS2_INSN_MACRO)
3742 == NIOS2_INSN_MACRO)
3743 ps_insn = nios2_translate_pseudo_insn (insn);
3744
96ba4233
SL		 3745 /* Assemble the parsed arguments into the instruction word. */
3746 nios2_assemble_args (insn);
3747
3748 /* Handle relaxation and other transformations. */
3749 if (nios2_as_options.relax != relax_none
3750 && !nios2_as_options.noat
3751 && insn->insn_nios2_opcode->pinfo & NIOS2_INSN_UBRANCH)
3752 output_ubranch (insn);
3753 else if (nios2_as_options.relax != relax_none
3754 && !nios2_as_options.noat
3755 && insn->insn_nios2_opcode->pinfo & NIOS2_INSN_CBRANCH)
3756 output_cbranch (insn);
3757 else if (nios2_as_options.relax == relax_all
3758 && !nios2_as_options.noat
3759 && insn->insn_nios2_opcode->pinfo & NIOS2_INSN_CALL
3760 && insn->insn_reloc
3761 && ((insn->insn_reloc->reloc_type
3762 == BFD_RELOC_NIOS2_CALL26)
3763 || (insn->insn_reloc->reloc_type
3764 == BFD_RELOC_NIOS2_CALL26_NOAT)))
3765 output_call (insn);
96ba4233
SL		 3766 else if (saved_pinfo == NIOS2_INSN_MACRO_MOVIA)
3767 output_movia (insn);
36591ba1 3768 else
96ba4233
SL		 3769 output_insn (insn);
3770 if (ps_insn)
3771 nios2_cleanup_pseudo_insn (insn, ps_insn);
36591ba1
SL		 3772 }
3773 else
3774 /* Unrecognised instruction - error. */
3775 as_bad (_("unrecognised instruction %s"), insn->insn_tokens[0]);
3776
3777 /* Don't leak memory. */
3778 free (op_strdup);
3779}
3780
3781/* Round up section size. */
3782valueT
3783md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT size)
3784{
3785 /* I think byte alignment is fine here. */
3786 return size;
3787}
3788
3789/* Implement TC_FORCE_RELOCATION. */
3790int
3791nios2_force_relocation (fixS *fixp)
3792{
3793 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
3794 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY
3795 || fixp->fx_r_type == BFD_RELOC_NIOS2_ALIGN)
3796 return 1;
3797
3798 return generic_force_reloc (fixp);
3799}
3800
3801/* Implement tc_fix_adjustable. */
3802int
3803nios2_fix_adjustable (fixS *fixp)
3804{
3805 if (fixp->fx_addsy == NULL)
3806 return 1;
3807
3808#ifdef OBJ_ELF
3809 /* Prevent all adjustments to global symbols. */
3810 if (OUTPUT_FLAVOR == bfd_target_elf_flavour
3811 && (S_IS_EXTERNAL (fixp->fx_addsy) || S_IS_WEAK (fixp->fx_addsy)))
3812 return 0;
3813#endif
3814 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
3815 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
3816 return 0;
3817
3818 /* Preserve relocations against symbols with function type. */
3819 if (symbol_get_bfdsym (fixp->fx_addsy)->flags & BSF_FUNCTION)
3820 return 0;
3821
3822 /* Don't allow symbols to be discarded on GOT related relocs. */
3823 if (fixp->fx_r_type == BFD_RELOC_NIOS2_GOT16
3824 || fixp->fx_r_type == BFD_RELOC_NIOS2_CALL16
3825 || fixp->fx_r_type == BFD_RELOC_NIOS2_GOTOFF_LO
3826 || fixp->fx_r_type == BFD_RELOC_NIOS2_GOTOFF_HA
3827 || fixp->fx_r_type == BFD_RELOC_NIOS2_TLS_GD16
3828 || fixp->fx_r_type == BFD_RELOC_NIOS2_TLS_LDM16
3829 || fixp->fx_r_type == BFD_RELOC_NIOS2_TLS_LDO16
3830 || fixp->fx_r_type == BFD_RELOC_NIOS2_TLS_IE16
3831 || fixp->fx_r_type == BFD_RELOC_NIOS2_TLS_LE16
3832 || fixp->fx_r_type == BFD_RELOC_NIOS2_TLS_DTPMOD
3833 || fixp->fx_r_type == BFD_RELOC_NIOS2_TLS_DTPREL
3834 || fixp->fx_r_type == BFD_RELOC_NIOS2_TLS_TPREL
1c2de463
SL		 3835 || fixp->fx_r_type == BFD_RELOC_NIOS2_GOTOFF
3836 || fixp->fx_r_type == BFD_RELOC_NIOS2_GOT_LO
3837 || fixp->fx_r_type == BFD_RELOC_NIOS2_GOT_HA
3838 || fixp->fx_r_type == BFD_RELOC_NIOS2_CALL_LO
3839 || fixp->fx_r_type == BFD_RELOC_NIOS2_CALL_HA
3840 )
36591ba1
SL		 3841 return 0;
3842
3843 return 1;
3844}
3845
3846/* Implement tc_frob_symbol. This is called in adjust_reloc_syms;
3847 it is used to remove *ABS* references from the symbol table. */
3848int
3849nios2_frob_symbol (symbolS *symp)
3850{
3851 if ((OUTPUT_FLAVOR == bfd_target_elf_flavour
3852 && symp == section_symbol (absolute_section))
3853 || !S_IS_DEFINED (symp))
3854 return 1;
3855 else
3856 return 0;
3857}
3858
3859/* The function tc_gen_reloc creates a relocation structure for the
3860 fixup fixp, and returns a pointer to it. This structure is passed
3861 to bfd_install_relocation so that it can be written to the object
3862 file for linking. */
3863arelent *
3864tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp)
3865{
3866 arelent *reloc = (arelent *) xmalloc (sizeof (arelent));
3867 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
3868 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
3869
3870 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
3871 reloc->addend = fixp->fx_offset; /* fixp->fx_addnumber; */
3872
3873 if (fixp->fx_pcrel)
3874 {
3875 switch (fixp->fx_r_type)
3876 {
3877 case BFD_RELOC_16:
3878 fixp->fx_r_type = BFD_RELOC_16_PCREL;
3879 break;
3880 case BFD_RELOC_NIOS2_LO16:
3881 fixp->fx_r_type = BFD_RELOC_NIOS2_PCREL_LO;
3882 break;
3883 case BFD_RELOC_NIOS2_HIADJ16:
3884 fixp->fx_r_type = BFD_RELOC_NIOS2_PCREL_HA;
3885 break;
3886 default:
3887 break;
3888 }
3889 }
3890
3891 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
3892 if (reloc->howto == NULL)
3893 {
3894 as_bad_where (fixp->fx_file, fixp->fx_line,
3895 _("can't represent relocation type %s"),
3896 bfd_get_reloc_code_name (fixp->fx_r_type));
3897
3898 /* Set howto to a garbage value so that we can keep going. */
3899 reloc->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32);
3900 gas_assert (reloc->howto != NULL);
3901 }
3902 return reloc;
3903}
3904
3905long
3906md_pcrel_from (fixS *fixP ATTRIBUTE_UNUSED)
3907{
3908 return 0;
3909}
3910
3911/* Called just before the assembler exits. */
3912void
3913md_end ()
3914{
3915 /* FIXME - not yet implemented */
3916}
3917
3918/* Under ELF we need to default _GLOBAL_OFFSET_TABLE.
3919 Otherwise we have no need to default values of symbols. */
3920symbolS *
3921md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
3922{
3923#ifdef OBJ_ELF
3924 if (name[0] == '_' && name[1] == 'G'
3925 && strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0)
3926 {
3927 if (!GOT_symbol)
3928 {
3929 if (symbol_find (name))
3930 as_bad ("GOT already in the symbol table");
3931
3932 GOT_symbol = symbol_new (name, undefined_section,
3933 (valueT) 0, &zero_address_frag);
3934 }
3935
3936 return GOT_symbol;
3937 }
3938#endif
3939
3940 return 0;
3941}
3942
3943/* Implement tc_frob_label. */
3944void
3945nios2_frob_label (symbolS *lab)
3946{
3947 /* Emit dwarf information. */
3948 dwarf2_emit_label (lab);
3949
3950 /* Update the label's address with the current output pointer. */
3951 symbol_set_frag (lab, frag_now);
3952 S_SET_VALUE (lab, (valueT) frag_now_fix ());
3953
3954 /* Record this label for future adjustment after we find out what
3955 kind of data it references, and the required alignment therewith. */
3956 nios2_last_label = lab;
3957}
3958
3959/* Implement md_cons_align. */
3960void
3961nios2_cons_align (int size)
3962{
3963 int log_size = 0;
3964 const char *pfill = NULL;
3965
3966 while ((size >>= 1) != 0)
3967 ++log_size;
3968
3969 if (subseg_text_p (now_seg))
c8c8175b 3970 pfill = (const char *) nop32;
36591ba1
SL		 3971 else
3972 pfill = NULL;
3973
3974 if (nios2_auto_align_on)
3975 nios2_align (log_size, pfill, NULL);
3976
3977 nios2_last_label = NULL;
3978}
3979
3980/* Map 's' to SHF_NIOS2_GPREL. */
3981/* This is from the Alpha code tc-alpha.c. */
3982int
6d4af3c2 3983nios2_elf_section_letter (int letter, const char **ptr_msg)
36591ba1
SL		 3984{
3985 if (letter == 's')
3986 return SHF_NIOS2_GPREL;
3987
3988 *ptr_msg = _("Bad .section directive: want a,s,w,x,M,S,G,T in string");
3989 return -1;
3990}
3991
3992/* Map SHF_ALPHA_GPREL to SEC_SMALL_DATA. */
3993/* This is from the Alpha code tc-alpha.c. */
3994flagword
3995nios2_elf_section_flags (flagword flags, int attr, int type ATTRIBUTE_UNUSED)
3996{
3997 if (attr & SHF_NIOS2_GPREL)
3998 flags |= SEC_SMALL_DATA;
3999 return flags;
4000}
4001
4002/* Implement TC_PARSE_CONS_EXPRESSION to handle %tls_ldo(...) */
62ebcb5c 4003bfd_reloc_code_real_type
36591ba1
SL		 4004nios2_cons (expressionS *exp, int size)
4005{
62ebcb5c 4006 bfd_reloc_code_real_type nios2_tls_ldo_reloc = BFD_RELOC_NONE;
36591ba1
SL		 4007
4008 SKIP_WHITESPACE ();
4009 if (input_line_pointer[0] == '%')
4010 {
4011 if (strprefix (input_line_pointer + 1, "tls_ldo"))
4012 {
4013 if (size != 4)
4014 as_bad (_("Illegal operands: %%tls_ldo in %d-byte data field"),
4015 size);
4016 else
4017 {
4018 input_line_pointer += 8;
62ebcb5c 4019 nios2_tls_ldo_reloc = BFD_RELOC_NIOS2_TLS_DTPREL;
36591ba1
SL		 4020 }
4021 }
62ebcb5c 4022 if (nios2_tls_ldo_reloc != BFD_RELOC_NONE)
36591ba1
SL		 4023 {
4024 SKIP_WHITESPACE ();
4025 if (input_line_pointer[0] != '(')
4026 as_bad (_("Illegal operands: %%tls_ldo requires arguments in ()"));
4027 else
4028 {
4029 int c;
4030 char *end = ++input_line_pointer;
4031 int npar = 0;
4032
4033 for (c = *end; !is_end_of_line[c]; end++, c = *end)
4034 if (c == '(')
4035 npar++;
4036 else if (c == ')')
4037 {
4038 if (!npar)
4039 break;
4040 npar--;
4041 }
4042
4043 if (c != ')')
4044 as_bad (_("Illegal operands: %%tls_ldo requires arguments in ()"));
4045 else
4046 {
4047 *end = '\0';
4048 expression (exp);
4049 *end = c;
4050 if (input_line_pointer != end)
4051 as_bad (_("Illegal operands: %%tls_ldo requires arguments in ()"));
4052 else
4053 {
4054 input_line_pointer++;
4055 SKIP_WHITESPACE ();
4056 c = *input_line_pointer;
4057 if (! is_end_of_line[c] && c != ',')
4058 as_bad (_("Illegal operands: garbage after %%tls_ldo()"));
4059 }
4060 }
4061 }
4062 }
4063 }
62ebcb5c 4064 if (nios2_tls_ldo_reloc == BFD_RELOC_NONE)
36591ba1 4065 expression (exp);
62ebcb5c 4066 return nios2_tls_ldo_reloc;
36591ba1
SL		 4067}
4068
4069/* Implement HANDLE_ALIGN. */
4070void
4071nios2_handle_align (fragS *fragp)
4072{
4073 /* If we are expecting to relax in the linker, then we must output a
4074 relocation to tell the linker we are aligning code. */
4075 if (nios2_as_options.relax == relax_all
4076 && (fragp->fr_type == rs_align || fragp->fr_type == rs_align_code)
4077 && fragp->fr_address + fragp->fr_fix > 0
4078 && fragp->fr_offset > 1
4079 && now_seg != bss_section)
4080 fix_new (fragp, fragp->fr_fix, 0, &abs_symbol, fragp->fr_offset, 0,
4081 BFD_RELOC_NIOS2_ALIGN);
4082}
4083
4084/* Implement tc_regname_to_dw2regnum, to convert REGNAME to a DWARF-2
4085 register number. */
4086int
4087nios2_regname_to_dw2regnum (char *regname)
4088{
4089 struct nios2_reg *r = nios2_reg_lookup (regname);
4090 if (r == NULL)
4091 return -1;
4092 return r->index;
4093}
4094
4095/* Implement tc_cfi_frame_initial_instructions, to initialize the DWARF-2
4096 unwind information for this procedure. */
4097void
4098nios2_frame_initial_instructions (void)
4099{
4100 cfi_add_CFA_def_cfa (27, 0);
4101}
965b1d80
SL		 4102
4103#ifdef OBJ_ELF
4104/* Some special processing for a Nios II ELF file. */
4105
4106void
4107nios2_elf_final_processing (void)
4108{
4109 elf_elfheader (stdoutput)->e_flags = nios2_architecture;
4110}
4111#endif
GDB Binutils - Deliverables
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