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Use -gdwarf2 in preference to -gstabs for Sparc64.
[deliverable/binutils-gdb.git] / gas / config / tc-ppc.c
CommitLineData
252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b7d7dc63
AM		 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
3 2004 Free Software Foundation, Inc.
252b5132
RH		 4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
20 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
81d4177b 21 02111-1307, USA. */
252b5132
RH		 22
23#include <stdio.h>
252b5132 24#include "as.h"
3882b010 25#include "safe-ctype.h"
252b5132 26#include "subsegs.h"
75e21f08 27#include "dw2gencfi.h"
252b5132
RH		 28#include "opcode/ppc.h"
29
30#ifdef OBJ_ELF
31#include "elf/ppc.h"
5d6f4f16 32#include "dwarf2dbg.h"
252b5132
RH		 33#endif
34
35#ifdef TE_PE
36#include "coff/pe.h"
37#endif
38
39/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
40
41/* Tell the main code what the endianness is. */
42extern int target_big_endian;
43
44/* Whether or not, we've set target_big_endian. */
45static int set_target_endian = 0;
46
47/* Whether to use user friendly register names. */
48#ifndef TARGET_REG_NAMES_P
49#ifdef TE_PE
b34976b6 50#define TARGET_REG_NAMES_P TRUE
252b5132 51#else
b34976b6 52#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 53#endif
54#endif
55
0baf16f2
AM		 56/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
57 HIGHESTA. */
58
59/* #lo(value) denotes the least significant 16 bits of the indicated. */
60#define PPC_LO(v) ((v) & 0xffff)
61
62/* #hi(value) denotes bits 16 through 31 of the indicated value. */
63#define PPC_HI(v) (((v) >> 16) & 0xffff)
64
65/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
66 the indicated value, compensating for #lo() being treated as a
67 signed number. */
15c1449b 68#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 69
70/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 71#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 72
73/* #highera(value) denotes bits 32 through 47 of the indicated value,
74 compensating for #lo() being treated as a signed number. */
15c1449b 75#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 76
77/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 78#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 79
80/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 81 compensating for #lo being treated as a signed number. */
82#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM		 83
84#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
85
b34976b6 86static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 87
b34976b6 88static bfd_boolean register_name PARAMS ((expressionS *));
252b5132
RH		 89static void ppc_set_cpu PARAMS ((void));
90static unsigned long ppc_insert_operand
91 PARAMS ((unsigned long insn, const struct powerpc_operand *operand,
92 offsetT val, char *file, unsigned int line));
93static void ppc_macro PARAMS ((char *str, const struct powerpc_macro *macro));
94static void ppc_byte PARAMS ((int));
0baf16f2
AM		 95
96#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 97static int ppc_is_toc_sym PARAMS ((symbolS *sym));
98static void ppc_tc PARAMS ((int));
0baf16f2
AM		 99static void ppc_machine PARAMS ((int));
100#endif
252b5132
RH		 101
102#ifdef OBJ_XCOFF
103static void ppc_comm PARAMS ((int));
104static void ppc_bb PARAMS ((int));
105static void ppc_bc PARAMS ((int));
106static void ppc_bf PARAMS ((int));
107static void ppc_biei PARAMS ((int));
108static void ppc_bs PARAMS ((int));
109static void ppc_eb PARAMS ((int));
110static void ppc_ec PARAMS ((int));
111static void ppc_ef PARAMS ((int));
112static void ppc_es PARAMS ((int));
113static void ppc_csect PARAMS ((int));
931e13a6 114static void ppc_change_csect PARAMS ((symbolS *, offsetT));
252b5132
RH		 115static void ppc_function PARAMS ((int));
116static void ppc_extern PARAMS ((int));
117static void ppc_lglobl PARAMS ((int));
118static void ppc_section PARAMS ((int));
119static void ppc_named_section PARAMS ((int));
120static void ppc_stabx PARAMS ((int));
121static void ppc_rename PARAMS ((int));
122static void ppc_toc PARAMS ((int));
123static void ppc_xcoff_cons PARAMS ((int));
124static void ppc_vbyte PARAMS ((int));
125#endif
126
127#ifdef OBJ_ELF
128static bfd_reloc_code_real_type ppc_elf_suffix PARAMS ((char **, expressionS *));
129static void ppc_elf_cons PARAMS ((int));
130static void ppc_elf_rdata PARAMS ((int));
131static void ppc_elf_lcomm PARAMS ((int));
132static void ppc_elf_validate_fix PARAMS ((fixS *, segT));
dc1d03fc 133static void ppc_apuinfo_section_add PARAMS ((unsigned int apu, unsigned int version));
252b5132
RH		 134#endif
135
136#ifdef TE_PE
137static void ppc_set_current_section PARAMS ((segT));
138static void ppc_previous PARAMS ((int));
139static void ppc_pdata PARAMS ((int));
140static void ppc_ydata PARAMS ((int));
141static void ppc_reldata PARAMS ((int));
142static void ppc_rdata PARAMS ((int));
143static void ppc_ualong PARAMS ((int));
144static void ppc_znop PARAMS ((int));
145static void ppc_pe_comm PARAMS ((int));
146static void ppc_pe_section PARAMS ((int));
147static void ppc_pe_function PARAMS ((int));
148static void ppc_pe_tocd PARAMS ((int));
149#endif
150\f
151/* Generic assembler global variables which must be defined by all
152 targets. */
153
154#ifdef OBJ_ELF
155/* This string holds the chars that always start a comment. If the
156 pre-processor is disabled, these aren't very useful. The macro
157 tc_comment_chars points to this. We use this, rather than the
158 usual comment_chars, so that we can switch for Solaris conventions. */
159static const char ppc_solaris_comment_chars[] = "#!";
160static const char ppc_eabi_comment_chars[] = "#";
161
162#ifdef TARGET_SOLARIS_COMMENT
163const char *ppc_comment_chars = ppc_solaris_comment_chars;
164#else
165const char *ppc_comment_chars = ppc_eabi_comment_chars;
166#endif
167#else
168const char comment_chars[] = "#";
169#endif
170
171/* Characters which start a comment at the beginning of a line. */
172const char line_comment_chars[] = "#";
173
174/* Characters which may be used to separate multiple commands on a
175 single line. */
176const char line_separator_chars[] = ";";
177
178/* Characters which are used to indicate an exponent in a floating
179 point number. */
180const char EXP_CHARS[] = "eE";
181
182/* Characters which mean that a number is a floating point constant,
183 as in 0d1.0. */
184const char FLT_CHARS[] = "dD";
5ce8663f 185
b7d7dc63 186/* '+' and '-' can be used as postfix predicate predictors for conditional
5ce8663f
NC		 187 branches. So they need to be accepted as symbol characters. */
188const char ppc_symbol_chars[] = "+-";
75e21f08
JJ		 189
190/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
191int ppc_cie_data_alignment;
252b5132
RH		 192\f
193/* The target specific pseudo-ops which we support. */
194
195const pseudo_typeS md_pseudo_table[] =
196{
197 /* Pseudo-ops which must be overridden. */
198 { "byte", ppc_byte, 0 },
199
200#ifdef OBJ_XCOFF
201 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
202 legitimately belong in the obj-*.c file. However, XCOFF is based
203 on COFF, and is only implemented for the RS/6000. We just use
204 obj-coff.c, and add what we need here. */
205 { "comm", ppc_comm, 0 },
206 { "lcomm", ppc_comm, 1 },
207 { "bb", ppc_bb, 0 },
208 { "bc", ppc_bc, 0 },
209 { "bf", ppc_bf, 0 },
210 { "bi", ppc_biei, 0 },
211 { "bs", ppc_bs, 0 },
212 { "csect", ppc_csect, 0 },
213 { "data", ppc_section, 'd' },
214 { "eb", ppc_eb, 0 },
215 { "ec", ppc_ec, 0 },
216 { "ef", ppc_ef, 0 },
217 { "ei", ppc_biei, 1 },
218 { "es", ppc_es, 0 },
219 { "extern", ppc_extern, 0 },
220 { "function", ppc_function, 0 },
221 { "lglobl", ppc_lglobl, 0 },
222 { "rename", ppc_rename, 0 },
223 { "section", ppc_named_section, 0 },
224 { "stabx", ppc_stabx, 0 },
225 { "text", ppc_section, 't' },
226 { "toc", ppc_toc, 0 },
227 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 228 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 229 { "word", ppc_xcoff_cons, 1 },
230 { "short", ppc_xcoff_cons, 1 },
231 { "vbyte", ppc_vbyte, 0 },
232#endif
233
234#ifdef OBJ_ELF
0baf16f2
AM		 235 { "llong", ppc_elf_cons, 8 },
236 { "quad", ppc_elf_cons, 8 },
252b5132
RH		 237 { "long", ppc_elf_cons, 4 },
238 { "word", ppc_elf_cons, 2 },
239 { "short", ppc_elf_cons, 2 },
240 { "rdata", ppc_elf_rdata, 0 },
241 { "rodata", ppc_elf_rdata, 0 },
242 { "lcomm", ppc_elf_lcomm, 0 },
243#endif
244
245#ifdef TE_PE
99a814a1 246 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 247 { "previous", ppc_previous, 0 },
248 { "pdata", ppc_pdata, 0 },
249 { "ydata", ppc_ydata, 0 },
250 { "reldata", ppc_reldata, 0 },
251 { "rdata", ppc_rdata, 0 },
252 { "ualong", ppc_ualong, 0 },
253 { "znop", ppc_znop, 0 },
254 { "comm", ppc_pe_comm, 0 },
255 { "lcomm", ppc_pe_comm, 1 },
256 { "section", ppc_pe_section, 0 },
257 { "function", ppc_pe_function,0 },
258 { "tocd", ppc_pe_tocd, 0 },
259#endif
260
0baf16f2 261#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 262 { "tc", ppc_tc, 0 },
0baf16f2
AM		 263 { "machine", ppc_machine, 0 },
264#endif
252b5132
RH		 265
266 { NULL, NULL, 0 }
267};
268
269\f
99a814a1
AM		 270/* Predefined register names if -mregnames (or default for Windows NT).
271 In general, there are lots of them, in an attempt to be compatible
272 with a number of other Windows NT assemblers. */
252b5132
RH		 273
274/* Structure to hold information about predefined registers. */
275struct pd_reg
276 {
277 char *name;
278 int value;
279 };
280
281/* List of registers that are pre-defined:
282
283 Each general register has predefined names of the form:
284 1. r<reg_num> which has the value <reg_num>.
285 2. r.<reg_num> which has the value <reg_num>.
286
252b5132
RH		 287 Each floating point register has predefined names of the form:
288 1. f<reg_num> which has the value <reg_num>.
289 2. f.<reg_num> which has the value <reg_num>.
290
7a899fff
C		 291 Each vector unit register has predefined names of the form:
292 1. v<reg_num> which has the value <reg_num>.
293 2. v.<reg_num> which has the value <reg_num>.
294
252b5132
RH		 295 Each condition register has predefined names of the form:
296 1. cr<reg_num> which has the value <reg_num>.
297 2. cr.<reg_num> which has the value <reg_num>.
298
299 There are individual registers as well:
300 sp or r.sp has the value 1
301 rtoc or r.toc has the value 2
302 fpscr has the value 0
303 xer has the value 1
304 lr has the value 8
305 ctr has the value 9
306 pmr has the value 0
307 dar has the value 19
308 dsisr has the value 18
309 dec has the value 22
310 sdr1 has the value 25
311 srr0 has the value 26
312 srr1 has the value 27
313
81d4177b 314 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 315
316static const struct pd_reg pre_defined_registers[] =
317{
318 { "cr.0", 0 }, /* Condition Registers */
319 { "cr.1", 1 },
320 { "cr.2", 2 },
321 { "cr.3", 3 },
322 { "cr.4", 4 },
323 { "cr.5", 5 },
324 { "cr.6", 6 },
325 { "cr.7", 7 },
326
327 { "cr0", 0 },
328 { "cr1", 1 },
329 { "cr2", 2 },
330 { "cr3", 3 },
331 { "cr4", 4 },
332 { "cr5", 5 },
333 { "cr6", 6 },
334 { "cr7", 7 },
335
336 { "ctr", 9 },
337
338 { "dar", 19 }, /* Data Access Register */
339 { "dec", 22 }, /* Decrementer */
340 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
341
342 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 343 { "f.1", 1 },
344 { "f.10", 10 },
345 { "f.11", 11 },
346 { "f.12", 12 },
347 { "f.13", 13 },
348 { "f.14", 14 },
349 { "f.15", 15 },
350 { "f.16", 16 },
351 { "f.17", 17 },
352 { "f.18", 18 },
353 { "f.19", 19 },
354 { "f.2", 2 },
355 { "f.20", 20 },
356 { "f.21", 21 },
357 { "f.22", 22 },
358 { "f.23", 23 },
359 { "f.24", 24 },
360 { "f.25", 25 },
361 { "f.26", 26 },
362 { "f.27", 27 },
363 { "f.28", 28 },
364 { "f.29", 29 },
365 { "f.3", 3 },
252b5132
RH		 366 { "f.30", 30 },
367 { "f.31", 31 },
81d4177b
KH		 368 { "f.4", 4 },
369 { "f.5", 5 },
370 { "f.6", 6 },
371 { "f.7", 7 },
372 { "f.8", 8 },
373 { "f.9", 9 },
374
375 { "f0", 0 },
376 { "f1", 1 },
377 { "f10", 10 },
378 { "f11", 11 },
379 { "f12", 12 },
380 { "f13", 13 },
381 { "f14", 14 },
382 { "f15", 15 },
383 { "f16", 16 },
384 { "f17", 17 },
385 { "f18", 18 },
386 { "f19", 19 },
387 { "f2", 2 },
388 { "f20", 20 },
389 { "f21", 21 },
390 { "f22", 22 },
391 { "f23", 23 },
392 { "f24", 24 },
393 { "f25", 25 },
394 { "f26", 26 },
395 { "f27", 27 },
396 { "f28", 28 },
397 { "f29", 29 },
398 { "f3", 3 },
252b5132
RH		 399 { "f30", 30 },
400 { "f31", 31 },
81d4177b
KH		 401 { "f4", 4 },
402 { "f5", 5 },
403 { "f6", 6 },
404 { "f7", 7 },
405 { "f8", 8 },
406 { "f9", 9 },
252b5132
RH		 407
408 { "fpscr", 0 },
409
410 { "lr", 8 }, /* Link Register */
411
412 { "pmr", 0 },
413
414 { "r.0", 0 }, /* General Purpose Registers */
415 { "r.1", 1 },
416 { "r.10", 10 },
417 { "r.11", 11 },
418 { "r.12", 12 },
419 { "r.13", 13 },
420 { "r.14", 14 },
421 { "r.15", 15 },
422 { "r.16", 16 },
423 { "r.17", 17 },
424 { "r.18", 18 },
425 { "r.19", 19 },
426 { "r.2", 2 },
427 { "r.20", 20 },
428 { "r.21", 21 },
429 { "r.22", 22 },
430 { "r.23", 23 },
431 { "r.24", 24 },
432 { "r.25", 25 },
433 { "r.26", 26 },
434 { "r.27", 27 },
435 { "r.28", 28 },
436 { "r.29", 29 },
437 { "r.3", 3 },
438 { "r.30", 30 },
439 { "r.31", 31 },
440 { "r.4", 4 },
441 { "r.5", 5 },
442 { "r.6", 6 },
443 { "r.7", 7 },
444 { "r.8", 8 },
445 { "r.9", 9 },
446
447 { "r.sp", 1 }, /* Stack Pointer */
448
449 { "r.toc", 2 }, /* Pointer to the table of contents */
450
451 { "r0", 0 }, /* More general purpose registers */
452 { "r1", 1 },
453 { "r10", 10 },
454 { "r11", 11 },
455 { "r12", 12 },
456 { "r13", 13 },
457 { "r14", 14 },
458 { "r15", 15 },
459 { "r16", 16 },
460 { "r17", 17 },
461 { "r18", 18 },
462 { "r19", 19 },
463 { "r2", 2 },
464 { "r20", 20 },
465 { "r21", 21 },
466 { "r22", 22 },
467 { "r23", 23 },
468 { "r24", 24 },
469 { "r25", 25 },
470 { "r26", 26 },
471 { "r27", 27 },
472 { "r28", 28 },
473 { "r29", 29 },
474 { "r3", 3 },
475 { "r30", 30 },
476 { "r31", 31 },
477 { "r4", 4 },
478 { "r5", 5 },
479 { "r6", 6 },
480 { "r7", 7 },
481 { "r8", 8 },
482 { "r9", 9 },
483
484 { "rtoc", 2 }, /* Table of contents */
485
486 { "sdr1", 25 }, /* Storage Description Register 1 */
487
488 { "sp", 1 },
489
490 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
491 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 492
7a899fff 493 { "v.0", 0 }, /* Vector registers */
81d4177b
KH		 494 { "v.1", 1 },
495 { "v.10", 10 },
496 { "v.11", 11 },
497 { "v.12", 12 },
498 { "v.13", 13 },
499 { "v.14", 14 },
500 { "v.15", 15 },
501 { "v.16", 16 },
502 { "v.17", 17 },
503 { "v.18", 18 },
504 { "v.19", 19 },
505 { "v.2", 2 },
506 { "v.20", 20 },
507 { "v.21", 21 },
508 { "v.22", 22 },
509 { "v.23", 23 },
510 { "v.24", 24 },
511 { "v.25", 25 },
512 { "v.26", 26 },
513 { "v.27", 27 },
514 { "v.28", 28 },
515 { "v.29", 29 },
516 { "v.3", 3 },
7a899fff
C		 517 { "v.30", 30 },
518 { "v.31", 31 },
81d4177b
KH		 519 { "v.4", 4 },
520 { "v.5", 5 },
521 { "v.6", 6 },
522 { "v.7", 7 },
523 { "v.8", 8 },
524 { "v.9", 9 },
7a899fff
C		 525
526 { "v0", 0 },
81d4177b
KH		 527 { "v1", 1 },
528 { "v10", 10 },
529 { "v11", 11 },
530 { "v12", 12 },
531 { "v13", 13 },
532 { "v14", 14 },
533 { "v15", 15 },
534 { "v16", 16 },
535 { "v17", 17 },
536 { "v18", 18 },
537 { "v19", 19 },
538 { "v2", 2 },
539 { "v20", 20 },
540 { "v21", 21 },
541 { "v22", 22 },
542 { "v23", 23 },
543 { "v24", 24 },
544 { "v25", 25 },
545 { "v26", 26 },
546 { "v27", 27 },
547 { "v28", 28 },
548 { "v29", 29 },
549 { "v3", 3 },
7a899fff
C		 550 { "v30", 30 },
551 { "v31", 31 },
81d4177b
KH		 552 { "v4", 4 },
553 { "v5", 5 },
554 { "v6", 6 },
555 { "v7", 7 },
556 { "v8", 8 },
7a899fff 557 { "v9", 9 },
252b5132
RH		 558
559 { "xer", 1 },
560
561};
562
bc805888 563#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 564
565/* Given NAME, find the register number associated with that name, return
566 the integer value associated with the given name or -1 on failure. */
567
568static int reg_name_search
569 PARAMS ((const struct pd_reg *, int, const char * name));
570
571static int
572reg_name_search (regs, regcount, name)
573 const struct pd_reg *regs;
574 int regcount;
575 const char *name;
576{
577 int middle, low, high;
578 int cmp;
579
580 low = 0;
581 high = regcount - 1;
582
583 do
584 {
585 middle = (low + high) / 2;
586 cmp = strcasecmp (name, regs[middle].name);
587 if (cmp < 0)
588 high = middle - 1;
589 else if (cmp > 0)
590 low = middle + 1;
591 else
592 return regs[middle].value;
593 }
594 while (low <= high);
595
596 return -1;
597}
598
599/*
99a814a1 600 * Summary of register_name.
252b5132
RH		 601 *
602 * in: Input_line_pointer points to 1st char of operand.
603 *
604 * out: A expressionS.
605 * The operand may have been a register: in this case, X_op == O_register,
606 * X_add_number is set to the register number, and truth is returned.
607 * Input_line_pointer->(next non-blank) char after operand, or is in its
608 * original state.
609 */
610
b34976b6 611static bfd_boolean
252b5132
RH		 612register_name (expressionP)
613 expressionS *expressionP;
614{
615 int reg_number;
616 char *name;
617 char *start;
618 char c;
619
99a814a1 620 /* Find the spelling of the operand. */
252b5132 621 start = name = input_line_pointer;
3882b010 622 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 623 name = ++input_line_pointer;
624
3882b010 625 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 626 return FALSE;
252b5132
RH		 627
628 c = get_symbol_end ();
629 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
630
468cced8
AM		 631 /* Put back the delimiting char. */
632 *input_line_pointer = c;
633
99a814a1 634 /* Look to see if it's in the register table. */
81d4177b 635 if (reg_number >= 0)
252b5132
RH		 636 {
637 expressionP->X_op = O_register;
638 expressionP->X_add_number = reg_number;
81d4177b 639
99a814a1 640 /* Make the rest nice. */
252b5132
RH		 641 expressionP->X_add_symbol = NULL;
642 expressionP->X_op_symbol = NULL;
b34976b6 643 return TRUE;
252b5132 644 }
468cced8
AM		 645
646 /* Reset the line as if we had not done anything. */
647 input_line_pointer = start;
b34976b6 648 return FALSE;
252b5132
RH		 649}
650\f
651/* This function is called for each symbol seen in an expression. It
652 handles the special parsing which PowerPC assemblers are supposed
653 to use for condition codes. */
654
655/* Whether to do the special parsing. */
b34976b6 656static bfd_boolean cr_operand;
252b5132
RH		 657
658/* Names to recognize in a condition code. This table is sorted. */
659static const struct pd_reg cr_names[] =
660{
661 { "cr0", 0 },
662 { "cr1", 1 },
663 { "cr2", 2 },
664 { "cr3", 3 },
665 { "cr4", 4 },
666 { "cr5", 5 },
667 { "cr6", 6 },
668 { "cr7", 7 },
669 { "eq", 2 },
670 { "gt", 1 },
671 { "lt", 0 },
672 { "so", 3 },
673 { "un", 3 }
674};
675
676/* Parsing function. This returns non-zero if it recognized an
677 expression. */
678
679int
680ppc_parse_name (name, expr)
681 const char *name;
682 expressionS *expr;
683{
684 int val;
685
686 if (! cr_operand)
687 return 0;
688
689 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
690 name);
691 if (val < 0)
692 return 0;
693
694 expr->X_op = O_constant;
695 expr->X_add_number = val;
696
697 return 1;
698}
699\f
700/* Local variables. */
701
702/* The type of processor we are assembling for. This is one or more
703 of the PPC_OPCODE flags defined in opcode/ppc.h. */
2b3c4602 704static unsigned long ppc_cpu = 0;
252b5132 705
2b3c4602
AM		 706/* Whether to target xcoff64/elf64. */
707static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 708
252b5132
RH		 709/* Opcode hash table. */
710static struct hash_control *ppc_hash;
711
712/* Macro hash table. */
713static struct hash_control *ppc_macro_hash;
714
715#ifdef OBJ_ELF
99a814a1 716/* What type of shared library support to use. */
5d6f4f16 717static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 718
99a814a1 719/* Flags to set in the elf header. */
252b5132
RH		 720static flagword ppc_flags = 0;
721
722/* Whether this is Solaris or not. */
723#ifdef TARGET_SOLARIS_COMMENT
b34976b6 724#define SOLARIS_P TRUE
252b5132 725#else
b34976b6 726#define SOLARIS_P FALSE
252b5132
RH		 727#endif
728
b34976b6 729static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 730#endif
731
732#ifdef OBJ_XCOFF
733
734/* The RS/6000 assembler uses the .csect pseudo-op to generate code
735 using a bunch of different sections. These assembler sections,
736 however, are all encompassed within the .text or .data sections of
737 the final output file. We handle this by using different
738 subsegments within these main segments. */
739
740/* Next subsegment to allocate within the .text segment. */
741static subsegT ppc_text_subsegment = 2;
742
743/* Linked list of csects in the text section. */
744static symbolS *ppc_text_csects;
745
746/* Next subsegment to allocate within the .data segment. */
747static subsegT ppc_data_subsegment = 2;
748
749/* Linked list of csects in the data section. */
750static symbolS *ppc_data_csects;
751
752/* The current csect. */
753static symbolS *ppc_current_csect;
754
755/* The RS/6000 assembler uses a TOC which holds addresses of functions
756 and variables. Symbols are put in the TOC with the .tc pseudo-op.
757 A special relocation is used when accessing TOC entries. We handle
758 the TOC as a subsegment within the .data segment. We set it up if
759 we see a .toc pseudo-op, and save the csect symbol here. */
760static symbolS *ppc_toc_csect;
761
762/* The first frag in the TOC subsegment. */
763static fragS *ppc_toc_frag;
764
765/* The first frag in the first subsegment after the TOC in the .data
766 segment. NULL if there are no subsegments after the TOC. */
767static fragS *ppc_after_toc_frag;
768
769/* The current static block. */
770static symbolS *ppc_current_block;
771
772/* The COFF debugging section; set by md_begin. This is not the
773 .debug section, but is instead the secret BFD section which will
774 cause BFD to set the section number of a symbol to N_DEBUG. */
775static asection *ppc_coff_debug_section;
776
777#endif /* OBJ_XCOFF */
778
779#ifdef TE_PE
780
781/* Various sections that we need for PE coff support. */
782static segT ydata_section;
783static segT pdata_section;
784static segT reldata_section;
785static segT rdata_section;
786static segT tocdata_section;
787
81d4177b 788/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 789static segT ppc_previous_section;
790static segT ppc_current_section;
791
792#endif /* TE_PE */
793
794#ifdef OBJ_ELF
795symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 796#define PPC_APUINFO_ISEL 0x40
797#define PPC_APUINFO_PMR 0x41
798#define PPC_APUINFO_RFMCI 0x42
799#define PPC_APUINFO_CACHELCK 0x43
800#define PPC_APUINFO_SPE 0x100
801#define PPC_APUINFO_EFS 0x101
802#define PPC_APUINFO_BRLOCK 0x102
803
b34976b6
AM		 804/*
805 * We keep a list of APUinfo
6a0c61b7
EZ		 806 */
807unsigned long *ppc_apuinfo_list;
808unsigned int ppc_apuinfo_num;
809unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 810#endif /* OBJ_ELF */
811\f
812#ifdef OBJ_ELF
15c1449b 813const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 814#else
15c1449b 815const char *const md_shortopts = "um:";
252b5132 816#endif
15c1449b 817const struct option md_longopts[] = {
252b5132
RH		 818 {NULL, no_argument, NULL, 0}
819};
15c1449b 820const size_t md_longopts_size = sizeof (md_longopts);
252b5132 821
69c040df
AM		 822
823/* Handle -m options that set cpu type, and .machine arg. */
824
825static int
826parse_cpu (const char *arg)
827{
828 /* -mpwrx and -mpwr2 mean to assemble for the IBM POWER/2
829 (RIOS2). */
830 if (strcmp (arg, "pwrx") == 0 || strcmp (arg, "pwr2") == 0)
831 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32;
832 /* -mpwr means to assemble for the IBM POWER (RIOS1). */
833 else if (strcmp (arg, "pwr") == 0)
834 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
835 /* -m601 means to assemble for the PowerPC 601, which includes
836 instructions that are holdovers from the Power. */
837 else if (strcmp (arg, "601") == 0)
838 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
839 | PPC_OPCODE_601 | PPC_OPCODE_32);
840 /* -mppc, -mppc32, -m603, and -m604 mean to assemble for the
841 PowerPC 603/604. */
842 else if (strcmp (arg, "ppc") == 0
843 || strcmp (arg, "ppc32") == 0
844 || strcmp (arg, "603") == 0
845 || strcmp (arg, "604") == 0)
846 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
847 /* -m403 and -m405 mean to assemble for the PowerPC 403/405. */
848 else if (strcmp (arg, "403") == 0
849 || strcmp (arg, "405") == 0)
850 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
851 | PPC_OPCODE_403 | PPC_OPCODE_32);
852 else if (strcmp (arg, "440") == 0)
853 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32
854 | PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI);
855 else if (strcmp (arg, "7400") == 0
856 || strcmp (arg, "7410") == 0
857 || strcmp (arg, "7450") == 0
858 || strcmp (arg, "7455") == 0)
859 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
860 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_32);
861 else if (strcmp (arg, "altivec") == 0)
862 {
863 if (ppc_cpu == 0)
864 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ALTIVEC;
865 else
866 ppc_cpu |= PPC_OPCODE_ALTIVEC;
867 }
868 else if (strcmp (arg, "e500") == 0 || strcmp (arg, "e500x2") == 0)
869 {
870 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
871 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
872 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
873 | PPC_OPCODE_RFMCI);
874 }
875 else if (strcmp (arg, "spe") == 0)
876 {
877 if (ppc_cpu == 0)
878 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_SPE | PPC_OPCODE_EFS;
879 else
880 ppc_cpu |= PPC_OPCODE_SPE;
881 }
882 /* -mppc64 and -m620 mean to assemble for the 64-bit PowerPC
883 620. */
884 else if (strcmp (arg, "ppc64") == 0 || strcmp (arg, "620") == 0)
885 {
886 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
887 }
888 else if (strcmp (arg, "ppc64bridge") == 0)
889 {
890 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
891 | PPC_OPCODE_64_BRIDGE | PPC_OPCODE_64);
892 }
893 /* -mbooke/-mbooke32 mean enable 32-bit BookE support. */
894 else if (strcmp (arg, "booke") == 0 || strcmp (arg, "booke32") == 0)
895 {
896 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32;
897 }
898 /* -mbooke64 means enable 64-bit BookE support. */
899 else if (strcmp (arg, "booke64") == 0)
900 {
901 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE
902 | PPC_OPCODE_BOOKE64 | PPC_OPCODE_64);
903 }
904 else if (strcmp (arg, "power4") == 0)
905 {
906 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
907 | PPC_OPCODE_64 | PPC_OPCODE_POWER4);
908 }
909 /* -mcom means assemble for the common intersection between Power
910 and PowerPC. At present, we just allow the union, rather
911 than the intersection. */
912 else if (strcmp (arg, "com") == 0)
913 ppc_cpu = PPC_OPCODE_COMMON | PPC_OPCODE_32;
914 /* -many means to assemble for any architecture (PWR/PWRX/PPC). */
915 else if (strcmp (arg, "any") == 0)
916 ppc_cpu |= PPC_OPCODE_ANY;
917 else
918 return 0;
919
920 return 1;
921}
922
252b5132
RH		 923int
924md_parse_option (c, arg)
925 int c;
926 char *arg;
927{
928 switch (c)
929 {
930 case 'u':
931 /* -u means that any undefined symbols should be treated as
932 external, which is the default for gas anyhow. */
933 break;
934
935#ifdef OBJ_ELF
936 case 'l':
937 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 938 sake, recognize -be also. */
252b5132
RH		 939 if (strcmp (arg, "e") == 0)
940 {
941 target_big_endian = 0;
942 set_target_endian = 1;
943 }
944 else
945 return 0;
946
947 break;
948
949 case 'b':
950 if (strcmp (arg, "e") == 0)
951 {
952 target_big_endian = 1;
953 set_target_endian = 1;
954 }
955 else
956 return 0;
957
958 break;
959
960 case 'K':
99a814a1 961 /* Recognize -K PIC. */
252b5132
RH		 962 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
963 {
964 shlib = SHLIB_PIC;
965 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
966 }
967 else
968 return 0;
969
970 break;
971#endif
972
7f6d05e8
CP		 973 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
974 case 'a':
975 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 976 {
977#ifdef BFD64
978 ppc_obj64 = 1;
979#else
980 as_fatal (_("%s unsupported"), "-a64");
981#endif
982 }
7f6d05e8 983 else if (strcmp (arg, "32") == 0)
2b3c4602 984 ppc_obj64 = 0;
7f6d05e8
CP		 985 else
986 return 0;
987 break;
81d4177b 988
252b5132 989 case 'm':
69c040df
AM		 990 if (parse_cpu (arg))
991 ;
252b5132
RH		 992
993 else if (strcmp (arg, "regnames") == 0)
b34976b6 994 reg_names_p = TRUE;
252b5132
RH		 995
996 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 997 reg_names_p = FALSE;
252b5132
RH		 998
999#ifdef OBJ_ELF
99a814a1
AM		 1000 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1001 that require relocation. */
252b5132
RH		 1002 else if (strcmp (arg, "relocatable") == 0)
1003 {
5d6f4f16 1004 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1005 ppc_flags |= EF_PPC_RELOCATABLE;
1006 }
1007
1008 else if (strcmp (arg, "relocatable-lib") == 0)
1009 {
5d6f4f16 1010 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1011 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1012 }
1013
99a814a1 1014 /* -memb, set embedded bit. */
252b5132
RH		 1015 else if (strcmp (arg, "emb") == 0)
1016 ppc_flags |= EF_PPC_EMB;
1017
99a814a1
AM		 1018 /* -mlittle/-mbig set the endianess. */
1019 else if (strcmp (arg, "little") == 0
1020 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1021 {
1022 target_big_endian = 0;
1023 set_target_endian = 1;
1024 }
1025
1026 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1027 {
1028 target_big_endian = 1;
1029 set_target_endian = 1;
1030 }
1031
1032 else if (strcmp (arg, "solaris") == 0)
1033 {
b34976b6 1034 msolaris = TRUE;
252b5132
RH		 1035 ppc_comment_chars = ppc_solaris_comment_chars;
1036 }
1037
1038 else if (strcmp (arg, "no-solaris") == 0)
1039 {
b34976b6 1040 msolaris = FALSE;
252b5132
RH		 1041 ppc_comment_chars = ppc_eabi_comment_chars;
1042 }
1043#endif
1044 else
1045 {
1046 as_bad (_("invalid switch -m%s"), arg);
1047 return 0;
1048 }
1049 break;
1050
1051#ifdef OBJ_ELF
1052 /* -V: SVR4 argument to print version ID. */
1053 case 'V':
1054 print_version_id ();
1055 break;
1056
1057 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1058 should be emitted or not. FIXME: Not implemented. */
1059 case 'Q':
1060 break;
1061
1062 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1063 rather than .stabs.excl, which is ignored by the linker.
1064 FIXME: Not implemented. */
1065 case 's':
1066 if (arg)
1067 return 0;
1068
1069 break;
1070#endif
1071
1072 default:
1073 return 0;
1074 }
1075
1076 return 1;
1077}
1078
1079void
1080md_show_usage (stream)
1081 FILE *stream;
1082{
bc805888 1083 fprintf (stream, _("\
252b5132 1084PowerPC options:\n\
df12615d
AM		 1085-a32 generate ELF32/XCOFF32\n\
1086-a64 generate ELF64/XCOFF64\n\
252b5132 1087-u ignored\n\
23e1d84c
AM		 1088-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1089-mpwr generate code for POWER (RIOS1)\n\
1090-m601 generate code for PowerPC 601\n\
418c1742 1091-mppc, -mppc32, -m603, -m604\n\
23e1d84c 1092 generate code for PowerPC 603/604\n\
df12615d 1093-m403, -m405 generate code for PowerPC 403/405\n\
3d8aea2f 1094-m440 generate code for PowerPC 440\n\
f5c120c5 1095-m7400, -m7410, -m7450, -m7455\n\
df12615d
AM		 1096 generate code For PowerPC 7400/7410/7450/7455\n"));
1097 fprintf (stream, _("\
23e1d84c 1098-mppc64, -m620 generate code for PowerPC 620/625/630\n\
d0e9a01c 1099-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
a09cf9bd
MG		 1100-mbooke64 generate code for 64-bit PowerPC BookE\n\
1101-mbooke, mbooke32 generate code for 32-bit PowerPC BookE\n\
23e1d84c 1102-mpower4 generate code for Power4 architecture\n\
252b5132 1103-mcom generate code Power/PowerPC common instructions\n\
df12615d 1104-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1105 fprintf (stream, _("\
df12615d 1106-maltivec generate code for AltiVec\n\
6a0c61b7 1107-me500, -me500x2 generate code for Motorola e500 core complex\n\
df12615d
AM		 1108-mspe generate code for Motorola SPE instructions\n\
1109-mregnames Allow symbolic names for registers\n\
1110-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1111#ifdef OBJ_ELF
bc805888 1112 fprintf (stream, _("\
252b5132
RH		 1113-mrelocatable support for GCC's -mrelocatble option\n\
1114-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1115-memb set PPC_EMB bit in ELF flags\n\
df12615d 1116-mlittle, -mlittle-endian, -l, -le\n\
252b5132 1117 generate code for a little endian machine\n\
df12615d
AM		 1118-mbig, -mbig-endian, -b, -be\n\
1119 generate code for a big endian machine\n\
252b5132
RH		 1120-msolaris generate code for Solaris\n\
1121-mno-solaris do not generate code for Solaris\n\
1122-V print assembler version number\n\
1123-Qy, -Qn ignored\n"));
1124#endif
1125}
1126\f
1127/* Set ppc_cpu if it is not already set. */
1128
1129static void
1130ppc_set_cpu ()
1131{
1132 const char *default_os = TARGET_OS;
1133 const char *default_cpu = TARGET_CPU;
1134
3c9030c1 1135 if ((ppc_cpu & ~PPC_OPCODE_ANY) == 0)
252b5132 1136 {
2a98c3a6 1137 if (ppc_obj64)
3c9030c1 1138 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
2a98c3a6
AM		 1139 else if (strncmp (default_os, "aix", 3) == 0
1140 && default_os[3] >= '4' && default_os[3] <= '9')
3c9030c1 1141 ppc_cpu |= PPC_OPCODE_COMMON | PPC_OPCODE_32;
252b5132 1142 else if (strncmp (default_os, "aix3", 4) == 0)
3c9030c1 1143 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
252b5132 1144 else if (strcmp (default_cpu, "rs6000") == 0)
3c9030c1 1145 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
0baf16f2 1146 else if (strncmp (default_cpu, "powerpc", 7) == 0)
b34976b6
AM		 1147 {
1148 if (default_cpu[7] == '6' && default_cpu[8] == '4')
3c9030c1 1149 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
b34976b6 1150 else
3c9030c1 1151 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
b34976b6 1152 }
252b5132 1153 else
99a814a1
AM		 1154 as_fatal (_("Unknown default cpu = %s, os = %s"),
1155 default_cpu, default_os);
252b5132
RH		 1156 }
1157}
1158
1159/* Figure out the BFD architecture to use. */
1160
1161enum bfd_architecture
1162ppc_arch ()
1163{
1164 const char *default_cpu = TARGET_CPU;
1165 ppc_set_cpu ();
1166
1167 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1168 return bfd_arch_powerpc;
1169 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1170 return bfd_arch_rs6000;
1171 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1172 {
1173 if (strcmp (default_cpu, "rs6000") == 0)
1174 return bfd_arch_rs6000;
0baf16f2 1175 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1176 return bfd_arch_powerpc;
1177 }
1178
1179 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1180 return bfd_arch_unknown;
1181}
1182
7f6d05e8
CP		 1183unsigned long
1184ppc_mach ()
1185{
2a98c3a6
AM		 1186 if (ppc_obj64)
1187 return bfd_mach_ppc64;
1188 else if (ppc_arch () == bfd_arch_rs6000)
1189 return bfd_mach_rs6k;
1190 else
1191 return bfd_mach_ppc;
7f6d05e8
CP		 1192}
1193
81d4177b 1194extern char*
99a814a1 1195ppc_target_format ()
7f6d05e8
CP		 1196{
1197#ifdef OBJ_COFF
1198#ifdef TE_PE
99a814a1 1199 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1200#elif TE_POWERMAC
0baf16f2 1201 return "xcoff-powermac";
7f6d05e8 1202#else
eb1e0e80 1203# ifdef TE_AIX5
2b3c4602 1204 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1205# else
2b3c4602 1206 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1207# endif
7f6d05e8 1208#endif
7f6d05e8
CP		 1209#endif
1210#ifdef OBJ_ELF
0baf16f2 1211 return (target_big_endian
2b3c4602
AM		 1212 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1213 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
7f6d05e8
CP		 1214#endif
1215}
1216
69c040df
AM		 1217/* Insert opcodes and macros into hash tables. Called at startup and
1218 for .cpu pseudo. */
252b5132 1219
69c040df
AM		 1220static void
1221ppc_setup_opcodes (void)
252b5132
RH		 1222{
1223 register const struct powerpc_opcode *op;
1224 const struct powerpc_opcode *op_end;
1225 const struct powerpc_macro *macro;
1226 const struct powerpc_macro *macro_end;
b34976b6 1227 bfd_boolean dup_insn = FALSE;
252b5132 1228
69c040df
AM		 1229 if (ppc_hash != NULL)
1230 hash_die (ppc_hash);
1231 if (ppc_macro_hash != NULL)
1232 hash_die (ppc_macro_hash);
252b5132
RH		 1233
1234 /* Insert the opcodes into a hash table. */
1235 ppc_hash = hash_new ();
1236
1237 op_end = powerpc_opcodes + powerpc_num_opcodes;
1238 for (op = powerpc_opcodes; op < op_end; op++)
1239 {
1240 know ((op->opcode & op->mask) == op->opcode);
1241
2b3c4602 1242 if ((op->flags & ppc_cpu & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) != 0
252b5132 1243 && ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == 0
2b3c4602
AM		 1244 || ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64))
1245 == (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64)))
23e1d84c 1246 || (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0)
341026c1
NC		 1247 /* Certain instructions (eg: extsw) do not exist in the
1248 32-bit BookE instruction set, but they do exist in the
1249 64-bit BookE instruction set, and other PPC instruction
1250 sets. Check to see if the opcode has the BOOKE64 flag set.
1251 If it does make sure that the target CPU is not the BookE32. */
1252 && ((op->flags & PPC_OPCODE_BOOKE64) == 0
1253 || (ppc_cpu & PPC_OPCODE_BOOKE64) == PPC_OPCODE_BOOKE64
1254 || (ppc_cpu & PPC_OPCODE_BOOKE) == 0)
23e1d84c
AM		 1255 && ((op->flags & (PPC_OPCODE_POWER4 | PPC_OPCODE_NOPOWER4)) == 0
1256 || ((op->flags & PPC_OPCODE_POWER4)
1257 == (ppc_cpu & PPC_OPCODE_POWER4))))
252b5132
RH		 1258 {
1259 const char *retval;
1260
1261 retval = hash_insert (ppc_hash, op->name, (PTR) op);
69c040df 1262 if (retval != NULL)
252b5132 1263 {
99a814a1 1264 /* Ignore Power duplicates for -m601. */
252b5132
RH		 1265 if ((ppc_cpu & PPC_OPCODE_601) != 0
1266 && (op->flags & PPC_OPCODE_POWER) != 0)
1267 continue;
1268
99a814a1
AM		 1269 as_bad (_("Internal assembler error for instruction %s"),
1270 op->name);
b34976b6 1271 dup_insn = TRUE;
252b5132
RH		 1272 }
1273 }
1274 }
1275
3c9030c1
AM		 1276 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1277 for (op = powerpc_opcodes; op < op_end; op++)
1278 hash_insert (ppc_hash, op->name, (PTR) op);
1279
252b5132
RH		 1280 /* Insert the macros into a hash table. */
1281 ppc_macro_hash = hash_new ();
1282
1283 macro_end = powerpc_macros + powerpc_num_macros;
1284 for (macro = powerpc_macros; macro < macro_end; macro++)
1285 {
1286 if ((macro->flags & ppc_cpu) != 0)
1287 {
1288 const char *retval;
1289
1290 retval = hash_insert (ppc_macro_hash, macro->name, (PTR) macro);
1291 if (retval != (const char *) NULL)
1292 {
1293 as_bad (_("Internal assembler error for macro %s"), macro->name);
b34976b6 1294 dup_insn = TRUE;
252b5132
RH		 1295 }
1296 }
1297 }
1298
1299 if (dup_insn)
1300 abort ();
69c040df
AM		 1301}
1302
1303/* This function is called when the assembler starts up. It is called
1304 after the options have been parsed and the output file has been
1305 opened. */
1306
1307void
1308md_begin ()
1309{
1310 ppc_set_cpu ();
1311
1312 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1313
1314#ifdef OBJ_ELF
1315 /* Set the ELF flags if desired. */
1316 if (ppc_flags && !msolaris)
1317 bfd_set_private_flags (stdoutput, ppc_flags);
1318#endif
1319
1320 ppc_setup_opcodes ();
252b5132 1321
67c1ffbe 1322 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1323 by the user. */
252b5132
RH		 1324 if (!set_target_endian)
1325 {
1326 set_target_endian = 1;
1327 target_big_endian = PPC_BIG_ENDIAN;
1328 }
1329
1330#ifdef OBJ_XCOFF
1331 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1332
1333 /* Create dummy symbols to serve as initial csects. This forces the
1334 text csects to precede the data csects. These symbols will not
1335 be output. */
1336 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1337 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1338 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1339 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1340#endif
1341
1342#ifdef TE_PE
1343
1344 ppc_current_section = text_section;
81d4177b 1345 ppc_previous_section = 0;
252b5132
RH		 1346
1347#endif
1348}
1349
6a0c61b7
EZ		 1350void
1351ppc_cleanup ()
1352{
dc1d03fc 1353#ifdef OBJ_ELF
6a0c61b7
EZ		 1354 if (ppc_apuinfo_list == NULL)
1355 return;
1356
1357 /* Ok, so write the section info out. We have this layout:
1358
1359 byte data what
1360 ---- ---- ----
1361 0 8 length of "APUinfo\0"
1362 4 (n*4) number of APU's (4 bytes each)
1363 8 2 note type 2
1364 12 "APUinfo\0" name
1365 20 APU#1 first APU's info
1366 24 APU#2 second APU's info
1367 ... ...
1368 */
1369 {
1370 char *p;
1371 asection *seg = now_seg;
1372 subsegT subseg = now_subseg;
1373 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1374 unsigned int i;
6a0c61b7
EZ		 1375
1376 /* Create the .PPC.EMB.apuinfo section. */
1377 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1378 bfd_set_section_flags (stdoutput,
1379 apuinfo_secp,
e1a9cb8e 1380 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1381
1382 p = frag_more (4);
1383 md_number_to_chars (p, (valueT) 8, 4);
1384
1385 p = frag_more (4);
e98d298c 1386 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1387
1388 p = frag_more (4);
1389 md_number_to_chars (p, (valueT) 2, 4);
1390
1391 p = frag_more (8);
1392 strcpy (p, "APUinfo");
1393
1394 for (i = 0; i < ppc_apuinfo_num; i++)
1395 {
b34976b6
AM		 1396 p = frag_more (4);
1397 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1398 }
1399
1400 frag_align (2, 0, 0);
1401
1402 /* We probably can't restore the current segment, for there likely
1403 isn't one yet... */
1404 if (seg && subseg)
1405 subseg_set (seg, subseg);
1406 }
dc1d03fc 1407#endif
6a0c61b7
EZ		 1408}
1409
252b5132
RH		 1410/* Insert an operand value into an instruction. */
1411
1412static unsigned long
1413ppc_insert_operand (insn, operand, val, file, line)
1414 unsigned long insn;
1415 const struct powerpc_operand *operand;
1416 offsetT val;
1417 char *file;
1418 unsigned int line;
1419{
1420 if (operand->bits != 32)
1421 {
1422 long min, max;
1423 offsetT test;
1424
1425 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
1426 {
d0e9a01c 1427 if ((operand->flags & PPC_OPERAND_SIGNOPT) != 0)
252b5132
RH		 1428 max = (1 << operand->bits) - 1;
1429 else
1430 max = (1 << (operand->bits - 1)) - 1;
1431 min = - (1 << (operand->bits - 1));
1432
2b3c4602 1433 if (!ppc_obj64)
252b5132
RH		 1434 {
1435 /* Some people write 32 bit hex constants with the sign
1436 extension done by hand. This shouldn't really be
1437 valid, but, to permit this code to assemble on a 64
1438 bit host, we sign extend the 32 bit value. */
1439 if (val > 0
92161534
ILT		 1440 && (val & (offsetT) 0x80000000) != 0
1441 && (val & (offsetT) 0xffffffff) == val)
252b5132
RH		 1442 {
1443 val -= 0x80000000;
1444 val -= 0x80000000;
1445 }
1446 }
1447 }
1448 else
1449 {
1450 max = (1 << operand->bits) - 1;
1451 min = 0;
1452 }
1453
1454 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
1455 test = - val;
1456 else
1457 test = val;
1458
1459 if (test < (offsetT) min || test > (offsetT) max)
e5976317 1460 as_bad_value_out_of_range (_("operand"), test, (offsetT) min, (offsetT) max, file, line);
252b5132
RH		 1461 }
1462
1463 if (operand->insert)
1464 {
1465 const char *errmsg;
1466
1467 errmsg = NULL;
2b3c4602 1468 insn = (*operand->insert) (insn, (long) val, ppc_cpu, &errmsg);
252b5132 1469 if (errmsg != (const char *) NULL)
0baf16f2 1470 as_bad_where (file, line, errmsg);
252b5132
RH		 1471 }
1472 else
1473 insn |= (((long) val & ((1 << operand->bits) - 1))
1474 << operand->shift);
1475
1476 return insn;
1477}
1478
1479\f
1480#ifdef OBJ_ELF
1481/* Parse @got, etc. and return the desired relocation. */
1482static bfd_reloc_code_real_type
1483ppc_elf_suffix (str_p, exp_p)
1484 char **str_p;
1485 expressionS *exp_p;
1486{
1487 struct map_bfd {
1488 char *string;
b7d7dc63
AM		 1489 unsigned int length : 8;
1490 unsigned int valid32 : 1;
1491 unsigned int valid64 : 1;
1492 unsigned int reloc;
252b5132
RH		 1493 };
1494
1495 char ident[20];
1496 char *str = *str_p;
1497 char *str2;
1498 int ch;
1499 int len;
15c1449b 1500 const struct map_bfd *ptr;
252b5132 1501
b7d7dc63
AM		 1502#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1503#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1504#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1505
15c1449b 1506 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1507 MAP ("l", BFD_RELOC_LO16),
1508 MAP ("h", BFD_RELOC_HI16),
1509 MAP ("ha", BFD_RELOC_HI16_S),
1510 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1511 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1512 MAP ("got", BFD_RELOC_16_GOTOFF),
1513 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1514 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1515 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1516 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1517 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1518 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1519 MAP ("copy", BFD_RELOC_PPC_COPY),
1520 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1521 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1522 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1523 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1524 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1525 MAP ("tls", BFD_RELOC_PPC_TLS),
1526 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1527 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1528 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1529 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1530 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1531 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1532 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1533 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1534 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1535 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1536 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1537 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1538 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1539 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1540 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1541 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1542 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1543 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1544 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1545 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1546 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1547 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1548 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1549 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1550 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1551 MAP32 ("fixup", BFD_RELOC_CTOR),
1552 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1553 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1554 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1555 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1556 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1557 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1558 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1559 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1560 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1561 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1562 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1563 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1564 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1565 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1566 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1567 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1568 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1569 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1570 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1571 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1572 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1573 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1574 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1575 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1576 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1577 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1578 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1579 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1580 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1581 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1582 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1583 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1584 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1585 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1586 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1587 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1588 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1589 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1590 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1591 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1592 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
252b5132
RH		 1593 };
1594
1595 if (*str++ != '@')
1596 return BFD_RELOC_UNUSED;
1597
1598 for (ch = *str, str2 = ident;
1599 (str2 < ident + sizeof (ident) - 1
3882b010 1600 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1601 ch = *++str)
1602 {
3882b010 1603 *str2++ = TOLOWER (ch);
252b5132
RH		 1604 }
1605
1606 *str2 = '\0';
1607 len = str2 - ident;
1608
1609 ch = ident[0];
1610 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1611 if (ch == ptr->string[0]
1612 && len == ptr->length
b7d7dc63
AM		 1613 && memcmp (ident, ptr->string, ptr->length) == 0
1614 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 1615 {
15c1449b
AM		 1616 int reloc = ptr->reloc;
1617
cdba85ec 1618 if (!ppc_obj64)
5f6db75a
AM		 1619 if (exp_p->X_add_number != 0
1620 && (reloc == (int) BFD_RELOC_16_GOTOFF
1621 || reloc == (int) BFD_RELOC_LO16_GOTOFF
1622 || reloc == (int) BFD_RELOC_HI16_GOTOFF
1623 || reloc == (int) BFD_RELOC_HI16_S_GOTOFF))
1624 as_warn (_("identifier+constant@got means identifier@got+constant"));
1625
1626 /* Now check for identifier@suffix+constant. */
1627 if (*str == '-' || *str == '+')
252b5132 1628 {
5f6db75a
AM		 1629 char *orig_line = input_line_pointer;
1630 expressionS new_exp;
1631
1632 input_line_pointer = str;
1633 expression (&new_exp);
1634 if (new_exp.X_op == O_constant)
252b5132 1635 {
5f6db75a
AM		 1636 exp_p->X_add_number += new_exp.X_add_number;
1637 str = input_line_pointer;
252b5132 1638 }
5f6db75a
AM		 1639
1640 if (&input_line_pointer != str_p)
1641 input_line_pointer = orig_line;
252b5132 1642 }
252b5132 1643 *str_p = str;
0baf16f2 1644
2b3c4602 1645 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 1646 && exp_p->X_op == O_symbol
1647 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 1648 {
9f2b53d7
AM		 1649 /* Change the symbol so that the dummy .TOC. symbol can be
1650 omitted from the object file. */
0baf16f2
AM		 1651 exp_p->X_add_symbol = &abs_symbol;
1652 }
1653
15c1449b 1654 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 1655 }
1656
1657 return BFD_RELOC_UNUSED;
1658}
1659
99a814a1
AM		 1660/* Like normal .long/.short/.word, except support @got, etc.
1661 Clobbers input_line_pointer, checks end-of-line. */
252b5132
RH		 1662static void
1663ppc_elf_cons (nbytes)
0baf16f2 1664 register int nbytes; /* 1=.byte, 2=.word, 4=.long, 8=.llong. */
252b5132
RH		 1665{
1666 expressionS exp;
1667 bfd_reloc_code_real_type reloc;
1668
1669 if (is_it_end_of_statement ())
1670 {
1671 demand_empty_rest_of_line ();
1672 return;
1673 }
1674
1675 do
1676 {
1677 expression (&exp);
1678 if (exp.X_op == O_symbol
1679 && *input_line_pointer == '@'
99a814a1
AM		 1680 && (reloc = ppc_elf_suffix (&input_line_pointer,
1681 &exp)) != BFD_RELOC_UNUSED)
252b5132 1682 {
99a814a1
AM		 1683 reloc_howto_type *reloc_howto;
1684 int size;
1685
1686 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1687 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH		 1688
1689 if (size > nbytes)
0baf16f2
AM		 1690 {
1691 as_bad (_("%s relocations do not fit in %d bytes\n"),
1692 reloc_howto->name, nbytes);
1693 }
252b5132
RH		 1694 else
1695 {
0baf16f2
AM		 1696 char *p;
1697 int offset;
252b5132 1698
0baf16f2
AM		 1699 p = frag_more (nbytes);
1700 offset = 0;
1701 if (target_big_endian)
1702 offset = nbytes - size;
99a814a1
AM		 1703 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1704 &exp, 0, reloc);
252b5132
RH		 1705 }
1706 }
1707 else
1708 emit_expr (&exp, (unsigned int) nbytes);
1709 }
1710 while (*input_line_pointer++ == ',');
1711
99a814a1
AM		 1712 /* Put terminator back into stream. */
1713 input_line_pointer--;
252b5132
RH		 1714 demand_empty_rest_of_line ();
1715}
1716
1717/* Solaris pseduo op to change to the .rodata section. */
1718static void
1719ppc_elf_rdata (xxx)
1720 int xxx;
1721{
1722 char *save_line = input_line_pointer;
1723 static char section[] = ".rodata\n";
1724
99a814a1 1725 /* Just pretend this is .section .rodata */
252b5132
RH		 1726 input_line_pointer = section;
1727 obj_elf_section (xxx);
1728
1729 input_line_pointer = save_line;
1730}
1731
99a814a1 1732/* Pseudo op to make file scope bss items. */
252b5132 1733static void
99a814a1 1734ppc_elf_lcomm (xxx)
92161534 1735 int xxx ATTRIBUTE_UNUSED;
252b5132
RH		 1736{
1737 register char *name;
1738 register char c;
1739 register char *p;
1740 offsetT size;
1741 register symbolS *symbolP;
1742 offsetT align;
1743 segT old_sec;
1744 int old_subsec;
1745 char *pfrag;
1746 int align2;
1747
1748 name = input_line_pointer;
1749 c = get_symbol_end ();
1750
99a814a1 1751 /* just after name is now '\0'. */
252b5132
RH		 1752 p = input_line_pointer;
1753 *p = c;
1754 SKIP_WHITESPACE ();
1755 if (*input_line_pointer != ',')
1756 {
1757 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
1758 ignore_rest_of_line ();
1759 return;
1760 }
1761
1762 input_line_pointer++; /* skip ',' */
1763 if ((size = get_absolute_expression ()) < 0)
1764 {
1765 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
1766 ignore_rest_of_line ();
1767 return;
1768 }
1769
1770 /* The third argument to .lcomm is the alignment. */
1771 if (*input_line_pointer != ',')
1772 align = 8;
1773 else
1774 {
1775 ++input_line_pointer;
1776 align = get_absolute_expression ();
1777 if (align <= 0)
1778 {
1779 as_warn (_("ignoring bad alignment"));
1780 align = 8;
1781 }
1782 }
1783
1784 *p = 0;
1785 symbolP = symbol_find_or_make (name);
1786 *p = c;
1787
1788 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
1789 {
1790 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
1791 S_GET_NAME (symbolP));
1792 ignore_rest_of_line ();
1793 return;
1794 }
1795
1796 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
1797 {
1798 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
1799 S_GET_NAME (symbolP),
1800 (long) S_GET_VALUE (symbolP),
1801 (long) size);
1802
1803 ignore_rest_of_line ();
1804 return;
1805 }
1806
99a814a1 1807 /* Allocate_bss. */
252b5132
RH		 1808 old_sec = now_seg;
1809 old_subsec = now_subseg;
1810 if (align)
1811 {
99a814a1 1812 /* Convert to a power of 2 alignment. */
252b5132
RH		 1813 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
1814 if (align != 1)
1815 {
1816 as_bad (_("Common alignment not a power of 2"));
1817 ignore_rest_of_line ();
1818 return;
1819 }
1820 }
1821 else
1822 align2 = 0;
1823
1824 record_alignment (bss_section, align2);
1825 subseg_set (bss_section, 0);
1826 if (align2)
1827 frag_align (align2, 0, 0);
1828 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 1829 symbol_get_frag (symbolP)->fr_symbol = 0;
1830 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 1831 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
1832 (char *) 0);
1833 *pfrag = 0;
1834 S_SET_SIZE (symbolP, size);
1835 S_SET_SEGMENT (symbolP, bss_section);
1836 subseg_set (old_sec, old_subsec);
1837 demand_empty_rest_of_line ();
1838}
1839
1840/* Validate any relocations emitted for -mrelocatable, possibly adding
1841 fixups for word relocations in writable segments, so we can adjust
1842 them at runtime. */
1843static void
1844ppc_elf_validate_fix (fixp, seg)
1845 fixS *fixp;
1846 segT seg;
1847{
1848 if (fixp->fx_done || fixp->fx_pcrel)
1849 return;
1850
1851 switch (shlib)
1852 {
1853 case SHLIB_NONE:
1854 case SHLIB_PIC:
1855 return;
1856
5d6f4f16 1857 case SHLIB_MRELOCATABLE:
252b5132
RH		 1858 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
1859 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
1860 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
1861 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
1862 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 1863 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 1864 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
1865 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
1866 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 1867 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 1868 && strcmp (segment_name (seg), ".got2") != 0
1869 && strcmp (segment_name (seg), ".dtors") != 0
1870 && strcmp (segment_name (seg), ".ctors") != 0
1871 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 1872 && strcmp (segment_name (seg), ".gcc_except_table") != 0
1873 && strcmp (segment_name (seg), ".eh_frame") != 0
1874 && strcmp (segment_name (seg), ".ex_shared") != 0)
1875 {
1876 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
1877 || fixp->fx_r_type != BFD_RELOC_CTOR)
1878 {
1879 as_bad_where (fixp->fx_file, fixp->fx_line,
1880 _("Relocation cannot be done when using -mrelocatable"));
1881 }
1882 }
1883 return;
1884 }
1885}
0baf16f2 1886
7e8d4ab4
AM		 1887/* Prevent elf_frob_file_before_adjust removing a weak undefined
1888 function descriptor sym if the corresponding code sym is used. */
1889
1890void
1891ppc_frob_file_before_adjust ()
0baf16f2 1892{
7e8d4ab4 1893 symbolS *symp;
0baf16f2 1894
7e8d4ab4
AM		 1895 if (!ppc_obj64)
1896 return;
1897
1898 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 1899 {
7e8d4ab4
AM		 1900 const char *name;
1901 char *dotname;
1902 symbolS *dotsym;
1903 size_t len;
1904
1905 name = S_GET_NAME (symp);
1906 if (name[0] == '.')
1907 continue;
1908
1909 if (! S_IS_WEAK (symp)
1910 || S_IS_DEFINED (symp))
1911 continue;
1912
1913 len = strlen (name) + 1;
1914 dotname = xmalloc (len + 1);
1915 dotname[0] = '.';
1916 memcpy (dotname + 1, name, len);
1917 dotsym = symbol_find (dotname);
1918 free (dotname);
1919 if (dotsym != NULL && (symbol_used_p (dotsym)
1920 || symbol_used_in_reloc_p (dotsym)))
1921 {
1922 symbol_mark_used (symp);
1923 }
0baf16f2
AM		 1924 }
1925
7e8d4ab4
AM		 1926 /* Don't emit .TOC. symbol. */
1927 symp = symbol_find (".TOC.");
1928 if (symp != NULL)
1929 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
0baf16f2 1930}
252b5132
RH		 1931#endif /* OBJ_ELF */
1932\f
1933#ifdef TE_PE
1934
1935/*
99a814a1 1936 * Summary of parse_toc_entry.
252b5132
RH		 1937 *
1938 * in: Input_line_pointer points to the '[' in one of:
1939 *
1940 * [toc] [tocv] [toc32] [toc64]
1941 *
1942 * Anything else is an error of one kind or another.
1943 *
81d4177b 1944 * out:
252b5132
RH		 1945 * return value: success or failure
1946 * toc_kind: kind of toc reference
1947 * input_line_pointer:
1948 * success: first char after the ']'
1949 * failure: unchanged
1950 *
1951 * settings:
1952 *
1953 * [toc] - rv == success, toc_kind = default_toc
1954 * [tocv] - rv == success, toc_kind = data_in_toc
1955 * [toc32] - rv == success, toc_kind = must_be_32
1956 * [toc64] - rv == success, toc_kind = must_be_64
1957 *
1958 */
1959
81d4177b
KH		 1960enum toc_size_qualifier
1961{
252b5132
RH		 1962 default_toc, /* The toc cell constructed should be the system default size */
1963 data_in_toc, /* This is a direct reference to a toc cell */
1964 must_be_32, /* The toc cell constructed must be 32 bits wide */
1965 must_be_64 /* The toc cell constructed must be 64 bits wide */
1966};
1967
1968static int
99a814a1 1969parse_toc_entry (toc_kind)
252b5132
RH		 1970 enum toc_size_qualifier *toc_kind;
1971{
1972 char *start;
1973 char *toc_spec;
1974 char c;
1975 enum toc_size_qualifier t;
1976
99a814a1 1977 /* Save the input_line_pointer. */
252b5132
RH		 1978 start = input_line_pointer;
1979
99a814a1 1980 /* Skip over the '[' , and whitespace. */
252b5132
RH		 1981 ++input_line_pointer;
1982 SKIP_WHITESPACE ();
81d4177b 1983
99a814a1 1984 /* Find the spelling of the operand. */
252b5132
RH		 1985 toc_spec = input_line_pointer;
1986 c = get_symbol_end ();
1987
99a814a1 1988 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 1989 {
1990 t = default_toc;
1991 }
99a814a1 1992 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 1993 {
1994 t = data_in_toc;
1995 }
99a814a1 1996 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 1997 {
1998 t = must_be_32;
1999 }
99a814a1 2000 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2001 {
2002 t = must_be_64;
2003 }
2004 else
2005 {
2006 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2007 *input_line_pointer = c;
2008 input_line_pointer = start;
252b5132
RH		 2009 return 0;
2010 }
2011
99a814a1
AM		 2012 /* Now find the ']'. */
2013 *input_line_pointer = c;
252b5132 2014
81d4177b
KH		 2015 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2016 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2017
2018 if (c != ']')
2019 {
2020 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2021 input_line_pointer = start;
252b5132
RH		 2022 return 0;
2023 }
2024
99a814a1 2025 *toc_kind = t;
252b5132
RH		 2026 return 1;
2027}
2028#endif
2029\f
2030
dc1d03fc 2031#ifdef OBJ_ELF
6a0c61b7
EZ		 2032#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2033static void
dc1d03fc 2034ppc_apuinfo_section_add (apu, version)
6a0c61b7
EZ		 2035 unsigned int apu, version;
2036{
2037 unsigned int i;
2038
2039 /* Check we don't already exist. */
2040 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2041 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2042 return;
b34976b6 2043
6a0c61b7
EZ		 2044 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2045 {
2046 if (ppc_apuinfo_num_alloc == 0)
2047 {
2048 ppc_apuinfo_num_alloc = 4;
2049 ppc_apuinfo_list = (unsigned long *)
2050 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2051 }
2052 else
2053 {
2054 ppc_apuinfo_num_alloc += 4;
2055 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2056 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2057 }
2058 }
dc1d03fc 2059 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2060}
2061#undef APUID
dc1d03fc 2062#endif
6a0c61b7
EZ		 2063\f
2064
252b5132
RH		 2065/* We need to keep a list of fixups. We can't simply generate them as
2066 we go, because that would require us to first create the frag, and
2067 that would screw up references to ``.''. */
2068
2069struct ppc_fixup
2070{
2071 expressionS exp;
2072 int opindex;
2073 bfd_reloc_code_real_type reloc;
2074};
2075
2076#define MAX_INSN_FIXUPS (5)
2077
2078/* This routine is called for each instruction to be assembled. */
2079
2080void
2081md_assemble (str)
2082 char *str;
2083{
2084 char *s;
2085 const struct powerpc_opcode *opcode;
2086 unsigned long insn;
2087 const unsigned char *opindex_ptr;
2088 int skip_optional;
2089 int need_paren;
2090 int next_opindex;
2091 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2092 int fc;
2093 char *f;
09b935ac 2094 int addr_mod;
252b5132
RH		 2095 int i;
2096#ifdef OBJ_ELF
2097 bfd_reloc_code_real_type reloc;
2098#endif
2099
2100 /* Get the opcode. */
3882b010 2101 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2102 ;
2103 if (*s != '\0')
2104 *s++ = '\0';
2105
2106 /* Look up the opcode in the hash table. */
2107 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2108 if (opcode == (const struct powerpc_opcode *) NULL)
2109 {
2110 const struct powerpc_macro *macro;
2111
2112 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2113 if (macro == (const struct powerpc_macro *) NULL)
2114 as_bad (_("Unrecognized opcode: `%s'"), str);
2115 else
2116 ppc_macro (s, macro);
2117
2118 return;
2119 }
2120
2121 insn = opcode->opcode;
2122
2123 str = s;
3882b010 2124 while (ISSPACE (*str))
252b5132
RH		 2125 ++str;
2126
2127 /* PowerPC operands are just expressions. The only real issue is
2128 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2129 an optional operand separate the operands only with commas (in some
2130 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2131 have optional operands). Most instructions with optional operands
2132 have only one. Those that have more than one optional operand can
2133 take either all their operands or none. So, before we start seriously
2134 parsing the operands, we check to see if we have optional operands,
2135 and if we do, we count the number of commas to see which operands
2136 have been omitted. */
252b5132
RH		 2137 skip_optional = 0;
2138 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2139 {
2140 const struct powerpc_operand *operand;
2141
2142 operand = &powerpc_operands[*opindex_ptr];
2143 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2144 {
2145 unsigned int opcount;
7fe9cf6b
NC		 2146 unsigned int num_operands_expected;
2147 unsigned int i;
252b5132
RH		 2148
2149 /* There is an optional operand. Count the number of
2150 commas in the input line. */
2151 if (*str == '\0')
2152 opcount = 0;
2153 else
2154 {
2155 opcount = 1;
2156 s = str;
2157 while ((s = strchr (s, ',')) != (char *) NULL)
2158 {
2159 ++opcount;
2160 ++s;
2161 }
2162 }
2163
7fe9cf6b
NC		 2164 /* Compute the number of expected operands.
2165 Do not count fake operands. */
2166 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2167 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2168 ++ num_operands_expected;
2169
252b5132
RH		 2170 /* If there are fewer operands in the line then are called
2171 for by the instruction, we want to skip the optional
1f6c9eb0 2172 operands. */
7fe9cf6b 2173 if (opcount < num_operands_expected)
252b5132
RH		 2174 skip_optional = 1;
2175
2176 break;
2177 }
2178 }
2179
2180 /* Gather the operands. */
2181 need_paren = 0;
2182 next_opindex = 0;
2183 fc = 0;
2184 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2185 {
2186 const struct powerpc_operand *operand;
2187 const char *errmsg;
2188 char *hold;
2189 expressionS ex;
2190 char endc;
2191
2192 if (next_opindex == 0)
2193 operand = &powerpc_operands[*opindex_ptr];
2194 else
2195 {
2196 operand = &powerpc_operands[next_opindex];
2197 next_opindex = 0;
2198 }
252b5132
RH		 2199 errmsg = NULL;
2200
2201 /* If this is a fake operand, then we do not expect anything
2202 from the input. */
2203 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2204 {
2b3c4602 2205 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2206 if (errmsg != (const char *) NULL)
2207 as_bad (errmsg);
2208 continue;
2209 }
2210
2211 /* If this is an optional operand, and we are skipping it, just
2212 insert a zero. */
2213 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2214 && skip_optional)
2215 {
2216 if (operand->insert)
2217 {
2b3c4602 2218 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2219 if (errmsg != (const char *) NULL)
2220 as_bad (errmsg);
2221 }
2222 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2223 next_opindex = *opindex_ptr + 1;
2224 continue;
2225 }
2226
2227 /* Gather the operand. */
2228 hold = input_line_pointer;
2229 input_line_pointer = str;
2230
2231#ifdef TE_PE
81d4177b 2232 if (*input_line_pointer == '[')
252b5132
RH		 2233 {
2234 /* We are expecting something like the second argument here:
99a814a1
AM		 2235 *
2236 * lwz r4,[toc].GS.0.static_int(rtoc)
2237 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2238 * The argument following the `]' must be a symbol name, and the
2239 * register must be the toc register: 'rtoc' or '2'
2240 *
2241 * The effect is to 0 as the displacement field
2242 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2243 * the appropriate variation) reloc against it based on the symbol.
2244 * The linker will build the toc, and insert the resolved toc offset.
2245 *
2246 * Note:
2247 * o The size of the toc entry is currently assumed to be
2248 * 32 bits. This should not be assumed to be a hard coded
2249 * number.
2250 * o In an effort to cope with a change from 32 to 64 bits,
2251 * there are also toc entries that are specified to be
2252 * either 32 or 64 bits:
2253 * lwz r4,[toc32].GS.0.static_int(rtoc)
2254 * lwz r4,[toc64].GS.0.static_int(rtoc)
2255 * These demand toc entries of the specified size, and the
2256 * instruction probably requires it.
2257 */
252b5132
RH		 2258
2259 int valid_toc;
2260 enum toc_size_qualifier toc_kind;
2261 bfd_reloc_code_real_type toc_reloc;
2262
99a814a1
AM		 2263 /* Go parse off the [tocXX] part. */
2264 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2265
81d4177b 2266 if (!valid_toc)
252b5132 2267 {
99a814a1
AM		 2268 /* Note: message has already been issued.
2269 FIXME: what sort of recovery should we do?
2270 demand_rest_of_line (); return; ? */
252b5132
RH		 2271 }
2272
99a814a1
AM		 2273 /* Now get the symbol following the ']'. */
2274 expression (&ex);
252b5132
RH		 2275
2276 switch (toc_kind)
2277 {
2278 case default_toc:
99a814a1
AM		 2279 /* In this case, we may not have seen the symbol yet,
2280 since it is allowed to appear on a .extern or .globl
2281 or just be a label in the .data section. */
252b5132
RH		 2282 toc_reloc = BFD_RELOC_PPC_TOC16;
2283 break;
2284 case data_in_toc:
99a814a1
AM		 2285 /* 1. The symbol must be defined and either in the toc
2286 section, or a global.
2287 2. The reloc generated must have the TOCDEFN flag set
2288 in upper bit mess of the reloc type.
2289 FIXME: It's a little confusing what the tocv
2290 qualifier can be used for. At the very least, I've
2291 seen three uses, only one of which I'm sure I can
2292 explain. */
81d4177b
KH		 2293 if (ex.X_op == O_symbol)
2294 {
252b5132 2295 assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2296 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2297 != tocdata_section)
252b5132 2298 {
99a814a1 2299 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2300 }
2301 }
2302
2303 toc_reloc = BFD_RELOC_PPC_TOC16;
2304 break;
2305 case must_be_32:
99a814a1
AM		 2306 /* FIXME: these next two specifically specify 32/64 bit
2307 toc entries. We don't support them today. Is this
2308 the right way to say that? */
252b5132
RH		 2309 toc_reloc = BFD_RELOC_UNUSED;
2310 as_bad (_("Unimplemented toc32 expression modifier"));
2311 break;
2312 case must_be_64:
99a814a1 2313 /* FIXME: see above. */
252b5132
RH		 2314 toc_reloc = BFD_RELOC_UNUSED;
2315 as_bad (_("Unimplemented toc64 expression modifier"));
2316 break;
2317 default:
bc805888 2318 fprintf (stderr,
99a814a1
AM		 2319 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2320 toc_kind);
bc805888 2321 abort ();
252b5132
RH		 2322 break;
2323 }
2324
2325 /* We need to generate a fixup for this expression. */
2326 if (fc >= MAX_INSN_FIXUPS)
2327 as_fatal (_("too many fixups"));
2328
2329 fixups[fc].reloc = toc_reloc;
2330 fixups[fc].exp = ex;
2331 fixups[fc].opindex = *opindex_ptr;
2332 ++fc;
2333
99a814a1
AM		 2334 /* Ok. We've set up the fixup for the instruction. Now make it
2335 look like the constant 0 was found here. */
252b5132
RH		 2336 ex.X_unsigned = 1;
2337 ex.X_op = O_constant;
2338 ex.X_add_number = 0;
2339 ex.X_add_symbol = NULL;
2340 ex.X_op_symbol = NULL;
2341 }
2342
2343 else
2344#endif /* TE_PE */
2345 {
2346 if (! register_name (&ex))
2347 {
2348 if ((operand->flags & PPC_OPERAND_CR) != 0)
b34976b6 2349 cr_operand = TRUE;
252b5132 2350 expression (&ex);
b34976b6 2351 cr_operand = FALSE;
252b5132
RH		 2352 }
2353 }
2354
2355 str = input_line_pointer;
2356 input_line_pointer = hold;
2357
2358 if (ex.X_op == O_illegal)
2359 as_bad (_("illegal operand"));
2360 else if (ex.X_op == O_absent)
2361 as_bad (_("missing operand"));
2362 else if (ex.X_op == O_register)
2363 {
2364 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2365 (char *) NULL, 0);
2366 }
2367 else if (ex.X_op == O_constant)
2368 {
2369#ifdef OBJ_ELF
81d4177b 2370 /* Allow @HA, @L, @H on constants. */
252b5132
RH		 2371 char *orig_str = str;
2372
2373 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2374 switch (reloc)
2375 {
2376 default:
2377 str = orig_str;
2378 break;
2379
2380 case BFD_RELOC_LO16:
2381 /* X_unsigned is the default, so if the user has done
0baf16f2
AM		 2382 something which cleared it, we always produce a
2383 signed value. */
2384 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH		 2385 ex.X_add_number &= 0xffff;
2386 else
0baf16f2 2387 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2388 break;
2389
2390 case BFD_RELOC_HI16:
0baf16f2
AM		 2391 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2392 ex.X_add_number = PPC_HI (ex.X_add_number);
2393 else
2394 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH		 2395 break;
2396
2397 case BFD_RELOC_HI16_S:
0baf16f2
AM		 2398 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2399 ex.X_add_number = PPC_HA (ex.X_add_number);
2400 else
2401 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2402 break;
2403
0baf16f2
AM		 2404 case BFD_RELOC_PPC64_HIGHER:
2405 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2406 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2407 else
2408 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2409 break;
2410
2411 case BFD_RELOC_PPC64_HIGHER_S:
2412 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2413 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2414 else
2415 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2416 break;
0baf16f2
AM		 2417
2418 case BFD_RELOC_PPC64_HIGHEST:
2419 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2420 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2421 else
2422 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2423 break;
2424
2425 case BFD_RELOC_PPC64_HIGHEST_S:
2426 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2427 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2428 else
2429 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2430 break;
252b5132 2431 }
0baf16f2 2432#endif /* OBJ_ELF */
252b5132
RH		 2433 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2434 (char *) NULL, 0);
2435 }
2436#ifdef OBJ_ELF
2437 else if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2438 {
cdba85ec
AM		 2439 /* Some TLS tweaks. */
2440 switch (reloc)
2441 {
2442 default:
2443 break;
2444 case BFD_RELOC_PPC_TLS:
2445 insn = ppc_insert_operand (insn, operand, ppc_obj64 ? 13 : 2,
2446 (char *) NULL, 0);
2447 break;
2448 /* We'll only use the 32 (or 64) bit form of these relocations
2449 in constants. Instructions get the 16 bit form. */
2450 case BFD_RELOC_PPC_DTPREL:
2451 reloc = BFD_RELOC_PPC_DTPREL16;
2452 break;
2453 case BFD_RELOC_PPC_TPREL:
2454 reloc = BFD_RELOC_PPC_TPREL16;
2455 break;
2456 }
2457
99a814a1
AM		 2458 /* For the absolute forms of branches, convert the PC
2459 relative form back into the absolute. */
252b5132
RH		 2460 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2461 {
2462 switch (reloc)
2463 {
2464 case BFD_RELOC_PPC_B26:
2465 reloc = BFD_RELOC_PPC_BA26;
2466 break;
2467 case BFD_RELOC_PPC_B16:
2468 reloc = BFD_RELOC_PPC_BA16;
2469 break;
2470 case BFD_RELOC_PPC_B16_BRTAKEN:
2471 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2472 break;
2473 case BFD_RELOC_PPC_B16_BRNTAKEN:
2474 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2475 break;
2476 default:
2477 break;
2478 }
2479 }
2480
2b3c4602 2481 if (ppc_obj64
adadcc0c 2482 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
0baf16f2
AM		 2483 {
2484 switch (reloc)
2485 {
2486 case BFD_RELOC_16:
2487 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2488 break;
2489 case BFD_RELOC_LO16:
2490 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2491 break;
2492 case BFD_RELOC_16_GOTOFF:
2493 reloc = BFD_RELOC_PPC64_GOT16_DS;
2494 break;
2495 case BFD_RELOC_LO16_GOTOFF:
2496 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2497 break;
2498 case BFD_RELOC_LO16_PLTOFF:
2499 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2500 break;
1cfc59d5 2501 case BFD_RELOC_16_BASEREL:
0baf16f2
AM		 2502 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2503 break;
2504 case BFD_RELOC_LO16_BASEREL:
2505 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2506 break;
2507 case BFD_RELOC_PPC_TOC16:
2508 reloc = BFD_RELOC_PPC64_TOC16_DS;
2509 break;
2510 case BFD_RELOC_PPC64_TOC16_LO:
2511 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2512 break;
2513 case BFD_RELOC_PPC64_PLTGOT16:
2514 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2515 break;
2516 case BFD_RELOC_PPC64_PLTGOT16_LO:
2517 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2518 break;
cdba85ec
AM		 2519 case BFD_RELOC_PPC_DTPREL16:
2520 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2521 break;
2522 case BFD_RELOC_PPC_DTPREL16_LO:
2523 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2524 break;
2525 case BFD_RELOC_PPC_TPREL16:
2526 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2527 break;
2528 case BFD_RELOC_PPC_TPREL16_LO:
2529 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2530 break;
2531 case BFD_RELOC_PPC_GOT_DTPREL16:
2532 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2533 case BFD_RELOC_PPC_GOT_TPREL16:
2534 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2535 break;
0baf16f2
AM		 2536 default:
2537 as_bad (_("unsupported relocation for DS offset field"));
2538 break;
2539 }
2540 }
2541
252b5132
RH		 2542 /* We need to generate a fixup for this expression. */
2543 if (fc >= MAX_INSN_FIXUPS)
2544 as_fatal (_("too many fixups"));
2545 fixups[fc].exp = ex;
2546 fixups[fc].opindex = 0;
2547 fixups[fc].reloc = reloc;
2548 ++fc;
2549 }
2550#endif /* OBJ_ELF */
2551
2552 else
2553 {
2554 /* We need to generate a fixup for this expression. */
2555 if (fc >= MAX_INSN_FIXUPS)
2556 as_fatal (_("too many fixups"));
2557 fixups[fc].exp = ex;
2558 fixups[fc].opindex = *opindex_ptr;
2559 fixups[fc].reloc = BFD_RELOC_UNUSED;
2560 ++fc;
2561 }
2562
2563 if (need_paren)
2564 {
2565 endc = ')';
2566 need_paren = 0;
2567 }
2568 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2569 {
2570 endc = '(';
2571 need_paren = 1;
2572 }
2573 else
2574 endc = ',';
2575
2576 /* The call to expression should have advanced str past any
2577 whitespace. */
2578 if (*str != endc
2579 && (endc != ',' || *str != '\0'))
2580 {
2581 as_bad (_("syntax error; found `%c' but expected `%c'"), *str, endc);
2582 break;
2583 }
2584
2585 if (*str != '\0')
2586 ++str;
2587 }
2588
3882b010 2589 while (ISSPACE (*str))
252b5132
RH		 2590 ++str;
2591
2592 if (*str != '\0')
2593 as_bad (_("junk at end of line: `%s'"), str);
2594
dc1d03fc 2595#ifdef OBJ_ELF
6a0c61b7
EZ		 2596 /* Do we need/want a APUinfo section? */
2597 if (ppc_cpu & (PPC_OPCODE_SPE
2598 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS
2599 | PPC_OPCODE_BRLOCK | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
2600 | PPC_OPCODE_RFMCI))
2601 {
2602 /* These are all version "1". */
2603 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 2604 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 2605 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 2606 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 2607 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 2608 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 2609 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 2610 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 2611 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 2612 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 2613 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 2614 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 2615 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 2616 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
6a0c61b7 2617 }
dc1d03fc 2618#endif
6a0c61b7 2619
252b5132
RH		 2620 /* Write out the instruction. */
2621 f = frag_more (4);
09b935ac
AM		 2622 addr_mod = frag_now_fix () & 3;
2623 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
2624 as_bad (_("instruction address is not a multiple of 4"));
2625 frag_now->insn_addr = addr_mod;
2626 frag_now->has_code = 1;
252b5132
RH		 2627 md_number_to_chars (f, insn, 4);
2628
5d6f4f16
GK		 2629#ifdef OBJ_ELF
2630 dwarf2_emit_insn (4);
2631#endif
2632
252b5132
RH		 2633 /* Create any fixups. At this point we do not use a
2634 bfd_reloc_code_real_type, but instead just use the
2635 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2636 handle fixups for any operand type, although that is admittedly
2637 not a very exciting feature. We pick a BFD reloc type in
94f592af 2638 md_apply_fix3. */
252b5132
RH		 2639 for (i = 0; i < fc; i++)
2640 {
2641 const struct powerpc_operand *operand;
2642
2643 operand = &powerpc_operands[fixups[i].opindex];
2644 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2645 {
99a814a1 2646 reloc_howto_type *reloc_howto;
252b5132
RH		 2647 int size;
2648 int offset;
2649 fixS *fixP;
2650
99a814a1 2651 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 2652 if (!reloc_howto)
2653 abort ();
2654
2655 size = bfd_get_reloc_size (reloc_howto);
2656 offset = target_big_endian ? (4 - size) : 0;
2657
2658 if (size < 1 || size > 4)
bc805888 2659 abort ();
252b5132 2660
99a814a1
AM		 2661 fixP = fix_new_exp (frag_now,
2662 f - frag_now->fr_literal + offset,
2663 size,
2664 &fixups[i].exp,
2665 reloc_howto->pc_relative,
252b5132
RH		 2666 fixups[i].reloc);
2667
2668 /* Turn off complaints that the addend is too large for things like
2669 foo+100000@ha. */
2670 switch (fixups[i].reloc)
2671 {
2672 case BFD_RELOC_16_GOTOFF:
2673 case BFD_RELOC_PPC_TOC16:
2674 case BFD_RELOC_LO16:
2675 case BFD_RELOC_HI16:
2676 case BFD_RELOC_HI16_S:
0baf16f2 2677#ifdef OBJ_ELF
0baf16f2
AM		 2678 case BFD_RELOC_PPC64_HIGHER:
2679 case BFD_RELOC_PPC64_HIGHER_S:
2680 case BFD_RELOC_PPC64_HIGHEST:
2681 case BFD_RELOC_PPC64_HIGHEST_S:
0baf16f2 2682#endif
252b5132
RH		 2683 fixP->fx_no_overflow = 1;
2684 break;
2685 default:
2686 break;
2687 }
2688 }
2689 else
99a814a1
AM		 2690 fix_new_exp (frag_now,
2691 f - frag_now->fr_literal,
2692 4,
252b5132
RH		 2693 &fixups[i].exp,
2694 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
2695 ((bfd_reloc_code_real_type)
99a814a1 2696 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
252b5132
RH		 2697 }
2698}
2699
2700/* Handle a macro. Gather all the operands, transform them as
2701 described by the macro, and call md_assemble recursively. All the
2702 operands are separated by commas; we don't accept parentheses
2703 around operands here. */
2704
2705static void
2706ppc_macro (str, macro)
2707 char *str;
2708 const struct powerpc_macro *macro;
2709{
2710 char *operands[10];
2711 unsigned int count;
2712 char *s;
2713 unsigned int len;
2714 const char *format;
2715 int arg;
2716 char *send;
2717 char *complete;
2718
2719 /* Gather the users operands into the operands array. */
2720 count = 0;
2721 s = str;
2722 while (1)
2723 {
2724 if (count >= sizeof operands / sizeof operands[0])
2725 break;
2726 operands[count++] = s;
2727 s = strchr (s, ',');
2728 if (s == (char *) NULL)
2729 break;
2730 *s++ = '\0';
81d4177b 2731 }
252b5132
RH		 2732
2733 if (count != macro->operands)
2734 {
2735 as_bad (_("wrong number of operands"));
2736 return;
2737 }
2738
2739 /* Work out how large the string must be (the size is unbounded
2740 because it includes user input). */
2741 len = 0;
2742 format = macro->format;
2743 while (*format != '\0')
2744 {
2745 if (*format != '%')
2746 {
2747 ++len;
2748 ++format;
2749 }
2750 else
2751 {
2752 arg = strtol (format + 1, &send, 10);
2753 know (send != format && arg >= 0 && arg < count);
2754 len += strlen (operands[arg]);
2755 format = send;
2756 }
2757 }
2758
2759 /* Put the string together. */
2760 complete = s = (char *) alloca (len + 1);
2761 format = macro->format;
2762 while (*format != '\0')
2763 {
2764 if (*format != '%')
2765 *s++ = *format++;
2766 else
2767 {
2768 arg = strtol (format + 1, &send, 10);
2769 strcpy (s, operands[arg]);
2770 s += strlen (s);
2771 format = send;
2772 }
2773 }
2774 *s = '\0';
2775
2776 /* Assemble the constructed instruction. */
2777 md_assemble (complete);
81d4177b 2778}
252b5132
RH		 2779\f
2780#ifdef OBJ_ELF
99a814a1 2781/* For ELF, add support for SHF_EXCLUDE and SHT_ORDERED. */
252b5132
RH		 2782
2783int
2784ppc_section_letter (letter, ptr_msg)
2785 int letter;
2786 char **ptr_msg;
2787{
2788 if (letter == 'e')
2789 return SHF_EXCLUDE;
2790
13ae64f3 2791 *ptr_msg = _("Bad .section directive: want a,e,w,x,M,S,G,T in string");
711ef82f 2792 return -1;
252b5132
RH		 2793}
2794
2795int
9de8d8f1
RH		 2796ppc_section_word (str, len)
2797 char *str;
2798 size_t len;
252b5132 2799{
9de8d8f1
RH		 2800 if (len == 7 && strncmp (str, "exclude", 7) == 0)
2801 return SHF_EXCLUDE;
252b5132 2802
9de8d8f1 2803 return -1;
252b5132
RH		 2804}
2805
2806int
9de8d8f1
RH		 2807ppc_section_type (str, len)
2808 char *str;
2809 size_t len;
252b5132 2810{
9de8d8f1
RH		 2811 if (len == 7 && strncmp (str, "ordered", 7) == 0)
2812 return SHT_ORDERED;
252b5132 2813
9de8d8f1 2814 return -1;
252b5132
RH		 2815}
2816
2817int
2818ppc_section_flags (flags, attr, type)
2819 int flags;
2820 int attr;
2821 int type;
2822{
2823 if (type == SHT_ORDERED)
2824 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
2825
2826 if (attr & SHF_EXCLUDE)
2827 flags |= SEC_EXCLUDE;
2828
2829 return flags;
2830}
2831#endif /* OBJ_ELF */
2832
2833\f
2834/* Pseudo-op handling. */
2835
2836/* The .byte pseudo-op. This is similar to the normal .byte
2837 pseudo-op, but it can also take a single ASCII string. */
2838
2839static void
2840ppc_byte (ignore)
92161534 2841 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 2842{
2843 if (*input_line_pointer != '\"')
2844 {
2845 cons (1);
2846 return;
2847 }
2848
2849 /* Gather characters. A real double quote is doubled. Unusual
2850 characters are not permitted. */
2851 ++input_line_pointer;
2852 while (1)
2853 {
2854 char c;
2855
2856 c = *input_line_pointer++;
2857
2858 if (c == '\"')
2859 {
2860 if (*input_line_pointer != '\"')
2861 break;
2862 ++input_line_pointer;
2863 }
2864
2865 FRAG_APPEND_1_CHAR (c);
2866 }
2867
2868 demand_empty_rest_of_line ();
2869}
2870\f
2871#ifdef OBJ_XCOFF
2872
2873/* XCOFF specific pseudo-op handling. */
2874
2875/* This is set if we are creating a .stabx symbol, since we don't want
2876 to handle symbol suffixes for such symbols. */
b34976b6 2877static bfd_boolean ppc_stab_symbol;
252b5132
RH		 2878
2879/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
2880 symbols in the .bss segment as though they were local common
67c1ffbe 2881 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 2882 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 2883
2884static void
2885ppc_comm (lcomm)
2886 int lcomm;
2887{
2888 asection *current_seg = now_seg;
2889 subsegT current_subseg = now_subseg;
2890 char *name;
2891 char endc;
2892 char *end_name;
2893 offsetT size;
2894 offsetT align;
2895 symbolS *lcomm_sym = NULL;
2896 symbolS *sym;
2897 char *pfrag;
2898
2899 name = input_line_pointer;
2900 endc = get_symbol_end ();
2901 end_name = input_line_pointer;
2902 *end_name = endc;
2903
2904 if (*input_line_pointer != ',')
2905 {
2906 as_bad (_("missing size"));
2907 ignore_rest_of_line ();
2908 return;
2909 }
2910 ++input_line_pointer;
2911
2912 size = get_absolute_expression ();
2913 if (size < 0)
2914 {
2915 as_bad (_("negative size"));
2916 ignore_rest_of_line ();
2917 return;
2918 }
2919
2920 if (! lcomm)
2921 {
2922 /* The third argument to .comm is the alignment. */
2923 if (*input_line_pointer != ',')
1ad63b2f 2924 align = 2;
252b5132
RH		 2925 else
2926 {
2927 ++input_line_pointer;
2928 align = get_absolute_expression ();
2929 if (align <= 0)
2930 {
2931 as_warn (_("ignoring bad alignment"));
1ad63b2f 2932 align = 2;
252b5132
RH		 2933 }
2934 }
2935 }
2936 else
2937 {
2938 char *lcomm_name;
2939 char lcomm_endc;
2940
1ad63b2f 2941 if (size <= 4)
252b5132
RH		 2942 align = 2;
2943 else
2944 align = 3;
2945
2946 /* The third argument to .lcomm appears to be the real local
2947 common symbol to create. References to the symbol named in
2948 the first argument are turned into references to the third
2949 argument. */
2950 if (*input_line_pointer != ',')
2951 {
2952 as_bad (_("missing real symbol name"));
2953 ignore_rest_of_line ();
2954 return;
2955 }
2956 ++input_line_pointer;
2957
2958 lcomm_name = input_line_pointer;
2959 lcomm_endc = get_symbol_end ();
81d4177b 2960
252b5132
RH		 2961 lcomm_sym = symbol_find_or_make (lcomm_name);
2962
2963 *input_line_pointer = lcomm_endc;
2964 }
2965
2966 *end_name = '\0';
2967 sym = symbol_find_or_make (name);
2968 *end_name = endc;
2969
2970 if (S_IS_DEFINED (sym)
2971 || S_GET_VALUE (sym) != 0)
2972 {
2973 as_bad (_("attempt to redefine symbol"));
2974 ignore_rest_of_line ();
2975 return;
2976 }
81d4177b 2977
252b5132 2978 record_alignment (bss_section, align);
81d4177b 2979
252b5132
RH		 2980 if (! lcomm
2981 || ! S_IS_DEFINED (lcomm_sym))
2982 {
2983 symbolS *def_sym;
2984 offsetT def_size;
2985
2986 if (! lcomm)
2987 {
2988 def_sym = sym;
2989 def_size = size;
2990 S_SET_EXTERNAL (sym);
2991 }
2992 else
2993 {
809ffe0d 2994 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 2995 def_sym = lcomm_sym;
2996 def_size = 0;
2997 }
2998
2999 subseg_set (bss_section, 1);
3000 frag_align (align, 0, 0);
81d4177b 3001
809ffe0d 3002 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3003 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3004 def_size, (char *) NULL);
3005 *pfrag = 0;
3006 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3007 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3008 }
3009 else if (lcomm)
3010 {
3011 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3012 symbol_get_frag (lcomm_sym)->fr_offset =
3013 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3014 &~ ((1 << align) - 1));
809ffe0d
ILT		 3015 if (align > symbol_get_tc (lcomm_sym)->align)
3016 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3017 }
3018
3019 if (lcomm)
3020 {
3021 /* Make sym an offset from lcomm_sym. */
3022 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3023 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3024 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3025 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3026 }
3027
3028 subseg_set (current_seg, current_subseg);
3029
3030 demand_empty_rest_of_line ();
3031}
3032
3033/* The .csect pseudo-op. This switches us into a different
3034 subsegment. The first argument is a symbol whose value is the
3035 start of the .csect. In COFF, csect symbols get special aux
3036 entries defined by the x_csect field of union internal_auxent. The
3037 optional second argument is the alignment (the default is 2). */
3038
3039static void
3040ppc_csect (ignore)
5480ccf3 3041 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3042{
3043 char *name;
3044 char endc;
3045 symbolS *sym;
931e13a6 3046 offsetT align;
252b5132
RH		 3047
3048 name = input_line_pointer;
3049 endc = get_symbol_end ();
81d4177b 3050
252b5132
RH		 3051 sym = symbol_find_or_make (name);
3052
3053 *input_line_pointer = endc;
3054
3055 if (S_GET_NAME (sym)[0] == '\0')
3056 {
3057 /* An unnamed csect is assumed to be [PR]. */
809ffe0d 3058 symbol_get_tc (sym)->class = XMC_PR;
252b5132
RH		 3059 }
3060
931e13a6 3061 align = 2;
252b5132
RH		 3062 if (*input_line_pointer == ',')
3063 {
3064 ++input_line_pointer;
931e13a6 3065 align = get_absolute_expression ();
252b5132
RH		 3066 }
3067
931e13a6
AM		 3068 ppc_change_csect (sym, align);
3069
252b5132
RH		 3070 demand_empty_rest_of_line ();
3071}
3072
3073/* Change to a different csect. */
3074
3075static void
931e13a6 3076ppc_change_csect (sym, align)
252b5132 3077 symbolS *sym;
931e13a6 3078 offsetT align;
252b5132
RH		 3079{
3080 if (S_IS_DEFINED (sym))
809ffe0d 3081 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3082 else
3083 {
3084 symbolS **list_ptr;
3085 int after_toc;
3086 int hold_chunksize;
3087 symbolS *list;
931e13a6
AM		 3088 int is_code;
3089 segT sec;
252b5132
RH		 3090
3091 /* This is a new csect. We need to look at the symbol class to
3092 figure out whether it should go in the text section or the
3093 data section. */
3094 after_toc = 0;
931e13a6 3095 is_code = 0;
809ffe0d 3096 switch (symbol_get_tc (sym)->class)
252b5132
RH		 3097 {
3098 case XMC_PR:
3099 case XMC_RO:
3100 case XMC_DB:
3101 case XMC_GL:
3102 case XMC_XO:
3103 case XMC_SV:
3104 case XMC_TI:
3105 case XMC_TB:
3106 S_SET_SEGMENT (sym, text_section);
809ffe0d 3107 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3108 ++ppc_text_subsegment;
3109 list_ptr = &ppc_text_csects;
931e13a6 3110 is_code = 1;
252b5132
RH		 3111 break;
3112 case XMC_RW:
3113 case XMC_TC0:
3114 case XMC_TC:
3115 case XMC_DS:
3116 case XMC_UA:
3117 case XMC_BS:
3118 case XMC_UC:
3119 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3120 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3121 == ppc_data_subsegment))
252b5132
RH		 3122 after_toc = 1;
3123 S_SET_SEGMENT (sym, data_section);
809ffe0d 3124 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3125 ++ppc_data_subsegment;
3126 list_ptr = &ppc_data_csects;
3127 break;
3128 default:
3129 abort ();
3130 }
3131
3132 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3133 changing subsegments, so that we don't use a lot of memory
3134 space for what may be a small section. */
252b5132
RH		 3135 hold_chunksize = chunksize;
3136 chunksize = 64;
3137
931e13a6
AM		 3138 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3139 symbol_get_tc (sym)->subseg);
252b5132
RH		 3140
3141 chunksize = hold_chunksize;
3142
3143 if (after_toc)
3144 ppc_after_toc_frag = frag_now;
3145
931e13a6
AM		 3146 record_alignment (sec, align);
3147 if (is_code)
3148 frag_align_code (align, 0);
3149 else
3150 frag_align (align, 0, 0);
3151
809ffe0d 3152 symbol_set_frag (sym, frag_now);
252b5132
RH		 3153 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3154
931e13a6 3155 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3156 symbol_get_tc (sym)->output = 1;
3157 symbol_get_tc (sym)->within = sym;
81d4177b 3158
252b5132 3159 for (list = *list_ptr;
809ffe0d
ILT		 3160 symbol_get_tc (list)->next != (symbolS *) NULL;
3161 list = symbol_get_tc (list)->next)
252b5132 3162 ;
809ffe0d 3163 symbol_get_tc (list)->next = sym;
81d4177b 3164
252b5132 3165 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3166 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3167 &symbol_lastP);
252b5132
RH		 3168 }
3169
3170 ppc_current_csect = sym;
3171}
3172
3173/* This function handles the .text and .data pseudo-ops. These
3174 pseudo-ops aren't really used by XCOFF; we implement them for the
3175 convenience of people who aren't used to XCOFF. */
3176
3177static void
3178ppc_section (type)
3179 int type;
3180{
3181 const char *name;
3182 symbolS *sym;
3183
3184 if (type == 't')
3185 name = ".text[PR]";
3186 else if (type == 'd')
3187 name = ".data[RW]";
3188 else
3189 abort ();
3190
3191 sym = symbol_find_or_make (name);
3192
931e13a6 3193 ppc_change_csect (sym, 2);
252b5132
RH		 3194
3195 demand_empty_rest_of_line ();
3196}
3197
3198/* This function handles the .section pseudo-op. This is mostly to
3199 give an error, since XCOFF only supports .text, .data and .bss, but
3200 we do permit the user to name the text or data section. */
3201
3202static void
3203ppc_named_section (ignore)
5480ccf3 3204 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3205{
3206 char *user_name;
3207 const char *real_name;
3208 char c;
3209 symbolS *sym;
3210
3211 user_name = input_line_pointer;
3212 c = get_symbol_end ();
3213
3214 if (strcmp (user_name, ".text") == 0)
3215 real_name = ".text[PR]";
3216 else if (strcmp (user_name, ".data") == 0)
3217 real_name = ".data[RW]";
3218 else
3219 {
3220 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3221 *input_line_pointer = c;
3222 ignore_rest_of_line ();
3223 return;
3224 }
3225
3226 *input_line_pointer = c;
3227
3228 sym = symbol_find_or_make (real_name);
3229
931e13a6 3230 ppc_change_csect (sym, 2);
252b5132
RH		 3231
3232 demand_empty_rest_of_line ();
3233}
3234
3235/* The .extern pseudo-op. We create an undefined symbol. */
3236
3237static void
3238ppc_extern (ignore)
5480ccf3 3239 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3240{
3241 char *name;
3242 char endc;
3243
3244 name = input_line_pointer;
3245 endc = get_symbol_end ();
3246
3247 (void) symbol_find_or_make (name);
3248
3249 *input_line_pointer = endc;
3250
3251 demand_empty_rest_of_line ();
3252}
3253
3254/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3255
3256static void
3257ppc_lglobl (ignore)
5480ccf3 3258 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3259{
3260 char *name;
3261 char endc;
3262 symbolS *sym;
3263
3264 name = input_line_pointer;
3265 endc = get_symbol_end ();
3266
3267 sym = symbol_find_or_make (name);
3268
3269 *input_line_pointer = endc;
3270
809ffe0d 3271 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3272
3273 demand_empty_rest_of_line ();
3274}
3275
3276/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3277 although I don't know why it bothers. */
3278
3279static void
3280ppc_rename (ignore)
5480ccf3 3281 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3282{
3283 char *name;
3284 char endc;
3285 symbolS *sym;
3286 int len;
3287
3288 name = input_line_pointer;
3289 endc = get_symbol_end ();
3290
3291 sym = symbol_find_or_make (name);
3292
3293 *input_line_pointer = endc;
3294
3295 if (*input_line_pointer != ',')
3296 {
3297 as_bad (_("missing rename string"));
3298 ignore_rest_of_line ();
3299 return;
3300 }
3301 ++input_line_pointer;
3302
809ffe0d 3303 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 3304
3305 demand_empty_rest_of_line ();
3306}
3307
3308/* The .stabx pseudo-op. This is similar to a normal .stabs
3309 pseudo-op, but slightly different. A sample is
3310 .stabx "main:F-1",.main,142,0
3311 The first argument is the symbol name to create. The second is the
3312 value, and the third is the storage class. The fourth seems to be
3313 always zero, and I am assuming it is the type. */
3314
3315static void
3316ppc_stabx (ignore)
5480ccf3 3317 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3318{
3319 char *name;
3320 int len;
3321 symbolS *sym;
3322 expressionS exp;
3323
3324 name = demand_copy_C_string (&len);
3325
3326 if (*input_line_pointer != ',')
3327 {
3328 as_bad (_("missing value"));
3329 return;
3330 }
3331 ++input_line_pointer;
3332
b34976b6 3333 ppc_stab_symbol = TRUE;
252b5132 3334 sym = symbol_make (name);
b34976b6 3335 ppc_stab_symbol = FALSE;
252b5132 3336
809ffe0d 3337 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 3338
3339 (void) expression (&exp);
3340
3341 switch (exp.X_op)
3342 {
3343 case O_illegal:
3344 case O_absent:
3345 case O_big:
3346 as_bad (_("illegal .stabx expression; zero assumed"));
3347 exp.X_add_number = 0;
3348 /* Fall through. */
3349 case O_constant:
3350 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 3351 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 3352 break;
3353
3354 case O_symbol:
3355 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 3356 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3357 else
3358 {
3359 S_SET_VALUE (sym,
3360 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 3361 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 3362 }
3363 break;
3364
3365 default:
3366 /* The value is some complex expression. This will probably
99a814a1
AM		 3367 fail at some later point, but this is probably the right
3368 thing to do here. */
809ffe0d 3369 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3370 break;
3371 }
3372
3373 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3374 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3375
3376 if (*input_line_pointer != ',')
3377 {
3378 as_bad (_("missing class"));
3379 return;
3380 }
3381 ++input_line_pointer;
3382
3383 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3384
3385 if (*input_line_pointer != ',')
3386 {
3387 as_bad (_("missing type"));
3388 return;
3389 }
3390 ++input_line_pointer;
3391
3392 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3393
809ffe0d 3394 symbol_get_tc (sym)->output = 1;
252b5132 3395
6877bb43 3396 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
99a814a1 3397
809ffe0d 3398 symbol_get_tc (sym)->within = ppc_current_block;
252b5132 3399
41ea10b1 3400 /* In this case :
99a814a1 3401
41ea10b1
TR		 3402 .bs name
3403 .stabx "z",arrays_,133,0
3404 .es
99a814a1 3405
41ea10b1 3406 .comm arrays_,13768,3
99a814a1 3407
41ea10b1
TR		 3408 resolve_symbol_value will copy the exp's "within" into sym's when the
3409 offset is 0. Since this seems to be corner case problem,
3410 only do the correction for storage class C_STSYM. A better solution
0baf16f2 3411 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1
AM		 3412
3413 if (exp.X_op == O_symbol)
41ea10b1
TR		 3414 {
3415 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3416 }
6877bb43 3417 }
99a814a1 3418
252b5132
RH		 3419 if (exp.X_op != O_symbol
3420 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3421 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3422 ppc_frob_label (sym);
3423 else
3424 {
3425 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3426 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3427 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3428 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 3429 }
3430
3431 demand_empty_rest_of_line ();
3432}
3433
3434/* The .function pseudo-op. This takes several arguments. The first
3435 argument seems to be the external name of the symbol. The second
67c1ffbe 3436 argument seems to be the label for the start of the function. gcc
252b5132
RH		 3437 uses the same name for both. I have no idea what the third and
3438 fourth arguments are meant to be. The optional fifth argument is
3439 an expression for the size of the function. In COFF this symbol
3440 gets an aux entry like that used for a csect. */
3441
3442static void
3443ppc_function (ignore)
5480ccf3 3444 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3445{
3446 char *name;
3447 char endc;
3448 char *s;
3449 symbolS *ext_sym;
3450 symbolS *lab_sym;
3451
3452 name = input_line_pointer;
3453 endc = get_symbol_end ();
3454
3455 /* Ignore any [PR] suffix. */
3456 name = ppc_canonicalize_symbol_name (name);
3457 s = strchr (name, '[');
3458 if (s != (char *) NULL
3459 && strcmp (s + 1, "PR]") == 0)
3460 *s = '\0';
3461
3462 ext_sym = symbol_find_or_make (name);
3463
3464 *input_line_pointer = endc;
3465
3466 if (*input_line_pointer != ',')
3467 {
3468 as_bad (_("missing symbol name"));
3469 ignore_rest_of_line ();
3470 return;
3471 }
3472 ++input_line_pointer;
3473
3474 name = input_line_pointer;
3475 endc = get_symbol_end ();
3476
3477 lab_sym = symbol_find_or_make (name);
3478
3479 *input_line_pointer = endc;
3480
3481 if (ext_sym != lab_sym)
3482 {
809ffe0d
ILT		 3483 expressionS exp;
3484
3485 exp.X_op = O_symbol;
3486 exp.X_add_symbol = lab_sym;
3487 exp.X_op_symbol = NULL;
3488 exp.X_add_number = 0;
3489 exp.X_unsigned = 0;
3490 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 3491 }
3492
809ffe0d
ILT		 3493 if (symbol_get_tc (ext_sym)->class == -1)
3494 symbol_get_tc (ext_sym)->class = XMC_PR;
3495 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 3496
3497 if (*input_line_pointer == ',')
3498 {
3499 expressionS ignore;
3500
3501 /* Ignore the third argument. */
3502 ++input_line_pointer;
3503 expression (&ignore);
3504 if (*input_line_pointer == ',')
3505 {
3506 /* Ignore the fourth argument. */
3507 ++input_line_pointer;
3508 expression (&ignore);
3509 if (*input_line_pointer == ',')
3510 {
3511 /* The fifth argument is the function size. */
3512 ++input_line_pointer;
809ffe0d
ILT		 3513 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
3514 absolute_section,
3515 (valueT) 0,
3516 &zero_address_frag);
3517 pseudo_set (symbol_get_tc (ext_sym)->size);
252b5132
RH		 3518 }
3519 }
3520 }
3521
3522 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
3523 SF_SET_FUNCTION (ext_sym);
3524 SF_SET_PROCESS (ext_sym);
3525 coff_add_linesym (ext_sym);
3526
3527 demand_empty_rest_of_line ();
3528}
3529
3530/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 3531 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
3532 with the correct line number */
5d6255fe 3533
8642cce8 3534static symbolS *saved_bi_sym = 0;
252b5132
RH		 3535
3536static void
3537ppc_bf (ignore)
5480ccf3 3538 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3539{
3540 symbolS *sym;
3541
3542 sym = symbol_make (".bf");
3543 S_SET_SEGMENT (sym, text_section);
809ffe0d 3544 symbol_set_frag (sym, frag_now);
252b5132
RH		 3545 S_SET_VALUE (sym, frag_now_fix ());
3546 S_SET_STORAGE_CLASS (sym, C_FCN);
3547
3548 coff_line_base = get_absolute_expression ();
3549
3550 S_SET_NUMBER_AUXILIARY (sym, 1);
3551 SA_SET_SYM_LNNO (sym, coff_line_base);
3552
8642cce8 3553 /* Line number for bi. */
5d6255fe 3554 if (saved_bi_sym)
8642cce8
TR		 3555 {
3556 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
3557 saved_bi_sym = 0;
3558 }
5d6255fe 3559
8642cce8 3560
809ffe0d 3561 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3562
3563 ppc_frob_label (sym);
3564
3565 demand_empty_rest_of_line ();
3566}
3567
3568/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
3569 ".ef", except that the line number is absolute, not relative to the
3570 most recent ".bf" symbol. */
3571
3572static void
3573ppc_ef (ignore)
5480ccf3 3574 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3575{
3576 symbolS *sym;
3577
3578 sym = symbol_make (".ef");
3579 S_SET_SEGMENT (sym, text_section);
809ffe0d 3580 symbol_set_frag (sym, frag_now);
252b5132
RH		 3581 S_SET_VALUE (sym, frag_now_fix ());
3582 S_SET_STORAGE_CLASS (sym, C_FCN);
3583 S_SET_NUMBER_AUXILIARY (sym, 1);
3584 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3585 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3586
3587 ppc_frob_label (sym);
3588
3589 demand_empty_rest_of_line ();
3590}
3591
3592/* The .bi and .ei pseudo-ops. These take a string argument and
3593 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 3594 the symbol list. The value of .bi will be know when the next .bf
3595 is encountered. */
252b5132
RH		 3596
3597static void
3598ppc_biei (ei)
3599 int ei;
3600{
3601 static symbolS *last_biei;
3602
3603 char *name;
3604 int len;
3605 symbolS *sym;
3606 symbolS *look;
3607
3608 name = demand_copy_C_string (&len);
3609
3610 /* The value of these symbols is actually file offset. Here we set
3611 the value to the index into the line number entries. In
3612 ppc_frob_symbols we set the fix_line field, which will cause BFD
3613 to do the right thing. */
3614
3615 sym = symbol_make (name);
3616 /* obj-coff.c currently only handles line numbers correctly in the
3617 .text section. */
3618 S_SET_SEGMENT (sym, text_section);
3619 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 3620 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3621
3622 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 3623 symbol_get_tc (sym)->output = 1;
81d4177b 3624
8642cce8 3625 /* Save bi. */
5d6255fe 3626 if (ei)
8642cce8
TR		 3627 saved_bi_sym = 0;
3628 else
3629 saved_bi_sym = sym;
3630
252b5132
RH		 3631 for (look = last_biei ? last_biei : symbol_rootP;
3632 (look != (symbolS *) NULL
3633 && (S_GET_STORAGE_CLASS (look) == C_FILE
3634 || S_GET_STORAGE_CLASS (look) == C_BINCL
3635 || S_GET_STORAGE_CLASS (look) == C_EINCL));
3636 look = symbol_next (look))
3637 ;
3638 if (look != (symbolS *) NULL)
3639 {
3640 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3641 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
3642 last_biei = sym;
3643 }
3644
3645 demand_empty_rest_of_line ();
3646}
3647
3648/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
3649 There is one argument, which is a csect symbol. The value of the
3650 .bs symbol is the index of this csect symbol. */
3651
3652static void
3653ppc_bs (ignore)
5480ccf3 3654 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3655{
3656 char *name;
3657 char endc;
3658 symbolS *csect;
3659 symbolS *sym;
3660
3661 if (ppc_current_block != NULL)
3662 as_bad (_("nested .bs blocks"));
3663
3664 name = input_line_pointer;
3665 endc = get_symbol_end ();
3666
3667 csect = symbol_find_or_make (name);
3668
3669 *input_line_pointer = endc;
3670
3671 sym = symbol_make (".bs");
3672 S_SET_SEGMENT (sym, now_seg);
3673 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 3674 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3675 symbol_get_tc (sym)->output = 1;
252b5132 3676
809ffe0d 3677 symbol_get_tc (sym)->within = csect;
252b5132
RH		 3678
3679 ppc_frob_label (sym);
3680
3681 ppc_current_block = sym;
3682
3683 demand_empty_rest_of_line ();
3684}
3685
3686/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
3687
3688static void
3689ppc_es (ignore)
5480ccf3 3690 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3691{
3692 symbolS *sym;
3693
3694 if (ppc_current_block == NULL)
3695 as_bad (_(".es without preceding .bs"));
3696
3697 sym = symbol_make (".es");
3698 S_SET_SEGMENT (sym, now_seg);
3699 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 3700 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3701 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3702
3703 ppc_frob_label (sym);
3704
3705 ppc_current_block = NULL;
3706
3707 demand_empty_rest_of_line ();
3708}
3709
3710/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
3711 line number. */
3712
3713static void
3714ppc_bb (ignore)
5480ccf3 3715 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3716{
3717 symbolS *sym;
3718
3719 sym = symbol_make (".bb");
3720 S_SET_SEGMENT (sym, text_section);
809ffe0d 3721 symbol_set_frag (sym, frag_now);
252b5132
RH		 3722 S_SET_VALUE (sym, frag_now_fix ());
3723 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3724
3725 S_SET_NUMBER_AUXILIARY (sym, 1);
3726 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
3727
809ffe0d 3728 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3729
3730 SF_SET_PROCESS (sym);
3731
3732 ppc_frob_label (sym);
3733
3734 demand_empty_rest_of_line ();
3735}
3736
3737/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
3738 line number. */
3739
3740static void
3741ppc_eb (ignore)
5480ccf3 3742 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3743{
3744 symbolS *sym;
3745
3746 sym = symbol_make (".eb");
3747 S_SET_SEGMENT (sym, text_section);
809ffe0d 3748 symbol_set_frag (sym, frag_now);
252b5132
RH		 3749 S_SET_VALUE (sym, frag_now_fix ());
3750 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3751 S_SET_NUMBER_AUXILIARY (sym, 1);
3752 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3753 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3754
3755 SF_SET_PROCESS (sym);
3756
3757 ppc_frob_label (sym);
3758
3759 demand_empty_rest_of_line ();
3760}
3761
3762/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
3763 specified name. */
3764
3765static void
3766ppc_bc (ignore)
5480ccf3 3767 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3768{
3769 char *name;
3770 int len;
3771 symbolS *sym;
3772
3773 name = demand_copy_C_string (&len);
3774 sym = symbol_make (name);
3775 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3776 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3777 S_SET_STORAGE_CLASS (sym, C_BCOMM);
3778 S_SET_VALUE (sym, 0);
809ffe0d 3779 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3780
3781 ppc_frob_label (sym);
3782
3783 demand_empty_rest_of_line ();
3784}
3785
3786/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
3787
3788static void
3789ppc_ec (ignore)
5480ccf3 3790 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3791{
3792 symbolS *sym;
3793
3794 sym = symbol_make (".ec");
3795 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3796 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3797 S_SET_STORAGE_CLASS (sym, C_ECOMM);
3798 S_SET_VALUE (sym, 0);
809ffe0d 3799 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3800
3801 ppc_frob_label (sym);
3802
3803 demand_empty_rest_of_line ();
3804}
3805
3806/* The .toc pseudo-op. Switch to the .toc subsegment. */
3807
3808static void
3809ppc_toc (ignore)
5480ccf3 3810 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3811{
3812 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 3813 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 3814 else
3815 {
3816 subsegT subseg;
3817 symbolS *sym;
3818 symbolS *list;
81d4177b 3819
252b5132
RH		 3820 subseg = ppc_data_subsegment;
3821 ++ppc_data_subsegment;
3822
3823 subseg_new (segment_name (data_section), subseg);
3824 ppc_toc_frag = frag_now;
3825
3826 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 3827 symbol_set_frag (sym, frag_now);
252b5132
RH		 3828 S_SET_SEGMENT (sym, data_section);
3829 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 3830 symbol_get_tc (sym)->subseg = subseg;
3831 symbol_get_tc (sym)->output = 1;
3832 symbol_get_tc (sym)->within = sym;
252b5132
RH		 3833
3834 ppc_toc_csect = sym;
81d4177b 3835
252b5132 3836 for (list = ppc_data_csects;
809ffe0d
ILT		 3837 symbol_get_tc (list)->next != (symbolS *) NULL;
3838 list = symbol_get_tc (list)->next)
252b5132 3839 ;
809ffe0d 3840 symbol_get_tc (list)->next = sym;
252b5132
RH		 3841
3842 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3843 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3844 &symbol_lastP);
252b5132
RH		 3845 }
3846
3847 ppc_current_csect = ppc_toc_csect;
3848
3849 demand_empty_rest_of_line ();
3850}
3851
3852/* The AIX assembler automatically aligns the operands of a .long or
3853 .short pseudo-op, and we want to be compatible. */
3854
3855static void
3856ppc_xcoff_cons (log_size)
3857 int log_size;
3858{
3859 frag_align (log_size, 0, 0);
3860 record_alignment (now_seg, log_size);
3861 cons (1 << log_size);
3862}
3863
3864static void
3865ppc_vbyte (dummy)
5480ccf3 3866 int dummy ATTRIBUTE_UNUSED;
252b5132
RH		 3867{
3868 expressionS exp;
3869 int byte_count;
3870
3871 (void) expression (&exp);
3872
3873 if (exp.X_op != O_constant)
3874 {
3875 as_bad (_("non-constant byte count"));
3876 return;
3877 }
3878
3879 byte_count = exp.X_add_number;
3880
3881 if (*input_line_pointer != ',')
3882 {
3883 as_bad (_("missing value"));
3884 return;
3885 }
3886
3887 ++input_line_pointer;
3888 cons (byte_count);
3889}
3890
3891#endif /* OBJ_XCOFF */
0baf16f2 3892#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 3893\f
3894/* The .tc pseudo-op. This is used when generating either XCOFF or
3895 ELF. This takes two or more arguments.
3896
3897 When generating XCOFF output, the first argument is the name to
3898 give to this location in the toc; this will be a symbol with class
0baf16f2 3899 TC. The rest of the arguments are N-byte values to actually put at
252b5132 3900 this location in the TOC; often there is just one more argument, a
1049f94e 3901 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 3902 depends on target word size. A 32-bit target uses 4-byte values, a
3903 64-bit target uses 8-byte values.
252b5132
RH		 3904
3905 When not generating XCOFF output, the arguments are the same, but
3906 the first argument is simply ignored. */
3907
3908static void
3909ppc_tc (ignore)
92161534 3910 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3911{
3912#ifdef OBJ_XCOFF
3913
3914 /* Define the TOC symbol name. */
3915 {
3916 char *name;
3917 char endc;
3918 symbolS *sym;
3919
3920 if (ppc_toc_csect == (symbolS *) NULL
3921 || ppc_toc_csect != ppc_current_csect)
3922 {
3923 as_bad (_(".tc not in .toc section"));
3924 ignore_rest_of_line ();
3925 return;
3926 }
3927
3928 name = input_line_pointer;
3929 endc = get_symbol_end ();
3930
3931 sym = symbol_find_or_make (name);
3932
3933 *input_line_pointer = endc;
3934
3935 if (S_IS_DEFINED (sym))
3936 {
3937 symbolS *label;
3938
809ffe0d
ILT		 3939 label = symbol_get_tc (ppc_current_csect)->within;
3940 if (symbol_get_tc (label)->class != XMC_TC0)
252b5132
RH		 3941 {
3942 as_bad (_(".tc with no label"));
3943 ignore_rest_of_line ();
3944 return;
3945 }
3946
3947 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 3948 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 3949 S_SET_VALUE (label, S_GET_VALUE (sym));
3950
3951 while (! is_end_of_line[(unsigned char) *input_line_pointer])
3952 ++input_line_pointer;
3953
3954 return;
3955 }
3956
3957 S_SET_SEGMENT (sym, now_seg);
809ffe0d 3958 symbol_set_frag (sym, frag_now);
252b5132 3959 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 3960 symbol_get_tc (sym)->class = XMC_TC;
3961 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3962
3963 ppc_frob_label (sym);
3964 }
3965
0baf16f2
AM		 3966#endif /* OBJ_XCOFF */
3967#ifdef OBJ_ELF
9c7977b3 3968 int align;
252b5132
RH		 3969
3970 /* Skip the TOC symbol name. */
3971 while (is_part_of_name (*input_line_pointer)
3972 || *input_line_pointer == '['
3973 || *input_line_pointer == ']'
3974 || *input_line_pointer == '{'
3975 || *input_line_pointer == '}')
3976 ++input_line_pointer;
3977
0baf16f2 3978 /* Align to a four/eight byte boundary. */
2b3c4602 3979 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 3980 frag_align (align, 0, 0);
3981 record_alignment (now_seg, align);
0baf16f2 3982#endif /* OBJ_ELF */
252b5132
RH		 3983
3984 if (*input_line_pointer != ',')
3985 demand_empty_rest_of_line ();
3986 else
3987 {
3988 ++input_line_pointer;
2b3c4602 3989 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 3990 }
3991}
0baf16f2
AM		 3992
3993/* Pseudo-op .machine. */
0baf16f2
AM		 3994
3995static void
3996ppc_machine (ignore)
3997 int ignore ATTRIBUTE_UNUSED;
3998{
69c040df
AM		 3999 char *cpu_string;
4000#define MAX_HISTORY 100
4001 static unsigned long *cpu_history;
4002 static int curr_hist;
4003
4004 SKIP_WHITESPACE ();
4005
4006 if (*input_line_pointer == '"')
4007 {
4008 int len;
4009 cpu_string = demand_copy_C_string (&len);
4010 }
4011 else
4012 {
4013 char c;
4014 cpu_string = input_line_pointer;
4015 c = get_symbol_end ();
4016 cpu_string = xstrdup (cpu_string);
4017 *input_line_pointer = c;
4018 }
4019
4020 if (cpu_string != NULL)
4021 {
4022 unsigned long old_cpu = ppc_cpu;
4023 char *p;
4024
4025 for (p = cpu_string; *p != 0; p++)
4026 *p = TOLOWER (*p);
4027
4028 if (strcmp (cpu_string, "push") == 0)
4029 {
4030 if (cpu_history == NULL)
4031 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4032
4033 if (curr_hist >= MAX_HISTORY)
4034 as_bad (_(".machine stack overflow"));
4035 else
4036 cpu_history[curr_hist++] = ppc_cpu;
4037 }
4038 else if (strcmp (cpu_string, "pop") == 0)
4039 {
4040 if (curr_hist <= 0)
4041 as_bad (_(".machine stack underflow"));
4042 else
4043 ppc_cpu = cpu_history[--curr_hist];
4044 }
4045 else if (parse_cpu (cpu_string))
4046 ;
4047 else
4048 as_bad (_("invalid machine `%s'"), cpu_string);
4049
4050 if (ppc_cpu != old_cpu)
4051 ppc_setup_opcodes ();
4052 }
4053
4054 demand_empty_rest_of_line ();
0baf16f2
AM		 4055}
4056
4057/* See whether a symbol is in the TOC section. */
4058
4059static int
4060ppc_is_toc_sym (sym)
4061 symbolS *sym;
4062{
4063#ifdef OBJ_XCOFF
4064 return symbol_get_tc (sym)->class == XMC_TC;
4065#endif
4066#ifdef OBJ_ELF
4067 const char *sname = segment_name (S_GET_SEGMENT (sym));
2b3c4602 4068 if (ppc_obj64)
0baf16f2
AM		 4069 return strcmp (sname, ".toc") == 0;
4070 else
4071 return strcmp (sname, ".got") == 0;
4072#endif
4073}
4074#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 4075\f
4076#ifdef TE_PE
4077
99a814a1 4078/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 4079
4080/* Set the current section. */
4081static void
4082ppc_set_current_section (new)
4083 segT new;
4084{
4085 ppc_previous_section = ppc_current_section;
4086 ppc_current_section = new;
4087}
4088
4089/* pseudo-op: .previous
4090 behaviour: toggles the current section with the previous section.
4091 errors: None
99a814a1
AM		 4092 warnings: "No previous section" */
4093
252b5132 4094static void
99a814a1 4095ppc_previous (ignore)
5480ccf3 4096 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4097{
4098 symbolS *tmp;
4099
81d4177b 4100 if (ppc_previous_section == NULL)
252b5132 4101 {
99a814a1 4102 as_warn (_("No previous section to return to. Directive ignored."));
252b5132
RH		 4103 return;
4104 }
4105
99a814a1 4106 subseg_set (ppc_previous_section, 0);
252b5132 4107
99a814a1 4108 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 4109}
4110
4111/* pseudo-op: .pdata
4112 behaviour: predefined read only data section
b34976b6 4113 double word aligned
252b5132
RH		 4114 errors: None
4115 warnings: None
4116 initial: .section .pdata "adr3"
b34976b6 4117 a - don't know -- maybe a misprint
252b5132
RH		 4118 d - initialized data
4119 r - readable
4120 3 - double word aligned (that would be 4 byte boundary)
4121
4122 commentary:
4123 Tag index tables (also known as the function table) for exception
99a814a1 4124 handling, debugging, etc. */
252b5132 4125
252b5132 4126static void
99a814a1 4127ppc_pdata (ignore)
5480ccf3 4128 int ignore ATTRIBUTE_UNUSED;
252b5132 4129{
81d4177b 4130 if (pdata_section == 0)
252b5132
RH		 4131 {
4132 pdata_section = subseg_new (".pdata", 0);
81d4177b 4133
252b5132
RH		 4134 bfd_set_section_flags (stdoutput, pdata_section,
4135 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4136 | SEC_READONLY | SEC_DATA ));
81d4177b 4137
252b5132
RH		 4138 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4139 }
4140 else
4141 {
99a814a1 4142 pdata_section = subseg_new (".pdata", 0);
252b5132 4143 }
99a814a1 4144 ppc_set_current_section (pdata_section);
252b5132
RH		 4145}
4146
4147/* pseudo-op: .ydata
4148 behaviour: predefined read only data section
b34976b6 4149 double word aligned
252b5132
RH		 4150 errors: None
4151 warnings: None
4152 initial: .section .ydata "drw3"
b34976b6 4153 a - don't know -- maybe a misprint
252b5132
RH		 4154 d - initialized data
4155 r - readable
4156 3 - double word aligned (that would be 4 byte boundary)
4157 commentary:
4158 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 4159 debugging, etc. */
4160
252b5132 4161static void
99a814a1 4162ppc_ydata (ignore)
5480ccf3 4163 int ignore ATTRIBUTE_UNUSED;
252b5132 4164{
81d4177b 4165 if (ydata_section == 0)
252b5132
RH		 4166 {
4167 ydata_section = subseg_new (".ydata", 0);
4168 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 4169 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4170 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 4171
4172 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4173 }
4174 else
4175 {
4176 ydata_section = subseg_new (".ydata", 0);
4177 }
99a814a1 4178 ppc_set_current_section (ydata_section);
252b5132
RH		 4179}
4180
4181/* pseudo-op: .reldata
4182 behaviour: predefined read write data section
b34976b6 4183 double word aligned (4-byte)
252b5132
RH		 4184 FIXME: relocation is applied to it
4185 FIXME: what's the difference between this and .data?
4186 errors: None
4187 warnings: None
4188 initial: .section .reldata "drw3"
4189 d - initialized data
4190 r - readable
4191 w - writeable
4192 3 - double word aligned (that would be 8 byte boundary)
4193
4194 commentary:
4195 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 4196 function descriptors, etc. */
4197
252b5132 4198static void
99a814a1 4199ppc_reldata (ignore)
5480ccf3 4200 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4201{
4202 if (reldata_section == 0)
4203 {
4204 reldata_section = subseg_new (".reldata", 0);
4205
4206 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 4207 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4208 | SEC_DATA));
252b5132
RH		 4209
4210 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4211 }
4212 else
4213 {
4214 reldata_section = subseg_new (".reldata", 0);
4215 }
99a814a1 4216 ppc_set_current_section (reldata_section);
252b5132
RH		 4217}
4218
4219/* pseudo-op: .rdata
4220 behaviour: predefined read only data section
b34976b6 4221 double word aligned
252b5132
RH		 4222 errors: None
4223 warnings: None
4224 initial: .section .rdata "dr3"
4225 d - initialized data
4226 r - readable
99a814a1
AM		 4227 3 - double word aligned (that would be 4 byte boundary) */
4228
252b5132 4229static void
99a814a1 4230ppc_rdata (ignore)
5480ccf3 4231 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4232{
4233 if (rdata_section == 0)
4234 {
4235 rdata_section = subseg_new (".rdata", 0);
4236 bfd_set_section_flags (stdoutput, rdata_section,
4237 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4238 | SEC_READONLY | SEC_DATA ));
4239
4240 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4241 }
4242 else
4243 {
4244 rdata_section = subseg_new (".rdata", 0);
4245 }
99a814a1 4246 ppc_set_current_section (rdata_section);
252b5132
RH		 4247}
4248
4249/* pseudo-op: .ualong
81d4177b 4250 behaviour: much like .int, with the exception that no alignment is
b34976b6 4251 performed.
252b5132
RH		 4252 FIXME: test the alignment statement
4253 errors: None
99a814a1
AM		 4254 warnings: None */
4255
252b5132 4256static void
99a814a1 4257ppc_ualong (ignore)
5480ccf3 4258 int ignore ATTRIBUTE_UNUSED;
252b5132 4259{
99a814a1
AM		 4260 /* Try for long. */
4261 cons (4);
252b5132
RH		 4262}
4263
4264/* pseudo-op: .znop <symbol name>
4265 behaviour: Issue a nop instruction
b34976b6 4266 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 4267 the supplied symbol name.
4268 errors: None
99a814a1
AM		 4269 warnings: Missing symbol name */
4270
252b5132 4271static void
99a814a1 4272ppc_znop (ignore)
5480ccf3 4273 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4274{
4275 unsigned long insn;
4276 const struct powerpc_opcode *opcode;
4277 expressionS ex;
4278 char *f;
252b5132 4279 symbolS *sym;
252b5132
RH		 4280 char *symbol_name;
4281 char c;
4282 char *name;
4283 unsigned int exp;
4284 flagword flags;
4285 asection *sec;
4286
99a814a1 4287 /* Strip out the symbol name. */
252b5132
RH		 4288 symbol_name = input_line_pointer;
4289 c = get_symbol_end ();
4290
4291 name = xmalloc (input_line_pointer - symbol_name + 1);
4292 strcpy (name, symbol_name);
4293
4294 sym = symbol_find_or_make (name);
4295
4296 *input_line_pointer = c;
4297
4298 SKIP_WHITESPACE ();
4299
4300 /* Look up the opcode in the hash table. */
4301 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4302
99a814a1 4303 /* Stick in the nop. */
252b5132
RH		 4304 insn = opcode->opcode;
4305
4306 /* Write out the instruction. */
4307 f = frag_more (4);
4308 md_number_to_chars (f, insn, 4);
4309 fix_new (frag_now,
4310 f - frag_now->fr_literal,
4311 4,
4312 sym,
4313 0,
4314 0,
4315 BFD_RELOC_16_GOT_PCREL);
4316
4317}
4318
81d4177b
KH		 4319/* pseudo-op:
4320 behaviour:
4321 errors:
99a814a1
AM		 4322 warnings: */
4323
252b5132 4324static void
99a814a1 4325ppc_pe_comm (lcomm)
252b5132
RH		 4326 int lcomm;
4327{
4328 register char *name;
4329 register char c;
4330 register char *p;
4331 offsetT temp;
4332 register symbolS *symbolP;
4333 offsetT align;
4334
4335 name = input_line_pointer;
4336 c = get_symbol_end ();
4337
99a814a1 4338 /* just after name is now '\0'. */
252b5132
RH		 4339 p = input_line_pointer;
4340 *p = c;
4341 SKIP_WHITESPACE ();
4342 if (*input_line_pointer != ',')
4343 {
4344 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4345 ignore_rest_of_line ();
4346 return;
4347 }
4348
4349 input_line_pointer++; /* skip ',' */
4350 if ((temp = get_absolute_expression ()) < 0)
4351 {
4352 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4353 ignore_rest_of_line ();
4354 return;
4355 }
4356
4357 if (! lcomm)
4358 {
4359 /* The third argument to .comm is the alignment. */
4360 if (*input_line_pointer != ',')
4361 align = 3;
4362 else
4363 {
4364 ++input_line_pointer;
4365 align = get_absolute_expression ();
4366 if (align <= 0)
4367 {
4368 as_warn (_("ignoring bad alignment"));
4369 align = 3;
4370 }
4371 }
4372 }
4373
4374 *p = 0;
4375 symbolP = symbol_find_or_make (name);
4376
4377 *p = c;
4378 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4379 {
4380 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4381 S_GET_NAME (symbolP));
4382 ignore_rest_of_line ();
4383 return;
4384 }
4385
4386 if (S_GET_VALUE (symbolP))
4387 {
4388 if (S_GET_VALUE (symbolP) != (valueT) temp)
4389 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4390 S_GET_NAME (symbolP),
4391 (long) S_GET_VALUE (symbolP),
4392 (long) temp);
4393 }
4394 else
4395 {
4396 S_SET_VALUE (symbolP, (valueT) temp);
4397 S_SET_EXTERNAL (symbolP);
4398 }
4399
4400 demand_empty_rest_of_line ();
4401}
4402
4403/*
4404 * implement the .section pseudo op:
4405 * .section name {, "flags"}
4406 * ^ ^
4407 * | +--- optional flags: 'b' for bss
4408 * | 'i' for info
4409 * +-- section name 'l' for lib
4410 * 'n' for noload
4411 * 'o' for over
4412 * 'w' for data
4413 * 'd' (apparently m88k for data)
4414 * 'x' for text
4415 * But if the argument is not a quoted string, treat it as a
4416 * subsegment number.
4417 *
4418 * FIXME: this is a copy of the section processing from obj-coff.c, with
4419 * additions/changes for the moto-pas assembler support. There are three
4420 * categories:
4421 *
81d4177b 4422 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 4423 * setting bits that bfd probably neither understands or uses. The
4424 * correct approach (?) will have to incorporate extra fields attached
4425 * to the section to hold the system specific stuff. (krk)
4426 *
4427 * Section Contents:
4428 * 'a' - unknown - referred to in documentation, but no definition supplied
4429 * 'c' - section has code
4430 * 'd' - section has initialized data
4431 * 'u' - section has uninitialized data
4432 * 'i' - section contains directives (info)
4433 * 'n' - section can be discarded
4434 * 'R' - remove section at link time
4435 *
4436 * Section Protection:
4437 * 'r' - section is readable
4438 * 'w' - section is writeable
4439 * 'x' - section is executable
4440 * 's' - section is sharable
4441 *
4442 * Section Alignment:
4443 * '0' - align to byte boundary
4444 * '1' - align to halfword undary
4445 * '2' - align to word boundary
4446 * '3' - align to doubleword boundary
4447 * '4' - align to quadword boundary
4448 * '5' - align to 32 byte boundary
4449 * '6' - align to 64 byte boundary
4450 *
4451 */
4452
4453void
4454ppc_pe_section (ignore)
5480ccf3 4455 int ignore ATTRIBUTE_UNUSED;
252b5132 4456{
99a814a1 4457 /* Strip out the section name. */
252b5132
RH		 4458 char *section_name;
4459 char c;
4460 char *name;
4461 unsigned int exp;
4462 flagword flags;
4463 segT sec;
4464 int align;
4465
4466 section_name = input_line_pointer;
4467 c = get_symbol_end ();
4468
4469 name = xmalloc (input_line_pointer - section_name + 1);
4470 strcpy (name, section_name);
4471
4472 *input_line_pointer = c;
4473
4474 SKIP_WHITESPACE ();
4475
4476 exp = 0;
4477 flags = SEC_NO_FLAGS;
4478
4479 if (strcmp (name, ".idata$2") == 0)
4480 {
4481 align = 0;
4482 }
4483 else if (strcmp (name, ".idata$3") == 0)
4484 {
4485 align = 0;
4486 }
4487 else if (strcmp (name, ".idata$4") == 0)
4488 {
4489 align = 2;
4490 }
4491 else if (strcmp (name, ".idata$5") == 0)
4492 {
4493 align = 2;
4494 }
4495 else if (strcmp (name, ".idata$6") == 0)
4496 {
4497 align = 1;
4498 }
4499 else
99a814a1
AM		 4500 /* Default alignment to 16 byte boundary. */
4501 align = 4;
252b5132
RH		 4502
4503 if (*input_line_pointer == ',')
4504 {
4505 ++input_line_pointer;
4506 SKIP_WHITESPACE ();
4507 if (*input_line_pointer != '"')
4508 exp = get_absolute_expression ();
4509 else
4510 {
4511 ++input_line_pointer;
4512 while (*input_line_pointer != '"'
4513 && ! is_end_of_line[(unsigned char) *input_line_pointer])
4514 {
4515 switch (*input_line_pointer)
4516 {
4517 /* Section Contents */
4518 case 'a': /* unknown */
4519 as_bad (_("Unsupported section attribute -- 'a'"));
4520 break;
4521 case 'c': /* code section */
81d4177b 4522 flags |= SEC_CODE;
252b5132
RH		 4523 break;
4524 case 'd': /* section has initialized data */
4525 flags |= SEC_DATA;
4526 break;
4527 case 'u': /* section has uninitialized data */
4528 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
4529 in winnt.h */
4530 flags |= SEC_ROM;
4531 break;
4532 case 'i': /* section contains directives (info) */
4533 /* FIXME: This is IMAGE_SCN_LNK_INFO
4534 in winnt.h */
4535 flags |= SEC_HAS_CONTENTS;
4536 break;
4537 case 'n': /* section can be discarded */
81d4177b 4538 flags &=~ SEC_LOAD;
252b5132
RH		 4539 break;
4540 case 'R': /* Remove section at link time */
4541 flags |= SEC_NEVER_LOAD;
4542 break;
4543
4544 /* Section Protection */
4545 case 'r': /* section is readable */
4546 flags |= IMAGE_SCN_MEM_READ;
4547 break;
4548 case 'w': /* section is writeable */
4549 flags |= IMAGE_SCN_MEM_WRITE;
4550 break;
4551 case 'x': /* section is executable */
4552 flags |= IMAGE_SCN_MEM_EXECUTE;
4553 break;
4554 case 's': /* section is sharable */
4555 flags |= IMAGE_SCN_MEM_SHARED;
4556 break;
4557
4558 /* Section Alignment */
4559 case '0': /* align to byte boundary */
4560 flags |= IMAGE_SCN_ALIGN_1BYTES;
4561 align = 0;
4562 break;
4563 case '1': /* align to halfword boundary */
4564 flags |= IMAGE_SCN_ALIGN_2BYTES;
4565 align = 1;
4566 break;
4567 case '2': /* align to word boundary */
4568 flags |= IMAGE_SCN_ALIGN_4BYTES;
4569 align = 2;
4570 break;
4571 case '3': /* align to doubleword boundary */
4572 flags |= IMAGE_SCN_ALIGN_8BYTES;
4573 align = 3;
4574 break;
4575 case '4': /* align to quadword boundary */
4576 flags |= IMAGE_SCN_ALIGN_16BYTES;
4577 align = 4;
4578 break;
4579 case '5': /* align to 32 byte boundary */
4580 flags |= IMAGE_SCN_ALIGN_32BYTES;
4581 align = 5;
4582 break;
4583 case '6': /* align to 64 byte boundary */
4584 flags |= IMAGE_SCN_ALIGN_64BYTES;
4585 align = 6;
4586 break;
4587
4588 default:
99a814a1
AM		 4589 as_bad (_("unknown section attribute '%c'"),
4590 *input_line_pointer);
252b5132
RH		 4591 break;
4592 }
4593 ++input_line_pointer;
4594 }
4595 if (*input_line_pointer == '"')
4596 ++input_line_pointer;
4597 }
4598 }
4599
4600 sec = subseg_new (name, (subsegT) exp);
4601
99a814a1 4602 ppc_set_current_section (sec);
252b5132
RH		 4603
4604 if (flags != SEC_NO_FLAGS)
4605 {
4606 if (! bfd_set_section_flags (stdoutput, sec, flags))
4607 as_bad (_("error setting flags for \"%s\": %s"),
4608 bfd_section_name (stdoutput, sec),
4609 bfd_errmsg (bfd_get_error ()));
4610 }
4611
99a814a1 4612 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 4613
4614}
4615
4616static void
4617ppc_pe_function (ignore)
5480ccf3 4618 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4619{
4620 char *name;
4621 char endc;
4622 symbolS *ext_sym;
4623
4624 name = input_line_pointer;
4625 endc = get_symbol_end ();
4626
4627 ext_sym = symbol_find_or_make (name);
4628
4629 *input_line_pointer = endc;
4630
4631 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4632 SF_SET_FUNCTION (ext_sym);
4633 SF_SET_PROCESS (ext_sym);
4634 coff_add_linesym (ext_sym);
4635
4636 demand_empty_rest_of_line ();
4637}
4638
4639static void
4640ppc_pe_tocd (ignore)
5480ccf3 4641 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4642{
4643 if (tocdata_section == 0)
4644 {
4645 tocdata_section = subseg_new (".tocd", 0);
99a814a1 4646 /* FIXME: section flags won't work. */
252b5132
RH		 4647 bfd_set_section_flags (stdoutput, tocdata_section,
4648 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 4649 | SEC_READONLY | SEC_DATA));
252b5132
RH		 4650
4651 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
4652 }
4653 else
4654 {
4655 rdata_section = subseg_new (".tocd", 0);
4656 }
4657
99a814a1 4658 ppc_set_current_section (tocdata_section);
252b5132
RH		 4659
4660 demand_empty_rest_of_line ();
4661}
4662
4663/* Don't adjust TOC relocs to use the section symbol. */
4664
4665int
4666ppc_pe_fix_adjustable (fix)
4667 fixS *fix;
4668{
4669 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
4670}
4671
4672#endif
4673\f
4674#ifdef OBJ_XCOFF
4675
4676/* XCOFF specific symbol and file handling. */
4677
4678/* Canonicalize the symbol name. We use the to force the suffix, if
4679 any, to use square brackets, and to be in upper case. */
4680
4681char *
4682ppc_canonicalize_symbol_name (name)
4683 char *name;
4684{
4685 char *s;
4686
4687 if (ppc_stab_symbol)
4688 return name;
4689
4690 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
4691 ;
4692 if (*s != '\0')
4693 {
4694 char brac;
4695
4696 if (*s == '[')
4697 brac = ']';
4698 else
4699 {
4700 *s = '[';
4701 brac = '}';
4702 }
4703
4704 for (s++; *s != '\0' && *s != brac; s++)
3882b010 4705 *s = TOUPPER (*s);
252b5132
RH		 4706
4707 if (*s == '\0' || s[1] != '\0')
4708 as_bad (_("bad symbol suffix"));
4709
4710 *s = ']';
4711 }
4712
4713 return name;
4714}
4715
4716/* Set the class of a symbol based on the suffix, if any. This is
4717 called whenever a new symbol is created. */
4718
4719void
4720ppc_symbol_new_hook (sym)
4721 symbolS *sym;
4722{
809ffe0d 4723 struct ppc_tc_sy *tc;
252b5132
RH		 4724 const char *s;
4725
809ffe0d
ILT		 4726 tc = symbol_get_tc (sym);
4727 tc->next = NULL;
4728 tc->output = 0;
4729 tc->class = -1;
4730 tc->real_name = NULL;
4731 tc->subseg = 0;
4732 tc->align = 0;
4733 tc->size = NULL;
4734 tc->within = NULL;
252b5132
RH		 4735
4736 if (ppc_stab_symbol)
4737 return;
4738
4739 s = strchr (S_GET_NAME (sym), '[');
4740 if (s == (const char *) NULL)
4741 {
4742 /* There is no suffix. */
4743 return;
4744 }
4745
4746 ++s;
4747
4748 switch (s[0])
4749 {
4750 case 'B':
4751 if (strcmp (s, "BS]") == 0)
809ffe0d 4752 tc->class = XMC_BS;
252b5132
RH		 4753 break;
4754 case 'D':
4755 if (strcmp (s, "DB]") == 0)
809ffe0d 4756 tc->class = XMC_DB;
252b5132 4757 else if (strcmp (s, "DS]") == 0)
809ffe0d 4758 tc->class = XMC_DS;
252b5132
RH		 4759 break;
4760 case 'G':
4761 if (strcmp (s, "GL]") == 0)
809ffe0d 4762 tc->class = XMC_GL;
252b5132
RH		 4763 break;
4764 case 'P':
4765 if (strcmp (s, "PR]") == 0)
809ffe0d 4766 tc->class = XMC_PR;
252b5132
RH		 4767 break;
4768 case 'R':
4769 if (strcmp (s, "RO]") == 0)
809ffe0d 4770 tc->class = XMC_RO;
252b5132 4771 else if (strcmp (s, "RW]") == 0)
809ffe0d 4772 tc->class = XMC_RW;
252b5132
RH		 4773 break;
4774 case 'S':
4775 if (strcmp (s, "SV]") == 0)
809ffe0d 4776 tc->class = XMC_SV;
252b5132
RH		 4777 break;
4778 case 'T':
4779 if (strcmp (s, "TC]") == 0)
809ffe0d 4780 tc->class = XMC_TC;
252b5132 4781 else if (strcmp (s, "TI]") == 0)
809ffe0d 4782 tc->class = XMC_TI;
252b5132 4783 else if (strcmp (s, "TB]") == 0)
809ffe0d 4784 tc->class = XMC_TB;
252b5132 4785 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
809ffe0d 4786 tc->class = XMC_TC0;
252b5132
RH		 4787 break;
4788 case 'U':
4789 if (strcmp (s, "UA]") == 0)
809ffe0d 4790 tc->class = XMC_UA;
252b5132 4791 else if (strcmp (s, "UC]") == 0)
809ffe0d 4792 tc->class = XMC_UC;
252b5132
RH		 4793 break;
4794 case 'X':
4795 if (strcmp (s, "XO]") == 0)
809ffe0d 4796 tc->class = XMC_XO;
252b5132
RH		 4797 break;
4798 }
4799
809ffe0d 4800 if (tc->class == -1)
252b5132
RH		 4801 as_bad (_("Unrecognized symbol suffix"));
4802}
4803
4804/* Set the class of a label based on where it is defined. This
4805 handles symbols without suffixes. Also, move the symbol so that it
4806 follows the csect symbol. */
4807
4808void
4809ppc_frob_label (sym)
4810 symbolS *sym;
4811{
4812 if (ppc_current_csect != (symbolS *) NULL)
4813 {
809ffe0d
ILT		 4814 if (symbol_get_tc (sym)->class == -1)
4815 symbol_get_tc (sym)->class = symbol_get_tc (ppc_current_csect)->class;
252b5132
RH		 4816
4817 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4818 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
4819 &symbol_rootP, &symbol_lastP);
4820 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 4821 }
4822}
4823
4824/* This variable is set by ppc_frob_symbol if any absolute symbols are
4825 seen. It tells ppc_adjust_symtab whether it needs to look through
4826 the symbols. */
4827
b34976b6 4828static bfd_boolean ppc_saw_abs;
252b5132
RH		 4829
4830/* Change the name of a symbol just before writing it out. Set the
4831 real name if the .rename pseudo-op was used. Otherwise, remove any
4832 class suffix. Return 1 if the symbol should not be included in the
4833 symbol table. */
4834
4835int
4836ppc_frob_symbol (sym)
4837 symbolS *sym;
4838{
4839 static symbolS *ppc_last_function;
4840 static symbolS *set_end;
4841
4842 /* Discard symbols that should not be included in the output symbol
4843 table. */
809ffe0d
ILT		 4844 if (! symbol_used_in_reloc_p (sym)
4845 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
252b5132 4846 || (! S_IS_EXTERNAL (sym)
809ffe0d 4847 && ! symbol_get_tc (sym)->output
252b5132
RH		 4848 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
4849 return 1;
4850
a161fe53
AM		 4851 /* This one will disappear anyway. Don't make a csect sym for it. */
4852 if (sym == abs_section_sym)
4853 return 1;
4854
809ffe0d
ILT		 4855 if (symbol_get_tc (sym)->real_name != (char *) NULL)
4856 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 4857 else
4858 {
4859 const char *name;
4860 const char *s;
4861
4862 name = S_GET_NAME (sym);
4863 s = strchr (name, '[');
4864 if (s != (char *) NULL)
4865 {
4866 unsigned int len;
4867 char *snew;
4868
4869 len = s - name;
4870 snew = xmalloc (len + 1);
4871 memcpy (snew, name, len);
4872 snew[len] = '\0';
4873
4874 S_SET_NAME (sym, snew);
4875 }
4876 }
4877
4878 if (set_end != (symbolS *) NULL)
4879 {
4880 SA_SET_SYM_ENDNDX (set_end, sym);
4881 set_end = NULL;
4882 }
4883
4884 if (SF_GET_FUNCTION (sym))
4885 {
4886 if (ppc_last_function != (symbolS *) NULL)
4887 as_bad (_("two .function pseudo-ops with no intervening .ef"));
4888 ppc_last_function = sym;
809ffe0d 4889 if (symbol_get_tc (sym)->size != (symbolS *) NULL)
252b5132 4890 {
6386f3a7 4891 resolve_symbol_value (symbol_get_tc (sym)->size);
809ffe0d
ILT		 4892 SA_SET_SYM_FSIZE (sym,
4893 (long) S_GET_VALUE (symbol_get_tc (sym)->size));
252b5132
RH		 4894 }
4895 }
4896 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
4897 && strcmp (S_GET_NAME (sym), ".ef") == 0)
4898 {
4899 if (ppc_last_function == (symbolS *) NULL)
4900 as_bad (_(".ef with no preceding .function"));
4901 else
4902 {
4903 set_end = ppc_last_function;
4904 ppc_last_function = NULL;
4905
4906 /* We don't have a C_EFCN symbol, but we need to force the
4907 COFF backend to believe that it has seen one. */
4908 coff_last_function = NULL;
4909 }
4910 }
4911
4912 if (! S_IS_EXTERNAL (sym)
809ffe0d 4913 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 4914 && S_GET_STORAGE_CLASS (sym) != C_FILE
4915 && S_GET_STORAGE_CLASS (sym) != C_FCN
4916 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
4917 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
4918 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
4919 && S_GET_STORAGE_CLASS (sym) != C_BINCL
4920 && S_GET_STORAGE_CLASS (sym) != C_EINCL
4921 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
4922 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
4923
4924 if (S_GET_STORAGE_CLASS (sym) == C_EXT
4925 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
4926 {
4927 int i;
4928 union internal_auxent *a;
4929
4930 /* Create a csect aux. */
4931 i = S_GET_NUMBER_AUXILIARY (sym);
4932 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d
ILT		 4933 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
4934 if (symbol_get_tc (sym)->class == XMC_TC0)
252b5132
RH		 4935 {
4936 /* This is the TOC table. */
4937 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
4938 a->x_csect.x_scnlen.l = 0;
4939 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
4940 }
809ffe0d 4941 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 4942 {
4943 /* This is a csect symbol. x_scnlen is the size of the
4944 csect. */
809ffe0d 4945 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 4946 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
4947 S_GET_SEGMENT (sym))
4948 - S_GET_VALUE (sym));
4949 else
4950 {
6386f3a7 4951 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 4952 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 4953 - S_GET_VALUE (sym));
4954 }
809ffe0d 4955 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 4956 }
4957 else if (S_GET_SEGMENT (sym) == bss_section)
4958 {
4959 /* This is a common symbol. */
809ffe0d
ILT		 4960 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
4961 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 4962 if (S_IS_EXTERNAL (sym))
809ffe0d 4963 symbol_get_tc (sym)->class = XMC_RW;
252b5132 4964 else
809ffe0d 4965 symbol_get_tc (sym)->class = XMC_BS;
252b5132
RH		 4966 }
4967 else if (S_GET_SEGMENT (sym) == absolute_section)
4968 {
4969 /* This is an absolute symbol. The csect will be created by
99a814a1 4970 ppc_adjust_symtab. */
b34976b6 4971 ppc_saw_abs = TRUE;
252b5132 4972 a->x_csect.x_smtyp = XTY_LD;
809ffe0d
ILT		 4973 if (symbol_get_tc (sym)->class == -1)
4974 symbol_get_tc (sym)->class = XMC_XO;
252b5132
RH		 4975 }
4976 else if (! S_IS_DEFINED (sym))
4977 {
4978 /* This is an external symbol. */
4979 a->x_csect.x_scnlen.l = 0;
4980 a->x_csect.x_smtyp = XTY_ER;
4981 }
809ffe0d 4982 else if (symbol_get_tc (sym)->class == XMC_TC)
252b5132
RH		 4983 {
4984 symbolS *next;
4985
4986 /* This is a TOC definition. x_scnlen is the size of the
4987 TOC entry. */
4988 next = symbol_next (sym);
809ffe0d 4989 while (symbol_get_tc (next)->class == XMC_TC0)
252b5132
RH		 4990 next = symbol_next (next);
4991 if (next == (symbolS *) NULL
809ffe0d 4992 || symbol_get_tc (next)->class != XMC_TC)
252b5132
RH		 4993 {
4994 if (ppc_after_toc_frag == (fragS *) NULL)
4995 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
4996 data_section)
4997 - S_GET_VALUE (sym));
4998 else
4999 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5000 - S_GET_VALUE (sym));
5001 }
5002 else
5003 {
6386f3a7 5004 resolve_symbol_value (next);
252b5132
RH		 5005 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5006 - S_GET_VALUE (sym));
5007 }
5008 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5009 }
5010 else
5011 {
5012 symbolS *csect;
5013
5014 /* This is a normal symbol definition. x_scnlen is the
5015 symbol index of the containing csect. */
5016 if (S_GET_SEGMENT (sym) == text_section)
5017 csect = ppc_text_csects;
5018 else if (S_GET_SEGMENT (sym) == data_section)
5019 csect = ppc_data_csects;
5020 else
5021 abort ();
5022
5023 /* Skip the initial dummy symbol. */
809ffe0d 5024 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5025
5026 if (csect == (symbolS *) NULL)
5027 {
5028 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5029 a->x_csect.x_scnlen.l = 0;
5030 }
5031 else
5032 {
809ffe0d 5033 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5034 {
6386f3a7 5035 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5036 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5037 > S_GET_VALUE (sym))
252b5132 5038 break;
809ffe0d 5039 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5040 }
5041
809ffe0d
ILT		 5042 a->x_csect.x_scnlen.p =
5043 coffsymbol (symbol_get_bfdsym (csect))->native;
5044 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5045 1;
252b5132
RH		 5046 }
5047 a->x_csect.x_smtyp = XTY_LD;
5048 }
81d4177b 5049
252b5132
RH		 5050 a->x_csect.x_parmhash = 0;
5051 a->x_csect.x_snhash = 0;
809ffe0d 5052 if (symbol_get_tc (sym)->class == -1)
252b5132
RH		 5053 a->x_csect.x_smclas = XMC_PR;
5054 else
809ffe0d 5055 a->x_csect.x_smclas = symbol_get_tc (sym)->class;
252b5132
RH		 5056 a->x_csect.x_stab = 0;
5057 a->x_csect.x_snstab = 0;
5058
5059 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5060 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5061 }
5062 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5063 {
5064 /* We want the value to be the symbol index of the referenced
5065 csect symbol. BFD will do that for us if we set the right
5066 flags. */
b782de16
AM		 5067 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5068 combined_entry_type *c = coffsymbol (bsym)->native;
5069
5070 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5071 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5072 }
5073 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5074 {
5075 symbolS *block;
5076 symbolS *csect;
5077
5078 /* The value is the offset from the enclosing csect. */
809ffe0d
ILT		 5079 block = symbol_get_tc (sym)->within;
5080 csect = symbol_get_tc (block)->within;
6386f3a7 5081 resolve_symbol_value (csect);
252b5132
RH		 5082 S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
5083 }
5084 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5085 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5086 {
5087 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 5088 BFD will do that for us if we set the right flags. We have
5089 already set the value correctly. */
809ffe0d 5090 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 5091 }
5092
5093 return 0;
5094}
5095
5096/* Adjust the symbol table. This creates csect symbols for all
5097 absolute symbols. */
5098
5099void
5100ppc_adjust_symtab ()
5101{
5102 symbolS *sym;
5103
5104 if (! ppc_saw_abs)
5105 return;
5106
5107 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5108 {
5109 symbolS *csect;
5110 int i;
5111 union internal_auxent *a;
5112
5113 if (S_GET_SEGMENT (sym) != absolute_section)
5114 continue;
5115
5116 csect = symbol_create (".abs[XO]", absolute_section,
5117 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5118 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 5119 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5120 i = S_GET_NUMBER_AUXILIARY (csect);
5121 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5122 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 5123 a->x_csect.x_scnlen.l = 0;
5124 a->x_csect.x_smtyp = XTY_SD;
5125 a->x_csect.x_parmhash = 0;
5126 a->x_csect.x_snhash = 0;
5127 a->x_csect.x_smclas = XMC_XO;
5128 a->x_csect.x_stab = 0;
5129 a->x_csect.x_snstab = 0;
5130
5131 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5132
5133 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 5134 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5135 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5136 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 5137 }
5138
b34976b6 5139 ppc_saw_abs = FALSE;
252b5132
RH		 5140}
5141
5142/* Set the VMA for a section. This is called on all the sections in
5143 turn. */
5144
5145void
5146ppc_frob_section (sec)
5147 asection *sec;
5148{
931e13a6 5149 static bfd_vma vma = 0;
252b5132 5150
931e13a6 5151 vma = md_section_align (sec, vma);
252b5132
RH		 5152 bfd_set_section_vma (stdoutput, sec, vma);
5153 vma += bfd_section_size (stdoutput, sec);
5154}
5155
5156#endif /* OBJ_XCOFF */
5157\f
5158/* Turn a string in input_line_pointer into a floating point constant
bc0d738a
NC		 5159 of type TYPE, and store the appropriate bytes in *LITP. The number
5160 of LITTLENUMS emitted is stored in *SIZEP. An error message is
252b5132
RH		 5161 returned, or NULL on OK. */
5162
5163char *
5164md_atof (type, litp, sizep)
5165 int type;
5166 char *litp;
5167 int *sizep;
5168{
5169 int prec;
5170 LITTLENUM_TYPE words[4];
5171 char *t;
5172 int i;
5173
5174 switch (type)
5175 {
5176 case 'f':
5177 prec = 2;
5178 break;
5179
5180 case 'd':
5181 prec = 4;
5182 break;
5183
5184 default:
5185 *sizep = 0;
5186 return _("bad call to md_atof");
5187 }
5188
5189 t = atof_ieee (input_line_pointer, type, words);
5190 if (t)
5191 input_line_pointer = t;
5192
5193 *sizep = prec * 2;
5194
5195 if (target_big_endian)
5196 {
5197 for (i = 0; i < prec; i++)
5198 {
5199 md_number_to_chars (litp, (valueT) words[i], 2);
5200 litp += 2;
5201 }
5202 }
5203 else
5204 {
5205 for (i = prec - 1; i >= 0; i--)
5206 {
5207 md_number_to_chars (litp, (valueT) words[i], 2);
5208 litp += 2;
5209 }
5210 }
81d4177b 5211
252b5132
RH		 5212 return NULL;
5213}
5214
5215/* Write a value out to the object file, using the appropriate
5216 endianness. */
5217
5218void
5219md_number_to_chars (buf, val, n)
5220 char *buf;
5221 valueT val;
5222 int n;
5223{
5224 if (target_big_endian)
5225 number_to_chars_bigendian (buf, val, n);
5226 else
5227 number_to_chars_littleendian (buf, val, n);
5228}
5229
5230/* Align a section (I don't know why this is machine dependent). */
5231
5232valueT
5233md_section_align (seg, addr)
5234 asection *seg;
5235 valueT addr;
5236{
5237 int align = bfd_get_section_alignment (stdoutput, seg);
5238
5239 return ((addr + (1 << align) - 1) & (-1 << align));
5240}
5241
5242/* We don't have any form of relaxing. */
5243
5244int
5245md_estimate_size_before_relax (fragp, seg)
92161534
ILT		 5246 fragS *fragp ATTRIBUTE_UNUSED;
5247 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH		 5248{
5249 abort ();
5250 return 0;
5251}
5252
5253/* Convert a machine dependent frag. We never generate these. */
5254
5255void
5256md_convert_frag (abfd, sec, fragp)
92161534
ILT		 5257 bfd *abfd ATTRIBUTE_UNUSED;
5258 asection *sec ATTRIBUTE_UNUSED;
5259 fragS *fragp ATTRIBUTE_UNUSED;
252b5132
RH		 5260{
5261 abort ();
5262}
5263
5264/* We have no need to default values of symbols. */
5265
252b5132
RH		 5266symbolS *
5267md_undefined_symbol (name)
92161534 5268 char *name ATTRIBUTE_UNUSED;
252b5132
RH		 5269{
5270 return 0;
5271}
5272\f
5273/* Functions concerning relocs. */
5274
5275/* The location from which a PC relative jump should be calculated,
5276 given a PC relative reloc. */
5277
5278long
5279md_pcrel_from_section (fixp, sec)
5280 fixS *fixp;
92161534 5281 segT sec ATTRIBUTE_UNUSED;
252b5132
RH		 5282{
5283 return fixp->fx_frag->fr_address + fixp->fx_where;
5284}
5285
5286#ifdef OBJ_XCOFF
5287
5288/* This is called to see whether a fixup should be adjusted to use a
5289 section symbol. We take the opportunity to change a fixup against
5290 a symbol in the TOC subsegment into a reloc against the
5291 corresponding .tc symbol. */
5292
5293int
5294ppc_fix_adjustable (fix)
5295 fixS *fix;
5296{
b782de16
AM		 5297 valueT val = resolve_symbol_value (fix->fx_addsy);
5298 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5299 TC_SYMFIELD_TYPE *tc;
5300
5301 if (symseg == absolute_section)
5302 return 0;
252b5132 5303
252b5132 5304 if (ppc_toc_csect != (symbolS *) NULL
252b5132 5305 && fix->fx_addsy != ppc_toc_csect
b782de16 5306 && symseg == data_section
252b5132
RH		 5307 && val >= ppc_toc_frag->fr_address
5308 && (ppc_after_toc_frag == (fragS *) NULL
5309 || val < ppc_after_toc_frag->fr_address))
5310 {
5311 symbolS *sy;
5312
5313 for (sy = symbol_next (ppc_toc_csect);
5314 sy != (symbolS *) NULL;
5315 sy = symbol_next (sy))
5316 {
b782de16
AM		 5317 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5318
5319 if (sy_tc->class == XMC_TC0)
252b5132 5320 continue;
b782de16 5321 if (sy_tc->class != XMC_TC)
252b5132 5322 break;
b782de16 5323 if (val == resolve_symbol_value (sy))
252b5132
RH		 5324 {
5325 fix->fx_addsy = sy;
5326 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5327 return 0;
5328 }
5329 }
5330
5331 as_bad_where (fix->fx_file, fix->fx_line,
5332 _("symbol in .toc does not match any .tc"));
5333 }
5334
5335 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 5336 tc = symbol_get_tc (fix->fx_addsy);
5337 if (tc->subseg == 0
5338 && tc->class != XMC_TC0
5339 && tc->class != XMC_TC
5340 && symseg != bss_section
252b5132 5341 /* Don't adjust if this is a reloc in the toc section. */
b782de16 5342 && (symseg != data_section
252b5132
RH		 5343 || ppc_toc_csect == NULL
5344 || val < ppc_toc_frag->fr_address
5345 || (ppc_after_toc_frag != NULL
5346 && val >= ppc_after_toc_frag->fr_address)))
5347 {
5348 symbolS *csect;
b782de16 5349 symbolS *next_csect;
252b5132 5350
b782de16 5351 if (symseg == text_section)
252b5132 5352 csect = ppc_text_csects;
b782de16 5353 else if (symseg == data_section)
252b5132
RH		 5354 csect = ppc_data_csects;
5355 else
5356 abort ();
5357
5358 /* Skip the initial dummy symbol. */
809ffe0d 5359 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5360
5361 if (csect != (symbolS *) NULL)
5362 {
b782de16
AM		 5363 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5364 && (symbol_get_frag (next_csect)->fr_address <= val))
252b5132
RH		 5365 {
5366 /* If the csect address equals the symbol value, then we
99a814a1
AM		 5367 have to look through the full symbol table to see
5368 whether this is the csect we want. Note that we will
5369 only get here if the csect has zero length. */
b782de16
AM		 5370 if (symbol_get_frag (csect)->fr_address == val
5371 && S_GET_VALUE (csect) == val)
252b5132
RH		 5372 {
5373 symbolS *scan;
5374
809ffe0d 5375 for (scan = symbol_next (csect);
252b5132 5376 scan != NULL;
809ffe0d 5377 scan = symbol_next (scan))
252b5132 5378 {
809ffe0d 5379 if (symbol_get_tc (scan)->subseg != 0)
252b5132
RH		 5380 break;
5381 if (scan == fix->fx_addsy)
5382 break;
5383 }
5384
5385 /* If we found the symbol before the next csect
99a814a1 5386 symbol, then this is the csect we want. */
252b5132
RH		 5387 if (scan == fix->fx_addsy)
5388 break;
5389 }
5390
b782de16 5391 csect = next_csect;
252b5132
RH		 5392 }
5393
b782de16 5394 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
252b5132
RH		 5395 fix->fx_addsy = csect;
5396 }
b782de16 5397 return 0;
252b5132
RH		 5398 }
5399
5400 /* Adjust a reloc against a .lcomm symbol to be against the base
5401 .lcomm. */
b782de16 5402 if (symseg == bss_section
252b5132
RH		 5403 && ! S_IS_EXTERNAL (fix->fx_addsy))
5404 {
b782de16
AM		 5405 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5406
5407 fix->fx_offset += val - resolve_symbol_value (sy);
5408 fix->fx_addsy = sy;
252b5132
RH		 5409 }
5410
5411 return 0;
5412}
5413
5414/* A reloc from one csect to another must be kept. The assembler
5415 will, of course, keep relocs between sections, and it will keep
5416 absolute relocs, but we need to force it to keep PC relative relocs
5417 between two csects in the same section. */
5418
5419int
5420ppc_force_relocation (fix)
5421 fixS *fix;
5422{
5423 /* At this point fix->fx_addsy should already have been converted to
5424 a csect symbol. If the csect does not include the fragment, then
5425 we need to force the relocation. */
5426 if (fix->fx_pcrel
5427 && fix->fx_addsy != NULL
809ffe0d
ILT		 5428 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5429 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5430 > fix->fx_frag->fr_address)
5431 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5432 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 5433 <= fix->fx_frag->fr_address))))
5434 return 1;
5435
ae6063d4 5436 return generic_force_reloc (fix);
252b5132
RH		 5437}
5438
5439#endif /* OBJ_XCOFF */
5440
0baf16f2 5441#ifdef OBJ_ELF
a161fe53
AM		 5442/* If this function returns non-zero, it guarantees that a relocation
5443 will be emitted for a fixup. */
5444
5445int
5446ppc_force_relocation (fix)
5447 fixS *fix;
5448{
5449 /* Branch prediction relocations must force a relocation, as must
5450 the vtable description relocs. */
5451 switch (fix->fx_r_type)
5452 {
5453 case BFD_RELOC_PPC_B16_BRTAKEN:
5454 case BFD_RELOC_PPC_B16_BRNTAKEN:
5455 case BFD_RELOC_PPC_BA16_BRTAKEN:
5456 case BFD_RELOC_PPC_BA16_BRNTAKEN:
5457 case BFD_RELOC_PPC64_TOC:
a161fe53
AM		 5458 return 1;
5459 default:
5460 break;
5461 }
5462
cdba85ec
AM		 5463 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5464 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5465 return 1;
5466
ae6063d4 5467 return generic_force_reloc (fix);
a161fe53
AM		 5468}
5469
0baf16f2
AM		 5470int
5471ppc_fix_adjustable (fix)
5472 fixS *fix;
252b5132 5473{
0baf16f2
AM		 5474 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5475 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5476 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5477 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
5478 && fix->fx_r_type != BFD_RELOC_GPREL16
5479 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5480 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec
AM		 5481 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
5482 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
0baf16f2
AM		 5483 && (fix->fx_pcrel
5484 || (fix->fx_subsy != NULL
5485 && (S_GET_SEGMENT (fix->fx_subsy)
5486 == S_GET_SEGMENT (fix->fx_addsy)))
5487 || S_IS_LOCAL (fix->fx_addsy)));
252b5132 5488}
0baf16f2 5489#endif
252b5132
RH		 5490
5491/* Apply a fixup to the object code. This is called for all the
5492 fixups we generated by the call to fix_new_exp, above. In the call
5493 above we used a reloc code which was the largest legal reloc code
5494 plus the operand index. Here we undo that to recover the operand
5495 index. At this point all symbol values should be fully resolved,
5496 and we attempt to completely resolve the reloc. If we can not do
5497 that, we determine the correct reloc code and put it back in the
5498 fixup. */
5499
94f592af
NC		 5500void
5501md_apply_fix3 (fixP, valP, seg)
5502 fixS *fixP;
5503 valueT * valP;
0baf16f2 5504 segT seg ATTRIBUTE_UNUSED;
252b5132 5505{
94f592af 5506 valueT value = * valP;
252b5132
RH		 5507
5508#ifdef OBJ_ELF
94f592af 5509 if (fixP->fx_addsy != NULL)
252b5132 5510 {
a161fe53 5511 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 5512 if (fixP->fx_pcrel)
5513 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 5514 }
5515 else
94f592af 5516 fixP->fx_done = 1;
252b5132 5517#else
a161fe53 5518 /* FIXME FIXME FIXME: The value we are passed in *valP includes
252b5132
RH		 5519 the symbol values. Since we are using BFD_ASSEMBLER, if we are
5520 doing this relocation the code in write.c is going to call
5521 bfd_install_relocation, which is also going to use the symbol
5522 value. That means that if the reloc is fully resolved we want to
a161fe53 5523 use *valP since bfd_install_relocation is not being used.
252b5132 5524 However, if the reloc is not fully resolved we do not want to use
a161fe53
AM		 5525 *valP, and must use fx_offset instead. However, if the reloc
5526 is PC relative, we do want to use *valP since it includes the
252b5132 5527 result of md_pcrel_from. This is confusing. */
94f592af
NC		 5528 if (fixP->fx_addsy == (symbolS *) NULL)
5529 fixP->fx_done = 1;
5530
5531 else if (fixP->fx_pcrel)
5532 ;
5533
252b5132 5534 else
a161fe53
AM		 5535 value = fixP->fx_offset;
5536#endif
5537
5538 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 5539 {
a161fe53
AM		 5540 /* We can't actually support subtracting a symbol. */
5541 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 5542 }
252b5132 5543
94f592af 5544 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132
RH		 5545 {
5546 int opindex;
5547 const struct powerpc_operand *operand;
5548 char *where;
5549 unsigned long insn;
5550
94f592af 5551 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
252b5132
RH		 5552
5553 operand = &powerpc_operands[opindex];
5554
5555#ifdef OBJ_XCOFF
0baf16f2
AM		 5556 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
5557 does not generate a reloc. It uses the offset of `sym' within its
5558 csect. Other usages, such as `.long sym', generate relocs. This
5559 is the documented behaviour of non-TOC symbols. */
252b5132
RH		 5560 if ((operand->flags & PPC_OPERAND_PARENS) != 0
5561 && operand->bits == 16
5562 && operand->shift == 0
2b3c4602 5563 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 5564 && fixP->fx_addsy != NULL
5565 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
5566 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC
5567 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC0
5568 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 5569 {
94f592af
NC		 5570 value = fixP->fx_offset;
5571 fixP->fx_done = 1;
252b5132
RH		 5572 }
5573#endif
5574
5575 /* Fetch the instruction, insert the fully resolved operand
5576 value, and stuff the instruction back again. */
94f592af 5577 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH		 5578 if (target_big_endian)
5579 insn = bfd_getb32 ((unsigned char *) where);
5580 else
5581 insn = bfd_getl32 ((unsigned char *) where);
5582 insn = ppc_insert_operand (insn, operand, (offsetT) value,
94f592af 5583 fixP->fx_file, fixP->fx_line);
252b5132
RH		 5584 if (target_big_endian)
5585 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5586 else
5587 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5588
94f592af
NC		 5589 if (fixP->fx_done)
5590 /* Nothing else to do here. */
5591 return;
252b5132 5592
94f592af 5593 assert (fixP->fx_addsy != NULL);
0baf16f2 5594
252b5132
RH		 5595 /* Determine a BFD reloc value based on the operand information.
5596 We are only prepared to turn a few of the operands into
0baf16f2 5597 relocs. */
11b37b7b
AM		 5598 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
5599 && operand->bits == 26
5600 && operand->shift == 0)
94f592af 5601 fixP->fx_r_type = BFD_RELOC_PPC_B26;
11b37b7b
AM		 5602 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
5603 && operand->bits == 16
5604 && operand->shift == 0)
95210096
AM		 5605 {
5606 fixP->fx_r_type = BFD_RELOC_PPC_B16;
5607#ifdef OBJ_XCOFF
5608 fixP->fx_size = 2;
5609 if (target_big_endian)
5610 fixP->fx_where += 2;
5611#endif
5612 }
11b37b7b
AM		 5613 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
5614 && operand->bits == 26
5615 && operand->shift == 0)
94f592af 5616 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
11b37b7b
AM		 5617 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
5618 && operand->bits == 16
5619 && operand->shift == 0)
95210096
AM		 5620 {
5621 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
5622#ifdef OBJ_XCOFF
5623 fixP->fx_size = 2;
5624 if (target_big_endian)
5625 fixP->fx_where += 2;
5626#endif
5627 }
0baf16f2 5628#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
11b37b7b
AM		 5629 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
5630 && operand->bits == 16
a7fc733f 5631 && operand->shift == 0)
11b37b7b 5632 {
a7fc733f
AM		 5633 if (ppc_is_toc_sym (fixP->fx_addsy))
5634 {
5635 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
0baf16f2 5636#ifdef OBJ_ELF
a7fc733f
AM		 5637 if (ppc_obj64
5638 && (operand->flags & PPC_OPERAND_DS) != 0)
5639 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
5640#endif
5641 }
5642 else
5643 {
5644 fixP->fx_r_type = BFD_RELOC_16;
5645#ifdef OBJ_ELF
5646 if (ppc_obj64
5647 && (operand->flags & PPC_OPERAND_DS) != 0)
5648 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
0baf16f2 5649#endif
a7fc733f 5650 }
94f592af 5651 fixP->fx_size = 2;
11b37b7b 5652 if (target_big_endian)
94f592af 5653 fixP->fx_where += 2;
11b37b7b 5654 }
0baf16f2 5655#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
11b37b7b 5656 else
252b5132
RH		 5657 {
5658 char *sfile;
5659 unsigned int sline;
5660
5661 /* Use expr_symbol_where to see if this is an expression
0baf16f2 5662 symbol. */
94f592af
NC		 5663 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
5664 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH		 5665 _("unresolved expression that must be resolved"));
5666 else
94f592af 5667 as_bad_where (fixP->fx_file, fixP->fx_line,
0baf16f2 5668 _("unsupported relocation against %s"),
94f592af
NC		 5669 S_GET_NAME (fixP->fx_addsy));
5670 fixP->fx_done = 1;
5671 return;
252b5132
RH		 5672 }
5673 }
5674 else
5675 {
5676#ifdef OBJ_ELF
94f592af 5677 ppc_elf_validate_fix (fixP, seg);
252b5132 5678#endif
94f592af 5679 switch (fixP->fx_r_type)
252b5132 5680 {
252b5132 5681 case BFD_RELOC_CTOR:
2b3c4602 5682 if (ppc_obj64)
9c7977b3
AM		 5683 goto ctor64;
5684 /* fall through */
5685
0baf16f2 5686 case BFD_RELOC_32:
94f592af
NC		 5687 if (fixP->fx_pcrel)
5688 fixP->fx_r_type = BFD_RELOC_32_PCREL;
99a814a1 5689 /* fall through */
252b5132
RH		 5690
5691 case BFD_RELOC_RVA:
5692 case BFD_RELOC_32_PCREL:
252b5132 5693 case BFD_RELOC_PPC_EMB_NADDR32:
94f592af 5694 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5695 value, 4);
5696 break;
5697
7f6d05e8 5698 case BFD_RELOC_64:
9c7977b3 5699 ctor64:
94f592af
NC		 5700 if (fixP->fx_pcrel)
5701 fixP->fx_r_type = BFD_RELOC_64_PCREL;
99a814a1 5702 /* fall through */
0baf16f2 5703
7f6d05e8 5704 case BFD_RELOC_64_PCREL:
94f592af 5705 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7f6d05e8 5706 value, 8);
81d4177b 5707 break;
0baf16f2 5708
252b5132
RH		 5709 case BFD_RELOC_LO16:
5710 case BFD_RELOC_16:
5711 case BFD_RELOC_GPREL16:
5712 case BFD_RELOC_16_GOT_PCREL:
5713 case BFD_RELOC_16_GOTOFF:
5714 case BFD_RELOC_LO16_GOTOFF:
5715 case BFD_RELOC_HI16_GOTOFF:
5716 case BFD_RELOC_HI16_S_GOTOFF:
1cfc59d5 5717 case BFD_RELOC_16_BASEREL:
252b5132
RH		 5718 case BFD_RELOC_LO16_BASEREL:
5719 case BFD_RELOC_HI16_BASEREL:
5720 case BFD_RELOC_HI16_S_BASEREL:
5721 case BFD_RELOC_PPC_EMB_NADDR16:
5722 case BFD_RELOC_PPC_EMB_NADDR16_LO:
5723 case BFD_RELOC_PPC_EMB_NADDR16_HI:
5724 case BFD_RELOC_PPC_EMB_NADDR16_HA:
5725 case BFD_RELOC_PPC_EMB_SDAI16:
5726 case BFD_RELOC_PPC_EMB_SDA2REL:
5727 case BFD_RELOC_PPC_EMB_SDA2I16:
5728 case BFD_RELOC_PPC_EMB_RELSEC16:
5729 case BFD_RELOC_PPC_EMB_RELST_LO:
5730 case BFD_RELOC_PPC_EMB_RELST_HI:
5731 case BFD_RELOC_PPC_EMB_RELST_HA:
5732 case BFD_RELOC_PPC_EMB_RELSDA:
5733 case BFD_RELOC_PPC_TOC16:
0baf16f2 5734#ifdef OBJ_ELF
0baf16f2
AM		 5735 case BFD_RELOC_PPC64_TOC16_LO:
5736 case BFD_RELOC_PPC64_TOC16_HI:
5737 case BFD_RELOC_PPC64_TOC16_HA:
0baf16f2 5738#endif
94f592af 5739 if (fixP->fx_pcrel)
252b5132 5740 {
94f592af
NC		 5741 if (fixP->fx_addsy != NULL)
5742 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5743 _("cannot emit PC relative %s relocation against %s"),
94f592af
NC		 5744 bfd_get_reloc_code_name (fixP->fx_r_type),
5745 S_GET_NAME (fixP->fx_addsy));
252b5132 5746 else
94f592af 5747 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5748 _("cannot emit PC relative %s relocation"),
94f592af 5749 bfd_get_reloc_code_name (fixP->fx_r_type));
252b5132
RH		 5750 }
5751
94f592af 5752 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5753 value, 2);
5754 break;
5755
5756 /* This case happens when you write, for example,
5757 lis %r3,(L1-L2)@ha
5758 where L1 and L2 are defined later. */
5759 case BFD_RELOC_HI16:
94f592af 5760 if (fixP->fx_pcrel)
252b5132 5761 abort ();
94f592af 5762 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5763 PPC_HI (value), 2);
252b5132 5764 break;
0baf16f2 5765
252b5132 5766 case BFD_RELOC_HI16_S:
94f592af 5767 if (fixP->fx_pcrel)
252b5132 5768 abort ();
94f592af 5769 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5770 PPC_HA (value), 2);
5771 break;
5772
5773#ifdef OBJ_ELF
0baf16f2 5774 case BFD_RELOC_PPC64_HIGHER:
94f592af 5775 if (fixP->fx_pcrel)
0baf16f2 5776 abort ();
94f592af 5777 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5778 PPC_HIGHER (value), 2);
252b5132
RH		 5779 break;
5780
0baf16f2 5781 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 5782 if (fixP->fx_pcrel)
0baf16f2 5783 abort ();
94f592af 5784 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5785 PPC_HIGHERA (value), 2);
5786 break;
5787
5788 case BFD_RELOC_PPC64_HIGHEST:
94f592af 5789 if (fixP->fx_pcrel)
0baf16f2 5790 abort ();
94f592af 5791 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5792 PPC_HIGHEST (value), 2);
5793 break;
5794
5795 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 5796 if (fixP->fx_pcrel)
0baf16f2 5797 abort ();
94f592af 5798 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5799 PPC_HIGHESTA (value), 2);
5800 break;
5801
5802 case BFD_RELOC_PPC64_ADDR16_DS:
5803 case BFD_RELOC_PPC64_ADDR16_LO_DS:
5804 case BFD_RELOC_PPC64_GOT16_DS:
5805 case BFD_RELOC_PPC64_GOT16_LO_DS:
5806 case BFD_RELOC_PPC64_PLT16_LO_DS:
5807 case BFD_RELOC_PPC64_SECTOFF_DS:
5808 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
5809 case BFD_RELOC_PPC64_TOC16_DS:
5810 case BFD_RELOC_PPC64_TOC16_LO_DS:
5811 case BFD_RELOC_PPC64_PLTGOT16_DS:
5812 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
94f592af 5813 if (fixP->fx_pcrel)
0baf16f2
AM		 5814 abort ();
5815 {
94f592af 5816 unsigned char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
3d8aea2f 5817 unsigned long val, mask;
0baf16f2
AM		 5818
5819 if (target_big_endian)
adadcc0c 5820 val = bfd_getb32 (where - 2);
0baf16f2 5821 else
adadcc0c
AM		 5822 val = bfd_getl32 (where);
5823 mask = 0xfffc;
5824 /* lq insns reserve the four lsbs. */
5825 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
77a6138a 5826 && (val & (0x3f << 26)) == (56u << 26))
adadcc0c
AM		 5827 mask = 0xfff0;
5828 val |= value & mask;
0baf16f2
AM		 5829 if (target_big_endian)
5830 bfd_putb16 ((bfd_vma) val, where);
5831 else
5832 bfd_putl16 ((bfd_vma) val, where);
5833 }
5834 break;
cdba85ec 5835
ba0b2174
AM		 5836 case BFD_RELOC_PPC_B16_BRTAKEN:
5837 case BFD_RELOC_PPC_B16_BRNTAKEN:
5838 case BFD_RELOC_PPC_BA16_BRTAKEN:
5839 case BFD_RELOC_PPC_BA16_BRNTAKEN:
5840 break;
5841
cdba85ec
AM		 5842 case BFD_RELOC_PPC_TLS:
5843 case BFD_RELOC_PPC_DTPMOD:
5844 case BFD_RELOC_PPC_TPREL16:
5845 case BFD_RELOC_PPC_TPREL16_LO:
5846 case BFD_RELOC_PPC_TPREL16_HI:
5847 case BFD_RELOC_PPC_TPREL16_HA:
5848 case BFD_RELOC_PPC_TPREL:
5849 case BFD_RELOC_PPC_DTPREL16:
5850 case BFD_RELOC_PPC_DTPREL16_LO:
5851 case BFD_RELOC_PPC_DTPREL16_HI:
5852 case BFD_RELOC_PPC_DTPREL16_HA:
5853 case BFD_RELOC_PPC_DTPREL:
5854 case BFD_RELOC_PPC_GOT_TLSGD16:
5855 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
5856 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
5857 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
5858 case BFD_RELOC_PPC_GOT_TLSLD16:
5859 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
5860 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
5861 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
5862 case BFD_RELOC_PPC_GOT_TPREL16:
5863 case BFD_RELOC_PPC_GOT_TPREL16_LO:
5864 case BFD_RELOC_PPC_GOT_TPREL16_HI:
5865 case BFD_RELOC_PPC_GOT_TPREL16_HA:
5866 case BFD_RELOC_PPC_GOT_DTPREL16:
5867 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
5868 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
5869 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
5870 case BFD_RELOC_PPC64_TPREL16_DS:
5871 case BFD_RELOC_PPC64_TPREL16_LO_DS:
5872 case BFD_RELOC_PPC64_TPREL16_HIGHER:
5873 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
5874 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
5875 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
5876 case BFD_RELOC_PPC64_DTPREL16_DS:
5877 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
5878 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
5879 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
5880 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
5881 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
5882 break;
0baf16f2 5883#endif
252b5132 5884 /* Because SDA21 modifies the register field, the size is set to 4
99a814a1 5885 bytes, rather than 2, so offset it here appropriately. */
252b5132 5886 case BFD_RELOC_PPC_EMB_SDA21:
94f592af 5887 if (fixP->fx_pcrel)
252b5132
RH		 5888 abort ();
5889
94f592af 5890 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
252b5132
RH		 5891 + ((target_big_endian) ? 2 : 0),
5892 value, 2);
5893 break;
5894
5895 case BFD_RELOC_8:
94f592af 5896 if (fixP->fx_pcrel)
31a91399
NC		 5897 {
5898 /* This can occur if there is a bug in the input assembler, eg:
b7d7dc63 5899 ".byte <undefined_symbol> - ." */
31a91399
NC		 5900 if (fixP->fx_addsy)
5901 as_bad (_("Unable to handle reference to symbol %s"),
5902 S_GET_NAME (fixP->fx_addsy));
5903 else
5904 as_bad (_("Unable to resolve expression"));
5905 fixP->fx_done = 1;
5906 }
5907 else
5908 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5909 value, 1);
252b5132
RH		 5910 break;
5911
5912 case BFD_RELOC_24_PLT_PCREL:
5913 case BFD_RELOC_PPC_LOCAL24PC:
94f592af 5914 if (!fixP->fx_pcrel && !fixP->fx_done)
252b5132
RH		 5915 abort ();
5916
94f592af 5917 if (fixP->fx_done)
99a814a1
AM		 5918 {
5919 char *where;
5920 unsigned long insn;
5921
5922 /* Fetch the instruction, insert the fully resolved operand
5923 value, and stuff the instruction back again. */
94f592af 5924 where = fixP->fx_frag->fr_literal + fixP->fx_where;
99a814a1
AM		 5925 if (target_big_endian)
5926 insn = bfd_getb32 ((unsigned char *) where);
5927 else
5928 insn = bfd_getl32 ((unsigned char *) where);
5929 if ((value & 3) != 0)
94f592af 5930 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 5931 _("must branch to an address a multiple of 4"));
5932 if ((offsetT) value < -0x40000000
5933 || (offsetT) value >= 0x40000000)
94f592af 5934 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 5935 _("@local or @plt branch destination is too far away, %ld bytes"),
5936 (long) value);
5937 insn = insn | (value & 0x03fffffc);
5938 if (target_big_endian)
5939 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5940 else
5941 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5942 }
252b5132
RH		 5943 break;
5944
5945 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 5946 fixP->fx_done = 0;
5947 if (fixP->fx_addsy
5948 && !S_IS_DEFINED (fixP->fx_addsy)
5949 && !S_IS_WEAK (fixP->fx_addsy))
5950 S_SET_WEAK (fixP->fx_addsy);
252b5132
RH		 5951 break;
5952
5953 case BFD_RELOC_VTABLE_ENTRY:
94f592af 5954 fixP->fx_done = 0;
252b5132
RH		 5955 break;
5956
0baf16f2 5957#ifdef OBJ_ELF
0baf16f2
AM		 5958 /* Generated by reference to `sym@tocbase'. The sym is
5959 ignored by the linker. */
5960 case BFD_RELOC_PPC64_TOC:
94f592af 5961 fixP->fx_done = 0;
0baf16f2 5962 break;
0baf16f2 5963#endif
252b5132 5964 default:
bc805888 5965 fprintf (stderr,
94f592af 5966 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 5967 fflush (stderr);
252b5132
RH		 5968 abort ();
5969 }
5970 }
5971
5972#ifdef OBJ_ELF
94f592af 5973 fixP->fx_addnumber = value;
252b5132 5974#else
94f592af
NC		 5975 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
5976 fixP->fx_addnumber = 0;
252b5132
RH		 5977 else
5978 {
5979#ifdef TE_PE
94f592af 5980 fixP->fx_addnumber = 0;
252b5132
RH		 5981#else
5982 /* We want to use the offset within the data segment of the
5983 symbol, not the actual VMA of the symbol. */
94f592af
NC		 5984 fixP->fx_addnumber =
5985 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy));
252b5132
RH		 5986#endif
5987 }
5988#endif
252b5132
RH		 5989}
5990
5991/* Generate a reloc for a fixup. */
5992
5993arelent *
5994tc_gen_reloc (seg, fixp)
92161534 5995 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH		 5996 fixS *fixp;
5997{
5998 arelent *reloc;
5999
6000 reloc = (arelent *) xmalloc (sizeof (arelent));
6001
49309057
ILT		 6002 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6003 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 6004 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6005 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6006 if (reloc->howto == (reloc_howto_type *) NULL)
6007 {
6008 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 6009 _("reloc %d not supported by object file format"),
6010 (int) fixp->fx_r_type);
252b5132
RH		 6011 return NULL;
6012 }
6013 reloc->addend = fixp->fx_addnumber;
6014
6015 return reloc;
6016}
75e21f08
JJ		 6017
6018void
6019ppc_cfi_frame_initial_instructions ()
6020{
6021 cfi_add_CFA_def_cfa (1, 0);
6022}
6023
6024int
6025tc_ppc_regname_to_dw2regnum (const char *regname)
6026{
6027 unsigned int regnum = -1;
6028 unsigned int i;
6029 const char *p;
6030 char *q;
6031 static struct { char *name; int dw2regnum; } regnames[] =
6032 {
6033 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6034 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
6035 { "cc", 68 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
6036 { "spe_acc", 111 }, { "spefscr", 112 }
6037 };
6038
6039 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6040 if (strcmp (regnames[i].name, regname) == 0)
6041 return regnames[i].dw2regnum;
6042
6043 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6044 {
6045 p = regname + 1 + (regname[1] == '.');
6046 regnum = strtoul (p, &q, 10);
6047 if (p == q || *q || regnum >= 32)
6048 return -1;
6049 if (regname[0] == 'f')
b7d7dc63 6050 regnum += 32;
75e21f08 6051 else if (regname[0] == 'v')
b7d7dc63 6052 regnum += 77;
75e21f08
JJ		 6053 }
6054 else if (regname[0] == 'c' && regname[1] == 'r')
6055 {
6056 p = regname + 2 + (regname[2] == '.');
6057 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 6058 return -1;
75e21f08
JJ		 6059 regnum = p[0] - '0' + 68;
6060 }
6061 return regnum;
6062}
GDB Binutils - Deliverables
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