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* config/tc-ppc.h (struct _ppc_fix_extra): New.
[deliverable/binutils-gdb.git] / gas / config / tc-ppc.c
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252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b7d7dc63 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
783de163 3 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
252b5132
RH		 4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
ec2655a6 10 the Free Software Foundation; either version 3, or (at your option)
252b5132
RH		 11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC		 20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
21 02110-1301, USA. */
252b5132 22
252b5132 23#include "as.h"
3882b010 24#include "safe-ctype.h"
252b5132 25#include "subsegs.h"
75e21f08 26#include "dw2gencfi.h"
252b5132
RH		 27#include "opcode/ppc.h"
28
29#ifdef OBJ_ELF
30#include "elf/ppc.h"
5d6f4f16 31#include "dwarf2dbg.h"
252b5132
RH		 32#endif
33
34#ifdef TE_PE
35#include "coff/pe.h"
36#endif
37
38/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
39
40/* Tell the main code what the endianness is. */
41extern int target_big_endian;
42
43/* Whether or not, we've set target_big_endian. */
44static int set_target_endian = 0;
45
46/* Whether to use user friendly register names. */
47#ifndef TARGET_REG_NAMES_P
48#ifdef TE_PE
b34976b6 49#define TARGET_REG_NAMES_P TRUE
252b5132 50#else
b34976b6 51#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 52#endif
53#endif
54
0baf16f2
AM		 55/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
56 HIGHESTA. */
57
58/* #lo(value) denotes the least significant 16 bits of the indicated. */
59#define PPC_LO(v) ((v) & 0xffff)
60
61/* #hi(value) denotes bits 16 through 31 of the indicated value. */
62#define PPC_HI(v) (((v) >> 16) & 0xffff)
63
64/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
65 the indicated value, compensating for #lo() being treated as a
66 signed number. */
15c1449b 67#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 68
69/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 70#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 71
72/* #highera(value) denotes bits 32 through 47 of the indicated value,
73 compensating for #lo() being treated as a signed number. */
15c1449b 74#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 75
76/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 77#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 78
79/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 80 compensating for #lo being treated as a signed number. */
81#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM		 82
83#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
84
b34976b6 85static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 86
98027b10
AM		 87static void ppc_macro (char *, const struct powerpc_macro *);
88static void ppc_byte (int);
0baf16f2
AM		 89
90#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
98027b10
AM		 91static void ppc_tc (int);
92static void ppc_machine (int);
0baf16f2 93#endif
252b5132
RH		 94
95#ifdef OBJ_XCOFF
98027b10
AM		 96static void ppc_comm (int);
97static void ppc_bb (int);
98static void ppc_bc (int);
99static void ppc_bf (int);
100static void ppc_biei (int);
101static void ppc_bs (int);
102static void ppc_eb (int);
103static void ppc_ec (int);
104static void ppc_ef (int);
105static void ppc_es (int);
106static void ppc_csect (int);
107static void ppc_change_csect (symbolS *, offsetT);
108static void ppc_function (int);
109static void ppc_extern (int);
110static void ppc_lglobl (int);
111static void ppc_section (int);
112static void ppc_named_section (int);
113static void ppc_stabx (int);
114static void ppc_rename (int);
115static void ppc_toc (int);
116static void ppc_xcoff_cons (int);
117static void ppc_vbyte (int);
252b5132
RH		 118#endif
119
120#ifdef OBJ_ELF
98027b10
AM		 121static void ppc_elf_cons (int);
122static void ppc_elf_rdata (int);
123static void ppc_elf_lcomm (int);
252b5132
RH		 124#endif
125
126#ifdef TE_PE
98027b10
AM		 127static void ppc_previous (int);
128static void ppc_pdata (int);
129static void ppc_ydata (int);
130static void ppc_reldata (int);
131static void ppc_rdata (int);
132static void ppc_ualong (int);
133static void ppc_znop (int);
134static void ppc_pe_comm (int);
135static void ppc_pe_section (int);
136static void ppc_pe_function (int);
137static void ppc_pe_tocd (int);
252b5132
RH		 138#endif
139\f
140/* Generic assembler global variables which must be defined by all
141 targets. */
142
143#ifdef OBJ_ELF
144/* This string holds the chars that always start a comment. If the
145 pre-processor is disabled, these aren't very useful. The macro
146 tc_comment_chars points to this. We use this, rather than the
147 usual comment_chars, so that we can switch for Solaris conventions. */
148static const char ppc_solaris_comment_chars[] = "#!";
149static const char ppc_eabi_comment_chars[] = "#";
150
151#ifdef TARGET_SOLARIS_COMMENT
152const char *ppc_comment_chars = ppc_solaris_comment_chars;
153#else
154const char *ppc_comment_chars = ppc_eabi_comment_chars;
155#endif
156#else
157const char comment_chars[] = "#";
158#endif
159
160/* Characters which start a comment at the beginning of a line. */
161const char line_comment_chars[] = "#";
162
163/* Characters which may be used to separate multiple commands on a
164 single line. */
165const char line_separator_chars[] = ";";
166
167/* Characters which are used to indicate an exponent in a floating
168 point number. */
169const char EXP_CHARS[] = "eE";
170
171/* Characters which mean that a number is a floating point constant,
172 as in 0d1.0. */
173const char FLT_CHARS[] = "dD";
5ce8663f 174
5e02f92e 175/* Anything that can start an operand needs to be mentioned here,
ac805826 176 to stop the input scrubber eating whitespace. */
5e02f92e 177const char ppc_symbol_chars[] = "%[";
75e21f08
JJ		 178
179/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
180int ppc_cie_data_alignment;
783de163
AM		 181
182/* The type of processor we are assembling for. This is one or more
183 of the PPC_OPCODE flags defined in opcode/ppc.h. */
184unsigned long ppc_cpu = 0;
252b5132
RH		 185\f
186/* The target specific pseudo-ops which we support. */
187
188const pseudo_typeS md_pseudo_table[] =
189{
190 /* Pseudo-ops which must be overridden. */
191 { "byte", ppc_byte, 0 },
192
193#ifdef OBJ_XCOFF
194 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
195 legitimately belong in the obj-*.c file. However, XCOFF is based
196 on COFF, and is only implemented for the RS/6000. We just use
197 obj-coff.c, and add what we need here. */
198 { "comm", ppc_comm, 0 },
199 { "lcomm", ppc_comm, 1 },
200 { "bb", ppc_bb, 0 },
201 { "bc", ppc_bc, 0 },
202 { "bf", ppc_bf, 0 },
203 { "bi", ppc_biei, 0 },
204 { "bs", ppc_bs, 0 },
205 { "csect", ppc_csect, 0 },
206 { "data", ppc_section, 'd' },
207 { "eb", ppc_eb, 0 },
208 { "ec", ppc_ec, 0 },
209 { "ef", ppc_ef, 0 },
210 { "ei", ppc_biei, 1 },
211 { "es", ppc_es, 0 },
212 { "extern", ppc_extern, 0 },
213 { "function", ppc_function, 0 },
214 { "lglobl", ppc_lglobl, 0 },
215 { "rename", ppc_rename, 0 },
216 { "section", ppc_named_section, 0 },
217 { "stabx", ppc_stabx, 0 },
218 { "text", ppc_section, 't' },
219 { "toc", ppc_toc, 0 },
220 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 221 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 222 { "word", ppc_xcoff_cons, 1 },
223 { "short", ppc_xcoff_cons, 1 },
224 { "vbyte", ppc_vbyte, 0 },
225#endif
226
227#ifdef OBJ_ELF
0baf16f2
AM		 228 { "llong", ppc_elf_cons, 8 },
229 { "quad", ppc_elf_cons, 8 },
252b5132
RH		 230 { "long", ppc_elf_cons, 4 },
231 { "word", ppc_elf_cons, 2 },
232 { "short", ppc_elf_cons, 2 },
233 { "rdata", ppc_elf_rdata, 0 },
234 { "rodata", ppc_elf_rdata, 0 },
235 { "lcomm", ppc_elf_lcomm, 0 },
236#endif
237
238#ifdef TE_PE
99a814a1 239 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 240 { "previous", ppc_previous, 0 },
241 { "pdata", ppc_pdata, 0 },
242 { "ydata", ppc_ydata, 0 },
243 { "reldata", ppc_reldata, 0 },
244 { "rdata", ppc_rdata, 0 },
245 { "ualong", ppc_ualong, 0 },
246 { "znop", ppc_znop, 0 },
247 { "comm", ppc_pe_comm, 0 },
248 { "lcomm", ppc_pe_comm, 1 },
249 { "section", ppc_pe_section, 0 },
250 { "function", ppc_pe_function,0 },
251 { "tocd", ppc_pe_tocd, 0 },
252#endif
253
0baf16f2 254#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 255 { "tc", ppc_tc, 0 },
0baf16f2
AM		 256 { "machine", ppc_machine, 0 },
257#endif
252b5132
RH		 258
259 { NULL, NULL, 0 }
260};
261
262\f
99a814a1
AM		 263/* Predefined register names if -mregnames (or default for Windows NT).
264 In general, there are lots of them, in an attempt to be compatible
265 with a number of other Windows NT assemblers. */
252b5132
RH		 266
267/* Structure to hold information about predefined registers. */
268struct pd_reg
269 {
270 char *name;
271 int value;
272 };
273
274/* List of registers that are pre-defined:
275
276 Each general register has predefined names of the form:
277 1. r<reg_num> which has the value <reg_num>.
278 2. r.<reg_num> which has the value <reg_num>.
279
252b5132
RH		 280 Each floating point register has predefined names of the form:
281 1. f<reg_num> which has the value <reg_num>.
282 2. f.<reg_num> which has the value <reg_num>.
283
7a899fff
C		 284 Each vector unit register has predefined names of the form:
285 1. v<reg_num> which has the value <reg_num>.
286 2. v.<reg_num> which has the value <reg_num>.
287
252b5132
RH		 288 Each condition register has predefined names of the form:
289 1. cr<reg_num> which has the value <reg_num>.
290 2. cr.<reg_num> which has the value <reg_num>.
291
292 There are individual registers as well:
293 sp or r.sp has the value 1
294 rtoc or r.toc has the value 2
295 fpscr has the value 0
296 xer has the value 1
297 lr has the value 8
298 ctr has the value 9
299 pmr has the value 0
300 dar has the value 19
301 dsisr has the value 18
302 dec has the value 22
303 sdr1 has the value 25
304 srr0 has the value 26
305 srr1 has the value 27
306
81d4177b 307 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 308
309static const struct pd_reg pre_defined_registers[] =
310{
311 { "cr.0", 0 }, /* Condition Registers */
312 { "cr.1", 1 },
313 { "cr.2", 2 },
314 { "cr.3", 3 },
315 { "cr.4", 4 },
316 { "cr.5", 5 },
317 { "cr.6", 6 },
318 { "cr.7", 7 },
319
320 { "cr0", 0 },
321 { "cr1", 1 },
322 { "cr2", 2 },
323 { "cr3", 3 },
324 { "cr4", 4 },
325 { "cr5", 5 },
326 { "cr6", 6 },
327 { "cr7", 7 },
328
329 { "ctr", 9 },
330
331 { "dar", 19 }, /* Data Access Register */
332 { "dec", 22 }, /* Decrementer */
333 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
334
335 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 336 { "f.1", 1 },
337 { "f.10", 10 },
338 { "f.11", 11 },
339 { "f.12", 12 },
340 { "f.13", 13 },
341 { "f.14", 14 },
342 { "f.15", 15 },
343 { "f.16", 16 },
344 { "f.17", 17 },
345 { "f.18", 18 },
346 { "f.19", 19 },
347 { "f.2", 2 },
348 { "f.20", 20 },
349 { "f.21", 21 },
350 { "f.22", 22 },
351 { "f.23", 23 },
352 { "f.24", 24 },
353 { "f.25", 25 },
354 { "f.26", 26 },
355 { "f.27", 27 },
356 { "f.28", 28 },
357 { "f.29", 29 },
358 { "f.3", 3 },
252b5132
RH		 359 { "f.30", 30 },
360 { "f.31", 31 },
81d4177b
KH		 361 { "f.4", 4 },
362 { "f.5", 5 },
363 { "f.6", 6 },
364 { "f.7", 7 },
365 { "f.8", 8 },
366 { "f.9", 9 },
367
368 { "f0", 0 },
369 { "f1", 1 },
370 { "f10", 10 },
371 { "f11", 11 },
372 { "f12", 12 },
373 { "f13", 13 },
374 { "f14", 14 },
375 { "f15", 15 },
376 { "f16", 16 },
377 { "f17", 17 },
378 { "f18", 18 },
379 { "f19", 19 },
380 { "f2", 2 },
381 { "f20", 20 },
382 { "f21", 21 },
383 { "f22", 22 },
384 { "f23", 23 },
385 { "f24", 24 },
386 { "f25", 25 },
387 { "f26", 26 },
388 { "f27", 27 },
389 { "f28", 28 },
390 { "f29", 29 },
391 { "f3", 3 },
252b5132
RH		 392 { "f30", 30 },
393 { "f31", 31 },
81d4177b
KH		 394 { "f4", 4 },
395 { "f5", 5 },
396 { "f6", 6 },
397 { "f7", 7 },
398 { "f8", 8 },
399 { "f9", 9 },
252b5132
RH		 400
401 { "fpscr", 0 },
402
c3d65c1c
BE		 403 /* Quantization registers used with pair single instructions. */
404 { "gqr.0", 0 },
405 { "gqr.1", 1 },
406 { "gqr.2", 2 },
407 { "gqr.3", 3 },
408 { "gqr.4", 4 },
409 { "gqr.5", 5 },
410 { "gqr.6", 6 },
411 { "gqr.7", 7 },
412 { "gqr0", 0 },
413 { "gqr1", 1 },
414 { "gqr2", 2 },
415 { "gqr3", 3 },
416 { "gqr4", 4 },
417 { "gqr5", 5 },
418 { "gqr6", 6 },
419 { "gqr7", 7 },
420
252b5132
RH		 421 { "lr", 8 }, /* Link Register */
422
423 { "pmr", 0 },
424
425 { "r.0", 0 }, /* General Purpose Registers */
426 { "r.1", 1 },
427 { "r.10", 10 },
428 { "r.11", 11 },
429 { "r.12", 12 },
430 { "r.13", 13 },
431 { "r.14", 14 },
432 { "r.15", 15 },
433 { "r.16", 16 },
434 { "r.17", 17 },
435 { "r.18", 18 },
436 { "r.19", 19 },
437 { "r.2", 2 },
438 { "r.20", 20 },
439 { "r.21", 21 },
440 { "r.22", 22 },
441 { "r.23", 23 },
442 { "r.24", 24 },
443 { "r.25", 25 },
444 { "r.26", 26 },
445 { "r.27", 27 },
446 { "r.28", 28 },
447 { "r.29", 29 },
448 { "r.3", 3 },
449 { "r.30", 30 },
450 { "r.31", 31 },
451 { "r.4", 4 },
452 { "r.5", 5 },
453 { "r.6", 6 },
454 { "r.7", 7 },
455 { "r.8", 8 },
456 { "r.9", 9 },
457
458 { "r.sp", 1 }, /* Stack Pointer */
459
460 { "r.toc", 2 }, /* Pointer to the table of contents */
461
462 { "r0", 0 }, /* More general purpose registers */
463 { "r1", 1 },
464 { "r10", 10 },
465 { "r11", 11 },
466 { "r12", 12 },
467 { "r13", 13 },
468 { "r14", 14 },
469 { "r15", 15 },
470 { "r16", 16 },
471 { "r17", 17 },
472 { "r18", 18 },
473 { "r19", 19 },
474 { "r2", 2 },
475 { "r20", 20 },
476 { "r21", 21 },
477 { "r22", 22 },
478 { "r23", 23 },
479 { "r24", 24 },
480 { "r25", 25 },
481 { "r26", 26 },
482 { "r27", 27 },
483 { "r28", 28 },
484 { "r29", 29 },
485 { "r3", 3 },
486 { "r30", 30 },
487 { "r31", 31 },
488 { "r4", 4 },
489 { "r5", 5 },
490 { "r6", 6 },
491 { "r7", 7 },
492 { "r8", 8 },
493 { "r9", 9 },
494
495 { "rtoc", 2 }, /* Table of contents */
496
497 { "sdr1", 25 }, /* Storage Description Register 1 */
498
499 { "sp", 1 },
500
501 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
502 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 503
7a899fff 504 { "v.0", 0 }, /* Vector registers */
81d4177b
KH		 505 { "v.1", 1 },
506 { "v.10", 10 },
507 { "v.11", 11 },
508 { "v.12", 12 },
509 { "v.13", 13 },
510 { "v.14", 14 },
511 { "v.15", 15 },
512 { "v.16", 16 },
513 { "v.17", 17 },
514 { "v.18", 18 },
515 { "v.19", 19 },
516 { "v.2", 2 },
517 { "v.20", 20 },
518 { "v.21", 21 },
519 { "v.22", 22 },
520 { "v.23", 23 },
521 { "v.24", 24 },
522 { "v.25", 25 },
523 { "v.26", 26 },
524 { "v.27", 27 },
525 { "v.28", 28 },
526 { "v.29", 29 },
527 { "v.3", 3 },
7a899fff
C		 528 { "v.30", 30 },
529 { "v.31", 31 },
81d4177b
KH		 530 { "v.4", 4 },
531 { "v.5", 5 },
532 { "v.6", 6 },
533 { "v.7", 7 },
534 { "v.8", 8 },
535 { "v.9", 9 },
7a899fff
C		 536
537 { "v0", 0 },
81d4177b
KH		 538 { "v1", 1 },
539 { "v10", 10 },
540 { "v11", 11 },
541 { "v12", 12 },
542 { "v13", 13 },
543 { "v14", 14 },
544 { "v15", 15 },
545 { "v16", 16 },
546 { "v17", 17 },
547 { "v18", 18 },
548 { "v19", 19 },
549 { "v2", 2 },
550 { "v20", 20 },
551 { "v21", 21 },
552 { "v22", 22 },
553 { "v23", 23 },
554 { "v24", 24 },
555 { "v25", 25 },
556 { "v26", 26 },
557 { "v27", 27 },
558 { "v28", 28 },
559 { "v29", 29 },
560 { "v3", 3 },
7a899fff
C		 561 { "v30", 30 },
562 { "v31", 31 },
81d4177b
KH		 563 { "v4", 4 },
564 { "v5", 5 },
565 { "v6", 6 },
566 { "v7", 7 },
567 { "v8", 8 },
7a899fff 568 { "v9", 9 },
252b5132
RH		 569
570 { "xer", 1 },
571
572};
573
bc805888 574#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 575
576/* Given NAME, find the register number associated with that name, return
577 the integer value associated with the given name or -1 on failure. */
578
252b5132 579static int
98027b10 580reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
252b5132
RH		 581{
582 int middle, low, high;
583 int cmp;
584
585 low = 0;
586 high = regcount - 1;
587
588 do
589 {
590 middle = (low + high) / 2;
591 cmp = strcasecmp (name, regs[middle].name);
592 if (cmp < 0)
593 high = middle - 1;
594 else if (cmp > 0)
595 low = middle + 1;
596 else
597 return regs[middle].value;
598 }
599 while (low <= high);
600
601 return -1;
602}
603
604/*
99a814a1 605 * Summary of register_name.
252b5132
RH		 606 *
607 * in: Input_line_pointer points to 1st char of operand.
608 *
609 * out: A expressionS.
610 * The operand may have been a register: in this case, X_op == O_register,
611 * X_add_number is set to the register number, and truth is returned.
612 * Input_line_pointer->(next non-blank) char after operand, or is in its
613 * original state.
614 */
615
b34976b6 616static bfd_boolean
98027b10 617register_name (expressionS *expressionP)
252b5132
RH		 618{
619 int reg_number;
620 char *name;
621 char *start;
622 char c;
623
99a814a1 624 /* Find the spelling of the operand. */
252b5132 625 start = name = input_line_pointer;
3882b010 626 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 627 name = ++input_line_pointer;
628
3882b010 629 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 630 return FALSE;
252b5132
RH		 631
632 c = get_symbol_end ();
633 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
634
468cced8
AM		 635 /* Put back the delimiting char. */
636 *input_line_pointer = c;
637
99a814a1 638 /* Look to see if it's in the register table. */
81d4177b 639 if (reg_number >= 0)
252b5132
RH		 640 {
641 expressionP->X_op = O_register;
642 expressionP->X_add_number = reg_number;
81d4177b 643
99a814a1 644 /* Make the rest nice. */
252b5132
RH		 645 expressionP->X_add_symbol = NULL;
646 expressionP->X_op_symbol = NULL;
b34976b6 647 return TRUE;
252b5132 648 }
468cced8
AM		 649
650 /* Reset the line as if we had not done anything. */
651 input_line_pointer = start;
b34976b6 652 return FALSE;
252b5132
RH		 653}
654\f
655/* This function is called for each symbol seen in an expression. It
656 handles the special parsing which PowerPC assemblers are supposed
657 to use for condition codes. */
658
659/* Whether to do the special parsing. */
b34976b6 660static bfd_boolean cr_operand;
252b5132
RH		 661
662/* Names to recognize in a condition code. This table is sorted. */
663static const struct pd_reg cr_names[] =
664{
665 { "cr0", 0 },
666 { "cr1", 1 },
667 { "cr2", 2 },
668 { "cr3", 3 },
669 { "cr4", 4 },
670 { "cr5", 5 },
671 { "cr6", 6 },
672 { "cr7", 7 },
673 { "eq", 2 },
674 { "gt", 1 },
675 { "lt", 0 },
676 { "so", 3 },
677 { "un", 3 }
678};
679
680/* Parsing function. This returns non-zero if it recognized an
681 expression. */
682
683int
98027b10 684ppc_parse_name (const char *name, expressionS *expr)
252b5132
RH		 685{
686 int val;
687
688 if (! cr_operand)
689 return 0;
690
13abbae3
AM		 691 if (*name == '%')
692 ++name;
252b5132
RH		 693 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
694 name);
695 if (val < 0)
696 return 0;
697
698 expr->X_op = O_constant;
699 expr->X_add_number = val;
700
701 return 1;
702}
703\f
704/* Local variables. */
705
2b3c4602
AM		 706/* Whether to target xcoff64/elf64. */
707static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 708
252b5132
RH		 709/* Opcode hash table. */
710static struct hash_control *ppc_hash;
711
712/* Macro hash table. */
713static struct hash_control *ppc_macro_hash;
714
715#ifdef OBJ_ELF
99a814a1 716/* What type of shared library support to use. */
5d6f4f16 717static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 718
99a814a1 719/* Flags to set in the elf header. */
252b5132
RH		 720static flagword ppc_flags = 0;
721
722/* Whether this is Solaris or not. */
723#ifdef TARGET_SOLARIS_COMMENT
b34976b6 724#define SOLARIS_P TRUE
252b5132 725#else
b34976b6 726#define SOLARIS_P FALSE
252b5132
RH		 727#endif
728
b34976b6 729static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 730#endif
731
732#ifdef OBJ_XCOFF
733
734/* The RS/6000 assembler uses the .csect pseudo-op to generate code
735 using a bunch of different sections. These assembler sections,
736 however, are all encompassed within the .text or .data sections of
737 the final output file. We handle this by using different
738 subsegments within these main segments. */
739
740/* Next subsegment to allocate within the .text segment. */
741static subsegT ppc_text_subsegment = 2;
742
743/* Linked list of csects in the text section. */
744static symbolS *ppc_text_csects;
745
746/* Next subsegment to allocate within the .data segment. */
747static subsegT ppc_data_subsegment = 2;
748
749/* Linked list of csects in the data section. */
750static symbolS *ppc_data_csects;
751
752/* The current csect. */
753static symbolS *ppc_current_csect;
754
755/* The RS/6000 assembler uses a TOC which holds addresses of functions
756 and variables. Symbols are put in the TOC with the .tc pseudo-op.
757 A special relocation is used when accessing TOC entries. We handle
758 the TOC as a subsegment within the .data segment. We set it up if
759 we see a .toc pseudo-op, and save the csect symbol here. */
760static symbolS *ppc_toc_csect;
761
762/* The first frag in the TOC subsegment. */
763static fragS *ppc_toc_frag;
764
765/* The first frag in the first subsegment after the TOC in the .data
766 segment. NULL if there are no subsegments after the TOC. */
767static fragS *ppc_after_toc_frag;
768
769/* The current static block. */
770static symbolS *ppc_current_block;
771
772/* The COFF debugging section; set by md_begin. This is not the
773 .debug section, but is instead the secret BFD section which will
774 cause BFD to set the section number of a symbol to N_DEBUG. */
775static asection *ppc_coff_debug_section;
776
777#endif /* OBJ_XCOFF */
778
779#ifdef TE_PE
780
781/* Various sections that we need for PE coff support. */
782static segT ydata_section;
783static segT pdata_section;
784static segT reldata_section;
785static segT rdata_section;
786static segT tocdata_section;
787
81d4177b 788/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 789static segT ppc_previous_section;
790static segT ppc_current_section;
791
792#endif /* TE_PE */
793
794#ifdef OBJ_ELF
795symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 796#define PPC_APUINFO_ISEL 0x40
797#define PPC_APUINFO_PMR 0x41
798#define PPC_APUINFO_RFMCI 0x42
799#define PPC_APUINFO_CACHELCK 0x43
800#define PPC_APUINFO_SPE 0x100
801#define PPC_APUINFO_EFS 0x101
802#define PPC_APUINFO_BRLOCK 0x102
803
b34976b6
AM		 804/*
805 * We keep a list of APUinfo
6a0c61b7
EZ		 806 */
807unsigned long *ppc_apuinfo_list;
808unsigned int ppc_apuinfo_num;
809unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 810#endif /* OBJ_ELF */
811\f
812#ifdef OBJ_ELF
15c1449b 813const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 814#else
15c1449b 815const char *const md_shortopts = "um:";
252b5132 816#endif
15c1449b 817const struct option md_longopts[] = {
252b5132
RH		 818 {NULL, no_argument, NULL, 0}
819};
15c1449b 820const size_t md_longopts_size = sizeof (md_longopts);
252b5132 821
69c040df
AM		 822
823/* Handle -m options that set cpu type, and .machine arg. */
824
825static int
826parse_cpu (const char *arg)
827{
b0e34bfe
NC		 828 unsigned long altivec_or_spe = ppc_cpu & (PPC_OPCODE_ALTIVEC | PPC_OPCODE_SPE);
829
69c040df
AM		 830 /* -mpwrx and -mpwr2 mean to assemble for the IBM POWER/2
831 (RIOS2). */
832 if (strcmp (arg, "pwrx") == 0 || strcmp (arg, "pwr2") == 0)
833 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32;
834 /* -mpwr means to assemble for the IBM POWER (RIOS1). */
835 else if (strcmp (arg, "pwr") == 0)
836 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
837 /* -m601 means to assemble for the PowerPC 601, which includes
838 instructions that are holdovers from the Power. */
839 else if (strcmp (arg, "601") == 0)
840 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
841 | PPC_OPCODE_601 | PPC_OPCODE_32);
842 /* -mppc, -mppc32, -m603, and -m604 mean to assemble for the
843 PowerPC 603/604. */
844 else if (strcmp (arg, "ppc") == 0
845 || strcmp (arg, "ppc32") == 0
846 || strcmp (arg, "603") == 0
847 || strcmp (arg, "604") == 0)
848 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
c3d65c1c
BE		 849 /* Do all PPC750s have paired single ops? */
850 else if (strcmp (arg, "750cl") == 0)
851 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_PPCPS;
69c040df
AM		 852 /* -m403 and -m405 mean to assemble for the PowerPC 403/405. */
853 else if (strcmp (arg, "403") == 0
854 || strcmp (arg, "405") == 0)
855 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
856 | PPC_OPCODE_403 | PPC_OPCODE_32);
857 else if (strcmp (arg, "440") == 0)
858 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32
859 | PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI);
860 else if (strcmp (arg, "7400") == 0
861 || strcmp (arg, "7410") == 0
862 || strcmp (arg, "7450") == 0
863 || strcmp (arg, "7455") == 0)
864 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
865 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_32);
36ae0db3
DJ		 866 else if (strcmp (arg, "e300") == 0)
867 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32
868 | PPC_OPCODE_E300);
69c040df
AM		 869 else if (strcmp (arg, "altivec") == 0)
870 {
871 if (ppc_cpu == 0)
b0e34bfe
NC		 872 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC;
873
874 altivec_or_spe |= PPC_OPCODE_ALTIVEC;
69c040df
AM		 875 }
876 else if (strcmp (arg, "e500") == 0 || strcmp (arg, "e500x2") == 0)
877 {
878 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
879 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
880 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
881 | PPC_OPCODE_RFMCI);
882 }
883 else if (strcmp (arg, "spe") == 0)
884 {
885 if (ppc_cpu == 0)
b0e34bfe
NC		 886 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_EFS;
887
888 altivec_or_spe |= PPC_OPCODE_SPE;
69c040df
AM		 889 }
890 /* -mppc64 and -m620 mean to assemble for the 64-bit PowerPC
891 620. */
892 else if (strcmp (arg, "ppc64") == 0 || strcmp (arg, "620") == 0)
893 {
894 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
895 }
896 else if (strcmp (arg, "ppc64bridge") == 0)
897 {
898 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
899 | PPC_OPCODE_64_BRIDGE | PPC_OPCODE_64);
900 }
901 /* -mbooke/-mbooke32 mean enable 32-bit BookE support. */
902 else if (strcmp (arg, "booke") == 0 || strcmp (arg, "booke32") == 0)
903 {
904 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32;
905 }
906 /* -mbooke64 means enable 64-bit BookE support. */
907 else if (strcmp (arg, "booke64") == 0)
908 {
909 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE
910 | PPC_OPCODE_BOOKE64 | PPC_OPCODE_64);
911 }
912 else if (strcmp (arg, "power4") == 0)
913 {
914 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
915 | PPC_OPCODE_64 | PPC_OPCODE_POWER4);
916 }
b0648eec
AM		 917 else if (strcmp (arg, "power5") == 0)
918 {
919 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
920 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
921 | PPC_OPCODE_POWER5);
922 }
9622b051
AM		 923 else if (strcmp (arg, "power6") == 0)
924 {
925 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
926 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
927 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6);
928 }
ede602d7
AM		 929 else if (strcmp (arg, "cell") == 0)
930 {
931 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
932 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
933 | PPC_OPCODE_CELL);
934 }
69c040df
AM		 935 /* -mcom means assemble for the common intersection between Power
936 and PowerPC. At present, we just allow the union, rather
937 than the intersection. */
938 else if (strcmp (arg, "com") == 0)
939 ppc_cpu = PPC_OPCODE_COMMON | PPC_OPCODE_32;
940 /* -many means to assemble for any architecture (PWR/PWRX/PPC). */
941 else if (strcmp (arg, "any") == 0)
942 ppc_cpu |= PPC_OPCODE_ANY;
943 else
944 return 0;
945
b0e34bfe
NC		 946 /* Make sure the the Altivec and SPE bits are not lost. */
947 ppc_cpu |= altivec_or_spe;
69c040df
AM		 948 return 1;
949}
950
252b5132 951int
98027b10 952md_parse_option (int c, char *arg)
252b5132
RH		 953{
954 switch (c)
955 {
956 case 'u':
957 /* -u means that any undefined symbols should be treated as
958 external, which is the default for gas anyhow. */
959 break;
960
961#ifdef OBJ_ELF
962 case 'l':
963 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 964 sake, recognize -be also. */
252b5132
RH		 965 if (strcmp (arg, "e") == 0)
966 {
967 target_big_endian = 0;
968 set_target_endian = 1;
969 }
970 else
971 return 0;
972
973 break;
974
975 case 'b':
976 if (strcmp (arg, "e") == 0)
977 {
978 target_big_endian = 1;
979 set_target_endian = 1;
980 }
981 else
982 return 0;
983
984 break;
985
986 case 'K':
99a814a1 987 /* Recognize -K PIC. */
252b5132
RH		 988 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
989 {
990 shlib = SHLIB_PIC;
991 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
992 }
993 else
994 return 0;
995
996 break;
997#endif
998
7f6d05e8
CP		 999 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1000 case 'a':
1001 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 1002 {
1003#ifdef BFD64
1004 ppc_obj64 = 1;
1005#else
1006 as_fatal (_("%s unsupported"), "-a64");
1007#endif
1008 }
7f6d05e8 1009 else if (strcmp (arg, "32") == 0)
2b3c4602 1010 ppc_obj64 = 0;
7f6d05e8
CP		 1011 else
1012 return 0;
1013 break;
81d4177b 1014
252b5132 1015 case 'm':
69c040df
AM		 1016 if (parse_cpu (arg))
1017 ;
252b5132
RH		 1018
1019 else if (strcmp (arg, "regnames") == 0)
b34976b6 1020 reg_names_p = TRUE;
252b5132
RH		 1021
1022 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 1023 reg_names_p = FALSE;
252b5132
RH		 1024
1025#ifdef OBJ_ELF
99a814a1
AM		 1026 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1027 that require relocation. */
252b5132
RH		 1028 else if (strcmp (arg, "relocatable") == 0)
1029 {
5d6f4f16 1030 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1031 ppc_flags |= EF_PPC_RELOCATABLE;
1032 }
1033
1034 else if (strcmp (arg, "relocatable-lib") == 0)
1035 {
5d6f4f16 1036 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1037 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1038 }
1039
99a814a1 1040 /* -memb, set embedded bit. */
252b5132
RH		 1041 else if (strcmp (arg, "emb") == 0)
1042 ppc_flags |= EF_PPC_EMB;
1043
99a814a1
AM		 1044 /* -mlittle/-mbig set the endianess. */
1045 else if (strcmp (arg, "little") == 0
1046 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1047 {
1048 target_big_endian = 0;
1049 set_target_endian = 1;
1050 }
1051
1052 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1053 {
1054 target_big_endian = 1;
1055 set_target_endian = 1;
1056 }
1057
1058 else if (strcmp (arg, "solaris") == 0)
1059 {
b34976b6 1060 msolaris = TRUE;
252b5132
RH		 1061 ppc_comment_chars = ppc_solaris_comment_chars;
1062 }
1063
1064 else if (strcmp (arg, "no-solaris") == 0)
1065 {
b34976b6 1066 msolaris = FALSE;
252b5132
RH		 1067 ppc_comment_chars = ppc_eabi_comment_chars;
1068 }
1069#endif
1070 else
1071 {
1072 as_bad (_("invalid switch -m%s"), arg);
1073 return 0;
1074 }
1075 break;
1076
1077#ifdef OBJ_ELF
1078 /* -V: SVR4 argument to print version ID. */
1079 case 'V':
1080 print_version_id ();
1081 break;
1082
1083 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1084 should be emitted or not. FIXME: Not implemented. */
1085 case 'Q':
1086 break;
1087
1088 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1089 rather than .stabs.excl, which is ignored by the linker.
1090 FIXME: Not implemented. */
1091 case 's':
1092 if (arg)
1093 return 0;
1094
1095 break;
1096#endif
1097
1098 default:
1099 return 0;
1100 }
1101
1102 return 1;
1103}
1104
1105void
98027b10 1106md_show_usage (FILE *stream)
252b5132 1107{
bc805888 1108 fprintf (stream, _("\
252b5132 1109PowerPC options:\n\
df12615d
AM		 1110-a32 generate ELF32/XCOFF32\n\
1111-a64 generate ELF64/XCOFF64\n\
252b5132 1112-u ignored\n\
23e1d84c
AM		 1113-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1114-mpwr generate code for POWER (RIOS1)\n\
1115-m601 generate code for PowerPC 601\n\
418c1742 1116-mppc, -mppc32, -m603, -m604\n\
23e1d84c 1117 generate code for PowerPC 603/604\n\
df12615d 1118-m403, -m405 generate code for PowerPC 403/405\n\
3d8aea2f 1119-m440 generate code for PowerPC 440\n\
f5c120c5 1120-m7400, -m7410, -m7450, -m7455\n\
c3d65c1c
BE		 1121 generate code for PowerPC 7400/7410/7450/7455\n\
1122-m750cl generate code for PowerPC 750cl\n"));
df12615d 1123 fprintf (stream, _("\
23e1d84c 1124-mppc64, -m620 generate code for PowerPC 620/625/630\n\
d0e9a01c 1125-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
a09cf9bd
MG		 1126-mbooke64 generate code for 64-bit PowerPC BookE\n\
1127-mbooke, mbooke32 generate code for 32-bit PowerPC BookE\n\
23e1d84c 1128-mpower4 generate code for Power4 architecture\n\
b0648eec 1129-mpower5 generate code for Power5 architecture\n\
9622b051 1130-mpower6 generate code for Power6 architecture\n\
ede602d7 1131-mcell generate code for Cell Broadband Engine architecture\n\
252b5132 1132-mcom generate code Power/PowerPC common instructions\n\
df12615d 1133-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1134 fprintf (stream, _("\
df12615d 1135-maltivec generate code for AltiVec\n\
36ae0db3 1136-me300 generate code for PowerPC e300 family\n\
6a0c61b7 1137-me500, -me500x2 generate code for Motorola e500 core complex\n\
df12615d
AM		 1138-mspe generate code for Motorola SPE instructions\n\
1139-mregnames Allow symbolic names for registers\n\
1140-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1141#ifdef OBJ_ELF
bc805888 1142 fprintf (stream, _("\
252b5132
RH		 1143-mrelocatable support for GCC's -mrelocatble option\n\
1144-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1145-memb set PPC_EMB bit in ELF flags\n\
df12615d 1146-mlittle, -mlittle-endian, -l, -le\n\
252b5132 1147 generate code for a little endian machine\n\
df12615d
AM		 1148-mbig, -mbig-endian, -b, -be\n\
1149 generate code for a big endian machine\n\
252b5132
RH		 1150-msolaris generate code for Solaris\n\
1151-mno-solaris do not generate code for Solaris\n\
1152-V print assembler version number\n\
1153-Qy, -Qn ignored\n"));
1154#endif
1155}
1156\f
1157/* Set ppc_cpu if it is not already set. */
1158
1159static void
98027b10 1160ppc_set_cpu (void)
252b5132
RH		 1161{
1162 const char *default_os = TARGET_OS;
1163 const char *default_cpu = TARGET_CPU;
1164
3c9030c1 1165 if ((ppc_cpu & ~PPC_OPCODE_ANY) == 0)
252b5132 1166 {
2a98c3a6 1167 if (ppc_obj64)
3c9030c1 1168 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
2a98c3a6
AM		 1169 else if (strncmp (default_os, "aix", 3) == 0
1170 && default_os[3] >= '4' && default_os[3] <= '9')
3c9030c1 1171 ppc_cpu |= PPC_OPCODE_COMMON | PPC_OPCODE_32;
252b5132 1172 else if (strncmp (default_os, "aix3", 4) == 0)
3c9030c1 1173 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
252b5132 1174 else if (strcmp (default_cpu, "rs6000") == 0)
3c9030c1 1175 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
0baf16f2 1176 else if (strncmp (default_cpu, "powerpc", 7) == 0)
23d36e92 1177 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
252b5132 1178 else
99a814a1
AM		 1179 as_fatal (_("Unknown default cpu = %s, os = %s"),
1180 default_cpu, default_os);
252b5132
RH		 1181 }
1182}
1183
9232bbb0
AM		 1184/* Figure out the BFD architecture to use. This function and ppc_mach
1185 are called well before md_begin, when the output file is opened. */
252b5132
RH		 1186
1187enum bfd_architecture
98027b10 1188ppc_arch (void)
252b5132
RH		 1189{
1190 const char *default_cpu = TARGET_CPU;
1191 ppc_set_cpu ();
1192
1193 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1194 return bfd_arch_powerpc;
1195 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1196 return bfd_arch_rs6000;
1197 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1198 {
1199 if (strcmp (default_cpu, "rs6000") == 0)
1200 return bfd_arch_rs6000;
0baf16f2 1201 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1202 return bfd_arch_powerpc;
1203 }
1204
1205 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1206 return bfd_arch_unknown;
1207}
1208
7f6d05e8 1209unsigned long
98027b10 1210ppc_mach (void)
7f6d05e8 1211{
2a98c3a6
AM		 1212 if (ppc_obj64)
1213 return bfd_mach_ppc64;
1214 else if (ppc_arch () == bfd_arch_rs6000)
1215 return bfd_mach_rs6k;
1216 else
1217 return bfd_mach_ppc;
7f6d05e8
CP		 1218}
1219
81d4177b 1220extern char*
98027b10 1221ppc_target_format (void)
7f6d05e8
CP		 1222{
1223#ifdef OBJ_COFF
1224#ifdef TE_PE
99a814a1 1225 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1226#elif TE_POWERMAC
0baf16f2 1227 return "xcoff-powermac";
7f6d05e8 1228#else
eb1e0e80 1229# ifdef TE_AIX5
2b3c4602 1230 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1231# else
2b3c4602 1232 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1233# endif
7f6d05e8 1234#endif
7f6d05e8
CP		 1235#endif
1236#ifdef OBJ_ELF
9d8504b1
PB		 1237# ifdef TE_VXWORKS
1238 return "elf32-powerpc-vxworks";
1239# else
0baf16f2 1240 return (target_big_endian
2b3c4602
AM		 1241 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1242 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
9d8504b1 1243# endif
7f6d05e8
CP		 1244#endif
1245}
1246
69c040df
AM		 1247/* Insert opcodes and macros into hash tables. Called at startup and
1248 for .cpu pseudo. */
252b5132 1249
69c040df
AM		 1250static void
1251ppc_setup_opcodes (void)
252b5132 1252{
98027b10 1253 const struct powerpc_opcode *op;
252b5132
RH		 1254 const struct powerpc_opcode *op_end;
1255 const struct powerpc_macro *macro;
1256 const struct powerpc_macro *macro_end;
b84bf58a 1257 bfd_boolean bad_insn = FALSE;
8dbcd839 1258 unsigned long prev_opcode = 0;
252b5132 1259
69c040df
AM		 1260 if (ppc_hash != NULL)
1261 hash_die (ppc_hash);
1262 if (ppc_macro_hash != NULL)
1263 hash_die (ppc_macro_hash);
252b5132
RH		 1264
1265 /* Insert the opcodes into a hash table. */
1266 ppc_hash = hash_new ();
1267
c43a438d 1268 if (ENABLE_CHECKING)
b84bf58a 1269 {
c43a438d 1270 unsigned int i;
b84bf58a 1271
c43a438d
AM		 1272 /* Check operand masks. Code here and in the disassembler assumes
1273 all the 1's in the mask are contiguous. */
1274 for (i = 0; i < num_powerpc_operands; ++i)
b84bf58a 1275 {
c43a438d
AM		 1276 unsigned long mask = powerpc_operands[i].bitm;
1277 unsigned long right_bit;
1278 unsigned int j;
1279
1280 right_bit = mask & -mask;
1281 mask += right_bit;
1282 right_bit = mask & -mask;
1283 if (mask != right_bit)
1284 {
1285 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1286 bad_insn = TRUE;
1287 }
1288 for (j = i + 1; j < num_powerpc_operands; ++j)
1289 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1290 sizeof (powerpc_operands[0])) == 0)
1291 {
1292 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1293 j, i);
1294 bad_insn = TRUE;
1295 }
b84bf58a
AM		 1296 }
1297 }
1298
252b5132
RH		 1299 op_end = powerpc_opcodes + powerpc_num_opcodes;
1300 for (op = powerpc_opcodes; op < op_end; op++)
1301 {
c43a438d 1302 if (ENABLE_CHECKING)
b84bf58a 1303 {
c43a438d
AM		 1304 const unsigned char *o;
1305 unsigned long omask = op->mask;
8dbcd839
PB		 1306 unsigned long major_opcode = PPC_OP (op->opcode);
1307
1308 /* The major opcodes had better be sorted. Code in the disassembler
1309 assumes the insns are sorted according to major opcode. */
1310 if (major_opcode < prev_opcode)
1311 {
1312 as_bad (_("major opcode is not sorted for %s"),
1313 op->name);
1314 bad_insn = TRUE;
1315 }
1316 prev_opcode = major_opcode;
c43a438d
AM		 1317
1318 /* The mask had better not trim off opcode bits. */
1319 if ((op->opcode & omask) != op->opcode)
1320 {
1321 as_bad (_("mask trims opcode bits for %s"),
1322 op->name);
1323 bad_insn = TRUE;
1324 }
1325
1326 /* The operands must not overlap the opcode or each other. */
1327 for (o = op->operands; *o; ++o)
1328 if (*o >= num_powerpc_operands)
1329 {
1330 as_bad (_("operand index error for %s"),
1331 op->name);
1332 bad_insn = TRUE;
1333 }
1334 else
b84bf58a 1335 {
c43a438d
AM		 1336 const struct powerpc_operand *operand = &powerpc_operands[*o];
1337 if (operand->shift >= 0)
b84bf58a 1338 {
c43a438d
AM		 1339 unsigned long mask = operand->bitm << operand->shift;
1340 if (omask & mask)
1341 {
1342 as_bad (_("operand %d overlap in %s"),
1343 (int) (o - op->operands), op->name);
1344 bad_insn = TRUE;
1345 }
1346 omask |= mask;
b84bf58a 1347 }
b84bf58a 1348 }
c43a438d 1349 }
252b5132 1350
2b3c4602 1351 if ((op->flags & ppc_cpu & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) != 0
252b5132 1352 && ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == 0
2b3c4602
AM		 1353 || ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64))
1354 == (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64)))
23e1d84c 1355 || (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0)
341026c1
NC		 1356 /* Certain instructions (eg: extsw) do not exist in the
1357 32-bit BookE instruction set, but they do exist in the
1358 64-bit BookE instruction set, and other PPC instruction
1359 sets. Check to see if the opcode has the BOOKE64 flag set.
1360 If it does make sure that the target CPU is not the BookE32. */
1361 && ((op->flags & PPC_OPCODE_BOOKE64) == 0
1362 || (ppc_cpu & PPC_OPCODE_BOOKE64) == PPC_OPCODE_BOOKE64
1363 || (ppc_cpu & PPC_OPCODE_BOOKE) == 0)
23e1d84c
AM		 1364 && ((op->flags & (PPC_OPCODE_POWER4 | PPC_OPCODE_NOPOWER4)) == 0
1365 || ((op->flags & PPC_OPCODE_POWER4)
b0648eec
AM		 1366 == (ppc_cpu & PPC_OPCODE_POWER4)))
1367 && ((op->flags & PPC_OPCODE_POWER5) == 0
1368 || ((op->flags & PPC_OPCODE_POWER5)
9622b051
AM		 1369 == (ppc_cpu & PPC_OPCODE_POWER5)))
1370 && ((op->flags & PPC_OPCODE_POWER6) == 0
1371 || ((op->flags & PPC_OPCODE_POWER6)
1372 == (ppc_cpu & PPC_OPCODE_POWER6))))
252b5132
RH		 1373 {
1374 const char *retval;
1375
98027b10 1376 retval = hash_insert (ppc_hash, op->name, (void *) op);
69c040df 1377 if (retval != NULL)
252b5132 1378 {
99a814a1 1379 /* Ignore Power duplicates for -m601. */
252b5132
RH		 1380 if ((ppc_cpu & PPC_OPCODE_601) != 0
1381 && (op->flags & PPC_OPCODE_POWER) != 0)
1382 continue;
1383
b84bf58a 1384 as_bad (_("duplicate instruction %s"),
99a814a1 1385 op->name);
b84bf58a 1386 bad_insn = TRUE;
252b5132
RH		 1387 }
1388 }
1389 }
1390
3c9030c1
AM		 1391 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1392 for (op = powerpc_opcodes; op < op_end; op++)
98027b10 1393 hash_insert (ppc_hash, op->name, (void *) op);
3c9030c1 1394
252b5132
RH		 1395 /* Insert the macros into a hash table. */
1396 ppc_macro_hash = hash_new ();
1397
1398 macro_end = powerpc_macros + powerpc_num_macros;
1399 for (macro = powerpc_macros; macro < macro_end; macro++)
1400 {
1401 if ((macro->flags & ppc_cpu) != 0)
1402 {
1403 const char *retval;
1404
98027b10 1405 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
252b5132
RH		 1406 if (retval != (const char *) NULL)
1407 {
b84bf58a
AM		 1408 as_bad (_("duplicate macro %s"), macro->name);
1409 bad_insn = TRUE;
252b5132
RH		 1410 }
1411 }
1412 }
1413
b84bf58a 1414 if (bad_insn)
252b5132 1415 abort ();
69c040df
AM		 1416}
1417
1418/* This function is called when the assembler starts up. It is called
1419 after the options have been parsed and the output file has been
1420 opened. */
1421
1422void
98027b10 1423md_begin (void)
69c040df
AM		 1424{
1425 ppc_set_cpu ();
1426
1427 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1428
1429#ifdef OBJ_ELF
1430 /* Set the ELF flags if desired. */
1431 if (ppc_flags && !msolaris)
1432 bfd_set_private_flags (stdoutput, ppc_flags);
1433#endif
1434
1435 ppc_setup_opcodes ();
252b5132 1436
67c1ffbe 1437 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1438 by the user. */
252b5132
RH		 1439 if (!set_target_endian)
1440 {
1441 set_target_endian = 1;
1442 target_big_endian = PPC_BIG_ENDIAN;
1443 }
1444
1445#ifdef OBJ_XCOFF
1446 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1447
1448 /* Create dummy symbols to serve as initial csects. This forces the
1449 text csects to precede the data csects. These symbols will not
1450 be output. */
1451 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1452 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1453 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1454 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1455#endif
1456
1457#ifdef TE_PE
1458
1459 ppc_current_section = text_section;
81d4177b 1460 ppc_previous_section = 0;
252b5132
RH		 1461
1462#endif
1463}
1464
6a0c61b7 1465void
98027b10 1466ppc_cleanup (void)
6a0c61b7 1467{
dc1d03fc 1468#ifdef OBJ_ELF
6a0c61b7
EZ		 1469 if (ppc_apuinfo_list == NULL)
1470 return;
1471
1472 /* Ok, so write the section info out. We have this layout:
1473
1474 byte data what
1475 ---- ---- ----
1476 0 8 length of "APUinfo\0"
1477 4 (n*4) number of APU's (4 bytes each)
1478 8 2 note type 2
1479 12 "APUinfo\0" name
1480 20 APU#1 first APU's info
1481 24 APU#2 second APU's info
1482 ... ...
1483 */
1484 {
1485 char *p;
1486 asection *seg = now_seg;
1487 subsegT subseg = now_subseg;
1488 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1489 unsigned int i;
6a0c61b7
EZ		 1490
1491 /* Create the .PPC.EMB.apuinfo section. */
1492 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1493 bfd_set_section_flags (stdoutput,
1494 apuinfo_secp,
e1a9cb8e 1495 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1496
1497 p = frag_more (4);
1498 md_number_to_chars (p, (valueT) 8, 4);
1499
1500 p = frag_more (4);
e98d298c 1501 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1502
1503 p = frag_more (4);
1504 md_number_to_chars (p, (valueT) 2, 4);
1505
1506 p = frag_more (8);
1507 strcpy (p, "APUinfo");
1508
1509 for (i = 0; i < ppc_apuinfo_num; i++)
1510 {
b34976b6
AM		 1511 p = frag_more (4);
1512 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1513 }
1514
1515 frag_align (2, 0, 0);
1516
1517 /* We probably can't restore the current segment, for there likely
1518 isn't one yet... */
1519 if (seg && subseg)
1520 subseg_set (seg, subseg);
1521 }
dc1d03fc 1522#endif
6a0c61b7
EZ		 1523}
1524
252b5132
RH		 1525/* Insert an operand value into an instruction. */
1526
1527static unsigned long
a1867a27
AM		 1528ppc_insert_operand (unsigned long insn,
1529 const struct powerpc_operand *operand,
1530 offsetT val,
783de163 1531 unsigned long ppc_cpu,
a1867a27
AM		 1532 char *file,
1533 unsigned int line)
252b5132 1534{
b84bf58a 1535 long min, max, right;
eb42fac1 1536
b84bf58a
AM		 1537 max = operand->bitm;
1538 right = max & -max;
1539 min = 0;
1540
1541 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
252b5132 1542 {
b84bf58a 1543 if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0)
931774a9
AM		 1544 max = (max >> 1) & -right;
1545 min = ~max & -right;
b84bf58a 1546 }
252b5132 1547
b84bf58a 1548 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
3896c469 1549 max++;
252b5132 1550
b84bf58a 1551 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
a1867a27
AM		 1552 {
1553 long tmp = min;
1554 min = -max;
1555 max = -tmp;
1556 }
b84bf58a 1557
a1867a27
AM		 1558 if (min <= max)
1559 {
1560 /* Some people write constants with the sign extension done by
1561 hand but only up to 32 bits. This shouldn't really be valid,
1562 but, to permit this code to assemble on a 64-bit host, we
1563 sign extend the 32-bit value to 64 bits if so doing makes the
1564 value valid. */
1565 if (val > max
1566 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1567 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1568 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1569 val = val - 0x80000000 - 0x80000000;
1570
1571 /* Similarly, people write expressions like ~(1<<15), and expect
1572 this to be OK for a 32-bit unsigned value. */
1573 else if (val < min
1574 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1575 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1576 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1577 val = val + 0x80000000 + 0x80000000;
1578
1579 else if (val < min
1580 || val > max
1581 || (val & (right - 1)) != 0)
1582 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1583 }
b84bf58a 1584
252b5132
RH		 1585 if (operand->insert)
1586 {
1587 const char *errmsg;
1588
1589 errmsg = NULL;
2b3c4602 1590 insn = (*operand->insert) (insn, (long) val, ppc_cpu, &errmsg);
252b5132 1591 if (errmsg != (const char *) NULL)
0baf16f2 1592 as_bad_where (file, line, errmsg);
252b5132
RH		 1593 }
1594 else
b84bf58a 1595 insn |= ((long) val & operand->bitm) << operand->shift;
252b5132
RH		 1596
1597 return insn;
1598}
1599
1600\f
1601#ifdef OBJ_ELF
1602/* Parse @got, etc. and return the desired relocation. */
1603static bfd_reloc_code_real_type
98027b10 1604ppc_elf_suffix (char **str_p, expressionS *exp_p)
252b5132
RH		 1605{
1606 struct map_bfd {
1607 char *string;
b7d7dc63
AM		 1608 unsigned int length : 8;
1609 unsigned int valid32 : 1;
1610 unsigned int valid64 : 1;
1611 unsigned int reloc;
252b5132
RH		 1612 };
1613
1614 char ident[20];
1615 char *str = *str_p;
1616 char *str2;
1617 int ch;
1618 int len;
15c1449b 1619 const struct map_bfd *ptr;
252b5132 1620
b7d7dc63
AM		 1621#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1622#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1623#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1624
15c1449b 1625 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1626 MAP ("l", BFD_RELOC_LO16),
1627 MAP ("h", BFD_RELOC_HI16),
1628 MAP ("ha", BFD_RELOC_HI16_S),
1629 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1630 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1631 MAP ("got", BFD_RELOC_16_GOTOFF),
1632 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1633 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1634 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1635 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1636 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1637 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1638 MAP ("copy", BFD_RELOC_PPC_COPY),
1639 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1640 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1641 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1642 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1643 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1644 MAP ("tls", BFD_RELOC_PPC_TLS),
1645 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1646 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1647 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1648 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1649 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1650 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1651 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1652 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1653 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1654 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1655 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1656 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1657 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1658 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1659 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1660 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1661 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1662 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1663 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1664 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1665 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1666 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1667 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1668 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1669 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1670 MAP32 ("fixup", BFD_RELOC_CTOR),
1671 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1672 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1673 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1674 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1675 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1676 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1677 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1678 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1679 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1680 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1681 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1682 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1683 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1684 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1685 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1686 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1687 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1688 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1689 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1690 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1691 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1692 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1693 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1694 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1695 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1696 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1697 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1698 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1699 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1700 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1701 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1702 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1703 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1704 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1705 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1706 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1707 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1708 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1709 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1710 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1711 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
252b5132
RH		 1712 };
1713
1714 if (*str++ != '@')
1715 return BFD_RELOC_UNUSED;
1716
1717 for (ch = *str, str2 = ident;
1718 (str2 < ident + sizeof (ident) - 1
3882b010 1719 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1720 ch = *++str)
1721 {
3882b010 1722 *str2++ = TOLOWER (ch);
252b5132
RH		 1723 }
1724
1725 *str2 = '\0';
1726 len = str2 - ident;
1727
1728 ch = ident[0];
1729 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1730 if (ch == ptr->string[0]
1731 && len == ptr->length
b7d7dc63
AM		 1732 && memcmp (ident, ptr->string, ptr->length) == 0
1733 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 1734 {
15c1449b
AM		 1735 int reloc = ptr->reloc;
1736
cdba85ec 1737 if (!ppc_obj64)
5f6db75a
AM		 1738 if (exp_p->X_add_number != 0
1739 && (reloc == (int) BFD_RELOC_16_GOTOFF
1740 || reloc == (int) BFD_RELOC_LO16_GOTOFF
1741 || reloc == (int) BFD_RELOC_HI16_GOTOFF
1742 || reloc == (int) BFD_RELOC_HI16_S_GOTOFF))
1743 as_warn (_("identifier+constant@got means identifier@got+constant"));
1744
1745 /* Now check for identifier@suffix+constant. */
1746 if (*str == '-' || *str == '+')
252b5132 1747 {
5f6db75a
AM		 1748 char *orig_line = input_line_pointer;
1749 expressionS new_exp;
1750
1751 input_line_pointer = str;
1752 expression (&new_exp);
1753 if (new_exp.X_op == O_constant)
252b5132 1754 {
5f6db75a
AM		 1755 exp_p->X_add_number += new_exp.X_add_number;
1756 str = input_line_pointer;
252b5132 1757 }
5f6db75a
AM		 1758
1759 if (&input_line_pointer != str_p)
1760 input_line_pointer = orig_line;
252b5132 1761 }
252b5132 1762 *str_p = str;
0baf16f2 1763
2b3c4602 1764 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 1765 && exp_p->X_op == O_symbol
1766 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 1767 {
9f2b53d7
AM		 1768 /* Change the symbol so that the dummy .TOC. symbol can be
1769 omitted from the object file. */
0baf16f2
AM		 1770 exp_p->X_add_symbol = &abs_symbol;
1771 }
1772
15c1449b 1773 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 1774 }
1775
1776 return BFD_RELOC_UNUSED;
1777}
1778
99a814a1
AM		 1779/* Like normal .long/.short/.word, except support @got, etc.
1780 Clobbers input_line_pointer, checks end-of-line. */
252b5132 1781static void
98027b10 1782ppc_elf_cons (int nbytes /* 1=.byte, 2=.word, 4=.long, 8=.llong */)
252b5132
RH		 1783{
1784 expressionS exp;
1785 bfd_reloc_code_real_type reloc;
1786
1787 if (is_it_end_of_statement ())
1788 {
1789 demand_empty_rest_of_line ();
1790 return;
1791 }
1792
1793 do
1794 {
1795 expression (&exp);
1796 if (exp.X_op == O_symbol
1797 && *input_line_pointer == '@'
99a814a1
AM		 1798 && (reloc = ppc_elf_suffix (&input_line_pointer,
1799 &exp)) != BFD_RELOC_UNUSED)
252b5132 1800 {
99a814a1
AM		 1801 reloc_howto_type *reloc_howto;
1802 int size;
1803
1804 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1805 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH		 1806
1807 if (size > nbytes)
0baf16f2
AM		 1808 {
1809 as_bad (_("%s relocations do not fit in %d bytes\n"),
1810 reloc_howto->name, nbytes);
1811 }
252b5132
RH		 1812 else
1813 {
0baf16f2
AM		 1814 char *p;
1815 int offset;
252b5132 1816
0baf16f2
AM		 1817 p = frag_more (nbytes);
1818 offset = 0;
1819 if (target_big_endian)
1820 offset = nbytes - size;
99a814a1
AM		 1821 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1822 &exp, 0, reloc);
252b5132
RH		 1823 }
1824 }
1825 else
1826 emit_expr (&exp, (unsigned int) nbytes);
1827 }
1828 while (*input_line_pointer++ == ',');
1829
99a814a1
AM		 1830 /* Put terminator back into stream. */
1831 input_line_pointer--;
252b5132
RH		 1832 demand_empty_rest_of_line ();
1833}
1834
1835/* Solaris pseduo op to change to the .rodata section. */
1836static void
98027b10 1837ppc_elf_rdata (int xxx)
252b5132
RH		 1838{
1839 char *save_line = input_line_pointer;
1840 static char section[] = ".rodata\n";
1841
99a814a1 1842 /* Just pretend this is .section .rodata */
252b5132
RH		 1843 input_line_pointer = section;
1844 obj_elf_section (xxx);
1845
1846 input_line_pointer = save_line;
1847}
1848
99a814a1 1849/* Pseudo op to make file scope bss items. */
252b5132 1850static void
98027b10 1851ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
252b5132 1852{
98027b10
AM		 1853 char *name;
1854 char c;
1855 char *p;
252b5132 1856 offsetT size;
98027b10 1857 symbolS *symbolP;
252b5132
RH		 1858 offsetT align;
1859 segT old_sec;
1860 int old_subsec;
1861 char *pfrag;
1862 int align2;
1863
1864 name = input_line_pointer;
1865 c = get_symbol_end ();
1866
99a814a1 1867 /* just after name is now '\0'. */
252b5132
RH		 1868 p = input_line_pointer;
1869 *p = c;
1870 SKIP_WHITESPACE ();
1871 if (*input_line_pointer != ',')
1872 {
1873 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
1874 ignore_rest_of_line ();
1875 return;
1876 }
1877
1878 input_line_pointer++; /* skip ',' */
1879 if ((size = get_absolute_expression ()) < 0)
1880 {
1881 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
1882 ignore_rest_of_line ();
1883 return;
1884 }
1885
1886 /* The third argument to .lcomm is the alignment. */
1887 if (*input_line_pointer != ',')
1888 align = 8;
1889 else
1890 {
1891 ++input_line_pointer;
1892 align = get_absolute_expression ();
1893 if (align <= 0)
1894 {
1895 as_warn (_("ignoring bad alignment"));
1896 align = 8;
1897 }
1898 }
1899
1900 *p = 0;
1901 symbolP = symbol_find_or_make (name);
1902 *p = c;
1903
1904 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
1905 {
1906 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
1907 S_GET_NAME (symbolP));
1908 ignore_rest_of_line ();
1909 return;
1910 }
1911
1912 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
1913 {
1914 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
1915 S_GET_NAME (symbolP),
1916 (long) S_GET_VALUE (symbolP),
1917 (long) size);
1918
1919 ignore_rest_of_line ();
1920 return;
1921 }
1922
99a814a1 1923 /* Allocate_bss. */
252b5132
RH		 1924 old_sec = now_seg;
1925 old_subsec = now_subseg;
1926 if (align)
1927 {
99a814a1 1928 /* Convert to a power of 2 alignment. */
252b5132
RH		 1929 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
1930 if (align != 1)
1931 {
1932 as_bad (_("Common alignment not a power of 2"));
1933 ignore_rest_of_line ();
1934 return;
1935 }
1936 }
1937 else
1938 align2 = 0;
1939
1940 record_alignment (bss_section, align2);
1941 subseg_set (bss_section, 0);
1942 if (align2)
1943 frag_align (align2, 0, 0);
1944 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 1945 symbol_get_frag (symbolP)->fr_symbol = 0;
1946 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 1947 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
1948 (char *) 0);
1949 *pfrag = 0;
1950 S_SET_SIZE (symbolP, size);
1951 S_SET_SEGMENT (symbolP, bss_section);
1952 subseg_set (old_sec, old_subsec);
1953 demand_empty_rest_of_line ();
1954}
1955
1956/* Validate any relocations emitted for -mrelocatable, possibly adding
1957 fixups for word relocations in writable segments, so we can adjust
1958 them at runtime. */
1959static void
98027b10 1960ppc_elf_validate_fix (fixS *fixp, segT seg)
252b5132
RH		 1961{
1962 if (fixp->fx_done || fixp->fx_pcrel)
1963 return;
1964
1965 switch (shlib)
1966 {
1967 case SHLIB_NONE:
1968 case SHLIB_PIC:
1969 return;
1970
5d6f4f16 1971 case SHLIB_MRELOCATABLE:
252b5132
RH		 1972 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
1973 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
1974 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
1975 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
1976 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 1977 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 1978 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
1979 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
1980 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 1981 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 1982 && strcmp (segment_name (seg), ".got2") != 0
1983 && strcmp (segment_name (seg), ".dtors") != 0
1984 && strcmp (segment_name (seg), ".ctors") != 0
1985 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 1986 && strcmp (segment_name (seg), ".gcc_except_table") != 0
1987 && strcmp (segment_name (seg), ".eh_frame") != 0
1988 && strcmp (segment_name (seg), ".ex_shared") != 0)
1989 {
1990 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
1991 || fixp->fx_r_type != BFD_RELOC_CTOR)
1992 {
1993 as_bad_where (fixp->fx_file, fixp->fx_line,
1994 _("Relocation cannot be done when using -mrelocatable"));
1995 }
1996 }
1997 return;
1998 }
1999}
0baf16f2 2000
7e8d4ab4
AM		 2001/* Prevent elf_frob_file_before_adjust removing a weak undefined
2002 function descriptor sym if the corresponding code sym is used. */
2003
2004void
98027b10 2005ppc_frob_file_before_adjust (void)
0baf16f2 2006{
7e8d4ab4 2007 symbolS *symp;
9232bbb0 2008 asection *toc;
0baf16f2 2009
7e8d4ab4
AM		 2010 if (!ppc_obj64)
2011 return;
2012
2013 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 2014 {
7e8d4ab4
AM		 2015 const char *name;
2016 char *dotname;
2017 symbolS *dotsym;
2018 size_t len;
2019
2020 name = S_GET_NAME (symp);
2021 if (name[0] == '.')
2022 continue;
2023
2024 if (! S_IS_WEAK (symp)
2025 || S_IS_DEFINED (symp))
2026 continue;
2027
2028 len = strlen (name) + 1;
2029 dotname = xmalloc (len + 1);
2030 dotname[0] = '.';
2031 memcpy (dotname + 1, name, len);
461b725f 2032 dotsym = symbol_find_noref (dotname, 1);
7e8d4ab4
AM		 2033 free (dotname);
2034 if (dotsym != NULL && (symbol_used_p (dotsym)
2035 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 2036 symbol_mark_used (symp);
2037
0baf16f2
AM		 2038 }
2039
9232bbb0
AM		 2040 toc = bfd_get_section_by_name (stdoutput, ".toc");
2041 if (toc != NULL
2042 && bfd_section_size (stdoutput, toc) > 0x10000)
2043 as_warn (_("TOC section size exceeds 64k"));
2044
7e8d4ab4
AM		 2045 /* Don't emit .TOC. symbol. */
2046 symp = symbol_find (".TOC.");
2047 if (symp != NULL)
2048 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
0baf16f2 2049}
252b5132
RH		 2050#endif /* OBJ_ELF */
2051\f
2052#ifdef TE_PE
2053
2054/*
99a814a1 2055 * Summary of parse_toc_entry.
252b5132
RH		 2056 *
2057 * in: Input_line_pointer points to the '[' in one of:
2058 *
2059 * [toc] [tocv] [toc32] [toc64]
2060 *
2061 * Anything else is an error of one kind or another.
2062 *
81d4177b 2063 * out:
252b5132
RH		 2064 * return value: success or failure
2065 * toc_kind: kind of toc reference
2066 * input_line_pointer:
2067 * success: first char after the ']'
2068 * failure: unchanged
2069 *
2070 * settings:
2071 *
2072 * [toc] - rv == success, toc_kind = default_toc
2073 * [tocv] - rv == success, toc_kind = data_in_toc
2074 * [toc32] - rv == success, toc_kind = must_be_32
2075 * [toc64] - rv == success, toc_kind = must_be_64
2076 *
2077 */
2078
81d4177b
KH		 2079enum toc_size_qualifier
2080{
252b5132
RH		 2081 default_toc, /* The toc cell constructed should be the system default size */
2082 data_in_toc, /* This is a direct reference to a toc cell */
2083 must_be_32, /* The toc cell constructed must be 32 bits wide */
2084 must_be_64 /* The toc cell constructed must be 64 bits wide */
2085};
2086
2087static int
98027b10 2088parse_toc_entry (enum toc_size_qualifier *toc_kind)
252b5132
RH		 2089{
2090 char *start;
2091 char *toc_spec;
2092 char c;
2093 enum toc_size_qualifier t;
2094
99a814a1 2095 /* Save the input_line_pointer. */
252b5132
RH		 2096 start = input_line_pointer;
2097
99a814a1 2098 /* Skip over the '[' , and whitespace. */
252b5132
RH		 2099 ++input_line_pointer;
2100 SKIP_WHITESPACE ();
81d4177b 2101
99a814a1 2102 /* Find the spelling of the operand. */
252b5132
RH		 2103 toc_spec = input_line_pointer;
2104 c = get_symbol_end ();
2105
99a814a1 2106 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 2107 {
2108 t = default_toc;
2109 }
99a814a1 2110 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 2111 {
2112 t = data_in_toc;
2113 }
99a814a1 2114 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2115 {
2116 t = must_be_32;
2117 }
99a814a1 2118 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2119 {
2120 t = must_be_64;
2121 }
2122 else
2123 {
2124 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2125 *input_line_pointer = c;
2126 input_line_pointer = start;
252b5132
RH		 2127 return 0;
2128 }
2129
99a814a1
AM		 2130 /* Now find the ']'. */
2131 *input_line_pointer = c;
252b5132 2132
81d4177b
KH		 2133 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2134 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2135
2136 if (c != ']')
2137 {
2138 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2139 input_line_pointer = start;
252b5132
RH		 2140 return 0;
2141 }
2142
99a814a1 2143 *toc_kind = t;
252b5132
RH		 2144 return 1;
2145}
2146#endif
2147\f
2148
dc1d03fc 2149#ifdef OBJ_ELF
6a0c61b7
EZ		 2150#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2151static void
98027b10 2152ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
6a0c61b7
EZ		 2153{
2154 unsigned int i;
2155
2156 /* Check we don't already exist. */
2157 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2158 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2159 return;
b34976b6 2160
6a0c61b7
EZ		 2161 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2162 {
2163 if (ppc_apuinfo_num_alloc == 0)
2164 {
2165 ppc_apuinfo_num_alloc = 4;
2166 ppc_apuinfo_list = (unsigned long *)
2167 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2168 }
2169 else
2170 {
2171 ppc_apuinfo_num_alloc += 4;
2172 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2173 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2174 }
2175 }
dc1d03fc 2176 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2177}
2178#undef APUID
dc1d03fc 2179#endif
6a0c61b7
EZ		 2180\f
2181
252b5132
RH		 2182/* We need to keep a list of fixups. We can't simply generate them as
2183 we go, because that would require us to first create the frag, and
2184 that would screw up references to ``.''. */
2185
2186struct ppc_fixup
2187{
2188 expressionS exp;
2189 int opindex;
2190 bfd_reloc_code_real_type reloc;
2191};
2192
2193#define MAX_INSN_FIXUPS (5)
2194
2195/* This routine is called for each instruction to be assembled. */
2196
2197void
98027b10 2198md_assemble (char *str)
252b5132
RH		 2199{
2200 char *s;
2201 const struct powerpc_opcode *opcode;
2202 unsigned long insn;
2203 const unsigned char *opindex_ptr;
2204 int skip_optional;
2205 int need_paren;
2206 int next_opindex;
2207 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2208 int fc;
2209 char *f;
09b935ac 2210 int addr_mod;
252b5132
RH		 2211 int i;
2212#ifdef OBJ_ELF
2213 bfd_reloc_code_real_type reloc;
2214#endif
2215
2216 /* Get the opcode. */
3882b010 2217 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2218 ;
2219 if (*s != '\0')
2220 *s++ = '\0';
2221
2222 /* Look up the opcode in the hash table. */
2223 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2224 if (opcode == (const struct powerpc_opcode *) NULL)
2225 {
2226 const struct powerpc_macro *macro;
2227
2228 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2229 if (macro == (const struct powerpc_macro *) NULL)
2230 as_bad (_("Unrecognized opcode: `%s'"), str);
2231 else
2232 ppc_macro (s, macro);
2233
2234 return;
2235 }
2236
2237 insn = opcode->opcode;
2238
2239 str = s;
3882b010 2240 while (ISSPACE (*str))
252b5132
RH		 2241 ++str;
2242
2243 /* PowerPC operands are just expressions. The only real issue is
2244 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2245 an optional operand separate the operands only with commas (in some
2246 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2247 have optional operands). Most instructions with optional operands
2248 have only one. Those that have more than one optional operand can
2249 take either all their operands or none. So, before we start seriously
2250 parsing the operands, we check to see if we have optional operands,
2251 and if we do, we count the number of commas to see which operands
2252 have been omitted. */
252b5132
RH		 2253 skip_optional = 0;
2254 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2255 {
2256 const struct powerpc_operand *operand;
2257
2258 operand = &powerpc_operands[*opindex_ptr];
2259 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2260 {
2261 unsigned int opcount;
7fe9cf6b
NC		 2262 unsigned int num_operands_expected;
2263 unsigned int i;
252b5132
RH		 2264
2265 /* There is an optional operand. Count the number of
2266 commas in the input line. */
2267 if (*str == '\0')
2268 opcount = 0;
2269 else
2270 {
2271 opcount = 1;
2272 s = str;
2273 while ((s = strchr (s, ',')) != (char *) NULL)
2274 {
2275 ++opcount;
2276 ++s;
2277 }
2278 }
2279
7fe9cf6b
NC		 2280 /* Compute the number of expected operands.
2281 Do not count fake operands. */
2282 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2283 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2284 ++ num_operands_expected;
2285
252b5132
RH		 2286 /* If there are fewer operands in the line then are called
2287 for by the instruction, we want to skip the optional
1f6c9eb0 2288 operands. */
7fe9cf6b 2289 if (opcount < num_operands_expected)
252b5132
RH		 2290 skip_optional = 1;
2291
2292 break;
2293 }
2294 }
2295
2296 /* Gather the operands. */
2297 need_paren = 0;
2298 next_opindex = 0;
2299 fc = 0;
2300 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2301 {
2302 const struct powerpc_operand *operand;
2303 const char *errmsg;
2304 char *hold;
2305 expressionS ex;
2306 char endc;
2307
2308 if (next_opindex == 0)
2309 operand = &powerpc_operands[*opindex_ptr];
2310 else
2311 {
2312 operand = &powerpc_operands[next_opindex];
2313 next_opindex = 0;
2314 }
252b5132
RH		 2315 errmsg = NULL;
2316
2317 /* If this is a fake operand, then we do not expect anything
2318 from the input. */
2319 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2320 {
2b3c4602 2321 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2322 if (errmsg != (const char *) NULL)
2323 as_bad (errmsg);
2324 continue;
2325 }
2326
2327 /* If this is an optional operand, and we are skipping it, just
2328 insert a zero. */
2329 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2330 && skip_optional)
2331 {
2332 if (operand->insert)
2333 {
2b3c4602 2334 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2335 if (errmsg != (const char *) NULL)
2336 as_bad (errmsg);
2337 }
2338 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2339 next_opindex = *opindex_ptr + 1;
2340 continue;
2341 }
2342
2343 /* Gather the operand. */
2344 hold = input_line_pointer;
2345 input_line_pointer = str;
2346
2347#ifdef TE_PE
81d4177b 2348 if (*input_line_pointer == '[')
252b5132
RH		 2349 {
2350 /* We are expecting something like the second argument here:
99a814a1
AM		 2351 *
2352 * lwz r4,[toc].GS.0.static_int(rtoc)
2353 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2354 * The argument following the `]' must be a symbol name, and the
2355 * register must be the toc register: 'rtoc' or '2'
2356 *
2357 * The effect is to 0 as the displacement field
2358 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2359 * the appropriate variation) reloc against it based on the symbol.
2360 * The linker will build the toc, and insert the resolved toc offset.
2361 *
2362 * Note:
2363 * o The size of the toc entry is currently assumed to be
2364 * 32 bits. This should not be assumed to be a hard coded
2365 * number.
2366 * o In an effort to cope with a change from 32 to 64 bits,
2367 * there are also toc entries that are specified to be
2368 * either 32 or 64 bits:
2369 * lwz r4,[toc32].GS.0.static_int(rtoc)
2370 * lwz r4,[toc64].GS.0.static_int(rtoc)
2371 * These demand toc entries of the specified size, and the
2372 * instruction probably requires it.
2373 */
252b5132
RH		 2374
2375 int valid_toc;
2376 enum toc_size_qualifier toc_kind;
2377 bfd_reloc_code_real_type toc_reloc;
2378
99a814a1
AM		 2379 /* Go parse off the [tocXX] part. */
2380 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2381
81d4177b 2382 if (!valid_toc)
252b5132 2383 {
99a814a1
AM		 2384 /* Note: message has already been issued.
2385 FIXME: what sort of recovery should we do?
2386 demand_rest_of_line (); return; ? */
252b5132
RH		 2387 }
2388
99a814a1
AM		 2389 /* Now get the symbol following the ']'. */
2390 expression (&ex);
252b5132
RH		 2391
2392 switch (toc_kind)
2393 {
2394 case default_toc:
99a814a1
AM		 2395 /* In this case, we may not have seen the symbol yet,
2396 since it is allowed to appear on a .extern or .globl
2397 or just be a label in the .data section. */
252b5132
RH		 2398 toc_reloc = BFD_RELOC_PPC_TOC16;
2399 break;
2400 case data_in_toc:
99a814a1
AM		 2401 /* 1. The symbol must be defined and either in the toc
2402 section, or a global.
2403 2. The reloc generated must have the TOCDEFN flag set
2404 in upper bit mess of the reloc type.
2405 FIXME: It's a little confusing what the tocv
2406 qualifier can be used for. At the very least, I've
2407 seen three uses, only one of which I'm sure I can
2408 explain. */
81d4177b
KH		 2409 if (ex.X_op == O_symbol)
2410 {
252b5132 2411 assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2412 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2413 != tocdata_section)
252b5132 2414 {
99a814a1 2415 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2416 }
2417 }
2418
2419 toc_reloc = BFD_RELOC_PPC_TOC16;
2420 break;
2421 case must_be_32:
99a814a1
AM		 2422 /* FIXME: these next two specifically specify 32/64 bit
2423 toc entries. We don't support them today. Is this
2424 the right way to say that? */
252b5132
RH		 2425 toc_reloc = BFD_RELOC_UNUSED;
2426 as_bad (_("Unimplemented toc32 expression modifier"));
2427 break;
2428 case must_be_64:
99a814a1 2429 /* FIXME: see above. */
252b5132
RH		 2430 toc_reloc = BFD_RELOC_UNUSED;
2431 as_bad (_("Unimplemented toc64 expression modifier"));
2432 break;
2433 default:
bc805888 2434 fprintf (stderr,
99a814a1
AM		 2435 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2436 toc_kind);
bc805888 2437 abort ();
252b5132
RH		 2438 break;
2439 }
2440
2441 /* We need to generate a fixup for this expression. */
2442 if (fc >= MAX_INSN_FIXUPS)
2443 as_fatal (_("too many fixups"));
2444
2445 fixups[fc].reloc = toc_reloc;
2446 fixups[fc].exp = ex;
2447 fixups[fc].opindex = *opindex_ptr;
2448 ++fc;
2449
99a814a1
AM		 2450 /* Ok. We've set up the fixup for the instruction. Now make it
2451 look like the constant 0 was found here. */
252b5132
RH		 2452 ex.X_unsigned = 1;
2453 ex.X_op = O_constant;
2454 ex.X_add_number = 0;
2455 ex.X_add_symbol = NULL;
2456 ex.X_op_symbol = NULL;
2457 }
2458
2459 else
2460#endif /* TE_PE */
2461 {
2ad068be
AM		 2462 if ((reg_names_p && (operand->flags & PPC_OPERAND_CR) != 0)
2463 || !register_name (&ex))
252b5132 2464 {
13abbae3
AM		 2465 char save_lex = lex_type['%'];
2466
252b5132 2467 if ((operand->flags & PPC_OPERAND_CR) != 0)
13abbae3
AM		 2468 {
2469 cr_operand = TRUE;
2470 lex_type['%'] |= LEX_BEGIN_NAME;
2471 }
252b5132 2472 expression (&ex);
b34976b6 2473 cr_operand = FALSE;
13abbae3 2474 lex_type['%'] = save_lex;
252b5132
RH		 2475 }
2476 }
2477
2478 str = input_line_pointer;
2479 input_line_pointer = hold;
2480
2481 if (ex.X_op == O_illegal)
2482 as_bad (_("illegal operand"));
2483 else if (ex.X_op == O_absent)
2484 as_bad (_("missing operand"));
2485 else if (ex.X_op == O_register)
2486 {
2487 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2488 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2489 }
2490 else if (ex.X_op == O_constant)
2491 {
2492#ifdef OBJ_ELF
81d4177b 2493 /* Allow @HA, @L, @H on constants. */
252b5132
RH		 2494 char *orig_str = str;
2495
2496 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2497 switch (reloc)
2498 {
2499 default:
2500 str = orig_str;
2501 break;
2502
2503 case BFD_RELOC_LO16:
2504 /* X_unsigned is the default, so if the user has done
0baf16f2
AM		 2505 something which cleared it, we always produce a
2506 signed value. */
2507 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH		 2508 ex.X_add_number &= 0xffff;
2509 else
0baf16f2 2510 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2511 break;
2512
2513 case BFD_RELOC_HI16:
0baf16f2
AM		 2514 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2515 ex.X_add_number = PPC_HI (ex.X_add_number);
2516 else
2517 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH		 2518 break;
2519
2520 case BFD_RELOC_HI16_S:
0baf16f2
AM		 2521 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2522 ex.X_add_number = PPC_HA (ex.X_add_number);
2523 else
2524 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2525 break;
2526
0baf16f2
AM		 2527 case BFD_RELOC_PPC64_HIGHER:
2528 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2529 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2530 else
2531 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2532 break;
2533
2534 case BFD_RELOC_PPC64_HIGHER_S:
2535 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2536 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2537 else
2538 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2539 break;
0baf16f2
AM		 2540
2541 case BFD_RELOC_PPC64_HIGHEST:
2542 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2543 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2544 else
2545 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2546 break;
2547
2548 case BFD_RELOC_PPC64_HIGHEST_S:
2549 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2550 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2551 else
2552 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2553 break;
252b5132 2554 }
0baf16f2 2555#endif /* OBJ_ELF */
252b5132 2556 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2557 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2558 }
2559#ifdef OBJ_ELF
2560 else if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2561 {
cdba85ec
AM		 2562 /* Some TLS tweaks. */
2563 switch (reloc)
2564 {
2565 default:
2566 break;
2567 case BFD_RELOC_PPC_TLS:
2568 insn = ppc_insert_operand (insn, operand, ppc_obj64 ? 13 : 2,
783de163 2569 ppc_cpu, (char *) NULL, 0);
cdba85ec
AM		 2570 break;
2571 /* We'll only use the 32 (or 64) bit form of these relocations
2572 in constants. Instructions get the 16 bit form. */
2573 case BFD_RELOC_PPC_DTPREL:
2574 reloc = BFD_RELOC_PPC_DTPREL16;
2575 break;
2576 case BFD_RELOC_PPC_TPREL:
2577 reloc = BFD_RELOC_PPC_TPREL16;
2578 break;
2579 }
2580
99a814a1
AM		 2581 /* For the absolute forms of branches, convert the PC
2582 relative form back into the absolute. */
252b5132
RH		 2583 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2584 {
2585 switch (reloc)
2586 {
2587 case BFD_RELOC_PPC_B26:
2588 reloc = BFD_RELOC_PPC_BA26;
2589 break;
2590 case BFD_RELOC_PPC_B16:
2591 reloc = BFD_RELOC_PPC_BA16;
2592 break;
2593 case BFD_RELOC_PPC_B16_BRTAKEN:
2594 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2595 break;
2596 case BFD_RELOC_PPC_B16_BRNTAKEN:
2597 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2598 break;
2599 default:
2600 break;
2601 }
2602 }
2603
2b3c4602 2604 if (ppc_obj64
adadcc0c 2605 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
0baf16f2
AM		 2606 {
2607 switch (reloc)
2608 {
2609 case BFD_RELOC_16:
2610 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2611 break;
2612 case BFD_RELOC_LO16:
2613 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2614 break;
2615 case BFD_RELOC_16_GOTOFF:
2616 reloc = BFD_RELOC_PPC64_GOT16_DS;
2617 break;
2618 case BFD_RELOC_LO16_GOTOFF:
2619 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2620 break;
2621 case BFD_RELOC_LO16_PLTOFF:
2622 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2623 break;
1cfc59d5 2624 case BFD_RELOC_16_BASEREL:
0baf16f2
AM		 2625 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2626 break;
2627 case BFD_RELOC_LO16_BASEREL:
2628 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2629 break;
2630 case BFD_RELOC_PPC_TOC16:
2631 reloc = BFD_RELOC_PPC64_TOC16_DS;
2632 break;
2633 case BFD_RELOC_PPC64_TOC16_LO:
2634 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2635 break;
2636 case BFD_RELOC_PPC64_PLTGOT16:
2637 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2638 break;
2639 case BFD_RELOC_PPC64_PLTGOT16_LO:
2640 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2641 break;
cdba85ec
AM		 2642 case BFD_RELOC_PPC_DTPREL16:
2643 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2644 break;
2645 case BFD_RELOC_PPC_DTPREL16_LO:
2646 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2647 break;
2648 case BFD_RELOC_PPC_TPREL16:
2649 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2650 break;
2651 case BFD_RELOC_PPC_TPREL16_LO:
2652 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2653 break;
2654 case BFD_RELOC_PPC_GOT_DTPREL16:
2655 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2656 case BFD_RELOC_PPC_GOT_TPREL16:
2657 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2658 break;
0baf16f2
AM		 2659 default:
2660 as_bad (_("unsupported relocation for DS offset field"));
2661 break;
2662 }
2663 }
2664
252b5132
RH		 2665 /* We need to generate a fixup for this expression. */
2666 if (fc >= MAX_INSN_FIXUPS)
2667 as_fatal (_("too many fixups"));
2668 fixups[fc].exp = ex;
2669 fixups[fc].opindex = 0;
2670 fixups[fc].reloc = reloc;
2671 ++fc;
2672 }
2673#endif /* OBJ_ELF */
2674
2675 else
2676 {
2677 /* We need to generate a fixup for this expression. */
2678 if (fc >= MAX_INSN_FIXUPS)
2679 as_fatal (_("too many fixups"));
2680 fixups[fc].exp = ex;
2681 fixups[fc].opindex = *opindex_ptr;
2682 fixups[fc].reloc = BFD_RELOC_UNUSED;
2683 ++fc;
2684 }
2685
2686 if (need_paren)
2687 {
2688 endc = ')';
2689 need_paren = 0;
c3d65c1c
BE		 2690 /* If expecting more operands, then we want to see "),". */
2691 if (*str == endc && opindex_ptr[1] != 0)
2692 {
2693 do
2694 ++str;
2695 while (ISSPACE (*str));
2696 endc = ',';
2697 }
252b5132
RH		 2698 }
2699 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2700 {
2701 endc = '(';
2702 need_paren = 1;
2703 }
2704 else
2705 endc = ',';
2706
2707 /* The call to expression should have advanced str past any
2708 whitespace. */
2709 if (*str != endc
2710 && (endc != ',' || *str != '\0'))
2711 {
2712 as_bad (_("syntax error; found `%c' but expected `%c'"), *str, endc);
2713 break;
2714 }
2715
2716 if (*str != '\0')
2717 ++str;
2718 }
2719
3882b010 2720 while (ISSPACE (*str))
252b5132
RH		 2721 ++str;
2722
2723 if (*str != '\0')
2724 as_bad (_("junk at end of line: `%s'"), str);
2725
dc1d03fc 2726#ifdef OBJ_ELF
6a0c61b7
EZ		 2727 /* Do we need/want a APUinfo section? */
2728 if (ppc_cpu & (PPC_OPCODE_SPE
2729 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS
2730 | PPC_OPCODE_BRLOCK | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
2731 | PPC_OPCODE_RFMCI))
2732 {
2733 /* These are all version "1". */
2734 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 2735 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 2736 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 2737 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 2738 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 2739 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 2740 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 2741 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 2742 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 2743 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 2744 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 2745 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 2746 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 2747 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
6a0c61b7 2748 }
dc1d03fc 2749#endif
6a0c61b7 2750
252b5132
RH		 2751 /* Write out the instruction. */
2752 f = frag_more (4);
09b935ac
AM		 2753 addr_mod = frag_now_fix () & 3;
2754 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
2755 as_bad (_("instruction address is not a multiple of 4"));
2756 frag_now->insn_addr = addr_mod;
2757 frag_now->has_code = 1;
252b5132
RH		 2758 md_number_to_chars (f, insn, 4);
2759
5d6f4f16
GK		 2760#ifdef OBJ_ELF
2761 dwarf2_emit_insn (4);
2762#endif
2763
252b5132
RH		 2764 /* Create any fixups. At this point we do not use a
2765 bfd_reloc_code_real_type, but instead just use the
2766 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2767 handle fixups for any operand type, although that is admittedly
2768 not a very exciting feature. We pick a BFD reloc type in
55cf6793 2769 md_apply_fix. */
252b5132
RH		 2770 for (i = 0; i < fc; i++)
2771 {
2772 const struct powerpc_operand *operand;
2773
2774 operand = &powerpc_operands[fixups[i].opindex];
2775 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2776 {
99a814a1 2777 reloc_howto_type *reloc_howto;
252b5132
RH		 2778 int size;
2779 int offset;
2780 fixS *fixP;
2781
99a814a1 2782 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 2783 if (!reloc_howto)
2784 abort ();
2785
2786 size = bfd_get_reloc_size (reloc_howto);
2787 offset = target_big_endian ? (4 - size) : 0;
2788
2789 if (size < 1 || size > 4)
bc805888 2790 abort ();
252b5132 2791
99a814a1
AM		 2792 fixP = fix_new_exp (frag_now,
2793 f - frag_now->fr_literal + offset,
2794 size,
2795 &fixups[i].exp,
2796 reloc_howto->pc_relative,
252b5132
RH		 2797 fixups[i].reloc);
2798
2799 /* Turn off complaints that the addend is too large for things like
2800 foo+100000@ha. */
2801 switch (fixups[i].reloc)
2802 {
2803 case BFD_RELOC_16_GOTOFF:
2804 case BFD_RELOC_PPC_TOC16:
2805 case BFD_RELOC_LO16:
2806 case BFD_RELOC_HI16:
2807 case BFD_RELOC_HI16_S:
0baf16f2 2808#ifdef OBJ_ELF
0baf16f2
AM		 2809 case BFD_RELOC_PPC64_HIGHER:
2810 case BFD_RELOC_PPC64_HIGHER_S:
2811 case BFD_RELOC_PPC64_HIGHEST:
2812 case BFD_RELOC_PPC64_HIGHEST_S:
0baf16f2 2813#endif
252b5132
RH		 2814 fixP->fx_no_overflow = 1;
2815 break;
2816 default:
2817 break;
2818 }
2819 }
2820 else
99a814a1
AM		 2821 fix_new_exp (frag_now,
2822 f - frag_now->fr_literal,
2823 4,
252b5132
RH		 2824 &fixups[i].exp,
2825 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
2826 ((bfd_reloc_code_real_type)
99a814a1 2827 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
252b5132
RH		 2828 }
2829}
2830
2831/* Handle a macro. Gather all the operands, transform them as
2832 described by the macro, and call md_assemble recursively. All the
2833 operands are separated by commas; we don't accept parentheses
2834 around operands here. */
2835
2836static void
98027b10 2837ppc_macro (char *str, const struct powerpc_macro *macro)
252b5132
RH		 2838{
2839 char *operands[10];
2840 unsigned int count;
2841 char *s;
2842 unsigned int len;
2843 const char *format;
db557034 2844 unsigned int arg;
252b5132
RH		 2845 char *send;
2846 char *complete;
2847
2848 /* Gather the users operands into the operands array. */
2849 count = 0;
2850 s = str;
2851 while (1)
2852 {
2853 if (count >= sizeof operands / sizeof operands[0])
2854 break;
2855 operands[count++] = s;
2856 s = strchr (s, ',');
2857 if (s == (char *) NULL)
2858 break;
2859 *s++ = '\0';
81d4177b 2860 }
252b5132
RH		 2861
2862 if (count != macro->operands)
2863 {
2864 as_bad (_("wrong number of operands"));
2865 return;
2866 }
2867
2868 /* Work out how large the string must be (the size is unbounded
2869 because it includes user input). */
2870 len = 0;
2871 format = macro->format;
2872 while (*format != '\0')
2873 {
2874 if (*format != '%')
2875 {
2876 ++len;
2877 ++format;
2878 }
2879 else
2880 {
2881 arg = strtol (format + 1, &send, 10);
db557034 2882 know (send != format && arg < count);
252b5132
RH		 2883 len += strlen (operands[arg]);
2884 format = send;
2885 }
2886 }
2887
2888 /* Put the string together. */
2889 complete = s = (char *) alloca (len + 1);
2890 format = macro->format;
2891 while (*format != '\0')
2892 {
2893 if (*format != '%')
2894 *s++ = *format++;
2895 else
2896 {
2897 arg = strtol (format + 1, &send, 10);
2898 strcpy (s, operands[arg]);
2899 s += strlen (s);
2900 format = send;
2901 }
2902 }
2903 *s = '\0';
2904
2905 /* Assemble the constructed instruction. */
2906 md_assemble (complete);
81d4177b 2907}
252b5132
RH		 2908\f
2909#ifdef OBJ_ELF
99a814a1 2910/* For ELF, add support for SHF_EXCLUDE and SHT_ORDERED. */
252b5132
RH		 2911
2912int
98027b10 2913ppc_section_letter (int letter, char **ptr_msg)
252b5132
RH		 2914{
2915 if (letter == 'e')
2916 return SHF_EXCLUDE;
2917
13ae64f3 2918 *ptr_msg = _("Bad .section directive: want a,e,w,x,M,S,G,T in string");
711ef82f 2919 return -1;
252b5132
RH		 2920}
2921
2922int
98027b10 2923ppc_section_word (char *str, size_t len)
252b5132 2924{
9de8d8f1
RH		 2925 if (len == 7 && strncmp (str, "exclude", 7) == 0)
2926 return SHF_EXCLUDE;
252b5132 2927
9de8d8f1 2928 return -1;
252b5132
RH		 2929}
2930
2931int
98027b10 2932ppc_section_type (char *str, size_t len)
252b5132 2933{
9de8d8f1
RH		 2934 if (len == 7 && strncmp (str, "ordered", 7) == 0)
2935 return SHT_ORDERED;
252b5132 2936
9de8d8f1 2937 return -1;
252b5132
RH		 2938}
2939
2940int
98027b10 2941ppc_section_flags (int flags, int attr, int type)
252b5132
RH		 2942{
2943 if (type == SHT_ORDERED)
2944 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
2945
2946 if (attr & SHF_EXCLUDE)
2947 flags |= SEC_EXCLUDE;
2948
2949 return flags;
2950}
2951#endif /* OBJ_ELF */
2952
2953\f
2954/* Pseudo-op handling. */
2955
2956/* The .byte pseudo-op. This is similar to the normal .byte
2957 pseudo-op, but it can also take a single ASCII string. */
2958
2959static void
98027b10 2960ppc_byte (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 2961{
2962 if (*input_line_pointer != '\"')
2963 {
2964 cons (1);
2965 return;
2966 }
2967
2968 /* Gather characters. A real double quote is doubled. Unusual
2969 characters are not permitted. */
2970 ++input_line_pointer;
2971 while (1)
2972 {
2973 char c;
2974
2975 c = *input_line_pointer++;
2976
2977 if (c == '\"')
2978 {
2979 if (*input_line_pointer != '\"')
2980 break;
2981 ++input_line_pointer;
2982 }
2983
2984 FRAG_APPEND_1_CHAR (c);
2985 }
2986
2987 demand_empty_rest_of_line ();
2988}
2989\f
2990#ifdef OBJ_XCOFF
2991
2992/* XCOFF specific pseudo-op handling. */
2993
2994/* This is set if we are creating a .stabx symbol, since we don't want
2995 to handle symbol suffixes for such symbols. */
b34976b6 2996static bfd_boolean ppc_stab_symbol;
252b5132
RH		 2997
2998/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
2999 symbols in the .bss segment as though they were local common
67c1ffbe 3000 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 3001 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 3002
3003static void
98027b10 3004ppc_comm (int lcomm)
252b5132
RH		 3005{
3006 asection *current_seg = now_seg;
3007 subsegT current_subseg = now_subseg;
3008 char *name;
3009 char endc;
3010 char *end_name;
3011 offsetT size;
3012 offsetT align;
3013 symbolS *lcomm_sym = NULL;
3014 symbolS *sym;
3015 char *pfrag;
3016
3017 name = input_line_pointer;
3018 endc = get_symbol_end ();
3019 end_name = input_line_pointer;
3020 *end_name = endc;
3021
3022 if (*input_line_pointer != ',')
3023 {
3024 as_bad (_("missing size"));
3025 ignore_rest_of_line ();
3026 return;
3027 }
3028 ++input_line_pointer;
3029
3030 size = get_absolute_expression ();
3031 if (size < 0)
3032 {
3033 as_bad (_("negative size"));
3034 ignore_rest_of_line ();
3035 return;
3036 }
3037
3038 if (! lcomm)
3039 {
3040 /* The third argument to .comm is the alignment. */
3041 if (*input_line_pointer != ',')
1ad63b2f 3042 align = 2;
252b5132
RH		 3043 else
3044 {
3045 ++input_line_pointer;
3046 align = get_absolute_expression ();
3047 if (align <= 0)
3048 {
3049 as_warn (_("ignoring bad alignment"));
1ad63b2f 3050 align = 2;
252b5132
RH		 3051 }
3052 }
3053 }
3054 else
3055 {
3056 char *lcomm_name;
3057 char lcomm_endc;
3058
1ad63b2f 3059 if (size <= 4)
252b5132
RH		 3060 align = 2;
3061 else
3062 align = 3;
3063
3064 /* The third argument to .lcomm appears to be the real local
3065 common symbol to create. References to the symbol named in
3066 the first argument are turned into references to the third
3067 argument. */
3068 if (*input_line_pointer != ',')
3069 {
3070 as_bad (_("missing real symbol name"));
3071 ignore_rest_of_line ();
3072 return;
3073 }
3074 ++input_line_pointer;
3075
3076 lcomm_name = input_line_pointer;
3077 lcomm_endc = get_symbol_end ();
81d4177b 3078
252b5132
RH		 3079 lcomm_sym = symbol_find_or_make (lcomm_name);
3080
3081 *input_line_pointer = lcomm_endc;
3082 }
3083
3084 *end_name = '\0';
3085 sym = symbol_find_or_make (name);
3086 *end_name = endc;
3087
3088 if (S_IS_DEFINED (sym)
3089 || S_GET_VALUE (sym) != 0)
3090 {
3091 as_bad (_("attempt to redefine symbol"));
3092 ignore_rest_of_line ();
3093 return;
3094 }
81d4177b 3095
252b5132 3096 record_alignment (bss_section, align);
81d4177b 3097
252b5132
RH		 3098 if (! lcomm
3099 || ! S_IS_DEFINED (lcomm_sym))
3100 {
3101 symbolS *def_sym;
3102 offsetT def_size;
3103
3104 if (! lcomm)
3105 {
3106 def_sym = sym;
3107 def_size = size;
3108 S_SET_EXTERNAL (sym);
3109 }
3110 else
3111 {
809ffe0d 3112 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 3113 def_sym = lcomm_sym;
3114 def_size = 0;
3115 }
3116
3117 subseg_set (bss_section, 1);
3118 frag_align (align, 0, 0);
81d4177b 3119
809ffe0d 3120 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3121 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3122 def_size, (char *) NULL);
3123 *pfrag = 0;
3124 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3125 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3126 }
3127 else if (lcomm)
3128 {
3129 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3130 symbol_get_frag (lcomm_sym)->fr_offset =
3131 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3132 &~ ((1 << align) - 1));
809ffe0d
ILT		 3133 if (align > symbol_get_tc (lcomm_sym)->align)
3134 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3135 }
3136
3137 if (lcomm)
3138 {
3139 /* Make sym an offset from lcomm_sym. */
3140 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3141 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3142 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3143 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3144 }
3145
3146 subseg_set (current_seg, current_subseg);
3147
3148 demand_empty_rest_of_line ();
3149}
3150
3151/* The .csect pseudo-op. This switches us into a different
3152 subsegment. The first argument is a symbol whose value is the
3153 start of the .csect. In COFF, csect symbols get special aux
3154 entries defined by the x_csect field of union internal_auxent. The
3155 optional second argument is the alignment (the default is 2). */
3156
3157static void
98027b10 3158ppc_csect (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3159{
3160 char *name;
3161 char endc;
3162 symbolS *sym;
931e13a6 3163 offsetT align;
252b5132
RH		 3164
3165 name = input_line_pointer;
3166 endc = get_symbol_end ();
81d4177b 3167
252b5132
RH		 3168 sym = symbol_find_or_make (name);
3169
3170 *input_line_pointer = endc;
3171
3172 if (S_GET_NAME (sym)[0] == '\0')
3173 {
3174 /* An unnamed csect is assumed to be [PR]. */
809ffe0d 3175 symbol_get_tc (sym)->class = XMC_PR;
252b5132
RH		 3176 }
3177
931e13a6 3178 align = 2;
252b5132
RH		 3179 if (*input_line_pointer == ',')
3180 {
3181 ++input_line_pointer;
931e13a6 3182 align = get_absolute_expression ();
252b5132
RH		 3183 }
3184
931e13a6
AM		 3185 ppc_change_csect (sym, align);
3186
252b5132
RH		 3187 demand_empty_rest_of_line ();
3188}
3189
3190/* Change to a different csect. */
3191
3192static void
98027b10 3193ppc_change_csect (symbolS *sym, offsetT align)
252b5132
RH		 3194{
3195 if (S_IS_DEFINED (sym))
809ffe0d 3196 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3197 else
3198 {
3199 symbolS **list_ptr;
3200 int after_toc;
3201 int hold_chunksize;
3202 symbolS *list;
931e13a6
AM		 3203 int is_code;
3204 segT sec;
252b5132
RH		 3205
3206 /* This is a new csect. We need to look at the symbol class to
3207 figure out whether it should go in the text section or the
3208 data section. */
3209 after_toc = 0;
931e13a6 3210 is_code = 0;
809ffe0d 3211 switch (symbol_get_tc (sym)->class)
252b5132
RH		 3212 {
3213 case XMC_PR:
3214 case XMC_RO:
3215 case XMC_DB:
3216 case XMC_GL:
3217 case XMC_XO:
3218 case XMC_SV:
3219 case XMC_TI:
3220 case XMC_TB:
3221 S_SET_SEGMENT (sym, text_section);
809ffe0d 3222 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3223 ++ppc_text_subsegment;
3224 list_ptr = &ppc_text_csects;
931e13a6 3225 is_code = 1;
252b5132
RH		 3226 break;
3227 case XMC_RW:
3228 case XMC_TC0:
3229 case XMC_TC:
3230 case XMC_DS:
3231 case XMC_UA:
3232 case XMC_BS:
3233 case XMC_UC:
3234 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3235 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3236 == ppc_data_subsegment))
252b5132
RH		 3237 after_toc = 1;
3238 S_SET_SEGMENT (sym, data_section);
809ffe0d 3239 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3240 ++ppc_data_subsegment;
3241 list_ptr = &ppc_data_csects;
3242 break;
3243 default:
3244 abort ();
3245 }
3246
3247 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3248 changing subsegments, so that we don't use a lot of memory
3249 space for what may be a small section. */
252b5132
RH		 3250 hold_chunksize = chunksize;
3251 chunksize = 64;
3252
931e13a6
AM		 3253 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3254 symbol_get_tc (sym)->subseg);
252b5132
RH		 3255
3256 chunksize = hold_chunksize;
3257
3258 if (after_toc)
3259 ppc_after_toc_frag = frag_now;
3260
931e13a6
AM		 3261 record_alignment (sec, align);
3262 if (is_code)
3263 frag_align_code (align, 0);
3264 else
3265 frag_align (align, 0, 0);
3266
809ffe0d 3267 symbol_set_frag (sym, frag_now);
252b5132
RH		 3268 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3269
931e13a6 3270 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3271 symbol_get_tc (sym)->output = 1;
3272 symbol_get_tc (sym)->within = sym;
81d4177b 3273
252b5132 3274 for (list = *list_ptr;
809ffe0d
ILT		 3275 symbol_get_tc (list)->next != (symbolS *) NULL;
3276 list = symbol_get_tc (list)->next)
252b5132 3277 ;
809ffe0d 3278 symbol_get_tc (list)->next = sym;
81d4177b 3279
252b5132 3280 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3281 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3282 &symbol_lastP);
252b5132
RH		 3283 }
3284
3285 ppc_current_csect = sym;
3286}
3287
3288/* This function handles the .text and .data pseudo-ops. These
3289 pseudo-ops aren't really used by XCOFF; we implement them for the
3290 convenience of people who aren't used to XCOFF. */
3291
3292static void
98027b10 3293ppc_section (int type)
252b5132
RH		 3294{
3295 const char *name;
3296 symbolS *sym;
3297
3298 if (type == 't')
3299 name = ".text[PR]";
3300 else if (type == 'd')
3301 name = ".data[RW]";
3302 else
3303 abort ();
3304
3305 sym = symbol_find_or_make (name);
3306
931e13a6 3307 ppc_change_csect (sym, 2);
252b5132
RH		 3308
3309 demand_empty_rest_of_line ();
3310}
3311
3312/* This function handles the .section pseudo-op. This is mostly to
3313 give an error, since XCOFF only supports .text, .data and .bss, but
3314 we do permit the user to name the text or data section. */
3315
3316static void
98027b10 3317ppc_named_section (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3318{
3319 char *user_name;
3320 const char *real_name;
3321 char c;
3322 symbolS *sym;
3323
3324 user_name = input_line_pointer;
3325 c = get_symbol_end ();
3326
3327 if (strcmp (user_name, ".text") == 0)
3328 real_name = ".text[PR]";
3329 else if (strcmp (user_name, ".data") == 0)
3330 real_name = ".data[RW]";
3331 else
3332 {
3333 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3334 *input_line_pointer = c;
3335 ignore_rest_of_line ();
3336 return;
3337 }
3338
3339 *input_line_pointer = c;
3340
3341 sym = symbol_find_or_make (real_name);
3342
931e13a6 3343 ppc_change_csect (sym, 2);
252b5132
RH		 3344
3345 demand_empty_rest_of_line ();
3346}
3347
3348/* The .extern pseudo-op. We create an undefined symbol. */
3349
3350static void
98027b10 3351ppc_extern (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3352{
3353 char *name;
3354 char endc;
3355
3356 name = input_line_pointer;
3357 endc = get_symbol_end ();
3358
3359 (void) symbol_find_or_make (name);
3360
3361 *input_line_pointer = endc;
3362
3363 demand_empty_rest_of_line ();
3364}
3365
3366/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3367
3368static void
98027b10 3369ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3370{
3371 char *name;
3372 char endc;
3373 symbolS *sym;
3374
3375 name = input_line_pointer;
3376 endc = get_symbol_end ();
3377
3378 sym = symbol_find_or_make (name);
3379
3380 *input_line_pointer = endc;
3381
809ffe0d 3382 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3383
3384 demand_empty_rest_of_line ();
3385}
3386
3387/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3388 although I don't know why it bothers. */
3389
3390static void
98027b10 3391ppc_rename (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3392{
3393 char *name;
3394 char endc;
3395 symbolS *sym;
3396 int len;
3397
3398 name = input_line_pointer;
3399 endc = get_symbol_end ();
3400
3401 sym = symbol_find_or_make (name);
3402
3403 *input_line_pointer = endc;
3404
3405 if (*input_line_pointer != ',')
3406 {
3407 as_bad (_("missing rename string"));
3408 ignore_rest_of_line ();
3409 return;
3410 }
3411 ++input_line_pointer;
3412
809ffe0d 3413 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 3414
3415 demand_empty_rest_of_line ();
3416}
3417
3418/* The .stabx pseudo-op. This is similar to a normal .stabs
3419 pseudo-op, but slightly different. A sample is
3420 .stabx "main:F-1",.main,142,0
3421 The first argument is the symbol name to create. The second is the
3422 value, and the third is the storage class. The fourth seems to be
3423 always zero, and I am assuming it is the type. */
3424
3425static void
98027b10 3426ppc_stabx (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3427{
3428 char *name;
3429 int len;
3430 symbolS *sym;
3431 expressionS exp;
3432
3433 name = demand_copy_C_string (&len);
3434
3435 if (*input_line_pointer != ',')
3436 {
3437 as_bad (_("missing value"));
3438 return;
3439 }
3440 ++input_line_pointer;
3441
b34976b6 3442 ppc_stab_symbol = TRUE;
252b5132 3443 sym = symbol_make (name);
b34976b6 3444 ppc_stab_symbol = FALSE;
252b5132 3445
809ffe0d 3446 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 3447
3448 (void) expression (&exp);
3449
3450 switch (exp.X_op)
3451 {
3452 case O_illegal:
3453 case O_absent:
3454 case O_big:
3455 as_bad (_("illegal .stabx expression; zero assumed"));
3456 exp.X_add_number = 0;
3457 /* Fall through. */
3458 case O_constant:
3459 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 3460 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 3461 break;
3462
3463 case O_symbol:
3464 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 3465 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3466 else
3467 {
3468 S_SET_VALUE (sym,
3469 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 3470 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 3471 }
3472 break;
3473
3474 default:
3475 /* The value is some complex expression. This will probably
99a814a1
AM		 3476 fail at some later point, but this is probably the right
3477 thing to do here. */
809ffe0d 3478 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3479 break;
3480 }
3481
3482 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3483 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3484
3485 if (*input_line_pointer != ',')
3486 {
3487 as_bad (_("missing class"));
3488 return;
3489 }
3490 ++input_line_pointer;
3491
3492 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3493
3494 if (*input_line_pointer != ',')
3495 {
3496 as_bad (_("missing type"));
3497 return;
3498 }
3499 ++input_line_pointer;
3500
3501 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3502
809ffe0d 3503 symbol_get_tc (sym)->output = 1;
252b5132 3504
6877bb43 3505 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
99a814a1 3506
809ffe0d 3507 symbol_get_tc (sym)->within = ppc_current_block;
252b5132 3508
41ea10b1 3509 /* In this case :
99a814a1 3510
41ea10b1
TR		 3511 .bs name
3512 .stabx "z",arrays_,133,0
3513 .es
99a814a1 3514
41ea10b1 3515 .comm arrays_,13768,3
99a814a1 3516
41ea10b1
TR		 3517 resolve_symbol_value will copy the exp's "within" into sym's when the
3518 offset is 0. Since this seems to be corner case problem,
3519 only do the correction for storage class C_STSYM. A better solution
0baf16f2 3520 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1
AM		 3521
3522 if (exp.X_op == O_symbol)
41ea10b1
TR		 3523 {
3524 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3525 }
6877bb43 3526 }
99a814a1 3527
252b5132
RH		 3528 if (exp.X_op != O_symbol
3529 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3530 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3531 ppc_frob_label (sym);
3532 else
3533 {
3534 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3535 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3536 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3537 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 3538 }
3539
3540 demand_empty_rest_of_line ();
3541}
3542
3543/* The .function pseudo-op. This takes several arguments. The first
3544 argument seems to be the external name of the symbol. The second
67c1ffbe 3545 argument seems to be the label for the start of the function. gcc
252b5132
RH		 3546 uses the same name for both. I have no idea what the third and
3547 fourth arguments are meant to be. The optional fifth argument is
3548 an expression for the size of the function. In COFF this symbol
3549 gets an aux entry like that used for a csect. */
3550
3551static void
98027b10 3552ppc_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3553{
3554 char *name;
3555 char endc;
3556 char *s;
3557 symbolS *ext_sym;
3558 symbolS *lab_sym;
3559
3560 name = input_line_pointer;
3561 endc = get_symbol_end ();
3562
3563 /* Ignore any [PR] suffix. */
3564 name = ppc_canonicalize_symbol_name (name);
3565 s = strchr (name, '[');
3566 if (s != (char *) NULL
3567 && strcmp (s + 1, "PR]") == 0)
3568 *s = '\0';
3569
3570 ext_sym = symbol_find_or_make (name);
3571
3572 *input_line_pointer = endc;
3573
3574 if (*input_line_pointer != ',')
3575 {
3576 as_bad (_("missing symbol name"));
3577 ignore_rest_of_line ();
3578 return;
3579 }
3580 ++input_line_pointer;
3581
3582 name = input_line_pointer;
3583 endc = get_symbol_end ();
3584
3585 lab_sym = symbol_find_or_make (name);
3586
3587 *input_line_pointer = endc;
3588
3589 if (ext_sym != lab_sym)
3590 {
809ffe0d
ILT		 3591 expressionS exp;
3592
3593 exp.X_op = O_symbol;
3594 exp.X_add_symbol = lab_sym;
3595 exp.X_op_symbol = NULL;
3596 exp.X_add_number = 0;
3597 exp.X_unsigned = 0;
3598 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 3599 }
3600
809ffe0d
ILT		 3601 if (symbol_get_tc (ext_sym)->class == -1)
3602 symbol_get_tc (ext_sym)->class = XMC_PR;
3603 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 3604
3605 if (*input_line_pointer == ',')
3606 {
3607 expressionS ignore;
3608
3609 /* Ignore the third argument. */
3610 ++input_line_pointer;
3611 expression (&ignore);
3612 if (*input_line_pointer == ',')
3613 {
3614 /* Ignore the fourth argument. */
3615 ++input_line_pointer;
3616 expression (&ignore);
3617 if (*input_line_pointer == ',')
3618 {
3619 /* The fifth argument is the function size. */
3620 ++input_line_pointer;
809ffe0d
ILT		 3621 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
3622 absolute_section,
3623 (valueT) 0,
3624 &zero_address_frag);
3625 pseudo_set (symbol_get_tc (ext_sym)->size);
252b5132
RH		 3626 }
3627 }
3628 }
3629
3630 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
3631 SF_SET_FUNCTION (ext_sym);
3632 SF_SET_PROCESS (ext_sym);
3633 coff_add_linesym (ext_sym);
3634
3635 demand_empty_rest_of_line ();
3636}
3637
3638/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 3639 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
3640 with the correct line number */
5d6255fe 3641
8642cce8 3642static symbolS *saved_bi_sym = 0;
252b5132
RH		 3643
3644static void
98027b10 3645ppc_bf (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3646{
3647 symbolS *sym;
3648
3649 sym = symbol_make (".bf");
3650 S_SET_SEGMENT (sym, text_section);
809ffe0d 3651 symbol_set_frag (sym, frag_now);
252b5132
RH		 3652 S_SET_VALUE (sym, frag_now_fix ());
3653 S_SET_STORAGE_CLASS (sym, C_FCN);
3654
3655 coff_line_base = get_absolute_expression ();
3656
3657 S_SET_NUMBER_AUXILIARY (sym, 1);
3658 SA_SET_SYM_LNNO (sym, coff_line_base);
3659
8642cce8 3660 /* Line number for bi. */
5d6255fe 3661 if (saved_bi_sym)
8642cce8
TR		 3662 {
3663 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
3664 saved_bi_sym = 0;
3665 }
5d6255fe 3666
8642cce8 3667
809ffe0d 3668 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3669
3670 ppc_frob_label (sym);
3671
3672 demand_empty_rest_of_line ();
3673}
3674
3675/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
3676 ".ef", except that the line number is absolute, not relative to the
3677 most recent ".bf" symbol. */
3678
3679static void
98027b10 3680ppc_ef (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3681{
3682 symbolS *sym;
3683
3684 sym = symbol_make (".ef");
3685 S_SET_SEGMENT (sym, text_section);
809ffe0d 3686 symbol_set_frag (sym, frag_now);
252b5132
RH		 3687 S_SET_VALUE (sym, frag_now_fix ());
3688 S_SET_STORAGE_CLASS (sym, C_FCN);
3689 S_SET_NUMBER_AUXILIARY (sym, 1);
3690 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3691 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3692
3693 ppc_frob_label (sym);
3694
3695 demand_empty_rest_of_line ();
3696}
3697
3698/* The .bi and .ei pseudo-ops. These take a string argument and
3699 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 3700 the symbol list. The value of .bi will be know when the next .bf
3701 is encountered. */
252b5132
RH		 3702
3703static void
98027b10 3704ppc_biei (int ei)
252b5132
RH		 3705{
3706 static symbolS *last_biei;
3707
3708 char *name;
3709 int len;
3710 symbolS *sym;
3711 symbolS *look;
3712
3713 name = demand_copy_C_string (&len);
3714
3715 /* The value of these symbols is actually file offset. Here we set
3716 the value to the index into the line number entries. In
3717 ppc_frob_symbols we set the fix_line field, which will cause BFD
3718 to do the right thing. */
3719
3720 sym = symbol_make (name);
3721 /* obj-coff.c currently only handles line numbers correctly in the
3722 .text section. */
3723 S_SET_SEGMENT (sym, text_section);
3724 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 3725 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3726
3727 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 3728 symbol_get_tc (sym)->output = 1;
81d4177b 3729
8642cce8 3730 /* Save bi. */
5d6255fe 3731 if (ei)
8642cce8
TR		 3732 saved_bi_sym = 0;
3733 else
3734 saved_bi_sym = sym;
3735
252b5132
RH		 3736 for (look = last_biei ? last_biei : symbol_rootP;
3737 (look != (symbolS *) NULL
3738 && (S_GET_STORAGE_CLASS (look) == C_FILE
3739 || S_GET_STORAGE_CLASS (look) == C_BINCL
3740 || S_GET_STORAGE_CLASS (look) == C_EINCL));
3741 look = symbol_next (look))
3742 ;
3743 if (look != (symbolS *) NULL)
3744 {
3745 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3746 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
3747 last_biei = sym;
3748 }
3749
3750 demand_empty_rest_of_line ();
3751}
3752
3753/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
3754 There is one argument, which is a csect symbol. The value of the
3755 .bs symbol is the index of this csect symbol. */
3756
3757static void
98027b10 3758ppc_bs (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3759{
3760 char *name;
3761 char endc;
3762 symbolS *csect;
3763 symbolS *sym;
3764
3765 if (ppc_current_block != NULL)
3766 as_bad (_("nested .bs blocks"));
3767
3768 name = input_line_pointer;
3769 endc = get_symbol_end ();
3770
3771 csect = symbol_find_or_make (name);
3772
3773 *input_line_pointer = endc;
3774
3775 sym = symbol_make (".bs");
3776 S_SET_SEGMENT (sym, now_seg);
3777 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 3778 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3779 symbol_get_tc (sym)->output = 1;
252b5132 3780
809ffe0d 3781 symbol_get_tc (sym)->within = csect;
252b5132
RH		 3782
3783 ppc_frob_label (sym);
3784
3785 ppc_current_block = sym;
3786
3787 demand_empty_rest_of_line ();
3788}
3789
3790/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
3791
3792static void
98027b10 3793ppc_es (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3794{
3795 symbolS *sym;
3796
3797 if (ppc_current_block == NULL)
3798 as_bad (_(".es without preceding .bs"));
3799
3800 sym = symbol_make (".es");
3801 S_SET_SEGMENT (sym, now_seg);
3802 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 3803 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3804 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3805
3806 ppc_frob_label (sym);
3807
3808 ppc_current_block = NULL;
3809
3810 demand_empty_rest_of_line ();
3811}
3812
3813/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
3814 line number. */
3815
3816static void
98027b10 3817ppc_bb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3818{
3819 symbolS *sym;
3820
3821 sym = symbol_make (".bb");
3822 S_SET_SEGMENT (sym, text_section);
809ffe0d 3823 symbol_set_frag (sym, frag_now);
252b5132
RH		 3824 S_SET_VALUE (sym, frag_now_fix ());
3825 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3826
3827 S_SET_NUMBER_AUXILIARY (sym, 1);
3828 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
3829
809ffe0d 3830 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3831
3832 SF_SET_PROCESS (sym);
3833
3834 ppc_frob_label (sym);
3835
3836 demand_empty_rest_of_line ();
3837}
3838
3839/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
3840 line number. */
3841
3842static void
98027b10 3843ppc_eb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3844{
3845 symbolS *sym;
3846
3847 sym = symbol_make (".eb");
3848 S_SET_SEGMENT (sym, text_section);
809ffe0d 3849 symbol_set_frag (sym, frag_now);
252b5132
RH		 3850 S_SET_VALUE (sym, frag_now_fix ());
3851 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3852 S_SET_NUMBER_AUXILIARY (sym, 1);
3853 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3854 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3855
3856 SF_SET_PROCESS (sym);
3857
3858 ppc_frob_label (sym);
3859
3860 demand_empty_rest_of_line ();
3861}
3862
3863/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
3864 specified name. */
3865
3866static void
98027b10 3867ppc_bc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3868{
3869 char *name;
3870 int len;
3871 symbolS *sym;
3872
3873 name = demand_copy_C_string (&len);
3874 sym = symbol_make (name);
3875 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3876 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3877 S_SET_STORAGE_CLASS (sym, C_BCOMM);
3878 S_SET_VALUE (sym, 0);
809ffe0d 3879 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3880
3881 ppc_frob_label (sym);
3882
3883 demand_empty_rest_of_line ();
3884}
3885
3886/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
3887
3888static void
98027b10 3889ppc_ec (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3890{
3891 symbolS *sym;
3892
3893 sym = symbol_make (".ec");
3894 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3895 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3896 S_SET_STORAGE_CLASS (sym, C_ECOMM);
3897 S_SET_VALUE (sym, 0);
809ffe0d 3898 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3899
3900 ppc_frob_label (sym);
3901
3902 demand_empty_rest_of_line ();
3903}
3904
3905/* The .toc pseudo-op. Switch to the .toc subsegment. */
3906
3907static void
98027b10 3908ppc_toc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3909{
3910 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 3911 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 3912 else
3913 {
3914 subsegT subseg;
3915 symbolS *sym;
3916 symbolS *list;
81d4177b 3917
252b5132
RH		 3918 subseg = ppc_data_subsegment;
3919 ++ppc_data_subsegment;
3920
3921 subseg_new (segment_name (data_section), subseg);
3922 ppc_toc_frag = frag_now;
3923
3924 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 3925 symbol_set_frag (sym, frag_now);
252b5132
RH		 3926 S_SET_SEGMENT (sym, data_section);
3927 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 3928 symbol_get_tc (sym)->subseg = subseg;
3929 symbol_get_tc (sym)->output = 1;
3930 symbol_get_tc (sym)->within = sym;
252b5132
RH		 3931
3932 ppc_toc_csect = sym;
81d4177b 3933
252b5132 3934 for (list = ppc_data_csects;
809ffe0d
ILT		 3935 symbol_get_tc (list)->next != (symbolS *) NULL;
3936 list = symbol_get_tc (list)->next)
252b5132 3937 ;
809ffe0d 3938 symbol_get_tc (list)->next = sym;
252b5132
RH		 3939
3940 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3941 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3942 &symbol_lastP);
252b5132
RH		 3943 }
3944
3945 ppc_current_csect = ppc_toc_csect;
3946
3947 demand_empty_rest_of_line ();
3948}
3949
3950/* The AIX assembler automatically aligns the operands of a .long or
3951 .short pseudo-op, and we want to be compatible. */
3952
3953static void
98027b10 3954ppc_xcoff_cons (int log_size)
252b5132
RH		 3955{
3956 frag_align (log_size, 0, 0);
3957 record_alignment (now_seg, log_size);
3958 cons (1 << log_size);
3959}
3960
3961static void
98027b10 3962ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
252b5132
RH		 3963{
3964 expressionS exp;
3965 int byte_count;
3966
3967 (void) expression (&exp);
3968
3969 if (exp.X_op != O_constant)
3970 {
3971 as_bad (_("non-constant byte count"));
3972 return;
3973 }
3974
3975 byte_count = exp.X_add_number;
3976
3977 if (*input_line_pointer != ',')
3978 {
3979 as_bad (_("missing value"));
3980 return;
3981 }
3982
3983 ++input_line_pointer;
3984 cons (byte_count);
3985}
3986
3987#endif /* OBJ_XCOFF */
0baf16f2 3988#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 3989\f
3990/* The .tc pseudo-op. This is used when generating either XCOFF or
3991 ELF. This takes two or more arguments.
3992
3993 When generating XCOFF output, the first argument is the name to
3994 give to this location in the toc; this will be a symbol with class
0baf16f2 3995 TC. The rest of the arguments are N-byte values to actually put at
252b5132 3996 this location in the TOC; often there is just one more argument, a
1049f94e 3997 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 3998 depends on target word size. A 32-bit target uses 4-byte values, a
3999 64-bit target uses 8-byte values.
252b5132
RH		 4000
4001 When not generating XCOFF output, the arguments are the same, but
4002 the first argument is simply ignored. */
4003
4004static void
98027b10 4005ppc_tc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4006{
4007#ifdef OBJ_XCOFF
4008
4009 /* Define the TOC symbol name. */
4010 {
4011 char *name;
4012 char endc;
4013 symbolS *sym;
4014
4015 if (ppc_toc_csect == (symbolS *) NULL
4016 || ppc_toc_csect != ppc_current_csect)
4017 {
4018 as_bad (_(".tc not in .toc section"));
4019 ignore_rest_of_line ();
4020 return;
4021 }
4022
4023 name = input_line_pointer;
4024 endc = get_symbol_end ();
4025
4026 sym = symbol_find_or_make (name);
4027
4028 *input_line_pointer = endc;
4029
4030 if (S_IS_DEFINED (sym))
4031 {
4032 symbolS *label;
4033
809ffe0d
ILT		 4034 label = symbol_get_tc (ppc_current_csect)->within;
4035 if (symbol_get_tc (label)->class != XMC_TC0)
252b5132
RH		 4036 {
4037 as_bad (_(".tc with no label"));
4038 ignore_rest_of_line ();
4039 return;
4040 }
4041
4042 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 4043 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 4044 S_SET_VALUE (label, S_GET_VALUE (sym));
4045
4046 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4047 ++input_line_pointer;
4048
4049 return;
4050 }
4051
4052 S_SET_SEGMENT (sym, now_seg);
809ffe0d 4053 symbol_set_frag (sym, frag_now);
252b5132 4054 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 4055 symbol_get_tc (sym)->class = XMC_TC;
4056 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4057
4058 ppc_frob_label (sym);
4059 }
4060
0baf16f2
AM		 4061#endif /* OBJ_XCOFF */
4062#ifdef OBJ_ELF
9c7977b3 4063 int align;
252b5132
RH		 4064
4065 /* Skip the TOC symbol name. */
4066 while (is_part_of_name (*input_line_pointer)
d13d4015 4067 || *input_line_pointer == ' '
252b5132
RH		 4068 || *input_line_pointer == '['
4069 || *input_line_pointer == ']'
4070 || *input_line_pointer == '{'
4071 || *input_line_pointer == '}')
4072 ++input_line_pointer;
4073
0baf16f2 4074 /* Align to a four/eight byte boundary. */
2b3c4602 4075 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 4076 frag_align (align, 0, 0);
4077 record_alignment (now_seg, align);
0baf16f2 4078#endif /* OBJ_ELF */
252b5132
RH		 4079
4080 if (*input_line_pointer != ',')
4081 demand_empty_rest_of_line ();
4082 else
4083 {
4084 ++input_line_pointer;
2b3c4602 4085 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 4086 }
4087}
0baf16f2
AM		 4088
4089/* Pseudo-op .machine. */
0baf16f2
AM		 4090
4091static void
98027b10 4092ppc_machine (int ignore ATTRIBUTE_UNUSED)
0baf16f2 4093{
69c040df
AM		 4094 char *cpu_string;
4095#define MAX_HISTORY 100
4096 static unsigned long *cpu_history;
4097 static int curr_hist;
4098
4099 SKIP_WHITESPACE ();
4100
4101 if (*input_line_pointer == '"')
4102 {
4103 int len;
4104 cpu_string = demand_copy_C_string (&len);
4105 }
4106 else
4107 {
4108 char c;
4109 cpu_string = input_line_pointer;
4110 c = get_symbol_end ();
4111 cpu_string = xstrdup (cpu_string);
4112 *input_line_pointer = c;
4113 }
4114
4115 if (cpu_string != NULL)
4116 {
4117 unsigned long old_cpu = ppc_cpu;
4118 char *p;
4119
4120 for (p = cpu_string; *p != 0; p++)
4121 *p = TOLOWER (*p);
4122
4123 if (strcmp (cpu_string, "push") == 0)
4124 {
4125 if (cpu_history == NULL)
4126 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4127
4128 if (curr_hist >= MAX_HISTORY)
4129 as_bad (_(".machine stack overflow"));
4130 else
4131 cpu_history[curr_hist++] = ppc_cpu;
4132 }
4133 else if (strcmp (cpu_string, "pop") == 0)
4134 {
4135 if (curr_hist <= 0)
4136 as_bad (_(".machine stack underflow"));
4137 else
4138 ppc_cpu = cpu_history[--curr_hist];
4139 }
4140 else if (parse_cpu (cpu_string))
4141 ;
4142 else
4143 as_bad (_("invalid machine `%s'"), cpu_string);
4144
4145 if (ppc_cpu != old_cpu)
4146 ppc_setup_opcodes ();
4147 }
4148
4149 demand_empty_rest_of_line ();
0baf16f2
AM		 4150}
4151
4152/* See whether a symbol is in the TOC section. */
4153
4154static int
98027b10 4155ppc_is_toc_sym (symbolS *sym)
0baf16f2
AM		 4156{
4157#ifdef OBJ_XCOFF
4158 return symbol_get_tc (sym)->class == XMC_TC;
4159#endif
4160#ifdef OBJ_ELF
4161 const char *sname = segment_name (S_GET_SEGMENT (sym));
2b3c4602 4162 if (ppc_obj64)
0baf16f2
AM		 4163 return strcmp (sname, ".toc") == 0;
4164 else
4165 return strcmp (sname, ".got") == 0;
4166#endif
4167}
4168#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 4169\f
4170#ifdef TE_PE
4171
99a814a1 4172/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 4173
4174/* Set the current section. */
4175static void
98027b10 4176ppc_set_current_section (segT new)
252b5132
RH		 4177{
4178 ppc_previous_section = ppc_current_section;
4179 ppc_current_section = new;
4180}
4181
4182/* pseudo-op: .previous
4183 behaviour: toggles the current section with the previous section.
4184 errors: None
99a814a1
AM		 4185 warnings: "No previous section" */
4186
252b5132 4187static void
98027b10 4188ppc_previous (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4189{
4190 symbolS *tmp;
4191
81d4177b 4192 if (ppc_previous_section == NULL)
252b5132 4193 {
99a814a1 4194 as_warn (_("No previous section to return to. Directive ignored."));
252b5132
RH		 4195 return;
4196 }
4197
99a814a1 4198 subseg_set (ppc_previous_section, 0);
252b5132 4199
99a814a1 4200 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 4201}
4202
4203/* pseudo-op: .pdata
4204 behaviour: predefined read only data section
b34976b6 4205 double word aligned
252b5132
RH		 4206 errors: None
4207 warnings: None
4208 initial: .section .pdata "adr3"
b34976b6 4209 a - don't know -- maybe a misprint
252b5132
RH		 4210 d - initialized data
4211 r - readable
4212 3 - double word aligned (that would be 4 byte boundary)
4213
4214 commentary:
4215 Tag index tables (also known as the function table) for exception
99a814a1 4216 handling, debugging, etc. */
252b5132 4217
252b5132 4218static void
98027b10 4219ppc_pdata (int ignore ATTRIBUTE_UNUSED)
252b5132 4220{
81d4177b 4221 if (pdata_section == 0)
252b5132
RH		 4222 {
4223 pdata_section = subseg_new (".pdata", 0);
81d4177b 4224
252b5132
RH		 4225 bfd_set_section_flags (stdoutput, pdata_section,
4226 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4227 | SEC_READONLY | SEC_DATA ));
81d4177b 4228
252b5132
RH		 4229 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4230 }
4231 else
4232 {
99a814a1 4233 pdata_section = subseg_new (".pdata", 0);
252b5132 4234 }
99a814a1 4235 ppc_set_current_section (pdata_section);
252b5132
RH		 4236}
4237
4238/* pseudo-op: .ydata
4239 behaviour: predefined read only data section
b34976b6 4240 double word aligned
252b5132
RH		 4241 errors: None
4242 warnings: None
4243 initial: .section .ydata "drw3"
b34976b6 4244 a - don't know -- maybe a misprint
252b5132
RH		 4245 d - initialized data
4246 r - readable
4247 3 - double word aligned (that would be 4 byte boundary)
4248 commentary:
4249 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 4250 debugging, etc. */
4251
252b5132 4252static void
98027b10 4253ppc_ydata (int ignore ATTRIBUTE_UNUSED)
252b5132 4254{
81d4177b 4255 if (ydata_section == 0)
252b5132
RH		 4256 {
4257 ydata_section = subseg_new (".ydata", 0);
4258 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 4259 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4260 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 4261
4262 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4263 }
4264 else
4265 {
4266 ydata_section = subseg_new (".ydata", 0);
4267 }
99a814a1 4268 ppc_set_current_section (ydata_section);
252b5132
RH		 4269}
4270
4271/* pseudo-op: .reldata
4272 behaviour: predefined read write data section
b34976b6 4273 double word aligned (4-byte)
252b5132
RH		 4274 FIXME: relocation is applied to it
4275 FIXME: what's the difference between this and .data?
4276 errors: None
4277 warnings: None
4278 initial: .section .reldata "drw3"
4279 d - initialized data
4280 r - readable
4281 w - writeable
4282 3 - double word aligned (that would be 8 byte boundary)
4283
4284 commentary:
4285 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 4286 function descriptors, etc. */
4287
252b5132 4288static void
98027b10 4289ppc_reldata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4290{
4291 if (reldata_section == 0)
4292 {
4293 reldata_section = subseg_new (".reldata", 0);
4294
4295 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 4296 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4297 | SEC_DATA));
252b5132
RH		 4298
4299 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4300 }
4301 else
4302 {
4303 reldata_section = subseg_new (".reldata", 0);
4304 }
99a814a1 4305 ppc_set_current_section (reldata_section);
252b5132
RH		 4306}
4307
4308/* pseudo-op: .rdata
4309 behaviour: predefined read only data section
b34976b6 4310 double word aligned
252b5132
RH		 4311 errors: None
4312 warnings: None
4313 initial: .section .rdata "dr3"
4314 d - initialized data
4315 r - readable
99a814a1
AM		 4316 3 - double word aligned (that would be 4 byte boundary) */
4317
252b5132 4318static void
98027b10 4319ppc_rdata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4320{
4321 if (rdata_section == 0)
4322 {
4323 rdata_section = subseg_new (".rdata", 0);
4324 bfd_set_section_flags (stdoutput, rdata_section,
4325 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4326 | SEC_READONLY | SEC_DATA ));
4327
4328 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4329 }
4330 else
4331 {
4332 rdata_section = subseg_new (".rdata", 0);
4333 }
99a814a1 4334 ppc_set_current_section (rdata_section);
252b5132
RH		 4335}
4336
4337/* pseudo-op: .ualong
81d4177b 4338 behaviour: much like .int, with the exception that no alignment is
b34976b6 4339 performed.
252b5132
RH		 4340 FIXME: test the alignment statement
4341 errors: None
99a814a1
AM		 4342 warnings: None */
4343
252b5132 4344static void
98027b10 4345ppc_ualong (int ignore ATTRIBUTE_UNUSED)
252b5132 4346{
99a814a1
AM		 4347 /* Try for long. */
4348 cons (4);
252b5132
RH		 4349}
4350
4351/* pseudo-op: .znop <symbol name>
4352 behaviour: Issue a nop instruction
b34976b6 4353 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 4354 the supplied symbol name.
4355 errors: None
99a814a1
AM		 4356 warnings: Missing symbol name */
4357
252b5132 4358static void
98027b10 4359ppc_znop (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4360{
4361 unsigned long insn;
4362 const struct powerpc_opcode *opcode;
4363 expressionS ex;
4364 char *f;
252b5132 4365 symbolS *sym;
252b5132
RH		 4366 char *symbol_name;
4367 char c;
4368 char *name;
4369 unsigned int exp;
4370 flagword flags;
4371 asection *sec;
4372
99a814a1 4373 /* Strip out the symbol name. */
252b5132
RH		 4374 symbol_name = input_line_pointer;
4375 c = get_symbol_end ();
4376
4377 name = xmalloc (input_line_pointer - symbol_name + 1);
4378 strcpy (name, symbol_name);
4379
4380 sym = symbol_find_or_make (name);
4381
4382 *input_line_pointer = c;
4383
4384 SKIP_WHITESPACE ();
4385
4386 /* Look up the opcode in the hash table. */
4387 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4388
99a814a1 4389 /* Stick in the nop. */
252b5132
RH		 4390 insn = opcode->opcode;
4391
4392 /* Write out the instruction. */
4393 f = frag_more (4);
4394 md_number_to_chars (f, insn, 4);
4395 fix_new (frag_now,
4396 f - frag_now->fr_literal,
4397 4,
4398 sym,
4399 0,
4400 0,
4401 BFD_RELOC_16_GOT_PCREL);
4402
4403}
4404
81d4177b
KH		 4405/* pseudo-op:
4406 behaviour:
4407 errors:
99a814a1
AM		 4408 warnings: */
4409
252b5132 4410static void
98027b10 4411ppc_pe_comm (int lcomm)
252b5132 4412{
98027b10
AM		 4413 char *name;
4414 char c;
4415 char *p;
252b5132 4416 offsetT temp;
98027b10 4417 symbolS *symbolP;
252b5132
RH		 4418 offsetT align;
4419
4420 name = input_line_pointer;
4421 c = get_symbol_end ();
4422
99a814a1 4423 /* just after name is now '\0'. */
252b5132
RH		 4424 p = input_line_pointer;
4425 *p = c;
4426 SKIP_WHITESPACE ();
4427 if (*input_line_pointer != ',')
4428 {
4429 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4430 ignore_rest_of_line ();
4431 return;
4432 }
4433
4434 input_line_pointer++; /* skip ',' */
4435 if ((temp = get_absolute_expression ()) < 0)
4436 {
4437 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4438 ignore_rest_of_line ();
4439 return;
4440 }
4441
4442 if (! lcomm)
4443 {
4444 /* The third argument to .comm is the alignment. */
4445 if (*input_line_pointer != ',')
4446 align = 3;
4447 else
4448 {
4449 ++input_line_pointer;
4450 align = get_absolute_expression ();
4451 if (align <= 0)
4452 {
4453 as_warn (_("ignoring bad alignment"));
4454 align = 3;
4455 }
4456 }
4457 }
4458
4459 *p = 0;
4460 symbolP = symbol_find_or_make (name);
4461
4462 *p = c;
4463 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4464 {
4465 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4466 S_GET_NAME (symbolP));
4467 ignore_rest_of_line ();
4468 return;
4469 }
4470
4471 if (S_GET_VALUE (symbolP))
4472 {
4473 if (S_GET_VALUE (symbolP) != (valueT) temp)
4474 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4475 S_GET_NAME (symbolP),
4476 (long) S_GET_VALUE (symbolP),
4477 (long) temp);
4478 }
4479 else
4480 {
4481 S_SET_VALUE (symbolP, (valueT) temp);
4482 S_SET_EXTERNAL (symbolP);
86ebace2 4483 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
252b5132
RH		 4484 }
4485
4486 demand_empty_rest_of_line ();
4487}
4488
4489/*
4490 * implement the .section pseudo op:
4491 * .section name {, "flags"}
4492 * ^ ^
4493 * | +--- optional flags: 'b' for bss
4494 * | 'i' for info
4495 * +-- section name 'l' for lib
4496 * 'n' for noload
4497 * 'o' for over
4498 * 'w' for data
4499 * 'd' (apparently m88k for data)
4500 * 'x' for text
4501 * But if the argument is not a quoted string, treat it as a
4502 * subsegment number.
4503 *
4504 * FIXME: this is a copy of the section processing from obj-coff.c, with
4505 * additions/changes for the moto-pas assembler support. There are three
4506 * categories:
4507 *
81d4177b 4508 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 4509 * setting bits that bfd probably neither understands or uses. The
4510 * correct approach (?) will have to incorporate extra fields attached
4511 * to the section to hold the system specific stuff. (krk)
4512 *
4513 * Section Contents:
4514 * 'a' - unknown - referred to in documentation, but no definition supplied
4515 * 'c' - section has code
4516 * 'd' - section has initialized data
4517 * 'u' - section has uninitialized data
4518 * 'i' - section contains directives (info)
4519 * 'n' - section can be discarded
4520 * 'R' - remove section at link time
4521 *
4522 * Section Protection:
4523 * 'r' - section is readable
4524 * 'w' - section is writeable
4525 * 'x' - section is executable
4526 * 's' - section is sharable
4527 *
4528 * Section Alignment:
4529 * '0' - align to byte boundary
4530 * '1' - align to halfword undary
4531 * '2' - align to word boundary
4532 * '3' - align to doubleword boundary
4533 * '4' - align to quadword boundary
4534 * '5' - align to 32 byte boundary
4535 * '6' - align to 64 byte boundary
4536 *
4537 */
4538
4539void
98027b10 4540ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
252b5132 4541{
99a814a1 4542 /* Strip out the section name. */
252b5132
RH		 4543 char *section_name;
4544 char c;
4545 char *name;
4546 unsigned int exp;
4547 flagword flags;
4548 segT sec;
4549 int align;
4550
4551 section_name = input_line_pointer;
4552 c = get_symbol_end ();
4553
4554 name = xmalloc (input_line_pointer - section_name + 1);
4555 strcpy (name, section_name);
4556
4557 *input_line_pointer = c;
4558
4559 SKIP_WHITESPACE ();
4560
4561 exp = 0;
4562 flags = SEC_NO_FLAGS;
4563
4564 if (strcmp (name, ".idata$2") == 0)
4565 {
4566 align = 0;
4567 }
4568 else if (strcmp (name, ".idata$3") == 0)
4569 {
4570 align = 0;
4571 }
4572 else if (strcmp (name, ".idata$4") == 0)
4573 {
4574 align = 2;
4575 }
4576 else if (strcmp (name, ".idata$5") == 0)
4577 {
4578 align = 2;
4579 }
4580 else if (strcmp (name, ".idata$6") == 0)
4581 {
4582 align = 1;
4583 }
4584 else
99a814a1
AM		 4585 /* Default alignment to 16 byte boundary. */
4586 align = 4;
252b5132
RH		 4587
4588 if (*input_line_pointer == ',')
4589 {
4590 ++input_line_pointer;
4591 SKIP_WHITESPACE ();
4592 if (*input_line_pointer != '"')
4593 exp = get_absolute_expression ();
4594 else
4595 {
4596 ++input_line_pointer;
4597 while (*input_line_pointer != '"'
4598 && ! is_end_of_line[(unsigned char) *input_line_pointer])
4599 {
4600 switch (*input_line_pointer)
4601 {
4602 /* Section Contents */
4603 case 'a': /* unknown */
4604 as_bad (_("Unsupported section attribute -- 'a'"));
4605 break;
4606 case 'c': /* code section */
81d4177b 4607 flags |= SEC_CODE;
252b5132
RH		 4608 break;
4609 case 'd': /* section has initialized data */
4610 flags |= SEC_DATA;
4611 break;
4612 case 'u': /* section has uninitialized data */
4613 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
4614 in winnt.h */
4615 flags |= SEC_ROM;
4616 break;
4617 case 'i': /* section contains directives (info) */
4618 /* FIXME: This is IMAGE_SCN_LNK_INFO
4619 in winnt.h */
4620 flags |= SEC_HAS_CONTENTS;
4621 break;
4622 case 'n': /* section can be discarded */
81d4177b 4623 flags &=~ SEC_LOAD;
252b5132
RH		 4624 break;
4625 case 'R': /* Remove section at link time */
4626 flags |= SEC_NEVER_LOAD;
4627 break;
8d452c78 4628#if IFLICT_BRAIN_DAMAGE
252b5132
RH		 4629 /* Section Protection */
4630 case 'r': /* section is readable */
4631 flags |= IMAGE_SCN_MEM_READ;
4632 break;
4633 case 'w': /* section is writeable */
4634 flags |= IMAGE_SCN_MEM_WRITE;
4635 break;
4636 case 'x': /* section is executable */
4637 flags |= IMAGE_SCN_MEM_EXECUTE;
4638 break;
4639 case 's': /* section is sharable */
4640 flags |= IMAGE_SCN_MEM_SHARED;
4641 break;
4642
4643 /* Section Alignment */
4644 case '0': /* align to byte boundary */
4645 flags |= IMAGE_SCN_ALIGN_1BYTES;
4646 align = 0;
4647 break;
4648 case '1': /* align to halfword boundary */
4649 flags |= IMAGE_SCN_ALIGN_2BYTES;
4650 align = 1;
4651 break;
4652 case '2': /* align to word boundary */
4653 flags |= IMAGE_SCN_ALIGN_4BYTES;
4654 align = 2;
4655 break;
4656 case '3': /* align to doubleword boundary */
4657 flags |= IMAGE_SCN_ALIGN_8BYTES;
4658 align = 3;
4659 break;
4660 case '4': /* align to quadword boundary */
4661 flags |= IMAGE_SCN_ALIGN_16BYTES;
4662 align = 4;
4663 break;
4664 case '5': /* align to 32 byte boundary */
4665 flags |= IMAGE_SCN_ALIGN_32BYTES;
4666 align = 5;
4667 break;
4668 case '6': /* align to 64 byte boundary */
4669 flags |= IMAGE_SCN_ALIGN_64BYTES;
4670 align = 6;
4671 break;
8d452c78 4672#endif
252b5132 4673 default:
99a814a1
AM		 4674 as_bad (_("unknown section attribute '%c'"),
4675 *input_line_pointer);
252b5132
RH		 4676 break;
4677 }
4678 ++input_line_pointer;
4679 }
4680 if (*input_line_pointer == '"')
4681 ++input_line_pointer;
4682 }
4683 }
4684
4685 sec = subseg_new (name, (subsegT) exp);
4686
99a814a1 4687 ppc_set_current_section (sec);
252b5132
RH		 4688
4689 if (flags != SEC_NO_FLAGS)
4690 {
4691 if (! bfd_set_section_flags (stdoutput, sec, flags))
4692 as_bad (_("error setting flags for \"%s\": %s"),
4693 bfd_section_name (stdoutput, sec),
4694 bfd_errmsg (bfd_get_error ()));
4695 }
4696
99a814a1 4697 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 4698}
4699
4700static void
98027b10 4701ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4702{
4703 char *name;
4704 char endc;
4705 symbolS *ext_sym;
4706
4707 name = input_line_pointer;
4708 endc = get_symbol_end ();
4709
4710 ext_sym = symbol_find_or_make (name);
4711
4712 *input_line_pointer = endc;
4713
4714 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4715 SF_SET_FUNCTION (ext_sym);
4716 SF_SET_PROCESS (ext_sym);
4717 coff_add_linesym (ext_sym);
4718
4719 demand_empty_rest_of_line ();
4720}
4721
4722static void
98027b10 4723ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4724{
4725 if (tocdata_section == 0)
4726 {
4727 tocdata_section = subseg_new (".tocd", 0);
99a814a1 4728 /* FIXME: section flags won't work. */
252b5132
RH		 4729 bfd_set_section_flags (stdoutput, tocdata_section,
4730 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 4731 | SEC_READONLY | SEC_DATA));
252b5132
RH		 4732
4733 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
4734 }
4735 else
4736 {
4737 rdata_section = subseg_new (".tocd", 0);
4738 }
4739
99a814a1 4740 ppc_set_current_section (tocdata_section);
252b5132
RH		 4741
4742 demand_empty_rest_of_line ();
4743}
4744
4745/* Don't adjust TOC relocs to use the section symbol. */
4746
4747int
98027b10 4748ppc_pe_fix_adjustable (fixS *fix)
252b5132
RH		 4749{
4750 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
4751}
4752
4753#endif
4754\f
4755#ifdef OBJ_XCOFF
4756
4757/* XCOFF specific symbol and file handling. */
4758
4759/* Canonicalize the symbol name. We use the to force the suffix, if
4760 any, to use square brackets, and to be in upper case. */
4761
4762char *
98027b10 4763ppc_canonicalize_symbol_name (char *name)
252b5132
RH		 4764{
4765 char *s;
4766
4767 if (ppc_stab_symbol)
4768 return name;
4769
4770 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
4771 ;
4772 if (*s != '\0')
4773 {
4774 char brac;
4775
4776 if (*s == '[')
4777 brac = ']';
4778 else
4779 {
4780 *s = '[';
4781 brac = '}';
4782 }
4783
4784 for (s++; *s != '\0' && *s != brac; s++)
3882b010 4785 *s = TOUPPER (*s);
252b5132
RH		 4786
4787 if (*s == '\0' || s[1] != '\0')
4788 as_bad (_("bad symbol suffix"));
4789
4790 *s = ']';
4791 }
4792
4793 return name;
4794}
4795
4796/* Set the class of a symbol based on the suffix, if any. This is
4797 called whenever a new symbol is created. */
4798
4799void
98027b10 4800ppc_symbol_new_hook (symbolS *sym)
252b5132 4801{
809ffe0d 4802 struct ppc_tc_sy *tc;
252b5132
RH		 4803 const char *s;
4804
809ffe0d
ILT		 4805 tc = symbol_get_tc (sym);
4806 tc->next = NULL;
4807 tc->output = 0;
4808 tc->class = -1;
4809 tc->real_name = NULL;
4810 tc->subseg = 0;
4811 tc->align = 0;
4812 tc->size = NULL;
4813 tc->within = NULL;
252b5132
RH		 4814
4815 if (ppc_stab_symbol)
4816 return;
4817
4818 s = strchr (S_GET_NAME (sym), '[');
4819 if (s == (const char *) NULL)
4820 {
4821 /* There is no suffix. */
4822 return;
4823 }
4824
4825 ++s;
4826
4827 switch (s[0])
4828 {
4829 case 'B':
4830 if (strcmp (s, "BS]") == 0)
809ffe0d 4831 tc->class = XMC_BS;
252b5132
RH		 4832 break;
4833 case 'D':
4834 if (strcmp (s, "DB]") == 0)
809ffe0d 4835 tc->class = XMC_DB;
252b5132 4836 else if (strcmp (s, "DS]") == 0)
809ffe0d 4837 tc->class = XMC_DS;
252b5132
RH		 4838 break;
4839 case 'G':
4840 if (strcmp (s, "GL]") == 0)
809ffe0d 4841 tc->class = XMC_GL;
252b5132
RH		 4842 break;
4843 case 'P':
4844 if (strcmp (s, "PR]") == 0)
809ffe0d 4845 tc->class = XMC_PR;
252b5132
RH		 4846 break;
4847 case 'R':
4848 if (strcmp (s, "RO]") == 0)
809ffe0d 4849 tc->class = XMC_RO;
252b5132 4850 else if (strcmp (s, "RW]") == 0)
809ffe0d 4851 tc->class = XMC_RW;
252b5132
RH		 4852 break;
4853 case 'S':
4854 if (strcmp (s, "SV]") == 0)
809ffe0d 4855 tc->class = XMC_SV;
252b5132
RH		 4856 break;
4857 case 'T':
4858 if (strcmp (s, "TC]") == 0)
809ffe0d 4859 tc->class = XMC_TC;
252b5132 4860 else if (strcmp (s, "TI]") == 0)
809ffe0d 4861 tc->class = XMC_TI;
252b5132 4862 else if (strcmp (s, "TB]") == 0)
809ffe0d 4863 tc->class = XMC_TB;
252b5132 4864 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
809ffe0d 4865 tc->class = XMC_TC0;
252b5132
RH		 4866 break;
4867 case 'U':
4868 if (strcmp (s, "UA]") == 0)
809ffe0d 4869 tc->class = XMC_UA;
252b5132 4870 else if (strcmp (s, "UC]") == 0)
809ffe0d 4871 tc->class = XMC_UC;
252b5132
RH		 4872 break;
4873 case 'X':
4874 if (strcmp (s, "XO]") == 0)
809ffe0d 4875 tc->class = XMC_XO;
252b5132
RH		 4876 break;
4877 }
4878
809ffe0d 4879 if (tc->class == -1)
252b5132
RH		 4880 as_bad (_("Unrecognized symbol suffix"));
4881}
4882
4883/* Set the class of a label based on where it is defined. This
4884 handles symbols without suffixes. Also, move the symbol so that it
4885 follows the csect symbol. */
4886
4887void
98027b10 4888ppc_frob_label (symbolS *sym)
252b5132
RH		 4889{
4890 if (ppc_current_csect != (symbolS *) NULL)
4891 {
809ffe0d
ILT		 4892 if (symbol_get_tc (sym)->class == -1)
4893 symbol_get_tc (sym)->class = symbol_get_tc (ppc_current_csect)->class;
252b5132
RH		 4894
4895 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4896 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
4897 &symbol_rootP, &symbol_lastP);
4898 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132 4899 }
07a53e5c
RH		 4900
4901#ifdef OBJ_ELF
4902 dwarf2_emit_label (sym);
4903#endif
252b5132
RH		 4904}
4905
4906/* This variable is set by ppc_frob_symbol if any absolute symbols are
4907 seen. It tells ppc_adjust_symtab whether it needs to look through
4908 the symbols. */
4909
b34976b6 4910static bfd_boolean ppc_saw_abs;
252b5132
RH		 4911
4912/* Change the name of a symbol just before writing it out. Set the
4913 real name if the .rename pseudo-op was used. Otherwise, remove any
4914 class suffix. Return 1 if the symbol should not be included in the
4915 symbol table. */
4916
4917int
98027b10 4918ppc_frob_symbol (symbolS *sym)
252b5132
RH		 4919{
4920 static symbolS *ppc_last_function;
4921 static symbolS *set_end;
4922
4923 /* Discard symbols that should not be included in the output symbol
4924 table. */
809ffe0d
ILT		 4925 if (! symbol_used_in_reloc_p (sym)
4926 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 4927 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 4928 && ! symbol_get_tc (sym)->output
252b5132
RH		 4929 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
4930 return 1;
4931
a161fe53
AM		 4932 /* This one will disappear anyway. Don't make a csect sym for it. */
4933 if (sym == abs_section_sym)
4934 return 1;
4935
809ffe0d
ILT		 4936 if (symbol_get_tc (sym)->real_name != (char *) NULL)
4937 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 4938 else
4939 {
4940 const char *name;
4941 const char *s;
4942
4943 name = S_GET_NAME (sym);
4944 s = strchr (name, '[');
4945 if (s != (char *) NULL)
4946 {
4947 unsigned int len;
4948 char *snew;
4949
4950 len = s - name;
4951 snew = xmalloc (len + 1);
4952 memcpy (snew, name, len);
4953 snew[len] = '\0';
4954
4955 S_SET_NAME (sym, snew);
4956 }
4957 }
4958
4959 if (set_end != (symbolS *) NULL)
4960 {
4961 SA_SET_SYM_ENDNDX (set_end, sym);
4962 set_end = NULL;
4963 }
4964
4965 if (SF_GET_FUNCTION (sym))
4966 {
4967 if (ppc_last_function != (symbolS *) NULL)
4968 as_bad (_("two .function pseudo-ops with no intervening .ef"));
4969 ppc_last_function = sym;
809ffe0d 4970 if (symbol_get_tc (sym)->size != (symbolS *) NULL)
252b5132 4971 {
6386f3a7 4972 resolve_symbol_value (symbol_get_tc (sym)->size);
809ffe0d
ILT		 4973 SA_SET_SYM_FSIZE (sym,
4974 (long) S_GET_VALUE (symbol_get_tc (sym)->size));
252b5132
RH		 4975 }
4976 }
4977 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
4978 && strcmp (S_GET_NAME (sym), ".ef") == 0)
4979 {
4980 if (ppc_last_function == (symbolS *) NULL)
4981 as_bad (_(".ef with no preceding .function"));
4982 else
4983 {
4984 set_end = ppc_last_function;
4985 ppc_last_function = NULL;
4986
4987 /* We don't have a C_EFCN symbol, but we need to force the
4988 COFF backend to believe that it has seen one. */
4989 coff_last_function = NULL;
4990 }
4991 }
4992
670ec21d 4993 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 4994 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 4995 && S_GET_STORAGE_CLASS (sym) != C_FILE
4996 && S_GET_STORAGE_CLASS (sym) != C_FCN
4997 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
4998 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
4999 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5000 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5001 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5002 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5003 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5004
5005 if (S_GET_STORAGE_CLASS (sym) == C_EXT
5006 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5007 {
5008 int i;
5009 union internal_auxent *a;
5010
5011 /* Create a csect aux. */
5012 i = S_GET_NUMBER_AUXILIARY (sym);
5013 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d
ILT		 5014 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
5015 if (symbol_get_tc (sym)->class == XMC_TC0)
252b5132
RH		 5016 {
5017 /* This is the TOC table. */
5018 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5019 a->x_csect.x_scnlen.l = 0;
5020 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5021 }
809ffe0d 5022 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 5023 {
5024 /* This is a csect symbol. x_scnlen is the size of the
5025 csect. */
809ffe0d 5026 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 5027 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5028 S_GET_SEGMENT (sym))
5029 - S_GET_VALUE (sym));
5030 else
5031 {
6386f3a7 5032 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 5033 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 5034 - S_GET_VALUE (sym));
5035 }
809ffe0d 5036 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 5037 }
5038 else if (S_GET_SEGMENT (sym) == bss_section)
5039 {
5040 /* This is a common symbol. */
809ffe0d
ILT		 5041 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5042 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 5043 if (S_IS_EXTERNAL (sym))
809ffe0d 5044 symbol_get_tc (sym)->class = XMC_RW;
252b5132 5045 else
809ffe0d 5046 symbol_get_tc (sym)->class = XMC_BS;
252b5132
RH		 5047 }
5048 else if (S_GET_SEGMENT (sym) == absolute_section)
5049 {
5050 /* This is an absolute symbol. The csect will be created by
99a814a1 5051 ppc_adjust_symtab. */
b34976b6 5052 ppc_saw_abs = TRUE;
252b5132 5053 a->x_csect.x_smtyp = XTY_LD;
809ffe0d
ILT		 5054 if (symbol_get_tc (sym)->class == -1)
5055 symbol_get_tc (sym)->class = XMC_XO;
252b5132
RH		 5056 }
5057 else if (! S_IS_DEFINED (sym))
5058 {
5059 /* This is an external symbol. */
5060 a->x_csect.x_scnlen.l = 0;
5061 a->x_csect.x_smtyp = XTY_ER;
5062 }
809ffe0d 5063 else if (symbol_get_tc (sym)->class == XMC_TC)
252b5132
RH		 5064 {
5065 symbolS *next;
5066
5067 /* This is a TOC definition. x_scnlen is the size of the
5068 TOC entry. */
5069 next = symbol_next (sym);
809ffe0d 5070 while (symbol_get_tc (next)->class == XMC_TC0)
252b5132
RH		 5071 next = symbol_next (next);
5072 if (next == (symbolS *) NULL
809ffe0d 5073 || symbol_get_tc (next)->class != XMC_TC)
252b5132
RH		 5074 {
5075 if (ppc_after_toc_frag == (fragS *) NULL)
5076 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5077 data_section)
5078 - S_GET_VALUE (sym));
5079 else
5080 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5081 - S_GET_VALUE (sym));
5082 }
5083 else
5084 {
6386f3a7 5085 resolve_symbol_value (next);
252b5132
RH		 5086 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5087 - S_GET_VALUE (sym));
5088 }
5089 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5090 }
5091 else
5092 {
5093 symbolS *csect;
5094
5095 /* This is a normal symbol definition. x_scnlen is the
5096 symbol index of the containing csect. */
5097 if (S_GET_SEGMENT (sym) == text_section)
5098 csect = ppc_text_csects;
5099 else if (S_GET_SEGMENT (sym) == data_section)
5100 csect = ppc_data_csects;
5101 else
5102 abort ();
5103
5104 /* Skip the initial dummy symbol. */
809ffe0d 5105 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5106
5107 if (csect == (symbolS *) NULL)
5108 {
5109 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5110 a->x_csect.x_scnlen.l = 0;
5111 }
5112 else
5113 {
809ffe0d 5114 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5115 {
6386f3a7 5116 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5117 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5118 > S_GET_VALUE (sym))
252b5132 5119 break;
809ffe0d 5120 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5121 }
5122
809ffe0d
ILT		 5123 a->x_csect.x_scnlen.p =
5124 coffsymbol (symbol_get_bfdsym (csect))->native;
5125 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5126 1;
252b5132
RH		 5127 }
5128 a->x_csect.x_smtyp = XTY_LD;
5129 }
81d4177b 5130
252b5132
RH		 5131 a->x_csect.x_parmhash = 0;
5132 a->x_csect.x_snhash = 0;
809ffe0d 5133 if (symbol_get_tc (sym)->class == -1)
252b5132
RH		 5134 a->x_csect.x_smclas = XMC_PR;
5135 else
809ffe0d 5136 a->x_csect.x_smclas = symbol_get_tc (sym)->class;
252b5132
RH		 5137 a->x_csect.x_stab = 0;
5138 a->x_csect.x_snstab = 0;
5139
5140 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5141 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5142 }
5143 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5144 {
5145 /* We want the value to be the symbol index of the referenced
5146 csect symbol. BFD will do that for us if we set the right
5147 flags. */
b782de16
AM		 5148 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5149 combined_entry_type *c = coffsymbol (bsym)->native;
5150
5151 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5152 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5153 }
5154 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5155 {
5156 symbolS *block;
5157 symbolS *csect;
5158
5159 /* The value is the offset from the enclosing csect. */
809ffe0d
ILT		 5160 block = symbol_get_tc (sym)->within;
5161 csect = symbol_get_tc (block)->within;
6386f3a7 5162 resolve_symbol_value (csect);
252b5132
RH		 5163 S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
5164 }
5165 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5166 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5167 {
5168 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 5169 BFD will do that for us if we set the right flags. We have
5170 already set the value correctly. */
809ffe0d 5171 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 5172 }
5173
5174 return 0;
5175}
5176
5177/* Adjust the symbol table. This creates csect symbols for all
5178 absolute symbols. */
5179
5180void
98027b10 5181ppc_adjust_symtab (void)
252b5132
RH		 5182{
5183 symbolS *sym;
5184
5185 if (! ppc_saw_abs)
5186 return;
5187
5188 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5189 {
5190 symbolS *csect;
5191 int i;
5192 union internal_auxent *a;
5193
5194 if (S_GET_SEGMENT (sym) != absolute_section)
5195 continue;
5196
5197 csect = symbol_create (".abs[XO]", absolute_section,
5198 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5199 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 5200 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5201 i = S_GET_NUMBER_AUXILIARY (csect);
5202 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5203 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 5204 a->x_csect.x_scnlen.l = 0;
5205 a->x_csect.x_smtyp = XTY_SD;
5206 a->x_csect.x_parmhash = 0;
5207 a->x_csect.x_snhash = 0;
5208 a->x_csect.x_smclas = XMC_XO;
5209 a->x_csect.x_stab = 0;
5210 a->x_csect.x_snstab = 0;
5211
5212 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5213
5214 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 5215 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5216 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5217 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 5218 }
5219
b34976b6 5220 ppc_saw_abs = FALSE;
252b5132
RH		 5221}
5222
5223/* Set the VMA for a section. This is called on all the sections in
5224 turn. */
5225
5226void
98027b10 5227ppc_frob_section (asection *sec)
252b5132 5228{
931e13a6 5229 static bfd_vma vma = 0;
252b5132 5230
931e13a6 5231 vma = md_section_align (sec, vma);
252b5132
RH		 5232 bfd_set_section_vma (stdoutput, sec, vma);
5233 vma += bfd_section_size (stdoutput, sec);
5234}
5235
5236#endif /* OBJ_XCOFF */
5237\f
252b5132 5238char *
98027b10 5239md_atof (int type, char *litp, int *sizep)
252b5132 5240{
499ac353 5241 return ieee_md_atof (type, litp, sizep, target_big_endian);
252b5132
RH		 5242}
5243
5244/* Write a value out to the object file, using the appropriate
5245 endianness. */
5246
5247void
98027b10 5248md_number_to_chars (char *buf, valueT val, int n)
252b5132
RH		 5249{
5250 if (target_big_endian)
5251 number_to_chars_bigendian (buf, val, n);
5252 else
5253 number_to_chars_littleendian (buf, val, n);
5254}
5255
5256/* Align a section (I don't know why this is machine dependent). */
5257
5258valueT
3aeeedbb 5259md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
252b5132 5260{
3aeeedbb
AM		 5261#ifdef OBJ_ELF
5262 return addr;
5263#else
252b5132
RH		 5264 int align = bfd_get_section_alignment (stdoutput, seg);
5265
5266 return ((addr + (1 << align) - 1) & (-1 << align));
3aeeedbb 5267#endif
252b5132
RH		 5268}
5269
5270/* We don't have any form of relaxing. */
5271
5272int
98027b10
AM		 5273md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
5274 asection *seg ATTRIBUTE_UNUSED)
252b5132
RH		 5275{
5276 abort ();
5277 return 0;
5278}
5279
5280/* Convert a machine dependent frag. We never generate these. */
5281
5282void
98027b10
AM		 5283md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
5284 asection *sec ATTRIBUTE_UNUSED,
5285 fragS *fragp ATTRIBUTE_UNUSED)
252b5132
RH		 5286{
5287 abort ();
5288}
5289
5290/* We have no need to default values of symbols. */
5291
252b5132 5292symbolS *
98027b10 5293md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
252b5132
RH		 5294{
5295 return 0;
5296}
5297\f
5298/* Functions concerning relocs. */
5299
5300/* The location from which a PC relative jump should be calculated,
5301 given a PC relative reloc. */
5302
5303long
98027b10 5304md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
252b5132
RH		 5305{
5306 return fixp->fx_frag->fr_address + fixp->fx_where;
5307}
5308
5309#ifdef OBJ_XCOFF
5310
5311/* This is called to see whether a fixup should be adjusted to use a
5312 section symbol. We take the opportunity to change a fixup against
5313 a symbol in the TOC subsegment into a reloc against the
5314 corresponding .tc symbol. */
5315
5316int
98027b10 5317ppc_fix_adjustable (fixS *fix)
252b5132 5318{
b782de16
AM		 5319 valueT val = resolve_symbol_value (fix->fx_addsy);
5320 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5321 TC_SYMFIELD_TYPE *tc;
5322
5323 if (symseg == absolute_section)
5324 return 0;
252b5132 5325
252b5132 5326 if (ppc_toc_csect != (symbolS *) NULL
252b5132 5327 && fix->fx_addsy != ppc_toc_csect
b782de16 5328 && symseg == data_section
252b5132
RH		 5329 && val >= ppc_toc_frag->fr_address
5330 && (ppc_after_toc_frag == (fragS *) NULL
5331 || val < ppc_after_toc_frag->fr_address))
5332 {
5333 symbolS *sy;
5334
5335 for (sy = symbol_next (ppc_toc_csect);
5336 sy != (symbolS *) NULL;
5337 sy = symbol_next (sy))
5338 {
b782de16
AM		 5339 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5340
5341 if (sy_tc->class == XMC_TC0)
252b5132 5342 continue;
b782de16 5343 if (sy_tc->class != XMC_TC)
252b5132 5344 break;
b782de16 5345 if (val == resolve_symbol_value (sy))
252b5132
RH		 5346 {
5347 fix->fx_addsy = sy;
5348 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5349 return 0;
5350 }
5351 }
5352
5353 as_bad_where (fix->fx_file, fix->fx_line,
5354 _("symbol in .toc does not match any .tc"));
5355 }
5356
5357 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 5358 tc = symbol_get_tc (fix->fx_addsy);
5359 if (tc->subseg == 0
5360 && tc->class != XMC_TC0
5361 && tc->class != XMC_TC
5362 && symseg != bss_section
252b5132 5363 /* Don't adjust if this is a reloc in the toc section. */
b782de16 5364 && (symseg != data_section
252b5132
RH		 5365 || ppc_toc_csect == NULL
5366 || val < ppc_toc_frag->fr_address
5367 || (ppc_after_toc_frag != NULL
5368 && val >= ppc_after_toc_frag->fr_address)))
5369 {
5370 symbolS *csect;
b782de16 5371 symbolS *next_csect;
252b5132 5372
b782de16 5373 if (symseg == text_section)
252b5132 5374 csect = ppc_text_csects;
b782de16 5375 else if (symseg == data_section)
252b5132
RH		 5376 csect = ppc_data_csects;
5377 else
5378 abort ();
5379
5380 /* Skip the initial dummy symbol. */
809ffe0d 5381 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5382
5383 if (csect != (symbolS *) NULL)
5384 {
b782de16
AM		 5385 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5386 && (symbol_get_frag (next_csect)->fr_address <= val))
252b5132
RH		 5387 {
5388 /* If the csect address equals the symbol value, then we
99a814a1
AM		 5389 have to look through the full symbol table to see
5390 whether this is the csect we want. Note that we will
5391 only get here if the csect has zero length. */
b782de16
AM		 5392 if (symbol_get_frag (csect)->fr_address == val
5393 && S_GET_VALUE (csect) == val)
252b5132
RH		 5394 {
5395 symbolS *scan;
5396
809ffe0d 5397 for (scan = symbol_next (csect);
252b5132 5398 scan != NULL;
809ffe0d 5399 scan = symbol_next (scan))
252b5132 5400 {
809ffe0d 5401 if (symbol_get_tc (scan)->subseg != 0)
252b5132
RH		 5402 break;
5403 if (scan == fix->fx_addsy)
5404 break;
5405 }
5406
5407 /* If we found the symbol before the next csect
99a814a1 5408 symbol, then this is the csect we want. */
252b5132
RH		 5409 if (scan == fix->fx_addsy)
5410 break;
5411 }
5412
b782de16 5413 csect = next_csect;
252b5132
RH		 5414 }
5415
b782de16 5416 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
252b5132
RH		 5417 fix->fx_addsy = csect;
5418 }
b782de16 5419 return 0;
252b5132
RH		 5420 }
5421
5422 /* Adjust a reloc against a .lcomm symbol to be against the base
5423 .lcomm. */
b782de16 5424 if (symseg == bss_section
252b5132
RH		 5425 && ! S_IS_EXTERNAL (fix->fx_addsy))
5426 {
b782de16
AM		 5427 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5428
5429 fix->fx_offset += val - resolve_symbol_value (sy);
5430 fix->fx_addsy = sy;
252b5132
RH		 5431 }
5432
5433 return 0;
5434}
5435
5436/* A reloc from one csect to another must be kept. The assembler
5437 will, of course, keep relocs between sections, and it will keep
5438 absolute relocs, but we need to force it to keep PC relative relocs
5439 between two csects in the same section. */
5440
5441int
98027b10 5442ppc_force_relocation (fixS *fix)
252b5132
RH		 5443{
5444 /* At this point fix->fx_addsy should already have been converted to
5445 a csect symbol. If the csect does not include the fragment, then
5446 we need to force the relocation. */
5447 if (fix->fx_pcrel
5448 && fix->fx_addsy != NULL
809ffe0d
ILT		 5449 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5450 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5451 > fix->fx_frag->fr_address)
5452 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5453 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 5454 <= fix->fx_frag->fr_address))))
5455 return 1;
5456
ae6063d4 5457 return generic_force_reloc (fix);
252b5132
RH		 5458}
5459
5460#endif /* OBJ_XCOFF */
5461
0baf16f2 5462#ifdef OBJ_ELF
a161fe53
AM		 5463/* If this function returns non-zero, it guarantees that a relocation
5464 will be emitted for a fixup. */
5465
5466int
98027b10 5467ppc_force_relocation (fixS *fix)
a161fe53
AM		 5468{
5469 /* Branch prediction relocations must force a relocation, as must
5470 the vtable description relocs. */
5471 switch (fix->fx_r_type)
5472 {
5473 case BFD_RELOC_PPC_B16_BRTAKEN:
5474 case BFD_RELOC_PPC_B16_BRNTAKEN:
5475 case BFD_RELOC_PPC_BA16_BRTAKEN:
5476 case BFD_RELOC_PPC_BA16_BRNTAKEN:
c744ecf2 5477 case BFD_RELOC_24_PLT_PCREL:
a161fe53 5478 case BFD_RELOC_PPC64_TOC:
a161fe53
AM		 5479 return 1;
5480 default:
5481 break;
5482 }
5483
cdba85ec
AM		 5484 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5485 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5486 return 1;
5487
ae6063d4 5488 return generic_force_reloc (fix);
a161fe53
AM		 5489}
5490
0baf16f2 5491int
98027b10 5492ppc_fix_adjustable (fixS *fix)
252b5132 5493{
0baf16f2
AM		 5494 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5495 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5496 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5497 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
5498 && fix->fx_r_type != BFD_RELOC_GPREL16
5499 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5500 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 5501 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 5502 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 5503}
0baf16f2 5504#endif
252b5132 5505
3aeeedbb
AM		 5506/* Implement HANDLE_ALIGN. This writes the NOP pattern into an
5507 rs_align_code frag. */
5508
5509void
5510ppc_handle_align (struct frag *fragP)
5511{
5512 valueT count = (fragP->fr_next->fr_address
5513 - (fragP->fr_address + fragP->fr_fix));
5514
5515 if (count != 0 && (count & 3) == 0)
5516 {
5517 char *dest = fragP->fr_literal + fragP->fr_fix;
5518
5519 fragP->fr_var = 4;
5520 md_number_to_chars (dest, 0x60000000, 4);
5521
5522 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0)
5523 {
5524 /* For power6, we want the last nop to be a group terminating
5525 one, "ori 1,1,0". Do this by inserting an rs_fill frag
5526 immediately after this one, with its address set to the last
5527 nop location. This will automatically reduce the number of
5528 nops in the current frag by one. */
5529 if (count > 4)
5530 {
5531 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
5532
5533 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
5534 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
5535 group_nop->fr_fix = 0;
5536 group_nop->fr_offset = 1;
5537 group_nop->fr_type = rs_fill;
5538 fragP->fr_next = group_nop;
5539 dest = group_nop->fr_literal;
5540 }
5541
5542 md_number_to_chars (dest, 0x60210000, 4);
5543 }
5544 }
5545}
5546
252b5132
RH		 5547/* Apply a fixup to the object code. This is called for all the
5548 fixups we generated by the call to fix_new_exp, above. In the call
5549 above we used a reloc code which was the largest legal reloc code
5550 plus the operand index. Here we undo that to recover the operand
5551 index. At this point all symbol values should be fully resolved,
5552 and we attempt to completely resolve the reloc. If we can not do
5553 that, we determine the correct reloc code and put it back in the
5554 fixup. */
5555
94f592af 5556void
98027b10 5557md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
252b5132 5558{
94f592af 5559 valueT value = * valP;
252b5132
RH		 5560
5561#ifdef OBJ_ELF
94f592af 5562 if (fixP->fx_addsy != NULL)
252b5132 5563 {
a161fe53 5564 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 5565 if (fixP->fx_pcrel)
5566 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 5567 }
5568 else
94f592af 5569 fixP->fx_done = 1;
252b5132 5570#else
a161fe53 5571 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7be1c489
AM		 5572 the symbol values. If we are doing this relocation the code in
5573 write.c is going to call bfd_install_relocation, which is also
5574 going to use the symbol value. That means that if the reloc is
5575 fully resolved we want to use *valP since bfd_install_relocation is
5576 not being used.
252b5132 5577 However, if the reloc is not fully resolved we do not want to use
a161fe53
AM		 5578 *valP, and must use fx_offset instead. However, if the reloc
5579 is PC relative, we do want to use *valP since it includes the
252b5132 5580 result of md_pcrel_from. This is confusing. */
94f592af
NC		 5581 if (fixP->fx_addsy == (symbolS *) NULL)
5582 fixP->fx_done = 1;
5583
5584 else if (fixP->fx_pcrel)
5585 ;
5586
252b5132 5587 else
a161fe53
AM		 5588 value = fixP->fx_offset;
5589#endif
5590
5591 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 5592 {
a161fe53
AM		 5593 /* We can't actually support subtracting a symbol. */
5594 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 5595 }
252b5132 5596
94f592af 5597 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132
RH		 5598 {
5599 int opindex;
5600 const struct powerpc_operand *operand;
5601 char *where;
5602 unsigned long insn;
5603
94f592af 5604 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
252b5132
RH		 5605
5606 operand = &powerpc_operands[opindex];
5607
5608#ifdef OBJ_XCOFF
0baf16f2
AM		 5609 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
5610 does not generate a reloc. It uses the offset of `sym' within its
5611 csect. Other usages, such as `.long sym', generate relocs. This
5612 is the documented behaviour of non-TOC symbols. */
252b5132 5613 if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5614 && (operand->bitm & 0xfff0) == 0xfff0
252b5132 5615 && operand->shift == 0
2b3c4602 5616 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 5617 && fixP->fx_addsy != NULL
5618 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
5619 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC
5620 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC0
5621 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 5622 {
94f592af
NC		 5623 value = fixP->fx_offset;
5624 fixP->fx_done = 1;
252b5132
RH		 5625 }
5626#endif
5627
5628 /* Fetch the instruction, insert the fully resolved operand
5629 value, and stuff the instruction back again. */
94f592af 5630 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH		 5631 if (target_big_endian)
5632 insn = bfd_getb32 ((unsigned char *) where);
5633 else
5634 insn = bfd_getl32 ((unsigned char *) where);
5635 insn = ppc_insert_operand (insn, operand, (offsetT) value,
783de163 5636 fixP->tc_fix_data.ppc_cpu,
94f592af 5637 fixP->fx_file, fixP->fx_line);
252b5132
RH		 5638 if (target_big_endian)
5639 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5640 else
5641 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5642
94f592af
NC		 5643 if (fixP->fx_done)
5644 /* Nothing else to do here. */
5645 return;
252b5132 5646
94f592af 5647 assert (fixP->fx_addsy != NULL);
0baf16f2 5648
252b5132
RH		 5649 /* Determine a BFD reloc value based on the operand information.
5650 We are only prepared to turn a few of the operands into
0baf16f2 5651 relocs. */
11b37b7b 5652 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5653 && operand->bitm == 0x3fffffc
11b37b7b 5654 && operand->shift == 0)
94f592af 5655 fixP->fx_r_type = BFD_RELOC_PPC_B26;
11b37b7b 5656 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5657 && operand->bitm == 0xfffc
11b37b7b 5658 && operand->shift == 0)
95210096
AM		 5659 {
5660 fixP->fx_r_type = BFD_RELOC_PPC_B16;
5661#ifdef OBJ_XCOFF
5662 fixP->fx_size = 2;
5663 if (target_big_endian)
5664 fixP->fx_where += 2;
5665#endif
5666 }
11b37b7b 5667 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5668 && operand->bitm == 0x3fffffc
11b37b7b 5669 && operand->shift == 0)
94f592af 5670 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
11b37b7b 5671 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5672 && operand->bitm == 0xfffc
11b37b7b 5673 && operand->shift == 0)
95210096
AM		 5674 {
5675 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
5676#ifdef OBJ_XCOFF
5677 fixP->fx_size = 2;
5678 if (target_big_endian)
5679 fixP->fx_where += 2;
5680#endif
5681 }
0baf16f2 5682#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
11b37b7b 5683 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5684 && (operand->bitm & 0xfff0) == 0xfff0
a7fc733f 5685 && operand->shift == 0)
11b37b7b 5686 {
a7fc733f
AM		 5687 if (ppc_is_toc_sym (fixP->fx_addsy))
5688 {
5689 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
0baf16f2 5690#ifdef OBJ_ELF
a7fc733f
AM		 5691 if (ppc_obj64
5692 && (operand->flags & PPC_OPERAND_DS) != 0)
5693 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
5694#endif
5695 }
5696 else
5697 {
5698 fixP->fx_r_type = BFD_RELOC_16;
5699#ifdef OBJ_ELF
5700 if (ppc_obj64
5701 && (operand->flags & PPC_OPERAND_DS) != 0)
5702 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
0baf16f2 5703#endif
a7fc733f 5704 }
94f592af 5705 fixP->fx_size = 2;
11b37b7b 5706 if (target_big_endian)
94f592af 5707 fixP->fx_where += 2;
11b37b7b 5708 }
0baf16f2 5709#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
11b37b7b 5710 else
252b5132
RH		 5711 {
5712 char *sfile;
5713 unsigned int sline;
5714
5715 /* Use expr_symbol_where to see if this is an expression
0baf16f2 5716 symbol. */
94f592af
NC		 5717 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
5718 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH		 5719 _("unresolved expression that must be resolved"));
5720 else
94f592af 5721 as_bad_where (fixP->fx_file, fixP->fx_line,
0baf16f2 5722 _("unsupported relocation against %s"),
94f592af
NC		 5723 S_GET_NAME (fixP->fx_addsy));
5724 fixP->fx_done = 1;
5725 return;
252b5132
RH		 5726 }
5727 }
5728 else
5729 {
5730#ifdef OBJ_ELF
94f592af 5731 ppc_elf_validate_fix (fixP, seg);
252b5132 5732#endif
94f592af 5733 switch (fixP->fx_r_type)
252b5132 5734 {
252b5132 5735 case BFD_RELOC_CTOR:
2b3c4602 5736 if (ppc_obj64)
9c7977b3
AM		 5737 goto ctor64;
5738 /* fall through */
5739
0baf16f2 5740 case BFD_RELOC_32:
94f592af
NC		 5741 if (fixP->fx_pcrel)
5742 fixP->fx_r_type = BFD_RELOC_32_PCREL;
99a814a1 5743 /* fall through */
252b5132
RH		 5744
5745 case BFD_RELOC_RVA:
5746 case BFD_RELOC_32_PCREL:
252b5132 5747 case BFD_RELOC_PPC_EMB_NADDR32:
94f592af 5748 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5749 value, 4);
5750 break;
5751
7f6d05e8 5752 case BFD_RELOC_64:
9c7977b3 5753 ctor64:
94f592af
NC		 5754 if (fixP->fx_pcrel)
5755 fixP->fx_r_type = BFD_RELOC_64_PCREL;
99a814a1 5756 /* fall through */
0baf16f2 5757
7f6d05e8 5758 case BFD_RELOC_64_PCREL:
94f592af 5759 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7f6d05e8 5760 value, 8);
81d4177b 5761 break;
0baf16f2 5762
252b5132
RH		 5763 case BFD_RELOC_GPREL16:
5764 case BFD_RELOC_16_GOT_PCREL:
5765 case BFD_RELOC_16_GOTOFF:
5766 case BFD_RELOC_LO16_GOTOFF:
5767 case BFD_RELOC_HI16_GOTOFF:
5768 case BFD_RELOC_HI16_S_GOTOFF:
1cfc59d5 5769 case BFD_RELOC_16_BASEREL:
252b5132
RH		 5770 case BFD_RELOC_LO16_BASEREL:
5771 case BFD_RELOC_HI16_BASEREL:
5772 case BFD_RELOC_HI16_S_BASEREL:
5773 case BFD_RELOC_PPC_EMB_NADDR16:
5774 case BFD_RELOC_PPC_EMB_NADDR16_LO:
5775 case BFD_RELOC_PPC_EMB_NADDR16_HI:
5776 case BFD_RELOC_PPC_EMB_NADDR16_HA:
5777 case BFD_RELOC_PPC_EMB_SDAI16:
5778 case BFD_RELOC_PPC_EMB_SDA2REL:
5779 case BFD_RELOC_PPC_EMB_SDA2I16:
5780 case BFD_RELOC_PPC_EMB_RELSEC16:
5781 case BFD_RELOC_PPC_EMB_RELST_LO:
5782 case BFD_RELOC_PPC_EMB_RELST_HI:
5783 case BFD_RELOC_PPC_EMB_RELST_HA:
5784 case BFD_RELOC_PPC_EMB_RELSDA:
5785 case BFD_RELOC_PPC_TOC16:
0baf16f2 5786#ifdef OBJ_ELF
0baf16f2
AM		 5787 case BFD_RELOC_PPC64_TOC16_LO:
5788 case BFD_RELOC_PPC64_TOC16_HI:
5789 case BFD_RELOC_PPC64_TOC16_HA:
0baf16f2 5790#endif
94f592af 5791 if (fixP->fx_pcrel)
252b5132 5792 {
94f592af
NC		 5793 if (fixP->fx_addsy != NULL)
5794 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5795 _("cannot emit PC relative %s relocation against %s"),
94f592af
NC		 5796 bfd_get_reloc_code_name (fixP->fx_r_type),
5797 S_GET_NAME (fixP->fx_addsy));
252b5132 5798 else
94f592af 5799 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5800 _("cannot emit PC relative %s relocation"),
94f592af 5801 bfd_get_reloc_code_name (fixP->fx_r_type));
252b5132
RH		 5802 }
5803
94f592af 5804 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5805 value, 2);
5806 break;
5807
3c9d25f4
AM		 5808 case BFD_RELOC_16:
5809 if (fixP->fx_pcrel)
5810 fixP->fx_r_type = BFD_RELOC_16_PCREL;
5811 /* fall through */
5812
5813 case BFD_RELOC_16_PCREL:
5814 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5815 value, 2);
5816 break;
5817
5818 case BFD_RELOC_LO16:
5819 if (fixP->fx_pcrel)
5820 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
5821 /* fall through */
5822
5823 case BFD_RELOC_LO16_PCREL:
5824 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5825 value, 2);
5826 break;
5827
252b5132
RH		 5828 /* This case happens when you write, for example,
5829 lis %r3,(L1-L2)@ha
5830 where L1 and L2 are defined later. */
5831 case BFD_RELOC_HI16:
94f592af 5832 if (fixP->fx_pcrel)
3c9d25f4
AM		 5833 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
5834 /* fall through */
5835
5836 case BFD_RELOC_HI16_PCREL:
94f592af 5837 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5838 PPC_HI (value), 2);
252b5132 5839 break;
0baf16f2 5840
252b5132 5841 case BFD_RELOC_HI16_S:
94f592af 5842 if (fixP->fx_pcrel)
3c9d25f4
AM		 5843 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
5844 /* fall through */
5845
5846 case BFD_RELOC_HI16_S_PCREL:
94f592af 5847 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5848 PPC_HA (value), 2);
5849 break;
5850
5851#ifdef OBJ_ELF
0baf16f2 5852 case BFD_RELOC_PPC64_HIGHER:
94f592af 5853 if (fixP->fx_pcrel)
0baf16f2 5854 abort ();
94f592af 5855 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5856 PPC_HIGHER (value), 2);
252b5132
RH		 5857 break;
5858
0baf16f2 5859 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 5860 if (fixP->fx_pcrel)
0baf16f2 5861 abort ();
94f592af 5862 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5863 PPC_HIGHERA (value), 2);
5864 break;
5865
5866 case BFD_RELOC_PPC64_HIGHEST:
94f592af 5867 if (fixP->fx_pcrel)
0baf16f2 5868 abort ();
94f592af 5869 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5870 PPC_HIGHEST (value), 2);
5871 break;
5872
5873 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 5874 if (fixP->fx_pcrel)
0baf16f2 5875 abort ();
94f592af 5876 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5877 PPC_HIGHESTA (value), 2);
5878 break;
5879
5880 case BFD_RELOC_PPC64_ADDR16_DS:
5881 case BFD_RELOC_PPC64_ADDR16_LO_DS:
5882 case BFD_RELOC_PPC64_GOT16_DS:
5883 case BFD_RELOC_PPC64_GOT16_LO_DS:
5884 case BFD_RELOC_PPC64_PLT16_LO_DS:
5885 case BFD_RELOC_PPC64_SECTOFF_DS:
5886 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
5887 case BFD_RELOC_PPC64_TOC16_DS:
5888 case BFD_RELOC_PPC64_TOC16_LO_DS:
5889 case BFD_RELOC_PPC64_PLTGOT16_DS:
5890 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
94f592af 5891 if (fixP->fx_pcrel)
0baf16f2
AM		 5892 abort ();
5893 {
2132e3a3 5894 char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
3d8aea2f 5895 unsigned long val, mask;
0baf16f2
AM		 5896
5897 if (target_big_endian)
adadcc0c 5898 val = bfd_getb32 (where - 2);
0baf16f2 5899 else
adadcc0c
AM		 5900 val = bfd_getl32 (where);
5901 mask = 0xfffc;
5902 /* lq insns reserve the four lsbs. */
5903 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
77a6138a 5904 && (val & (0x3f << 26)) == (56u << 26))
adadcc0c
AM		 5905 mask = 0xfff0;
5906 val |= value & mask;
0baf16f2
AM		 5907 if (target_big_endian)
5908 bfd_putb16 ((bfd_vma) val, where);
5909 else
5910 bfd_putl16 ((bfd_vma) val, where);
5911 }
5912 break;
cdba85ec 5913
ba0b2174
AM		 5914 case BFD_RELOC_PPC_B16_BRTAKEN:
5915 case BFD_RELOC_PPC_B16_BRNTAKEN:
5916 case BFD_RELOC_PPC_BA16_BRTAKEN:
5917 case BFD_RELOC_PPC_BA16_BRNTAKEN:
5918 break;
5919
cdba85ec 5920 case BFD_RELOC_PPC_TLS:
7c1d0959
L		 5921 break;
5922
cdba85ec
AM		 5923 case BFD_RELOC_PPC_DTPMOD:
5924 case BFD_RELOC_PPC_TPREL16:
5925 case BFD_RELOC_PPC_TPREL16_LO:
5926 case BFD_RELOC_PPC_TPREL16_HI:
5927 case BFD_RELOC_PPC_TPREL16_HA:
5928 case BFD_RELOC_PPC_TPREL:
5929 case BFD_RELOC_PPC_DTPREL16:
5930 case BFD_RELOC_PPC_DTPREL16_LO:
5931 case BFD_RELOC_PPC_DTPREL16_HI:
5932 case BFD_RELOC_PPC_DTPREL16_HA:
5933 case BFD_RELOC_PPC_DTPREL:
5934 case BFD_RELOC_PPC_GOT_TLSGD16:
5935 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
5936 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
5937 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
5938 case BFD_RELOC_PPC_GOT_TLSLD16:
5939 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
5940 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
5941 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
5942 case BFD_RELOC_PPC_GOT_TPREL16:
5943 case BFD_RELOC_PPC_GOT_TPREL16_LO:
5944 case BFD_RELOC_PPC_GOT_TPREL16_HI:
5945 case BFD_RELOC_PPC_GOT_TPREL16_HA:
5946 case BFD_RELOC_PPC_GOT_DTPREL16:
5947 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
5948 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
5949 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
5950 case BFD_RELOC_PPC64_TPREL16_DS:
5951 case BFD_RELOC_PPC64_TPREL16_LO_DS:
5952 case BFD_RELOC_PPC64_TPREL16_HIGHER:
5953 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
5954 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
5955 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
5956 case BFD_RELOC_PPC64_DTPREL16_DS:
5957 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
5958 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
5959 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
5960 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
5961 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
7c1d0959 5962 S_SET_THREAD_LOCAL (fixP->fx_addsy);
cdba85ec 5963 break;
0baf16f2 5964#endif
252b5132 5965 /* Because SDA21 modifies the register field, the size is set to 4
99a814a1 5966 bytes, rather than 2, so offset it here appropriately. */
252b5132 5967 case BFD_RELOC_PPC_EMB_SDA21:
94f592af 5968 if (fixP->fx_pcrel)
252b5132
RH		 5969 abort ();
5970
94f592af 5971 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
252b5132
RH		 5972 + ((target_big_endian) ? 2 : 0),
5973 value, 2);
5974 break;
5975
5976 case BFD_RELOC_8:
94f592af 5977 if (fixP->fx_pcrel)
31a91399
NC		 5978 {
5979 /* This can occur if there is a bug in the input assembler, eg:
b7d7dc63 5980 ".byte <undefined_symbol> - ." */
31a91399
NC		 5981 if (fixP->fx_addsy)
5982 as_bad (_("Unable to handle reference to symbol %s"),
5983 S_GET_NAME (fixP->fx_addsy));
5984 else
5985 as_bad (_("Unable to resolve expression"));
5986 fixP->fx_done = 1;
5987 }
5988 else
5989 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5990 value, 1);
252b5132
RH		 5991 break;
5992
5993 case BFD_RELOC_24_PLT_PCREL:
5994 case BFD_RELOC_PPC_LOCAL24PC:
94f592af 5995 if (!fixP->fx_pcrel && !fixP->fx_done)
252b5132
RH		 5996 abort ();
5997
94f592af 5998 if (fixP->fx_done)
99a814a1
AM		 5999 {
6000 char *where;
6001 unsigned long insn;
6002
6003 /* Fetch the instruction, insert the fully resolved operand
6004 value, and stuff the instruction back again. */
94f592af 6005 where = fixP->fx_frag->fr_literal + fixP->fx_where;
99a814a1
AM		 6006 if (target_big_endian)
6007 insn = bfd_getb32 ((unsigned char *) where);
6008 else
6009 insn = bfd_getl32 ((unsigned char *) where);
6010 if ((value & 3) != 0)
94f592af 6011 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6012 _("must branch to an address a multiple of 4"));
6013 if ((offsetT) value < -0x40000000
6014 || (offsetT) value >= 0x40000000)
94f592af 6015 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6016 _("@local or @plt branch destination is too far away, %ld bytes"),
6017 (long) value);
6018 insn = insn | (value & 0x03fffffc);
6019 if (target_big_endian)
6020 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6021 else
6022 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6023 }
252b5132
RH		 6024 break;
6025
6026 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 6027 fixP->fx_done = 0;
6028 if (fixP->fx_addsy
6029 && !S_IS_DEFINED (fixP->fx_addsy)
6030 && !S_IS_WEAK (fixP->fx_addsy))
6031 S_SET_WEAK (fixP->fx_addsy);
252b5132
RH		 6032 break;
6033
6034 case BFD_RELOC_VTABLE_ENTRY:
94f592af 6035 fixP->fx_done = 0;
252b5132
RH		 6036 break;
6037
0baf16f2 6038#ifdef OBJ_ELF
0baf16f2
AM		 6039 /* Generated by reference to `sym@tocbase'. The sym is
6040 ignored by the linker. */
6041 case BFD_RELOC_PPC64_TOC:
94f592af 6042 fixP->fx_done = 0;
0baf16f2 6043 break;
0baf16f2 6044#endif
252b5132 6045 default:
bc805888 6046 fprintf (stderr,
94f592af 6047 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 6048 fflush (stderr);
252b5132
RH		 6049 abort ();
6050 }
6051 }
6052
6053#ifdef OBJ_ELF
94f592af 6054 fixP->fx_addnumber = value;
4e6935a6
AM		 6055
6056 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
6057 from the section contents. If we are going to be emitting a reloc
6058 then the section contents are immaterial, so don't warn if they
6059 happen to overflow. Leave such warnings to ld. */
6060 if (!fixP->fx_done)
6061 fixP->fx_no_overflow = 1;
252b5132 6062#else
94f592af
NC		 6063 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
6064 fixP->fx_addnumber = 0;
252b5132
RH		 6065 else
6066 {
6067#ifdef TE_PE
94f592af 6068 fixP->fx_addnumber = 0;
252b5132 6069#else
8edcbfcd
TG		 6070 /* We want to use the offset within the toc, not the actual VMA
6071 of the symbol. */
94f592af 6072 fixP->fx_addnumber =
8edcbfcd
TG		 6073 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
6074 - S_GET_VALUE (ppc_toc_csect);
252b5132
RH		 6075#endif
6076 }
6077#endif
252b5132
RH		 6078}
6079
6080/* Generate a reloc for a fixup. */
6081
6082arelent *
98027b10 6083tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
252b5132
RH		 6084{
6085 arelent *reloc;
6086
6087 reloc = (arelent *) xmalloc (sizeof (arelent));
6088
49309057
ILT		 6089 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6090 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 6091 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6092 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6093 if (reloc->howto == (reloc_howto_type *) NULL)
6094 {
6095 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 6096 _("reloc %d not supported by object file format"),
6097 (int) fixp->fx_r_type);
252b5132
RH		 6098 return NULL;
6099 }
6100 reloc->addend = fixp->fx_addnumber;
6101
6102 return reloc;
6103}
75e21f08
JJ		 6104
6105void
98027b10 6106ppc_cfi_frame_initial_instructions (void)
75e21f08
JJ		 6107{
6108 cfi_add_CFA_def_cfa (1, 0);
6109}
6110
6111int
1df69f4f 6112tc_ppc_regname_to_dw2regnum (char *regname)
75e21f08
JJ		 6113{
6114 unsigned int regnum = -1;
6115 unsigned int i;
6116 const char *p;
6117 char *q;
6118 static struct { char *name; int dw2regnum; } regnames[] =
6119 {
6120 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6121 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 6122 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ		 6123 { "spe_acc", 111 }, { "spefscr", 112 }
6124 };
6125
6126 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6127 if (strcmp (regnames[i].name, regname) == 0)
6128 return regnames[i].dw2regnum;
6129
6130 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6131 {
6132 p = regname + 1 + (regname[1] == '.');
6133 regnum = strtoul (p, &q, 10);
6134 if (p == q || *q || regnum >= 32)
6135 return -1;
6136 if (regname[0] == 'f')
b7d7dc63 6137 regnum += 32;
75e21f08 6138 else if (regname[0] == 'v')
b7d7dc63 6139 regnum += 77;
75e21f08
JJ		 6140 }
6141 else if (regname[0] == 'c' && regname[1] == 'r')
6142 {
6143 p = regname + 2 + (regname[2] == '.');
6144 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 6145 return -1;
75e21f08
JJ		 6146 regnum = p[0] - '0' + 68;
6147 }
6148 return regnum;
6149}
GDB Binutils - Deliverables
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