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Add -Wshadow to the gcc command line options used when compiling the binutils.
[deliverable/binutils-gdb.git] / gas / config / tc-ppc.c
CommitLineData
252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b7d7dc63 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
ed84b57b 3 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
252b5132
RH		 4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
ec2655a6 10 the Free Software Foundation; either version 3, or (at your option)
252b5132
RH		 11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC		 20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
21 02110-1301, USA. */
252b5132 22
252b5132 23#include "as.h"
3882b010 24#include "safe-ctype.h"
252b5132 25#include "subsegs.h"
75e21f08 26#include "dw2gencfi.h"
252b5132
RH		 27#include "opcode/ppc.h"
28
29#ifdef OBJ_ELF
30#include "elf/ppc.h"
5d6f4f16 31#include "dwarf2dbg.h"
252b5132
RH		 32#endif
33
34#ifdef TE_PE
35#include "coff/pe.h"
36#endif
37
38/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
39
40/* Tell the main code what the endianness is. */
41extern int target_big_endian;
42
43/* Whether or not, we've set target_big_endian. */
44static int set_target_endian = 0;
45
46/* Whether to use user friendly register names. */
47#ifndef TARGET_REG_NAMES_P
48#ifdef TE_PE
b34976b6 49#define TARGET_REG_NAMES_P TRUE
252b5132 50#else
b34976b6 51#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 52#endif
53#endif
54
0baf16f2
AM		 55/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
56 HIGHESTA. */
57
58/* #lo(value) denotes the least significant 16 bits of the indicated. */
59#define PPC_LO(v) ((v) & 0xffff)
60
61/* #hi(value) denotes bits 16 through 31 of the indicated value. */
62#define PPC_HI(v) (((v) >> 16) & 0xffff)
63
64/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
65 the indicated value, compensating for #lo() being treated as a
66 signed number. */
15c1449b 67#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 68
69/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 70#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 71
72/* #highera(value) denotes bits 32 through 47 of the indicated value,
73 compensating for #lo() being treated as a signed number. */
15c1449b 74#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 75
76/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 77#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 78
79/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 80 compensating for #lo being treated as a signed number. */
81#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM		 82
83#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
84
b34976b6 85static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 86
98027b10
AM		 87static void ppc_macro (char *, const struct powerpc_macro *);
88static void ppc_byte (int);
0baf16f2
AM		 89
90#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
98027b10
AM		 91static void ppc_tc (int);
92static void ppc_machine (int);
0baf16f2 93#endif
252b5132
RH		 94
95#ifdef OBJ_XCOFF
98027b10
AM		 96static void ppc_comm (int);
97static void ppc_bb (int);
98static void ppc_bc (int);
99static void ppc_bf (int);
100static void ppc_biei (int);
101static void ppc_bs (int);
102static void ppc_eb (int);
103static void ppc_ec (int);
104static void ppc_ef (int);
105static void ppc_es (int);
106static void ppc_csect (int);
107static void ppc_change_csect (symbolS *, offsetT);
108static void ppc_function (int);
109static void ppc_extern (int);
110static void ppc_lglobl (int);
111static void ppc_section (int);
112static void ppc_named_section (int);
113static void ppc_stabx (int);
114static void ppc_rename (int);
115static void ppc_toc (int);
116static void ppc_xcoff_cons (int);
117static void ppc_vbyte (int);
252b5132
RH		 118#endif
119
120#ifdef OBJ_ELF
98027b10
AM		 121static void ppc_elf_cons (int);
122static void ppc_elf_rdata (int);
123static void ppc_elf_lcomm (int);
252b5132
RH		 124#endif
125
126#ifdef TE_PE
98027b10
AM		 127static void ppc_previous (int);
128static void ppc_pdata (int);
129static void ppc_ydata (int);
130static void ppc_reldata (int);
131static void ppc_rdata (int);
132static void ppc_ualong (int);
133static void ppc_znop (int);
134static void ppc_pe_comm (int);
135static void ppc_pe_section (int);
136static void ppc_pe_function (int);
137static void ppc_pe_tocd (int);
252b5132
RH		 138#endif
139\f
140/* Generic assembler global variables which must be defined by all
141 targets. */
142
143#ifdef OBJ_ELF
144/* This string holds the chars that always start a comment. If the
145 pre-processor is disabled, these aren't very useful. The macro
146 tc_comment_chars points to this. We use this, rather than the
147 usual comment_chars, so that we can switch for Solaris conventions. */
148static const char ppc_solaris_comment_chars[] = "#!";
149static const char ppc_eabi_comment_chars[] = "#";
150
151#ifdef TARGET_SOLARIS_COMMENT
152const char *ppc_comment_chars = ppc_solaris_comment_chars;
153#else
154const char *ppc_comment_chars = ppc_eabi_comment_chars;
155#endif
156#else
157const char comment_chars[] = "#";
158#endif
159
160/* Characters which start a comment at the beginning of a line. */
161const char line_comment_chars[] = "#";
162
163/* Characters which may be used to separate multiple commands on a
164 single line. */
165const char line_separator_chars[] = ";";
166
167/* Characters which are used to indicate an exponent in a floating
168 point number. */
169const char EXP_CHARS[] = "eE";
170
171/* Characters which mean that a number is a floating point constant,
172 as in 0d1.0. */
173const char FLT_CHARS[] = "dD";
5ce8663f 174
5e02f92e 175/* Anything that can start an operand needs to be mentioned here,
ac805826 176 to stop the input scrubber eating whitespace. */
5e02f92e 177const char ppc_symbol_chars[] = "%[";
75e21f08
JJ		 178
179/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
180int ppc_cie_data_alignment;
783de163
AM		 181
182/* The type of processor we are assembling for. This is one or more
183 of the PPC_OPCODE flags defined in opcode/ppc.h. */
fa452fa6 184ppc_cpu_t ppc_cpu = 0;
252b5132
RH		 185\f
186/* The target specific pseudo-ops which we support. */
187
188const pseudo_typeS md_pseudo_table[] =
189{
190 /* Pseudo-ops which must be overridden. */
191 { "byte", ppc_byte, 0 },
192
193#ifdef OBJ_XCOFF
194 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
195 legitimately belong in the obj-*.c file. However, XCOFF is based
196 on COFF, and is only implemented for the RS/6000. We just use
197 obj-coff.c, and add what we need here. */
198 { "comm", ppc_comm, 0 },
199 { "lcomm", ppc_comm, 1 },
200 { "bb", ppc_bb, 0 },
201 { "bc", ppc_bc, 0 },
202 { "bf", ppc_bf, 0 },
203 { "bi", ppc_biei, 0 },
204 { "bs", ppc_bs, 0 },
205 { "csect", ppc_csect, 0 },
206 { "data", ppc_section, 'd' },
207 { "eb", ppc_eb, 0 },
208 { "ec", ppc_ec, 0 },
209 { "ef", ppc_ef, 0 },
210 { "ei", ppc_biei, 1 },
211 { "es", ppc_es, 0 },
212 { "extern", ppc_extern, 0 },
213 { "function", ppc_function, 0 },
214 { "lglobl", ppc_lglobl, 0 },
215 { "rename", ppc_rename, 0 },
216 { "section", ppc_named_section, 0 },
217 { "stabx", ppc_stabx, 0 },
218 { "text", ppc_section, 't' },
219 { "toc", ppc_toc, 0 },
220 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 221 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 222 { "word", ppc_xcoff_cons, 1 },
223 { "short", ppc_xcoff_cons, 1 },
224 { "vbyte", ppc_vbyte, 0 },
225#endif
226
227#ifdef OBJ_ELF
0baf16f2
AM		 228 { "llong", ppc_elf_cons, 8 },
229 { "quad", ppc_elf_cons, 8 },
252b5132
RH		 230 { "long", ppc_elf_cons, 4 },
231 { "word", ppc_elf_cons, 2 },
232 { "short", ppc_elf_cons, 2 },
233 { "rdata", ppc_elf_rdata, 0 },
234 { "rodata", ppc_elf_rdata, 0 },
235 { "lcomm", ppc_elf_lcomm, 0 },
236#endif
237
238#ifdef TE_PE
99a814a1 239 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 240 { "previous", ppc_previous, 0 },
241 { "pdata", ppc_pdata, 0 },
242 { "ydata", ppc_ydata, 0 },
243 { "reldata", ppc_reldata, 0 },
244 { "rdata", ppc_rdata, 0 },
245 { "ualong", ppc_ualong, 0 },
246 { "znop", ppc_znop, 0 },
247 { "comm", ppc_pe_comm, 0 },
248 { "lcomm", ppc_pe_comm, 1 },
249 { "section", ppc_pe_section, 0 },
250 { "function", ppc_pe_function,0 },
251 { "tocd", ppc_pe_tocd, 0 },
252#endif
253
0baf16f2 254#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 255 { "tc", ppc_tc, 0 },
0baf16f2
AM		 256 { "machine", ppc_machine, 0 },
257#endif
252b5132
RH		 258
259 { NULL, NULL, 0 }
260};
261
262\f
99a814a1
AM		 263/* Predefined register names if -mregnames (or default for Windows NT).
264 In general, there are lots of them, in an attempt to be compatible
265 with a number of other Windows NT assemblers. */
252b5132
RH		 266
267/* Structure to hold information about predefined registers. */
268struct pd_reg
269 {
270 char *name;
271 int value;
272 };
273
274/* List of registers that are pre-defined:
275
276 Each general register has predefined names of the form:
277 1. r<reg_num> which has the value <reg_num>.
278 2. r.<reg_num> which has the value <reg_num>.
279
252b5132
RH		 280 Each floating point register has predefined names of the form:
281 1. f<reg_num> which has the value <reg_num>.
282 2. f.<reg_num> which has the value <reg_num>.
283
7a899fff
C		 284 Each vector unit register has predefined names of the form:
285 1. v<reg_num> which has the value <reg_num>.
286 2. v.<reg_num> which has the value <reg_num>.
287
252b5132
RH		 288 Each condition register has predefined names of the form:
289 1. cr<reg_num> which has the value <reg_num>.
290 2. cr.<reg_num> which has the value <reg_num>.
291
292 There are individual registers as well:
293 sp or r.sp has the value 1
294 rtoc or r.toc has the value 2
295 fpscr has the value 0
296 xer has the value 1
297 lr has the value 8
298 ctr has the value 9
299 pmr has the value 0
300 dar has the value 19
301 dsisr has the value 18
302 dec has the value 22
303 sdr1 has the value 25
304 srr0 has the value 26
305 srr1 has the value 27
306
81d4177b 307 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 308
309static const struct pd_reg pre_defined_registers[] =
310{
311 { "cr.0", 0 }, /* Condition Registers */
312 { "cr.1", 1 },
313 { "cr.2", 2 },
314 { "cr.3", 3 },
315 { "cr.4", 4 },
316 { "cr.5", 5 },
317 { "cr.6", 6 },
318 { "cr.7", 7 },
319
320 { "cr0", 0 },
321 { "cr1", 1 },
322 { "cr2", 2 },
323 { "cr3", 3 },
324 { "cr4", 4 },
325 { "cr5", 5 },
326 { "cr6", 6 },
327 { "cr7", 7 },
328
329 { "ctr", 9 },
330
331 { "dar", 19 }, /* Data Access Register */
332 { "dec", 22 }, /* Decrementer */
333 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
334
335 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 336 { "f.1", 1 },
337 { "f.10", 10 },
338 { "f.11", 11 },
339 { "f.12", 12 },
340 { "f.13", 13 },
341 { "f.14", 14 },
342 { "f.15", 15 },
343 { "f.16", 16 },
344 { "f.17", 17 },
345 { "f.18", 18 },
346 { "f.19", 19 },
347 { "f.2", 2 },
348 { "f.20", 20 },
349 { "f.21", 21 },
350 { "f.22", 22 },
351 { "f.23", 23 },
352 { "f.24", 24 },
353 { "f.25", 25 },
354 { "f.26", 26 },
355 { "f.27", 27 },
356 { "f.28", 28 },
357 { "f.29", 29 },
358 { "f.3", 3 },
252b5132
RH		 359 { "f.30", 30 },
360 { "f.31", 31 },
066be9f7
PB		 361
362 { "f.32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
363 { "f.33", 33 },
364 { "f.34", 34 },
365 { "f.35", 35 },
366 { "f.36", 36 },
367 { "f.37", 37 },
368 { "f.38", 38 },
369 { "f.39", 39 },
81d4177b 370 { "f.4", 4 },
066be9f7
PB		 371 { "f.40", 40 },
372 { "f.41", 41 },
373 { "f.42", 42 },
374 { "f.43", 43 },
375 { "f.44", 44 },
376 { "f.45", 45 },
377 { "f.46", 46 },
378 { "f.47", 47 },
379 { "f.48", 48 },
380 { "f.49", 49 },
81d4177b 381 { "f.5", 5 },
066be9f7
PB		 382 { "f.50", 50 },
383 { "f.51", 51 },
384 { "f.52", 52 },
385 { "f.53", 53 },
386 { "f.54", 54 },
387 { "f.55", 55 },
388 { "f.56", 56 },
389 { "f.57", 57 },
390 { "f.58", 58 },
391 { "f.59", 59 },
81d4177b 392 { "f.6", 6 },
066be9f7
PB		 393 { "f.60", 60 },
394 { "f.61", 61 },
395 { "f.62", 62 },
396 { "f.63", 63 },
81d4177b
KH		 397 { "f.7", 7 },
398 { "f.8", 8 },
399 { "f.9", 9 },
400
401 { "f0", 0 },
402 { "f1", 1 },
403 { "f10", 10 },
404 { "f11", 11 },
405 { "f12", 12 },
406 { "f13", 13 },
407 { "f14", 14 },
408 { "f15", 15 },
409 { "f16", 16 },
410 { "f17", 17 },
411 { "f18", 18 },
412 { "f19", 19 },
413 { "f2", 2 },
414 { "f20", 20 },
415 { "f21", 21 },
416 { "f22", 22 },
417 { "f23", 23 },
418 { "f24", 24 },
419 { "f25", 25 },
420 { "f26", 26 },
421 { "f27", 27 },
422 { "f28", 28 },
423 { "f29", 29 },
424 { "f3", 3 },
252b5132
RH		 425 { "f30", 30 },
426 { "f31", 31 },
066be9f7
PB		 427
428 { "f32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
429 { "f33", 33 },
430 { "f34", 34 },
431 { "f35", 35 },
432 { "f36", 36 },
433 { "f37", 37 },
434 { "f38", 38 },
435 { "f39", 39 },
81d4177b 436 { "f4", 4 },
066be9f7
PB		 437 { "f40", 40 },
438 { "f41", 41 },
439 { "f42", 42 },
440 { "f43", 43 },
441 { "f44", 44 },
442 { "f45", 45 },
443 { "f46", 46 },
444 { "f47", 47 },
445 { "f48", 48 },
446 { "f49", 49 },
81d4177b 447 { "f5", 5 },
066be9f7
PB		 448 { "f50", 50 },
449 { "f51", 51 },
450 { "f52", 52 },
451 { "f53", 53 },
452 { "f54", 54 },
453 { "f55", 55 },
454 { "f56", 56 },
455 { "f57", 57 },
456 { "f58", 58 },
457 { "f59", 59 },
81d4177b 458 { "f6", 6 },
066be9f7
PB		 459 { "f60", 60 },
460 { "f61", 61 },
461 { "f62", 62 },
462 { "f63", 63 },
81d4177b
KH		 463 { "f7", 7 },
464 { "f8", 8 },
465 { "f9", 9 },
252b5132
RH		 466
467 { "fpscr", 0 },
468
c3d65c1c
BE		 469 /* Quantization registers used with pair single instructions. */
470 { "gqr.0", 0 },
471 { "gqr.1", 1 },
472 { "gqr.2", 2 },
473 { "gqr.3", 3 },
474 { "gqr.4", 4 },
475 { "gqr.5", 5 },
476 { "gqr.6", 6 },
477 { "gqr.7", 7 },
478 { "gqr0", 0 },
479 { "gqr1", 1 },
480 { "gqr2", 2 },
481 { "gqr3", 3 },
482 { "gqr4", 4 },
483 { "gqr5", 5 },
484 { "gqr6", 6 },
485 { "gqr7", 7 },
486
252b5132
RH		 487 { "lr", 8 }, /* Link Register */
488
489 { "pmr", 0 },
490
491 { "r.0", 0 }, /* General Purpose Registers */
492 { "r.1", 1 },
493 { "r.10", 10 },
494 { "r.11", 11 },
495 { "r.12", 12 },
496 { "r.13", 13 },
497 { "r.14", 14 },
498 { "r.15", 15 },
499 { "r.16", 16 },
500 { "r.17", 17 },
501 { "r.18", 18 },
502 { "r.19", 19 },
503 { "r.2", 2 },
504 { "r.20", 20 },
505 { "r.21", 21 },
506 { "r.22", 22 },
507 { "r.23", 23 },
508 { "r.24", 24 },
509 { "r.25", 25 },
510 { "r.26", 26 },
511 { "r.27", 27 },
512 { "r.28", 28 },
513 { "r.29", 29 },
514 { "r.3", 3 },
515 { "r.30", 30 },
516 { "r.31", 31 },
517 { "r.4", 4 },
518 { "r.5", 5 },
519 { "r.6", 6 },
520 { "r.7", 7 },
521 { "r.8", 8 },
522 { "r.9", 9 },
523
524 { "r.sp", 1 }, /* Stack Pointer */
525
526 { "r.toc", 2 }, /* Pointer to the table of contents */
527
528 { "r0", 0 }, /* More general purpose registers */
529 { "r1", 1 },
530 { "r10", 10 },
531 { "r11", 11 },
532 { "r12", 12 },
533 { "r13", 13 },
534 { "r14", 14 },
535 { "r15", 15 },
536 { "r16", 16 },
537 { "r17", 17 },
538 { "r18", 18 },
539 { "r19", 19 },
540 { "r2", 2 },
541 { "r20", 20 },
542 { "r21", 21 },
543 { "r22", 22 },
544 { "r23", 23 },
545 { "r24", 24 },
546 { "r25", 25 },
547 { "r26", 26 },
548 { "r27", 27 },
549 { "r28", 28 },
550 { "r29", 29 },
551 { "r3", 3 },
552 { "r30", 30 },
553 { "r31", 31 },
554 { "r4", 4 },
555 { "r5", 5 },
556 { "r6", 6 },
557 { "r7", 7 },
558 { "r8", 8 },
559 { "r9", 9 },
560
561 { "rtoc", 2 }, /* Table of contents */
562
563 { "sdr1", 25 }, /* Storage Description Register 1 */
564
565 { "sp", 1 },
566
567 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
568 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 569
066be9f7 570 { "v.0", 0 }, /* Vector (Altivec/VMX) registers */
81d4177b
KH		 571 { "v.1", 1 },
572 { "v.10", 10 },
573 { "v.11", 11 },
574 { "v.12", 12 },
575 { "v.13", 13 },
576 { "v.14", 14 },
577 { "v.15", 15 },
578 { "v.16", 16 },
579 { "v.17", 17 },
580 { "v.18", 18 },
581 { "v.19", 19 },
582 { "v.2", 2 },
583 { "v.20", 20 },
584 { "v.21", 21 },
585 { "v.22", 22 },
586 { "v.23", 23 },
587 { "v.24", 24 },
588 { "v.25", 25 },
589 { "v.26", 26 },
590 { "v.27", 27 },
591 { "v.28", 28 },
592 { "v.29", 29 },
593 { "v.3", 3 },
7a899fff
C		 594 { "v.30", 30 },
595 { "v.31", 31 },
81d4177b
KH		 596 { "v.4", 4 },
597 { "v.5", 5 },
598 { "v.6", 6 },
599 { "v.7", 7 },
600 { "v.8", 8 },
601 { "v.9", 9 },
7a899fff
C		 602
603 { "v0", 0 },
81d4177b
KH		 604 { "v1", 1 },
605 { "v10", 10 },
606 { "v11", 11 },
607 { "v12", 12 },
608 { "v13", 13 },
609 { "v14", 14 },
610 { "v15", 15 },
611 { "v16", 16 },
612 { "v17", 17 },
613 { "v18", 18 },
614 { "v19", 19 },
615 { "v2", 2 },
616 { "v20", 20 },
617 { "v21", 21 },
618 { "v22", 22 },
619 { "v23", 23 },
620 { "v24", 24 },
621 { "v25", 25 },
622 { "v26", 26 },
623 { "v27", 27 },
624 { "v28", 28 },
625 { "v29", 29 },
626 { "v3", 3 },
7a899fff
C		 627 { "v30", 30 },
628 { "v31", 31 },
81d4177b
KH		 629 { "v4", 4 },
630 { "v5", 5 },
631 { "v6", 6 },
632 { "v7", 7 },
633 { "v8", 8 },
7a899fff 634 { "v9", 9 },
252b5132 635
066be9f7
PB		 636 { "vs.0", 0 }, /* Vector Scalar (VSX) registers (ISA 2.06). */
637 { "vs.1", 1 },
638 { "vs.10", 10 },
639 { "vs.11", 11 },
640 { "vs.12", 12 },
641 { "vs.13", 13 },
642 { "vs.14", 14 },
643 { "vs.15", 15 },
644 { "vs.16", 16 },
645 { "vs.17", 17 },
646 { "vs.18", 18 },
647 { "vs.19", 19 },
648 { "vs.2", 2 },
649 { "vs.20", 20 },
650 { "vs.21", 21 },
651 { "vs.22", 22 },
652 { "vs.23", 23 },
653 { "vs.24", 24 },
654 { "vs.25", 25 },
655 { "vs.26", 26 },
656 { "vs.27", 27 },
657 { "vs.28", 28 },
658 { "vs.29", 29 },
659 { "vs.3", 3 },
660 { "vs.30", 30 },
661 { "vs.31", 31 },
662 { "vs.32", 32 },
663 { "vs.33", 33 },
664 { "vs.34", 34 },
665 { "vs.35", 35 },
666 { "vs.36", 36 },
667 { "vs.37", 37 },
668 { "vs.38", 38 },
669 { "vs.39", 39 },
670 { "vs.4", 4 },
671 { "vs.40", 40 },
672 { "vs.41", 41 },
673 { "vs.42", 42 },
674 { "vs.43", 43 },
675 { "vs.44", 44 },
676 { "vs.45", 45 },
677 { "vs.46", 46 },
678 { "vs.47", 47 },
679 { "vs.48", 48 },
680 { "vs.49", 49 },
681 { "vs.5", 5 },
682 { "vs.50", 50 },
683 { "vs.51", 51 },
684 { "vs.52", 52 },
685 { "vs.53", 53 },
686 { "vs.54", 54 },
687 { "vs.55", 55 },
688 { "vs.56", 56 },
689 { "vs.57", 57 },
690 { "vs.58", 58 },
691 { "vs.59", 59 },
692 { "vs.6", 6 },
693 { "vs.60", 60 },
694 { "vs.61", 61 },
695 { "vs.62", 62 },
696 { "vs.63", 63 },
697 { "vs.7", 7 },
698 { "vs.8", 8 },
699 { "vs.9", 9 },
700
701 { "vs0", 0 },
702 { "vs1", 1 },
703 { "vs10", 10 },
704 { "vs11", 11 },
705 { "vs12", 12 },
706 { "vs13", 13 },
707 { "vs14", 14 },
708 { "vs15", 15 },
709 { "vs16", 16 },
710 { "vs17", 17 },
711 { "vs18", 18 },
712 { "vs19", 19 },
713 { "vs2", 2 },
714 { "vs20", 20 },
715 { "vs21", 21 },
716 { "vs22", 22 },
717 { "vs23", 23 },
718 { "vs24", 24 },
719 { "vs25", 25 },
720 { "vs26", 26 },
721 { "vs27", 27 },
722 { "vs28", 28 },
723 { "vs29", 29 },
724 { "vs3", 3 },
725 { "vs30", 30 },
726 { "vs31", 31 },
727 { "vs32", 32 },
728 { "vs33", 33 },
729 { "vs34", 34 },
730 { "vs35", 35 },
731 { "vs36", 36 },
732 { "vs37", 37 },
733 { "vs38", 38 },
734 { "vs39", 39 },
735 { "vs4", 4 },
736 { "vs40", 40 },
737 { "vs41", 41 },
738 { "vs42", 42 },
739 { "vs43", 43 },
740 { "vs44", 44 },
741 { "vs45", 45 },
742 { "vs46", 46 },
743 { "vs47", 47 },
744 { "vs48", 48 },
745 { "vs49", 49 },
746 { "vs5", 5 },
747 { "vs50", 50 },
748 { "vs51", 51 },
749 { "vs52", 52 },
750 { "vs53", 53 },
751 { "vs54", 54 },
752 { "vs55", 55 },
753 { "vs56", 56 },
754 { "vs57", 57 },
755 { "vs58", 58 },
756 { "vs59", 59 },
757 { "vs6", 6 },
758 { "vs60", 60 },
759 { "vs61", 61 },
760 { "vs62", 62 },
761 { "vs63", 63 },
762 { "vs7", 7 },
763 { "vs8", 8 },
764 { "vs9", 9 },
765
252b5132
RH		 766 { "xer", 1 },
767
768};
769
bc805888 770#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 771
772/* Given NAME, find the register number associated with that name, return
773 the integer value associated with the given name or -1 on failure. */
774
252b5132 775static int
98027b10 776reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
252b5132
RH		 777{
778 int middle, low, high;
779 int cmp;
780
781 low = 0;
782 high = regcount - 1;
783
784 do
785 {
786 middle = (low + high) / 2;
787 cmp = strcasecmp (name, regs[middle].name);
788 if (cmp < 0)
789 high = middle - 1;
790 else if (cmp > 0)
791 low = middle + 1;
792 else
793 return regs[middle].value;
794 }
795 while (low <= high);
796
797 return -1;
798}
799
800/*
99a814a1 801 * Summary of register_name.
252b5132
RH		 802 *
803 * in: Input_line_pointer points to 1st char of operand.
804 *
805 * out: A expressionS.
806 * The operand may have been a register: in this case, X_op == O_register,
807 * X_add_number is set to the register number, and truth is returned.
808 * Input_line_pointer->(next non-blank) char after operand, or is in its
809 * original state.
810 */
811
b34976b6 812static bfd_boolean
98027b10 813register_name (expressionS *expressionP)
252b5132
RH		 814{
815 int reg_number;
816 char *name;
817 char *start;
818 char c;
819
99a814a1 820 /* Find the spelling of the operand. */
252b5132 821 start = name = input_line_pointer;
3882b010 822 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 823 name = ++input_line_pointer;
824
3882b010 825 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 826 return FALSE;
252b5132
RH		 827
828 c = get_symbol_end ();
829 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
830
468cced8
AM		 831 /* Put back the delimiting char. */
832 *input_line_pointer = c;
833
99a814a1 834 /* Look to see if it's in the register table. */
81d4177b 835 if (reg_number >= 0)
252b5132
RH		 836 {
837 expressionP->X_op = O_register;
838 expressionP->X_add_number = reg_number;
81d4177b 839
99a814a1 840 /* Make the rest nice. */
252b5132
RH		 841 expressionP->X_add_symbol = NULL;
842 expressionP->X_op_symbol = NULL;
b34976b6 843 return TRUE;
252b5132 844 }
468cced8
AM		 845
846 /* Reset the line as if we had not done anything. */
847 input_line_pointer = start;
b34976b6 848 return FALSE;
252b5132
RH		 849}
850\f
851/* This function is called for each symbol seen in an expression. It
852 handles the special parsing which PowerPC assemblers are supposed
853 to use for condition codes. */
854
855/* Whether to do the special parsing. */
b34976b6 856static bfd_boolean cr_operand;
252b5132
RH		 857
858/* Names to recognize in a condition code. This table is sorted. */
859static const struct pd_reg cr_names[] =
860{
861 { "cr0", 0 },
862 { "cr1", 1 },
863 { "cr2", 2 },
864 { "cr3", 3 },
865 { "cr4", 4 },
866 { "cr5", 5 },
867 { "cr6", 6 },
868 { "cr7", 7 },
869 { "eq", 2 },
870 { "gt", 1 },
871 { "lt", 0 },
872 { "so", 3 },
873 { "un", 3 }
874};
875
876/* Parsing function. This returns non-zero if it recognized an
877 expression. */
878
879int
91d6fa6a 880ppc_parse_name (const char *name, expressionS *exp)
252b5132
RH		 881{
882 int val;
883
884 if (! cr_operand)
885 return 0;
886
13abbae3
AM		 887 if (*name == '%')
888 ++name;
252b5132
RH		 889 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
890 name);
891 if (val < 0)
892 return 0;
893
91d6fa6a
NC		 894 exp->X_op = O_constant;
895 exp->X_add_number = val;
252b5132
RH		 896
897 return 1;
898}
899\f
900/* Local variables. */
901
2b3c4602
AM		 902/* Whether to target xcoff64/elf64. */
903static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 904
252b5132
RH		 905/* Opcode hash table. */
906static struct hash_control *ppc_hash;
907
908/* Macro hash table. */
909static struct hash_control *ppc_macro_hash;
910
911#ifdef OBJ_ELF
99a814a1 912/* What type of shared library support to use. */
5d6f4f16 913static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 914
99a814a1 915/* Flags to set in the elf header. */
252b5132
RH		 916static flagword ppc_flags = 0;
917
918/* Whether this is Solaris or not. */
919#ifdef TARGET_SOLARIS_COMMENT
b34976b6 920#define SOLARIS_P TRUE
252b5132 921#else
b34976b6 922#define SOLARIS_P FALSE
252b5132
RH		 923#endif
924
b34976b6 925static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 926#endif
927
928#ifdef OBJ_XCOFF
929
930/* The RS/6000 assembler uses the .csect pseudo-op to generate code
931 using a bunch of different sections. These assembler sections,
932 however, are all encompassed within the .text or .data sections of
933 the final output file. We handle this by using different
934 subsegments within these main segments. */
935
936/* Next subsegment to allocate within the .text segment. */
937static subsegT ppc_text_subsegment = 2;
938
939/* Linked list of csects in the text section. */
940static symbolS *ppc_text_csects;
941
942/* Next subsegment to allocate within the .data segment. */
943static subsegT ppc_data_subsegment = 2;
944
945/* Linked list of csects in the data section. */
946static symbolS *ppc_data_csects;
947
948/* The current csect. */
949static symbolS *ppc_current_csect;
950
951/* The RS/6000 assembler uses a TOC which holds addresses of functions
952 and variables. Symbols are put in the TOC with the .tc pseudo-op.
953 A special relocation is used when accessing TOC entries. We handle
954 the TOC as a subsegment within the .data segment. We set it up if
955 we see a .toc pseudo-op, and save the csect symbol here. */
956static symbolS *ppc_toc_csect;
957
958/* The first frag in the TOC subsegment. */
959static fragS *ppc_toc_frag;
960
961/* The first frag in the first subsegment after the TOC in the .data
962 segment. NULL if there are no subsegments after the TOC. */
963static fragS *ppc_after_toc_frag;
964
965/* The current static block. */
966static symbolS *ppc_current_block;
967
968/* The COFF debugging section; set by md_begin. This is not the
969 .debug section, but is instead the secret BFD section which will
970 cause BFD to set the section number of a symbol to N_DEBUG. */
971static asection *ppc_coff_debug_section;
972
973#endif /* OBJ_XCOFF */
974
975#ifdef TE_PE
976
977/* Various sections that we need for PE coff support. */
978static segT ydata_section;
979static segT pdata_section;
980static segT reldata_section;
981static segT rdata_section;
982static segT tocdata_section;
983
81d4177b 984/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 985static segT ppc_previous_section;
986static segT ppc_current_section;
987
988#endif /* TE_PE */
989
990#ifdef OBJ_ELF
991symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 992#define PPC_APUINFO_ISEL 0x40
993#define PPC_APUINFO_PMR 0x41
994#define PPC_APUINFO_RFMCI 0x42
995#define PPC_APUINFO_CACHELCK 0x43
996#define PPC_APUINFO_SPE 0x100
997#define PPC_APUINFO_EFS 0x101
998#define PPC_APUINFO_BRLOCK 0x102
999
b34976b6
AM		 1000/*
1001 * We keep a list of APUinfo
6a0c61b7
EZ		 1002 */
1003unsigned long *ppc_apuinfo_list;
1004unsigned int ppc_apuinfo_num;
1005unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 1006#endif /* OBJ_ELF */
1007\f
1008#ifdef OBJ_ELF
15c1449b 1009const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 1010#else
15c1449b 1011const char *const md_shortopts = "um:";
252b5132 1012#endif
15c1449b 1013const struct option md_longopts[] = {
252b5132
RH		 1014 {NULL, no_argument, NULL, 0}
1015};
15c1449b 1016const size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH		 1017
1018int
98027b10 1019md_parse_option (int c, char *arg)
252b5132 1020{
69fe9ce5
AM		 1021 ppc_cpu_t new_cpu;
1022
252b5132
RH		 1023 switch (c)
1024 {
1025 case 'u':
1026 /* -u means that any undefined symbols should be treated as
1027 external, which is the default for gas anyhow. */
1028 break;
1029
1030#ifdef OBJ_ELF
1031 case 'l':
1032 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 1033 sake, recognize -be also. */
252b5132
RH		 1034 if (strcmp (arg, "e") == 0)
1035 {
1036 target_big_endian = 0;
1037 set_target_endian = 1;
1038 }
1039 else
1040 return 0;
1041
1042 break;
1043
1044 case 'b':
1045 if (strcmp (arg, "e") == 0)
1046 {
1047 target_big_endian = 1;
1048 set_target_endian = 1;
1049 }
1050 else
1051 return 0;
1052
1053 break;
1054
1055 case 'K':
99a814a1 1056 /* Recognize -K PIC. */
252b5132
RH		 1057 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
1058 {
1059 shlib = SHLIB_PIC;
1060 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1061 }
1062 else
1063 return 0;
1064
1065 break;
1066#endif
1067
7f6d05e8
CP		 1068 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1069 case 'a':
1070 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 1071 {
1072#ifdef BFD64
1073 ppc_obj64 = 1;
1074#else
1075 as_fatal (_("%s unsupported"), "-a64");
1076#endif
1077 }
7f6d05e8 1078 else if (strcmp (arg, "32") == 0)
2b3c4602 1079 ppc_obj64 = 0;
7f6d05e8
CP		 1080 else
1081 return 0;
1082 break;
81d4177b 1083
252b5132 1084 case 'm':
69fe9ce5
AM		 1085 if ((new_cpu = ppc_parse_cpu (ppc_cpu, arg)) != 0)
1086 ppc_cpu = new_cpu;
252b5132
RH		 1087
1088 else if (strcmp (arg, "regnames") == 0)
b34976b6 1089 reg_names_p = TRUE;
252b5132
RH		 1090
1091 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 1092 reg_names_p = FALSE;
252b5132
RH		 1093
1094#ifdef OBJ_ELF
99a814a1
AM		 1095 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1096 that require relocation. */
252b5132
RH		 1097 else if (strcmp (arg, "relocatable") == 0)
1098 {
5d6f4f16 1099 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1100 ppc_flags |= EF_PPC_RELOCATABLE;
1101 }
1102
1103 else if (strcmp (arg, "relocatable-lib") == 0)
1104 {
5d6f4f16 1105 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1106 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1107 }
1108
99a814a1 1109 /* -memb, set embedded bit. */
252b5132
RH		 1110 else if (strcmp (arg, "emb") == 0)
1111 ppc_flags |= EF_PPC_EMB;
1112
99a814a1
AM		 1113 /* -mlittle/-mbig set the endianess. */
1114 else if (strcmp (arg, "little") == 0
1115 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1116 {
1117 target_big_endian = 0;
1118 set_target_endian = 1;
1119 }
1120
1121 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1122 {
1123 target_big_endian = 1;
1124 set_target_endian = 1;
1125 }
1126
1127 else if (strcmp (arg, "solaris") == 0)
1128 {
b34976b6 1129 msolaris = TRUE;
252b5132
RH		 1130 ppc_comment_chars = ppc_solaris_comment_chars;
1131 }
1132
1133 else if (strcmp (arg, "no-solaris") == 0)
1134 {
b34976b6 1135 msolaris = FALSE;
252b5132
RH		 1136 ppc_comment_chars = ppc_eabi_comment_chars;
1137 }
1138#endif
1139 else
1140 {
1141 as_bad (_("invalid switch -m%s"), arg);
1142 return 0;
1143 }
1144 break;
1145
1146#ifdef OBJ_ELF
1147 /* -V: SVR4 argument to print version ID. */
1148 case 'V':
1149 print_version_id ();
1150 break;
1151
1152 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1153 should be emitted or not. FIXME: Not implemented. */
1154 case 'Q':
1155 break;
1156
1157 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1158 rather than .stabs.excl, which is ignored by the linker.
1159 FIXME: Not implemented. */
1160 case 's':
1161 if (arg)
1162 return 0;
1163
1164 break;
1165#endif
1166
1167 default:
1168 return 0;
1169 }
1170
1171 return 1;
1172}
1173
1174void
98027b10 1175md_show_usage (FILE *stream)
252b5132 1176{
bc805888 1177 fprintf (stream, _("\
252b5132 1178PowerPC options:\n\
df12615d
AM		 1179-a32 generate ELF32/XCOFF32\n\
1180-a64 generate ELF64/XCOFF64\n\
252b5132 1181-u ignored\n\
23e1d84c
AM		 1182-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1183-mpwr generate code for POWER (RIOS1)\n\
1184-m601 generate code for PowerPC 601\n\
418c1742 1185-mppc, -mppc32, -m603, -m604\n\
23e1d84c 1186 generate code for PowerPC 603/604\n\
081ba1b3
AM		 1187-m403 generate code for PowerPC 403\n\
1188-m405 generate code for PowerPC 405\n\
3d8aea2f 1189-m440 generate code for PowerPC 440\n\
c8187e15 1190-m464 generate code for PowerPC 464\n\
9fe54b1c 1191-m476 generate code for PowerPC 476\n\
f5c120c5 1192-m7400, -m7410, -m7450, -m7455\n\
c3d65c1c
BE		 1193 generate code for PowerPC 7400/7410/7450/7455\n\
1194-m750cl generate code for PowerPC 750cl\n"));
df12615d 1195 fprintf (stream, _("\
23e1d84c 1196-mppc64, -m620 generate code for PowerPC 620/625/630\n\
d0e9a01c 1197-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
2f3bb96a 1198-mbooke generate code for 32-bit PowerPC BookE\n\
634b50f2 1199-ma2 generate code for A2 architecture\n\
23e1d84c 1200-mpower4 generate code for Power4 architecture\n\
b0648eec 1201-mpower5 generate code for Power5 architecture\n\
9622b051 1202-mpower6 generate code for Power6 architecture\n\
9b4e5766 1203-mpower7 generate code for Power7 architecture\n\
ede602d7 1204-mcell generate code for Cell Broadband Engine architecture\n\
252b5132 1205-mcom generate code Power/PowerPC common instructions\n\
df12615d 1206-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1207 fprintf (stream, _("\
df12615d 1208-maltivec generate code for AltiVec\n\
9b4e5766 1209-mvsx generate code for Vector-Scalar (VSX) instructions\n\
36ae0db3 1210-me300 generate code for PowerPC e300 family\n\
6a0c61b7 1211-me500, -me500x2 generate code for Motorola e500 core complex\n\
19a6653c 1212-me500mc, generate code for Freescale e500mc core complex\n\
df12615d
AM		 1213-mspe generate code for Motorola SPE instructions\n\
1214-mregnames Allow symbolic names for registers\n\
1215-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1216#ifdef OBJ_ELF
bc805888 1217 fprintf (stream, _("\
252b5132
RH		 1218-mrelocatable support for GCC's -mrelocatble option\n\
1219-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1220-memb set PPC_EMB bit in ELF flags\n\
df12615d 1221-mlittle, -mlittle-endian, -l, -le\n\
252b5132 1222 generate code for a little endian machine\n\
df12615d
AM		 1223-mbig, -mbig-endian, -b, -be\n\
1224 generate code for a big endian machine\n\
252b5132
RH		 1225-msolaris generate code for Solaris\n\
1226-mno-solaris do not generate code for Solaris\n\
1227-V print assembler version number\n\
1228-Qy, -Qn ignored\n"));
1229#endif
1230}
1231\f
1232/* Set ppc_cpu if it is not already set. */
1233
1234static void
98027b10 1235ppc_set_cpu (void)
252b5132
RH		 1236{
1237 const char *default_os = TARGET_OS;
1238 const char *default_cpu = TARGET_CPU;
1239
3c9030c1 1240 if ((ppc_cpu & ~PPC_OPCODE_ANY) == 0)
252b5132 1241 {
2a98c3a6 1242 if (ppc_obj64)
3c9030c1 1243 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
2a98c3a6
AM		 1244 else if (strncmp (default_os, "aix", 3) == 0
1245 && default_os[3] >= '4' && default_os[3] <= '9')
3c9030c1 1246 ppc_cpu |= PPC_OPCODE_COMMON | PPC_OPCODE_32;
252b5132 1247 else if (strncmp (default_os, "aix3", 4) == 0)
3c9030c1 1248 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
252b5132 1249 else if (strcmp (default_cpu, "rs6000") == 0)
3c9030c1 1250 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
0baf16f2 1251 else if (strncmp (default_cpu, "powerpc", 7) == 0)
23d36e92 1252 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
252b5132 1253 else
99a814a1
AM		 1254 as_fatal (_("Unknown default cpu = %s, os = %s"),
1255 default_cpu, default_os);
252b5132
RH		 1256 }
1257}
1258
9232bbb0
AM		 1259/* Figure out the BFD architecture to use. This function and ppc_mach
1260 are called well before md_begin, when the output file is opened. */
252b5132
RH		 1261
1262enum bfd_architecture
98027b10 1263ppc_arch (void)
252b5132
RH		 1264{
1265 const char *default_cpu = TARGET_CPU;
1266 ppc_set_cpu ();
1267
1268 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1269 return bfd_arch_powerpc;
1270 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1271 return bfd_arch_rs6000;
1272 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1273 {
1274 if (strcmp (default_cpu, "rs6000") == 0)
1275 return bfd_arch_rs6000;
0baf16f2 1276 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1277 return bfd_arch_powerpc;
1278 }
1279
1280 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1281 return bfd_arch_unknown;
1282}
1283
7f6d05e8 1284unsigned long
98027b10 1285ppc_mach (void)
7f6d05e8 1286{
2a98c3a6
AM		 1287 if (ppc_obj64)
1288 return bfd_mach_ppc64;
1289 else if (ppc_arch () == bfd_arch_rs6000)
1290 return bfd_mach_rs6k;
1291 else
1292 return bfd_mach_ppc;
7f6d05e8
CP		 1293}
1294
81d4177b 1295extern char*
98027b10 1296ppc_target_format (void)
7f6d05e8
CP		 1297{
1298#ifdef OBJ_COFF
1299#ifdef TE_PE
99a814a1 1300 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1301#elif TE_POWERMAC
0baf16f2 1302 return "xcoff-powermac";
7f6d05e8 1303#else
eb1e0e80 1304# ifdef TE_AIX5
2b3c4602 1305 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1306# else
2b3c4602 1307 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1308# endif
7f6d05e8 1309#endif
7f6d05e8
CP		 1310#endif
1311#ifdef OBJ_ELF
9d8504b1
PB		 1312# ifdef TE_VXWORKS
1313 return "elf32-powerpc-vxworks";
1314# else
0baf16f2 1315 return (target_big_endian
2b3c4602
AM		 1316 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1317 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
9d8504b1 1318# endif
7f6d05e8
CP		 1319#endif
1320}
1321
69c040df
AM		 1322/* Insert opcodes and macros into hash tables. Called at startup and
1323 for .cpu pseudo. */
252b5132 1324
69c040df
AM		 1325static void
1326ppc_setup_opcodes (void)
252b5132 1327{
98027b10 1328 const struct powerpc_opcode *op;
252b5132
RH		 1329 const struct powerpc_opcode *op_end;
1330 const struct powerpc_macro *macro;
1331 const struct powerpc_macro *macro_end;
b84bf58a 1332 bfd_boolean bad_insn = FALSE;
252b5132 1333
69c040df
AM		 1334 if (ppc_hash != NULL)
1335 hash_die (ppc_hash);
1336 if (ppc_macro_hash != NULL)
1337 hash_die (ppc_macro_hash);
252b5132
RH		 1338
1339 /* Insert the opcodes into a hash table. */
1340 ppc_hash = hash_new ();
1341
c43a438d 1342 if (ENABLE_CHECKING)
b84bf58a 1343 {
c43a438d 1344 unsigned int i;
b84bf58a 1345
c43a438d
AM		 1346 /* Check operand masks. Code here and in the disassembler assumes
1347 all the 1's in the mask are contiguous. */
1348 for (i = 0; i < num_powerpc_operands; ++i)
b84bf58a 1349 {
c43a438d
AM		 1350 unsigned long mask = powerpc_operands[i].bitm;
1351 unsigned long right_bit;
1352 unsigned int j;
1353
1354 right_bit = mask & -mask;
1355 mask += right_bit;
1356 right_bit = mask & -mask;
1357 if (mask != right_bit)
1358 {
1359 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1360 bad_insn = TRUE;
1361 }
1362 for (j = i + 1; j < num_powerpc_operands; ++j)
1363 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1364 sizeof (powerpc_operands[0])) == 0)
1365 {
1366 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1367 j, i);
1368 bad_insn = TRUE;
1369 }
b84bf58a
AM		 1370 }
1371 }
1372
252b5132
RH		 1373 op_end = powerpc_opcodes + powerpc_num_opcodes;
1374 for (op = powerpc_opcodes; op < op_end; op++)
1375 {
c43a438d 1376 if (ENABLE_CHECKING)
b84bf58a 1377 {
c43a438d
AM		 1378 const unsigned char *o;
1379 unsigned long omask = op->mask;
8dbcd839 1380
d815f1a9 1381 if (op != powerpc_opcodes)
8dbcd839 1382 {
d815f1a9
AM		 1383 /* The major opcodes had better be sorted. Code in the
1384 disassembler assumes the insns are sorted according to
1385 major opcode. */
1386 if (PPC_OP (op[0].opcode) < PPC_OP (op[-1].opcode))
1387 {
1388 as_bad (_("major opcode is not sorted for %s"),
1389 op->name);
1390 bad_insn = TRUE;
1391 }
1392
1393 /* Warn if the table isn't more strictly ordered.
1394 Unfortunately it doesn't seem possible to order the
1395 table on much more than the major opcode, which makes
1396 it difficult to implement a binary search in the
1397 disassembler. The problem is that we have multiple
1398 ways to disassemble instructions, and we usually want
1399 to choose a more specific form (with more bits set in
1400 the opcode) than a more general form. eg. all of the
1401 following are equivalent:
1402 bne label # opcode = 0x40820000, mask = 0xff830003
1403 bf 2,label # opcode = 0x40800000, mask = 0xff800003
1404 bc 4,2,label # opcode = 0x40000000, mask = 0xfc000003
1405
1406 There are also cases where the table needs to be out
1407 of order to disassemble the correct instruction for
2f3bb96a 1408 processor variants. */
d815f1a9
AM		 1409 else if (0)
1410 {
1411 unsigned long t1 = op[0].opcode;
1412 unsigned long t2 = op[-1].opcode;
1413
1414 if (((t1 ^ t2) & 0xfc0007ff) == 0
1415 && (t1 & 0xfc0006df) == 0x7c000286)
1416 {
1417 /* spr field is split. */
1418 t1 = ((t1 & ~0x1ff800)
1419 | ((t1 & 0xf800) << 5) | ((t1 & 0x1f0000) >> 5));
1420 t2 = ((t2 & ~0x1ff800)
1421 | ((t2 & 0xf800) << 5) | ((t2 & 0x1f0000) >> 5));
1422 }
1423 if (t1 < t2)
1424 as_warn (_("%s (%08lx %08lx) after %s (%08lx %08lx)"),
1425 op[0].name, op[0].opcode, op[0].mask,
1426 op[-1].name, op[-1].opcode, op[-1].mask);
1427 }
8dbcd839 1428 }
c43a438d
AM		 1429
1430 /* The mask had better not trim off opcode bits. */
1431 if ((op->opcode & omask) != op->opcode)
1432 {
1433 as_bad (_("mask trims opcode bits for %s"),
1434 op->name);
1435 bad_insn = TRUE;
1436 }
1437
1438 /* The operands must not overlap the opcode or each other. */
1439 for (o = op->operands; *o; ++o)
1440 if (*o >= num_powerpc_operands)
1441 {
1442 as_bad (_("operand index error for %s"),
1443 op->name);
1444 bad_insn = TRUE;
1445 }
1446 else
b84bf58a 1447 {
c43a438d
AM		 1448 const struct powerpc_operand *operand = &powerpc_operands[*o];
1449 if (operand->shift >= 0)
b84bf58a 1450 {
c43a438d
AM		 1451 unsigned long mask = operand->bitm << operand->shift;
1452 if (omask & mask)
1453 {
1454 as_bad (_("operand %d overlap in %s"),
1455 (int) (o - op->operands), op->name);
1456 bad_insn = TRUE;
1457 }
1458 omask |= mask;
b84bf58a 1459 }
b84bf58a 1460 }
c43a438d 1461 }
252b5132 1462
2b3c4602 1463 if ((op->flags & ppc_cpu & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) != 0
252b5132 1464 && ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == 0
2b3c4602
AM		 1465 || ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64))
1466 == (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64)))
23e1d84c 1467 || (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0)
1cb0a767 1468 && !(ppc_cpu & op->deprecated))
252b5132
RH		 1469 {
1470 const char *retval;
1471
98027b10 1472 retval = hash_insert (ppc_hash, op->name, (void *) op);
69c040df 1473 if (retval != NULL)
252b5132 1474 {
99a814a1 1475 /* Ignore Power duplicates for -m601. */
252b5132
RH		 1476 if ((ppc_cpu & PPC_OPCODE_601) != 0
1477 && (op->flags & PPC_OPCODE_POWER) != 0)
1478 continue;
1479
b84bf58a 1480 as_bad (_("duplicate instruction %s"),
99a814a1 1481 op->name);
b84bf58a 1482 bad_insn = TRUE;
252b5132
RH		 1483 }
1484 }
1485 }
1486
3c9030c1
AM		 1487 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1488 for (op = powerpc_opcodes; op < op_end; op++)
98027b10 1489 hash_insert (ppc_hash, op->name, (void *) op);
3c9030c1 1490
252b5132
RH		 1491 /* Insert the macros into a hash table. */
1492 ppc_macro_hash = hash_new ();
1493
1494 macro_end = powerpc_macros + powerpc_num_macros;
1495 for (macro = powerpc_macros; macro < macro_end; macro++)
1496 {
1497 if ((macro->flags & ppc_cpu) != 0)
1498 {
1499 const char *retval;
1500
98027b10 1501 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
252b5132
RH		 1502 if (retval != (const char *) NULL)
1503 {
b84bf58a
AM		 1504 as_bad (_("duplicate macro %s"), macro->name);
1505 bad_insn = TRUE;
252b5132
RH		 1506 }
1507 }
1508 }
1509
b84bf58a 1510 if (bad_insn)
252b5132 1511 abort ();
69c040df
AM		 1512}
1513
1514/* This function is called when the assembler starts up. It is called
1515 after the options have been parsed and the output file has been
1516 opened. */
1517
1518void
98027b10 1519md_begin (void)
69c040df
AM		 1520{
1521 ppc_set_cpu ();
1522
1523 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1524
1525#ifdef OBJ_ELF
1526 /* Set the ELF flags if desired. */
1527 if (ppc_flags && !msolaris)
1528 bfd_set_private_flags (stdoutput, ppc_flags);
1529#endif
1530
1531 ppc_setup_opcodes ();
252b5132 1532
67c1ffbe 1533 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1534 by the user. */
252b5132
RH		 1535 if (!set_target_endian)
1536 {
1537 set_target_endian = 1;
1538 target_big_endian = PPC_BIG_ENDIAN;
1539 }
1540
1541#ifdef OBJ_XCOFF
1542 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1543
1544 /* Create dummy symbols to serve as initial csects. This forces the
1545 text csects to precede the data csects. These symbols will not
1546 be output. */
1547 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1548 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1549 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1550 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1551#endif
1552
1553#ifdef TE_PE
1554
1555 ppc_current_section = text_section;
81d4177b 1556 ppc_previous_section = 0;
252b5132
RH		 1557
1558#endif
1559}
1560
6a0c61b7 1561void
98027b10 1562ppc_cleanup (void)
6a0c61b7 1563{
dc1d03fc 1564#ifdef OBJ_ELF
6a0c61b7
EZ		 1565 if (ppc_apuinfo_list == NULL)
1566 return;
1567
1568 /* Ok, so write the section info out. We have this layout:
1569
1570 byte data what
1571 ---- ---- ----
1572 0 8 length of "APUinfo\0"
1573 4 (n*4) number of APU's (4 bytes each)
1574 8 2 note type 2
1575 12 "APUinfo\0" name
1576 20 APU#1 first APU's info
1577 24 APU#2 second APU's info
1578 ... ...
1579 */
1580 {
1581 char *p;
1582 asection *seg = now_seg;
1583 subsegT subseg = now_subseg;
1584 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1585 unsigned int i;
6a0c61b7
EZ		 1586
1587 /* Create the .PPC.EMB.apuinfo section. */
1588 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1589 bfd_set_section_flags (stdoutput,
1590 apuinfo_secp,
e1a9cb8e 1591 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1592
1593 p = frag_more (4);
1594 md_number_to_chars (p, (valueT) 8, 4);
1595
1596 p = frag_more (4);
e98d298c 1597 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1598
1599 p = frag_more (4);
1600 md_number_to_chars (p, (valueT) 2, 4);
1601
1602 p = frag_more (8);
1603 strcpy (p, "APUinfo");
1604
1605 for (i = 0; i < ppc_apuinfo_num; i++)
1606 {
b34976b6
AM		 1607 p = frag_more (4);
1608 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1609 }
1610
1611 frag_align (2, 0, 0);
1612
1613 /* We probably can't restore the current segment, for there likely
1614 isn't one yet... */
1615 if (seg && subseg)
1616 subseg_set (seg, subseg);
1617 }
dc1d03fc 1618#endif
6a0c61b7
EZ		 1619}
1620
252b5132
RH		 1621/* Insert an operand value into an instruction. */
1622
1623static unsigned long
a1867a27
AM		 1624ppc_insert_operand (unsigned long insn,
1625 const struct powerpc_operand *operand,
1626 offsetT val,
91d6fa6a 1627 ppc_cpu_t cpu,
a1867a27
AM		 1628 char *file,
1629 unsigned int line)
252b5132 1630{
b84bf58a 1631 long min, max, right;
eb42fac1 1632
b84bf58a
AM		 1633 max = operand->bitm;
1634 right = max & -max;
1635 min = 0;
1636
1637 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
252b5132 1638 {
b84bf58a 1639 if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0)
931774a9
AM		 1640 max = (max >> 1) & -right;
1641 min = ~max & -right;
b84bf58a 1642 }
252b5132 1643
b84bf58a 1644 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
3896c469 1645 max++;
252b5132 1646
b84bf58a 1647 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
a1867a27
AM		 1648 {
1649 long tmp = min;
1650 min = -max;
1651 max = -tmp;
1652 }
b84bf58a 1653
a1867a27
AM		 1654 if (min <= max)
1655 {
1656 /* Some people write constants with the sign extension done by
1657 hand but only up to 32 bits. This shouldn't really be valid,
1658 but, to permit this code to assemble on a 64-bit host, we
1659 sign extend the 32-bit value to 64 bits if so doing makes the
1660 value valid. */
1661 if (val > max
1662 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1663 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1664 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1665 val = val - 0x80000000 - 0x80000000;
1666
1667 /* Similarly, people write expressions like ~(1<<15), and expect
1668 this to be OK for a 32-bit unsigned value. */
1669 else if (val < min
1670 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1671 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1672 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1673 val = val + 0x80000000 + 0x80000000;
1674
1675 else if (val < min
1676 || val > max
1677 || (val & (right - 1)) != 0)
1678 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1679 }
b84bf58a 1680
252b5132
RH		 1681 if (operand->insert)
1682 {
1683 const char *errmsg;
1684
1685 errmsg = NULL;
91d6fa6a 1686 insn = (*operand->insert) (insn, (long) val, cpu, &errmsg);
252b5132 1687 if (errmsg != (const char *) NULL)
ee2c9aa9 1688 as_bad_where (file, line, "%s", errmsg);
252b5132
RH		 1689 }
1690 else
b84bf58a 1691 insn |= ((long) val & operand->bitm) << operand->shift;
252b5132
RH		 1692
1693 return insn;
1694}
1695
1696\f
1697#ifdef OBJ_ELF
1698/* Parse @got, etc. and return the desired relocation. */
1699static bfd_reloc_code_real_type
98027b10 1700ppc_elf_suffix (char **str_p, expressionS *exp_p)
252b5132
RH		 1701{
1702 struct map_bfd {
1703 char *string;
b7d7dc63
AM		 1704 unsigned int length : 8;
1705 unsigned int valid32 : 1;
1706 unsigned int valid64 : 1;
1707 unsigned int reloc;
252b5132
RH		 1708 };
1709
1710 char ident[20];
1711 char *str = *str_p;
1712 char *str2;
1713 int ch;
1714 int len;
15c1449b 1715 const struct map_bfd *ptr;
252b5132 1716
b7d7dc63
AM		 1717#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1718#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1719#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1720
15c1449b 1721 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1722 MAP ("l", BFD_RELOC_LO16),
1723 MAP ("h", BFD_RELOC_HI16),
1724 MAP ("ha", BFD_RELOC_HI16_S),
1725 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1726 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1727 MAP ("got", BFD_RELOC_16_GOTOFF),
1728 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1729 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1730 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1731 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1732 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1733 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1734 MAP ("copy", BFD_RELOC_PPC_COPY),
1735 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1736 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1737 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1738 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1739 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1740 MAP ("tls", BFD_RELOC_PPC_TLS),
1741 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1742 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1743 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1744 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1745 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1746 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1747 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1748 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1749 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1750 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1751 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1752 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1753 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1754 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1755 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1756 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1757 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1758 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1759 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1760 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1761 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1762 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1763 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1764 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1765 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1766 MAP32 ("fixup", BFD_RELOC_CTOR),
1767 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1768 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1769 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1770 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1771 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1772 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1773 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1774 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1775 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1776 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1777 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1778 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1779 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1780 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1781 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1782 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1783 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1784 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1785 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1786 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1787 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1788 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1789 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1790 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1791 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1792 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1793 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1794 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1795 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1796 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1797 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1798 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1799 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1800 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1801 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1802 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1803 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1804 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1805 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1806 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1807 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
252b5132
RH		 1808 };
1809
1810 if (*str++ != '@')
1811 return BFD_RELOC_UNUSED;
1812
1813 for (ch = *str, str2 = ident;
1814 (str2 < ident + sizeof (ident) - 1
3882b010 1815 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1816 ch = *++str)
1817 {
3882b010 1818 *str2++ = TOLOWER (ch);
252b5132
RH		 1819 }
1820
1821 *str2 = '\0';
1822 len = str2 - ident;
1823
1824 ch = ident[0];
1825 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1826 if (ch == ptr->string[0]
1827 && len == ptr->length
b7d7dc63
AM		 1828 && memcmp (ident, ptr->string, ptr->length) == 0
1829 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 1830 {
15c1449b
AM		 1831 int reloc = ptr->reloc;
1832
727fc41e
AM		 1833 if (!ppc_obj64 && exp_p->X_add_number != 0)
1834 {
1835 switch (reloc)
1836 {
1837 case BFD_RELOC_16_GOTOFF:
1838 case BFD_RELOC_LO16_GOTOFF:
1839 case BFD_RELOC_HI16_GOTOFF:
1840 case BFD_RELOC_HI16_S_GOTOFF:
1841 as_warn (_("identifier+constant@got means "
1842 "identifier@got+constant"));
1843 break;
1844
1845 case BFD_RELOC_PPC_GOT_TLSGD16:
1846 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
1847 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
1848 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
1849 case BFD_RELOC_PPC_GOT_TLSLD16:
1850 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
1851 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
1852 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
1853 case BFD_RELOC_PPC_GOT_DTPREL16:
1854 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
1855 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
1856 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
1857 case BFD_RELOC_PPC_GOT_TPREL16:
1858 case BFD_RELOC_PPC_GOT_TPREL16_LO:
1859 case BFD_RELOC_PPC_GOT_TPREL16_HI:
1860 case BFD_RELOC_PPC_GOT_TPREL16_HA:
1861 as_bad (_("symbol+offset not supported for got tls"));
1862 break;
1863 }
1864 }
5f6db75a
AM		 1865
1866 /* Now check for identifier@suffix+constant. */
1867 if (*str == '-' || *str == '+')
252b5132 1868 {
5f6db75a
AM		 1869 char *orig_line = input_line_pointer;
1870 expressionS new_exp;
1871
1872 input_line_pointer = str;
1873 expression (&new_exp);
1874 if (new_exp.X_op == O_constant)
252b5132 1875 {
5f6db75a
AM		 1876 exp_p->X_add_number += new_exp.X_add_number;
1877 str = input_line_pointer;
252b5132 1878 }
5f6db75a
AM		 1879
1880 if (&input_line_pointer != str_p)
1881 input_line_pointer = orig_line;
252b5132 1882 }
252b5132 1883 *str_p = str;
0baf16f2 1884
2b3c4602 1885 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 1886 && exp_p->X_op == O_symbol
1887 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 1888 {
9f2b53d7
AM		 1889 /* Change the symbol so that the dummy .TOC. symbol can be
1890 omitted from the object file. */
0baf16f2
AM		 1891 exp_p->X_add_symbol = &abs_symbol;
1892 }
1893
15c1449b 1894 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 1895 }
1896
1897 return BFD_RELOC_UNUSED;
1898}
1899
99a814a1
AM		 1900/* Like normal .long/.short/.word, except support @got, etc.
1901 Clobbers input_line_pointer, checks end-of-line. */
252b5132 1902static void
98027b10 1903ppc_elf_cons (int nbytes /* 1=.byte, 2=.word, 4=.long, 8=.llong */)
252b5132
RH		 1904{
1905 expressionS exp;
1906 bfd_reloc_code_real_type reloc;
1907
1908 if (is_it_end_of_statement ())
1909 {
1910 demand_empty_rest_of_line ();
1911 return;
1912 }
1913
1914 do
1915 {
1916 expression (&exp);
1917 if (exp.X_op == O_symbol
1918 && *input_line_pointer == '@'
99a814a1
AM		 1919 && (reloc = ppc_elf_suffix (&input_line_pointer,
1920 &exp)) != BFD_RELOC_UNUSED)
252b5132 1921 {
99a814a1
AM		 1922 reloc_howto_type *reloc_howto;
1923 int size;
1924
1925 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1926 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH		 1927
1928 if (size > nbytes)
0baf16f2
AM		 1929 {
1930 as_bad (_("%s relocations do not fit in %d bytes\n"),
1931 reloc_howto->name, nbytes);
1932 }
252b5132
RH		 1933 else
1934 {
0baf16f2
AM		 1935 char *p;
1936 int offset;
252b5132 1937
0baf16f2
AM		 1938 p = frag_more (nbytes);
1939 offset = 0;
1940 if (target_big_endian)
1941 offset = nbytes - size;
99a814a1
AM		 1942 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1943 &exp, 0, reloc);
252b5132
RH		 1944 }
1945 }
1946 else
1947 emit_expr (&exp, (unsigned int) nbytes);
1948 }
1949 while (*input_line_pointer++ == ',');
1950
99a814a1
AM		 1951 /* Put terminator back into stream. */
1952 input_line_pointer--;
252b5132
RH		 1953 demand_empty_rest_of_line ();
1954}
1955
1956/* Solaris pseduo op to change to the .rodata section. */
1957static void
98027b10 1958ppc_elf_rdata (int xxx)
252b5132
RH		 1959{
1960 char *save_line = input_line_pointer;
1961 static char section[] = ".rodata\n";
1962
99a814a1 1963 /* Just pretend this is .section .rodata */
252b5132
RH		 1964 input_line_pointer = section;
1965 obj_elf_section (xxx);
1966
1967 input_line_pointer = save_line;
1968}
1969
99a814a1 1970/* Pseudo op to make file scope bss items. */
252b5132 1971static void
98027b10 1972ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
252b5132 1973{
98027b10
AM		 1974 char *name;
1975 char c;
1976 char *p;
252b5132 1977 offsetT size;
98027b10 1978 symbolS *symbolP;
252b5132
RH		 1979 offsetT align;
1980 segT old_sec;
1981 int old_subsec;
1982 char *pfrag;
1983 int align2;
1984
1985 name = input_line_pointer;
1986 c = get_symbol_end ();
1987
99a814a1 1988 /* just after name is now '\0'. */
252b5132
RH		 1989 p = input_line_pointer;
1990 *p = c;
1991 SKIP_WHITESPACE ();
1992 if (*input_line_pointer != ',')
1993 {
1994 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
1995 ignore_rest_of_line ();
1996 return;
1997 }
1998
1999 input_line_pointer++; /* skip ',' */
2000 if ((size = get_absolute_expression ()) < 0)
2001 {
2002 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
2003 ignore_rest_of_line ();
2004 return;
2005 }
2006
2007 /* The third argument to .lcomm is the alignment. */
2008 if (*input_line_pointer != ',')
2009 align = 8;
2010 else
2011 {
2012 ++input_line_pointer;
2013 align = get_absolute_expression ();
2014 if (align <= 0)
2015 {
2016 as_warn (_("ignoring bad alignment"));
2017 align = 8;
2018 }
2019 }
2020
2021 *p = 0;
2022 symbolP = symbol_find_or_make (name);
2023 *p = c;
2024
2025 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
2026 {
2027 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
2028 S_GET_NAME (symbolP));
2029 ignore_rest_of_line ();
2030 return;
2031 }
2032
2033 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
2034 {
2035 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2036 S_GET_NAME (symbolP),
2037 (long) S_GET_VALUE (symbolP),
2038 (long) size);
2039
2040 ignore_rest_of_line ();
2041 return;
2042 }
2043
99a814a1 2044 /* Allocate_bss. */
252b5132
RH		 2045 old_sec = now_seg;
2046 old_subsec = now_subseg;
2047 if (align)
2048 {
99a814a1 2049 /* Convert to a power of 2 alignment. */
252b5132
RH		 2050 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
2051 if (align != 1)
2052 {
2053 as_bad (_("Common alignment not a power of 2"));
2054 ignore_rest_of_line ();
2055 return;
2056 }
2057 }
2058 else
2059 align2 = 0;
2060
2061 record_alignment (bss_section, align2);
2062 subseg_set (bss_section, 0);
2063 if (align2)
2064 frag_align (align2, 0, 0);
2065 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 2066 symbol_get_frag (symbolP)->fr_symbol = 0;
2067 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 2068 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
2069 (char *) 0);
2070 *pfrag = 0;
2071 S_SET_SIZE (symbolP, size);
2072 S_SET_SEGMENT (symbolP, bss_section);
2073 subseg_set (old_sec, old_subsec);
2074 demand_empty_rest_of_line ();
2075}
2076
2077/* Validate any relocations emitted for -mrelocatable, possibly adding
2078 fixups for word relocations in writable segments, so we can adjust
2079 them at runtime. */
2080static void
98027b10 2081ppc_elf_validate_fix (fixS *fixp, segT seg)
252b5132
RH		 2082{
2083 if (fixp->fx_done || fixp->fx_pcrel)
2084 return;
2085
2086 switch (shlib)
2087 {
2088 case SHLIB_NONE:
2089 case SHLIB_PIC:
2090 return;
2091
5d6f4f16 2092 case SHLIB_MRELOCATABLE:
252b5132
RH		 2093 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
2094 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
2095 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2096 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2097 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 2098 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 2099 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2100 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2101 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 2102 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 2103 && strcmp (segment_name (seg), ".got2") != 0
2104 && strcmp (segment_name (seg), ".dtors") != 0
2105 && strcmp (segment_name (seg), ".ctors") != 0
2106 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 2107 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2108 && strcmp (segment_name (seg), ".eh_frame") != 0
2109 && strcmp (segment_name (seg), ".ex_shared") != 0)
2110 {
2111 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2112 || fixp->fx_r_type != BFD_RELOC_CTOR)
2113 {
2114 as_bad_where (fixp->fx_file, fixp->fx_line,
2115 _("Relocation cannot be done when using -mrelocatable"));
2116 }
2117 }
2118 return;
2119 }
2120}
0baf16f2 2121
7e8d4ab4
AM		 2122/* Prevent elf_frob_file_before_adjust removing a weak undefined
2123 function descriptor sym if the corresponding code sym is used. */
2124
2125void
98027b10 2126ppc_frob_file_before_adjust (void)
0baf16f2 2127{
7e8d4ab4 2128 symbolS *symp;
9232bbb0 2129 asection *toc;
0baf16f2 2130
7e8d4ab4
AM		 2131 if (!ppc_obj64)
2132 return;
2133
2134 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 2135 {
7e8d4ab4
AM		 2136 const char *name;
2137 char *dotname;
2138 symbolS *dotsym;
2139 size_t len;
2140
2141 name = S_GET_NAME (symp);
2142 if (name[0] == '.')
2143 continue;
2144
2145 if (! S_IS_WEAK (symp)
2146 || S_IS_DEFINED (symp))
2147 continue;
2148
2149 len = strlen (name) + 1;
2150 dotname = xmalloc (len + 1);
2151 dotname[0] = '.';
2152 memcpy (dotname + 1, name, len);
461b725f 2153 dotsym = symbol_find_noref (dotname, 1);
7e8d4ab4
AM		 2154 free (dotname);
2155 if (dotsym != NULL && (symbol_used_p (dotsym)
2156 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 2157 symbol_mark_used (symp);
2158
0baf16f2
AM		 2159 }
2160
9232bbb0
AM		 2161 toc = bfd_get_section_by_name (stdoutput, ".toc");
2162 if (toc != NULL
2163 && bfd_section_size (stdoutput, toc) > 0x10000)
2164 as_warn (_("TOC section size exceeds 64k"));
2165
7e8d4ab4
AM		 2166 /* Don't emit .TOC. symbol. */
2167 symp = symbol_find (".TOC.");
2168 if (symp != NULL)
2169 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
0baf16f2 2170}
252b5132
RH		 2171#endif /* OBJ_ELF */
2172\f
2173#ifdef TE_PE
2174
2175/*
99a814a1 2176 * Summary of parse_toc_entry.
252b5132
RH		 2177 *
2178 * in: Input_line_pointer points to the '[' in one of:
2179 *
2180 * [toc] [tocv] [toc32] [toc64]
2181 *
2182 * Anything else is an error of one kind or another.
2183 *
81d4177b 2184 * out:
252b5132
RH		 2185 * return value: success or failure
2186 * toc_kind: kind of toc reference
2187 * input_line_pointer:
2188 * success: first char after the ']'
2189 * failure: unchanged
2190 *
2191 * settings:
2192 *
2193 * [toc] - rv == success, toc_kind = default_toc
2194 * [tocv] - rv == success, toc_kind = data_in_toc
2195 * [toc32] - rv == success, toc_kind = must_be_32
2196 * [toc64] - rv == success, toc_kind = must_be_64
2197 *
2198 */
2199
81d4177b
KH		 2200enum toc_size_qualifier
2201{
252b5132
RH		 2202 default_toc, /* The toc cell constructed should be the system default size */
2203 data_in_toc, /* This is a direct reference to a toc cell */
2204 must_be_32, /* The toc cell constructed must be 32 bits wide */
2205 must_be_64 /* The toc cell constructed must be 64 bits wide */
2206};
2207
2208static int
98027b10 2209parse_toc_entry (enum toc_size_qualifier *toc_kind)
252b5132
RH		 2210{
2211 char *start;
2212 char *toc_spec;
2213 char c;
2214 enum toc_size_qualifier t;
2215
99a814a1 2216 /* Save the input_line_pointer. */
252b5132
RH		 2217 start = input_line_pointer;
2218
99a814a1 2219 /* Skip over the '[' , and whitespace. */
252b5132
RH		 2220 ++input_line_pointer;
2221 SKIP_WHITESPACE ();
81d4177b 2222
99a814a1 2223 /* Find the spelling of the operand. */
252b5132
RH		 2224 toc_spec = input_line_pointer;
2225 c = get_symbol_end ();
2226
99a814a1 2227 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 2228 {
2229 t = default_toc;
2230 }
99a814a1 2231 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 2232 {
2233 t = data_in_toc;
2234 }
99a814a1 2235 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2236 {
2237 t = must_be_32;
2238 }
99a814a1 2239 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2240 {
2241 t = must_be_64;
2242 }
2243 else
2244 {
2245 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2246 *input_line_pointer = c;
2247 input_line_pointer = start;
252b5132
RH		 2248 return 0;
2249 }
2250
99a814a1
AM		 2251 /* Now find the ']'. */
2252 *input_line_pointer = c;
252b5132 2253
81d4177b
KH		 2254 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2255 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2256
2257 if (c != ']')
2258 {
2259 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2260 input_line_pointer = start;
252b5132
RH		 2261 return 0;
2262 }
2263
99a814a1 2264 *toc_kind = t;
252b5132
RH		 2265 return 1;
2266}
2267#endif
2268\f
2269
dc1d03fc 2270#ifdef OBJ_ELF
6a0c61b7
EZ		 2271#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2272static void
98027b10 2273ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
6a0c61b7
EZ		 2274{
2275 unsigned int i;
2276
2277 /* Check we don't already exist. */
2278 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2279 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2280 return;
b34976b6 2281
6a0c61b7
EZ		 2282 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2283 {
2284 if (ppc_apuinfo_num_alloc == 0)
2285 {
2286 ppc_apuinfo_num_alloc = 4;
2287 ppc_apuinfo_list = (unsigned long *)
2288 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2289 }
2290 else
2291 {
2292 ppc_apuinfo_num_alloc += 4;
2293 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2294 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2295 }
2296 }
dc1d03fc 2297 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2298}
2299#undef APUID
dc1d03fc 2300#endif
6a0c61b7
EZ		 2301\f
2302
252b5132
RH		 2303/* We need to keep a list of fixups. We can't simply generate them as
2304 we go, because that would require us to first create the frag, and
2305 that would screw up references to ``.''. */
2306
2307struct ppc_fixup
2308{
2309 expressionS exp;
2310 int opindex;
2311 bfd_reloc_code_real_type reloc;
2312};
2313
2314#define MAX_INSN_FIXUPS (5)
2315
2316/* This routine is called for each instruction to be assembled. */
2317
2318void
98027b10 2319md_assemble (char *str)
252b5132
RH		 2320{
2321 char *s;
2322 const struct powerpc_opcode *opcode;
2323 unsigned long insn;
2324 const unsigned char *opindex_ptr;
2325 int skip_optional;
2326 int need_paren;
2327 int next_opindex;
2328 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2329 int fc;
2330 char *f;
09b935ac 2331 int addr_mod;
252b5132
RH		 2332 int i;
2333#ifdef OBJ_ELF
2334 bfd_reloc_code_real_type reloc;
2335#endif
2336
2337 /* Get the opcode. */
3882b010 2338 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2339 ;
2340 if (*s != '\0')
2341 *s++ = '\0';
2342
2343 /* Look up the opcode in the hash table. */
2344 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2345 if (opcode == (const struct powerpc_opcode *) NULL)
2346 {
2347 const struct powerpc_macro *macro;
2348
2349 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2350 if (macro == (const struct powerpc_macro *) NULL)
2351 as_bad (_("Unrecognized opcode: `%s'"), str);
2352 else
2353 ppc_macro (s, macro);
2354
2355 return;
2356 }
2357
2358 insn = opcode->opcode;
2359
2360 str = s;
3882b010 2361 while (ISSPACE (*str))
252b5132
RH		 2362 ++str;
2363
2364 /* PowerPC operands are just expressions. The only real issue is
2365 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2366 an optional operand separate the operands only with commas (in some
2367 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2368 have optional operands). Most instructions with optional operands
2369 have only one. Those that have more than one optional operand can
2370 take either all their operands or none. So, before we start seriously
2371 parsing the operands, we check to see if we have optional operands,
2372 and if we do, we count the number of commas to see which operands
2373 have been omitted. */
252b5132
RH		 2374 skip_optional = 0;
2375 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2376 {
2377 const struct powerpc_operand *operand;
2378
2379 operand = &powerpc_operands[*opindex_ptr];
2380 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2381 {
2382 unsigned int opcount;
7fe9cf6b 2383 unsigned int num_operands_expected;
252b5132
RH		 2384
2385 /* There is an optional operand. Count the number of
2386 commas in the input line. */
2387 if (*str == '\0')
2388 opcount = 0;
2389 else
2390 {
2391 opcount = 1;
2392 s = str;
2393 while ((s = strchr (s, ',')) != (char *) NULL)
2394 {
2395 ++opcount;
2396 ++s;
2397 }
2398 }
2399
7fe9cf6b
NC		 2400 /* Compute the number of expected operands.
2401 Do not count fake operands. */
2402 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2403 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2404 ++ num_operands_expected;
2405
252b5132
RH		 2406 /* If there are fewer operands in the line then are called
2407 for by the instruction, we want to skip the optional
1f6c9eb0 2408 operands. */
7fe9cf6b 2409 if (opcount < num_operands_expected)
252b5132
RH		 2410 skip_optional = 1;
2411
2412 break;
2413 }
2414 }
2415
2416 /* Gather the operands. */
2417 need_paren = 0;
2418 next_opindex = 0;
2419 fc = 0;
2420 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2421 {
2422 const struct powerpc_operand *operand;
2423 const char *errmsg;
2424 char *hold;
2425 expressionS ex;
2426 char endc;
2427
2428 if (next_opindex == 0)
2429 operand = &powerpc_operands[*opindex_ptr];
2430 else
2431 {
2432 operand = &powerpc_operands[next_opindex];
2433 next_opindex = 0;
2434 }
252b5132
RH		 2435 errmsg = NULL;
2436
2437 /* If this is a fake operand, then we do not expect anything
2438 from the input. */
2439 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2440 {
2b3c4602 2441 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2442 if (errmsg != (const char *) NULL)
ee2c9aa9 2443 as_bad ("%s", errmsg);
252b5132
RH		 2444 continue;
2445 }
2446
2447 /* If this is an optional operand, and we are skipping it, just
2448 insert a zero. */
2449 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2450 && skip_optional)
2451 {
2452 if (operand->insert)
2453 {
2b3c4602 2454 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2455 if (errmsg != (const char *) NULL)
ee2c9aa9 2456 as_bad ("%s", errmsg);
252b5132
RH		 2457 }
2458 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2459 next_opindex = *opindex_ptr + 1;
2460 continue;
2461 }
2462
2463 /* Gather the operand. */
2464 hold = input_line_pointer;
2465 input_line_pointer = str;
2466
2467#ifdef TE_PE
81d4177b 2468 if (*input_line_pointer == '[')
252b5132
RH		 2469 {
2470 /* We are expecting something like the second argument here:
99a814a1
AM		 2471 *
2472 * lwz r4,[toc].GS.0.static_int(rtoc)
2473 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2474 * The argument following the `]' must be a symbol name, and the
2475 * register must be the toc register: 'rtoc' or '2'
2476 *
2477 * The effect is to 0 as the displacement field
2478 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2479 * the appropriate variation) reloc against it based on the symbol.
2480 * The linker will build the toc, and insert the resolved toc offset.
2481 *
2482 * Note:
2483 * o The size of the toc entry is currently assumed to be
2484 * 32 bits. This should not be assumed to be a hard coded
2485 * number.
2486 * o In an effort to cope with a change from 32 to 64 bits,
2487 * there are also toc entries that are specified to be
2488 * either 32 or 64 bits:
2489 * lwz r4,[toc32].GS.0.static_int(rtoc)
2490 * lwz r4,[toc64].GS.0.static_int(rtoc)
2491 * These demand toc entries of the specified size, and the
2492 * instruction probably requires it.
2493 */
252b5132
RH		 2494
2495 int valid_toc;
2496 enum toc_size_qualifier toc_kind;
2497 bfd_reloc_code_real_type toc_reloc;
2498
99a814a1
AM		 2499 /* Go parse off the [tocXX] part. */
2500 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2501
81d4177b 2502 if (!valid_toc)
252b5132 2503 {
99a814a1
AM		 2504 /* Note: message has already been issued.
2505 FIXME: what sort of recovery should we do?
2506 demand_rest_of_line (); return; ? */
252b5132
RH		 2507 }
2508
99a814a1
AM		 2509 /* Now get the symbol following the ']'. */
2510 expression (&ex);
252b5132
RH		 2511
2512 switch (toc_kind)
2513 {
2514 case default_toc:
99a814a1
AM		 2515 /* In this case, we may not have seen the symbol yet,
2516 since it is allowed to appear on a .extern or .globl
2517 or just be a label in the .data section. */
252b5132
RH		 2518 toc_reloc = BFD_RELOC_PPC_TOC16;
2519 break;
2520 case data_in_toc:
99a814a1
AM		 2521 /* 1. The symbol must be defined and either in the toc
2522 section, or a global.
2523 2. The reloc generated must have the TOCDEFN flag set
2524 in upper bit mess of the reloc type.
2525 FIXME: It's a little confusing what the tocv
2526 qualifier can be used for. At the very least, I've
2527 seen three uses, only one of which I'm sure I can
2528 explain. */
81d4177b
KH		 2529 if (ex.X_op == O_symbol)
2530 {
9c2799c2 2531 gas_assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2532 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2533 != tocdata_section)
252b5132 2534 {
99a814a1 2535 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2536 }
2537 }
2538
2539 toc_reloc = BFD_RELOC_PPC_TOC16;
2540 break;
2541 case must_be_32:
99a814a1
AM		 2542 /* FIXME: these next two specifically specify 32/64 bit
2543 toc entries. We don't support them today. Is this
2544 the right way to say that? */
252b5132
RH		 2545 toc_reloc = BFD_RELOC_UNUSED;
2546 as_bad (_("Unimplemented toc32 expression modifier"));
2547 break;
2548 case must_be_64:
99a814a1 2549 /* FIXME: see above. */
252b5132
RH		 2550 toc_reloc = BFD_RELOC_UNUSED;
2551 as_bad (_("Unimplemented toc64 expression modifier"));
2552 break;
2553 default:
bc805888 2554 fprintf (stderr,
99a814a1
AM		 2555 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2556 toc_kind);
bc805888 2557 abort ();
252b5132
RH		 2558 break;
2559 }
2560
2561 /* We need to generate a fixup for this expression. */
2562 if (fc >= MAX_INSN_FIXUPS)
2563 as_fatal (_("too many fixups"));
2564
2565 fixups[fc].reloc = toc_reloc;
2566 fixups[fc].exp = ex;
2567 fixups[fc].opindex = *opindex_ptr;
2568 ++fc;
2569
99a814a1
AM		 2570 /* Ok. We've set up the fixup for the instruction. Now make it
2571 look like the constant 0 was found here. */
252b5132
RH		 2572 ex.X_unsigned = 1;
2573 ex.X_op = O_constant;
2574 ex.X_add_number = 0;
2575 ex.X_add_symbol = NULL;
2576 ex.X_op_symbol = NULL;
2577 }
2578
2579 else
2580#endif /* TE_PE */
2581 {
2ad068be
AM		 2582 if ((reg_names_p && (operand->flags & PPC_OPERAND_CR) != 0)
2583 || !register_name (&ex))
252b5132 2584 {
13abbae3
AM		 2585 char save_lex = lex_type['%'];
2586
252b5132 2587 if ((operand->flags & PPC_OPERAND_CR) != 0)
13abbae3
AM		 2588 {
2589 cr_operand = TRUE;
2590 lex_type['%'] |= LEX_BEGIN_NAME;
2591 }
252b5132 2592 expression (&ex);
b34976b6 2593 cr_operand = FALSE;
13abbae3 2594 lex_type['%'] = save_lex;
252b5132
RH		 2595 }
2596 }
2597
2598 str = input_line_pointer;
2599 input_line_pointer = hold;
2600
2601 if (ex.X_op == O_illegal)
2602 as_bad (_("illegal operand"));
2603 else if (ex.X_op == O_absent)
2604 as_bad (_("missing operand"));
2605 else if (ex.X_op == O_register)
2606 {
2607 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2608 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2609 }
2610 else if (ex.X_op == O_constant)
2611 {
2612#ifdef OBJ_ELF
81d4177b 2613 /* Allow @HA, @L, @H on constants. */
252b5132
RH		 2614 char *orig_str = str;
2615
2616 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2617 switch (reloc)
2618 {
2619 default:
2620 str = orig_str;
2621 break;
2622
2623 case BFD_RELOC_LO16:
2624 /* X_unsigned is the default, so if the user has done
0baf16f2
AM		 2625 something which cleared it, we always produce a
2626 signed value. */
2627 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH		 2628 ex.X_add_number &= 0xffff;
2629 else
0baf16f2 2630 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2631 break;
2632
2633 case BFD_RELOC_HI16:
0baf16f2
AM		 2634 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2635 ex.X_add_number = PPC_HI (ex.X_add_number);
2636 else
2637 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH		 2638 break;
2639
2640 case BFD_RELOC_HI16_S:
0baf16f2
AM		 2641 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2642 ex.X_add_number = PPC_HA (ex.X_add_number);
2643 else
2644 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2645 break;
2646
0baf16f2
AM		 2647 case BFD_RELOC_PPC64_HIGHER:
2648 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2649 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2650 else
2651 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2652 break;
2653
2654 case BFD_RELOC_PPC64_HIGHER_S:
2655 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2656 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2657 else
2658 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2659 break;
0baf16f2
AM		 2660
2661 case BFD_RELOC_PPC64_HIGHEST:
2662 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2663 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2664 else
2665 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2666 break;
2667
2668 case BFD_RELOC_PPC64_HIGHEST_S:
2669 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2670 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2671 else
2672 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2673 break;
252b5132 2674 }
0baf16f2 2675#endif /* OBJ_ELF */
252b5132 2676 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2677 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2678 }
2679#ifdef OBJ_ELF
727fc41e 2680 else
252b5132 2681 {
727fc41e 2682 if (ex.X_op == O_symbol && str[0] == '(')
cdba85ec 2683 {
727fc41e
AM		 2684 const char *sym_name = S_GET_NAME (ex.X_add_symbol);
2685 if (sym_name[0] == '.')
2686 ++sym_name;
cdba85ec 2687
727fc41e 2688 if (strcasecmp (sym_name, "__tls_get_addr") == 0)
252b5132 2689 {
727fc41e
AM		 2690 expressionS tls_exp;
2691
2692 hold = input_line_pointer;
2693 input_line_pointer = str + 1;
2694 expression (&tls_exp);
2695 if (tls_exp.X_op == O_symbol)
2696 {
2697 reloc = BFD_RELOC_UNUSED;
2698 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0)
2699 {
2700 reloc = BFD_RELOC_PPC_TLSGD;
2701 input_line_pointer += 7;
2702 }
2703 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0)
2704 {
2705 reloc = BFD_RELOC_PPC_TLSLD;
2706 input_line_pointer += 7;
2707 }
2708 if (reloc != BFD_RELOC_UNUSED)
2709 {
2710 SKIP_WHITESPACE ();
2711 str = input_line_pointer;
2712
2713 if (fc >= MAX_INSN_FIXUPS)
2714 as_fatal (_("too many fixups"));
2715 fixups[fc].exp = tls_exp;
2716 fixups[fc].opindex = *opindex_ptr;
2717 fixups[fc].reloc = reloc;
2718 ++fc;
2719 }
2720 }
2721 input_line_pointer = hold;
252b5132
RH		 2722 }
2723 }
2724
727fc41e 2725 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
0baf16f2 2726 {
727fc41e 2727 /* Some TLS tweaks. */
0baf16f2
AM		 2728 switch (reloc)
2729 {
727fc41e 2730 default:
cdba85ec 2731 break;
727fc41e
AM		 2732
2733 case BFD_RELOC_PPC_TLS:
2d0f3896
AM		 2734 if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0))
2735 as_bad (_("@tls may not be used with \"%s\" operands"),
2736 opcode->name);
2737 else if (operand->shift != 11)
2738 as_bad (_("@tls may only be used in last operand"));
2739 else
2740 insn = ppc_insert_operand (insn, operand,
2741 ppc_obj64 ? 13 : 2,
2742 ppc_cpu, (char *) NULL, 0);
cdba85ec 2743 break;
727fc41e
AM		 2744
2745 /* We'll only use the 32 (or 64) bit form of these relocations
2746 in constants. Instructions get the 16 bit form. */
2747 case BFD_RELOC_PPC_DTPREL:
2748 reloc = BFD_RELOC_PPC_DTPREL16;
cdba85ec 2749 break;
727fc41e
AM		 2750 case BFD_RELOC_PPC_TPREL:
2751 reloc = BFD_RELOC_PPC_TPREL16;
0baf16f2
AM		 2752 break;
2753 }
727fc41e
AM		 2754
2755 /* For the absolute forms of branches, convert the PC
2756 relative form back into the absolute. */
2757 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2758 {
2759 switch (reloc)
2760 {
2761 case BFD_RELOC_PPC_B26:
2762 reloc = BFD_RELOC_PPC_BA26;
2763 break;
2764 case BFD_RELOC_PPC_B16:
2765 reloc = BFD_RELOC_PPC_BA16;
2766 break;
2767 case BFD_RELOC_PPC_B16_BRTAKEN:
2768 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2769 break;
2770 case BFD_RELOC_PPC_B16_BRNTAKEN:
2771 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2772 break;
2773 default:
2774 break;
2775 }
2776 }
2777
2778 if (ppc_obj64
2779 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
2780 {
2781 switch (reloc)
2782 {
2783 case BFD_RELOC_16:
2784 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2785 break;
2786 case BFD_RELOC_LO16:
2787 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2788 break;
2789 case BFD_RELOC_16_GOTOFF:
2790 reloc = BFD_RELOC_PPC64_GOT16_DS;
2791 break;
2792 case BFD_RELOC_LO16_GOTOFF:
2793 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2794 break;
2795 case BFD_RELOC_LO16_PLTOFF:
2796 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2797 break;
2798 case BFD_RELOC_16_BASEREL:
2799 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2800 break;
2801 case BFD_RELOC_LO16_BASEREL:
2802 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2803 break;
2804 case BFD_RELOC_PPC_TOC16:
2805 reloc = BFD_RELOC_PPC64_TOC16_DS;
2806 break;
2807 case BFD_RELOC_PPC64_TOC16_LO:
2808 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2809 break;
2810 case BFD_RELOC_PPC64_PLTGOT16:
2811 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2812 break;
2813 case BFD_RELOC_PPC64_PLTGOT16_LO:
2814 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2815 break;
2816 case BFD_RELOC_PPC_DTPREL16:
2817 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2818 break;
2819 case BFD_RELOC_PPC_DTPREL16_LO:
2820 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2821 break;
2822 case BFD_RELOC_PPC_TPREL16:
2823 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2824 break;
2825 case BFD_RELOC_PPC_TPREL16_LO:
2826 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2827 break;
2828 case BFD_RELOC_PPC_GOT_DTPREL16:
2829 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2830 case BFD_RELOC_PPC_GOT_TPREL16:
2831 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2832 break;
2833 default:
2834 as_bad (_("unsupported relocation for DS offset field"));
2835 break;
2836 }
2837 }
0baf16f2
AM		 2838 }
2839
252b5132
RH		 2840 /* We need to generate a fixup for this expression. */
2841 if (fc >= MAX_INSN_FIXUPS)
2842 as_fatal (_("too many fixups"));
2843 fixups[fc].exp = ex;
727fc41e 2844 fixups[fc].opindex = *opindex_ptr;
252b5132
RH		 2845 fixups[fc].reloc = reloc;
2846 ++fc;
2847 }
727fc41e 2848#else /* OBJ_ELF */
252b5132
RH		 2849 else
2850 {
2851 /* We need to generate a fixup for this expression. */
2852 if (fc >= MAX_INSN_FIXUPS)
2853 as_fatal (_("too many fixups"));
2854 fixups[fc].exp = ex;
2855 fixups[fc].opindex = *opindex_ptr;
2856 fixups[fc].reloc = BFD_RELOC_UNUSED;
2857 ++fc;
2858 }
727fc41e 2859#endif /* OBJ_ELF */
252b5132
RH		 2860
2861 if (need_paren)
2862 {
2863 endc = ')';
2864 need_paren = 0;
c3d65c1c
BE		 2865 /* If expecting more operands, then we want to see "),". */
2866 if (*str == endc && opindex_ptr[1] != 0)
2867 {
2868 do
2869 ++str;
2870 while (ISSPACE (*str));
2871 endc = ',';
2872 }
252b5132
RH		 2873 }
2874 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2875 {
2876 endc = '(';
2877 need_paren = 1;
2878 }
2879 else
2880 endc = ',';
2881
2882 /* The call to expression should have advanced str past any
2883 whitespace. */
2884 if (*str != endc
2885 && (endc != ',' || *str != '\0'))
2886 {
2887 as_bad (_("syntax error; found `%c' but expected `%c'"), *str, endc);
2888 break;
2889 }
2890
2891 if (*str != '\0')
2892 ++str;
2893 }
2894
3882b010 2895 while (ISSPACE (*str))
252b5132
RH		 2896 ++str;
2897
2898 if (*str != '\0')
2899 as_bad (_("junk at end of line: `%s'"), str);
2900
dc1d03fc 2901#ifdef OBJ_ELF
6a0c61b7 2902 /* Do we need/want a APUinfo section? */
ed84b57b 2903 if ((ppc_cpu & PPC_OPCODE_E500MC) != 0)
6a0c61b7
EZ		 2904 {
2905 /* These are all version "1". */
2906 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 2907 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 2908 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 2909 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 2910 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 2911 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 2912 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 2913 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 2914 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 2915 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 2916 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 2917 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 2918 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 2919 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
6a0c61b7 2920 }
dc1d03fc 2921#endif
6a0c61b7 2922
252b5132
RH		 2923 /* Write out the instruction. */
2924 f = frag_more (4);
09b935ac
AM		 2925 addr_mod = frag_now_fix () & 3;
2926 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
2927 as_bad (_("instruction address is not a multiple of 4"));
2928 frag_now->insn_addr = addr_mod;
2929 frag_now->has_code = 1;
252b5132
RH		 2930 md_number_to_chars (f, insn, 4);
2931
5d6f4f16
GK		 2932#ifdef OBJ_ELF
2933 dwarf2_emit_insn (4);
2934#endif
2935
252b5132
RH		 2936 /* Create any fixups. At this point we do not use a
2937 bfd_reloc_code_real_type, but instead just use the
2938 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2939 handle fixups for any operand type, although that is admittedly
2940 not a very exciting feature. We pick a BFD reloc type in
55cf6793 2941 md_apply_fix. */
252b5132
RH		 2942 for (i = 0; i < fc; i++)
2943 {
252b5132
RH		 2944 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2945 {
99a814a1 2946 reloc_howto_type *reloc_howto;
252b5132
RH		 2947 int size;
2948 int offset;
2949 fixS *fixP;
2950
99a814a1 2951 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 2952 if (!reloc_howto)
2953 abort ();
2954
2955 size = bfd_get_reloc_size (reloc_howto);
2956 offset = target_big_endian ? (4 - size) : 0;
2957
2958 if (size < 1 || size > 4)
bc805888 2959 abort ();
252b5132 2960
99a814a1
AM		 2961 fixP = fix_new_exp (frag_now,
2962 f - frag_now->fr_literal + offset,
2963 size,
2964 &fixups[i].exp,
2965 reloc_howto->pc_relative,
252b5132
RH		 2966 fixups[i].reloc);
2967
2968 /* Turn off complaints that the addend is too large for things like
2969 foo+100000@ha. */
2970 switch (fixups[i].reloc)
2971 {
2972 case BFD_RELOC_16_GOTOFF:
2973 case BFD_RELOC_PPC_TOC16:
2974 case BFD_RELOC_LO16:
2975 case BFD_RELOC_HI16:
2976 case BFD_RELOC_HI16_S:
0baf16f2 2977#ifdef OBJ_ELF
0baf16f2
AM		 2978 case BFD_RELOC_PPC64_HIGHER:
2979 case BFD_RELOC_PPC64_HIGHER_S:
2980 case BFD_RELOC_PPC64_HIGHEST:
2981 case BFD_RELOC_PPC64_HIGHEST_S:
0baf16f2 2982#endif
252b5132
RH		 2983 fixP->fx_no_overflow = 1;
2984 break;
2985 default:
2986 break;
2987 }
2988 }
2989 else
727fc41e
AM		 2990 {
2991 const struct powerpc_operand *operand;
2992
2993 operand = &powerpc_operands[fixups[i].opindex];
2994 fix_new_exp (frag_now,
2995 f - frag_now->fr_literal,
2996 4,
2997 &fixups[i].exp,
2998 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
2999 ((bfd_reloc_code_real_type)
3000 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
3001 }
252b5132
RH		 3002 }
3003}
3004
3005/* Handle a macro. Gather all the operands, transform them as
3006 described by the macro, and call md_assemble recursively. All the
3007 operands are separated by commas; we don't accept parentheses
3008 around operands here. */
3009
3010static void
98027b10 3011ppc_macro (char *str, const struct powerpc_macro *macro)
252b5132
RH		 3012{
3013 char *operands[10];
3014 unsigned int count;
3015 char *s;
3016 unsigned int len;
3017 const char *format;
db557034 3018 unsigned int arg;
252b5132
RH		 3019 char *send;
3020 char *complete;
3021
3022 /* Gather the users operands into the operands array. */
3023 count = 0;
3024 s = str;
3025 while (1)
3026 {
3027 if (count >= sizeof operands / sizeof operands[0])
3028 break;
3029 operands[count++] = s;
3030 s = strchr (s, ',');
3031 if (s == (char *) NULL)
3032 break;
3033 *s++ = '\0';
81d4177b 3034 }
252b5132
RH		 3035
3036 if (count != macro->operands)
3037 {
3038 as_bad (_("wrong number of operands"));
3039 return;
3040 }
3041
3042 /* Work out how large the string must be (the size is unbounded
3043 because it includes user input). */
3044 len = 0;
3045 format = macro->format;
3046 while (*format != '\0')
3047 {
3048 if (*format != '%')
3049 {
3050 ++len;
3051 ++format;
3052 }
3053 else
3054 {
3055 arg = strtol (format + 1, &send, 10);
db557034 3056 know (send != format && arg < count);
252b5132
RH		 3057 len += strlen (operands[arg]);
3058 format = send;
3059 }
3060 }
3061
3062 /* Put the string together. */
3063 complete = s = (char *) alloca (len + 1);
3064 format = macro->format;
3065 while (*format != '\0')
3066 {
3067 if (*format != '%')
3068 *s++ = *format++;
3069 else
3070 {
3071 arg = strtol (format + 1, &send, 10);
3072 strcpy (s, operands[arg]);
3073 s += strlen (s);
3074 format = send;
3075 }
3076 }
3077 *s = '\0';
3078
3079 /* Assemble the constructed instruction. */
3080 md_assemble (complete);
81d4177b 3081}
252b5132
RH		 3082\f
3083#ifdef OBJ_ELF
99a814a1 3084/* For ELF, add support for SHF_EXCLUDE and SHT_ORDERED. */
252b5132 3085
01e1a5bc 3086bfd_vma
98027b10 3087ppc_section_letter (int letter, char **ptr_msg)
252b5132
RH		 3088{
3089 if (letter == 'e')
3090 return SHF_EXCLUDE;
3091
13ae64f3 3092 *ptr_msg = _("Bad .section directive: want a,e,w,x,M,S,G,T in string");
711ef82f 3093 return -1;
252b5132
RH		 3094}
3095
01e1a5bc 3096bfd_vma
98027b10 3097ppc_section_word (char *str, size_t len)
252b5132 3098{
9de8d8f1
RH		 3099 if (len == 7 && strncmp (str, "exclude", 7) == 0)
3100 return SHF_EXCLUDE;
252b5132 3101
9de8d8f1 3102 return -1;
252b5132
RH		 3103}
3104
3105int
98027b10 3106ppc_section_type (char *str, size_t len)
252b5132 3107{
9de8d8f1
RH		 3108 if (len == 7 && strncmp (str, "ordered", 7) == 0)
3109 return SHT_ORDERED;
252b5132 3110
9de8d8f1 3111 return -1;
252b5132
RH		 3112}
3113
3114int
01e1a5bc 3115ppc_section_flags (flagword flags, bfd_vma attr, int type)
252b5132
RH		 3116{
3117 if (type == SHT_ORDERED)
3118 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
3119
3120 if (attr & SHF_EXCLUDE)
3121 flags |= SEC_EXCLUDE;
3122
3123 return flags;
3124}
3125#endif /* OBJ_ELF */
3126
3127\f
3128/* Pseudo-op handling. */
3129
3130/* The .byte pseudo-op. This is similar to the normal .byte
3131 pseudo-op, but it can also take a single ASCII string. */
3132
3133static void
98027b10 3134ppc_byte (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3135{
3136 if (*input_line_pointer != '\"')
3137 {
3138 cons (1);
3139 return;
3140 }
3141
3142 /* Gather characters. A real double quote is doubled. Unusual
3143 characters are not permitted. */
3144 ++input_line_pointer;
3145 while (1)
3146 {
3147 char c;
3148
3149 c = *input_line_pointer++;
3150
3151 if (c == '\"')
3152 {
3153 if (*input_line_pointer != '\"')
3154 break;
3155 ++input_line_pointer;
3156 }
3157
3158 FRAG_APPEND_1_CHAR (c);
3159 }
3160
3161 demand_empty_rest_of_line ();
3162}
3163\f
3164#ifdef OBJ_XCOFF
3165
3166/* XCOFF specific pseudo-op handling. */
3167
3168/* This is set if we are creating a .stabx symbol, since we don't want
3169 to handle symbol suffixes for such symbols. */
b34976b6 3170static bfd_boolean ppc_stab_symbol;
252b5132
RH		 3171
3172/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3173 symbols in the .bss segment as though they were local common
67c1ffbe 3174 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 3175 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 3176
3177static void
98027b10 3178ppc_comm (int lcomm)
252b5132
RH		 3179{
3180 asection *current_seg = now_seg;
3181 subsegT current_subseg = now_subseg;
3182 char *name;
3183 char endc;
3184 char *end_name;
3185 offsetT size;
3186 offsetT align;
3187 symbolS *lcomm_sym = NULL;
3188 symbolS *sym;
3189 char *pfrag;
3190
3191 name = input_line_pointer;
3192 endc = get_symbol_end ();
3193 end_name = input_line_pointer;
3194 *end_name = endc;
3195
3196 if (*input_line_pointer != ',')
3197 {
3198 as_bad (_("missing size"));
3199 ignore_rest_of_line ();
3200 return;
3201 }
3202 ++input_line_pointer;
3203
3204 size = get_absolute_expression ();
3205 if (size < 0)
3206 {
3207 as_bad (_("negative size"));
3208 ignore_rest_of_line ();
3209 return;
3210 }
3211
3212 if (! lcomm)
3213 {
3214 /* The third argument to .comm is the alignment. */
3215 if (*input_line_pointer != ',')
1ad63b2f 3216 align = 2;
252b5132
RH		 3217 else
3218 {
3219 ++input_line_pointer;
3220 align = get_absolute_expression ();
3221 if (align <= 0)
3222 {
3223 as_warn (_("ignoring bad alignment"));
1ad63b2f 3224 align = 2;
252b5132
RH		 3225 }
3226 }
3227 }
3228 else
3229 {
3230 char *lcomm_name;
3231 char lcomm_endc;
3232
1ad63b2f 3233 if (size <= 4)
252b5132
RH		 3234 align = 2;
3235 else
3236 align = 3;
3237
3238 /* The third argument to .lcomm appears to be the real local
3239 common symbol to create. References to the symbol named in
3240 the first argument are turned into references to the third
3241 argument. */
3242 if (*input_line_pointer != ',')
3243 {
3244 as_bad (_("missing real symbol name"));
3245 ignore_rest_of_line ();
3246 return;
3247 }
3248 ++input_line_pointer;
3249
3250 lcomm_name = input_line_pointer;
3251 lcomm_endc = get_symbol_end ();
81d4177b 3252
252b5132
RH		 3253 lcomm_sym = symbol_find_or_make (lcomm_name);
3254
3255 *input_line_pointer = lcomm_endc;
3256 }
3257
3258 *end_name = '\0';
3259 sym = symbol_find_or_make (name);
3260 *end_name = endc;
3261
3262 if (S_IS_DEFINED (sym)
3263 || S_GET_VALUE (sym) != 0)
3264 {
3265 as_bad (_("attempt to redefine symbol"));
3266 ignore_rest_of_line ();
3267 return;
3268 }
81d4177b 3269
252b5132 3270 record_alignment (bss_section, align);
81d4177b 3271
252b5132
RH		 3272 if (! lcomm
3273 || ! S_IS_DEFINED (lcomm_sym))
3274 {
3275 symbolS *def_sym;
3276 offsetT def_size;
3277
3278 if (! lcomm)
3279 {
3280 def_sym = sym;
3281 def_size = size;
3282 S_SET_EXTERNAL (sym);
3283 }
3284 else
3285 {
809ffe0d 3286 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 3287 def_sym = lcomm_sym;
3288 def_size = 0;
3289 }
3290
3291 subseg_set (bss_section, 1);
3292 frag_align (align, 0, 0);
81d4177b 3293
809ffe0d 3294 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3295 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3296 def_size, (char *) NULL);
3297 *pfrag = 0;
3298 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3299 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3300 }
3301 else if (lcomm)
3302 {
3303 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3304 symbol_get_frag (lcomm_sym)->fr_offset =
3305 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3306 &~ ((1 << align) - 1));
809ffe0d
ILT		 3307 if (align > symbol_get_tc (lcomm_sym)->align)
3308 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3309 }
3310
3311 if (lcomm)
3312 {
3313 /* Make sym an offset from lcomm_sym. */
3314 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3315 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3316 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3317 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3318 }
3319
3320 subseg_set (current_seg, current_subseg);
3321
3322 demand_empty_rest_of_line ();
3323}
3324
3325/* The .csect pseudo-op. This switches us into a different
3326 subsegment. The first argument is a symbol whose value is the
3327 start of the .csect. In COFF, csect symbols get special aux
3328 entries defined by the x_csect field of union internal_auxent. The
3329 optional second argument is the alignment (the default is 2). */
3330
3331static void
98027b10 3332ppc_csect (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3333{
3334 char *name;
3335 char endc;
3336 symbolS *sym;
931e13a6 3337 offsetT align;
252b5132
RH		 3338
3339 name = input_line_pointer;
3340 endc = get_symbol_end ();
81d4177b 3341
252b5132
RH		 3342 sym = symbol_find_or_make (name);
3343
3344 *input_line_pointer = endc;
3345
3346 if (S_GET_NAME (sym)[0] == '\0')
3347 {
3348 /* An unnamed csect is assumed to be [PR]. */
96d56e9f 3349 symbol_get_tc (sym)->symbol_class = XMC_PR;
252b5132
RH		 3350 }
3351
931e13a6 3352 align = 2;
252b5132
RH		 3353 if (*input_line_pointer == ',')
3354 {
3355 ++input_line_pointer;
931e13a6 3356 align = get_absolute_expression ();
252b5132
RH		 3357 }
3358
931e13a6
AM		 3359 ppc_change_csect (sym, align);
3360
252b5132
RH		 3361 demand_empty_rest_of_line ();
3362}
3363
3364/* Change to a different csect. */
3365
3366static void
98027b10 3367ppc_change_csect (symbolS *sym, offsetT align)
252b5132
RH		 3368{
3369 if (S_IS_DEFINED (sym))
809ffe0d 3370 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3371 else
3372 {
3373 symbolS **list_ptr;
3374 int after_toc;
3375 int hold_chunksize;
3376 symbolS *list;
931e13a6
AM		 3377 int is_code;
3378 segT sec;
252b5132
RH		 3379
3380 /* This is a new csect. We need to look at the symbol class to
3381 figure out whether it should go in the text section or the
3382 data section. */
3383 after_toc = 0;
931e13a6 3384 is_code = 0;
96d56e9f 3385 switch (symbol_get_tc (sym)->symbol_class)
252b5132
RH		 3386 {
3387 case XMC_PR:
3388 case XMC_RO:
3389 case XMC_DB:
3390 case XMC_GL:
3391 case XMC_XO:
3392 case XMC_SV:
3393 case XMC_TI:
3394 case XMC_TB:
3395 S_SET_SEGMENT (sym, text_section);
809ffe0d 3396 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3397 ++ppc_text_subsegment;
3398 list_ptr = &ppc_text_csects;
931e13a6 3399 is_code = 1;
252b5132
RH		 3400 break;
3401 case XMC_RW:
3402 case XMC_TC0:
3403 case XMC_TC:
3404 case XMC_DS:
3405 case XMC_UA:
3406 case XMC_BS:
3407 case XMC_UC:
3408 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3409 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3410 == ppc_data_subsegment))
252b5132
RH		 3411 after_toc = 1;
3412 S_SET_SEGMENT (sym, data_section);
809ffe0d 3413 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3414 ++ppc_data_subsegment;
3415 list_ptr = &ppc_data_csects;
3416 break;
3417 default:
3418 abort ();
3419 }
3420
3421 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3422 changing subsegments, so that we don't use a lot of memory
3423 space for what may be a small section. */
252b5132
RH		 3424 hold_chunksize = chunksize;
3425 chunksize = 64;
3426
931e13a6
AM		 3427 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3428 symbol_get_tc (sym)->subseg);
252b5132
RH		 3429
3430 chunksize = hold_chunksize;
3431
3432 if (after_toc)
3433 ppc_after_toc_frag = frag_now;
3434
931e13a6
AM		 3435 record_alignment (sec, align);
3436 if (is_code)
3437 frag_align_code (align, 0);
3438 else
3439 frag_align (align, 0, 0);
3440
809ffe0d 3441 symbol_set_frag (sym, frag_now);
252b5132
RH		 3442 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3443
931e13a6 3444 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3445 symbol_get_tc (sym)->output = 1;
3446 symbol_get_tc (sym)->within = sym;
81d4177b 3447
252b5132 3448 for (list = *list_ptr;
809ffe0d
ILT		 3449 symbol_get_tc (list)->next != (symbolS *) NULL;
3450 list = symbol_get_tc (list)->next)
252b5132 3451 ;
809ffe0d 3452 symbol_get_tc (list)->next = sym;
81d4177b 3453
252b5132 3454 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3455 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3456 &symbol_lastP);
252b5132
RH		 3457 }
3458
3459 ppc_current_csect = sym;
3460}
3461
3462/* This function handles the .text and .data pseudo-ops. These
3463 pseudo-ops aren't really used by XCOFF; we implement them for the
3464 convenience of people who aren't used to XCOFF. */
3465
3466static void
98027b10 3467ppc_section (int type)
252b5132
RH		 3468{
3469 const char *name;
3470 symbolS *sym;
3471
3472 if (type == 't')
3473 name = ".text[PR]";
3474 else if (type == 'd')
3475 name = ".data[RW]";
3476 else
3477 abort ();
3478
3479 sym = symbol_find_or_make (name);
3480
931e13a6 3481 ppc_change_csect (sym, 2);
252b5132
RH		 3482
3483 demand_empty_rest_of_line ();
3484}
3485
3486/* This function handles the .section pseudo-op. This is mostly to
3487 give an error, since XCOFF only supports .text, .data and .bss, but
3488 we do permit the user to name the text or data section. */
3489
3490static void
98027b10 3491ppc_named_section (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3492{
3493 char *user_name;
3494 const char *real_name;
3495 char c;
3496 symbolS *sym;
3497
3498 user_name = input_line_pointer;
3499 c = get_symbol_end ();
3500
3501 if (strcmp (user_name, ".text") == 0)
3502 real_name = ".text[PR]";
3503 else if (strcmp (user_name, ".data") == 0)
3504 real_name = ".data[RW]";
3505 else
3506 {
3507 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3508 *input_line_pointer = c;
3509 ignore_rest_of_line ();
3510 return;
3511 }
3512
3513 *input_line_pointer = c;
3514
3515 sym = symbol_find_or_make (real_name);
3516
931e13a6 3517 ppc_change_csect (sym, 2);
252b5132
RH		 3518
3519 demand_empty_rest_of_line ();
3520}
3521
3522/* The .extern pseudo-op. We create an undefined symbol. */
3523
3524static void
98027b10 3525ppc_extern (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3526{
3527 char *name;
3528 char endc;
3529
3530 name = input_line_pointer;
3531 endc = get_symbol_end ();
3532
3533 (void) symbol_find_or_make (name);
3534
3535 *input_line_pointer = endc;
3536
3537 demand_empty_rest_of_line ();
3538}
3539
3540/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3541
3542static void
98027b10 3543ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3544{
3545 char *name;
3546 char endc;
3547 symbolS *sym;
3548
3549 name = input_line_pointer;
3550 endc = get_symbol_end ();
3551
3552 sym = symbol_find_or_make (name);
3553
3554 *input_line_pointer = endc;
3555
809ffe0d 3556 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3557
3558 demand_empty_rest_of_line ();
3559}
3560
3561/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3562 although I don't know why it bothers. */
3563
3564static void
98027b10 3565ppc_rename (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3566{
3567 char *name;
3568 char endc;
3569 symbolS *sym;
3570 int len;
3571
3572 name = input_line_pointer;
3573 endc = get_symbol_end ();
3574
3575 sym = symbol_find_or_make (name);
3576
3577 *input_line_pointer = endc;
3578
3579 if (*input_line_pointer != ',')
3580 {
3581 as_bad (_("missing rename string"));
3582 ignore_rest_of_line ();
3583 return;
3584 }
3585 ++input_line_pointer;
3586
809ffe0d 3587 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 3588
3589 demand_empty_rest_of_line ();
3590}
3591
3592/* The .stabx pseudo-op. This is similar to a normal .stabs
3593 pseudo-op, but slightly different. A sample is
3594 .stabx "main:F-1",.main,142,0
3595 The first argument is the symbol name to create. The second is the
3596 value, and the third is the storage class. The fourth seems to be
3597 always zero, and I am assuming it is the type. */
3598
3599static void
98027b10 3600ppc_stabx (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3601{
3602 char *name;
3603 int len;
3604 symbolS *sym;
3605 expressionS exp;
3606
3607 name = demand_copy_C_string (&len);
3608
3609 if (*input_line_pointer != ',')
3610 {
3611 as_bad (_("missing value"));
3612 return;
3613 }
3614 ++input_line_pointer;
3615
b34976b6 3616 ppc_stab_symbol = TRUE;
252b5132 3617 sym = symbol_make (name);
b34976b6 3618 ppc_stab_symbol = FALSE;
252b5132 3619
809ffe0d 3620 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 3621
3622 (void) expression (&exp);
3623
3624 switch (exp.X_op)
3625 {
3626 case O_illegal:
3627 case O_absent:
3628 case O_big:
3629 as_bad (_("illegal .stabx expression; zero assumed"));
3630 exp.X_add_number = 0;
3631 /* Fall through. */
3632 case O_constant:
3633 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 3634 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 3635 break;
3636
3637 case O_symbol:
3638 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 3639 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3640 else
3641 {
3642 S_SET_VALUE (sym,
3643 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 3644 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 3645 }
3646 break;
3647
3648 default:
3649 /* The value is some complex expression. This will probably
99a814a1
AM		 3650 fail at some later point, but this is probably the right
3651 thing to do here. */
809ffe0d 3652 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3653 break;
3654 }
3655
3656 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3657 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3658
3659 if (*input_line_pointer != ',')
3660 {
3661 as_bad (_("missing class"));
3662 return;
3663 }
3664 ++input_line_pointer;
3665
3666 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3667
3668 if (*input_line_pointer != ',')
3669 {
3670 as_bad (_("missing type"));
3671 return;
3672 }
3673 ++input_line_pointer;
3674
3675 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3676
809ffe0d 3677 symbol_get_tc (sym)->output = 1;
252b5132 3678
6877bb43 3679 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
99a814a1 3680
809ffe0d 3681 symbol_get_tc (sym)->within = ppc_current_block;
252b5132 3682
41ea10b1 3683 /* In this case :
99a814a1 3684
41ea10b1
TR		 3685 .bs name
3686 .stabx "z",arrays_,133,0
3687 .es
99a814a1 3688
41ea10b1 3689 .comm arrays_,13768,3
99a814a1 3690
41ea10b1
TR		 3691 resolve_symbol_value will copy the exp's "within" into sym's when the
3692 offset is 0. Since this seems to be corner case problem,
3693 only do the correction for storage class C_STSYM. A better solution
0baf16f2 3694 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1
AM		 3695
3696 if (exp.X_op == O_symbol)
41ea10b1
TR		 3697 {
3698 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3699 }
6877bb43 3700 }
99a814a1 3701
252b5132
RH		 3702 if (exp.X_op != O_symbol
3703 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3704 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3705 ppc_frob_label (sym);
3706 else
3707 {
3708 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3709 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3710 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3711 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 3712 }
3713
3714 demand_empty_rest_of_line ();
3715}
3716
3717/* The .function pseudo-op. This takes several arguments. The first
3718 argument seems to be the external name of the symbol. The second
67c1ffbe 3719 argument seems to be the label for the start of the function. gcc
252b5132
RH		 3720 uses the same name for both. I have no idea what the third and
3721 fourth arguments are meant to be. The optional fifth argument is
3722 an expression for the size of the function. In COFF this symbol
3723 gets an aux entry like that used for a csect. */
3724
3725static void
98027b10 3726ppc_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3727{
3728 char *name;
3729 char endc;
3730 char *s;
3731 symbolS *ext_sym;
3732 symbolS *lab_sym;
3733
3734 name = input_line_pointer;
3735 endc = get_symbol_end ();
3736
3737 /* Ignore any [PR] suffix. */
3738 name = ppc_canonicalize_symbol_name (name);
3739 s = strchr (name, '[');
3740 if (s != (char *) NULL
3741 && strcmp (s + 1, "PR]") == 0)
3742 *s = '\0';
3743
3744 ext_sym = symbol_find_or_make (name);
3745
3746 *input_line_pointer = endc;
3747
3748 if (*input_line_pointer != ',')
3749 {
3750 as_bad (_("missing symbol name"));
3751 ignore_rest_of_line ();
3752 return;
3753 }
3754 ++input_line_pointer;
3755
3756 name = input_line_pointer;
3757 endc = get_symbol_end ();
3758
3759 lab_sym = symbol_find_or_make (name);
3760
3761 *input_line_pointer = endc;
3762
3763 if (ext_sym != lab_sym)
3764 {
809ffe0d
ILT		 3765 expressionS exp;
3766
3767 exp.X_op = O_symbol;
3768 exp.X_add_symbol = lab_sym;
3769 exp.X_op_symbol = NULL;
3770 exp.X_add_number = 0;
3771 exp.X_unsigned = 0;
3772 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 3773 }
3774
96d56e9f
NC		 3775 if (symbol_get_tc (ext_sym)->symbol_class == -1)
3776 symbol_get_tc (ext_sym)->symbol_class = XMC_PR;
809ffe0d 3777 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 3778
3779 if (*input_line_pointer == ',')
3780 {
91d6fa6a 3781 expressionS exp;
252b5132
RH		 3782
3783 /* Ignore the third argument. */
3784 ++input_line_pointer;
91d6fa6a 3785 expression (& exp);
252b5132
RH		 3786 if (*input_line_pointer == ',')
3787 {
3788 /* Ignore the fourth argument. */
3789 ++input_line_pointer;
91d6fa6a 3790 expression (& exp);
252b5132
RH		 3791 if (*input_line_pointer == ',')
3792 {
3793 /* The fifth argument is the function size. */
3794 ++input_line_pointer;
809ffe0d
ILT		 3795 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
3796 absolute_section,
3797 (valueT) 0,
3798 &zero_address_frag);
3799 pseudo_set (symbol_get_tc (ext_sym)->size);
252b5132
RH		 3800 }
3801 }
3802 }
3803
3804 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
3805 SF_SET_FUNCTION (ext_sym);
3806 SF_SET_PROCESS (ext_sym);
3807 coff_add_linesym (ext_sym);
3808
3809 demand_empty_rest_of_line ();
3810}
3811
3812/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 3813 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
3814 with the correct line number */
5d6255fe 3815
8642cce8 3816static symbolS *saved_bi_sym = 0;
252b5132
RH		 3817
3818static void
98027b10 3819ppc_bf (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3820{
3821 symbolS *sym;
3822
3823 sym = symbol_make (".bf");
3824 S_SET_SEGMENT (sym, text_section);
809ffe0d 3825 symbol_set_frag (sym, frag_now);
252b5132
RH		 3826 S_SET_VALUE (sym, frag_now_fix ());
3827 S_SET_STORAGE_CLASS (sym, C_FCN);
3828
3829 coff_line_base = get_absolute_expression ();
3830
3831 S_SET_NUMBER_AUXILIARY (sym, 1);
3832 SA_SET_SYM_LNNO (sym, coff_line_base);
3833
8642cce8 3834 /* Line number for bi. */
5d6255fe 3835 if (saved_bi_sym)
8642cce8
TR		 3836 {
3837 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
3838 saved_bi_sym = 0;
3839 }
5d6255fe 3840
8642cce8 3841
809ffe0d 3842 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3843
3844 ppc_frob_label (sym);
3845
3846 demand_empty_rest_of_line ();
3847}
3848
3849/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
3850 ".ef", except that the line number is absolute, not relative to the
3851 most recent ".bf" symbol. */
3852
3853static void
98027b10 3854ppc_ef (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3855{
3856 symbolS *sym;
3857
3858 sym = symbol_make (".ef");
3859 S_SET_SEGMENT (sym, text_section);
809ffe0d 3860 symbol_set_frag (sym, frag_now);
252b5132
RH		 3861 S_SET_VALUE (sym, frag_now_fix ());
3862 S_SET_STORAGE_CLASS (sym, C_FCN);
3863 S_SET_NUMBER_AUXILIARY (sym, 1);
3864 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3865 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3866
3867 ppc_frob_label (sym);
3868
3869 demand_empty_rest_of_line ();
3870}
3871
3872/* The .bi and .ei pseudo-ops. These take a string argument and
3873 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 3874 the symbol list. The value of .bi will be know when the next .bf
3875 is encountered. */
252b5132
RH		 3876
3877static void
98027b10 3878ppc_biei (int ei)
252b5132
RH		 3879{
3880 static symbolS *last_biei;
3881
3882 char *name;
3883 int len;
3884 symbolS *sym;
3885 symbolS *look;
3886
3887 name = demand_copy_C_string (&len);
3888
3889 /* The value of these symbols is actually file offset. Here we set
3890 the value to the index into the line number entries. In
3891 ppc_frob_symbols we set the fix_line field, which will cause BFD
3892 to do the right thing. */
3893
3894 sym = symbol_make (name);
3895 /* obj-coff.c currently only handles line numbers correctly in the
3896 .text section. */
3897 S_SET_SEGMENT (sym, text_section);
3898 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 3899 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3900
3901 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 3902 symbol_get_tc (sym)->output = 1;
81d4177b 3903
8642cce8 3904 /* Save bi. */
5d6255fe 3905 if (ei)
8642cce8
TR		 3906 saved_bi_sym = 0;
3907 else
3908 saved_bi_sym = sym;
3909
252b5132
RH		 3910 for (look = last_biei ? last_biei : symbol_rootP;
3911 (look != (symbolS *) NULL
3912 && (S_GET_STORAGE_CLASS (look) == C_FILE
3913 || S_GET_STORAGE_CLASS (look) == C_BINCL
3914 || S_GET_STORAGE_CLASS (look) == C_EINCL));
3915 look = symbol_next (look))
3916 ;
3917 if (look != (symbolS *) NULL)
3918 {
3919 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3920 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
3921 last_biei = sym;
3922 }
3923
3924 demand_empty_rest_of_line ();
3925}
3926
3927/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
3928 There is one argument, which is a csect symbol. The value of the
3929 .bs symbol is the index of this csect symbol. */
3930
3931static void
98027b10 3932ppc_bs (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3933{
3934 char *name;
3935 char endc;
3936 symbolS *csect;
3937 symbolS *sym;
3938
3939 if (ppc_current_block != NULL)
3940 as_bad (_("nested .bs blocks"));
3941
3942 name = input_line_pointer;
3943 endc = get_symbol_end ();
3944
3945 csect = symbol_find_or_make (name);
3946
3947 *input_line_pointer = endc;
3948
3949 sym = symbol_make (".bs");
3950 S_SET_SEGMENT (sym, now_seg);
3951 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 3952 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3953 symbol_get_tc (sym)->output = 1;
252b5132 3954
809ffe0d 3955 symbol_get_tc (sym)->within = csect;
252b5132
RH		 3956
3957 ppc_frob_label (sym);
3958
3959 ppc_current_block = sym;
3960
3961 demand_empty_rest_of_line ();
3962}
3963
3964/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
3965
3966static void
98027b10 3967ppc_es (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3968{
3969 symbolS *sym;
3970
3971 if (ppc_current_block == NULL)
3972 as_bad (_(".es without preceding .bs"));
3973
3974 sym = symbol_make (".es");
3975 S_SET_SEGMENT (sym, now_seg);
3976 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 3977 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3978 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3979
3980 ppc_frob_label (sym);
3981
3982 ppc_current_block = NULL;
3983
3984 demand_empty_rest_of_line ();
3985}
3986
3987/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
3988 line number. */
3989
3990static void
98027b10 3991ppc_bb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3992{
3993 symbolS *sym;
3994
3995 sym = symbol_make (".bb");
3996 S_SET_SEGMENT (sym, text_section);
809ffe0d 3997 symbol_set_frag (sym, frag_now);
252b5132
RH		 3998 S_SET_VALUE (sym, frag_now_fix ());
3999 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4000
4001 S_SET_NUMBER_AUXILIARY (sym, 1);
4002 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4003
809ffe0d 4004 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4005
4006 SF_SET_PROCESS (sym);
4007
4008 ppc_frob_label (sym);
4009
4010 demand_empty_rest_of_line ();
4011}
4012
4013/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
4014 line number. */
4015
4016static void
98027b10 4017ppc_eb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4018{
4019 symbolS *sym;
4020
4021 sym = symbol_make (".eb");
4022 S_SET_SEGMENT (sym, text_section);
809ffe0d 4023 symbol_set_frag (sym, frag_now);
252b5132
RH		 4024 S_SET_VALUE (sym, frag_now_fix ());
4025 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4026 S_SET_NUMBER_AUXILIARY (sym, 1);
4027 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 4028 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4029
4030 SF_SET_PROCESS (sym);
4031
4032 ppc_frob_label (sym);
4033
4034 demand_empty_rest_of_line ();
4035}
4036
4037/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
4038 specified name. */
4039
4040static void
98027b10 4041ppc_bc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4042{
4043 char *name;
4044 int len;
4045 symbolS *sym;
4046
4047 name = demand_copy_C_string (&len);
4048 sym = symbol_make (name);
4049 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4050 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4051 S_SET_STORAGE_CLASS (sym, C_BCOMM);
4052 S_SET_VALUE (sym, 0);
809ffe0d 4053 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4054
4055 ppc_frob_label (sym);
4056
4057 demand_empty_rest_of_line ();
4058}
4059
4060/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
4061
4062static void
98027b10 4063ppc_ec (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4064{
4065 symbolS *sym;
4066
4067 sym = symbol_make (".ec");
4068 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4069 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4070 S_SET_STORAGE_CLASS (sym, C_ECOMM);
4071 S_SET_VALUE (sym, 0);
809ffe0d 4072 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4073
4074 ppc_frob_label (sym);
4075
4076 demand_empty_rest_of_line ();
4077}
4078
4079/* The .toc pseudo-op. Switch to the .toc subsegment. */
4080
4081static void
98027b10 4082ppc_toc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4083{
4084 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 4085 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 4086 else
4087 {
4088 subsegT subseg;
4089 symbolS *sym;
4090 symbolS *list;
81d4177b 4091
252b5132
RH		 4092 subseg = ppc_data_subsegment;
4093 ++ppc_data_subsegment;
4094
4095 subseg_new (segment_name (data_section), subseg);
4096 ppc_toc_frag = frag_now;
4097
4098 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 4099 symbol_set_frag (sym, frag_now);
252b5132
RH		 4100 S_SET_SEGMENT (sym, data_section);
4101 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 4102 symbol_get_tc (sym)->subseg = subseg;
4103 symbol_get_tc (sym)->output = 1;
4104 symbol_get_tc (sym)->within = sym;
252b5132
RH		 4105
4106 ppc_toc_csect = sym;
81d4177b 4107
252b5132 4108 for (list = ppc_data_csects;
809ffe0d
ILT		 4109 symbol_get_tc (list)->next != (symbolS *) NULL;
4110 list = symbol_get_tc (list)->next)
252b5132 4111 ;
809ffe0d 4112 symbol_get_tc (list)->next = sym;
252b5132
RH		 4113
4114 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4115 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
4116 &symbol_lastP);
252b5132
RH		 4117 }
4118
4119 ppc_current_csect = ppc_toc_csect;
4120
4121 demand_empty_rest_of_line ();
4122}
4123
4124/* The AIX assembler automatically aligns the operands of a .long or
4125 .short pseudo-op, and we want to be compatible. */
4126
4127static void
98027b10 4128ppc_xcoff_cons (int log_size)
252b5132
RH		 4129{
4130 frag_align (log_size, 0, 0);
4131 record_alignment (now_seg, log_size);
4132 cons (1 << log_size);
4133}
4134
4135static void
98027b10 4136ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
252b5132
RH		 4137{
4138 expressionS exp;
4139 int byte_count;
4140
4141 (void) expression (&exp);
4142
4143 if (exp.X_op != O_constant)
4144 {
4145 as_bad (_("non-constant byte count"));
4146 return;
4147 }
4148
4149 byte_count = exp.X_add_number;
4150
4151 if (*input_line_pointer != ',')
4152 {
4153 as_bad (_("missing value"));
4154 return;
4155 }
4156
4157 ++input_line_pointer;
4158 cons (byte_count);
4159}
4160
4161#endif /* OBJ_XCOFF */
0baf16f2 4162#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 4163\f
4164/* The .tc pseudo-op. This is used when generating either XCOFF or
4165 ELF. This takes two or more arguments.
4166
4167 When generating XCOFF output, the first argument is the name to
4168 give to this location in the toc; this will be a symbol with class
0baf16f2 4169 TC. The rest of the arguments are N-byte values to actually put at
252b5132 4170 this location in the TOC; often there is just one more argument, a
1049f94e 4171 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 4172 depends on target word size. A 32-bit target uses 4-byte values, a
4173 64-bit target uses 8-byte values.
252b5132
RH		 4174
4175 When not generating XCOFF output, the arguments are the same, but
4176 the first argument is simply ignored. */
4177
4178static void
98027b10 4179ppc_tc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4180{
4181#ifdef OBJ_XCOFF
4182
4183 /* Define the TOC symbol name. */
4184 {
4185 char *name;
4186 char endc;
4187 symbolS *sym;
4188
4189 if (ppc_toc_csect == (symbolS *) NULL
4190 || ppc_toc_csect != ppc_current_csect)
4191 {
4192 as_bad (_(".tc not in .toc section"));
4193 ignore_rest_of_line ();
4194 return;
4195 }
4196
4197 name = input_line_pointer;
4198 endc = get_symbol_end ();
4199
4200 sym = symbol_find_or_make (name);
4201
4202 *input_line_pointer = endc;
4203
4204 if (S_IS_DEFINED (sym))
4205 {
4206 symbolS *label;
4207
809ffe0d 4208 label = symbol_get_tc (ppc_current_csect)->within;
96d56e9f 4209 if (symbol_get_tc (label)->symbol_class != XMC_TC0)
252b5132
RH		 4210 {
4211 as_bad (_(".tc with no label"));
4212 ignore_rest_of_line ();
4213 return;
4214 }
4215
4216 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 4217 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 4218 S_SET_VALUE (label, S_GET_VALUE (sym));
4219
4220 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4221 ++input_line_pointer;
4222
4223 return;
4224 }
4225
4226 S_SET_SEGMENT (sym, now_seg);
809ffe0d 4227 symbol_set_frag (sym, frag_now);
252b5132 4228 S_SET_VALUE (sym, (valueT) frag_now_fix ());
96d56e9f 4229 symbol_get_tc (sym)->symbol_class = XMC_TC;
809ffe0d 4230 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4231
4232 ppc_frob_label (sym);
4233 }
4234
0baf16f2
AM		 4235#endif /* OBJ_XCOFF */
4236#ifdef OBJ_ELF
9c7977b3 4237 int align;
252b5132
RH		 4238
4239 /* Skip the TOC symbol name. */
4240 while (is_part_of_name (*input_line_pointer)
d13d4015 4241 || *input_line_pointer == ' '
252b5132
RH		 4242 || *input_line_pointer == '['
4243 || *input_line_pointer == ']'
4244 || *input_line_pointer == '{'
4245 || *input_line_pointer == '}')
4246 ++input_line_pointer;
4247
0baf16f2 4248 /* Align to a four/eight byte boundary. */
2b3c4602 4249 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 4250 frag_align (align, 0, 0);
4251 record_alignment (now_seg, align);
0baf16f2 4252#endif /* OBJ_ELF */
252b5132
RH		 4253
4254 if (*input_line_pointer != ',')
4255 demand_empty_rest_of_line ();
4256 else
4257 {
4258 ++input_line_pointer;
2b3c4602 4259 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 4260 }
4261}
0baf16f2
AM		 4262
4263/* Pseudo-op .machine. */
0baf16f2
AM		 4264
4265static void
98027b10 4266ppc_machine (int ignore ATTRIBUTE_UNUSED)
0baf16f2 4267{
69c040df
AM		 4268 char *cpu_string;
4269#define MAX_HISTORY 100
fa452fa6 4270 static ppc_cpu_t *cpu_history;
69c040df
AM		 4271 static int curr_hist;
4272
4273 SKIP_WHITESPACE ();
4274
4275 if (*input_line_pointer == '"')
4276 {
4277 int len;
4278 cpu_string = demand_copy_C_string (&len);
4279 }
4280 else
4281 {
4282 char c;
4283 cpu_string = input_line_pointer;
4284 c = get_symbol_end ();
4285 cpu_string = xstrdup (cpu_string);
4286 *input_line_pointer = c;
4287 }
4288
4289 if (cpu_string != NULL)
4290 {
fa452fa6 4291 ppc_cpu_t old_cpu = ppc_cpu;
69fe9ce5 4292 ppc_cpu_t new_cpu;
69c040df
AM		 4293 char *p;
4294
4295 for (p = cpu_string; *p != 0; p++)
4296 *p = TOLOWER (*p);
4297
4298 if (strcmp (cpu_string, "push") == 0)
4299 {
4300 if (cpu_history == NULL)
4301 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4302
4303 if (curr_hist >= MAX_HISTORY)
4304 as_bad (_(".machine stack overflow"));
4305 else
4306 cpu_history[curr_hist++] = ppc_cpu;
4307 }
4308 else if (strcmp (cpu_string, "pop") == 0)
4309 {
4310 if (curr_hist <= 0)
4311 as_bad (_(".machine stack underflow"));
4312 else
4313 ppc_cpu = cpu_history[--curr_hist];
4314 }
69fe9ce5
AM		 4315 else if ((new_cpu = ppc_parse_cpu (ppc_cpu, cpu_string)) != 0)
4316 ppc_cpu = new_cpu;
69c040df
AM		 4317 else
4318 as_bad (_("invalid machine `%s'"), cpu_string);
4319
4320 if (ppc_cpu != old_cpu)
4321 ppc_setup_opcodes ();
4322 }
4323
4324 demand_empty_rest_of_line ();
0baf16f2
AM		 4325}
4326
4327/* See whether a symbol is in the TOC section. */
4328
4329static int
98027b10 4330ppc_is_toc_sym (symbolS *sym)
0baf16f2
AM		 4331{
4332#ifdef OBJ_XCOFF
96d56e9f 4333 return symbol_get_tc (sym)->symbol_class == XMC_TC;
0baf16f2
AM		 4334#endif
4335#ifdef OBJ_ELF
4336 const char *sname = segment_name (S_GET_SEGMENT (sym));
2b3c4602 4337 if (ppc_obj64)
0baf16f2
AM		 4338 return strcmp (sname, ".toc") == 0;
4339 else
4340 return strcmp (sname, ".got") == 0;
4341#endif
4342}
4343#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 4344\f
4345#ifdef TE_PE
4346
99a814a1 4347/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 4348
4349/* Set the current section. */
4350static void
98027b10 4351ppc_set_current_section (segT new)
252b5132
RH		 4352{
4353 ppc_previous_section = ppc_current_section;
4354 ppc_current_section = new;
4355}
4356
4357/* pseudo-op: .previous
4358 behaviour: toggles the current section with the previous section.
4359 errors: None
99a814a1
AM		 4360 warnings: "No previous section" */
4361
252b5132 4362static void
98027b10 4363ppc_previous (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4364{
4365 symbolS *tmp;
4366
81d4177b 4367 if (ppc_previous_section == NULL)
252b5132 4368 {
99a814a1 4369 as_warn (_("No previous section to return to. Directive ignored."));
252b5132
RH		 4370 return;
4371 }
4372
99a814a1 4373 subseg_set (ppc_previous_section, 0);
252b5132 4374
99a814a1 4375 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 4376}
4377
4378/* pseudo-op: .pdata
4379 behaviour: predefined read only data section
b34976b6 4380 double word aligned
252b5132
RH		 4381 errors: None
4382 warnings: None
4383 initial: .section .pdata "adr3"
b34976b6 4384 a - don't know -- maybe a misprint
252b5132
RH		 4385 d - initialized data
4386 r - readable
4387 3 - double word aligned (that would be 4 byte boundary)
4388
4389 commentary:
4390 Tag index tables (also known as the function table) for exception
99a814a1 4391 handling, debugging, etc. */
252b5132 4392
252b5132 4393static void
98027b10 4394ppc_pdata (int ignore ATTRIBUTE_UNUSED)
252b5132 4395{
81d4177b 4396 if (pdata_section == 0)
252b5132
RH		 4397 {
4398 pdata_section = subseg_new (".pdata", 0);
81d4177b 4399
252b5132
RH		 4400 bfd_set_section_flags (stdoutput, pdata_section,
4401 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4402 | SEC_READONLY | SEC_DATA ));
81d4177b 4403
252b5132
RH		 4404 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4405 }
4406 else
4407 {
99a814a1 4408 pdata_section = subseg_new (".pdata", 0);
252b5132 4409 }
99a814a1 4410 ppc_set_current_section (pdata_section);
252b5132
RH		 4411}
4412
4413/* pseudo-op: .ydata
4414 behaviour: predefined read only data section
b34976b6 4415 double word aligned
252b5132
RH		 4416 errors: None
4417 warnings: None
4418 initial: .section .ydata "drw3"
b34976b6 4419 a - don't know -- maybe a misprint
252b5132
RH		 4420 d - initialized data
4421 r - readable
4422 3 - double word aligned (that would be 4 byte boundary)
4423 commentary:
4424 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 4425 debugging, etc. */
4426
252b5132 4427static void
98027b10 4428ppc_ydata (int ignore ATTRIBUTE_UNUSED)
252b5132 4429{
81d4177b 4430 if (ydata_section == 0)
252b5132
RH		 4431 {
4432 ydata_section = subseg_new (".ydata", 0);
4433 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 4434 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4435 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 4436
4437 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4438 }
4439 else
4440 {
4441 ydata_section = subseg_new (".ydata", 0);
4442 }
99a814a1 4443 ppc_set_current_section (ydata_section);
252b5132
RH		 4444}
4445
4446/* pseudo-op: .reldata
4447 behaviour: predefined read write data section
b34976b6 4448 double word aligned (4-byte)
252b5132
RH		 4449 FIXME: relocation is applied to it
4450 FIXME: what's the difference between this and .data?
4451 errors: None
4452 warnings: None
4453 initial: .section .reldata "drw3"
4454 d - initialized data
4455 r - readable
4456 w - writeable
4457 3 - double word aligned (that would be 8 byte boundary)
4458
4459 commentary:
4460 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 4461 function descriptors, etc. */
4462
252b5132 4463static void
98027b10 4464ppc_reldata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4465{
4466 if (reldata_section == 0)
4467 {
4468 reldata_section = subseg_new (".reldata", 0);
4469
4470 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 4471 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4472 | SEC_DATA));
252b5132
RH		 4473
4474 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4475 }
4476 else
4477 {
4478 reldata_section = subseg_new (".reldata", 0);
4479 }
99a814a1 4480 ppc_set_current_section (reldata_section);
252b5132
RH		 4481}
4482
4483/* pseudo-op: .rdata
4484 behaviour: predefined read only data section
b34976b6 4485 double word aligned
252b5132
RH		 4486 errors: None
4487 warnings: None
4488 initial: .section .rdata "dr3"
4489 d - initialized data
4490 r - readable
99a814a1
AM		 4491 3 - double word aligned (that would be 4 byte boundary) */
4492
252b5132 4493static void
98027b10 4494ppc_rdata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4495{
4496 if (rdata_section == 0)
4497 {
4498 rdata_section = subseg_new (".rdata", 0);
4499 bfd_set_section_flags (stdoutput, rdata_section,
4500 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4501 | SEC_READONLY | SEC_DATA ));
4502
4503 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4504 }
4505 else
4506 {
4507 rdata_section = subseg_new (".rdata", 0);
4508 }
99a814a1 4509 ppc_set_current_section (rdata_section);
252b5132
RH		 4510}
4511
4512/* pseudo-op: .ualong
81d4177b 4513 behaviour: much like .int, with the exception that no alignment is
b34976b6 4514 performed.
252b5132
RH		 4515 FIXME: test the alignment statement
4516 errors: None
99a814a1
AM		 4517 warnings: None */
4518
252b5132 4519static void
98027b10 4520ppc_ualong (int ignore ATTRIBUTE_UNUSED)
252b5132 4521{
99a814a1
AM		 4522 /* Try for long. */
4523 cons (4);
252b5132
RH		 4524}
4525
4526/* pseudo-op: .znop <symbol name>
4527 behaviour: Issue a nop instruction
b34976b6 4528 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 4529 the supplied symbol name.
4530 errors: None
99a814a1
AM		 4531 warnings: Missing symbol name */
4532
252b5132 4533static void
98027b10 4534ppc_znop (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4535{
4536 unsigned long insn;
4537 const struct powerpc_opcode *opcode;
4538 expressionS ex;
4539 char *f;
252b5132 4540 symbolS *sym;
252b5132
RH		 4541 char *symbol_name;
4542 char c;
4543 char *name;
4544 unsigned int exp;
4545 flagword flags;
4546 asection *sec;
4547
99a814a1 4548 /* Strip out the symbol name. */
252b5132
RH		 4549 symbol_name = input_line_pointer;
4550 c = get_symbol_end ();
4551
4552 name = xmalloc (input_line_pointer - symbol_name + 1);
4553 strcpy (name, symbol_name);
4554
4555 sym = symbol_find_or_make (name);
4556
4557 *input_line_pointer = c;
4558
4559 SKIP_WHITESPACE ();
4560
4561 /* Look up the opcode in the hash table. */
4562 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4563
99a814a1 4564 /* Stick in the nop. */
252b5132
RH		 4565 insn = opcode->opcode;
4566
4567 /* Write out the instruction. */
4568 f = frag_more (4);
4569 md_number_to_chars (f, insn, 4);
4570 fix_new (frag_now,
4571 f - frag_now->fr_literal,
4572 4,
4573 sym,
4574 0,
4575 0,
4576 BFD_RELOC_16_GOT_PCREL);
4577
4578}
4579
81d4177b
KH		 4580/* pseudo-op:
4581 behaviour:
4582 errors:
99a814a1
AM		 4583 warnings: */
4584
252b5132 4585static void
98027b10 4586ppc_pe_comm (int lcomm)
252b5132 4587{
98027b10
AM		 4588 char *name;
4589 char c;
4590 char *p;
252b5132 4591 offsetT temp;
98027b10 4592 symbolS *symbolP;
252b5132
RH		 4593 offsetT align;
4594
4595 name = input_line_pointer;
4596 c = get_symbol_end ();
4597
99a814a1 4598 /* just after name is now '\0'. */
252b5132
RH		 4599 p = input_line_pointer;
4600 *p = c;
4601 SKIP_WHITESPACE ();
4602 if (*input_line_pointer != ',')
4603 {
4604 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4605 ignore_rest_of_line ();
4606 return;
4607 }
4608
4609 input_line_pointer++; /* skip ',' */
4610 if ((temp = get_absolute_expression ()) < 0)
4611 {
4612 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4613 ignore_rest_of_line ();
4614 return;
4615 }
4616
4617 if (! lcomm)
4618 {
4619 /* The third argument to .comm is the alignment. */
4620 if (*input_line_pointer != ',')
4621 align = 3;
4622 else
4623 {
4624 ++input_line_pointer;
4625 align = get_absolute_expression ();
4626 if (align <= 0)
4627 {
4628 as_warn (_("ignoring bad alignment"));
4629 align = 3;
4630 }
4631 }
4632 }
4633
4634 *p = 0;
4635 symbolP = symbol_find_or_make (name);
4636
4637 *p = c;
4638 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4639 {
4640 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4641 S_GET_NAME (symbolP));
4642 ignore_rest_of_line ();
4643 return;
4644 }
4645
4646 if (S_GET_VALUE (symbolP))
4647 {
4648 if (S_GET_VALUE (symbolP) != (valueT) temp)
4649 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4650 S_GET_NAME (symbolP),
4651 (long) S_GET_VALUE (symbolP),
4652 (long) temp);
4653 }
4654 else
4655 {
4656 S_SET_VALUE (symbolP, (valueT) temp);
4657 S_SET_EXTERNAL (symbolP);
86ebace2 4658 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
252b5132
RH		 4659 }
4660
4661 demand_empty_rest_of_line ();
4662}
4663
4664/*
4665 * implement the .section pseudo op:
4666 * .section name {, "flags"}
4667 * ^ ^
4668 * | +--- optional flags: 'b' for bss
4669 * | 'i' for info
4670 * +-- section name 'l' for lib
4671 * 'n' for noload
4672 * 'o' for over
4673 * 'w' for data
4674 * 'd' (apparently m88k for data)
4675 * 'x' for text
4676 * But if the argument is not a quoted string, treat it as a
4677 * subsegment number.
4678 *
4679 * FIXME: this is a copy of the section processing from obj-coff.c, with
4680 * additions/changes for the moto-pas assembler support. There are three
4681 * categories:
4682 *
81d4177b 4683 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 4684 * setting bits that bfd probably neither understands or uses. The
4685 * correct approach (?) will have to incorporate extra fields attached
4686 * to the section to hold the system specific stuff. (krk)
4687 *
4688 * Section Contents:
4689 * 'a' - unknown - referred to in documentation, but no definition supplied
4690 * 'c' - section has code
4691 * 'd' - section has initialized data
4692 * 'u' - section has uninitialized data
4693 * 'i' - section contains directives (info)
4694 * 'n' - section can be discarded
4695 * 'R' - remove section at link time
4696 *
4697 * Section Protection:
4698 * 'r' - section is readable
4699 * 'w' - section is writeable
4700 * 'x' - section is executable
4701 * 's' - section is sharable
4702 *
4703 * Section Alignment:
4704 * '0' - align to byte boundary
4705 * '1' - align to halfword undary
4706 * '2' - align to word boundary
4707 * '3' - align to doubleword boundary
4708 * '4' - align to quadword boundary
4709 * '5' - align to 32 byte boundary
4710 * '6' - align to 64 byte boundary
4711 *
4712 */
4713
4714void
98027b10 4715ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
252b5132 4716{
99a814a1 4717 /* Strip out the section name. */
252b5132
RH		 4718 char *section_name;
4719 char c;
4720 char *name;
4721 unsigned int exp;
4722 flagword flags;
4723 segT sec;
4724 int align;
4725
4726 section_name = input_line_pointer;
4727 c = get_symbol_end ();
4728
4729 name = xmalloc (input_line_pointer - section_name + 1);
4730 strcpy (name, section_name);
4731
4732 *input_line_pointer = c;
4733
4734 SKIP_WHITESPACE ();
4735
4736 exp = 0;
4737 flags = SEC_NO_FLAGS;
4738
4739 if (strcmp (name, ".idata$2") == 0)
4740 {
4741 align = 0;
4742 }
4743 else if (strcmp (name, ".idata$3") == 0)
4744 {
4745 align = 0;
4746 }
4747 else if (strcmp (name, ".idata$4") == 0)
4748 {
4749 align = 2;
4750 }
4751 else if (strcmp (name, ".idata$5") == 0)
4752 {
4753 align = 2;
4754 }
4755 else if (strcmp (name, ".idata$6") == 0)
4756 {
4757 align = 1;
4758 }
4759 else
99a814a1
AM		 4760 /* Default alignment to 16 byte boundary. */
4761 align = 4;
252b5132
RH		 4762
4763 if (*input_line_pointer == ',')
4764 {
4765 ++input_line_pointer;
4766 SKIP_WHITESPACE ();
4767 if (*input_line_pointer != '"')
4768 exp = get_absolute_expression ();
4769 else
4770 {
4771 ++input_line_pointer;
4772 while (*input_line_pointer != '"'
4773 && ! is_end_of_line[(unsigned char) *input_line_pointer])
4774 {
4775 switch (*input_line_pointer)
4776 {
4777 /* Section Contents */
4778 case 'a': /* unknown */
4779 as_bad (_("Unsupported section attribute -- 'a'"));
4780 break;
4781 case 'c': /* code section */
81d4177b 4782 flags |= SEC_CODE;
252b5132
RH		 4783 break;
4784 case 'd': /* section has initialized data */
4785 flags |= SEC_DATA;
4786 break;
4787 case 'u': /* section has uninitialized data */
4788 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
4789 in winnt.h */
4790 flags |= SEC_ROM;
4791 break;
4792 case 'i': /* section contains directives (info) */
4793 /* FIXME: This is IMAGE_SCN_LNK_INFO
4794 in winnt.h */
4795 flags |= SEC_HAS_CONTENTS;
4796 break;
4797 case 'n': /* section can be discarded */
81d4177b 4798 flags &=~ SEC_LOAD;
252b5132
RH		 4799 break;
4800 case 'R': /* Remove section at link time */
4801 flags |= SEC_NEVER_LOAD;
4802 break;
8d452c78 4803#if IFLICT_BRAIN_DAMAGE
252b5132
RH		 4804 /* Section Protection */
4805 case 'r': /* section is readable */
4806 flags |= IMAGE_SCN_MEM_READ;
4807 break;
4808 case 'w': /* section is writeable */
4809 flags |= IMAGE_SCN_MEM_WRITE;
4810 break;
4811 case 'x': /* section is executable */
4812 flags |= IMAGE_SCN_MEM_EXECUTE;
4813 break;
4814 case 's': /* section is sharable */
4815 flags |= IMAGE_SCN_MEM_SHARED;
4816 break;
4817
4818 /* Section Alignment */
4819 case '0': /* align to byte boundary */
4820 flags |= IMAGE_SCN_ALIGN_1BYTES;
4821 align = 0;
4822 break;
4823 case '1': /* align to halfword boundary */
4824 flags |= IMAGE_SCN_ALIGN_2BYTES;
4825 align = 1;
4826 break;
4827 case '2': /* align to word boundary */
4828 flags |= IMAGE_SCN_ALIGN_4BYTES;
4829 align = 2;
4830 break;
4831 case '3': /* align to doubleword boundary */
4832 flags |= IMAGE_SCN_ALIGN_8BYTES;
4833 align = 3;
4834 break;
4835 case '4': /* align to quadword boundary */
4836 flags |= IMAGE_SCN_ALIGN_16BYTES;
4837 align = 4;
4838 break;
4839 case '5': /* align to 32 byte boundary */
4840 flags |= IMAGE_SCN_ALIGN_32BYTES;
4841 align = 5;
4842 break;
4843 case '6': /* align to 64 byte boundary */
4844 flags |= IMAGE_SCN_ALIGN_64BYTES;
4845 align = 6;
4846 break;
8d452c78 4847#endif
252b5132 4848 default:
99a814a1
AM		 4849 as_bad (_("unknown section attribute '%c'"),
4850 *input_line_pointer);
252b5132
RH		 4851 break;
4852 }
4853 ++input_line_pointer;
4854 }
4855 if (*input_line_pointer == '"')
4856 ++input_line_pointer;
4857 }
4858 }
4859
4860 sec = subseg_new (name, (subsegT) exp);
4861
99a814a1 4862 ppc_set_current_section (sec);
252b5132
RH		 4863
4864 if (flags != SEC_NO_FLAGS)
4865 {
4866 if (! bfd_set_section_flags (stdoutput, sec, flags))
4867 as_bad (_("error setting flags for \"%s\": %s"),
4868 bfd_section_name (stdoutput, sec),
4869 bfd_errmsg (bfd_get_error ()));
4870 }
4871
99a814a1 4872 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 4873}
4874
4875static void
98027b10 4876ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4877{
4878 char *name;
4879 char endc;
4880 symbolS *ext_sym;
4881
4882 name = input_line_pointer;
4883 endc = get_symbol_end ();
4884
4885 ext_sym = symbol_find_or_make (name);
4886
4887 *input_line_pointer = endc;
4888
4889 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4890 SF_SET_FUNCTION (ext_sym);
4891 SF_SET_PROCESS (ext_sym);
4892 coff_add_linesym (ext_sym);
4893
4894 demand_empty_rest_of_line ();
4895}
4896
4897static void
98027b10 4898ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4899{
4900 if (tocdata_section == 0)
4901 {
4902 tocdata_section = subseg_new (".tocd", 0);
99a814a1 4903 /* FIXME: section flags won't work. */
252b5132
RH		 4904 bfd_set_section_flags (stdoutput, tocdata_section,
4905 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 4906 | SEC_READONLY | SEC_DATA));
252b5132
RH		 4907
4908 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
4909 }
4910 else
4911 {
4912 rdata_section = subseg_new (".tocd", 0);
4913 }
4914
99a814a1 4915 ppc_set_current_section (tocdata_section);
252b5132
RH		 4916
4917 demand_empty_rest_of_line ();
4918}
4919
4920/* Don't adjust TOC relocs to use the section symbol. */
4921
4922int
98027b10 4923ppc_pe_fix_adjustable (fixS *fix)
252b5132
RH		 4924{
4925 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
4926}
4927
4928#endif
4929\f
4930#ifdef OBJ_XCOFF
4931
4932/* XCOFF specific symbol and file handling. */
4933
4934/* Canonicalize the symbol name. We use the to force the suffix, if
4935 any, to use square brackets, and to be in upper case. */
4936
4937char *
98027b10 4938ppc_canonicalize_symbol_name (char *name)
252b5132
RH		 4939{
4940 char *s;
4941
4942 if (ppc_stab_symbol)
4943 return name;
4944
4945 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
4946 ;
4947 if (*s != '\0')
4948 {
4949 char brac;
4950
4951 if (*s == '[')
4952 brac = ']';
4953 else
4954 {
4955 *s = '[';
4956 brac = '}';
4957 }
4958
4959 for (s++; *s != '\0' && *s != brac; s++)
3882b010 4960 *s = TOUPPER (*s);
252b5132
RH		 4961
4962 if (*s == '\0' || s[1] != '\0')
4963 as_bad (_("bad symbol suffix"));
4964
4965 *s = ']';
4966 }
4967
4968 return name;
4969}
4970
4971/* Set the class of a symbol based on the suffix, if any. This is
4972 called whenever a new symbol is created. */
4973
4974void
98027b10 4975ppc_symbol_new_hook (symbolS *sym)
252b5132 4976{
809ffe0d 4977 struct ppc_tc_sy *tc;
252b5132
RH		 4978 const char *s;
4979
809ffe0d
ILT		 4980 tc = symbol_get_tc (sym);
4981 tc->next = NULL;
4982 tc->output = 0;
96d56e9f 4983 tc->symbol_class = -1;
809ffe0d
ILT		 4984 tc->real_name = NULL;
4985 tc->subseg = 0;
4986 tc->align = 0;
4987 tc->size = NULL;
4988 tc->within = NULL;
252b5132
RH		 4989
4990 if (ppc_stab_symbol)
4991 return;
4992
4993 s = strchr (S_GET_NAME (sym), '[');
4994 if (s == (const char *) NULL)
4995 {
4996 /* There is no suffix. */
4997 return;
4998 }
4999
5000 ++s;
5001
5002 switch (s[0])
5003 {
5004 case 'B':
5005 if (strcmp (s, "BS]") == 0)
96d56e9f 5006 tc->symbol_class = XMC_BS;
252b5132
RH		 5007 break;
5008 case 'D':
5009 if (strcmp (s, "DB]") == 0)
96d56e9f 5010 tc->symbol_class = XMC_DB;
252b5132 5011 else if (strcmp (s, "DS]") == 0)
96d56e9f 5012 tc->symbol_class = XMC_DS;
252b5132
RH		 5013 break;
5014 case 'G':
5015 if (strcmp (s, "GL]") == 0)
96d56e9f 5016 tc->symbol_class = XMC_GL;
252b5132
RH		 5017 break;
5018 case 'P':
5019 if (strcmp (s, "PR]") == 0)
96d56e9f 5020 tc->symbol_class = XMC_PR;
252b5132
RH		 5021 break;
5022 case 'R':
5023 if (strcmp (s, "RO]") == 0)
96d56e9f 5024 tc->symbol_class = XMC_RO;
252b5132 5025 else if (strcmp (s, "RW]") == 0)
96d56e9f 5026 tc->symbol_class = XMC_RW;
252b5132
RH		 5027 break;
5028 case 'S':
5029 if (strcmp (s, "SV]") == 0)
96d56e9f 5030 tc->symbol_class = XMC_SV;
252b5132
RH		 5031 break;
5032 case 'T':
5033 if (strcmp (s, "TC]") == 0)
96d56e9f 5034 tc->symbol_class = XMC_TC;
252b5132 5035 else if (strcmp (s, "TI]") == 0)
96d56e9f 5036 tc->symbol_class = XMC_TI;
252b5132 5037 else if (strcmp (s, "TB]") == 0)
96d56e9f 5038 tc->symbol_class = XMC_TB;
252b5132 5039 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
96d56e9f 5040 tc->symbol_class = XMC_TC0;
252b5132
RH		 5041 break;
5042 case 'U':
5043 if (strcmp (s, "UA]") == 0)
96d56e9f 5044 tc->symbol_class = XMC_UA;
252b5132 5045 else if (strcmp (s, "UC]") == 0)
96d56e9f 5046 tc->symbol_class = XMC_UC;
252b5132
RH		 5047 break;
5048 case 'X':
5049 if (strcmp (s, "XO]") == 0)
96d56e9f 5050 tc->symbol_class = XMC_XO;
252b5132
RH		 5051 break;
5052 }
5053
96d56e9f 5054 if (tc->symbol_class == -1)
252b5132
RH		 5055 as_bad (_("Unrecognized symbol suffix"));
5056}
5057
5058/* Set the class of a label based on where it is defined. This
5059 handles symbols without suffixes. Also, move the symbol so that it
5060 follows the csect symbol. */
5061
5062void
98027b10 5063ppc_frob_label (symbolS *sym)
252b5132
RH		 5064{
5065 if (ppc_current_csect != (symbolS *) NULL)
5066 {
96d56e9f
NC		 5067 if (symbol_get_tc (sym)->symbol_class == -1)
5068 symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class;
252b5132
RH		 5069
5070 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 5071 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
5072 &symbol_rootP, &symbol_lastP);
5073 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132 5074 }
07a53e5c
RH		 5075
5076#ifdef OBJ_ELF
5077 dwarf2_emit_label (sym);
5078#endif
252b5132
RH		 5079}
5080
5081/* This variable is set by ppc_frob_symbol if any absolute symbols are
5082 seen. It tells ppc_adjust_symtab whether it needs to look through
5083 the symbols. */
5084
b34976b6 5085static bfd_boolean ppc_saw_abs;
252b5132
RH		 5086
5087/* Change the name of a symbol just before writing it out. Set the
5088 real name if the .rename pseudo-op was used. Otherwise, remove any
5089 class suffix. Return 1 if the symbol should not be included in the
5090 symbol table. */
5091
5092int
98027b10 5093ppc_frob_symbol (symbolS *sym)
252b5132
RH		 5094{
5095 static symbolS *ppc_last_function;
5096 static symbolS *set_end;
5097
5098 /* Discard symbols that should not be included in the output symbol
5099 table. */
809ffe0d
ILT		 5100 if (! symbol_used_in_reloc_p (sym)
5101 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 5102 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5103 && ! symbol_get_tc (sym)->output
252b5132
RH		 5104 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
5105 return 1;
5106
a161fe53
AM		 5107 /* This one will disappear anyway. Don't make a csect sym for it. */
5108 if (sym == abs_section_sym)
5109 return 1;
5110
809ffe0d
ILT		 5111 if (symbol_get_tc (sym)->real_name != (char *) NULL)
5112 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 5113 else
5114 {
5115 const char *name;
5116 const char *s;
5117
5118 name = S_GET_NAME (sym);
5119 s = strchr (name, '[');
5120 if (s != (char *) NULL)
5121 {
5122 unsigned int len;
5123 char *snew;
5124
5125 len = s - name;
5126 snew = xmalloc (len + 1);
5127 memcpy (snew, name, len);
5128 snew[len] = '\0';
5129
5130 S_SET_NAME (sym, snew);
5131 }
5132 }
5133
5134 if (set_end != (symbolS *) NULL)
5135 {
5136 SA_SET_SYM_ENDNDX (set_end, sym);
5137 set_end = NULL;
5138 }
5139
5140 if (SF_GET_FUNCTION (sym))
5141 {
5142 if (ppc_last_function != (symbolS *) NULL)
5143 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5144 ppc_last_function = sym;
809ffe0d 5145 if (symbol_get_tc (sym)->size != (symbolS *) NULL)
252b5132 5146 {
6386f3a7 5147 resolve_symbol_value (symbol_get_tc (sym)->size);
809ffe0d
ILT		 5148 SA_SET_SYM_FSIZE (sym,
5149 (long) S_GET_VALUE (symbol_get_tc (sym)->size));
252b5132
RH		 5150 }
5151 }
5152 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5153 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5154 {
5155 if (ppc_last_function == (symbolS *) NULL)
5156 as_bad (_(".ef with no preceding .function"));
5157 else
5158 {
5159 set_end = ppc_last_function;
5160 ppc_last_function = NULL;
5161
5162 /* We don't have a C_EFCN symbol, but we need to force the
5163 COFF backend to believe that it has seen one. */
5164 coff_last_function = NULL;
5165 }
5166 }
5167
670ec21d 5168 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5169 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 5170 && S_GET_STORAGE_CLASS (sym) != C_FILE
5171 && S_GET_STORAGE_CLASS (sym) != C_FCN
5172 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5173 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5174 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5175 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5176 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5177 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5178 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5179
5180 if (S_GET_STORAGE_CLASS (sym) == C_EXT
8602d4fe 5181 || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT
252b5132
RH		 5182 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5183 {
5184 int i;
5185 union internal_auxent *a;
5186
5187 /* Create a csect aux. */
5188 i = S_GET_NUMBER_AUXILIARY (sym);
5189 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d 5190 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
96d56e9f 5191 if (symbol_get_tc (sym)->symbol_class == XMC_TC0)
252b5132
RH		 5192 {
5193 /* This is the TOC table. */
5194 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5195 a->x_csect.x_scnlen.l = 0;
5196 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5197 }
809ffe0d 5198 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 5199 {
5200 /* This is a csect symbol. x_scnlen is the size of the
5201 csect. */
809ffe0d 5202 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 5203 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5204 S_GET_SEGMENT (sym))
5205 - S_GET_VALUE (sym));
5206 else
5207 {
6386f3a7 5208 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 5209 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 5210 - S_GET_VALUE (sym));
5211 }
809ffe0d 5212 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 5213 }
5214 else if (S_GET_SEGMENT (sym) == bss_section)
5215 {
5216 /* This is a common symbol. */
809ffe0d
ILT		 5217 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5218 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 5219 if (S_IS_EXTERNAL (sym))
96d56e9f 5220 symbol_get_tc (sym)->symbol_class = XMC_RW;
252b5132 5221 else
96d56e9f 5222 symbol_get_tc (sym)->symbol_class = XMC_BS;
252b5132
RH		 5223 }
5224 else if (S_GET_SEGMENT (sym) == absolute_section)
5225 {
5226 /* This is an absolute symbol. The csect will be created by
99a814a1 5227 ppc_adjust_symtab. */
b34976b6 5228 ppc_saw_abs = TRUE;
252b5132 5229 a->x_csect.x_smtyp = XTY_LD;
96d56e9f
NC		 5230 if (symbol_get_tc (sym)->symbol_class == -1)
5231 symbol_get_tc (sym)->symbol_class = XMC_XO;
252b5132
RH		 5232 }
5233 else if (! S_IS_DEFINED (sym))
5234 {
5235 /* This is an external symbol. */
5236 a->x_csect.x_scnlen.l = 0;
5237 a->x_csect.x_smtyp = XTY_ER;
5238 }
96d56e9f 5239 else if (symbol_get_tc (sym)->symbol_class == XMC_TC)
252b5132
RH		 5240 {
5241 symbolS *next;
5242
5243 /* This is a TOC definition. x_scnlen is the size of the
5244 TOC entry. */
5245 next = symbol_next (sym);
96d56e9f 5246 while (symbol_get_tc (next)->symbol_class == XMC_TC0)
252b5132
RH		 5247 next = symbol_next (next);
5248 if (next == (symbolS *) NULL
96d56e9f 5249 || symbol_get_tc (next)->symbol_class != XMC_TC)
252b5132
RH		 5250 {
5251 if (ppc_after_toc_frag == (fragS *) NULL)
5252 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5253 data_section)
5254 - S_GET_VALUE (sym));
5255 else
5256 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5257 - S_GET_VALUE (sym));
5258 }
5259 else
5260 {
6386f3a7 5261 resolve_symbol_value (next);
252b5132
RH		 5262 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5263 - S_GET_VALUE (sym));
5264 }
5265 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5266 }
5267 else
5268 {
5269 symbolS *csect;
5270
5271 /* This is a normal symbol definition. x_scnlen is the
5272 symbol index of the containing csect. */
5273 if (S_GET_SEGMENT (sym) == text_section)
5274 csect = ppc_text_csects;
5275 else if (S_GET_SEGMENT (sym) == data_section)
5276 csect = ppc_data_csects;
5277 else
5278 abort ();
5279
5280 /* Skip the initial dummy symbol. */
809ffe0d 5281 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5282
5283 if (csect == (symbolS *) NULL)
5284 {
5285 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5286 a->x_csect.x_scnlen.l = 0;
5287 }
5288 else
5289 {
809ffe0d 5290 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5291 {
6386f3a7 5292 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5293 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5294 > S_GET_VALUE (sym))
252b5132 5295 break;
809ffe0d 5296 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5297 }
5298
809ffe0d
ILT		 5299 a->x_csect.x_scnlen.p =
5300 coffsymbol (symbol_get_bfdsym (csect))->native;
5301 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5302 1;
252b5132
RH		 5303 }
5304 a->x_csect.x_smtyp = XTY_LD;
5305 }
81d4177b 5306
252b5132
RH		 5307 a->x_csect.x_parmhash = 0;
5308 a->x_csect.x_snhash = 0;
96d56e9f 5309 if (symbol_get_tc (sym)->symbol_class == -1)
252b5132
RH		 5310 a->x_csect.x_smclas = XMC_PR;
5311 else
96d56e9f 5312 a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class;
252b5132
RH		 5313 a->x_csect.x_stab = 0;
5314 a->x_csect.x_snstab = 0;
5315
5316 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5317 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5318 }
5319 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5320 {
5321 /* We want the value to be the symbol index of the referenced
5322 csect symbol. BFD will do that for us if we set the right
5323 flags. */
b782de16
AM		 5324 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5325 combined_entry_type *c = coffsymbol (bsym)->native;
5326
5327 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5328 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5329 }
5330 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5331 {
5332 symbolS *block;
5333 symbolS *csect;
5334
5335 /* The value is the offset from the enclosing csect. */
809ffe0d
ILT		 5336 block = symbol_get_tc (sym)->within;
5337 csect = symbol_get_tc (block)->within;
6386f3a7 5338 resolve_symbol_value (csect);
252b5132
RH		 5339 S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
5340 }
5341 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5342 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5343 {
5344 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 5345 BFD will do that for us if we set the right flags. We have
5346 already set the value correctly. */
809ffe0d 5347 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 5348 }
5349
5350 return 0;
5351}
5352
5353/* Adjust the symbol table. This creates csect symbols for all
5354 absolute symbols. */
5355
5356void
98027b10 5357ppc_adjust_symtab (void)
252b5132
RH		 5358{
5359 symbolS *sym;
5360
5361 if (! ppc_saw_abs)
5362 return;
5363
5364 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5365 {
5366 symbolS *csect;
5367 int i;
5368 union internal_auxent *a;
5369
5370 if (S_GET_SEGMENT (sym) != absolute_section)
5371 continue;
5372
5373 csect = symbol_create (".abs[XO]", absolute_section,
5374 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5375 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 5376 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5377 i = S_GET_NUMBER_AUXILIARY (csect);
5378 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5379 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 5380 a->x_csect.x_scnlen.l = 0;
5381 a->x_csect.x_smtyp = XTY_SD;
5382 a->x_csect.x_parmhash = 0;
5383 a->x_csect.x_snhash = 0;
5384 a->x_csect.x_smclas = XMC_XO;
5385 a->x_csect.x_stab = 0;
5386 a->x_csect.x_snstab = 0;
5387
5388 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5389
5390 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 5391 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5392 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5393 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 5394 }
5395
b34976b6 5396 ppc_saw_abs = FALSE;
252b5132
RH		 5397}
5398
5399/* Set the VMA for a section. This is called on all the sections in
5400 turn. */
5401
5402void
98027b10 5403ppc_frob_section (asection *sec)
252b5132 5404{
931e13a6 5405 static bfd_vma vma = 0;
252b5132 5406
931e13a6 5407 vma = md_section_align (sec, vma);
252b5132
RH		 5408 bfd_set_section_vma (stdoutput, sec, vma);
5409 vma += bfd_section_size (stdoutput, sec);
5410}
5411
5412#endif /* OBJ_XCOFF */
5413\f
252b5132 5414char *
98027b10 5415md_atof (int type, char *litp, int *sizep)
252b5132 5416{
499ac353 5417 return ieee_md_atof (type, litp, sizep, target_big_endian);
252b5132
RH		 5418}
5419
5420/* Write a value out to the object file, using the appropriate
5421 endianness. */
5422
5423void
98027b10 5424md_number_to_chars (char *buf, valueT val, int n)
252b5132
RH		 5425{
5426 if (target_big_endian)
5427 number_to_chars_bigendian (buf, val, n);
5428 else
5429 number_to_chars_littleendian (buf, val, n);
5430}
5431
5432/* Align a section (I don't know why this is machine dependent). */
5433
5434valueT
3aeeedbb 5435md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
252b5132 5436{
3aeeedbb
AM		 5437#ifdef OBJ_ELF
5438 return addr;
5439#else
252b5132
RH		 5440 int align = bfd_get_section_alignment (stdoutput, seg);
5441
5442 return ((addr + (1 << align) - 1) & (-1 << align));
3aeeedbb 5443#endif
252b5132
RH		 5444}
5445
5446/* We don't have any form of relaxing. */
5447
5448int
98027b10
AM		 5449md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
5450 asection *seg ATTRIBUTE_UNUSED)
252b5132
RH		 5451{
5452 abort ();
5453 return 0;
5454}
5455
5456/* Convert a machine dependent frag. We never generate these. */
5457
5458void
98027b10
AM		 5459md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
5460 asection *sec ATTRIBUTE_UNUSED,
5461 fragS *fragp ATTRIBUTE_UNUSED)
252b5132
RH		 5462{
5463 abort ();
5464}
5465
5466/* We have no need to default values of symbols. */
5467
252b5132 5468symbolS *
98027b10 5469md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
252b5132
RH		 5470{
5471 return 0;
5472}
5473\f
5474/* Functions concerning relocs. */
5475
5476/* The location from which a PC relative jump should be calculated,
5477 given a PC relative reloc. */
5478
5479long
98027b10 5480md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
252b5132
RH		 5481{
5482 return fixp->fx_frag->fr_address + fixp->fx_where;
5483}
5484
5485#ifdef OBJ_XCOFF
5486
5487/* This is called to see whether a fixup should be adjusted to use a
5488 section symbol. We take the opportunity to change a fixup against
5489 a symbol in the TOC subsegment into a reloc against the
5490 corresponding .tc symbol. */
5491
5492int
98027b10 5493ppc_fix_adjustable (fixS *fix)
252b5132 5494{
b782de16
AM		 5495 valueT val = resolve_symbol_value (fix->fx_addsy);
5496 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5497 TC_SYMFIELD_TYPE *tc;
5498
5499 if (symseg == absolute_section)
5500 return 0;
252b5132 5501
252b5132 5502 if (ppc_toc_csect != (symbolS *) NULL
252b5132 5503 && fix->fx_addsy != ppc_toc_csect
b782de16 5504 && symseg == data_section
252b5132
RH		 5505 && val >= ppc_toc_frag->fr_address
5506 && (ppc_after_toc_frag == (fragS *) NULL
5507 || val < ppc_after_toc_frag->fr_address))
5508 {
5509 symbolS *sy;
5510
5511 for (sy = symbol_next (ppc_toc_csect);
5512 sy != (symbolS *) NULL;
5513 sy = symbol_next (sy))
5514 {
b782de16
AM		 5515 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5516
96d56e9f 5517 if (sy_tc->symbol_class == XMC_TC0)
252b5132 5518 continue;
96d56e9f 5519 if (sy_tc->symbol_class != XMC_TC)
252b5132 5520 break;
b782de16 5521 if (val == resolve_symbol_value (sy))
252b5132
RH		 5522 {
5523 fix->fx_addsy = sy;
5524 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5525 return 0;
5526 }
5527 }
5528
5529 as_bad_where (fix->fx_file, fix->fx_line,
5530 _("symbol in .toc does not match any .tc"));
5531 }
5532
5533 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 5534 tc = symbol_get_tc (fix->fx_addsy);
5535 if (tc->subseg == 0
96d56e9f
NC		 5536 && tc->symbol_class != XMC_TC0
5537 && tc->symbol_class != XMC_TC
b782de16 5538 && symseg != bss_section
252b5132 5539 /* Don't adjust if this is a reloc in the toc section. */
b782de16 5540 && (symseg != data_section
252b5132
RH		 5541 || ppc_toc_csect == NULL
5542 || val < ppc_toc_frag->fr_address
5543 || (ppc_after_toc_frag != NULL
5544 && val >= ppc_after_toc_frag->fr_address)))
5545 {
5546 symbolS *csect;
b782de16 5547 symbolS *next_csect;
252b5132 5548
b782de16 5549 if (symseg == text_section)
252b5132 5550 csect = ppc_text_csects;
b782de16 5551 else if (symseg == data_section)
252b5132
RH		 5552 csect = ppc_data_csects;
5553 else
5554 abort ();
5555
5556 /* Skip the initial dummy symbol. */
809ffe0d 5557 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5558
5559 if (csect != (symbolS *) NULL)
5560 {
b782de16
AM		 5561 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5562 && (symbol_get_frag (next_csect)->fr_address <= val))
252b5132
RH		 5563 {
5564 /* If the csect address equals the symbol value, then we
99a814a1
AM		 5565 have to look through the full symbol table to see
5566 whether this is the csect we want. Note that we will
5567 only get here if the csect has zero length. */
b782de16
AM		 5568 if (symbol_get_frag (csect)->fr_address == val
5569 && S_GET_VALUE (csect) == val)
252b5132
RH		 5570 {
5571 symbolS *scan;
5572
809ffe0d 5573 for (scan = symbol_next (csect);
252b5132 5574 scan != NULL;
809ffe0d 5575 scan = symbol_next (scan))
252b5132 5576 {
809ffe0d 5577 if (symbol_get_tc (scan)->subseg != 0)
252b5132
RH		 5578 break;
5579 if (scan == fix->fx_addsy)
5580 break;
5581 }
5582
5583 /* If we found the symbol before the next csect
99a814a1 5584 symbol, then this is the csect we want. */
252b5132
RH		 5585 if (scan == fix->fx_addsy)
5586 break;
5587 }
5588
b782de16 5589 csect = next_csect;
252b5132
RH		 5590 }
5591
b782de16 5592 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
252b5132
RH		 5593 fix->fx_addsy = csect;
5594 }
b782de16 5595 return 0;
252b5132
RH		 5596 }
5597
5598 /* Adjust a reloc against a .lcomm symbol to be against the base
5599 .lcomm. */
b782de16 5600 if (symseg == bss_section
252b5132
RH		 5601 && ! S_IS_EXTERNAL (fix->fx_addsy))
5602 {
b782de16
AM		 5603 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5604
5605 fix->fx_offset += val - resolve_symbol_value (sy);
5606 fix->fx_addsy = sy;
252b5132
RH		 5607 }
5608
5609 return 0;
5610}
5611
5612/* A reloc from one csect to another must be kept. The assembler
5613 will, of course, keep relocs between sections, and it will keep
5614 absolute relocs, but we need to force it to keep PC relative relocs
5615 between two csects in the same section. */
5616
5617int
98027b10 5618ppc_force_relocation (fixS *fix)
252b5132
RH		 5619{
5620 /* At this point fix->fx_addsy should already have been converted to
5621 a csect symbol. If the csect does not include the fragment, then
5622 we need to force the relocation. */
5623 if (fix->fx_pcrel
5624 && fix->fx_addsy != NULL
809ffe0d
ILT		 5625 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5626 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5627 > fix->fx_frag->fr_address)
5628 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5629 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 5630 <= fix->fx_frag->fr_address))))
5631 return 1;
5632
ae6063d4 5633 return generic_force_reloc (fix);
252b5132
RH		 5634}
5635
5636#endif /* OBJ_XCOFF */
5637
0baf16f2 5638#ifdef OBJ_ELF
a161fe53
AM		 5639/* If this function returns non-zero, it guarantees that a relocation
5640 will be emitted for a fixup. */
5641
5642int
98027b10 5643ppc_force_relocation (fixS *fix)
a161fe53
AM		 5644{
5645 /* Branch prediction relocations must force a relocation, as must
5646 the vtable description relocs. */
5647 switch (fix->fx_r_type)
5648 {
5649 case BFD_RELOC_PPC_B16_BRTAKEN:
5650 case BFD_RELOC_PPC_B16_BRNTAKEN:
5651 case BFD_RELOC_PPC_BA16_BRTAKEN:
5652 case BFD_RELOC_PPC_BA16_BRNTAKEN:
c744ecf2 5653 case BFD_RELOC_24_PLT_PCREL:
a161fe53 5654 case BFD_RELOC_PPC64_TOC:
a161fe53
AM		 5655 return 1;
5656 default:
5657 break;
5658 }
5659
cdba85ec
AM		 5660 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5661 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5662 return 1;
5663
ae6063d4 5664 return generic_force_reloc (fix);
a161fe53
AM		 5665}
5666
0baf16f2 5667int
98027b10 5668ppc_fix_adjustable (fixS *fix)
252b5132 5669{
0baf16f2
AM		 5670 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5671 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5672 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5673 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
5674 && fix->fx_r_type != BFD_RELOC_GPREL16
5675 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5676 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 5677 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 5678 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 5679}
0baf16f2 5680#endif
252b5132 5681
3aeeedbb
AM		 5682/* Implement HANDLE_ALIGN. This writes the NOP pattern into an
5683 rs_align_code frag. */
5684
5685void
5686ppc_handle_align (struct frag *fragP)
5687{
5688 valueT count = (fragP->fr_next->fr_address
5689 - (fragP->fr_address + fragP->fr_fix));
5690
5691 if (count != 0 && (count & 3) == 0)
5692 {
5693 char *dest = fragP->fr_literal + fragP->fr_fix;
5694
5695 fragP->fr_var = 4;
5696 md_number_to_chars (dest, 0x60000000, 4);
5697
42240548
PB		 5698 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0
5699 || (ppc_cpu & PPC_OPCODE_POWER7) != 0)
3aeeedbb 5700 {
42240548
PB		 5701 /* For power6 and power7, we want the last nop to be a group
5702 terminating one. Do this by inserting an rs_fill frag immediately
5703 after this one, with its address set to the last nop location.
5704 This will automatically reduce the number of nops in the current
5705 frag by one. */
3aeeedbb
AM		 5706 if (count > 4)
5707 {
5708 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
5709
5710 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
5711 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
5712 group_nop->fr_fix = 0;
5713 group_nop->fr_offset = 1;
5714 group_nop->fr_type = rs_fill;
5715 fragP->fr_next = group_nop;
5716 dest = group_nop->fr_literal;
5717 }
5718
42240548
PB		 5719 if ((ppc_cpu & PPC_OPCODE_POWER7) != 0)
5720 /* power7 group terminating nop: "ori 2,2,0". */
5721 md_number_to_chars (dest, 0x60420000, 4);
5722 else
5723 /* power6 group terminating nop: "ori 1,1,0". */
5724 md_number_to_chars (dest, 0x60210000, 4);
3aeeedbb
AM		 5725 }
5726 }
5727}
5728
252b5132
RH		 5729/* Apply a fixup to the object code. This is called for all the
5730 fixups we generated by the call to fix_new_exp, above. In the call
5731 above we used a reloc code which was the largest legal reloc code
5732 plus the operand index. Here we undo that to recover the operand
5733 index. At this point all symbol values should be fully resolved,
5734 and we attempt to completely resolve the reloc. If we can not do
5735 that, we determine the correct reloc code and put it back in the
5736 fixup. */
5737
94f592af 5738void
98027b10 5739md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
252b5132 5740{
94f592af 5741 valueT value = * valP;
252b5132
RH		 5742
5743#ifdef OBJ_ELF
94f592af 5744 if (fixP->fx_addsy != NULL)
252b5132 5745 {
a161fe53 5746 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 5747 if (fixP->fx_pcrel)
5748 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 5749 }
5750 else
94f592af 5751 fixP->fx_done = 1;
252b5132 5752#else
a161fe53 5753 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7be1c489
AM		 5754 the symbol values. If we are doing this relocation the code in
5755 write.c is going to call bfd_install_relocation, which is also
5756 going to use the symbol value. That means that if the reloc is
5757 fully resolved we want to use *valP since bfd_install_relocation is
5758 not being used.
9f0eb232
RS		 5759 However, if the reloc is not fully resolved we do not want to
5760 use *valP, and must use fx_offset instead. If the relocation
5761 is PC-relative, we then need to re-apply md_pcrel_from_section
5762 to this new relocation value. */
94f592af
NC		 5763 if (fixP->fx_addsy == (symbolS *) NULL)
5764 fixP->fx_done = 1;
5765
252b5132 5766 else
9f0eb232
RS		 5767 {
5768 value = fixP->fx_offset;
5769 if (fixP->fx_pcrel)
5770 value -= md_pcrel_from_section (fixP, seg);
5771 }
a161fe53
AM		 5772#endif
5773
5774 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 5775 {
a161fe53
AM		 5776 /* We can't actually support subtracting a symbol. */
5777 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 5778 }
252b5132 5779
94f592af 5780 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132
RH		 5781 {
5782 int opindex;
5783 const struct powerpc_operand *operand;
5784 char *where;
5785 unsigned long insn;
5786
94f592af 5787 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
252b5132
RH		 5788
5789 operand = &powerpc_operands[opindex];
5790
5791#ifdef OBJ_XCOFF
0baf16f2
AM		 5792 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
5793 does not generate a reloc. It uses the offset of `sym' within its
5794 csect. Other usages, such as `.long sym', generate relocs. This
5795 is the documented behaviour of non-TOC symbols. */
252b5132 5796 if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5797 && (operand->bitm & 0xfff0) == 0xfff0
252b5132 5798 && operand->shift == 0
2b3c4602 5799 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 5800 && fixP->fx_addsy != NULL
5801 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
96d56e9f
NC		 5802 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC
5803 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0
94f592af 5804 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 5805 {
94f592af
NC		 5806 value = fixP->fx_offset;
5807 fixP->fx_done = 1;
252b5132
RH		 5808 }
5809#endif
5810
5811 /* Fetch the instruction, insert the fully resolved operand
5812 value, and stuff the instruction back again. */
94f592af 5813 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH		 5814 if (target_big_endian)
5815 insn = bfd_getb32 ((unsigned char *) where);
5816 else
5817 insn = bfd_getl32 ((unsigned char *) where);
5818 insn = ppc_insert_operand (insn, operand, (offsetT) value,
783de163 5819 fixP->tc_fix_data.ppc_cpu,
94f592af 5820 fixP->fx_file, fixP->fx_line);
252b5132
RH		 5821 if (target_big_endian)
5822 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5823 else
5824 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5825
94f592af
NC		 5826 if (fixP->fx_done)
5827 /* Nothing else to do here. */
5828 return;
252b5132 5829
9c2799c2 5830 gas_assert (fixP->fx_addsy != NULL);
0baf16f2 5831
252b5132
RH		 5832 /* Determine a BFD reloc value based on the operand information.
5833 We are only prepared to turn a few of the operands into
0baf16f2 5834 relocs. */
11b37b7b 5835 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5836 && operand->bitm == 0x3fffffc
11b37b7b 5837 && operand->shift == 0)
94f592af 5838 fixP->fx_r_type = BFD_RELOC_PPC_B26;
11b37b7b 5839 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5840 && operand->bitm == 0xfffc
11b37b7b 5841 && operand->shift == 0)
95210096
AM		 5842 {
5843 fixP->fx_r_type = BFD_RELOC_PPC_B16;
5844#ifdef OBJ_XCOFF
5845 fixP->fx_size = 2;
5846 if (target_big_endian)
5847 fixP->fx_where += 2;
5848#endif
5849 }
11b37b7b 5850 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5851 && operand->bitm == 0x3fffffc
11b37b7b 5852 && operand->shift == 0)
94f592af 5853 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
11b37b7b 5854 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5855 && operand->bitm == 0xfffc
11b37b7b 5856 && operand->shift == 0)
95210096
AM		 5857 {
5858 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
5859#ifdef OBJ_XCOFF
5860 fixP->fx_size = 2;
5861 if (target_big_endian)
5862 fixP->fx_where += 2;
5863#endif
5864 }
0baf16f2 5865#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
11b37b7b 5866 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5867 && (operand->bitm & 0xfff0) == 0xfff0
a7fc733f 5868 && operand->shift == 0)
11b37b7b 5869 {
a7fc733f
AM		 5870 if (ppc_is_toc_sym (fixP->fx_addsy))
5871 {
5872 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
0baf16f2 5873#ifdef OBJ_ELF
a7fc733f
AM		 5874 if (ppc_obj64
5875 && (operand->flags & PPC_OPERAND_DS) != 0)
5876 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
5877#endif
5878 }
5879 else
5880 {
5881 fixP->fx_r_type = BFD_RELOC_16;
5882#ifdef OBJ_ELF
5883 if (ppc_obj64
5884 && (operand->flags & PPC_OPERAND_DS) != 0)
5885 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
0baf16f2 5886#endif
a7fc733f 5887 }
94f592af 5888 fixP->fx_size = 2;
11b37b7b 5889 if (target_big_endian)
94f592af 5890 fixP->fx_where += 2;
11b37b7b 5891 }
0baf16f2 5892#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
11b37b7b 5893 else
252b5132
RH		 5894 {
5895 char *sfile;
5896 unsigned int sline;
5897
5898 /* Use expr_symbol_where to see if this is an expression
0baf16f2 5899 symbol. */
94f592af
NC		 5900 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
5901 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH		 5902 _("unresolved expression that must be resolved"));
5903 else
94f592af 5904 as_bad_where (fixP->fx_file, fixP->fx_line,
0baf16f2 5905 _("unsupported relocation against %s"),
94f592af
NC		 5906 S_GET_NAME (fixP->fx_addsy));
5907 fixP->fx_done = 1;
5908 return;
252b5132
RH		 5909 }
5910 }
5911 else
5912 {
5913#ifdef OBJ_ELF
94f592af 5914 ppc_elf_validate_fix (fixP, seg);
252b5132 5915#endif
94f592af 5916 switch (fixP->fx_r_type)
252b5132 5917 {
252b5132 5918 case BFD_RELOC_CTOR:
2b3c4602 5919 if (ppc_obj64)
9c7977b3
AM		 5920 goto ctor64;
5921 /* fall through */
5922
0baf16f2 5923 case BFD_RELOC_32:
94f592af
NC		 5924 if (fixP->fx_pcrel)
5925 fixP->fx_r_type = BFD_RELOC_32_PCREL;
99a814a1 5926 /* fall through */
252b5132
RH		 5927
5928 case BFD_RELOC_RVA:
5929 case BFD_RELOC_32_PCREL:
252b5132 5930 case BFD_RELOC_PPC_EMB_NADDR32:
94f592af 5931 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5932 value, 4);
5933 break;
5934
7f6d05e8 5935 case BFD_RELOC_64:
9c7977b3 5936 ctor64:
94f592af
NC		 5937 if (fixP->fx_pcrel)
5938 fixP->fx_r_type = BFD_RELOC_64_PCREL;
99a814a1 5939 /* fall through */
0baf16f2 5940
7f6d05e8 5941 case BFD_RELOC_64_PCREL:
94f592af 5942 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7f6d05e8 5943 value, 8);
81d4177b 5944 break;
0baf16f2 5945
252b5132
RH		 5946 case BFD_RELOC_GPREL16:
5947 case BFD_RELOC_16_GOT_PCREL:
5948 case BFD_RELOC_16_GOTOFF:
5949 case BFD_RELOC_LO16_GOTOFF:
5950 case BFD_RELOC_HI16_GOTOFF:
5951 case BFD_RELOC_HI16_S_GOTOFF:
1cfc59d5 5952 case BFD_RELOC_16_BASEREL:
252b5132
RH		 5953 case BFD_RELOC_LO16_BASEREL:
5954 case BFD_RELOC_HI16_BASEREL:
5955 case BFD_RELOC_HI16_S_BASEREL:
5956 case BFD_RELOC_PPC_EMB_NADDR16:
5957 case BFD_RELOC_PPC_EMB_NADDR16_LO:
5958 case BFD_RELOC_PPC_EMB_NADDR16_HI:
5959 case BFD_RELOC_PPC_EMB_NADDR16_HA:
5960 case BFD_RELOC_PPC_EMB_SDAI16:
5961 case BFD_RELOC_PPC_EMB_SDA2REL:
5962 case BFD_RELOC_PPC_EMB_SDA2I16:
5963 case BFD_RELOC_PPC_EMB_RELSEC16:
5964 case BFD_RELOC_PPC_EMB_RELST_LO:
5965 case BFD_RELOC_PPC_EMB_RELST_HI:
5966 case BFD_RELOC_PPC_EMB_RELST_HA:
5967 case BFD_RELOC_PPC_EMB_RELSDA:
5968 case BFD_RELOC_PPC_TOC16:
0baf16f2 5969#ifdef OBJ_ELF
0baf16f2
AM		 5970 case BFD_RELOC_PPC64_TOC16_LO:
5971 case BFD_RELOC_PPC64_TOC16_HI:
5972 case BFD_RELOC_PPC64_TOC16_HA:
0baf16f2 5973#endif
94f592af 5974 if (fixP->fx_pcrel)
252b5132 5975 {
94f592af
NC		 5976 if (fixP->fx_addsy != NULL)
5977 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5978 _("cannot emit PC relative %s relocation against %s"),
94f592af
NC		 5979 bfd_get_reloc_code_name (fixP->fx_r_type),
5980 S_GET_NAME (fixP->fx_addsy));
252b5132 5981 else
94f592af 5982 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5983 _("cannot emit PC relative %s relocation"),
94f592af 5984 bfd_get_reloc_code_name (fixP->fx_r_type));
252b5132
RH		 5985 }
5986
94f592af 5987 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5988 value, 2);
5989 break;
5990
3c9d25f4
AM		 5991 case BFD_RELOC_16:
5992 if (fixP->fx_pcrel)
5993 fixP->fx_r_type = BFD_RELOC_16_PCREL;
5994 /* fall through */
5995
5996 case BFD_RELOC_16_PCREL:
5997 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5998 value, 2);
5999 break;
6000
6001 case BFD_RELOC_LO16:
6002 if (fixP->fx_pcrel)
6003 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
6004 /* fall through */
6005
6006 case BFD_RELOC_LO16_PCREL:
6007 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6008 value, 2);
6009 break;
6010
252b5132
RH		 6011 /* This case happens when you write, for example,
6012 lis %r3,(L1-L2)@ha
6013 where L1 and L2 are defined later. */
6014 case BFD_RELOC_HI16:
94f592af 6015 if (fixP->fx_pcrel)
3c9d25f4
AM		 6016 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
6017 /* fall through */
6018
6019 case BFD_RELOC_HI16_PCREL:
94f592af 6020 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 6021 PPC_HI (value), 2);
252b5132 6022 break;
0baf16f2 6023
252b5132 6024 case BFD_RELOC_HI16_S:
94f592af 6025 if (fixP->fx_pcrel)
3c9d25f4
AM		 6026 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
6027 /* fall through */
6028
6029 case BFD_RELOC_HI16_S_PCREL:
94f592af 6030 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6031 PPC_HA (value), 2);
6032 break;
6033
6034#ifdef OBJ_ELF
0baf16f2 6035 case BFD_RELOC_PPC64_HIGHER:
94f592af 6036 if (fixP->fx_pcrel)
0baf16f2 6037 abort ();
94f592af 6038 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 6039 PPC_HIGHER (value), 2);
252b5132
RH		 6040 break;
6041
0baf16f2 6042 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 6043 if (fixP->fx_pcrel)
0baf16f2 6044 abort ();
94f592af 6045 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6046 PPC_HIGHERA (value), 2);
6047 break;
6048
6049 case BFD_RELOC_PPC64_HIGHEST:
94f592af 6050 if (fixP->fx_pcrel)
0baf16f2 6051 abort ();
94f592af 6052 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6053 PPC_HIGHEST (value), 2);
6054 break;
6055
6056 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 6057 if (fixP->fx_pcrel)
0baf16f2 6058 abort ();
94f592af 6059 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6060 PPC_HIGHESTA (value), 2);
6061 break;
6062
6063 case BFD_RELOC_PPC64_ADDR16_DS:
6064 case BFD_RELOC_PPC64_ADDR16_LO_DS:
6065 case BFD_RELOC_PPC64_GOT16_DS:
6066 case BFD_RELOC_PPC64_GOT16_LO_DS:
6067 case BFD_RELOC_PPC64_PLT16_LO_DS:
6068 case BFD_RELOC_PPC64_SECTOFF_DS:
6069 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
6070 case BFD_RELOC_PPC64_TOC16_DS:
6071 case BFD_RELOC_PPC64_TOC16_LO_DS:
6072 case BFD_RELOC_PPC64_PLTGOT16_DS:
6073 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
94f592af 6074 if (fixP->fx_pcrel)
0baf16f2
AM		 6075 abort ();
6076 {
2132e3a3 6077 char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
3d8aea2f 6078 unsigned long val, mask;
0baf16f2
AM		 6079
6080 if (target_big_endian)
adadcc0c 6081 val = bfd_getb32 (where - 2);
0baf16f2 6082 else
adadcc0c
AM		 6083 val = bfd_getl32 (where);
6084 mask = 0xfffc;
6085 /* lq insns reserve the four lsbs. */
6086 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
77a6138a 6087 && (val & (0x3f << 26)) == (56u << 26))
adadcc0c
AM		 6088 mask = 0xfff0;
6089 val |= value & mask;
0baf16f2
AM		 6090 if (target_big_endian)
6091 bfd_putb16 ((bfd_vma) val, where);
6092 else
6093 bfd_putl16 ((bfd_vma) val, where);
6094 }
6095 break;
cdba85ec 6096
ba0b2174
AM		 6097 case BFD_RELOC_PPC_B16_BRTAKEN:
6098 case BFD_RELOC_PPC_B16_BRNTAKEN:
6099 case BFD_RELOC_PPC_BA16_BRTAKEN:
6100 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6101 break;
6102
cdba85ec 6103 case BFD_RELOC_PPC_TLS:
727fc41e
AM		 6104 case BFD_RELOC_PPC_TLSGD:
6105 case BFD_RELOC_PPC_TLSLD:
7c1d0959
L		 6106 break;
6107
cdba85ec
AM		 6108 case BFD_RELOC_PPC_DTPMOD:
6109 case BFD_RELOC_PPC_TPREL16:
6110 case BFD_RELOC_PPC_TPREL16_LO:
6111 case BFD_RELOC_PPC_TPREL16_HI:
6112 case BFD_RELOC_PPC_TPREL16_HA:
6113 case BFD_RELOC_PPC_TPREL:
6114 case BFD_RELOC_PPC_DTPREL16:
6115 case BFD_RELOC_PPC_DTPREL16_LO:
6116 case BFD_RELOC_PPC_DTPREL16_HI:
6117 case BFD_RELOC_PPC_DTPREL16_HA:
6118 case BFD_RELOC_PPC_DTPREL:
6119 case BFD_RELOC_PPC_GOT_TLSGD16:
6120 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6121 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6122 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6123 case BFD_RELOC_PPC_GOT_TLSLD16:
6124 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6125 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6126 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6127 case BFD_RELOC_PPC_GOT_TPREL16:
6128 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6129 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6130 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6131 case BFD_RELOC_PPC_GOT_DTPREL16:
6132 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6133 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6134 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6135 case BFD_RELOC_PPC64_TPREL16_DS:
6136 case BFD_RELOC_PPC64_TPREL16_LO_DS:
6137 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6138 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6139 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6140 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6141 case BFD_RELOC_PPC64_DTPREL16_DS:
6142 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6143 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6144 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6145 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6146 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
7c1d0959 6147 S_SET_THREAD_LOCAL (fixP->fx_addsy);
cdba85ec 6148 break;
0baf16f2 6149#endif
252b5132 6150 /* Because SDA21 modifies the register field, the size is set to 4
99a814a1 6151 bytes, rather than 2, so offset it here appropriately. */
252b5132 6152 case BFD_RELOC_PPC_EMB_SDA21:
94f592af 6153 if (fixP->fx_pcrel)
252b5132
RH		 6154 abort ();
6155
94f592af 6156 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
252b5132
RH		 6157 + ((target_big_endian) ? 2 : 0),
6158 value, 2);
6159 break;
6160
6161 case BFD_RELOC_8:
94f592af 6162 if (fixP->fx_pcrel)
31a91399
NC		 6163 {
6164 /* This can occur if there is a bug in the input assembler, eg:
b7d7dc63 6165 ".byte <undefined_symbol> - ." */
31a91399
NC		 6166 if (fixP->fx_addsy)
6167 as_bad (_("Unable to handle reference to symbol %s"),
6168 S_GET_NAME (fixP->fx_addsy));
6169 else
6170 as_bad (_("Unable to resolve expression"));
6171 fixP->fx_done = 1;
6172 }
6173 else
6174 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6175 value, 1);
252b5132
RH		 6176 break;
6177
6178 case BFD_RELOC_24_PLT_PCREL:
6179 case BFD_RELOC_PPC_LOCAL24PC:
94f592af 6180 if (!fixP->fx_pcrel && !fixP->fx_done)
252b5132
RH		 6181 abort ();
6182
94f592af 6183 if (fixP->fx_done)
99a814a1
AM		 6184 {
6185 char *where;
6186 unsigned long insn;
6187
6188 /* Fetch the instruction, insert the fully resolved operand
6189 value, and stuff the instruction back again. */
94f592af 6190 where = fixP->fx_frag->fr_literal + fixP->fx_where;
99a814a1
AM		 6191 if (target_big_endian)
6192 insn = bfd_getb32 ((unsigned char *) where);
6193 else
6194 insn = bfd_getl32 ((unsigned char *) where);
6195 if ((value & 3) != 0)
94f592af 6196 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6197 _("must branch to an address a multiple of 4"));
6198 if ((offsetT) value < -0x40000000
6199 || (offsetT) value >= 0x40000000)
94f592af 6200 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6201 _("@local or @plt branch destination is too far away, %ld bytes"),
6202 (long) value);
6203 insn = insn | (value & 0x03fffffc);
6204 if (target_big_endian)
6205 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6206 else
6207 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6208 }
252b5132
RH		 6209 break;
6210
6211 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 6212 fixP->fx_done = 0;
6213 if (fixP->fx_addsy
6214 && !S_IS_DEFINED (fixP->fx_addsy)
6215 && !S_IS_WEAK (fixP->fx_addsy))
6216 S_SET_WEAK (fixP->fx_addsy);
252b5132
RH		 6217 break;
6218
6219 case BFD_RELOC_VTABLE_ENTRY:
94f592af 6220 fixP->fx_done = 0;
252b5132
RH		 6221 break;
6222
0baf16f2 6223#ifdef OBJ_ELF
0baf16f2
AM		 6224 /* Generated by reference to `sym@tocbase'. The sym is
6225 ignored by the linker. */
6226 case BFD_RELOC_PPC64_TOC:
94f592af 6227 fixP->fx_done = 0;
0baf16f2 6228 break;
0baf16f2 6229#endif
252b5132 6230 default:
bc805888 6231 fprintf (stderr,
94f592af 6232 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 6233 fflush (stderr);
252b5132
RH		 6234 abort ();
6235 }
6236 }
6237
6238#ifdef OBJ_ELF
94f592af 6239 fixP->fx_addnumber = value;
4e6935a6
AM		 6240
6241 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
6242 from the section contents. If we are going to be emitting a reloc
6243 then the section contents are immaterial, so don't warn if they
6244 happen to overflow. Leave such warnings to ld. */
6245 if (!fixP->fx_done)
6246 fixP->fx_no_overflow = 1;
252b5132 6247#else
94f592af
NC		 6248 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
6249 fixP->fx_addnumber = 0;
252b5132
RH		 6250 else
6251 {
6252#ifdef TE_PE
94f592af 6253 fixP->fx_addnumber = 0;
252b5132 6254#else
8edcbfcd
TG		 6255 /* We want to use the offset within the toc, not the actual VMA
6256 of the symbol. */
94f592af 6257 fixP->fx_addnumber =
8edcbfcd
TG		 6258 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
6259 - S_GET_VALUE (ppc_toc_csect);
252b5132
RH		 6260#endif
6261 }
6262#endif
252b5132
RH		 6263}
6264
6265/* Generate a reloc for a fixup. */
6266
6267arelent *
98027b10 6268tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
252b5132
RH		 6269{
6270 arelent *reloc;
6271
6272 reloc = (arelent *) xmalloc (sizeof (arelent));
6273
49309057
ILT		 6274 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6275 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 6276 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6277 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6278 if (reloc->howto == (reloc_howto_type *) NULL)
6279 {
6280 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 6281 _("reloc %d not supported by object file format"),
6282 (int) fixp->fx_r_type);
252b5132
RH		 6283 return NULL;
6284 }
6285 reloc->addend = fixp->fx_addnumber;
6286
6287 return reloc;
6288}
75e21f08
JJ		 6289
6290void
98027b10 6291ppc_cfi_frame_initial_instructions (void)
75e21f08
JJ		 6292{
6293 cfi_add_CFA_def_cfa (1, 0);
6294}
6295
6296int
1df69f4f 6297tc_ppc_regname_to_dw2regnum (char *regname)
75e21f08
JJ		 6298{
6299 unsigned int regnum = -1;
6300 unsigned int i;
6301 const char *p;
6302 char *q;
6303 static struct { char *name; int dw2regnum; } regnames[] =
6304 {
6305 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6306 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 6307 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ		 6308 { "spe_acc", 111 }, { "spefscr", 112 }
6309 };
6310
6311 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6312 if (strcmp (regnames[i].name, regname) == 0)
6313 return regnames[i].dw2regnum;
6314
6315 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6316 {
6317 p = regname + 1 + (regname[1] == '.');
6318 regnum = strtoul (p, &q, 10);
6319 if (p == q || *q || regnum >= 32)
6320 return -1;
6321 if (regname[0] == 'f')
b7d7dc63 6322 regnum += 32;
75e21f08 6323 else if (regname[0] == 'v')
b7d7dc63 6324 regnum += 77;
75e21f08
JJ		 6325 }
6326 else if (regname[0] == 'c' && regname[1] == 'r')
6327 {
6328 p = regname + 2 + (regname[2] == '.');
6329 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 6330 return -1;
75e21f08
JJ		 6331 regnum = p[0] - '0' + 68;
6332 }
6333 return regnum;
6334}
GDB Binutils - Deliverables
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