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2007-07-01 H.J. Lu <hongjiu.lu@intel.com>
[deliverable/binutils-gdb.git] / gas / config / tc-ppc.c
CommitLineData
252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b7d7dc63 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
b84bf58a 3 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
252b5132
RH		 4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC		 20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
21 02110-1301, USA. */
252b5132 22
252b5132 23#include "as.h"
3882b010 24#include "safe-ctype.h"
252b5132 25#include "subsegs.h"
75e21f08 26#include "dw2gencfi.h"
252b5132
RH		 27#include "opcode/ppc.h"
28
29#ifdef OBJ_ELF
30#include "elf/ppc.h"
5d6f4f16 31#include "dwarf2dbg.h"
252b5132
RH		 32#endif
33
34#ifdef TE_PE
35#include "coff/pe.h"
36#endif
37
38/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
39
40/* Tell the main code what the endianness is. */
41extern int target_big_endian;
42
43/* Whether or not, we've set target_big_endian. */
44static int set_target_endian = 0;
45
46/* Whether to use user friendly register names. */
47#ifndef TARGET_REG_NAMES_P
48#ifdef TE_PE
b34976b6 49#define TARGET_REG_NAMES_P TRUE
252b5132 50#else
b34976b6 51#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 52#endif
53#endif
54
0baf16f2
AM		 55/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
56 HIGHESTA. */
57
58/* #lo(value) denotes the least significant 16 bits of the indicated. */
59#define PPC_LO(v) ((v) & 0xffff)
60
61/* #hi(value) denotes bits 16 through 31 of the indicated value. */
62#define PPC_HI(v) (((v) >> 16) & 0xffff)
63
64/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
65 the indicated value, compensating for #lo() being treated as a
66 signed number. */
15c1449b 67#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 68
69/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 70#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 71
72/* #highera(value) denotes bits 32 through 47 of the indicated value,
73 compensating for #lo() being treated as a signed number. */
15c1449b 74#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 75
76/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 77#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 78
79/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 80 compensating for #lo being treated as a signed number. */
81#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM		 82
83#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
84
b34976b6 85static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 86
98027b10
AM		 87static void ppc_macro (char *, const struct powerpc_macro *);
88static void ppc_byte (int);
0baf16f2
AM		 89
90#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
98027b10
AM		 91static void ppc_tc (int);
92static void ppc_machine (int);
0baf16f2 93#endif
252b5132
RH		 94
95#ifdef OBJ_XCOFF
98027b10
AM		 96static void ppc_comm (int);
97static void ppc_bb (int);
98static void ppc_bc (int);
99static void ppc_bf (int);
100static void ppc_biei (int);
101static void ppc_bs (int);
102static void ppc_eb (int);
103static void ppc_ec (int);
104static void ppc_ef (int);
105static void ppc_es (int);
106static void ppc_csect (int);
107static void ppc_change_csect (symbolS *, offsetT);
108static void ppc_function (int);
109static void ppc_extern (int);
110static void ppc_lglobl (int);
111static void ppc_section (int);
112static void ppc_named_section (int);
113static void ppc_stabx (int);
114static void ppc_rename (int);
115static void ppc_toc (int);
116static void ppc_xcoff_cons (int);
117static void ppc_vbyte (int);
252b5132
RH		 118#endif
119
120#ifdef OBJ_ELF
98027b10
AM		 121static void ppc_elf_cons (int);
122static void ppc_elf_rdata (int);
123static void ppc_elf_lcomm (int);
252b5132
RH		 124#endif
125
126#ifdef TE_PE
98027b10
AM		 127static void ppc_previous (int);
128static void ppc_pdata (int);
129static void ppc_ydata (int);
130static void ppc_reldata (int);
131static void ppc_rdata (int);
132static void ppc_ualong (int);
133static void ppc_znop (int);
134static void ppc_pe_comm (int);
135static void ppc_pe_section (int);
136static void ppc_pe_function (int);
137static void ppc_pe_tocd (int);
252b5132
RH		 138#endif
139\f
140/* Generic assembler global variables which must be defined by all
141 targets. */
142
143#ifdef OBJ_ELF
144/* This string holds the chars that always start a comment. If the
145 pre-processor is disabled, these aren't very useful. The macro
146 tc_comment_chars points to this. We use this, rather than the
147 usual comment_chars, so that we can switch for Solaris conventions. */
148static const char ppc_solaris_comment_chars[] = "#!";
149static const char ppc_eabi_comment_chars[] = "#";
150
151#ifdef TARGET_SOLARIS_COMMENT
152const char *ppc_comment_chars = ppc_solaris_comment_chars;
153#else
154const char *ppc_comment_chars = ppc_eabi_comment_chars;
155#endif
156#else
157const char comment_chars[] = "#";
158#endif
159
160/* Characters which start a comment at the beginning of a line. */
161const char line_comment_chars[] = "#";
162
163/* Characters which may be used to separate multiple commands on a
164 single line. */
165const char line_separator_chars[] = ";";
166
167/* Characters which are used to indicate an exponent in a floating
168 point number. */
169const char EXP_CHARS[] = "eE";
170
171/* Characters which mean that a number is a floating point constant,
172 as in 0d1.0. */
173const char FLT_CHARS[] = "dD";
5ce8663f 174
5e02f92e 175/* Anything that can start an operand needs to be mentioned here,
ac805826 176 to stop the input scrubber eating whitespace. */
5e02f92e 177const char ppc_symbol_chars[] = "%[";
75e21f08
JJ		 178
179/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
180int ppc_cie_data_alignment;
252b5132
RH		 181\f
182/* The target specific pseudo-ops which we support. */
183
184const pseudo_typeS md_pseudo_table[] =
185{
186 /* Pseudo-ops which must be overridden. */
187 { "byte", ppc_byte, 0 },
188
189#ifdef OBJ_XCOFF
190 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
191 legitimately belong in the obj-*.c file. However, XCOFF is based
192 on COFF, and is only implemented for the RS/6000. We just use
193 obj-coff.c, and add what we need here. */
194 { "comm", ppc_comm, 0 },
195 { "lcomm", ppc_comm, 1 },
196 { "bb", ppc_bb, 0 },
197 { "bc", ppc_bc, 0 },
198 { "bf", ppc_bf, 0 },
199 { "bi", ppc_biei, 0 },
200 { "bs", ppc_bs, 0 },
201 { "csect", ppc_csect, 0 },
202 { "data", ppc_section, 'd' },
203 { "eb", ppc_eb, 0 },
204 { "ec", ppc_ec, 0 },
205 { "ef", ppc_ef, 0 },
206 { "ei", ppc_biei, 1 },
207 { "es", ppc_es, 0 },
208 { "extern", ppc_extern, 0 },
209 { "function", ppc_function, 0 },
210 { "lglobl", ppc_lglobl, 0 },
211 { "rename", ppc_rename, 0 },
212 { "section", ppc_named_section, 0 },
213 { "stabx", ppc_stabx, 0 },
214 { "text", ppc_section, 't' },
215 { "toc", ppc_toc, 0 },
216 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 217 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 218 { "word", ppc_xcoff_cons, 1 },
219 { "short", ppc_xcoff_cons, 1 },
220 { "vbyte", ppc_vbyte, 0 },
221#endif
222
223#ifdef OBJ_ELF
0baf16f2
AM		 224 { "llong", ppc_elf_cons, 8 },
225 { "quad", ppc_elf_cons, 8 },
252b5132
RH		 226 { "long", ppc_elf_cons, 4 },
227 { "word", ppc_elf_cons, 2 },
228 { "short", ppc_elf_cons, 2 },
229 { "rdata", ppc_elf_rdata, 0 },
230 { "rodata", ppc_elf_rdata, 0 },
231 { "lcomm", ppc_elf_lcomm, 0 },
232#endif
233
234#ifdef TE_PE
99a814a1 235 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 236 { "previous", ppc_previous, 0 },
237 { "pdata", ppc_pdata, 0 },
238 { "ydata", ppc_ydata, 0 },
239 { "reldata", ppc_reldata, 0 },
240 { "rdata", ppc_rdata, 0 },
241 { "ualong", ppc_ualong, 0 },
242 { "znop", ppc_znop, 0 },
243 { "comm", ppc_pe_comm, 0 },
244 { "lcomm", ppc_pe_comm, 1 },
245 { "section", ppc_pe_section, 0 },
246 { "function", ppc_pe_function,0 },
247 { "tocd", ppc_pe_tocd, 0 },
248#endif
249
0baf16f2 250#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 251 { "tc", ppc_tc, 0 },
0baf16f2
AM		 252 { "machine", ppc_machine, 0 },
253#endif
252b5132
RH		 254
255 { NULL, NULL, 0 }
256};
257
258\f
99a814a1
AM		 259/* Predefined register names if -mregnames (or default for Windows NT).
260 In general, there are lots of them, in an attempt to be compatible
261 with a number of other Windows NT assemblers. */
252b5132
RH		 262
263/* Structure to hold information about predefined registers. */
264struct pd_reg
265 {
266 char *name;
267 int value;
268 };
269
270/* List of registers that are pre-defined:
271
272 Each general register has predefined names of the form:
273 1. r<reg_num> which has the value <reg_num>.
274 2. r.<reg_num> which has the value <reg_num>.
275
252b5132
RH		 276 Each floating point register has predefined names of the form:
277 1. f<reg_num> which has the value <reg_num>.
278 2. f.<reg_num> which has the value <reg_num>.
279
7a899fff
C		 280 Each vector unit register has predefined names of the form:
281 1. v<reg_num> which has the value <reg_num>.
282 2. v.<reg_num> which has the value <reg_num>.
283
252b5132
RH		 284 Each condition register has predefined names of the form:
285 1. cr<reg_num> which has the value <reg_num>.
286 2. cr.<reg_num> which has the value <reg_num>.
287
288 There are individual registers as well:
289 sp or r.sp has the value 1
290 rtoc or r.toc has the value 2
291 fpscr has the value 0
292 xer has the value 1
293 lr has the value 8
294 ctr has the value 9
295 pmr has the value 0
296 dar has the value 19
297 dsisr has the value 18
298 dec has the value 22
299 sdr1 has the value 25
300 srr0 has the value 26
301 srr1 has the value 27
302
81d4177b 303 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 304
305static const struct pd_reg pre_defined_registers[] =
306{
307 { "cr.0", 0 }, /* Condition Registers */
308 { "cr.1", 1 },
309 { "cr.2", 2 },
310 { "cr.3", 3 },
311 { "cr.4", 4 },
312 { "cr.5", 5 },
313 { "cr.6", 6 },
314 { "cr.7", 7 },
315
316 { "cr0", 0 },
317 { "cr1", 1 },
318 { "cr2", 2 },
319 { "cr3", 3 },
320 { "cr4", 4 },
321 { "cr5", 5 },
322 { "cr6", 6 },
323 { "cr7", 7 },
324
325 { "ctr", 9 },
326
327 { "dar", 19 }, /* Data Access Register */
328 { "dec", 22 }, /* Decrementer */
329 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
330
331 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 332 { "f.1", 1 },
333 { "f.10", 10 },
334 { "f.11", 11 },
335 { "f.12", 12 },
336 { "f.13", 13 },
337 { "f.14", 14 },
338 { "f.15", 15 },
339 { "f.16", 16 },
340 { "f.17", 17 },
341 { "f.18", 18 },
342 { "f.19", 19 },
343 { "f.2", 2 },
344 { "f.20", 20 },
345 { "f.21", 21 },
346 { "f.22", 22 },
347 { "f.23", 23 },
348 { "f.24", 24 },
349 { "f.25", 25 },
350 { "f.26", 26 },
351 { "f.27", 27 },
352 { "f.28", 28 },
353 { "f.29", 29 },
354 { "f.3", 3 },
252b5132
RH		 355 { "f.30", 30 },
356 { "f.31", 31 },
81d4177b
KH		 357 { "f.4", 4 },
358 { "f.5", 5 },
359 { "f.6", 6 },
360 { "f.7", 7 },
361 { "f.8", 8 },
362 { "f.9", 9 },
363
364 { "f0", 0 },
365 { "f1", 1 },
366 { "f10", 10 },
367 { "f11", 11 },
368 { "f12", 12 },
369 { "f13", 13 },
370 { "f14", 14 },
371 { "f15", 15 },
372 { "f16", 16 },
373 { "f17", 17 },
374 { "f18", 18 },
375 { "f19", 19 },
376 { "f2", 2 },
377 { "f20", 20 },
378 { "f21", 21 },
379 { "f22", 22 },
380 { "f23", 23 },
381 { "f24", 24 },
382 { "f25", 25 },
383 { "f26", 26 },
384 { "f27", 27 },
385 { "f28", 28 },
386 { "f29", 29 },
387 { "f3", 3 },
252b5132
RH		 388 { "f30", 30 },
389 { "f31", 31 },
81d4177b
KH		 390 { "f4", 4 },
391 { "f5", 5 },
392 { "f6", 6 },
393 { "f7", 7 },
394 { "f8", 8 },
395 { "f9", 9 },
252b5132
RH		 396
397 { "fpscr", 0 },
398
399 { "lr", 8 }, /* Link Register */
400
401 { "pmr", 0 },
402
403 { "r.0", 0 }, /* General Purpose Registers */
404 { "r.1", 1 },
405 { "r.10", 10 },
406 { "r.11", 11 },
407 { "r.12", 12 },
408 { "r.13", 13 },
409 { "r.14", 14 },
410 { "r.15", 15 },
411 { "r.16", 16 },
412 { "r.17", 17 },
413 { "r.18", 18 },
414 { "r.19", 19 },
415 { "r.2", 2 },
416 { "r.20", 20 },
417 { "r.21", 21 },
418 { "r.22", 22 },
419 { "r.23", 23 },
420 { "r.24", 24 },
421 { "r.25", 25 },
422 { "r.26", 26 },
423 { "r.27", 27 },
424 { "r.28", 28 },
425 { "r.29", 29 },
426 { "r.3", 3 },
427 { "r.30", 30 },
428 { "r.31", 31 },
429 { "r.4", 4 },
430 { "r.5", 5 },
431 { "r.6", 6 },
432 { "r.7", 7 },
433 { "r.8", 8 },
434 { "r.9", 9 },
435
436 { "r.sp", 1 }, /* Stack Pointer */
437
438 { "r.toc", 2 }, /* Pointer to the table of contents */
439
440 { "r0", 0 }, /* More general purpose registers */
441 { "r1", 1 },
442 { "r10", 10 },
443 { "r11", 11 },
444 { "r12", 12 },
445 { "r13", 13 },
446 { "r14", 14 },
447 { "r15", 15 },
448 { "r16", 16 },
449 { "r17", 17 },
450 { "r18", 18 },
451 { "r19", 19 },
452 { "r2", 2 },
453 { "r20", 20 },
454 { "r21", 21 },
455 { "r22", 22 },
456 { "r23", 23 },
457 { "r24", 24 },
458 { "r25", 25 },
459 { "r26", 26 },
460 { "r27", 27 },
461 { "r28", 28 },
462 { "r29", 29 },
463 { "r3", 3 },
464 { "r30", 30 },
465 { "r31", 31 },
466 { "r4", 4 },
467 { "r5", 5 },
468 { "r6", 6 },
469 { "r7", 7 },
470 { "r8", 8 },
471 { "r9", 9 },
472
473 { "rtoc", 2 }, /* Table of contents */
474
475 { "sdr1", 25 }, /* Storage Description Register 1 */
476
477 { "sp", 1 },
478
479 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
480 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 481
7a899fff 482 { "v.0", 0 }, /* Vector registers */
81d4177b
KH		 483 { "v.1", 1 },
484 { "v.10", 10 },
485 { "v.11", 11 },
486 { "v.12", 12 },
487 { "v.13", 13 },
488 { "v.14", 14 },
489 { "v.15", 15 },
490 { "v.16", 16 },
491 { "v.17", 17 },
492 { "v.18", 18 },
493 { "v.19", 19 },
494 { "v.2", 2 },
495 { "v.20", 20 },
496 { "v.21", 21 },
497 { "v.22", 22 },
498 { "v.23", 23 },
499 { "v.24", 24 },
500 { "v.25", 25 },
501 { "v.26", 26 },
502 { "v.27", 27 },
503 { "v.28", 28 },
504 { "v.29", 29 },
505 { "v.3", 3 },
7a899fff
C		 506 { "v.30", 30 },
507 { "v.31", 31 },
81d4177b
KH		 508 { "v.4", 4 },
509 { "v.5", 5 },
510 { "v.6", 6 },
511 { "v.7", 7 },
512 { "v.8", 8 },
513 { "v.9", 9 },
7a899fff
C		 514
515 { "v0", 0 },
81d4177b
KH		 516 { "v1", 1 },
517 { "v10", 10 },
518 { "v11", 11 },
519 { "v12", 12 },
520 { "v13", 13 },
521 { "v14", 14 },
522 { "v15", 15 },
523 { "v16", 16 },
524 { "v17", 17 },
525 { "v18", 18 },
526 { "v19", 19 },
527 { "v2", 2 },
528 { "v20", 20 },
529 { "v21", 21 },
530 { "v22", 22 },
531 { "v23", 23 },
532 { "v24", 24 },
533 { "v25", 25 },
534 { "v26", 26 },
535 { "v27", 27 },
536 { "v28", 28 },
537 { "v29", 29 },
538 { "v3", 3 },
7a899fff
C		 539 { "v30", 30 },
540 { "v31", 31 },
81d4177b
KH		 541 { "v4", 4 },
542 { "v5", 5 },
543 { "v6", 6 },
544 { "v7", 7 },
545 { "v8", 8 },
7a899fff 546 { "v9", 9 },
252b5132
RH		 547
548 { "xer", 1 },
549
550};
551
bc805888 552#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 553
554/* Given NAME, find the register number associated with that name, return
555 the integer value associated with the given name or -1 on failure. */
556
252b5132 557static int
98027b10 558reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
252b5132
RH		 559{
560 int middle, low, high;
561 int cmp;
562
563 low = 0;
564 high = regcount - 1;
565
566 do
567 {
568 middle = (low + high) / 2;
569 cmp = strcasecmp (name, regs[middle].name);
570 if (cmp < 0)
571 high = middle - 1;
572 else if (cmp > 0)
573 low = middle + 1;
574 else
575 return regs[middle].value;
576 }
577 while (low <= high);
578
579 return -1;
580}
581
582/*
99a814a1 583 * Summary of register_name.
252b5132
RH		 584 *
585 * in: Input_line_pointer points to 1st char of operand.
586 *
587 * out: A expressionS.
588 * The operand may have been a register: in this case, X_op == O_register,
589 * X_add_number is set to the register number, and truth is returned.
590 * Input_line_pointer->(next non-blank) char after operand, or is in its
591 * original state.
592 */
593
b34976b6 594static bfd_boolean
98027b10 595register_name (expressionS *expressionP)
252b5132
RH		 596{
597 int reg_number;
598 char *name;
599 char *start;
600 char c;
601
99a814a1 602 /* Find the spelling of the operand. */
252b5132 603 start = name = input_line_pointer;
3882b010 604 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 605 name = ++input_line_pointer;
606
3882b010 607 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 608 return FALSE;
252b5132
RH		 609
610 c = get_symbol_end ();
611 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
612
468cced8
AM		 613 /* Put back the delimiting char. */
614 *input_line_pointer = c;
615
99a814a1 616 /* Look to see if it's in the register table. */
81d4177b 617 if (reg_number >= 0)
252b5132
RH		 618 {
619 expressionP->X_op = O_register;
620 expressionP->X_add_number = reg_number;
81d4177b 621
99a814a1 622 /* Make the rest nice. */
252b5132
RH		 623 expressionP->X_add_symbol = NULL;
624 expressionP->X_op_symbol = NULL;
b34976b6 625 return TRUE;
252b5132 626 }
468cced8
AM		 627
628 /* Reset the line as if we had not done anything. */
629 input_line_pointer = start;
b34976b6 630 return FALSE;
252b5132
RH		 631}
632\f
633/* This function is called for each symbol seen in an expression. It
634 handles the special parsing which PowerPC assemblers are supposed
635 to use for condition codes. */
636
637/* Whether to do the special parsing. */
b34976b6 638static bfd_boolean cr_operand;
252b5132
RH		 639
640/* Names to recognize in a condition code. This table is sorted. */
641static const struct pd_reg cr_names[] =
642{
643 { "cr0", 0 },
644 { "cr1", 1 },
645 { "cr2", 2 },
646 { "cr3", 3 },
647 { "cr4", 4 },
648 { "cr5", 5 },
649 { "cr6", 6 },
650 { "cr7", 7 },
651 { "eq", 2 },
652 { "gt", 1 },
653 { "lt", 0 },
654 { "so", 3 },
655 { "un", 3 }
656};
657
658/* Parsing function. This returns non-zero if it recognized an
659 expression. */
660
661int
98027b10 662ppc_parse_name (const char *name, expressionS *expr)
252b5132
RH		 663{
664 int val;
665
666 if (! cr_operand)
667 return 0;
668
669 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
670 name);
671 if (val < 0)
672 return 0;
673
674 expr->X_op = O_constant;
675 expr->X_add_number = val;
676
677 return 1;
678}
679\f
680/* Local variables. */
681
682/* The type of processor we are assembling for. This is one or more
683 of the PPC_OPCODE flags defined in opcode/ppc.h. */
2b3c4602 684static unsigned long ppc_cpu = 0;
252b5132 685
2b3c4602
AM		 686/* Whether to target xcoff64/elf64. */
687static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 688
252b5132
RH		 689/* Opcode hash table. */
690static struct hash_control *ppc_hash;
691
692/* Macro hash table. */
693static struct hash_control *ppc_macro_hash;
694
695#ifdef OBJ_ELF
99a814a1 696/* What type of shared library support to use. */
5d6f4f16 697static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 698
99a814a1 699/* Flags to set in the elf header. */
252b5132
RH		 700static flagword ppc_flags = 0;
701
702/* Whether this is Solaris or not. */
703#ifdef TARGET_SOLARIS_COMMENT
b34976b6 704#define SOLARIS_P TRUE
252b5132 705#else
b34976b6 706#define SOLARIS_P FALSE
252b5132
RH		 707#endif
708
b34976b6 709static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 710#endif
711
712#ifdef OBJ_XCOFF
713
714/* The RS/6000 assembler uses the .csect pseudo-op to generate code
715 using a bunch of different sections. These assembler sections,
716 however, are all encompassed within the .text or .data sections of
717 the final output file. We handle this by using different
718 subsegments within these main segments. */
719
720/* Next subsegment to allocate within the .text segment. */
721static subsegT ppc_text_subsegment = 2;
722
723/* Linked list of csects in the text section. */
724static symbolS *ppc_text_csects;
725
726/* Next subsegment to allocate within the .data segment. */
727static subsegT ppc_data_subsegment = 2;
728
729/* Linked list of csects in the data section. */
730static symbolS *ppc_data_csects;
731
732/* The current csect. */
733static symbolS *ppc_current_csect;
734
735/* The RS/6000 assembler uses a TOC which holds addresses of functions
736 and variables. Symbols are put in the TOC with the .tc pseudo-op.
737 A special relocation is used when accessing TOC entries. We handle
738 the TOC as a subsegment within the .data segment. We set it up if
739 we see a .toc pseudo-op, and save the csect symbol here. */
740static symbolS *ppc_toc_csect;
741
742/* The first frag in the TOC subsegment. */
743static fragS *ppc_toc_frag;
744
745/* The first frag in the first subsegment after the TOC in the .data
746 segment. NULL if there are no subsegments after the TOC. */
747static fragS *ppc_after_toc_frag;
748
749/* The current static block. */
750static symbolS *ppc_current_block;
751
752/* The COFF debugging section; set by md_begin. This is not the
753 .debug section, but is instead the secret BFD section which will
754 cause BFD to set the section number of a symbol to N_DEBUG. */
755static asection *ppc_coff_debug_section;
756
757#endif /* OBJ_XCOFF */
758
759#ifdef TE_PE
760
761/* Various sections that we need for PE coff support. */
762static segT ydata_section;
763static segT pdata_section;
764static segT reldata_section;
765static segT rdata_section;
766static segT tocdata_section;
767
81d4177b 768/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 769static segT ppc_previous_section;
770static segT ppc_current_section;
771
772#endif /* TE_PE */
773
774#ifdef OBJ_ELF
775symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 776#define PPC_APUINFO_ISEL 0x40
777#define PPC_APUINFO_PMR 0x41
778#define PPC_APUINFO_RFMCI 0x42
779#define PPC_APUINFO_CACHELCK 0x43
780#define PPC_APUINFO_SPE 0x100
781#define PPC_APUINFO_EFS 0x101
782#define PPC_APUINFO_BRLOCK 0x102
783
b34976b6
AM		 784/*
785 * We keep a list of APUinfo
6a0c61b7
EZ		 786 */
787unsigned long *ppc_apuinfo_list;
788unsigned int ppc_apuinfo_num;
789unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 790#endif /* OBJ_ELF */
791\f
792#ifdef OBJ_ELF
15c1449b 793const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 794#else
15c1449b 795const char *const md_shortopts = "um:";
252b5132 796#endif
15c1449b 797const struct option md_longopts[] = {
252b5132
RH		 798 {NULL, no_argument, NULL, 0}
799};
15c1449b 800const size_t md_longopts_size = sizeof (md_longopts);
252b5132 801
69c040df
AM		 802
803/* Handle -m options that set cpu type, and .machine arg. */
804
805static int
806parse_cpu (const char *arg)
807{
808 /* -mpwrx and -mpwr2 mean to assemble for the IBM POWER/2
809 (RIOS2). */
810 if (strcmp (arg, "pwrx") == 0 || strcmp (arg, "pwr2") == 0)
811 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32;
812 /* -mpwr means to assemble for the IBM POWER (RIOS1). */
813 else if (strcmp (arg, "pwr") == 0)
814 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
815 /* -m601 means to assemble for the PowerPC 601, which includes
816 instructions that are holdovers from the Power. */
817 else if (strcmp (arg, "601") == 0)
818 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
819 | PPC_OPCODE_601 | PPC_OPCODE_32);
820 /* -mppc, -mppc32, -m603, and -m604 mean to assemble for the
821 PowerPC 603/604. */
822 else if (strcmp (arg, "ppc") == 0
823 || strcmp (arg, "ppc32") == 0
824 || strcmp (arg, "603") == 0
825 || strcmp (arg, "604") == 0)
826 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
827 /* -m403 and -m405 mean to assemble for the PowerPC 403/405. */
828 else if (strcmp (arg, "403") == 0
829 || strcmp (arg, "405") == 0)
830 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
831 | PPC_OPCODE_403 | PPC_OPCODE_32);
832 else if (strcmp (arg, "440") == 0)
833 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32
834 | PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI);
835 else if (strcmp (arg, "7400") == 0
836 || strcmp (arg, "7410") == 0
837 || strcmp (arg, "7450") == 0
838 || strcmp (arg, "7455") == 0)
839 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
840 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_32);
36ae0db3
DJ		 841 else if (strcmp (arg, "e300") == 0)
842 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32
843 | PPC_OPCODE_E300);
69c040df
AM		 844 else if (strcmp (arg, "altivec") == 0)
845 {
846 if (ppc_cpu == 0)
847 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ALTIVEC;
848 else
849 ppc_cpu |= PPC_OPCODE_ALTIVEC;
850 }
851 else if (strcmp (arg, "e500") == 0 || strcmp (arg, "e500x2") == 0)
852 {
853 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
854 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
855 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
856 | PPC_OPCODE_RFMCI);
857 }
858 else if (strcmp (arg, "spe") == 0)
859 {
860 if (ppc_cpu == 0)
861 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_SPE | PPC_OPCODE_EFS;
862 else
863 ppc_cpu |= PPC_OPCODE_SPE;
864 }
865 /* -mppc64 and -m620 mean to assemble for the 64-bit PowerPC
866 620. */
867 else if (strcmp (arg, "ppc64") == 0 || strcmp (arg, "620") == 0)
868 {
869 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
870 }
871 else if (strcmp (arg, "ppc64bridge") == 0)
872 {
873 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
874 | PPC_OPCODE_64_BRIDGE | PPC_OPCODE_64);
875 }
876 /* -mbooke/-mbooke32 mean enable 32-bit BookE support. */
877 else if (strcmp (arg, "booke") == 0 || strcmp (arg, "booke32") == 0)
878 {
879 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32;
880 }
881 /* -mbooke64 means enable 64-bit BookE support. */
882 else if (strcmp (arg, "booke64") == 0)
883 {
884 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE
885 | PPC_OPCODE_BOOKE64 | PPC_OPCODE_64);
886 }
887 else if (strcmp (arg, "power4") == 0)
888 {
889 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
890 | PPC_OPCODE_64 | PPC_OPCODE_POWER4);
891 }
b0648eec
AM		 892 else if (strcmp (arg, "power5") == 0)
893 {
894 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
895 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
896 | PPC_OPCODE_POWER5);
897 }
9622b051
AM		 898 else if (strcmp (arg, "power6") == 0)
899 {
900 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
901 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
902 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6);
903 }
ede602d7
AM		 904 else if (strcmp (arg, "cell") == 0)
905 {
906 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
907 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
908 | PPC_OPCODE_CELL);
909 }
69c040df
AM		 910 /* -mcom means assemble for the common intersection between Power
911 and PowerPC. At present, we just allow the union, rather
912 than the intersection. */
913 else if (strcmp (arg, "com") == 0)
914 ppc_cpu = PPC_OPCODE_COMMON | PPC_OPCODE_32;
915 /* -many means to assemble for any architecture (PWR/PWRX/PPC). */
916 else if (strcmp (arg, "any") == 0)
917 ppc_cpu |= PPC_OPCODE_ANY;
918 else
919 return 0;
920
921 return 1;
922}
923
252b5132 924int
98027b10 925md_parse_option (int c, char *arg)
252b5132
RH		 926{
927 switch (c)
928 {
929 case 'u':
930 /* -u means that any undefined symbols should be treated as
931 external, which is the default for gas anyhow. */
932 break;
933
934#ifdef OBJ_ELF
935 case 'l':
936 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 937 sake, recognize -be also. */
252b5132
RH		 938 if (strcmp (arg, "e") == 0)
939 {
940 target_big_endian = 0;
941 set_target_endian = 1;
942 }
943 else
944 return 0;
945
946 break;
947
948 case 'b':
949 if (strcmp (arg, "e") == 0)
950 {
951 target_big_endian = 1;
952 set_target_endian = 1;
953 }
954 else
955 return 0;
956
957 break;
958
959 case 'K':
99a814a1 960 /* Recognize -K PIC. */
252b5132
RH		 961 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
962 {
963 shlib = SHLIB_PIC;
964 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
965 }
966 else
967 return 0;
968
969 break;
970#endif
971
7f6d05e8
CP		 972 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
973 case 'a':
974 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 975 {
976#ifdef BFD64
977 ppc_obj64 = 1;
978#else
979 as_fatal (_("%s unsupported"), "-a64");
980#endif
981 }
7f6d05e8 982 else if (strcmp (arg, "32") == 0)
2b3c4602 983 ppc_obj64 = 0;
7f6d05e8
CP		 984 else
985 return 0;
986 break;
81d4177b 987
252b5132 988 case 'm':
69c040df
AM		 989 if (parse_cpu (arg))
990 ;
252b5132
RH		 991
992 else if (strcmp (arg, "regnames") == 0)
b34976b6 993 reg_names_p = TRUE;
252b5132
RH		 994
995 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 996 reg_names_p = FALSE;
252b5132
RH		 997
998#ifdef OBJ_ELF
99a814a1
AM		 999 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1000 that require relocation. */
252b5132
RH		 1001 else if (strcmp (arg, "relocatable") == 0)
1002 {
5d6f4f16 1003 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1004 ppc_flags |= EF_PPC_RELOCATABLE;
1005 }
1006
1007 else if (strcmp (arg, "relocatable-lib") == 0)
1008 {
5d6f4f16 1009 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1010 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1011 }
1012
99a814a1 1013 /* -memb, set embedded bit. */
252b5132
RH		 1014 else if (strcmp (arg, "emb") == 0)
1015 ppc_flags |= EF_PPC_EMB;
1016
99a814a1
AM		 1017 /* -mlittle/-mbig set the endianess. */
1018 else if (strcmp (arg, "little") == 0
1019 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1020 {
1021 target_big_endian = 0;
1022 set_target_endian = 1;
1023 }
1024
1025 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1026 {
1027 target_big_endian = 1;
1028 set_target_endian = 1;
1029 }
1030
1031 else if (strcmp (arg, "solaris") == 0)
1032 {
b34976b6 1033 msolaris = TRUE;
252b5132
RH		 1034 ppc_comment_chars = ppc_solaris_comment_chars;
1035 }
1036
1037 else if (strcmp (arg, "no-solaris") == 0)
1038 {
b34976b6 1039 msolaris = FALSE;
252b5132
RH		 1040 ppc_comment_chars = ppc_eabi_comment_chars;
1041 }
1042#endif
1043 else
1044 {
1045 as_bad (_("invalid switch -m%s"), arg);
1046 return 0;
1047 }
1048 break;
1049
1050#ifdef OBJ_ELF
1051 /* -V: SVR4 argument to print version ID. */
1052 case 'V':
1053 print_version_id ();
1054 break;
1055
1056 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1057 should be emitted or not. FIXME: Not implemented. */
1058 case 'Q':
1059 break;
1060
1061 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1062 rather than .stabs.excl, which is ignored by the linker.
1063 FIXME: Not implemented. */
1064 case 's':
1065 if (arg)
1066 return 0;
1067
1068 break;
1069#endif
1070
1071 default:
1072 return 0;
1073 }
1074
1075 return 1;
1076}
1077
1078void
98027b10 1079md_show_usage (FILE *stream)
252b5132 1080{
bc805888 1081 fprintf (stream, _("\
252b5132 1082PowerPC options:\n\
df12615d
AM		 1083-a32 generate ELF32/XCOFF32\n\
1084-a64 generate ELF64/XCOFF64\n\
252b5132 1085-u ignored\n\
23e1d84c
AM		 1086-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1087-mpwr generate code for POWER (RIOS1)\n\
1088-m601 generate code for PowerPC 601\n\
418c1742 1089-mppc, -mppc32, -m603, -m604\n\
23e1d84c 1090 generate code for PowerPC 603/604\n\
df12615d 1091-m403, -m405 generate code for PowerPC 403/405\n\
3d8aea2f 1092-m440 generate code for PowerPC 440\n\
f5c120c5 1093-m7400, -m7410, -m7450, -m7455\n\
df12615d
AM		 1094 generate code For PowerPC 7400/7410/7450/7455\n"));
1095 fprintf (stream, _("\
23e1d84c 1096-mppc64, -m620 generate code for PowerPC 620/625/630\n\
d0e9a01c 1097-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
a09cf9bd
MG		 1098-mbooke64 generate code for 64-bit PowerPC BookE\n\
1099-mbooke, mbooke32 generate code for 32-bit PowerPC BookE\n\
23e1d84c 1100-mpower4 generate code for Power4 architecture\n\
b0648eec 1101-mpower5 generate code for Power5 architecture\n\
9622b051 1102-mpower6 generate code for Power6 architecture\n\
ede602d7 1103-mcell generate code for Cell Broadband Engine architecture\n\
252b5132 1104-mcom generate code Power/PowerPC common instructions\n\
df12615d 1105-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1106 fprintf (stream, _("\
df12615d 1107-maltivec generate code for AltiVec\n\
36ae0db3 1108-me300 generate code for PowerPC e300 family\n\
6a0c61b7 1109-me500, -me500x2 generate code for Motorola e500 core complex\n\
df12615d
AM		 1110-mspe generate code for Motorola SPE instructions\n\
1111-mregnames Allow symbolic names for registers\n\
1112-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1113#ifdef OBJ_ELF
bc805888 1114 fprintf (stream, _("\
252b5132
RH		 1115-mrelocatable support for GCC's -mrelocatble option\n\
1116-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1117-memb set PPC_EMB bit in ELF flags\n\
df12615d 1118-mlittle, -mlittle-endian, -l, -le\n\
252b5132 1119 generate code for a little endian machine\n\
df12615d
AM		 1120-mbig, -mbig-endian, -b, -be\n\
1121 generate code for a big endian machine\n\
252b5132
RH		 1122-msolaris generate code for Solaris\n\
1123-mno-solaris do not generate code for Solaris\n\
1124-V print assembler version number\n\
1125-Qy, -Qn ignored\n"));
1126#endif
1127}
1128\f
1129/* Set ppc_cpu if it is not already set. */
1130
1131static void
98027b10 1132ppc_set_cpu (void)
252b5132
RH		 1133{
1134 const char *default_os = TARGET_OS;
1135 const char *default_cpu = TARGET_CPU;
1136
3c9030c1 1137 if ((ppc_cpu & ~PPC_OPCODE_ANY) == 0)
252b5132 1138 {
2a98c3a6 1139 if (ppc_obj64)
3c9030c1 1140 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
2a98c3a6
AM		 1141 else if (strncmp (default_os, "aix", 3) == 0
1142 && default_os[3] >= '4' && default_os[3] <= '9')
3c9030c1 1143 ppc_cpu |= PPC_OPCODE_COMMON | PPC_OPCODE_32;
252b5132 1144 else if (strncmp (default_os, "aix3", 4) == 0)
3c9030c1 1145 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
252b5132 1146 else if (strcmp (default_cpu, "rs6000") == 0)
3c9030c1 1147 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
0baf16f2 1148 else if (strncmp (default_cpu, "powerpc", 7) == 0)
23d36e92 1149 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
252b5132 1150 else
99a814a1
AM		 1151 as_fatal (_("Unknown default cpu = %s, os = %s"),
1152 default_cpu, default_os);
252b5132
RH		 1153 }
1154}
1155
9232bbb0
AM		 1156/* Figure out the BFD architecture to use. This function and ppc_mach
1157 are called well before md_begin, when the output file is opened. */
252b5132
RH		 1158
1159enum bfd_architecture
98027b10 1160ppc_arch (void)
252b5132
RH		 1161{
1162 const char *default_cpu = TARGET_CPU;
1163 ppc_set_cpu ();
1164
1165 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1166 return bfd_arch_powerpc;
1167 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1168 return bfd_arch_rs6000;
1169 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1170 {
1171 if (strcmp (default_cpu, "rs6000") == 0)
1172 return bfd_arch_rs6000;
0baf16f2 1173 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1174 return bfd_arch_powerpc;
1175 }
1176
1177 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1178 return bfd_arch_unknown;
1179}
1180
7f6d05e8 1181unsigned long
98027b10 1182ppc_mach (void)
7f6d05e8 1183{
2a98c3a6
AM		 1184 if (ppc_obj64)
1185 return bfd_mach_ppc64;
1186 else if (ppc_arch () == bfd_arch_rs6000)
1187 return bfd_mach_rs6k;
1188 else
1189 return bfd_mach_ppc;
7f6d05e8
CP		 1190}
1191
81d4177b 1192extern char*
98027b10 1193ppc_target_format (void)
7f6d05e8
CP		 1194{
1195#ifdef OBJ_COFF
1196#ifdef TE_PE
99a814a1 1197 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1198#elif TE_POWERMAC
0baf16f2 1199 return "xcoff-powermac";
7f6d05e8 1200#else
eb1e0e80 1201# ifdef TE_AIX5
2b3c4602 1202 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1203# else
2b3c4602 1204 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1205# endif
7f6d05e8 1206#endif
7f6d05e8
CP		 1207#endif
1208#ifdef OBJ_ELF
9d8504b1
PB		 1209# ifdef TE_VXWORKS
1210 return "elf32-powerpc-vxworks";
1211# else
0baf16f2 1212 return (target_big_endian
2b3c4602
AM		 1213 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1214 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
9d8504b1 1215# endif
7f6d05e8
CP		 1216#endif
1217}
1218
69c040df
AM		 1219/* Insert opcodes and macros into hash tables. Called at startup and
1220 for .cpu pseudo. */
252b5132 1221
69c040df
AM		 1222static void
1223ppc_setup_opcodes (void)
252b5132 1224{
98027b10 1225 const struct powerpc_opcode *op;
252b5132
RH		 1226 const struct powerpc_opcode *op_end;
1227 const struct powerpc_macro *macro;
1228 const struct powerpc_macro *macro_end;
b84bf58a 1229 bfd_boolean bad_insn = FALSE;
252b5132 1230
69c040df
AM		 1231 if (ppc_hash != NULL)
1232 hash_die (ppc_hash);
1233 if (ppc_macro_hash != NULL)
1234 hash_die (ppc_macro_hash);
252b5132
RH		 1235
1236 /* Insert the opcodes into a hash table. */
1237 ppc_hash = hash_new ();
1238
c43a438d 1239 if (ENABLE_CHECKING)
b84bf58a 1240 {
c43a438d 1241 unsigned int i;
b84bf58a 1242
c43a438d
AM		 1243 /* Check operand masks. Code here and in the disassembler assumes
1244 all the 1's in the mask are contiguous. */
1245 for (i = 0; i < num_powerpc_operands; ++i)
b84bf58a 1246 {
c43a438d
AM		 1247 unsigned long mask = powerpc_operands[i].bitm;
1248 unsigned long right_bit;
1249 unsigned int j;
1250
1251 right_bit = mask & -mask;
1252 mask += right_bit;
1253 right_bit = mask & -mask;
1254 if (mask != right_bit)
1255 {
1256 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1257 bad_insn = TRUE;
1258 }
1259 for (j = i + 1; j < num_powerpc_operands; ++j)
1260 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1261 sizeof (powerpc_operands[0])) == 0)
1262 {
1263 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1264 j, i);
1265 bad_insn = TRUE;
1266 }
b84bf58a
AM		 1267 }
1268 }
1269
252b5132
RH		 1270 op_end = powerpc_opcodes + powerpc_num_opcodes;
1271 for (op = powerpc_opcodes; op < op_end; op++)
1272 {
c43a438d 1273 if (ENABLE_CHECKING)
b84bf58a 1274 {
c43a438d
AM		 1275 const unsigned char *o;
1276 unsigned long omask = op->mask;
1277
1278 /* The mask had better not trim off opcode bits. */
1279 if ((op->opcode & omask) != op->opcode)
1280 {
1281 as_bad (_("mask trims opcode bits for %s"),
1282 op->name);
1283 bad_insn = TRUE;
1284 }
1285
1286 /* The operands must not overlap the opcode or each other. */
1287 for (o = op->operands; *o; ++o)
1288 if (*o >= num_powerpc_operands)
1289 {
1290 as_bad (_("operand index error for %s"),
1291 op->name);
1292 bad_insn = TRUE;
1293 }
1294 else
b84bf58a 1295 {
c43a438d
AM		 1296 const struct powerpc_operand *operand = &powerpc_operands[*o];
1297 if (operand->shift >= 0)
b84bf58a 1298 {
c43a438d
AM		 1299 unsigned long mask = operand->bitm << operand->shift;
1300 if (omask & mask)
1301 {
1302 as_bad (_("operand %d overlap in %s"),
1303 (int) (o - op->operands), op->name);
1304 bad_insn = TRUE;
1305 }
1306 omask |= mask;
b84bf58a 1307 }
b84bf58a 1308 }
c43a438d 1309 }
252b5132 1310
2b3c4602 1311 if ((op->flags & ppc_cpu & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) != 0
252b5132 1312 && ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == 0
2b3c4602
AM		 1313 || ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64))
1314 == (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64)))
23e1d84c 1315 || (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0)
341026c1
NC		 1316 /* Certain instructions (eg: extsw) do not exist in the
1317 32-bit BookE instruction set, but they do exist in the
1318 64-bit BookE instruction set, and other PPC instruction
1319 sets. Check to see if the opcode has the BOOKE64 flag set.
1320 If it does make sure that the target CPU is not the BookE32. */
1321 && ((op->flags & PPC_OPCODE_BOOKE64) == 0
1322 || (ppc_cpu & PPC_OPCODE_BOOKE64) == PPC_OPCODE_BOOKE64
1323 || (ppc_cpu & PPC_OPCODE_BOOKE) == 0)
23e1d84c
AM		 1324 && ((op->flags & (PPC_OPCODE_POWER4 | PPC_OPCODE_NOPOWER4)) == 0
1325 || ((op->flags & PPC_OPCODE_POWER4)
b0648eec
AM		 1326 == (ppc_cpu & PPC_OPCODE_POWER4)))
1327 && ((op->flags & PPC_OPCODE_POWER5) == 0
1328 || ((op->flags & PPC_OPCODE_POWER5)
9622b051
AM		 1329 == (ppc_cpu & PPC_OPCODE_POWER5)))
1330 && ((op->flags & PPC_OPCODE_POWER6) == 0
1331 || ((op->flags & PPC_OPCODE_POWER6)
1332 == (ppc_cpu & PPC_OPCODE_POWER6))))
252b5132
RH		 1333 {
1334 const char *retval;
1335
98027b10 1336 retval = hash_insert (ppc_hash, op->name, (void *) op);
69c040df 1337 if (retval != NULL)
252b5132 1338 {
99a814a1 1339 /* Ignore Power duplicates for -m601. */
252b5132
RH		 1340 if ((ppc_cpu & PPC_OPCODE_601) != 0
1341 && (op->flags & PPC_OPCODE_POWER) != 0)
1342 continue;
1343
b84bf58a 1344 as_bad (_("duplicate instruction %s"),
99a814a1 1345 op->name);
b84bf58a 1346 bad_insn = TRUE;
252b5132
RH		 1347 }
1348 }
1349 }
1350
3c9030c1
AM		 1351 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1352 for (op = powerpc_opcodes; op < op_end; op++)
98027b10 1353 hash_insert (ppc_hash, op->name, (void *) op);
3c9030c1 1354
252b5132
RH		 1355 /* Insert the macros into a hash table. */
1356 ppc_macro_hash = hash_new ();
1357
1358 macro_end = powerpc_macros + powerpc_num_macros;
1359 for (macro = powerpc_macros; macro < macro_end; macro++)
1360 {
1361 if ((macro->flags & ppc_cpu) != 0)
1362 {
1363 const char *retval;
1364
98027b10 1365 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
252b5132
RH		 1366 if (retval != (const char *) NULL)
1367 {
b84bf58a
AM		 1368 as_bad (_("duplicate macro %s"), macro->name);
1369 bad_insn = TRUE;
252b5132
RH		 1370 }
1371 }
1372 }
1373
b84bf58a 1374 if (bad_insn)
252b5132 1375 abort ();
69c040df
AM		 1376}
1377
1378/* This function is called when the assembler starts up. It is called
1379 after the options have been parsed and the output file has been
1380 opened. */
1381
1382void
98027b10 1383md_begin (void)
69c040df
AM		 1384{
1385 ppc_set_cpu ();
1386
1387 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1388
1389#ifdef OBJ_ELF
1390 /* Set the ELF flags if desired. */
1391 if (ppc_flags && !msolaris)
1392 bfd_set_private_flags (stdoutput, ppc_flags);
1393#endif
1394
1395 ppc_setup_opcodes ();
252b5132 1396
67c1ffbe 1397 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1398 by the user. */
252b5132
RH		 1399 if (!set_target_endian)
1400 {
1401 set_target_endian = 1;
1402 target_big_endian = PPC_BIG_ENDIAN;
1403 }
1404
1405#ifdef OBJ_XCOFF
1406 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1407
1408 /* Create dummy symbols to serve as initial csects. This forces the
1409 text csects to precede the data csects. These symbols will not
1410 be output. */
1411 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1412 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1413 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1414 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1415#endif
1416
1417#ifdef TE_PE
1418
1419 ppc_current_section = text_section;
81d4177b 1420 ppc_previous_section = 0;
252b5132
RH		 1421
1422#endif
1423}
1424
6a0c61b7 1425void
98027b10 1426ppc_cleanup (void)
6a0c61b7 1427{
dc1d03fc 1428#ifdef OBJ_ELF
6a0c61b7
EZ		 1429 if (ppc_apuinfo_list == NULL)
1430 return;
1431
1432 /* Ok, so write the section info out. We have this layout:
1433
1434 byte data what
1435 ---- ---- ----
1436 0 8 length of "APUinfo\0"
1437 4 (n*4) number of APU's (4 bytes each)
1438 8 2 note type 2
1439 12 "APUinfo\0" name
1440 20 APU#1 first APU's info
1441 24 APU#2 second APU's info
1442 ... ...
1443 */
1444 {
1445 char *p;
1446 asection *seg = now_seg;
1447 subsegT subseg = now_subseg;
1448 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1449 unsigned int i;
6a0c61b7
EZ		 1450
1451 /* Create the .PPC.EMB.apuinfo section. */
1452 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1453 bfd_set_section_flags (stdoutput,
1454 apuinfo_secp,
e1a9cb8e 1455 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1456
1457 p = frag_more (4);
1458 md_number_to_chars (p, (valueT) 8, 4);
1459
1460 p = frag_more (4);
e98d298c 1461 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1462
1463 p = frag_more (4);
1464 md_number_to_chars (p, (valueT) 2, 4);
1465
1466 p = frag_more (8);
1467 strcpy (p, "APUinfo");
1468
1469 for (i = 0; i < ppc_apuinfo_num; i++)
1470 {
b34976b6
AM		 1471 p = frag_more (4);
1472 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1473 }
1474
1475 frag_align (2, 0, 0);
1476
1477 /* We probably can't restore the current segment, for there likely
1478 isn't one yet... */
1479 if (seg && subseg)
1480 subseg_set (seg, subseg);
1481 }
dc1d03fc 1482#endif
6a0c61b7
EZ		 1483}
1484
252b5132
RH		 1485/* Insert an operand value into an instruction. */
1486
1487static unsigned long
a1867a27
AM		 1488ppc_insert_operand (unsigned long insn,
1489 const struct powerpc_operand *operand,
1490 offsetT val,
1491 char *file,
1492 unsigned int line)
252b5132 1493{
b84bf58a 1494 long min, max, right;
eb42fac1 1495
b84bf58a
AM		 1496 max = operand->bitm;
1497 right = max & -max;
1498 min = 0;
1499
1500 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
252b5132 1501 {
b84bf58a 1502 if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0)
931774a9
AM		 1503 max = (max >> 1) & -right;
1504 min = ~max & -right;
b84bf58a 1505 }
252b5132 1506
b84bf58a 1507 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
3896c469 1508 max++;
252b5132 1509
b84bf58a 1510 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
a1867a27
AM		 1511 {
1512 long tmp = min;
1513 min = -max;
1514 max = -tmp;
1515 }
b84bf58a 1516
a1867a27
AM		 1517 if (min <= max)
1518 {
1519 /* Some people write constants with the sign extension done by
1520 hand but only up to 32 bits. This shouldn't really be valid,
1521 but, to permit this code to assemble on a 64-bit host, we
1522 sign extend the 32-bit value to 64 bits if so doing makes the
1523 value valid. */
1524 if (val > max
1525 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1526 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1527 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1528 val = val - 0x80000000 - 0x80000000;
1529
1530 /* Similarly, people write expressions like ~(1<<15), and expect
1531 this to be OK for a 32-bit unsigned value. */
1532 else if (val < min
1533 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1534 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1535 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1536 val = val + 0x80000000 + 0x80000000;
1537
1538 else if (val < min
1539 || val > max
1540 || (val & (right - 1)) != 0)
1541 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1542 }
b84bf58a 1543
252b5132
RH		 1544 if (operand->insert)
1545 {
1546 const char *errmsg;
1547
1548 errmsg = NULL;
2b3c4602 1549 insn = (*operand->insert) (insn, (long) val, ppc_cpu, &errmsg);
252b5132 1550 if (errmsg != (const char *) NULL)
0baf16f2 1551 as_bad_where (file, line, errmsg);
252b5132
RH		 1552 }
1553 else
b84bf58a 1554 insn |= ((long) val & operand->bitm) << operand->shift;
252b5132
RH		 1555
1556 return insn;
1557}
1558
1559\f
1560#ifdef OBJ_ELF
1561/* Parse @got, etc. and return the desired relocation. */
1562static bfd_reloc_code_real_type
98027b10 1563ppc_elf_suffix (char **str_p, expressionS *exp_p)
252b5132
RH		 1564{
1565 struct map_bfd {
1566 char *string;
b7d7dc63
AM		 1567 unsigned int length : 8;
1568 unsigned int valid32 : 1;
1569 unsigned int valid64 : 1;
1570 unsigned int reloc;
252b5132
RH		 1571 };
1572
1573 char ident[20];
1574 char *str = *str_p;
1575 char *str2;
1576 int ch;
1577 int len;
15c1449b 1578 const struct map_bfd *ptr;
252b5132 1579
b7d7dc63
AM		 1580#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1581#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1582#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1583
15c1449b 1584 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1585 MAP ("l", BFD_RELOC_LO16),
1586 MAP ("h", BFD_RELOC_HI16),
1587 MAP ("ha", BFD_RELOC_HI16_S),
1588 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1589 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1590 MAP ("got", BFD_RELOC_16_GOTOFF),
1591 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1592 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1593 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1594 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1595 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1596 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1597 MAP ("copy", BFD_RELOC_PPC_COPY),
1598 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1599 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1600 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1601 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1602 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1603 MAP ("tls", BFD_RELOC_PPC_TLS),
1604 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1605 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1606 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1607 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1608 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1609 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1610 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1611 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1612 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1613 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1614 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1615 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1616 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1617 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1618 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1619 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1620 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1621 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1622 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1623 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1624 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1625 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1626 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1627 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1628 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1629 MAP32 ("fixup", BFD_RELOC_CTOR),
1630 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1631 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1632 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1633 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1634 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1635 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1636 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1637 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1638 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1639 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1640 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1641 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1642 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1643 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1644 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1645 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1646 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1647 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1648 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1649 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1650 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1651 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1652 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1653 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1654 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1655 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1656 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1657 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1658 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1659 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1660 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1661 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1662 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1663 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1664 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1665 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1666 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1667 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1668 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1669 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1670 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
252b5132
RH		 1671 };
1672
1673 if (*str++ != '@')
1674 return BFD_RELOC_UNUSED;
1675
1676 for (ch = *str, str2 = ident;
1677 (str2 < ident + sizeof (ident) - 1
3882b010 1678 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1679 ch = *++str)
1680 {
3882b010 1681 *str2++ = TOLOWER (ch);
252b5132
RH		 1682 }
1683
1684 *str2 = '\0';
1685 len = str2 - ident;
1686
1687 ch = ident[0];
1688 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1689 if (ch == ptr->string[0]
1690 && len == ptr->length
b7d7dc63
AM		 1691 && memcmp (ident, ptr->string, ptr->length) == 0
1692 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 1693 {
15c1449b
AM		 1694 int reloc = ptr->reloc;
1695
cdba85ec 1696 if (!ppc_obj64)
5f6db75a
AM		 1697 if (exp_p->X_add_number != 0
1698 && (reloc == (int) BFD_RELOC_16_GOTOFF
1699 || reloc == (int) BFD_RELOC_LO16_GOTOFF
1700 || reloc == (int) BFD_RELOC_HI16_GOTOFF
1701 || reloc == (int) BFD_RELOC_HI16_S_GOTOFF))
1702 as_warn (_("identifier+constant@got means identifier@got+constant"));
1703
1704 /* Now check for identifier@suffix+constant. */
1705 if (*str == '-' || *str == '+')
252b5132 1706 {
5f6db75a
AM		 1707 char *orig_line = input_line_pointer;
1708 expressionS new_exp;
1709
1710 input_line_pointer = str;
1711 expression (&new_exp);
1712 if (new_exp.X_op == O_constant)
252b5132 1713 {
5f6db75a
AM		 1714 exp_p->X_add_number += new_exp.X_add_number;
1715 str = input_line_pointer;
252b5132 1716 }
5f6db75a
AM		 1717
1718 if (&input_line_pointer != str_p)
1719 input_line_pointer = orig_line;
252b5132 1720 }
252b5132 1721 *str_p = str;
0baf16f2 1722
2b3c4602 1723 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 1724 && exp_p->X_op == O_symbol
1725 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 1726 {
9f2b53d7
AM		 1727 /* Change the symbol so that the dummy .TOC. symbol can be
1728 omitted from the object file. */
0baf16f2
AM		 1729 exp_p->X_add_symbol = &abs_symbol;
1730 }
1731
15c1449b 1732 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 1733 }
1734
1735 return BFD_RELOC_UNUSED;
1736}
1737
99a814a1
AM		 1738/* Like normal .long/.short/.word, except support @got, etc.
1739 Clobbers input_line_pointer, checks end-of-line. */
252b5132 1740static void
98027b10 1741ppc_elf_cons (int nbytes /* 1=.byte, 2=.word, 4=.long, 8=.llong */)
252b5132
RH		 1742{
1743 expressionS exp;
1744 bfd_reloc_code_real_type reloc;
1745
1746 if (is_it_end_of_statement ())
1747 {
1748 demand_empty_rest_of_line ();
1749 return;
1750 }
1751
1752 do
1753 {
1754 expression (&exp);
1755 if (exp.X_op == O_symbol
1756 && *input_line_pointer == '@'
99a814a1
AM		 1757 && (reloc = ppc_elf_suffix (&input_line_pointer,
1758 &exp)) != BFD_RELOC_UNUSED)
252b5132 1759 {
99a814a1
AM		 1760 reloc_howto_type *reloc_howto;
1761 int size;
1762
1763 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1764 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH		 1765
1766 if (size > nbytes)
0baf16f2
AM		 1767 {
1768 as_bad (_("%s relocations do not fit in %d bytes\n"),
1769 reloc_howto->name, nbytes);
1770 }
252b5132
RH		 1771 else
1772 {
0baf16f2
AM		 1773 char *p;
1774 int offset;
252b5132 1775
0baf16f2
AM		 1776 p = frag_more (nbytes);
1777 offset = 0;
1778 if (target_big_endian)
1779 offset = nbytes - size;
99a814a1
AM		 1780 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1781 &exp, 0, reloc);
252b5132
RH		 1782 }
1783 }
1784 else
1785 emit_expr (&exp, (unsigned int) nbytes);
1786 }
1787 while (*input_line_pointer++ == ',');
1788
99a814a1
AM		 1789 /* Put terminator back into stream. */
1790 input_line_pointer--;
252b5132
RH		 1791 demand_empty_rest_of_line ();
1792}
1793
1794/* Solaris pseduo op to change to the .rodata section. */
1795static void
98027b10 1796ppc_elf_rdata (int xxx)
252b5132
RH		 1797{
1798 char *save_line = input_line_pointer;
1799 static char section[] = ".rodata\n";
1800
99a814a1 1801 /* Just pretend this is .section .rodata */
252b5132
RH		 1802 input_line_pointer = section;
1803 obj_elf_section (xxx);
1804
1805 input_line_pointer = save_line;
1806}
1807
99a814a1 1808/* Pseudo op to make file scope bss items. */
252b5132 1809static void
98027b10 1810ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
252b5132 1811{
98027b10
AM		 1812 char *name;
1813 char c;
1814 char *p;
252b5132 1815 offsetT size;
98027b10 1816 symbolS *symbolP;
252b5132
RH		 1817 offsetT align;
1818 segT old_sec;
1819 int old_subsec;
1820 char *pfrag;
1821 int align2;
1822
1823 name = input_line_pointer;
1824 c = get_symbol_end ();
1825
99a814a1 1826 /* just after name is now '\0'. */
252b5132
RH		 1827 p = input_line_pointer;
1828 *p = c;
1829 SKIP_WHITESPACE ();
1830 if (*input_line_pointer != ',')
1831 {
1832 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
1833 ignore_rest_of_line ();
1834 return;
1835 }
1836
1837 input_line_pointer++; /* skip ',' */
1838 if ((size = get_absolute_expression ()) < 0)
1839 {
1840 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
1841 ignore_rest_of_line ();
1842 return;
1843 }
1844
1845 /* The third argument to .lcomm is the alignment. */
1846 if (*input_line_pointer != ',')
1847 align = 8;
1848 else
1849 {
1850 ++input_line_pointer;
1851 align = get_absolute_expression ();
1852 if (align <= 0)
1853 {
1854 as_warn (_("ignoring bad alignment"));
1855 align = 8;
1856 }
1857 }
1858
1859 *p = 0;
1860 symbolP = symbol_find_or_make (name);
1861 *p = c;
1862
1863 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
1864 {
1865 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
1866 S_GET_NAME (symbolP));
1867 ignore_rest_of_line ();
1868 return;
1869 }
1870
1871 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
1872 {
1873 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
1874 S_GET_NAME (symbolP),
1875 (long) S_GET_VALUE (symbolP),
1876 (long) size);
1877
1878 ignore_rest_of_line ();
1879 return;
1880 }
1881
99a814a1 1882 /* Allocate_bss. */
252b5132
RH		 1883 old_sec = now_seg;
1884 old_subsec = now_subseg;
1885 if (align)
1886 {
99a814a1 1887 /* Convert to a power of 2 alignment. */
252b5132
RH		 1888 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
1889 if (align != 1)
1890 {
1891 as_bad (_("Common alignment not a power of 2"));
1892 ignore_rest_of_line ();
1893 return;
1894 }
1895 }
1896 else
1897 align2 = 0;
1898
1899 record_alignment (bss_section, align2);
1900 subseg_set (bss_section, 0);
1901 if (align2)
1902 frag_align (align2, 0, 0);
1903 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 1904 symbol_get_frag (symbolP)->fr_symbol = 0;
1905 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 1906 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
1907 (char *) 0);
1908 *pfrag = 0;
1909 S_SET_SIZE (symbolP, size);
1910 S_SET_SEGMENT (symbolP, bss_section);
1911 subseg_set (old_sec, old_subsec);
1912 demand_empty_rest_of_line ();
1913}
1914
1915/* Validate any relocations emitted for -mrelocatable, possibly adding
1916 fixups for word relocations in writable segments, so we can adjust
1917 them at runtime. */
1918static void
98027b10 1919ppc_elf_validate_fix (fixS *fixp, segT seg)
252b5132
RH		 1920{
1921 if (fixp->fx_done || fixp->fx_pcrel)
1922 return;
1923
1924 switch (shlib)
1925 {
1926 case SHLIB_NONE:
1927 case SHLIB_PIC:
1928 return;
1929
5d6f4f16 1930 case SHLIB_MRELOCATABLE:
252b5132
RH		 1931 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
1932 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
1933 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
1934 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
1935 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 1936 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 1937 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
1938 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
1939 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 1940 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 1941 && strcmp (segment_name (seg), ".got2") != 0
1942 && strcmp (segment_name (seg), ".dtors") != 0
1943 && strcmp (segment_name (seg), ".ctors") != 0
1944 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 1945 && strcmp (segment_name (seg), ".gcc_except_table") != 0
1946 && strcmp (segment_name (seg), ".eh_frame") != 0
1947 && strcmp (segment_name (seg), ".ex_shared") != 0)
1948 {
1949 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
1950 || fixp->fx_r_type != BFD_RELOC_CTOR)
1951 {
1952 as_bad_where (fixp->fx_file, fixp->fx_line,
1953 _("Relocation cannot be done when using -mrelocatable"));
1954 }
1955 }
1956 return;
1957 }
1958}
0baf16f2 1959
7e8d4ab4
AM		 1960/* Prevent elf_frob_file_before_adjust removing a weak undefined
1961 function descriptor sym if the corresponding code sym is used. */
1962
1963void
98027b10 1964ppc_frob_file_before_adjust (void)
0baf16f2 1965{
7e8d4ab4 1966 symbolS *symp;
9232bbb0 1967 asection *toc;
0baf16f2 1968
7e8d4ab4
AM		 1969 if (!ppc_obj64)
1970 return;
1971
1972 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 1973 {
7e8d4ab4
AM		 1974 const char *name;
1975 char *dotname;
1976 symbolS *dotsym;
1977 size_t len;
1978
1979 name = S_GET_NAME (symp);
1980 if (name[0] == '.')
1981 continue;
1982
1983 if (! S_IS_WEAK (symp)
1984 || S_IS_DEFINED (symp))
1985 continue;
1986
1987 len = strlen (name) + 1;
1988 dotname = xmalloc (len + 1);
1989 dotname[0] = '.';
1990 memcpy (dotname + 1, name, len);
461b725f 1991 dotsym = symbol_find_noref (dotname, 1);
7e8d4ab4
AM		 1992 free (dotname);
1993 if (dotsym != NULL && (symbol_used_p (dotsym)
1994 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 1995 symbol_mark_used (symp);
1996
0baf16f2
AM		 1997 }
1998
9232bbb0
AM		 1999 toc = bfd_get_section_by_name (stdoutput, ".toc");
2000 if (toc != NULL
2001 && bfd_section_size (stdoutput, toc) > 0x10000)
2002 as_warn (_("TOC section size exceeds 64k"));
2003
7e8d4ab4
AM		 2004 /* Don't emit .TOC. symbol. */
2005 symp = symbol_find (".TOC.");
2006 if (symp != NULL)
2007 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
0baf16f2 2008}
252b5132
RH		 2009#endif /* OBJ_ELF */
2010\f
2011#ifdef TE_PE
2012
2013/*
99a814a1 2014 * Summary of parse_toc_entry.
252b5132
RH		 2015 *
2016 * in: Input_line_pointer points to the '[' in one of:
2017 *
2018 * [toc] [tocv] [toc32] [toc64]
2019 *
2020 * Anything else is an error of one kind or another.
2021 *
81d4177b 2022 * out:
252b5132
RH		 2023 * return value: success or failure
2024 * toc_kind: kind of toc reference
2025 * input_line_pointer:
2026 * success: first char after the ']'
2027 * failure: unchanged
2028 *
2029 * settings:
2030 *
2031 * [toc] - rv == success, toc_kind = default_toc
2032 * [tocv] - rv == success, toc_kind = data_in_toc
2033 * [toc32] - rv == success, toc_kind = must_be_32
2034 * [toc64] - rv == success, toc_kind = must_be_64
2035 *
2036 */
2037
81d4177b
KH		 2038enum toc_size_qualifier
2039{
252b5132
RH		 2040 default_toc, /* The toc cell constructed should be the system default size */
2041 data_in_toc, /* This is a direct reference to a toc cell */
2042 must_be_32, /* The toc cell constructed must be 32 bits wide */
2043 must_be_64 /* The toc cell constructed must be 64 bits wide */
2044};
2045
2046static int
98027b10 2047parse_toc_entry (enum toc_size_qualifier *toc_kind)
252b5132
RH		 2048{
2049 char *start;
2050 char *toc_spec;
2051 char c;
2052 enum toc_size_qualifier t;
2053
99a814a1 2054 /* Save the input_line_pointer. */
252b5132
RH		 2055 start = input_line_pointer;
2056
99a814a1 2057 /* Skip over the '[' , and whitespace. */
252b5132
RH		 2058 ++input_line_pointer;
2059 SKIP_WHITESPACE ();
81d4177b 2060
99a814a1 2061 /* Find the spelling of the operand. */
252b5132
RH		 2062 toc_spec = input_line_pointer;
2063 c = get_symbol_end ();
2064
99a814a1 2065 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 2066 {
2067 t = default_toc;
2068 }
99a814a1 2069 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 2070 {
2071 t = data_in_toc;
2072 }
99a814a1 2073 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2074 {
2075 t = must_be_32;
2076 }
99a814a1 2077 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2078 {
2079 t = must_be_64;
2080 }
2081 else
2082 {
2083 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2084 *input_line_pointer = c;
2085 input_line_pointer = start;
252b5132
RH		 2086 return 0;
2087 }
2088
99a814a1
AM		 2089 /* Now find the ']'. */
2090 *input_line_pointer = c;
252b5132 2091
81d4177b
KH		 2092 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2093 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2094
2095 if (c != ']')
2096 {
2097 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2098 input_line_pointer = start;
252b5132
RH		 2099 return 0;
2100 }
2101
99a814a1 2102 *toc_kind = t;
252b5132
RH		 2103 return 1;
2104}
2105#endif
2106\f
2107
dc1d03fc 2108#ifdef OBJ_ELF
6a0c61b7
EZ		 2109#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2110static void
98027b10 2111ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
6a0c61b7
EZ		 2112{
2113 unsigned int i;
2114
2115 /* Check we don't already exist. */
2116 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2117 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2118 return;
b34976b6 2119
6a0c61b7
EZ		 2120 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2121 {
2122 if (ppc_apuinfo_num_alloc == 0)
2123 {
2124 ppc_apuinfo_num_alloc = 4;
2125 ppc_apuinfo_list = (unsigned long *)
2126 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2127 }
2128 else
2129 {
2130 ppc_apuinfo_num_alloc += 4;
2131 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2132 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2133 }
2134 }
dc1d03fc 2135 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2136}
2137#undef APUID
dc1d03fc 2138#endif
6a0c61b7
EZ		 2139\f
2140
252b5132
RH		 2141/* We need to keep a list of fixups. We can't simply generate them as
2142 we go, because that would require us to first create the frag, and
2143 that would screw up references to ``.''. */
2144
2145struct ppc_fixup
2146{
2147 expressionS exp;
2148 int opindex;
2149 bfd_reloc_code_real_type reloc;
2150};
2151
2152#define MAX_INSN_FIXUPS (5)
2153
2154/* This routine is called for each instruction to be assembled. */
2155
2156void
98027b10 2157md_assemble (char *str)
252b5132
RH		 2158{
2159 char *s;
2160 const struct powerpc_opcode *opcode;
2161 unsigned long insn;
2162 const unsigned char *opindex_ptr;
2163 int skip_optional;
2164 int need_paren;
2165 int next_opindex;
2166 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2167 int fc;
2168 char *f;
09b935ac 2169 int addr_mod;
252b5132
RH		 2170 int i;
2171#ifdef OBJ_ELF
2172 bfd_reloc_code_real_type reloc;
2173#endif
2174
2175 /* Get the opcode. */
3882b010 2176 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2177 ;
2178 if (*s != '\0')
2179 *s++ = '\0';
2180
2181 /* Look up the opcode in the hash table. */
2182 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2183 if (opcode == (const struct powerpc_opcode *) NULL)
2184 {
2185 const struct powerpc_macro *macro;
2186
2187 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2188 if (macro == (const struct powerpc_macro *) NULL)
2189 as_bad (_("Unrecognized opcode: `%s'"), str);
2190 else
2191 ppc_macro (s, macro);
2192
2193 return;
2194 }
2195
2196 insn = opcode->opcode;
2197
2198 str = s;
3882b010 2199 while (ISSPACE (*str))
252b5132
RH		 2200 ++str;
2201
2202 /* PowerPC operands are just expressions. The only real issue is
2203 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2204 an optional operand separate the operands only with commas (in some
2205 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2206 have optional operands). Most instructions with optional operands
2207 have only one. Those that have more than one optional operand can
2208 take either all their operands or none. So, before we start seriously
2209 parsing the operands, we check to see if we have optional operands,
2210 and if we do, we count the number of commas to see which operands
2211 have been omitted. */
252b5132
RH		 2212 skip_optional = 0;
2213 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2214 {
2215 const struct powerpc_operand *operand;
2216
2217 operand = &powerpc_operands[*opindex_ptr];
2218 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2219 {
2220 unsigned int opcount;
7fe9cf6b
NC		 2221 unsigned int num_operands_expected;
2222 unsigned int i;
252b5132
RH		 2223
2224 /* There is an optional operand. Count the number of
2225 commas in the input line. */
2226 if (*str == '\0')
2227 opcount = 0;
2228 else
2229 {
2230 opcount = 1;
2231 s = str;
2232 while ((s = strchr (s, ',')) != (char *) NULL)
2233 {
2234 ++opcount;
2235 ++s;
2236 }
2237 }
2238
7fe9cf6b
NC		 2239 /* Compute the number of expected operands.
2240 Do not count fake operands. */
2241 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2242 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2243 ++ num_operands_expected;
2244
252b5132
RH		 2245 /* If there are fewer operands in the line then are called
2246 for by the instruction, we want to skip the optional
1f6c9eb0 2247 operands. */
7fe9cf6b 2248 if (opcount < num_operands_expected)
252b5132
RH		 2249 skip_optional = 1;
2250
2251 break;
2252 }
2253 }
2254
2255 /* Gather the operands. */
2256 need_paren = 0;
2257 next_opindex = 0;
2258 fc = 0;
2259 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2260 {
2261 const struct powerpc_operand *operand;
2262 const char *errmsg;
2263 char *hold;
2264 expressionS ex;
2265 char endc;
2266
2267 if (next_opindex == 0)
2268 operand = &powerpc_operands[*opindex_ptr];
2269 else
2270 {
2271 operand = &powerpc_operands[next_opindex];
2272 next_opindex = 0;
2273 }
252b5132
RH		 2274 errmsg = NULL;
2275
2276 /* If this is a fake operand, then we do not expect anything
2277 from the input. */
2278 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2279 {
2b3c4602 2280 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2281 if (errmsg != (const char *) NULL)
2282 as_bad (errmsg);
2283 continue;
2284 }
2285
2286 /* If this is an optional operand, and we are skipping it, just
2287 insert a zero. */
2288 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2289 && skip_optional)
2290 {
2291 if (operand->insert)
2292 {
2b3c4602 2293 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2294 if (errmsg != (const char *) NULL)
2295 as_bad (errmsg);
2296 }
2297 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2298 next_opindex = *opindex_ptr + 1;
2299 continue;
2300 }
2301
2302 /* Gather the operand. */
2303 hold = input_line_pointer;
2304 input_line_pointer = str;
2305
2306#ifdef TE_PE
81d4177b 2307 if (*input_line_pointer == '[')
252b5132
RH		 2308 {
2309 /* We are expecting something like the second argument here:
99a814a1
AM		 2310 *
2311 * lwz r4,[toc].GS.0.static_int(rtoc)
2312 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2313 * The argument following the `]' must be a symbol name, and the
2314 * register must be the toc register: 'rtoc' or '2'
2315 *
2316 * The effect is to 0 as the displacement field
2317 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2318 * the appropriate variation) reloc against it based on the symbol.
2319 * The linker will build the toc, and insert the resolved toc offset.
2320 *
2321 * Note:
2322 * o The size of the toc entry is currently assumed to be
2323 * 32 bits. This should not be assumed to be a hard coded
2324 * number.
2325 * o In an effort to cope with a change from 32 to 64 bits,
2326 * there are also toc entries that are specified to be
2327 * either 32 or 64 bits:
2328 * lwz r4,[toc32].GS.0.static_int(rtoc)
2329 * lwz r4,[toc64].GS.0.static_int(rtoc)
2330 * These demand toc entries of the specified size, and the
2331 * instruction probably requires it.
2332 */
252b5132
RH		 2333
2334 int valid_toc;
2335 enum toc_size_qualifier toc_kind;
2336 bfd_reloc_code_real_type toc_reloc;
2337
99a814a1
AM		 2338 /* Go parse off the [tocXX] part. */
2339 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2340
81d4177b 2341 if (!valid_toc)
252b5132 2342 {
99a814a1
AM		 2343 /* Note: message has already been issued.
2344 FIXME: what sort of recovery should we do?
2345 demand_rest_of_line (); return; ? */
252b5132
RH		 2346 }
2347
99a814a1
AM		 2348 /* Now get the symbol following the ']'. */
2349 expression (&ex);
252b5132
RH		 2350
2351 switch (toc_kind)
2352 {
2353 case default_toc:
99a814a1
AM		 2354 /* In this case, we may not have seen the symbol yet,
2355 since it is allowed to appear on a .extern or .globl
2356 or just be a label in the .data section. */
252b5132
RH		 2357 toc_reloc = BFD_RELOC_PPC_TOC16;
2358 break;
2359 case data_in_toc:
99a814a1
AM		 2360 /* 1. The symbol must be defined and either in the toc
2361 section, or a global.
2362 2. The reloc generated must have the TOCDEFN flag set
2363 in upper bit mess of the reloc type.
2364 FIXME: It's a little confusing what the tocv
2365 qualifier can be used for. At the very least, I've
2366 seen three uses, only one of which I'm sure I can
2367 explain. */
81d4177b
KH		 2368 if (ex.X_op == O_symbol)
2369 {
252b5132 2370 assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2371 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2372 != tocdata_section)
252b5132 2373 {
99a814a1 2374 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2375 }
2376 }
2377
2378 toc_reloc = BFD_RELOC_PPC_TOC16;
2379 break;
2380 case must_be_32:
99a814a1
AM		 2381 /* FIXME: these next two specifically specify 32/64 bit
2382 toc entries. We don't support them today. Is this
2383 the right way to say that? */
252b5132
RH		 2384 toc_reloc = BFD_RELOC_UNUSED;
2385 as_bad (_("Unimplemented toc32 expression modifier"));
2386 break;
2387 case must_be_64:
99a814a1 2388 /* FIXME: see above. */
252b5132
RH		 2389 toc_reloc = BFD_RELOC_UNUSED;
2390 as_bad (_("Unimplemented toc64 expression modifier"));
2391 break;
2392 default:
bc805888 2393 fprintf (stderr,
99a814a1
AM		 2394 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2395 toc_kind);
bc805888 2396 abort ();
252b5132
RH		 2397 break;
2398 }
2399
2400 /* We need to generate a fixup for this expression. */
2401 if (fc >= MAX_INSN_FIXUPS)
2402 as_fatal (_("too many fixups"));
2403
2404 fixups[fc].reloc = toc_reloc;
2405 fixups[fc].exp = ex;
2406 fixups[fc].opindex = *opindex_ptr;
2407 ++fc;
2408
99a814a1
AM		 2409 /* Ok. We've set up the fixup for the instruction. Now make it
2410 look like the constant 0 was found here. */
252b5132
RH		 2411 ex.X_unsigned = 1;
2412 ex.X_op = O_constant;
2413 ex.X_add_number = 0;
2414 ex.X_add_symbol = NULL;
2415 ex.X_op_symbol = NULL;
2416 }
2417
2418 else
2419#endif /* TE_PE */
2420 {
2421 if (! register_name (&ex))
2422 {
2423 if ((operand->flags & PPC_OPERAND_CR) != 0)
b34976b6 2424 cr_operand = TRUE;
252b5132 2425 expression (&ex);
b34976b6 2426 cr_operand = FALSE;
252b5132
RH		 2427 }
2428 }
2429
2430 str = input_line_pointer;
2431 input_line_pointer = hold;
2432
2433 if (ex.X_op == O_illegal)
2434 as_bad (_("illegal operand"));
2435 else if (ex.X_op == O_absent)
2436 as_bad (_("missing operand"));
2437 else if (ex.X_op == O_register)
2438 {
2439 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2440 (char *) NULL, 0);
2441 }
2442 else if (ex.X_op == O_constant)
2443 {
2444#ifdef OBJ_ELF
81d4177b 2445 /* Allow @HA, @L, @H on constants. */
252b5132
RH		 2446 char *orig_str = str;
2447
2448 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2449 switch (reloc)
2450 {
2451 default:
2452 str = orig_str;
2453 break;
2454
2455 case BFD_RELOC_LO16:
2456 /* X_unsigned is the default, so if the user has done
0baf16f2
AM		 2457 something which cleared it, we always produce a
2458 signed value. */
2459 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH		 2460 ex.X_add_number &= 0xffff;
2461 else
0baf16f2 2462 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2463 break;
2464
2465 case BFD_RELOC_HI16:
0baf16f2
AM		 2466 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2467 ex.X_add_number = PPC_HI (ex.X_add_number);
2468 else
2469 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH		 2470 break;
2471
2472 case BFD_RELOC_HI16_S:
0baf16f2
AM		 2473 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2474 ex.X_add_number = PPC_HA (ex.X_add_number);
2475 else
2476 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2477 break;
2478
0baf16f2
AM		 2479 case BFD_RELOC_PPC64_HIGHER:
2480 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2481 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2482 else
2483 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2484 break;
2485
2486 case BFD_RELOC_PPC64_HIGHER_S:
2487 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2488 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2489 else
2490 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2491 break;
0baf16f2
AM		 2492
2493 case BFD_RELOC_PPC64_HIGHEST:
2494 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2495 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2496 else
2497 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2498 break;
2499
2500 case BFD_RELOC_PPC64_HIGHEST_S:
2501 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2502 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2503 else
2504 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2505 break;
252b5132 2506 }
0baf16f2 2507#endif /* OBJ_ELF */
252b5132
RH		 2508 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2509 (char *) NULL, 0);
2510 }
2511#ifdef OBJ_ELF
2512 else if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2513 {
cdba85ec
AM		 2514 /* Some TLS tweaks. */
2515 switch (reloc)
2516 {
2517 default:
2518 break;
2519 case BFD_RELOC_PPC_TLS:
2520 insn = ppc_insert_operand (insn, operand, ppc_obj64 ? 13 : 2,
2521 (char *) NULL, 0);
2522 break;
2523 /* We'll only use the 32 (or 64) bit form of these relocations
2524 in constants. Instructions get the 16 bit form. */
2525 case BFD_RELOC_PPC_DTPREL:
2526 reloc = BFD_RELOC_PPC_DTPREL16;
2527 break;
2528 case BFD_RELOC_PPC_TPREL:
2529 reloc = BFD_RELOC_PPC_TPREL16;
2530 break;
2531 }
2532
99a814a1
AM		 2533 /* For the absolute forms of branches, convert the PC
2534 relative form back into the absolute. */
252b5132
RH		 2535 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2536 {
2537 switch (reloc)
2538 {
2539 case BFD_RELOC_PPC_B26:
2540 reloc = BFD_RELOC_PPC_BA26;
2541 break;
2542 case BFD_RELOC_PPC_B16:
2543 reloc = BFD_RELOC_PPC_BA16;
2544 break;
2545 case BFD_RELOC_PPC_B16_BRTAKEN:
2546 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2547 break;
2548 case BFD_RELOC_PPC_B16_BRNTAKEN:
2549 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2550 break;
2551 default:
2552 break;
2553 }
2554 }
2555
2b3c4602 2556 if (ppc_obj64
adadcc0c 2557 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
0baf16f2
AM		 2558 {
2559 switch (reloc)
2560 {
2561 case BFD_RELOC_16:
2562 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2563 break;
2564 case BFD_RELOC_LO16:
2565 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2566 break;
2567 case BFD_RELOC_16_GOTOFF:
2568 reloc = BFD_RELOC_PPC64_GOT16_DS;
2569 break;
2570 case BFD_RELOC_LO16_GOTOFF:
2571 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2572 break;
2573 case BFD_RELOC_LO16_PLTOFF:
2574 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2575 break;
1cfc59d5 2576 case BFD_RELOC_16_BASEREL:
0baf16f2
AM		 2577 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2578 break;
2579 case BFD_RELOC_LO16_BASEREL:
2580 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2581 break;
2582 case BFD_RELOC_PPC_TOC16:
2583 reloc = BFD_RELOC_PPC64_TOC16_DS;
2584 break;
2585 case BFD_RELOC_PPC64_TOC16_LO:
2586 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2587 break;
2588 case BFD_RELOC_PPC64_PLTGOT16:
2589 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2590 break;
2591 case BFD_RELOC_PPC64_PLTGOT16_LO:
2592 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2593 break;
cdba85ec
AM		 2594 case BFD_RELOC_PPC_DTPREL16:
2595 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2596 break;
2597 case BFD_RELOC_PPC_DTPREL16_LO:
2598 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2599 break;
2600 case BFD_RELOC_PPC_TPREL16:
2601 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2602 break;
2603 case BFD_RELOC_PPC_TPREL16_LO:
2604 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2605 break;
2606 case BFD_RELOC_PPC_GOT_DTPREL16:
2607 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2608 case BFD_RELOC_PPC_GOT_TPREL16:
2609 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2610 break;
0baf16f2
AM		 2611 default:
2612 as_bad (_("unsupported relocation for DS offset field"));
2613 break;
2614 }
2615 }
2616
252b5132
RH		 2617 /* We need to generate a fixup for this expression. */
2618 if (fc >= MAX_INSN_FIXUPS)
2619 as_fatal (_("too many fixups"));
2620 fixups[fc].exp = ex;
2621 fixups[fc].opindex = 0;
2622 fixups[fc].reloc = reloc;
2623 ++fc;
2624 }
2625#endif /* OBJ_ELF */
2626
2627 else
2628 {
2629 /* We need to generate a fixup for this expression. */
2630 if (fc >= MAX_INSN_FIXUPS)
2631 as_fatal (_("too many fixups"));
2632 fixups[fc].exp = ex;
2633 fixups[fc].opindex = *opindex_ptr;
2634 fixups[fc].reloc = BFD_RELOC_UNUSED;
2635 ++fc;
2636 }
2637
2638 if (need_paren)
2639 {
2640 endc = ')';
2641 need_paren = 0;
2642 }
2643 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2644 {
2645 endc = '(';
2646 need_paren = 1;
2647 }
2648 else
2649 endc = ',';
2650
2651 /* The call to expression should have advanced str past any
2652 whitespace. */
2653 if (*str != endc
2654 && (endc != ',' || *str != '\0'))
2655 {
2656 as_bad (_("syntax error; found `%c' but expected `%c'"), *str, endc);
2657 break;
2658 }
2659
2660 if (*str != '\0')
2661 ++str;
2662 }
2663
3882b010 2664 while (ISSPACE (*str))
252b5132
RH		 2665 ++str;
2666
2667 if (*str != '\0')
2668 as_bad (_("junk at end of line: `%s'"), str);
2669
dc1d03fc 2670#ifdef OBJ_ELF
6a0c61b7
EZ		 2671 /* Do we need/want a APUinfo section? */
2672 if (ppc_cpu & (PPC_OPCODE_SPE
2673 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS
2674 | PPC_OPCODE_BRLOCK | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
2675 | PPC_OPCODE_RFMCI))
2676 {
2677 /* These are all version "1". */
2678 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 2679 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 2680 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 2681 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 2682 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 2683 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 2684 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 2685 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 2686 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 2687 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 2688 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 2689 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 2690 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 2691 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
6a0c61b7 2692 }
dc1d03fc 2693#endif
6a0c61b7 2694
252b5132
RH		 2695 /* Write out the instruction. */
2696 f = frag_more (4);
09b935ac
AM		 2697 addr_mod = frag_now_fix () & 3;
2698 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
2699 as_bad (_("instruction address is not a multiple of 4"));
2700 frag_now->insn_addr = addr_mod;
2701 frag_now->has_code = 1;
252b5132
RH		 2702 md_number_to_chars (f, insn, 4);
2703
5d6f4f16
GK		 2704#ifdef OBJ_ELF
2705 dwarf2_emit_insn (4);
2706#endif
2707
252b5132
RH		 2708 /* Create any fixups. At this point we do not use a
2709 bfd_reloc_code_real_type, but instead just use the
2710 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2711 handle fixups for any operand type, although that is admittedly
2712 not a very exciting feature. We pick a BFD reloc type in
55cf6793 2713 md_apply_fix. */
252b5132
RH		 2714 for (i = 0; i < fc; i++)
2715 {
2716 const struct powerpc_operand *operand;
2717
2718 operand = &powerpc_operands[fixups[i].opindex];
2719 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2720 {
99a814a1 2721 reloc_howto_type *reloc_howto;
252b5132
RH		 2722 int size;
2723 int offset;
2724 fixS *fixP;
2725
99a814a1 2726 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 2727 if (!reloc_howto)
2728 abort ();
2729
2730 size = bfd_get_reloc_size (reloc_howto);
2731 offset = target_big_endian ? (4 - size) : 0;
2732
2733 if (size < 1 || size > 4)
bc805888 2734 abort ();
252b5132 2735
99a814a1
AM		 2736 fixP = fix_new_exp (frag_now,
2737 f - frag_now->fr_literal + offset,
2738 size,
2739 &fixups[i].exp,
2740 reloc_howto->pc_relative,
252b5132
RH		 2741 fixups[i].reloc);
2742
2743 /* Turn off complaints that the addend is too large for things like
2744 foo+100000@ha. */
2745 switch (fixups[i].reloc)
2746 {
2747 case BFD_RELOC_16_GOTOFF:
2748 case BFD_RELOC_PPC_TOC16:
2749 case BFD_RELOC_LO16:
2750 case BFD_RELOC_HI16:
2751 case BFD_RELOC_HI16_S:
0baf16f2 2752#ifdef OBJ_ELF
0baf16f2
AM		 2753 case BFD_RELOC_PPC64_HIGHER:
2754 case BFD_RELOC_PPC64_HIGHER_S:
2755 case BFD_RELOC_PPC64_HIGHEST:
2756 case BFD_RELOC_PPC64_HIGHEST_S:
0baf16f2 2757#endif
252b5132
RH		 2758 fixP->fx_no_overflow = 1;
2759 break;
2760 default:
2761 break;
2762 }
2763 }
2764 else
99a814a1
AM		 2765 fix_new_exp (frag_now,
2766 f - frag_now->fr_literal,
2767 4,
252b5132
RH		 2768 &fixups[i].exp,
2769 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
2770 ((bfd_reloc_code_real_type)
99a814a1 2771 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
252b5132
RH		 2772 }
2773}
2774
2775/* Handle a macro. Gather all the operands, transform them as
2776 described by the macro, and call md_assemble recursively. All the
2777 operands are separated by commas; we don't accept parentheses
2778 around operands here. */
2779
2780static void
98027b10 2781ppc_macro (char *str, const struct powerpc_macro *macro)
252b5132
RH		 2782{
2783 char *operands[10];
2784 unsigned int count;
2785 char *s;
2786 unsigned int len;
2787 const char *format;
db557034 2788 unsigned int arg;
252b5132
RH		 2789 char *send;
2790 char *complete;
2791
2792 /* Gather the users operands into the operands array. */
2793 count = 0;
2794 s = str;
2795 while (1)
2796 {
2797 if (count >= sizeof operands / sizeof operands[0])
2798 break;
2799 operands[count++] = s;
2800 s = strchr (s, ',');
2801 if (s == (char *) NULL)
2802 break;
2803 *s++ = '\0';
81d4177b 2804 }
252b5132
RH		 2805
2806 if (count != macro->operands)
2807 {
2808 as_bad (_("wrong number of operands"));
2809 return;
2810 }
2811
2812 /* Work out how large the string must be (the size is unbounded
2813 because it includes user input). */
2814 len = 0;
2815 format = macro->format;
2816 while (*format != '\0')
2817 {
2818 if (*format != '%')
2819 {
2820 ++len;
2821 ++format;
2822 }
2823 else
2824 {
2825 arg = strtol (format + 1, &send, 10);
db557034 2826 know (send != format && arg < count);
252b5132
RH		 2827 len += strlen (operands[arg]);
2828 format = send;
2829 }
2830 }
2831
2832 /* Put the string together. */
2833 complete = s = (char *) alloca (len + 1);
2834 format = macro->format;
2835 while (*format != '\0')
2836 {
2837 if (*format != '%')
2838 *s++ = *format++;
2839 else
2840 {
2841 arg = strtol (format + 1, &send, 10);
2842 strcpy (s, operands[arg]);
2843 s += strlen (s);
2844 format = send;
2845 }
2846 }
2847 *s = '\0';
2848
2849 /* Assemble the constructed instruction. */
2850 md_assemble (complete);
81d4177b 2851}
252b5132
RH		 2852\f
2853#ifdef OBJ_ELF
99a814a1 2854/* For ELF, add support for SHF_EXCLUDE and SHT_ORDERED. */
252b5132
RH		 2855
2856int
98027b10 2857ppc_section_letter (int letter, char **ptr_msg)
252b5132
RH		 2858{
2859 if (letter == 'e')
2860 return SHF_EXCLUDE;
2861
13ae64f3 2862 *ptr_msg = _("Bad .section directive: want a,e,w,x,M,S,G,T in string");
711ef82f 2863 return -1;
252b5132
RH		 2864}
2865
2866int
98027b10 2867ppc_section_word (char *str, size_t len)
252b5132 2868{
9de8d8f1
RH		 2869 if (len == 7 && strncmp (str, "exclude", 7) == 0)
2870 return SHF_EXCLUDE;
252b5132 2871
9de8d8f1 2872 return -1;
252b5132
RH		 2873}
2874
2875int
98027b10 2876ppc_section_type (char *str, size_t len)
252b5132 2877{
9de8d8f1
RH		 2878 if (len == 7 && strncmp (str, "ordered", 7) == 0)
2879 return SHT_ORDERED;
252b5132 2880
9de8d8f1 2881 return -1;
252b5132
RH		 2882}
2883
2884int
98027b10 2885ppc_section_flags (int flags, int attr, int type)
252b5132
RH		 2886{
2887 if (type == SHT_ORDERED)
2888 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
2889
2890 if (attr & SHF_EXCLUDE)
2891 flags |= SEC_EXCLUDE;
2892
2893 return flags;
2894}
2895#endif /* OBJ_ELF */
2896
2897\f
2898/* Pseudo-op handling. */
2899
2900/* The .byte pseudo-op. This is similar to the normal .byte
2901 pseudo-op, but it can also take a single ASCII string. */
2902
2903static void
98027b10 2904ppc_byte (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 2905{
2906 if (*input_line_pointer != '\"')
2907 {
2908 cons (1);
2909 return;
2910 }
2911
2912 /* Gather characters. A real double quote is doubled. Unusual
2913 characters are not permitted. */
2914 ++input_line_pointer;
2915 while (1)
2916 {
2917 char c;
2918
2919 c = *input_line_pointer++;
2920
2921 if (c == '\"')
2922 {
2923 if (*input_line_pointer != '\"')
2924 break;
2925 ++input_line_pointer;
2926 }
2927
2928 FRAG_APPEND_1_CHAR (c);
2929 }
2930
2931 demand_empty_rest_of_line ();
2932}
2933\f
2934#ifdef OBJ_XCOFF
2935
2936/* XCOFF specific pseudo-op handling. */
2937
2938/* This is set if we are creating a .stabx symbol, since we don't want
2939 to handle symbol suffixes for such symbols. */
b34976b6 2940static bfd_boolean ppc_stab_symbol;
252b5132
RH		 2941
2942/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
2943 symbols in the .bss segment as though they were local common
67c1ffbe 2944 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 2945 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 2946
2947static void
98027b10 2948ppc_comm (int lcomm)
252b5132
RH		 2949{
2950 asection *current_seg = now_seg;
2951 subsegT current_subseg = now_subseg;
2952 char *name;
2953 char endc;
2954 char *end_name;
2955 offsetT size;
2956 offsetT align;
2957 symbolS *lcomm_sym = NULL;
2958 symbolS *sym;
2959 char *pfrag;
2960
2961 name = input_line_pointer;
2962 endc = get_symbol_end ();
2963 end_name = input_line_pointer;
2964 *end_name = endc;
2965
2966 if (*input_line_pointer != ',')
2967 {
2968 as_bad (_("missing size"));
2969 ignore_rest_of_line ();
2970 return;
2971 }
2972 ++input_line_pointer;
2973
2974 size = get_absolute_expression ();
2975 if (size < 0)
2976 {
2977 as_bad (_("negative size"));
2978 ignore_rest_of_line ();
2979 return;
2980 }
2981
2982 if (! lcomm)
2983 {
2984 /* The third argument to .comm is the alignment. */
2985 if (*input_line_pointer != ',')
1ad63b2f 2986 align = 2;
252b5132
RH		 2987 else
2988 {
2989 ++input_line_pointer;
2990 align = get_absolute_expression ();
2991 if (align <= 0)
2992 {
2993 as_warn (_("ignoring bad alignment"));
1ad63b2f 2994 align = 2;
252b5132
RH		 2995 }
2996 }
2997 }
2998 else
2999 {
3000 char *lcomm_name;
3001 char lcomm_endc;
3002
1ad63b2f 3003 if (size <= 4)
252b5132
RH		 3004 align = 2;
3005 else
3006 align = 3;
3007
3008 /* The third argument to .lcomm appears to be the real local
3009 common symbol to create. References to the symbol named in
3010 the first argument are turned into references to the third
3011 argument. */
3012 if (*input_line_pointer != ',')
3013 {
3014 as_bad (_("missing real symbol name"));
3015 ignore_rest_of_line ();
3016 return;
3017 }
3018 ++input_line_pointer;
3019
3020 lcomm_name = input_line_pointer;
3021 lcomm_endc = get_symbol_end ();
81d4177b 3022
252b5132
RH		 3023 lcomm_sym = symbol_find_or_make (lcomm_name);
3024
3025 *input_line_pointer = lcomm_endc;
3026 }
3027
3028 *end_name = '\0';
3029 sym = symbol_find_or_make (name);
3030 *end_name = endc;
3031
3032 if (S_IS_DEFINED (sym)
3033 || S_GET_VALUE (sym) != 0)
3034 {
3035 as_bad (_("attempt to redefine symbol"));
3036 ignore_rest_of_line ();
3037 return;
3038 }
81d4177b 3039
252b5132 3040 record_alignment (bss_section, align);
81d4177b 3041
252b5132
RH		 3042 if (! lcomm
3043 || ! S_IS_DEFINED (lcomm_sym))
3044 {
3045 symbolS *def_sym;
3046 offsetT def_size;
3047
3048 if (! lcomm)
3049 {
3050 def_sym = sym;
3051 def_size = size;
3052 S_SET_EXTERNAL (sym);
3053 }
3054 else
3055 {
809ffe0d 3056 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 3057 def_sym = lcomm_sym;
3058 def_size = 0;
3059 }
3060
3061 subseg_set (bss_section, 1);
3062 frag_align (align, 0, 0);
81d4177b 3063
809ffe0d 3064 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3065 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3066 def_size, (char *) NULL);
3067 *pfrag = 0;
3068 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3069 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3070 }
3071 else if (lcomm)
3072 {
3073 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3074 symbol_get_frag (lcomm_sym)->fr_offset =
3075 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3076 &~ ((1 << align) - 1));
809ffe0d
ILT		 3077 if (align > symbol_get_tc (lcomm_sym)->align)
3078 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3079 }
3080
3081 if (lcomm)
3082 {
3083 /* Make sym an offset from lcomm_sym. */
3084 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3085 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3086 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3087 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3088 }
3089
3090 subseg_set (current_seg, current_subseg);
3091
3092 demand_empty_rest_of_line ();
3093}
3094
3095/* The .csect pseudo-op. This switches us into a different
3096 subsegment. The first argument is a symbol whose value is the
3097 start of the .csect. In COFF, csect symbols get special aux
3098 entries defined by the x_csect field of union internal_auxent. The
3099 optional second argument is the alignment (the default is 2). */
3100
3101static void
98027b10 3102ppc_csect (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3103{
3104 char *name;
3105 char endc;
3106 symbolS *sym;
931e13a6 3107 offsetT align;
252b5132
RH		 3108
3109 name = input_line_pointer;
3110 endc = get_symbol_end ();
81d4177b 3111
252b5132
RH		 3112 sym = symbol_find_or_make (name);
3113
3114 *input_line_pointer = endc;
3115
3116 if (S_GET_NAME (sym)[0] == '\0')
3117 {
3118 /* An unnamed csect is assumed to be [PR]. */
809ffe0d 3119 symbol_get_tc (sym)->class = XMC_PR;
252b5132
RH		 3120 }
3121
931e13a6 3122 align = 2;
252b5132
RH		 3123 if (*input_line_pointer == ',')
3124 {
3125 ++input_line_pointer;
931e13a6 3126 align = get_absolute_expression ();
252b5132
RH		 3127 }
3128
931e13a6
AM		 3129 ppc_change_csect (sym, align);
3130
252b5132
RH		 3131 demand_empty_rest_of_line ();
3132}
3133
3134/* Change to a different csect. */
3135
3136static void
98027b10 3137ppc_change_csect (symbolS *sym, offsetT align)
252b5132
RH		 3138{
3139 if (S_IS_DEFINED (sym))
809ffe0d 3140 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3141 else
3142 {
3143 symbolS **list_ptr;
3144 int after_toc;
3145 int hold_chunksize;
3146 symbolS *list;
931e13a6
AM		 3147 int is_code;
3148 segT sec;
252b5132
RH		 3149
3150 /* This is a new csect. We need to look at the symbol class to
3151 figure out whether it should go in the text section or the
3152 data section. */
3153 after_toc = 0;
931e13a6 3154 is_code = 0;
809ffe0d 3155 switch (symbol_get_tc (sym)->class)
252b5132
RH		 3156 {
3157 case XMC_PR:
3158 case XMC_RO:
3159 case XMC_DB:
3160 case XMC_GL:
3161 case XMC_XO:
3162 case XMC_SV:
3163 case XMC_TI:
3164 case XMC_TB:
3165 S_SET_SEGMENT (sym, text_section);
809ffe0d 3166 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3167 ++ppc_text_subsegment;
3168 list_ptr = &ppc_text_csects;
931e13a6 3169 is_code = 1;
252b5132
RH		 3170 break;
3171 case XMC_RW:
3172 case XMC_TC0:
3173 case XMC_TC:
3174 case XMC_DS:
3175 case XMC_UA:
3176 case XMC_BS:
3177 case XMC_UC:
3178 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3179 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3180 == ppc_data_subsegment))
252b5132
RH		 3181 after_toc = 1;
3182 S_SET_SEGMENT (sym, data_section);
809ffe0d 3183 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3184 ++ppc_data_subsegment;
3185 list_ptr = &ppc_data_csects;
3186 break;
3187 default:
3188 abort ();
3189 }
3190
3191 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3192 changing subsegments, so that we don't use a lot of memory
3193 space for what may be a small section. */
252b5132
RH		 3194 hold_chunksize = chunksize;
3195 chunksize = 64;
3196
931e13a6
AM		 3197 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3198 symbol_get_tc (sym)->subseg);
252b5132
RH		 3199
3200 chunksize = hold_chunksize;
3201
3202 if (after_toc)
3203 ppc_after_toc_frag = frag_now;
3204
931e13a6
AM		 3205 record_alignment (sec, align);
3206 if (is_code)
3207 frag_align_code (align, 0);
3208 else
3209 frag_align (align, 0, 0);
3210
809ffe0d 3211 symbol_set_frag (sym, frag_now);
252b5132
RH		 3212 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3213
931e13a6 3214 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3215 symbol_get_tc (sym)->output = 1;
3216 symbol_get_tc (sym)->within = sym;
81d4177b 3217
252b5132 3218 for (list = *list_ptr;
809ffe0d
ILT		 3219 symbol_get_tc (list)->next != (symbolS *) NULL;
3220 list = symbol_get_tc (list)->next)
252b5132 3221 ;
809ffe0d 3222 symbol_get_tc (list)->next = sym;
81d4177b 3223
252b5132 3224 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3225 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3226 &symbol_lastP);
252b5132
RH		 3227 }
3228
3229 ppc_current_csect = sym;
3230}
3231
3232/* This function handles the .text and .data pseudo-ops. These
3233 pseudo-ops aren't really used by XCOFF; we implement them for the
3234 convenience of people who aren't used to XCOFF. */
3235
3236static void
98027b10 3237ppc_section (int type)
252b5132
RH		 3238{
3239 const char *name;
3240 symbolS *sym;
3241
3242 if (type == 't')
3243 name = ".text[PR]";
3244 else if (type == 'd')
3245 name = ".data[RW]";
3246 else
3247 abort ();
3248
3249 sym = symbol_find_or_make (name);
3250
931e13a6 3251 ppc_change_csect (sym, 2);
252b5132
RH		 3252
3253 demand_empty_rest_of_line ();
3254}
3255
3256/* This function handles the .section pseudo-op. This is mostly to
3257 give an error, since XCOFF only supports .text, .data and .bss, but
3258 we do permit the user to name the text or data section. */
3259
3260static void
98027b10 3261ppc_named_section (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3262{
3263 char *user_name;
3264 const char *real_name;
3265 char c;
3266 symbolS *sym;
3267
3268 user_name = input_line_pointer;
3269 c = get_symbol_end ();
3270
3271 if (strcmp (user_name, ".text") == 0)
3272 real_name = ".text[PR]";
3273 else if (strcmp (user_name, ".data") == 0)
3274 real_name = ".data[RW]";
3275 else
3276 {
3277 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3278 *input_line_pointer = c;
3279 ignore_rest_of_line ();
3280 return;
3281 }
3282
3283 *input_line_pointer = c;
3284
3285 sym = symbol_find_or_make (real_name);
3286
931e13a6 3287 ppc_change_csect (sym, 2);
252b5132
RH		 3288
3289 demand_empty_rest_of_line ();
3290}
3291
3292/* The .extern pseudo-op. We create an undefined symbol. */
3293
3294static void
98027b10 3295ppc_extern (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3296{
3297 char *name;
3298 char endc;
3299
3300 name = input_line_pointer;
3301 endc = get_symbol_end ();
3302
3303 (void) symbol_find_or_make (name);
3304
3305 *input_line_pointer = endc;
3306
3307 demand_empty_rest_of_line ();
3308}
3309
3310/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3311
3312static void
98027b10 3313ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3314{
3315 char *name;
3316 char endc;
3317 symbolS *sym;
3318
3319 name = input_line_pointer;
3320 endc = get_symbol_end ();
3321
3322 sym = symbol_find_or_make (name);
3323
3324 *input_line_pointer = endc;
3325
809ffe0d 3326 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3327
3328 demand_empty_rest_of_line ();
3329}
3330
3331/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3332 although I don't know why it bothers. */
3333
3334static void
98027b10 3335ppc_rename (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3336{
3337 char *name;
3338 char endc;
3339 symbolS *sym;
3340 int len;
3341
3342 name = input_line_pointer;
3343 endc = get_symbol_end ();
3344
3345 sym = symbol_find_or_make (name);
3346
3347 *input_line_pointer = endc;
3348
3349 if (*input_line_pointer != ',')
3350 {
3351 as_bad (_("missing rename string"));
3352 ignore_rest_of_line ();
3353 return;
3354 }
3355 ++input_line_pointer;
3356
809ffe0d 3357 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 3358
3359 demand_empty_rest_of_line ();
3360}
3361
3362/* The .stabx pseudo-op. This is similar to a normal .stabs
3363 pseudo-op, but slightly different. A sample is
3364 .stabx "main:F-1",.main,142,0
3365 The first argument is the symbol name to create. The second is the
3366 value, and the third is the storage class. The fourth seems to be
3367 always zero, and I am assuming it is the type. */
3368
3369static void
98027b10 3370ppc_stabx (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3371{
3372 char *name;
3373 int len;
3374 symbolS *sym;
3375 expressionS exp;
3376
3377 name = demand_copy_C_string (&len);
3378
3379 if (*input_line_pointer != ',')
3380 {
3381 as_bad (_("missing value"));
3382 return;
3383 }
3384 ++input_line_pointer;
3385
b34976b6 3386 ppc_stab_symbol = TRUE;
252b5132 3387 sym = symbol_make (name);
b34976b6 3388 ppc_stab_symbol = FALSE;
252b5132 3389
809ffe0d 3390 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 3391
3392 (void) expression (&exp);
3393
3394 switch (exp.X_op)
3395 {
3396 case O_illegal:
3397 case O_absent:
3398 case O_big:
3399 as_bad (_("illegal .stabx expression; zero assumed"));
3400 exp.X_add_number = 0;
3401 /* Fall through. */
3402 case O_constant:
3403 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 3404 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 3405 break;
3406
3407 case O_symbol:
3408 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 3409 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3410 else
3411 {
3412 S_SET_VALUE (sym,
3413 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 3414 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 3415 }
3416 break;
3417
3418 default:
3419 /* The value is some complex expression. This will probably
99a814a1
AM		 3420 fail at some later point, but this is probably the right
3421 thing to do here. */
809ffe0d 3422 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3423 break;
3424 }
3425
3426 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3427 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3428
3429 if (*input_line_pointer != ',')
3430 {
3431 as_bad (_("missing class"));
3432 return;
3433 }
3434 ++input_line_pointer;
3435
3436 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3437
3438 if (*input_line_pointer != ',')
3439 {
3440 as_bad (_("missing type"));
3441 return;
3442 }
3443 ++input_line_pointer;
3444
3445 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3446
809ffe0d 3447 symbol_get_tc (sym)->output = 1;
252b5132 3448
6877bb43 3449 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
99a814a1 3450
809ffe0d 3451 symbol_get_tc (sym)->within = ppc_current_block;
252b5132 3452
41ea10b1 3453 /* In this case :
99a814a1 3454
41ea10b1
TR		 3455 .bs name
3456 .stabx "z",arrays_,133,0
3457 .es
99a814a1 3458
41ea10b1 3459 .comm arrays_,13768,3
99a814a1 3460
41ea10b1
TR		 3461 resolve_symbol_value will copy the exp's "within" into sym's when the
3462 offset is 0. Since this seems to be corner case problem,
3463 only do the correction for storage class C_STSYM. A better solution
0baf16f2 3464 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1
AM		 3465
3466 if (exp.X_op == O_symbol)
41ea10b1
TR		 3467 {
3468 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3469 }
6877bb43 3470 }
99a814a1 3471
252b5132
RH		 3472 if (exp.X_op != O_symbol
3473 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3474 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3475 ppc_frob_label (sym);
3476 else
3477 {
3478 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3479 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3480 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3481 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 3482 }
3483
3484 demand_empty_rest_of_line ();
3485}
3486
3487/* The .function pseudo-op. This takes several arguments. The first
3488 argument seems to be the external name of the symbol. The second
67c1ffbe 3489 argument seems to be the label for the start of the function. gcc
252b5132
RH		 3490 uses the same name for both. I have no idea what the third and
3491 fourth arguments are meant to be. The optional fifth argument is
3492 an expression for the size of the function. In COFF this symbol
3493 gets an aux entry like that used for a csect. */
3494
3495static void
98027b10 3496ppc_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3497{
3498 char *name;
3499 char endc;
3500 char *s;
3501 symbolS *ext_sym;
3502 symbolS *lab_sym;
3503
3504 name = input_line_pointer;
3505 endc = get_symbol_end ();
3506
3507 /* Ignore any [PR] suffix. */
3508 name = ppc_canonicalize_symbol_name (name);
3509 s = strchr (name, '[');
3510 if (s != (char *) NULL
3511 && strcmp (s + 1, "PR]") == 0)
3512 *s = '\0';
3513
3514 ext_sym = symbol_find_or_make (name);
3515
3516 *input_line_pointer = endc;
3517
3518 if (*input_line_pointer != ',')
3519 {
3520 as_bad (_("missing symbol name"));
3521 ignore_rest_of_line ();
3522 return;
3523 }
3524 ++input_line_pointer;
3525
3526 name = input_line_pointer;
3527 endc = get_symbol_end ();
3528
3529 lab_sym = symbol_find_or_make (name);
3530
3531 *input_line_pointer = endc;
3532
3533 if (ext_sym != lab_sym)
3534 {
809ffe0d
ILT		 3535 expressionS exp;
3536
3537 exp.X_op = O_symbol;
3538 exp.X_add_symbol = lab_sym;
3539 exp.X_op_symbol = NULL;
3540 exp.X_add_number = 0;
3541 exp.X_unsigned = 0;
3542 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 3543 }
3544
809ffe0d
ILT		 3545 if (symbol_get_tc (ext_sym)->class == -1)
3546 symbol_get_tc (ext_sym)->class = XMC_PR;
3547 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 3548
3549 if (*input_line_pointer == ',')
3550 {
3551 expressionS ignore;
3552
3553 /* Ignore the third argument. */
3554 ++input_line_pointer;
3555 expression (&ignore);
3556 if (*input_line_pointer == ',')
3557 {
3558 /* Ignore the fourth argument. */
3559 ++input_line_pointer;
3560 expression (&ignore);
3561 if (*input_line_pointer == ',')
3562 {
3563 /* The fifth argument is the function size. */
3564 ++input_line_pointer;
809ffe0d
ILT		 3565 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
3566 absolute_section,
3567 (valueT) 0,
3568 &zero_address_frag);
3569 pseudo_set (symbol_get_tc (ext_sym)->size);
252b5132
RH		 3570 }
3571 }
3572 }
3573
3574 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
3575 SF_SET_FUNCTION (ext_sym);
3576 SF_SET_PROCESS (ext_sym);
3577 coff_add_linesym (ext_sym);
3578
3579 demand_empty_rest_of_line ();
3580}
3581
3582/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 3583 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
3584 with the correct line number */
5d6255fe 3585
8642cce8 3586static symbolS *saved_bi_sym = 0;
252b5132
RH		 3587
3588static void
98027b10 3589ppc_bf (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3590{
3591 symbolS *sym;
3592
3593 sym = symbol_make (".bf");
3594 S_SET_SEGMENT (sym, text_section);
809ffe0d 3595 symbol_set_frag (sym, frag_now);
252b5132
RH		 3596 S_SET_VALUE (sym, frag_now_fix ());
3597 S_SET_STORAGE_CLASS (sym, C_FCN);
3598
3599 coff_line_base = get_absolute_expression ();
3600
3601 S_SET_NUMBER_AUXILIARY (sym, 1);
3602 SA_SET_SYM_LNNO (sym, coff_line_base);
3603
8642cce8 3604 /* Line number for bi. */
5d6255fe 3605 if (saved_bi_sym)
8642cce8
TR		 3606 {
3607 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
3608 saved_bi_sym = 0;
3609 }
5d6255fe 3610
8642cce8 3611
809ffe0d 3612 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3613
3614 ppc_frob_label (sym);
3615
3616 demand_empty_rest_of_line ();
3617}
3618
3619/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
3620 ".ef", except that the line number is absolute, not relative to the
3621 most recent ".bf" symbol. */
3622
3623static void
98027b10 3624ppc_ef (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3625{
3626 symbolS *sym;
3627
3628 sym = symbol_make (".ef");
3629 S_SET_SEGMENT (sym, text_section);
809ffe0d 3630 symbol_set_frag (sym, frag_now);
252b5132
RH		 3631 S_SET_VALUE (sym, frag_now_fix ());
3632 S_SET_STORAGE_CLASS (sym, C_FCN);
3633 S_SET_NUMBER_AUXILIARY (sym, 1);
3634 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3635 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3636
3637 ppc_frob_label (sym);
3638
3639 demand_empty_rest_of_line ();
3640}
3641
3642/* The .bi and .ei pseudo-ops. These take a string argument and
3643 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 3644 the symbol list. The value of .bi will be know when the next .bf
3645 is encountered. */
252b5132
RH		 3646
3647static void
98027b10 3648ppc_biei (int ei)
252b5132
RH		 3649{
3650 static symbolS *last_biei;
3651
3652 char *name;
3653 int len;
3654 symbolS *sym;
3655 symbolS *look;
3656
3657 name = demand_copy_C_string (&len);
3658
3659 /* The value of these symbols is actually file offset. Here we set
3660 the value to the index into the line number entries. In
3661 ppc_frob_symbols we set the fix_line field, which will cause BFD
3662 to do the right thing. */
3663
3664 sym = symbol_make (name);
3665 /* obj-coff.c currently only handles line numbers correctly in the
3666 .text section. */
3667 S_SET_SEGMENT (sym, text_section);
3668 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 3669 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3670
3671 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 3672 symbol_get_tc (sym)->output = 1;
81d4177b 3673
8642cce8 3674 /* Save bi. */
5d6255fe 3675 if (ei)
8642cce8
TR		 3676 saved_bi_sym = 0;
3677 else
3678 saved_bi_sym = sym;
3679
252b5132
RH		 3680 for (look = last_biei ? last_biei : symbol_rootP;
3681 (look != (symbolS *) NULL
3682 && (S_GET_STORAGE_CLASS (look) == C_FILE
3683 || S_GET_STORAGE_CLASS (look) == C_BINCL
3684 || S_GET_STORAGE_CLASS (look) == C_EINCL));
3685 look = symbol_next (look))
3686 ;
3687 if (look != (symbolS *) NULL)
3688 {
3689 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3690 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
3691 last_biei = sym;
3692 }
3693
3694 demand_empty_rest_of_line ();
3695}
3696
3697/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
3698 There is one argument, which is a csect symbol. The value of the
3699 .bs symbol is the index of this csect symbol. */
3700
3701static void
98027b10 3702ppc_bs (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3703{
3704 char *name;
3705 char endc;
3706 symbolS *csect;
3707 symbolS *sym;
3708
3709 if (ppc_current_block != NULL)
3710 as_bad (_("nested .bs blocks"));
3711
3712 name = input_line_pointer;
3713 endc = get_symbol_end ();
3714
3715 csect = symbol_find_or_make (name);
3716
3717 *input_line_pointer = endc;
3718
3719 sym = symbol_make (".bs");
3720 S_SET_SEGMENT (sym, now_seg);
3721 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 3722 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3723 symbol_get_tc (sym)->output = 1;
252b5132 3724
809ffe0d 3725 symbol_get_tc (sym)->within = csect;
252b5132
RH		 3726
3727 ppc_frob_label (sym);
3728
3729 ppc_current_block = sym;
3730
3731 demand_empty_rest_of_line ();
3732}
3733
3734/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
3735
3736static void
98027b10 3737ppc_es (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3738{
3739 symbolS *sym;
3740
3741 if (ppc_current_block == NULL)
3742 as_bad (_(".es without preceding .bs"));
3743
3744 sym = symbol_make (".es");
3745 S_SET_SEGMENT (sym, now_seg);
3746 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 3747 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3748 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3749
3750 ppc_frob_label (sym);
3751
3752 ppc_current_block = NULL;
3753
3754 demand_empty_rest_of_line ();
3755}
3756
3757/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
3758 line number. */
3759
3760static void
98027b10 3761ppc_bb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3762{
3763 symbolS *sym;
3764
3765 sym = symbol_make (".bb");
3766 S_SET_SEGMENT (sym, text_section);
809ffe0d 3767 symbol_set_frag (sym, frag_now);
252b5132
RH		 3768 S_SET_VALUE (sym, frag_now_fix ());
3769 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3770
3771 S_SET_NUMBER_AUXILIARY (sym, 1);
3772 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
3773
809ffe0d 3774 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3775
3776 SF_SET_PROCESS (sym);
3777
3778 ppc_frob_label (sym);
3779
3780 demand_empty_rest_of_line ();
3781}
3782
3783/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
3784 line number. */
3785
3786static void
98027b10 3787ppc_eb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3788{
3789 symbolS *sym;
3790
3791 sym = symbol_make (".eb");
3792 S_SET_SEGMENT (sym, text_section);
809ffe0d 3793 symbol_set_frag (sym, frag_now);
252b5132
RH		 3794 S_SET_VALUE (sym, frag_now_fix ());
3795 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3796 S_SET_NUMBER_AUXILIARY (sym, 1);
3797 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3798 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3799
3800 SF_SET_PROCESS (sym);
3801
3802 ppc_frob_label (sym);
3803
3804 demand_empty_rest_of_line ();
3805}
3806
3807/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
3808 specified name. */
3809
3810static void
98027b10 3811ppc_bc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3812{
3813 char *name;
3814 int len;
3815 symbolS *sym;
3816
3817 name = demand_copy_C_string (&len);
3818 sym = symbol_make (name);
3819 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3820 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3821 S_SET_STORAGE_CLASS (sym, C_BCOMM);
3822 S_SET_VALUE (sym, 0);
809ffe0d 3823 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3824
3825 ppc_frob_label (sym);
3826
3827 demand_empty_rest_of_line ();
3828}
3829
3830/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
3831
3832static void
98027b10 3833ppc_ec (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3834{
3835 symbolS *sym;
3836
3837 sym = symbol_make (".ec");
3838 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3839 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3840 S_SET_STORAGE_CLASS (sym, C_ECOMM);
3841 S_SET_VALUE (sym, 0);
809ffe0d 3842 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3843
3844 ppc_frob_label (sym);
3845
3846 demand_empty_rest_of_line ();
3847}
3848
3849/* The .toc pseudo-op. Switch to the .toc subsegment. */
3850
3851static void
98027b10 3852ppc_toc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3853{
3854 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 3855 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 3856 else
3857 {
3858 subsegT subseg;
3859 symbolS *sym;
3860 symbolS *list;
81d4177b 3861
252b5132
RH		 3862 subseg = ppc_data_subsegment;
3863 ++ppc_data_subsegment;
3864
3865 subseg_new (segment_name (data_section), subseg);
3866 ppc_toc_frag = frag_now;
3867
3868 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 3869 symbol_set_frag (sym, frag_now);
252b5132
RH		 3870 S_SET_SEGMENT (sym, data_section);
3871 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 3872 symbol_get_tc (sym)->subseg = subseg;
3873 symbol_get_tc (sym)->output = 1;
3874 symbol_get_tc (sym)->within = sym;
252b5132
RH		 3875
3876 ppc_toc_csect = sym;
81d4177b 3877
252b5132 3878 for (list = ppc_data_csects;
809ffe0d
ILT		 3879 symbol_get_tc (list)->next != (symbolS *) NULL;
3880 list = symbol_get_tc (list)->next)
252b5132 3881 ;
809ffe0d 3882 symbol_get_tc (list)->next = sym;
252b5132
RH		 3883
3884 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3885 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3886 &symbol_lastP);
252b5132
RH		 3887 }
3888
3889 ppc_current_csect = ppc_toc_csect;
3890
3891 demand_empty_rest_of_line ();
3892}
3893
3894/* The AIX assembler automatically aligns the operands of a .long or
3895 .short pseudo-op, and we want to be compatible. */
3896
3897static void
98027b10 3898ppc_xcoff_cons (int log_size)
252b5132
RH		 3899{
3900 frag_align (log_size, 0, 0);
3901 record_alignment (now_seg, log_size);
3902 cons (1 << log_size);
3903}
3904
3905static void
98027b10 3906ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
252b5132
RH		 3907{
3908 expressionS exp;
3909 int byte_count;
3910
3911 (void) expression (&exp);
3912
3913 if (exp.X_op != O_constant)
3914 {
3915 as_bad (_("non-constant byte count"));
3916 return;
3917 }
3918
3919 byte_count = exp.X_add_number;
3920
3921 if (*input_line_pointer != ',')
3922 {
3923 as_bad (_("missing value"));
3924 return;
3925 }
3926
3927 ++input_line_pointer;
3928 cons (byte_count);
3929}
3930
3931#endif /* OBJ_XCOFF */
0baf16f2 3932#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 3933\f
3934/* The .tc pseudo-op. This is used when generating either XCOFF or
3935 ELF. This takes two or more arguments.
3936
3937 When generating XCOFF output, the first argument is the name to
3938 give to this location in the toc; this will be a symbol with class
0baf16f2 3939 TC. The rest of the arguments are N-byte values to actually put at
252b5132 3940 this location in the TOC; often there is just one more argument, a
1049f94e 3941 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 3942 depends on target word size. A 32-bit target uses 4-byte values, a
3943 64-bit target uses 8-byte values.
252b5132
RH		 3944
3945 When not generating XCOFF output, the arguments are the same, but
3946 the first argument is simply ignored. */
3947
3948static void
98027b10 3949ppc_tc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3950{
3951#ifdef OBJ_XCOFF
3952
3953 /* Define the TOC symbol name. */
3954 {
3955 char *name;
3956 char endc;
3957 symbolS *sym;
3958
3959 if (ppc_toc_csect == (symbolS *) NULL
3960 || ppc_toc_csect != ppc_current_csect)
3961 {
3962 as_bad (_(".tc not in .toc section"));
3963 ignore_rest_of_line ();
3964 return;
3965 }
3966
3967 name = input_line_pointer;
3968 endc = get_symbol_end ();
3969
3970 sym = symbol_find_or_make (name);
3971
3972 *input_line_pointer = endc;
3973
3974 if (S_IS_DEFINED (sym))
3975 {
3976 symbolS *label;
3977
809ffe0d
ILT		 3978 label = symbol_get_tc (ppc_current_csect)->within;
3979 if (symbol_get_tc (label)->class != XMC_TC0)
252b5132
RH		 3980 {
3981 as_bad (_(".tc with no label"));
3982 ignore_rest_of_line ();
3983 return;
3984 }
3985
3986 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 3987 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 3988 S_SET_VALUE (label, S_GET_VALUE (sym));
3989
3990 while (! is_end_of_line[(unsigned char) *input_line_pointer])
3991 ++input_line_pointer;
3992
3993 return;
3994 }
3995
3996 S_SET_SEGMENT (sym, now_seg);
809ffe0d 3997 symbol_set_frag (sym, frag_now);
252b5132 3998 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 3999 symbol_get_tc (sym)->class = XMC_TC;
4000 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4001
4002 ppc_frob_label (sym);
4003 }
4004
0baf16f2
AM		 4005#endif /* OBJ_XCOFF */
4006#ifdef OBJ_ELF
9c7977b3 4007 int align;
252b5132
RH		 4008
4009 /* Skip the TOC symbol name. */
4010 while (is_part_of_name (*input_line_pointer)
4011 || *input_line_pointer == '['
4012 || *input_line_pointer == ']'
4013 || *input_line_pointer == '{'
4014 || *input_line_pointer == '}')
4015 ++input_line_pointer;
4016
0baf16f2 4017 /* Align to a four/eight byte boundary. */
2b3c4602 4018 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 4019 frag_align (align, 0, 0);
4020 record_alignment (now_seg, align);
0baf16f2 4021#endif /* OBJ_ELF */
252b5132
RH		 4022
4023 if (*input_line_pointer != ',')
4024 demand_empty_rest_of_line ();
4025 else
4026 {
4027 ++input_line_pointer;
2b3c4602 4028 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 4029 }
4030}
0baf16f2
AM		 4031
4032/* Pseudo-op .machine. */
0baf16f2
AM		 4033
4034static void
98027b10 4035ppc_machine (int ignore ATTRIBUTE_UNUSED)
0baf16f2 4036{
69c040df
AM		 4037 char *cpu_string;
4038#define MAX_HISTORY 100
4039 static unsigned long *cpu_history;
4040 static int curr_hist;
4041
4042 SKIP_WHITESPACE ();
4043
4044 if (*input_line_pointer == '"')
4045 {
4046 int len;
4047 cpu_string = demand_copy_C_string (&len);
4048 }
4049 else
4050 {
4051 char c;
4052 cpu_string = input_line_pointer;
4053 c = get_symbol_end ();
4054 cpu_string = xstrdup (cpu_string);
4055 *input_line_pointer = c;
4056 }
4057
4058 if (cpu_string != NULL)
4059 {
4060 unsigned long old_cpu = ppc_cpu;
4061 char *p;
4062
4063 for (p = cpu_string; *p != 0; p++)
4064 *p = TOLOWER (*p);
4065
4066 if (strcmp (cpu_string, "push") == 0)
4067 {
4068 if (cpu_history == NULL)
4069 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4070
4071 if (curr_hist >= MAX_HISTORY)
4072 as_bad (_(".machine stack overflow"));
4073 else
4074 cpu_history[curr_hist++] = ppc_cpu;
4075 }
4076 else if (strcmp (cpu_string, "pop") == 0)
4077 {
4078 if (curr_hist <= 0)
4079 as_bad (_(".machine stack underflow"));
4080 else
4081 ppc_cpu = cpu_history[--curr_hist];
4082 }
4083 else if (parse_cpu (cpu_string))
4084 ;
4085 else
4086 as_bad (_("invalid machine `%s'"), cpu_string);
4087
4088 if (ppc_cpu != old_cpu)
4089 ppc_setup_opcodes ();
4090 }
4091
4092 demand_empty_rest_of_line ();
0baf16f2
AM		 4093}
4094
4095/* See whether a symbol is in the TOC section. */
4096
4097static int
98027b10 4098ppc_is_toc_sym (symbolS *sym)
0baf16f2
AM		 4099{
4100#ifdef OBJ_XCOFF
4101 return symbol_get_tc (sym)->class == XMC_TC;
4102#endif
4103#ifdef OBJ_ELF
4104 const char *sname = segment_name (S_GET_SEGMENT (sym));
2b3c4602 4105 if (ppc_obj64)
0baf16f2
AM		 4106 return strcmp (sname, ".toc") == 0;
4107 else
4108 return strcmp (sname, ".got") == 0;
4109#endif
4110}
4111#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 4112\f
4113#ifdef TE_PE
4114
99a814a1 4115/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 4116
4117/* Set the current section. */
4118static void
98027b10 4119ppc_set_current_section (segT new)
252b5132
RH		 4120{
4121 ppc_previous_section = ppc_current_section;
4122 ppc_current_section = new;
4123}
4124
4125/* pseudo-op: .previous
4126 behaviour: toggles the current section with the previous section.
4127 errors: None
99a814a1
AM		 4128 warnings: "No previous section" */
4129
252b5132 4130static void
98027b10 4131ppc_previous (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4132{
4133 symbolS *tmp;
4134
81d4177b 4135 if (ppc_previous_section == NULL)
252b5132 4136 {
99a814a1 4137 as_warn (_("No previous section to return to. Directive ignored."));
252b5132
RH		 4138 return;
4139 }
4140
99a814a1 4141 subseg_set (ppc_previous_section, 0);
252b5132 4142
99a814a1 4143 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 4144}
4145
4146/* pseudo-op: .pdata
4147 behaviour: predefined read only data section
b34976b6 4148 double word aligned
252b5132
RH		 4149 errors: None
4150 warnings: None
4151 initial: .section .pdata "adr3"
b34976b6 4152 a - don't know -- maybe a misprint
252b5132
RH		 4153 d - initialized data
4154 r - readable
4155 3 - double word aligned (that would be 4 byte boundary)
4156
4157 commentary:
4158 Tag index tables (also known as the function table) for exception
99a814a1 4159 handling, debugging, etc. */
252b5132 4160
252b5132 4161static void
98027b10 4162ppc_pdata (int ignore ATTRIBUTE_UNUSED)
252b5132 4163{
81d4177b 4164 if (pdata_section == 0)
252b5132
RH		 4165 {
4166 pdata_section = subseg_new (".pdata", 0);
81d4177b 4167
252b5132
RH		 4168 bfd_set_section_flags (stdoutput, pdata_section,
4169 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4170 | SEC_READONLY | SEC_DATA ));
81d4177b 4171
252b5132
RH		 4172 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4173 }
4174 else
4175 {
99a814a1 4176 pdata_section = subseg_new (".pdata", 0);
252b5132 4177 }
99a814a1 4178 ppc_set_current_section (pdata_section);
252b5132
RH		 4179}
4180
4181/* pseudo-op: .ydata
4182 behaviour: predefined read only data section
b34976b6 4183 double word aligned
252b5132
RH		 4184 errors: None
4185 warnings: None
4186 initial: .section .ydata "drw3"
b34976b6 4187 a - don't know -- maybe a misprint
252b5132
RH		 4188 d - initialized data
4189 r - readable
4190 3 - double word aligned (that would be 4 byte boundary)
4191 commentary:
4192 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 4193 debugging, etc. */
4194
252b5132 4195static void
98027b10 4196ppc_ydata (int ignore ATTRIBUTE_UNUSED)
252b5132 4197{
81d4177b 4198 if (ydata_section == 0)
252b5132
RH		 4199 {
4200 ydata_section = subseg_new (".ydata", 0);
4201 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 4202 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4203 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 4204
4205 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4206 }
4207 else
4208 {
4209 ydata_section = subseg_new (".ydata", 0);
4210 }
99a814a1 4211 ppc_set_current_section (ydata_section);
252b5132
RH		 4212}
4213
4214/* pseudo-op: .reldata
4215 behaviour: predefined read write data section
b34976b6 4216 double word aligned (4-byte)
252b5132
RH		 4217 FIXME: relocation is applied to it
4218 FIXME: what's the difference between this and .data?
4219 errors: None
4220 warnings: None
4221 initial: .section .reldata "drw3"
4222 d - initialized data
4223 r - readable
4224 w - writeable
4225 3 - double word aligned (that would be 8 byte boundary)
4226
4227 commentary:
4228 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 4229 function descriptors, etc. */
4230
252b5132 4231static void
98027b10 4232ppc_reldata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4233{
4234 if (reldata_section == 0)
4235 {
4236 reldata_section = subseg_new (".reldata", 0);
4237
4238 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 4239 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4240 | SEC_DATA));
252b5132
RH		 4241
4242 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4243 }
4244 else
4245 {
4246 reldata_section = subseg_new (".reldata", 0);
4247 }
99a814a1 4248 ppc_set_current_section (reldata_section);
252b5132
RH		 4249}
4250
4251/* pseudo-op: .rdata
4252 behaviour: predefined read only data section
b34976b6 4253 double word aligned
252b5132
RH		 4254 errors: None
4255 warnings: None
4256 initial: .section .rdata "dr3"
4257 d - initialized data
4258 r - readable
99a814a1
AM		 4259 3 - double word aligned (that would be 4 byte boundary) */
4260
252b5132 4261static void
98027b10 4262ppc_rdata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4263{
4264 if (rdata_section == 0)
4265 {
4266 rdata_section = subseg_new (".rdata", 0);
4267 bfd_set_section_flags (stdoutput, rdata_section,
4268 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4269 | SEC_READONLY | SEC_DATA ));
4270
4271 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4272 }
4273 else
4274 {
4275 rdata_section = subseg_new (".rdata", 0);
4276 }
99a814a1 4277 ppc_set_current_section (rdata_section);
252b5132
RH		 4278}
4279
4280/* pseudo-op: .ualong
81d4177b 4281 behaviour: much like .int, with the exception that no alignment is
b34976b6 4282 performed.
252b5132
RH		 4283 FIXME: test the alignment statement
4284 errors: None
99a814a1
AM		 4285 warnings: None */
4286
252b5132 4287static void
98027b10 4288ppc_ualong (int ignore ATTRIBUTE_UNUSED)
252b5132 4289{
99a814a1
AM		 4290 /* Try for long. */
4291 cons (4);
252b5132
RH		 4292}
4293
4294/* pseudo-op: .znop <symbol name>
4295 behaviour: Issue a nop instruction
b34976b6 4296 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 4297 the supplied symbol name.
4298 errors: None
99a814a1
AM		 4299 warnings: Missing symbol name */
4300
252b5132 4301static void
98027b10 4302ppc_znop (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4303{
4304 unsigned long insn;
4305 const struct powerpc_opcode *opcode;
4306 expressionS ex;
4307 char *f;
252b5132 4308 symbolS *sym;
252b5132
RH		 4309 char *symbol_name;
4310 char c;
4311 char *name;
4312 unsigned int exp;
4313 flagword flags;
4314 asection *sec;
4315
99a814a1 4316 /* Strip out the symbol name. */
252b5132
RH		 4317 symbol_name = input_line_pointer;
4318 c = get_symbol_end ();
4319
4320 name = xmalloc (input_line_pointer - symbol_name + 1);
4321 strcpy (name, symbol_name);
4322
4323 sym = symbol_find_or_make (name);
4324
4325 *input_line_pointer = c;
4326
4327 SKIP_WHITESPACE ();
4328
4329 /* Look up the opcode in the hash table. */
4330 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4331
99a814a1 4332 /* Stick in the nop. */
252b5132
RH		 4333 insn = opcode->opcode;
4334
4335 /* Write out the instruction. */
4336 f = frag_more (4);
4337 md_number_to_chars (f, insn, 4);
4338 fix_new (frag_now,
4339 f - frag_now->fr_literal,
4340 4,
4341 sym,
4342 0,
4343 0,
4344 BFD_RELOC_16_GOT_PCREL);
4345
4346}
4347
81d4177b
KH		 4348/* pseudo-op:
4349 behaviour:
4350 errors:
99a814a1
AM		 4351 warnings: */
4352
252b5132 4353static void
98027b10 4354ppc_pe_comm (int lcomm)
252b5132 4355{
98027b10
AM		 4356 char *name;
4357 char c;
4358 char *p;
252b5132 4359 offsetT temp;
98027b10 4360 symbolS *symbolP;
252b5132
RH		 4361 offsetT align;
4362
4363 name = input_line_pointer;
4364 c = get_symbol_end ();
4365
99a814a1 4366 /* just after name is now '\0'. */
252b5132
RH		 4367 p = input_line_pointer;
4368 *p = c;
4369 SKIP_WHITESPACE ();
4370 if (*input_line_pointer != ',')
4371 {
4372 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4373 ignore_rest_of_line ();
4374 return;
4375 }
4376
4377 input_line_pointer++; /* skip ',' */
4378 if ((temp = get_absolute_expression ()) < 0)
4379 {
4380 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4381 ignore_rest_of_line ();
4382 return;
4383 }
4384
4385 if (! lcomm)
4386 {
4387 /* The third argument to .comm is the alignment. */
4388 if (*input_line_pointer != ',')
4389 align = 3;
4390 else
4391 {
4392 ++input_line_pointer;
4393 align = get_absolute_expression ();
4394 if (align <= 0)
4395 {
4396 as_warn (_("ignoring bad alignment"));
4397 align = 3;
4398 }
4399 }
4400 }
4401
4402 *p = 0;
4403 symbolP = symbol_find_or_make (name);
4404
4405 *p = c;
4406 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4407 {
4408 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4409 S_GET_NAME (symbolP));
4410 ignore_rest_of_line ();
4411 return;
4412 }
4413
4414 if (S_GET_VALUE (symbolP))
4415 {
4416 if (S_GET_VALUE (symbolP) != (valueT) temp)
4417 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4418 S_GET_NAME (symbolP),
4419 (long) S_GET_VALUE (symbolP),
4420 (long) temp);
4421 }
4422 else
4423 {
4424 S_SET_VALUE (symbolP, (valueT) temp);
4425 S_SET_EXTERNAL (symbolP);
86ebace2 4426 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
252b5132
RH		 4427 }
4428
4429 demand_empty_rest_of_line ();
4430}
4431
4432/*
4433 * implement the .section pseudo op:
4434 * .section name {, "flags"}
4435 * ^ ^
4436 * | +--- optional flags: 'b' for bss
4437 * | 'i' for info
4438 * +-- section name 'l' for lib
4439 * 'n' for noload
4440 * 'o' for over
4441 * 'w' for data
4442 * 'd' (apparently m88k for data)
4443 * 'x' for text
4444 * But if the argument is not a quoted string, treat it as a
4445 * subsegment number.
4446 *
4447 * FIXME: this is a copy of the section processing from obj-coff.c, with
4448 * additions/changes for the moto-pas assembler support. There are three
4449 * categories:
4450 *
81d4177b 4451 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 4452 * setting bits that bfd probably neither understands or uses. The
4453 * correct approach (?) will have to incorporate extra fields attached
4454 * to the section to hold the system specific stuff. (krk)
4455 *
4456 * Section Contents:
4457 * 'a' - unknown - referred to in documentation, but no definition supplied
4458 * 'c' - section has code
4459 * 'd' - section has initialized data
4460 * 'u' - section has uninitialized data
4461 * 'i' - section contains directives (info)
4462 * 'n' - section can be discarded
4463 * 'R' - remove section at link time
4464 *
4465 * Section Protection:
4466 * 'r' - section is readable
4467 * 'w' - section is writeable
4468 * 'x' - section is executable
4469 * 's' - section is sharable
4470 *
4471 * Section Alignment:
4472 * '0' - align to byte boundary
4473 * '1' - align to halfword undary
4474 * '2' - align to word boundary
4475 * '3' - align to doubleword boundary
4476 * '4' - align to quadword boundary
4477 * '5' - align to 32 byte boundary
4478 * '6' - align to 64 byte boundary
4479 *
4480 */
4481
4482void
98027b10 4483ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
252b5132 4484{
99a814a1 4485 /* Strip out the section name. */
252b5132
RH		 4486 char *section_name;
4487 char c;
4488 char *name;
4489 unsigned int exp;
4490 flagword flags;
4491 segT sec;
4492 int align;
4493
4494 section_name = input_line_pointer;
4495 c = get_symbol_end ();
4496
4497 name = xmalloc (input_line_pointer - section_name + 1);
4498 strcpy (name, section_name);
4499
4500 *input_line_pointer = c;
4501
4502 SKIP_WHITESPACE ();
4503
4504 exp = 0;
4505 flags = SEC_NO_FLAGS;
4506
4507 if (strcmp (name, ".idata$2") == 0)
4508 {
4509 align = 0;
4510 }
4511 else if (strcmp (name, ".idata$3") == 0)
4512 {
4513 align = 0;
4514 }
4515 else if (strcmp (name, ".idata$4") == 0)
4516 {
4517 align = 2;
4518 }
4519 else if (strcmp (name, ".idata$5") == 0)
4520 {
4521 align = 2;
4522 }
4523 else if (strcmp (name, ".idata$6") == 0)
4524 {
4525 align = 1;
4526 }
4527 else
99a814a1
AM		 4528 /* Default alignment to 16 byte boundary. */
4529 align = 4;
252b5132
RH		 4530
4531 if (*input_line_pointer == ',')
4532 {
4533 ++input_line_pointer;
4534 SKIP_WHITESPACE ();
4535 if (*input_line_pointer != '"')
4536 exp = get_absolute_expression ();
4537 else
4538 {
4539 ++input_line_pointer;
4540 while (*input_line_pointer != '"'
4541 && ! is_end_of_line[(unsigned char) *input_line_pointer])
4542 {
4543 switch (*input_line_pointer)
4544 {
4545 /* Section Contents */
4546 case 'a': /* unknown */
4547 as_bad (_("Unsupported section attribute -- 'a'"));
4548 break;
4549 case 'c': /* code section */
81d4177b 4550 flags |= SEC_CODE;
252b5132
RH		 4551 break;
4552 case 'd': /* section has initialized data */
4553 flags |= SEC_DATA;
4554 break;
4555 case 'u': /* section has uninitialized data */
4556 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
4557 in winnt.h */
4558 flags |= SEC_ROM;
4559 break;
4560 case 'i': /* section contains directives (info) */
4561 /* FIXME: This is IMAGE_SCN_LNK_INFO
4562 in winnt.h */
4563 flags |= SEC_HAS_CONTENTS;
4564 break;
4565 case 'n': /* section can be discarded */
81d4177b 4566 flags &=~ SEC_LOAD;
252b5132
RH		 4567 break;
4568 case 'R': /* Remove section at link time */
4569 flags |= SEC_NEVER_LOAD;
4570 break;
4571
4572 /* Section Protection */
4573 case 'r': /* section is readable */
4574 flags |= IMAGE_SCN_MEM_READ;
4575 break;
4576 case 'w': /* section is writeable */
4577 flags |= IMAGE_SCN_MEM_WRITE;
4578 break;
4579 case 'x': /* section is executable */
4580 flags |= IMAGE_SCN_MEM_EXECUTE;
4581 break;
4582 case 's': /* section is sharable */
4583 flags |= IMAGE_SCN_MEM_SHARED;
4584 break;
4585
4586 /* Section Alignment */
4587 case '0': /* align to byte boundary */
4588 flags |= IMAGE_SCN_ALIGN_1BYTES;
4589 align = 0;
4590 break;
4591 case '1': /* align to halfword boundary */
4592 flags |= IMAGE_SCN_ALIGN_2BYTES;
4593 align = 1;
4594 break;
4595 case '2': /* align to word boundary */
4596 flags |= IMAGE_SCN_ALIGN_4BYTES;
4597 align = 2;
4598 break;
4599 case '3': /* align to doubleword boundary */
4600 flags |= IMAGE_SCN_ALIGN_8BYTES;
4601 align = 3;
4602 break;
4603 case '4': /* align to quadword boundary */
4604 flags |= IMAGE_SCN_ALIGN_16BYTES;
4605 align = 4;
4606 break;
4607 case '5': /* align to 32 byte boundary */
4608 flags |= IMAGE_SCN_ALIGN_32BYTES;
4609 align = 5;
4610 break;
4611 case '6': /* align to 64 byte boundary */
4612 flags |= IMAGE_SCN_ALIGN_64BYTES;
4613 align = 6;
4614 break;
4615
4616 default:
99a814a1
AM		 4617 as_bad (_("unknown section attribute '%c'"),
4618 *input_line_pointer);
252b5132
RH		 4619 break;
4620 }
4621 ++input_line_pointer;
4622 }
4623 if (*input_line_pointer == '"')
4624 ++input_line_pointer;
4625 }
4626 }
4627
4628 sec = subseg_new (name, (subsegT) exp);
4629
99a814a1 4630 ppc_set_current_section (sec);
252b5132
RH		 4631
4632 if (flags != SEC_NO_FLAGS)
4633 {
4634 if (! bfd_set_section_flags (stdoutput, sec, flags))
4635 as_bad (_("error setting flags for \"%s\": %s"),
4636 bfd_section_name (stdoutput, sec),
4637 bfd_errmsg (bfd_get_error ()));
4638 }
4639
99a814a1 4640 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 4641
4642}
4643
4644static void
98027b10 4645ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4646{
4647 char *name;
4648 char endc;
4649 symbolS *ext_sym;
4650
4651 name = input_line_pointer;
4652 endc = get_symbol_end ();
4653
4654 ext_sym = symbol_find_or_make (name);
4655
4656 *input_line_pointer = endc;
4657
4658 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4659 SF_SET_FUNCTION (ext_sym);
4660 SF_SET_PROCESS (ext_sym);
4661 coff_add_linesym (ext_sym);
4662
4663 demand_empty_rest_of_line ();
4664}
4665
4666static void
98027b10 4667ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4668{
4669 if (tocdata_section == 0)
4670 {
4671 tocdata_section = subseg_new (".tocd", 0);
99a814a1 4672 /* FIXME: section flags won't work. */
252b5132
RH		 4673 bfd_set_section_flags (stdoutput, tocdata_section,
4674 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 4675 | SEC_READONLY | SEC_DATA));
252b5132
RH		 4676
4677 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
4678 }
4679 else
4680 {
4681 rdata_section = subseg_new (".tocd", 0);
4682 }
4683
99a814a1 4684 ppc_set_current_section (tocdata_section);
252b5132
RH		 4685
4686 demand_empty_rest_of_line ();
4687}
4688
4689/* Don't adjust TOC relocs to use the section symbol. */
4690
4691int
98027b10 4692ppc_pe_fix_adjustable (fixS *fix)
252b5132
RH		 4693{
4694 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
4695}
4696
4697#endif
4698\f
4699#ifdef OBJ_XCOFF
4700
4701/* XCOFF specific symbol and file handling. */
4702
4703/* Canonicalize the symbol name. We use the to force the suffix, if
4704 any, to use square brackets, and to be in upper case. */
4705
4706char *
98027b10 4707ppc_canonicalize_symbol_name (char *name)
252b5132
RH		 4708{
4709 char *s;
4710
4711 if (ppc_stab_symbol)
4712 return name;
4713
4714 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
4715 ;
4716 if (*s != '\0')
4717 {
4718 char brac;
4719
4720 if (*s == '[')
4721 brac = ']';
4722 else
4723 {
4724 *s = '[';
4725 brac = '}';
4726 }
4727
4728 for (s++; *s != '\0' && *s != brac; s++)
3882b010 4729 *s = TOUPPER (*s);
252b5132
RH		 4730
4731 if (*s == '\0' || s[1] != '\0')
4732 as_bad (_("bad symbol suffix"));
4733
4734 *s = ']';
4735 }
4736
4737 return name;
4738}
4739
4740/* Set the class of a symbol based on the suffix, if any. This is
4741 called whenever a new symbol is created. */
4742
4743void
98027b10 4744ppc_symbol_new_hook (symbolS *sym)
252b5132 4745{
809ffe0d 4746 struct ppc_tc_sy *tc;
252b5132
RH		 4747 const char *s;
4748
809ffe0d
ILT		 4749 tc = symbol_get_tc (sym);
4750 tc->next = NULL;
4751 tc->output = 0;
4752 tc->class = -1;
4753 tc->real_name = NULL;
4754 tc->subseg = 0;
4755 tc->align = 0;
4756 tc->size = NULL;
4757 tc->within = NULL;
252b5132
RH		 4758
4759 if (ppc_stab_symbol)
4760 return;
4761
4762 s = strchr (S_GET_NAME (sym), '[');
4763 if (s == (const char *) NULL)
4764 {
4765 /* There is no suffix. */
4766 return;
4767 }
4768
4769 ++s;
4770
4771 switch (s[0])
4772 {
4773 case 'B':
4774 if (strcmp (s, "BS]") == 0)
809ffe0d 4775 tc->class = XMC_BS;
252b5132
RH		 4776 break;
4777 case 'D':
4778 if (strcmp (s, "DB]") == 0)
809ffe0d 4779 tc->class = XMC_DB;
252b5132 4780 else if (strcmp (s, "DS]") == 0)
809ffe0d 4781 tc->class = XMC_DS;
252b5132
RH		 4782 break;
4783 case 'G':
4784 if (strcmp (s, "GL]") == 0)
809ffe0d 4785 tc->class = XMC_GL;
252b5132
RH		 4786 break;
4787 case 'P':
4788 if (strcmp (s, "PR]") == 0)
809ffe0d 4789 tc->class = XMC_PR;
252b5132
RH		 4790 break;
4791 case 'R':
4792 if (strcmp (s, "RO]") == 0)
809ffe0d 4793 tc->class = XMC_RO;
252b5132 4794 else if (strcmp (s, "RW]") == 0)
809ffe0d 4795 tc->class = XMC_RW;
252b5132
RH		 4796 break;
4797 case 'S':
4798 if (strcmp (s, "SV]") == 0)
809ffe0d 4799 tc->class = XMC_SV;
252b5132
RH		 4800 break;
4801 case 'T':
4802 if (strcmp (s, "TC]") == 0)
809ffe0d 4803 tc->class = XMC_TC;
252b5132 4804 else if (strcmp (s, "TI]") == 0)
809ffe0d 4805 tc->class = XMC_TI;
252b5132 4806 else if (strcmp (s, "TB]") == 0)
809ffe0d 4807 tc->class = XMC_TB;
252b5132 4808 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
809ffe0d 4809 tc->class = XMC_TC0;
252b5132
RH		 4810 break;
4811 case 'U':
4812 if (strcmp (s, "UA]") == 0)
809ffe0d 4813 tc->class = XMC_UA;
252b5132 4814 else if (strcmp (s, "UC]") == 0)
809ffe0d 4815 tc->class = XMC_UC;
252b5132
RH		 4816 break;
4817 case 'X':
4818 if (strcmp (s, "XO]") == 0)
809ffe0d 4819 tc->class = XMC_XO;
252b5132
RH		 4820 break;
4821 }
4822
809ffe0d 4823 if (tc->class == -1)
252b5132
RH		 4824 as_bad (_("Unrecognized symbol suffix"));
4825}
4826
4827/* Set the class of a label based on where it is defined. This
4828 handles symbols without suffixes. Also, move the symbol so that it
4829 follows the csect symbol. */
4830
4831void
98027b10 4832ppc_frob_label (symbolS *sym)
252b5132
RH		 4833{
4834 if (ppc_current_csect != (symbolS *) NULL)
4835 {
809ffe0d
ILT		 4836 if (symbol_get_tc (sym)->class == -1)
4837 symbol_get_tc (sym)->class = symbol_get_tc (ppc_current_csect)->class;
252b5132
RH		 4838
4839 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4840 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
4841 &symbol_rootP, &symbol_lastP);
4842 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132 4843 }
07a53e5c
RH		 4844
4845#ifdef OBJ_ELF
4846 dwarf2_emit_label (sym);
4847#endif
252b5132
RH		 4848}
4849
4850/* This variable is set by ppc_frob_symbol if any absolute symbols are
4851 seen. It tells ppc_adjust_symtab whether it needs to look through
4852 the symbols. */
4853
b34976b6 4854static bfd_boolean ppc_saw_abs;
252b5132
RH		 4855
4856/* Change the name of a symbol just before writing it out. Set the
4857 real name if the .rename pseudo-op was used. Otherwise, remove any
4858 class suffix. Return 1 if the symbol should not be included in the
4859 symbol table. */
4860
4861int
98027b10 4862ppc_frob_symbol (symbolS *sym)
252b5132
RH		 4863{
4864 static symbolS *ppc_last_function;
4865 static symbolS *set_end;
4866
4867 /* Discard symbols that should not be included in the output symbol
4868 table. */
809ffe0d
ILT		 4869 if (! symbol_used_in_reloc_p (sym)
4870 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 4871 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 4872 && ! symbol_get_tc (sym)->output
252b5132
RH		 4873 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
4874 return 1;
4875
a161fe53
AM		 4876 /* This one will disappear anyway. Don't make a csect sym for it. */
4877 if (sym == abs_section_sym)
4878 return 1;
4879
809ffe0d
ILT		 4880 if (symbol_get_tc (sym)->real_name != (char *) NULL)
4881 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 4882 else
4883 {
4884 const char *name;
4885 const char *s;
4886
4887 name = S_GET_NAME (sym);
4888 s = strchr (name, '[');
4889 if (s != (char *) NULL)
4890 {
4891 unsigned int len;
4892 char *snew;
4893
4894 len = s - name;
4895 snew = xmalloc (len + 1);
4896 memcpy (snew, name, len);
4897 snew[len] = '\0';
4898
4899 S_SET_NAME (sym, snew);
4900 }
4901 }
4902
4903 if (set_end != (symbolS *) NULL)
4904 {
4905 SA_SET_SYM_ENDNDX (set_end, sym);
4906 set_end = NULL;
4907 }
4908
4909 if (SF_GET_FUNCTION (sym))
4910 {
4911 if (ppc_last_function != (symbolS *) NULL)
4912 as_bad (_("two .function pseudo-ops with no intervening .ef"));
4913 ppc_last_function = sym;
809ffe0d 4914 if (symbol_get_tc (sym)->size != (symbolS *) NULL)
252b5132 4915 {
6386f3a7 4916 resolve_symbol_value (symbol_get_tc (sym)->size);
809ffe0d
ILT		 4917 SA_SET_SYM_FSIZE (sym,
4918 (long) S_GET_VALUE (symbol_get_tc (sym)->size));
252b5132
RH		 4919 }
4920 }
4921 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
4922 && strcmp (S_GET_NAME (sym), ".ef") == 0)
4923 {
4924 if (ppc_last_function == (symbolS *) NULL)
4925 as_bad (_(".ef with no preceding .function"));
4926 else
4927 {
4928 set_end = ppc_last_function;
4929 ppc_last_function = NULL;
4930
4931 /* We don't have a C_EFCN symbol, but we need to force the
4932 COFF backend to believe that it has seen one. */
4933 coff_last_function = NULL;
4934 }
4935 }
4936
670ec21d 4937 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 4938 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 4939 && S_GET_STORAGE_CLASS (sym) != C_FILE
4940 && S_GET_STORAGE_CLASS (sym) != C_FCN
4941 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
4942 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
4943 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
4944 && S_GET_STORAGE_CLASS (sym) != C_BINCL
4945 && S_GET_STORAGE_CLASS (sym) != C_EINCL
4946 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
4947 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
4948
4949 if (S_GET_STORAGE_CLASS (sym) == C_EXT
4950 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
4951 {
4952 int i;
4953 union internal_auxent *a;
4954
4955 /* Create a csect aux. */
4956 i = S_GET_NUMBER_AUXILIARY (sym);
4957 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d
ILT		 4958 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
4959 if (symbol_get_tc (sym)->class == XMC_TC0)
252b5132
RH		 4960 {
4961 /* This is the TOC table. */
4962 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
4963 a->x_csect.x_scnlen.l = 0;
4964 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
4965 }
809ffe0d 4966 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 4967 {
4968 /* This is a csect symbol. x_scnlen is the size of the
4969 csect. */
809ffe0d 4970 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 4971 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
4972 S_GET_SEGMENT (sym))
4973 - S_GET_VALUE (sym));
4974 else
4975 {
6386f3a7 4976 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 4977 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 4978 - S_GET_VALUE (sym));
4979 }
809ffe0d 4980 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 4981 }
4982 else if (S_GET_SEGMENT (sym) == bss_section)
4983 {
4984 /* This is a common symbol. */
809ffe0d
ILT		 4985 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
4986 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 4987 if (S_IS_EXTERNAL (sym))
809ffe0d 4988 symbol_get_tc (sym)->class = XMC_RW;
252b5132 4989 else
809ffe0d 4990 symbol_get_tc (sym)->class = XMC_BS;
252b5132
RH		 4991 }
4992 else if (S_GET_SEGMENT (sym) == absolute_section)
4993 {
4994 /* This is an absolute symbol. The csect will be created by
99a814a1 4995 ppc_adjust_symtab. */
b34976b6 4996 ppc_saw_abs = TRUE;
252b5132 4997 a->x_csect.x_smtyp = XTY_LD;
809ffe0d
ILT		 4998 if (symbol_get_tc (sym)->class == -1)
4999 symbol_get_tc (sym)->class = XMC_XO;
252b5132
RH		 5000 }
5001 else if (! S_IS_DEFINED (sym))
5002 {
5003 /* This is an external symbol. */
5004 a->x_csect.x_scnlen.l = 0;
5005 a->x_csect.x_smtyp = XTY_ER;
5006 }
809ffe0d 5007 else if (symbol_get_tc (sym)->class == XMC_TC)
252b5132
RH		 5008 {
5009 symbolS *next;
5010
5011 /* This is a TOC definition. x_scnlen is the size of the
5012 TOC entry. */
5013 next = symbol_next (sym);
809ffe0d 5014 while (symbol_get_tc (next)->class == XMC_TC0)
252b5132
RH		 5015 next = symbol_next (next);
5016 if (next == (symbolS *) NULL
809ffe0d 5017 || symbol_get_tc (next)->class != XMC_TC)
252b5132
RH		 5018 {
5019 if (ppc_after_toc_frag == (fragS *) NULL)
5020 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5021 data_section)
5022 - S_GET_VALUE (sym));
5023 else
5024 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5025 - S_GET_VALUE (sym));
5026 }
5027 else
5028 {
6386f3a7 5029 resolve_symbol_value (next);
252b5132
RH		 5030 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5031 - S_GET_VALUE (sym));
5032 }
5033 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5034 }
5035 else
5036 {
5037 symbolS *csect;
5038
5039 /* This is a normal symbol definition. x_scnlen is the
5040 symbol index of the containing csect. */
5041 if (S_GET_SEGMENT (sym) == text_section)
5042 csect = ppc_text_csects;
5043 else if (S_GET_SEGMENT (sym) == data_section)
5044 csect = ppc_data_csects;
5045 else
5046 abort ();
5047
5048 /* Skip the initial dummy symbol. */
809ffe0d 5049 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5050
5051 if (csect == (symbolS *) NULL)
5052 {
5053 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5054 a->x_csect.x_scnlen.l = 0;
5055 }
5056 else
5057 {
809ffe0d 5058 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5059 {
6386f3a7 5060 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5061 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5062 > S_GET_VALUE (sym))
252b5132 5063 break;
809ffe0d 5064 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5065 }
5066
809ffe0d
ILT		 5067 a->x_csect.x_scnlen.p =
5068 coffsymbol (symbol_get_bfdsym (csect))->native;
5069 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5070 1;
252b5132
RH		 5071 }
5072 a->x_csect.x_smtyp = XTY_LD;
5073 }
81d4177b 5074
252b5132
RH		 5075 a->x_csect.x_parmhash = 0;
5076 a->x_csect.x_snhash = 0;
809ffe0d 5077 if (symbol_get_tc (sym)->class == -1)
252b5132
RH		 5078 a->x_csect.x_smclas = XMC_PR;
5079 else
809ffe0d 5080 a->x_csect.x_smclas = symbol_get_tc (sym)->class;
252b5132
RH		 5081 a->x_csect.x_stab = 0;
5082 a->x_csect.x_snstab = 0;
5083
5084 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5085 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5086 }
5087 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5088 {
5089 /* We want the value to be the symbol index of the referenced
5090 csect symbol. BFD will do that for us if we set the right
5091 flags. */
b782de16
AM		 5092 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5093 combined_entry_type *c = coffsymbol (bsym)->native;
5094
5095 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5096 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5097 }
5098 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5099 {
5100 symbolS *block;
5101 symbolS *csect;
5102
5103 /* The value is the offset from the enclosing csect. */
809ffe0d
ILT		 5104 block = symbol_get_tc (sym)->within;
5105 csect = symbol_get_tc (block)->within;
6386f3a7 5106 resolve_symbol_value (csect);
252b5132
RH		 5107 S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
5108 }
5109 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5110 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5111 {
5112 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 5113 BFD will do that for us if we set the right flags. We have
5114 already set the value correctly. */
809ffe0d 5115 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 5116 }
5117
5118 return 0;
5119}
5120
5121/* Adjust the symbol table. This creates csect symbols for all
5122 absolute symbols. */
5123
5124void
98027b10 5125ppc_adjust_symtab (void)
252b5132
RH		 5126{
5127 symbolS *sym;
5128
5129 if (! ppc_saw_abs)
5130 return;
5131
5132 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5133 {
5134 symbolS *csect;
5135 int i;
5136 union internal_auxent *a;
5137
5138 if (S_GET_SEGMENT (sym) != absolute_section)
5139 continue;
5140
5141 csect = symbol_create (".abs[XO]", absolute_section,
5142 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5143 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 5144 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5145 i = S_GET_NUMBER_AUXILIARY (csect);
5146 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5147 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 5148 a->x_csect.x_scnlen.l = 0;
5149 a->x_csect.x_smtyp = XTY_SD;
5150 a->x_csect.x_parmhash = 0;
5151 a->x_csect.x_snhash = 0;
5152 a->x_csect.x_smclas = XMC_XO;
5153 a->x_csect.x_stab = 0;
5154 a->x_csect.x_snstab = 0;
5155
5156 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5157
5158 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 5159 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5160 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5161 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 5162 }
5163
b34976b6 5164 ppc_saw_abs = FALSE;
252b5132
RH		 5165}
5166
5167/* Set the VMA for a section. This is called on all the sections in
5168 turn. */
5169
5170void
98027b10 5171ppc_frob_section (asection *sec)
252b5132 5172{
931e13a6 5173 static bfd_vma vma = 0;
252b5132 5174
931e13a6 5175 vma = md_section_align (sec, vma);
252b5132
RH		 5176 bfd_set_section_vma (stdoutput, sec, vma);
5177 vma += bfd_section_size (stdoutput, sec);
5178}
5179
5180#endif /* OBJ_XCOFF */
5181\f
5182/* Turn a string in input_line_pointer into a floating point constant
bc0d738a
NC		 5183 of type TYPE, and store the appropriate bytes in *LITP. The number
5184 of LITTLENUMS emitted is stored in *SIZEP. An error message is
252b5132
RH		 5185 returned, or NULL on OK. */
5186
5187char *
98027b10 5188md_atof (int type, char *litp, int *sizep)
252b5132
RH		 5189{
5190 int prec;
5191 LITTLENUM_TYPE words[4];
5192 char *t;
5193 int i;
5194
5195 switch (type)
5196 {
5197 case 'f':
5198 prec = 2;
5199 break;
5200
5201 case 'd':
5202 prec = 4;
5203 break;
5204
5205 default:
5206 *sizep = 0;
5207 return _("bad call to md_atof");
5208 }
5209
5210 t = atof_ieee (input_line_pointer, type, words);
5211 if (t)
5212 input_line_pointer = t;
5213
5214 *sizep = prec * 2;
5215
5216 if (target_big_endian)
5217 {
5218 for (i = 0; i < prec; i++)
5219 {
5220 md_number_to_chars (litp, (valueT) words[i], 2);
5221 litp += 2;
5222 }
5223 }
5224 else
5225 {
5226 for (i = prec - 1; i >= 0; i--)
5227 {
5228 md_number_to_chars (litp, (valueT) words[i], 2);
5229 litp += 2;
5230 }
5231 }
81d4177b 5232
252b5132
RH		 5233 return NULL;
5234}
5235
5236/* Write a value out to the object file, using the appropriate
5237 endianness. */
5238
5239void
98027b10 5240md_number_to_chars (char *buf, valueT val, int n)
252b5132
RH		 5241{
5242 if (target_big_endian)
5243 number_to_chars_bigendian (buf, val, n);
5244 else
5245 number_to_chars_littleendian (buf, val, n);
5246}
5247
5248/* Align a section (I don't know why this is machine dependent). */
5249
5250valueT
3aeeedbb 5251md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
252b5132 5252{
3aeeedbb
AM		 5253#ifdef OBJ_ELF
5254 return addr;
5255#else
252b5132
RH		 5256 int align = bfd_get_section_alignment (stdoutput, seg);
5257
5258 return ((addr + (1 << align) - 1) & (-1 << align));
3aeeedbb 5259#endif
252b5132
RH		 5260}
5261
5262/* We don't have any form of relaxing. */
5263
5264int
98027b10
AM		 5265md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
5266 asection *seg ATTRIBUTE_UNUSED)
252b5132
RH		 5267{
5268 abort ();
5269 return 0;
5270}
5271
5272/* Convert a machine dependent frag. We never generate these. */
5273
5274void
98027b10
AM		 5275md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
5276 asection *sec ATTRIBUTE_UNUSED,
5277 fragS *fragp ATTRIBUTE_UNUSED)
252b5132
RH		 5278{
5279 abort ();
5280}
5281
5282/* We have no need to default values of symbols. */
5283
252b5132 5284symbolS *
98027b10 5285md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
252b5132
RH		 5286{
5287 return 0;
5288}
5289\f
5290/* Functions concerning relocs. */
5291
5292/* The location from which a PC relative jump should be calculated,
5293 given a PC relative reloc. */
5294
5295long
98027b10 5296md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
252b5132
RH		 5297{
5298 return fixp->fx_frag->fr_address + fixp->fx_where;
5299}
5300
5301#ifdef OBJ_XCOFF
5302
5303/* This is called to see whether a fixup should be adjusted to use a
5304 section symbol. We take the opportunity to change a fixup against
5305 a symbol in the TOC subsegment into a reloc against the
5306 corresponding .tc symbol. */
5307
5308int
98027b10 5309ppc_fix_adjustable (fixS *fix)
252b5132 5310{
b782de16
AM		 5311 valueT val = resolve_symbol_value (fix->fx_addsy);
5312 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5313 TC_SYMFIELD_TYPE *tc;
5314
5315 if (symseg == absolute_section)
5316 return 0;
252b5132 5317
252b5132 5318 if (ppc_toc_csect != (symbolS *) NULL
252b5132 5319 && fix->fx_addsy != ppc_toc_csect
b782de16 5320 && symseg == data_section
252b5132
RH		 5321 && val >= ppc_toc_frag->fr_address
5322 && (ppc_after_toc_frag == (fragS *) NULL
5323 || val < ppc_after_toc_frag->fr_address))
5324 {
5325 symbolS *sy;
5326
5327 for (sy = symbol_next (ppc_toc_csect);
5328 sy != (symbolS *) NULL;
5329 sy = symbol_next (sy))
5330 {
b782de16
AM		 5331 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5332
5333 if (sy_tc->class == XMC_TC0)
252b5132 5334 continue;
b782de16 5335 if (sy_tc->class != XMC_TC)
252b5132 5336 break;
b782de16 5337 if (val == resolve_symbol_value (sy))
252b5132
RH		 5338 {
5339 fix->fx_addsy = sy;
5340 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5341 return 0;
5342 }
5343 }
5344
5345 as_bad_where (fix->fx_file, fix->fx_line,
5346 _("symbol in .toc does not match any .tc"));
5347 }
5348
5349 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 5350 tc = symbol_get_tc (fix->fx_addsy);
5351 if (tc->subseg == 0
5352 && tc->class != XMC_TC0
5353 && tc->class != XMC_TC
5354 && symseg != bss_section
252b5132 5355 /* Don't adjust if this is a reloc in the toc section. */
b782de16 5356 && (symseg != data_section
252b5132
RH		 5357 || ppc_toc_csect == NULL
5358 || val < ppc_toc_frag->fr_address
5359 || (ppc_after_toc_frag != NULL
5360 && val >= ppc_after_toc_frag->fr_address)))
5361 {
5362 symbolS *csect;
b782de16 5363 symbolS *next_csect;
252b5132 5364
b782de16 5365 if (symseg == text_section)
252b5132 5366 csect = ppc_text_csects;
b782de16 5367 else if (symseg == data_section)
252b5132
RH		 5368 csect = ppc_data_csects;
5369 else
5370 abort ();
5371
5372 /* Skip the initial dummy symbol. */
809ffe0d 5373 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5374
5375 if (csect != (symbolS *) NULL)
5376 {
b782de16
AM		 5377 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5378 && (symbol_get_frag (next_csect)->fr_address <= val))
252b5132
RH		 5379 {
5380 /* If the csect address equals the symbol value, then we
99a814a1
AM		 5381 have to look through the full symbol table to see
5382 whether this is the csect we want. Note that we will
5383 only get here if the csect has zero length. */
b782de16
AM		 5384 if (symbol_get_frag (csect)->fr_address == val
5385 && S_GET_VALUE (csect) == val)
252b5132
RH		 5386 {
5387 symbolS *scan;
5388
809ffe0d 5389 for (scan = symbol_next (csect);
252b5132 5390 scan != NULL;
809ffe0d 5391 scan = symbol_next (scan))
252b5132 5392 {
809ffe0d 5393 if (symbol_get_tc (scan)->subseg != 0)
252b5132
RH		 5394 break;
5395 if (scan == fix->fx_addsy)
5396 break;
5397 }
5398
5399 /* If we found the symbol before the next csect
99a814a1 5400 symbol, then this is the csect we want. */
252b5132
RH		 5401 if (scan == fix->fx_addsy)
5402 break;
5403 }
5404
b782de16 5405 csect = next_csect;
252b5132
RH		 5406 }
5407
b782de16 5408 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
252b5132
RH		 5409 fix->fx_addsy = csect;
5410 }
b782de16 5411 return 0;
252b5132
RH		 5412 }
5413
5414 /* Adjust a reloc against a .lcomm symbol to be against the base
5415 .lcomm. */
b782de16 5416 if (symseg == bss_section
252b5132
RH		 5417 && ! S_IS_EXTERNAL (fix->fx_addsy))
5418 {
b782de16
AM		 5419 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5420
5421 fix->fx_offset += val - resolve_symbol_value (sy);
5422 fix->fx_addsy = sy;
252b5132
RH		 5423 }
5424
5425 return 0;
5426}
5427
5428/* A reloc from one csect to another must be kept. The assembler
5429 will, of course, keep relocs between sections, and it will keep
5430 absolute relocs, but we need to force it to keep PC relative relocs
5431 between two csects in the same section. */
5432
5433int
98027b10 5434ppc_force_relocation (fixS *fix)
252b5132
RH		 5435{
5436 /* At this point fix->fx_addsy should already have been converted to
5437 a csect symbol. If the csect does not include the fragment, then
5438 we need to force the relocation. */
5439 if (fix->fx_pcrel
5440 && fix->fx_addsy != NULL
809ffe0d
ILT		 5441 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5442 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5443 > fix->fx_frag->fr_address)
5444 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5445 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 5446 <= fix->fx_frag->fr_address))))
5447 return 1;
5448
ae6063d4 5449 return generic_force_reloc (fix);
252b5132
RH		 5450}
5451
5452#endif /* OBJ_XCOFF */
5453
0baf16f2 5454#ifdef OBJ_ELF
a161fe53
AM		 5455/* If this function returns non-zero, it guarantees that a relocation
5456 will be emitted for a fixup. */
5457
5458int
98027b10 5459ppc_force_relocation (fixS *fix)
a161fe53
AM		 5460{
5461 /* Branch prediction relocations must force a relocation, as must
5462 the vtable description relocs. */
5463 switch (fix->fx_r_type)
5464 {
5465 case BFD_RELOC_PPC_B16_BRTAKEN:
5466 case BFD_RELOC_PPC_B16_BRNTAKEN:
5467 case BFD_RELOC_PPC_BA16_BRTAKEN:
5468 case BFD_RELOC_PPC_BA16_BRNTAKEN:
c744ecf2 5469 case BFD_RELOC_24_PLT_PCREL:
a161fe53 5470 case BFD_RELOC_PPC64_TOC:
a161fe53
AM		 5471 return 1;
5472 default:
5473 break;
5474 }
5475
cdba85ec
AM		 5476 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5477 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5478 return 1;
5479
ae6063d4 5480 return generic_force_reloc (fix);
a161fe53
AM		 5481}
5482
0baf16f2 5483int
98027b10 5484ppc_fix_adjustable (fixS *fix)
252b5132 5485{
0baf16f2
AM		 5486 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5487 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5488 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5489 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
5490 && fix->fx_r_type != BFD_RELOC_GPREL16
5491 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5492 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 5493 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 5494 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 5495}
0baf16f2 5496#endif
252b5132 5497
3aeeedbb
AM		 5498/* Implement HANDLE_ALIGN. This writes the NOP pattern into an
5499 rs_align_code frag. */
5500
5501void
5502ppc_handle_align (struct frag *fragP)
5503{
5504 valueT count = (fragP->fr_next->fr_address
5505 - (fragP->fr_address + fragP->fr_fix));
5506
5507 if (count != 0 && (count & 3) == 0)
5508 {
5509 char *dest = fragP->fr_literal + fragP->fr_fix;
5510
5511 fragP->fr_var = 4;
5512 md_number_to_chars (dest, 0x60000000, 4);
5513
5514 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0)
5515 {
5516 /* For power6, we want the last nop to be a group terminating
5517 one, "ori 1,1,0". Do this by inserting an rs_fill frag
5518 immediately after this one, with its address set to the last
5519 nop location. This will automatically reduce the number of
5520 nops in the current frag by one. */
5521 if (count > 4)
5522 {
5523 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
5524
5525 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
5526 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
5527 group_nop->fr_fix = 0;
5528 group_nop->fr_offset = 1;
5529 group_nop->fr_type = rs_fill;
5530 fragP->fr_next = group_nop;
5531 dest = group_nop->fr_literal;
5532 }
5533
5534 md_number_to_chars (dest, 0x60210000, 4);
5535 }
5536 }
5537}
5538
252b5132
RH		 5539/* Apply a fixup to the object code. This is called for all the
5540 fixups we generated by the call to fix_new_exp, above. In the call
5541 above we used a reloc code which was the largest legal reloc code
5542 plus the operand index. Here we undo that to recover the operand
5543 index. At this point all symbol values should be fully resolved,
5544 and we attempt to completely resolve the reloc. If we can not do
5545 that, we determine the correct reloc code and put it back in the
5546 fixup. */
5547
94f592af 5548void
98027b10 5549md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
252b5132 5550{
94f592af 5551 valueT value = * valP;
252b5132
RH		 5552
5553#ifdef OBJ_ELF
94f592af 5554 if (fixP->fx_addsy != NULL)
252b5132 5555 {
a161fe53 5556 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 5557 if (fixP->fx_pcrel)
5558 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 5559 }
5560 else
94f592af 5561 fixP->fx_done = 1;
252b5132 5562#else
a161fe53 5563 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7be1c489
AM		 5564 the symbol values. If we are doing this relocation the code in
5565 write.c is going to call bfd_install_relocation, which is also
5566 going to use the symbol value. That means that if the reloc is
5567 fully resolved we want to use *valP since bfd_install_relocation is
5568 not being used.
252b5132 5569 However, if the reloc is not fully resolved we do not want to use
a161fe53
AM		 5570 *valP, and must use fx_offset instead. However, if the reloc
5571 is PC relative, we do want to use *valP since it includes the
252b5132 5572 result of md_pcrel_from. This is confusing. */
94f592af
NC		 5573 if (fixP->fx_addsy == (symbolS *) NULL)
5574 fixP->fx_done = 1;
5575
5576 else if (fixP->fx_pcrel)
5577 ;
5578
252b5132 5579 else
a161fe53
AM		 5580 value = fixP->fx_offset;
5581#endif
5582
5583 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 5584 {
a161fe53
AM		 5585 /* We can't actually support subtracting a symbol. */
5586 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 5587 }
252b5132 5588
94f592af 5589 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132
RH		 5590 {
5591 int opindex;
5592 const struct powerpc_operand *operand;
5593 char *where;
5594 unsigned long insn;
5595
94f592af 5596 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
252b5132
RH		 5597
5598 operand = &powerpc_operands[opindex];
5599
5600#ifdef OBJ_XCOFF
0baf16f2
AM		 5601 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
5602 does not generate a reloc. It uses the offset of `sym' within its
5603 csect. Other usages, such as `.long sym', generate relocs. This
5604 is the documented behaviour of non-TOC symbols. */
252b5132 5605 if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5606 && (operand->bitm & 0xfff0) == 0xfff0
252b5132 5607 && operand->shift == 0
2b3c4602 5608 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 5609 && fixP->fx_addsy != NULL
5610 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
5611 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC
5612 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC0
5613 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 5614 {
94f592af
NC		 5615 value = fixP->fx_offset;
5616 fixP->fx_done = 1;
252b5132
RH		 5617 }
5618#endif
5619
5620 /* Fetch the instruction, insert the fully resolved operand
5621 value, and stuff the instruction back again. */
94f592af 5622 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH		 5623 if (target_big_endian)
5624 insn = bfd_getb32 ((unsigned char *) where);
5625 else
5626 insn = bfd_getl32 ((unsigned char *) where);
5627 insn = ppc_insert_operand (insn, operand, (offsetT) value,
94f592af 5628 fixP->fx_file, fixP->fx_line);
252b5132
RH		 5629 if (target_big_endian)
5630 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5631 else
5632 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5633
94f592af
NC		 5634 if (fixP->fx_done)
5635 /* Nothing else to do here. */
5636 return;
252b5132 5637
94f592af 5638 assert (fixP->fx_addsy != NULL);
0baf16f2 5639
252b5132
RH		 5640 /* Determine a BFD reloc value based on the operand information.
5641 We are only prepared to turn a few of the operands into
0baf16f2 5642 relocs. */
11b37b7b 5643 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5644 && operand->bitm == 0x3fffffc
11b37b7b 5645 && operand->shift == 0)
94f592af 5646 fixP->fx_r_type = BFD_RELOC_PPC_B26;
11b37b7b 5647 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5648 && operand->bitm == 0xfffc
11b37b7b 5649 && operand->shift == 0)
95210096
AM		 5650 {
5651 fixP->fx_r_type = BFD_RELOC_PPC_B16;
5652#ifdef OBJ_XCOFF
5653 fixP->fx_size = 2;
5654 if (target_big_endian)
5655 fixP->fx_where += 2;
5656#endif
5657 }
11b37b7b 5658 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5659 && operand->bitm == 0x3fffffc
11b37b7b 5660 && operand->shift == 0)
94f592af 5661 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
11b37b7b 5662 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5663 && operand->bitm == 0xfffc
11b37b7b 5664 && operand->shift == 0)
95210096
AM		 5665 {
5666 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
5667#ifdef OBJ_XCOFF
5668 fixP->fx_size = 2;
5669 if (target_big_endian)
5670 fixP->fx_where += 2;
5671#endif
5672 }
0baf16f2 5673#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
11b37b7b 5674 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5675 && (operand->bitm & 0xfff0) == 0xfff0
a7fc733f 5676 && operand->shift == 0)
11b37b7b 5677 {
a7fc733f
AM		 5678 if (ppc_is_toc_sym (fixP->fx_addsy))
5679 {
5680 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
0baf16f2 5681#ifdef OBJ_ELF
a7fc733f
AM		 5682 if (ppc_obj64
5683 && (operand->flags & PPC_OPERAND_DS) != 0)
5684 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
5685#endif
5686 }
5687 else
5688 {
5689 fixP->fx_r_type = BFD_RELOC_16;
5690#ifdef OBJ_ELF
5691 if (ppc_obj64
5692 && (operand->flags & PPC_OPERAND_DS) != 0)
5693 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
0baf16f2 5694#endif
a7fc733f 5695 }
94f592af 5696 fixP->fx_size = 2;
11b37b7b 5697 if (target_big_endian)
94f592af 5698 fixP->fx_where += 2;
11b37b7b 5699 }
0baf16f2 5700#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
11b37b7b 5701 else
252b5132
RH		 5702 {
5703 char *sfile;
5704 unsigned int sline;
5705
5706 /* Use expr_symbol_where to see if this is an expression
0baf16f2 5707 symbol. */
94f592af
NC		 5708 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
5709 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH		 5710 _("unresolved expression that must be resolved"));
5711 else
94f592af 5712 as_bad_where (fixP->fx_file, fixP->fx_line,
0baf16f2 5713 _("unsupported relocation against %s"),
94f592af
NC		 5714 S_GET_NAME (fixP->fx_addsy));
5715 fixP->fx_done = 1;
5716 return;
252b5132
RH		 5717 }
5718 }
5719 else
5720 {
5721#ifdef OBJ_ELF
94f592af 5722 ppc_elf_validate_fix (fixP, seg);
252b5132 5723#endif
94f592af 5724 switch (fixP->fx_r_type)
252b5132 5725 {
252b5132 5726 case BFD_RELOC_CTOR:
2b3c4602 5727 if (ppc_obj64)
9c7977b3
AM		 5728 goto ctor64;
5729 /* fall through */
5730
0baf16f2 5731 case BFD_RELOC_32:
94f592af
NC		 5732 if (fixP->fx_pcrel)
5733 fixP->fx_r_type = BFD_RELOC_32_PCREL;
99a814a1 5734 /* fall through */
252b5132
RH		 5735
5736 case BFD_RELOC_RVA:
5737 case BFD_RELOC_32_PCREL:
252b5132 5738 case BFD_RELOC_PPC_EMB_NADDR32:
94f592af 5739 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5740 value, 4);
5741 break;
5742
7f6d05e8 5743 case BFD_RELOC_64:
9c7977b3 5744 ctor64:
94f592af
NC		 5745 if (fixP->fx_pcrel)
5746 fixP->fx_r_type = BFD_RELOC_64_PCREL;
99a814a1 5747 /* fall through */
0baf16f2 5748
7f6d05e8 5749 case BFD_RELOC_64_PCREL:
94f592af 5750 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7f6d05e8 5751 value, 8);
81d4177b 5752 break;
0baf16f2 5753
252b5132
RH		 5754 case BFD_RELOC_GPREL16:
5755 case BFD_RELOC_16_GOT_PCREL:
5756 case BFD_RELOC_16_GOTOFF:
5757 case BFD_RELOC_LO16_GOTOFF:
5758 case BFD_RELOC_HI16_GOTOFF:
5759 case BFD_RELOC_HI16_S_GOTOFF:
1cfc59d5 5760 case BFD_RELOC_16_BASEREL:
252b5132
RH		 5761 case BFD_RELOC_LO16_BASEREL:
5762 case BFD_RELOC_HI16_BASEREL:
5763 case BFD_RELOC_HI16_S_BASEREL:
5764 case BFD_RELOC_PPC_EMB_NADDR16:
5765 case BFD_RELOC_PPC_EMB_NADDR16_LO:
5766 case BFD_RELOC_PPC_EMB_NADDR16_HI:
5767 case BFD_RELOC_PPC_EMB_NADDR16_HA:
5768 case BFD_RELOC_PPC_EMB_SDAI16:
5769 case BFD_RELOC_PPC_EMB_SDA2REL:
5770 case BFD_RELOC_PPC_EMB_SDA2I16:
5771 case BFD_RELOC_PPC_EMB_RELSEC16:
5772 case BFD_RELOC_PPC_EMB_RELST_LO:
5773 case BFD_RELOC_PPC_EMB_RELST_HI:
5774 case BFD_RELOC_PPC_EMB_RELST_HA:
5775 case BFD_RELOC_PPC_EMB_RELSDA:
5776 case BFD_RELOC_PPC_TOC16:
0baf16f2 5777#ifdef OBJ_ELF
0baf16f2
AM		 5778 case BFD_RELOC_PPC64_TOC16_LO:
5779 case BFD_RELOC_PPC64_TOC16_HI:
5780 case BFD_RELOC_PPC64_TOC16_HA:
0baf16f2 5781#endif
94f592af 5782 if (fixP->fx_pcrel)
252b5132 5783 {
94f592af
NC		 5784 if (fixP->fx_addsy != NULL)
5785 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5786 _("cannot emit PC relative %s relocation against %s"),
94f592af
NC		 5787 bfd_get_reloc_code_name (fixP->fx_r_type),
5788 S_GET_NAME (fixP->fx_addsy));
252b5132 5789 else
94f592af 5790 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5791 _("cannot emit PC relative %s relocation"),
94f592af 5792 bfd_get_reloc_code_name (fixP->fx_r_type));
252b5132
RH		 5793 }
5794
94f592af 5795 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5796 value, 2);
5797 break;
5798
3c9d25f4
AM		 5799 case BFD_RELOC_16:
5800 if (fixP->fx_pcrel)
5801 fixP->fx_r_type = BFD_RELOC_16_PCREL;
5802 /* fall through */
5803
5804 case BFD_RELOC_16_PCREL:
5805 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5806 value, 2);
5807 break;
5808
5809 case BFD_RELOC_LO16:
5810 if (fixP->fx_pcrel)
5811 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
5812 /* fall through */
5813
5814 case BFD_RELOC_LO16_PCREL:
5815 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5816 value, 2);
5817 break;
5818
252b5132
RH		 5819 /* This case happens when you write, for example,
5820 lis %r3,(L1-L2)@ha
5821 where L1 and L2 are defined later. */
5822 case BFD_RELOC_HI16:
94f592af 5823 if (fixP->fx_pcrel)
3c9d25f4
AM		 5824 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
5825 /* fall through */
5826
5827 case BFD_RELOC_HI16_PCREL:
94f592af 5828 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5829 PPC_HI (value), 2);
252b5132 5830 break;
0baf16f2 5831
252b5132 5832 case BFD_RELOC_HI16_S:
94f592af 5833 if (fixP->fx_pcrel)
3c9d25f4
AM		 5834 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
5835 /* fall through */
5836
5837 case BFD_RELOC_HI16_S_PCREL:
94f592af 5838 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5839 PPC_HA (value), 2);
5840 break;
5841
5842#ifdef OBJ_ELF
0baf16f2 5843 case BFD_RELOC_PPC64_HIGHER:
94f592af 5844 if (fixP->fx_pcrel)
0baf16f2 5845 abort ();
94f592af 5846 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5847 PPC_HIGHER (value), 2);
252b5132
RH		 5848 break;
5849
0baf16f2 5850 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 5851 if (fixP->fx_pcrel)
0baf16f2 5852 abort ();
94f592af 5853 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5854 PPC_HIGHERA (value), 2);
5855 break;
5856
5857 case BFD_RELOC_PPC64_HIGHEST:
94f592af 5858 if (fixP->fx_pcrel)
0baf16f2 5859 abort ();
94f592af 5860 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5861 PPC_HIGHEST (value), 2);
5862 break;
5863
5864 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 5865 if (fixP->fx_pcrel)
0baf16f2 5866 abort ();
94f592af 5867 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5868 PPC_HIGHESTA (value), 2);
5869 break;
5870
5871 case BFD_RELOC_PPC64_ADDR16_DS:
5872 case BFD_RELOC_PPC64_ADDR16_LO_DS:
5873 case BFD_RELOC_PPC64_GOT16_DS:
5874 case BFD_RELOC_PPC64_GOT16_LO_DS:
5875 case BFD_RELOC_PPC64_PLT16_LO_DS:
5876 case BFD_RELOC_PPC64_SECTOFF_DS:
5877 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
5878 case BFD_RELOC_PPC64_TOC16_DS:
5879 case BFD_RELOC_PPC64_TOC16_LO_DS:
5880 case BFD_RELOC_PPC64_PLTGOT16_DS:
5881 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
94f592af 5882 if (fixP->fx_pcrel)
0baf16f2
AM		 5883 abort ();
5884 {
2132e3a3 5885 char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
3d8aea2f 5886 unsigned long val, mask;
0baf16f2
AM		 5887
5888 if (target_big_endian)
adadcc0c 5889 val = bfd_getb32 (where - 2);
0baf16f2 5890 else
adadcc0c
AM		 5891 val = bfd_getl32 (where);
5892 mask = 0xfffc;
5893 /* lq insns reserve the four lsbs. */
5894 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
77a6138a 5895 && (val & (0x3f << 26)) == (56u << 26))
adadcc0c
AM		 5896 mask = 0xfff0;
5897 val |= value & mask;
0baf16f2
AM		 5898 if (target_big_endian)
5899 bfd_putb16 ((bfd_vma) val, where);
5900 else
5901 bfd_putl16 ((bfd_vma) val, where);
5902 }
5903 break;
cdba85ec 5904
ba0b2174
AM		 5905 case BFD_RELOC_PPC_B16_BRTAKEN:
5906 case BFD_RELOC_PPC_B16_BRNTAKEN:
5907 case BFD_RELOC_PPC_BA16_BRTAKEN:
5908 case BFD_RELOC_PPC_BA16_BRNTAKEN:
5909 break;
5910
cdba85ec 5911 case BFD_RELOC_PPC_TLS:
7c1d0959
L		 5912 break;
5913
cdba85ec
AM		 5914 case BFD_RELOC_PPC_DTPMOD:
5915 case BFD_RELOC_PPC_TPREL16:
5916 case BFD_RELOC_PPC_TPREL16_LO:
5917 case BFD_RELOC_PPC_TPREL16_HI:
5918 case BFD_RELOC_PPC_TPREL16_HA:
5919 case BFD_RELOC_PPC_TPREL:
5920 case BFD_RELOC_PPC_DTPREL16:
5921 case BFD_RELOC_PPC_DTPREL16_LO:
5922 case BFD_RELOC_PPC_DTPREL16_HI:
5923 case BFD_RELOC_PPC_DTPREL16_HA:
5924 case BFD_RELOC_PPC_DTPREL:
5925 case BFD_RELOC_PPC_GOT_TLSGD16:
5926 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
5927 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
5928 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
5929 case BFD_RELOC_PPC_GOT_TLSLD16:
5930 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
5931 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
5932 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
5933 case BFD_RELOC_PPC_GOT_TPREL16:
5934 case BFD_RELOC_PPC_GOT_TPREL16_LO:
5935 case BFD_RELOC_PPC_GOT_TPREL16_HI:
5936 case BFD_RELOC_PPC_GOT_TPREL16_HA:
5937 case BFD_RELOC_PPC_GOT_DTPREL16:
5938 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
5939 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
5940 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
5941 case BFD_RELOC_PPC64_TPREL16_DS:
5942 case BFD_RELOC_PPC64_TPREL16_LO_DS:
5943 case BFD_RELOC_PPC64_TPREL16_HIGHER:
5944 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
5945 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
5946 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
5947 case BFD_RELOC_PPC64_DTPREL16_DS:
5948 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
5949 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
5950 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
5951 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
5952 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
7c1d0959 5953 S_SET_THREAD_LOCAL (fixP->fx_addsy);
cdba85ec 5954 break;
0baf16f2 5955#endif
252b5132 5956 /* Because SDA21 modifies the register field, the size is set to 4
99a814a1 5957 bytes, rather than 2, so offset it here appropriately. */
252b5132 5958 case BFD_RELOC_PPC_EMB_SDA21:
94f592af 5959 if (fixP->fx_pcrel)
252b5132
RH		 5960 abort ();
5961
94f592af 5962 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
252b5132
RH		 5963 + ((target_big_endian) ? 2 : 0),
5964 value, 2);
5965 break;
5966
5967 case BFD_RELOC_8:
94f592af 5968 if (fixP->fx_pcrel)
31a91399
NC		 5969 {
5970 /* This can occur if there is a bug in the input assembler, eg:
b7d7dc63 5971 ".byte <undefined_symbol> - ." */
31a91399
NC		 5972 if (fixP->fx_addsy)
5973 as_bad (_("Unable to handle reference to symbol %s"),
5974 S_GET_NAME (fixP->fx_addsy));
5975 else
5976 as_bad (_("Unable to resolve expression"));
5977 fixP->fx_done = 1;
5978 }
5979 else
5980 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5981 value, 1);
252b5132
RH		 5982 break;
5983
5984 case BFD_RELOC_24_PLT_PCREL:
5985 case BFD_RELOC_PPC_LOCAL24PC:
94f592af 5986 if (!fixP->fx_pcrel && !fixP->fx_done)
252b5132
RH		 5987 abort ();
5988
94f592af 5989 if (fixP->fx_done)
99a814a1
AM		 5990 {
5991 char *where;
5992 unsigned long insn;
5993
5994 /* Fetch the instruction, insert the fully resolved operand
5995 value, and stuff the instruction back again. */
94f592af 5996 where = fixP->fx_frag->fr_literal + fixP->fx_where;
99a814a1
AM		 5997 if (target_big_endian)
5998 insn = bfd_getb32 ((unsigned char *) where);
5999 else
6000 insn = bfd_getl32 ((unsigned char *) where);
6001 if ((value & 3) != 0)
94f592af 6002 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6003 _("must branch to an address a multiple of 4"));
6004 if ((offsetT) value < -0x40000000
6005 || (offsetT) value >= 0x40000000)
94f592af 6006 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6007 _("@local or @plt branch destination is too far away, %ld bytes"),
6008 (long) value);
6009 insn = insn | (value & 0x03fffffc);
6010 if (target_big_endian)
6011 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6012 else
6013 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6014 }
252b5132
RH		 6015 break;
6016
6017 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 6018 fixP->fx_done = 0;
6019 if (fixP->fx_addsy
6020 && !S_IS_DEFINED (fixP->fx_addsy)
6021 && !S_IS_WEAK (fixP->fx_addsy))
6022 S_SET_WEAK (fixP->fx_addsy);
252b5132
RH		 6023 break;
6024
6025 case BFD_RELOC_VTABLE_ENTRY:
94f592af 6026 fixP->fx_done = 0;
252b5132
RH		 6027 break;
6028
0baf16f2 6029#ifdef OBJ_ELF
0baf16f2
AM		 6030 /* Generated by reference to `sym@tocbase'. The sym is
6031 ignored by the linker. */
6032 case BFD_RELOC_PPC64_TOC:
94f592af 6033 fixP->fx_done = 0;
0baf16f2 6034 break;
0baf16f2 6035#endif
252b5132 6036 default:
bc805888 6037 fprintf (stderr,
94f592af 6038 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 6039 fflush (stderr);
252b5132
RH		 6040 abort ();
6041 }
6042 }
6043
6044#ifdef OBJ_ELF
94f592af 6045 fixP->fx_addnumber = value;
4e6935a6
AM		 6046
6047 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
6048 from the section contents. If we are going to be emitting a reloc
6049 then the section contents are immaterial, so don't warn if they
6050 happen to overflow. Leave such warnings to ld. */
6051 if (!fixP->fx_done)
6052 fixP->fx_no_overflow = 1;
252b5132 6053#else
94f592af
NC		 6054 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
6055 fixP->fx_addnumber = 0;
252b5132
RH		 6056 else
6057 {
6058#ifdef TE_PE
94f592af 6059 fixP->fx_addnumber = 0;
252b5132
RH		 6060#else
6061 /* We want to use the offset within the data segment of the
6062 symbol, not the actual VMA of the symbol. */
94f592af
NC		 6063 fixP->fx_addnumber =
6064 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy));
252b5132
RH		 6065#endif
6066 }
6067#endif
252b5132
RH		 6068}
6069
6070/* Generate a reloc for a fixup. */
6071
6072arelent *
98027b10 6073tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
252b5132
RH		 6074{
6075 arelent *reloc;
6076
6077 reloc = (arelent *) xmalloc (sizeof (arelent));
6078
49309057
ILT		 6079 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6080 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 6081 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6082 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6083 if (reloc->howto == (reloc_howto_type *) NULL)
6084 {
6085 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 6086 _("reloc %d not supported by object file format"),
6087 (int) fixp->fx_r_type);
252b5132
RH		 6088 return NULL;
6089 }
6090 reloc->addend = fixp->fx_addnumber;
6091
6092 return reloc;
6093}
75e21f08
JJ		 6094
6095void
98027b10 6096ppc_cfi_frame_initial_instructions (void)
75e21f08
JJ		 6097{
6098 cfi_add_CFA_def_cfa (1, 0);
6099}
6100
6101int
1df69f4f 6102tc_ppc_regname_to_dw2regnum (char *regname)
75e21f08
JJ		 6103{
6104 unsigned int regnum = -1;
6105 unsigned int i;
6106 const char *p;
6107 char *q;
6108 static struct { char *name; int dw2regnum; } regnames[] =
6109 {
6110 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6111 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 6112 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ		 6113 { "spe_acc", 111 }, { "spefscr", 112 }
6114 };
6115
6116 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6117 if (strcmp (regnames[i].name, regname) == 0)
6118 return regnames[i].dw2regnum;
6119
6120 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6121 {
6122 p = regname + 1 + (regname[1] == '.');
6123 regnum = strtoul (p, &q, 10);
6124 if (p == q || *q || regnum >= 32)
6125 return -1;
6126 if (regname[0] == 'f')
b7d7dc63 6127 regnum += 32;
75e21f08 6128 else if (regname[0] == 'v')
b7d7dc63 6129 regnum += 77;
75e21f08
JJ		 6130 }
6131 else if (regname[0] == 'c' && regname[1] == 'r')
6132 {
6133 p = regname + 2 + (regname[2] == '.');
6134 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 6135 return -1;
75e21f08
JJ		 6136 regnum = p[0] - '0' + 68;
6137 }
6138 return regnum;
6139}
GDB Binutils - Deliverables
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