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2004-07-02 Michael Chastain <mec.gnu@mindspring.com>
[deliverable/binutils-gdb.git] / gas / config / tc-ppc.c
CommitLineData
252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b7d7dc63
AM		 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
3 2004 Free Software Foundation, Inc.
252b5132
RH		 4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
20 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
81d4177b 21 02111-1307, USA. */
252b5132
RH		 22
23#include <stdio.h>
252b5132 24#include "as.h"
3882b010 25#include "safe-ctype.h"
252b5132 26#include "subsegs.h"
75e21f08 27#include "dw2gencfi.h"
252b5132
RH		 28#include "opcode/ppc.h"
29
30#ifdef OBJ_ELF
31#include "elf/ppc.h"
5d6f4f16 32#include "dwarf2dbg.h"
252b5132
RH		 33#endif
34
35#ifdef TE_PE
36#include "coff/pe.h"
37#endif
38
39/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
40
41/* Tell the main code what the endianness is. */
42extern int target_big_endian;
43
44/* Whether or not, we've set target_big_endian. */
45static int set_target_endian = 0;
46
47/* Whether to use user friendly register names. */
48#ifndef TARGET_REG_NAMES_P
49#ifdef TE_PE
b34976b6 50#define TARGET_REG_NAMES_P TRUE
252b5132 51#else
b34976b6 52#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 53#endif
54#endif
55
0baf16f2
AM		 56/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
57 HIGHESTA. */
58
59/* #lo(value) denotes the least significant 16 bits of the indicated. */
60#define PPC_LO(v) ((v) & 0xffff)
61
62/* #hi(value) denotes bits 16 through 31 of the indicated value. */
63#define PPC_HI(v) (((v) >> 16) & 0xffff)
64
65/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
66 the indicated value, compensating for #lo() being treated as a
67 signed number. */
15c1449b 68#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 69
70/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 71#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 72
73/* #highera(value) denotes bits 32 through 47 of the indicated value,
74 compensating for #lo() being treated as a signed number. */
15c1449b 75#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 76
77/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 78#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 79
80/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 81 compensating for #lo being treated as a signed number. */
82#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM		 83
84#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
85
b34976b6 86static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 87
b34976b6 88static bfd_boolean register_name PARAMS ((expressionS *));
252b5132
RH		 89static void ppc_set_cpu PARAMS ((void));
90static unsigned long ppc_insert_operand
91 PARAMS ((unsigned long insn, const struct powerpc_operand *operand,
92 offsetT val, char *file, unsigned int line));
93static void ppc_macro PARAMS ((char *str, const struct powerpc_macro *macro));
94static void ppc_byte PARAMS ((int));
0baf16f2
AM		 95
96#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 97static int ppc_is_toc_sym PARAMS ((symbolS *sym));
98static void ppc_tc PARAMS ((int));
0baf16f2
AM		 99static void ppc_machine PARAMS ((int));
100#endif
252b5132
RH		 101
102#ifdef OBJ_XCOFF
103static void ppc_comm PARAMS ((int));
104static void ppc_bb PARAMS ((int));
105static void ppc_bc PARAMS ((int));
106static void ppc_bf PARAMS ((int));
107static void ppc_biei PARAMS ((int));
108static void ppc_bs PARAMS ((int));
109static void ppc_eb PARAMS ((int));
110static void ppc_ec PARAMS ((int));
111static void ppc_ef PARAMS ((int));
112static void ppc_es PARAMS ((int));
113static void ppc_csect PARAMS ((int));
931e13a6 114static void ppc_change_csect PARAMS ((symbolS *, offsetT));
252b5132
RH		 115static void ppc_function PARAMS ((int));
116static void ppc_extern PARAMS ((int));
117static void ppc_lglobl PARAMS ((int));
118static void ppc_section PARAMS ((int));
119static void ppc_named_section PARAMS ((int));
120static void ppc_stabx PARAMS ((int));
121static void ppc_rename PARAMS ((int));
122static void ppc_toc PARAMS ((int));
123static void ppc_xcoff_cons PARAMS ((int));
124static void ppc_vbyte PARAMS ((int));
125#endif
126
127#ifdef OBJ_ELF
128static bfd_reloc_code_real_type ppc_elf_suffix PARAMS ((char **, expressionS *));
129static void ppc_elf_cons PARAMS ((int));
130static void ppc_elf_rdata PARAMS ((int));
131static void ppc_elf_lcomm PARAMS ((int));
132static void ppc_elf_validate_fix PARAMS ((fixS *, segT));
dc1d03fc 133static void ppc_apuinfo_section_add PARAMS ((unsigned int apu, unsigned int version));
252b5132
RH		 134#endif
135
136#ifdef TE_PE
137static void ppc_set_current_section PARAMS ((segT));
138static void ppc_previous PARAMS ((int));
139static void ppc_pdata PARAMS ((int));
140static void ppc_ydata PARAMS ((int));
141static void ppc_reldata PARAMS ((int));
142static void ppc_rdata PARAMS ((int));
143static void ppc_ualong PARAMS ((int));
144static void ppc_znop PARAMS ((int));
145static void ppc_pe_comm PARAMS ((int));
146static void ppc_pe_section PARAMS ((int));
147static void ppc_pe_function PARAMS ((int));
148static void ppc_pe_tocd PARAMS ((int));
149#endif
150\f
151/* Generic assembler global variables which must be defined by all
152 targets. */
153
154#ifdef OBJ_ELF
155/* This string holds the chars that always start a comment. If the
156 pre-processor is disabled, these aren't very useful. The macro
157 tc_comment_chars points to this. We use this, rather than the
158 usual comment_chars, so that we can switch for Solaris conventions. */
159static const char ppc_solaris_comment_chars[] = "#!";
160static const char ppc_eabi_comment_chars[] = "#";
161
162#ifdef TARGET_SOLARIS_COMMENT
163const char *ppc_comment_chars = ppc_solaris_comment_chars;
164#else
165const char *ppc_comment_chars = ppc_eabi_comment_chars;
166#endif
167#else
168const char comment_chars[] = "#";
169#endif
170
171/* Characters which start a comment at the beginning of a line. */
172const char line_comment_chars[] = "#";
173
174/* Characters which may be used to separate multiple commands on a
175 single line. */
176const char line_separator_chars[] = ";";
177
178/* Characters which are used to indicate an exponent in a floating
179 point number. */
180const char EXP_CHARS[] = "eE";
181
182/* Characters which mean that a number is a floating point constant,
183 as in 0d1.0. */
184const char FLT_CHARS[] = "dD";
5ce8663f 185
b7d7dc63 186/* '+' and '-' can be used as postfix predicate predictors for conditional
5ce8663f
NC		 187 branches. So they need to be accepted as symbol characters. */
188const char ppc_symbol_chars[] = "+-";
75e21f08
JJ		 189
190/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
191int ppc_cie_data_alignment;
252b5132
RH		 192\f
193/* The target specific pseudo-ops which we support. */
194
195const pseudo_typeS md_pseudo_table[] =
196{
197 /* Pseudo-ops which must be overridden. */
198 { "byte", ppc_byte, 0 },
199
200#ifdef OBJ_XCOFF
201 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
202 legitimately belong in the obj-*.c file. However, XCOFF is based
203 on COFF, and is only implemented for the RS/6000. We just use
204 obj-coff.c, and add what we need here. */
205 { "comm", ppc_comm, 0 },
206 { "lcomm", ppc_comm, 1 },
207 { "bb", ppc_bb, 0 },
208 { "bc", ppc_bc, 0 },
209 { "bf", ppc_bf, 0 },
210 { "bi", ppc_biei, 0 },
211 { "bs", ppc_bs, 0 },
212 { "csect", ppc_csect, 0 },
213 { "data", ppc_section, 'd' },
214 { "eb", ppc_eb, 0 },
215 { "ec", ppc_ec, 0 },
216 { "ef", ppc_ef, 0 },
217 { "ei", ppc_biei, 1 },
218 { "es", ppc_es, 0 },
219 { "extern", ppc_extern, 0 },
220 { "function", ppc_function, 0 },
221 { "lglobl", ppc_lglobl, 0 },
222 { "rename", ppc_rename, 0 },
223 { "section", ppc_named_section, 0 },
224 { "stabx", ppc_stabx, 0 },
225 { "text", ppc_section, 't' },
226 { "toc", ppc_toc, 0 },
227 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 228 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 229 { "word", ppc_xcoff_cons, 1 },
230 { "short", ppc_xcoff_cons, 1 },
231 { "vbyte", ppc_vbyte, 0 },
232#endif
233
234#ifdef OBJ_ELF
0baf16f2
AM		 235 { "llong", ppc_elf_cons, 8 },
236 { "quad", ppc_elf_cons, 8 },
252b5132
RH		 237 { "long", ppc_elf_cons, 4 },
238 { "word", ppc_elf_cons, 2 },
239 { "short", ppc_elf_cons, 2 },
240 { "rdata", ppc_elf_rdata, 0 },
241 { "rodata", ppc_elf_rdata, 0 },
242 { "lcomm", ppc_elf_lcomm, 0 },
243#endif
244
245#ifdef TE_PE
99a814a1 246 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 247 { "previous", ppc_previous, 0 },
248 { "pdata", ppc_pdata, 0 },
249 { "ydata", ppc_ydata, 0 },
250 { "reldata", ppc_reldata, 0 },
251 { "rdata", ppc_rdata, 0 },
252 { "ualong", ppc_ualong, 0 },
253 { "znop", ppc_znop, 0 },
254 { "comm", ppc_pe_comm, 0 },
255 { "lcomm", ppc_pe_comm, 1 },
256 { "section", ppc_pe_section, 0 },
257 { "function", ppc_pe_function,0 },
258 { "tocd", ppc_pe_tocd, 0 },
259#endif
260
0baf16f2 261#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 262 { "tc", ppc_tc, 0 },
0baf16f2
AM		 263 { "machine", ppc_machine, 0 },
264#endif
252b5132
RH		 265
266 { NULL, NULL, 0 }
267};
268
269\f
99a814a1
AM		 270/* Predefined register names if -mregnames (or default for Windows NT).
271 In general, there are lots of them, in an attempt to be compatible
272 with a number of other Windows NT assemblers. */
252b5132
RH		 273
274/* Structure to hold information about predefined registers. */
275struct pd_reg
276 {
277 char *name;
278 int value;
279 };
280
281/* List of registers that are pre-defined:
282
283 Each general register has predefined names of the form:
284 1. r<reg_num> which has the value <reg_num>.
285 2. r.<reg_num> which has the value <reg_num>.
286
252b5132
RH		 287 Each floating point register has predefined names of the form:
288 1. f<reg_num> which has the value <reg_num>.
289 2. f.<reg_num> which has the value <reg_num>.
290
7a899fff
C		 291 Each vector unit register has predefined names of the form:
292 1. v<reg_num> which has the value <reg_num>.
293 2. v.<reg_num> which has the value <reg_num>.
294
252b5132
RH		 295 Each condition register has predefined names of the form:
296 1. cr<reg_num> which has the value <reg_num>.
297 2. cr.<reg_num> which has the value <reg_num>.
298
299 There are individual registers as well:
300 sp or r.sp has the value 1
301 rtoc or r.toc has the value 2
302 fpscr has the value 0
303 xer has the value 1
304 lr has the value 8
305 ctr has the value 9
306 pmr has the value 0
307 dar has the value 19
308 dsisr has the value 18
309 dec has the value 22
310 sdr1 has the value 25
311 srr0 has the value 26
312 srr1 has the value 27
313
81d4177b 314 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 315
316static const struct pd_reg pre_defined_registers[] =
317{
318 { "cr.0", 0 }, /* Condition Registers */
319 { "cr.1", 1 },
320 { "cr.2", 2 },
321 { "cr.3", 3 },
322 { "cr.4", 4 },
323 { "cr.5", 5 },
324 { "cr.6", 6 },
325 { "cr.7", 7 },
326
327 { "cr0", 0 },
328 { "cr1", 1 },
329 { "cr2", 2 },
330 { "cr3", 3 },
331 { "cr4", 4 },
332 { "cr5", 5 },
333 { "cr6", 6 },
334 { "cr7", 7 },
335
336 { "ctr", 9 },
337
338 { "dar", 19 }, /* Data Access Register */
339 { "dec", 22 }, /* Decrementer */
340 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
341
342 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 343 { "f.1", 1 },
344 { "f.10", 10 },
345 { "f.11", 11 },
346 { "f.12", 12 },
347 { "f.13", 13 },
348 { "f.14", 14 },
349 { "f.15", 15 },
350 { "f.16", 16 },
351 { "f.17", 17 },
352 { "f.18", 18 },
353 { "f.19", 19 },
354 { "f.2", 2 },
355 { "f.20", 20 },
356 { "f.21", 21 },
357 { "f.22", 22 },
358 { "f.23", 23 },
359 { "f.24", 24 },
360 { "f.25", 25 },
361 { "f.26", 26 },
362 { "f.27", 27 },
363 { "f.28", 28 },
364 { "f.29", 29 },
365 { "f.3", 3 },
252b5132
RH		 366 { "f.30", 30 },
367 { "f.31", 31 },
81d4177b
KH		 368 { "f.4", 4 },
369 { "f.5", 5 },
370 { "f.6", 6 },
371 { "f.7", 7 },
372 { "f.8", 8 },
373 { "f.9", 9 },
374
375 { "f0", 0 },
376 { "f1", 1 },
377 { "f10", 10 },
378 { "f11", 11 },
379 { "f12", 12 },
380 { "f13", 13 },
381 { "f14", 14 },
382 { "f15", 15 },
383 { "f16", 16 },
384 { "f17", 17 },
385 { "f18", 18 },
386 { "f19", 19 },
387 { "f2", 2 },
388 { "f20", 20 },
389 { "f21", 21 },
390 { "f22", 22 },
391 { "f23", 23 },
392 { "f24", 24 },
393 { "f25", 25 },
394 { "f26", 26 },
395 { "f27", 27 },
396 { "f28", 28 },
397 { "f29", 29 },
398 { "f3", 3 },
252b5132
RH		 399 { "f30", 30 },
400 { "f31", 31 },
81d4177b
KH		 401 { "f4", 4 },
402 { "f5", 5 },
403 { "f6", 6 },
404 { "f7", 7 },
405 { "f8", 8 },
406 { "f9", 9 },
252b5132
RH		 407
408 { "fpscr", 0 },
409
410 { "lr", 8 }, /* Link Register */
411
412 { "pmr", 0 },
413
414 { "r.0", 0 }, /* General Purpose Registers */
415 { "r.1", 1 },
416 { "r.10", 10 },
417 { "r.11", 11 },
418 { "r.12", 12 },
419 { "r.13", 13 },
420 { "r.14", 14 },
421 { "r.15", 15 },
422 { "r.16", 16 },
423 { "r.17", 17 },
424 { "r.18", 18 },
425 { "r.19", 19 },
426 { "r.2", 2 },
427 { "r.20", 20 },
428 { "r.21", 21 },
429 { "r.22", 22 },
430 { "r.23", 23 },
431 { "r.24", 24 },
432 { "r.25", 25 },
433 { "r.26", 26 },
434 { "r.27", 27 },
435 { "r.28", 28 },
436 { "r.29", 29 },
437 { "r.3", 3 },
438 { "r.30", 30 },
439 { "r.31", 31 },
440 { "r.4", 4 },
441 { "r.5", 5 },
442 { "r.6", 6 },
443 { "r.7", 7 },
444 { "r.8", 8 },
445 { "r.9", 9 },
446
447 { "r.sp", 1 }, /* Stack Pointer */
448
449 { "r.toc", 2 }, /* Pointer to the table of contents */
450
451 { "r0", 0 }, /* More general purpose registers */
452 { "r1", 1 },
453 { "r10", 10 },
454 { "r11", 11 },
455 { "r12", 12 },
456 { "r13", 13 },
457 { "r14", 14 },
458 { "r15", 15 },
459 { "r16", 16 },
460 { "r17", 17 },
461 { "r18", 18 },
462 { "r19", 19 },
463 { "r2", 2 },
464 { "r20", 20 },
465 { "r21", 21 },
466 { "r22", 22 },
467 { "r23", 23 },
468 { "r24", 24 },
469 { "r25", 25 },
470 { "r26", 26 },
471 { "r27", 27 },
472 { "r28", 28 },
473 { "r29", 29 },
474 { "r3", 3 },
475 { "r30", 30 },
476 { "r31", 31 },
477 { "r4", 4 },
478 { "r5", 5 },
479 { "r6", 6 },
480 { "r7", 7 },
481 { "r8", 8 },
482 { "r9", 9 },
483
484 { "rtoc", 2 }, /* Table of contents */
485
486 { "sdr1", 25 }, /* Storage Description Register 1 */
487
488 { "sp", 1 },
489
490 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
491 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 492
7a899fff 493 { "v.0", 0 }, /* Vector registers */
81d4177b
KH		 494 { "v.1", 1 },
495 { "v.10", 10 },
496 { "v.11", 11 },
497 { "v.12", 12 },
498 { "v.13", 13 },
499 { "v.14", 14 },
500 { "v.15", 15 },
501 { "v.16", 16 },
502 { "v.17", 17 },
503 { "v.18", 18 },
504 { "v.19", 19 },
505 { "v.2", 2 },
506 { "v.20", 20 },
507 { "v.21", 21 },
508 { "v.22", 22 },
509 { "v.23", 23 },
510 { "v.24", 24 },
511 { "v.25", 25 },
512 { "v.26", 26 },
513 { "v.27", 27 },
514 { "v.28", 28 },
515 { "v.29", 29 },
516 { "v.3", 3 },
7a899fff
C		 517 { "v.30", 30 },
518 { "v.31", 31 },
81d4177b
KH		 519 { "v.4", 4 },
520 { "v.5", 5 },
521 { "v.6", 6 },
522 { "v.7", 7 },
523 { "v.8", 8 },
524 { "v.9", 9 },
7a899fff
C		 525
526 { "v0", 0 },
81d4177b
KH		 527 { "v1", 1 },
528 { "v10", 10 },
529 { "v11", 11 },
530 { "v12", 12 },
531 { "v13", 13 },
532 { "v14", 14 },
533 { "v15", 15 },
534 { "v16", 16 },
535 { "v17", 17 },
536 { "v18", 18 },
537 { "v19", 19 },
538 { "v2", 2 },
539 { "v20", 20 },
540 { "v21", 21 },
541 { "v22", 22 },
542 { "v23", 23 },
543 { "v24", 24 },
544 { "v25", 25 },
545 { "v26", 26 },
546 { "v27", 27 },
547 { "v28", 28 },
548 { "v29", 29 },
549 { "v3", 3 },
7a899fff
C		 550 { "v30", 30 },
551 { "v31", 31 },
81d4177b
KH		 552 { "v4", 4 },
553 { "v5", 5 },
554 { "v6", 6 },
555 { "v7", 7 },
556 { "v8", 8 },
7a899fff 557 { "v9", 9 },
252b5132
RH		 558
559 { "xer", 1 },
560
561};
562
bc805888 563#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 564
565/* Given NAME, find the register number associated with that name, return
566 the integer value associated with the given name or -1 on failure. */
567
568static int reg_name_search
569 PARAMS ((const struct pd_reg *, int, const char * name));
570
571static int
572reg_name_search (regs, regcount, name)
573 const struct pd_reg *regs;
574 int regcount;
575 const char *name;
576{
577 int middle, low, high;
578 int cmp;
579
580 low = 0;
581 high = regcount - 1;
582
583 do
584 {
585 middle = (low + high) / 2;
586 cmp = strcasecmp (name, regs[middle].name);
587 if (cmp < 0)
588 high = middle - 1;
589 else if (cmp > 0)
590 low = middle + 1;
591 else
592 return regs[middle].value;
593 }
594 while (low <= high);
595
596 return -1;
597}
598
599/*
99a814a1 600 * Summary of register_name.
252b5132
RH		 601 *
602 * in: Input_line_pointer points to 1st char of operand.
603 *
604 * out: A expressionS.
605 * The operand may have been a register: in this case, X_op == O_register,
606 * X_add_number is set to the register number, and truth is returned.
607 * Input_line_pointer->(next non-blank) char after operand, or is in its
608 * original state.
609 */
610
b34976b6 611static bfd_boolean
252b5132
RH		 612register_name (expressionP)
613 expressionS *expressionP;
614{
615 int reg_number;
616 char *name;
617 char *start;
618 char c;
619
99a814a1 620 /* Find the spelling of the operand. */
252b5132 621 start = name = input_line_pointer;
3882b010 622 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 623 name = ++input_line_pointer;
624
3882b010 625 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 626 return FALSE;
252b5132
RH		 627
628 c = get_symbol_end ();
629 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
630
468cced8
AM		 631 /* Put back the delimiting char. */
632 *input_line_pointer = c;
633
99a814a1 634 /* Look to see if it's in the register table. */
81d4177b 635 if (reg_number >= 0)
252b5132
RH		 636 {
637 expressionP->X_op = O_register;
638 expressionP->X_add_number = reg_number;
81d4177b 639
99a814a1 640 /* Make the rest nice. */
252b5132
RH		 641 expressionP->X_add_symbol = NULL;
642 expressionP->X_op_symbol = NULL;
b34976b6 643 return TRUE;
252b5132 644 }
468cced8
AM		 645
646 /* Reset the line as if we had not done anything. */
647 input_line_pointer = start;
b34976b6 648 return FALSE;
252b5132
RH		 649}
650\f
651/* This function is called for each symbol seen in an expression. It
652 handles the special parsing which PowerPC assemblers are supposed
653 to use for condition codes. */
654
655/* Whether to do the special parsing. */
b34976b6 656static bfd_boolean cr_operand;
252b5132
RH		 657
658/* Names to recognize in a condition code. This table is sorted. */
659static const struct pd_reg cr_names[] =
660{
661 { "cr0", 0 },
662 { "cr1", 1 },
663 { "cr2", 2 },
664 { "cr3", 3 },
665 { "cr4", 4 },
666 { "cr5", 5 },
667 { "cr6", 6 },
668 { "cr7", 7 },
669 { "eq", 2 },
670 { "gt", 1 },
671 { "lt", 0 },
672 { "so", 3 },
673 { "un", 3 }
674};
675
676/* Parsing function. This returns non-zero if it recognized an
677 expression. */
678
679int
680ppc_parse_name (name, expr)
681 const char *name;
682 expressionS *expr;
683{
684 int val;
685
686 if (! cr_operand)
687 return 0;
688
689 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
690 name);
691 if (val < 0)
692 return 0;
693
694 expr->X_op = O_constant;
695 expr->X_add_number = val;
696
697 return 1;
698}
699\f
700/* Local variables. */
701
702/* The type of processor we are assembling for. This is one or more
703 of the PPC_OPCODE flags defined in opcode/ppc.h. */
2b3c4602 704static unsigned long ppc_cpu = 0;
252b5132 705
2b3c4602
AM		 706/* Whether to target xcoff64/elf64. */
707static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 708
252b5132
RH		 709/* Opcode hash table. */
710static struct hash_control *ppc_hash;
711
712/* Macro hash table. */
713static struct hash_control *ppc_macro_hash;
714
715#ifdef OBJ_ELF
99a814a1 716/* What type of shared library support to use. */
5d6f4f16 717static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 718
99a814a1 719/* Flags to set in the elf header. */
252b5132
RH		 720static flagword ppc_flags = 0;
721
722/* Whether this is Solaris or not. */
723#ifdef TARGET_SOLARIS_COMMENT
b34976b6 724#define SOLARIS_P TRUE
252b5132 725#else
b34976b6 726#define SOLARIS_P FALSE
252b5132
RH		 727#endif
728
b34976b6 729static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 730#endif
731
732#ifdef OBJ_XCOFF
733
734/* The RS/6000 assembler uses the .csect pseudo-op to generate code
735 using a bunch of different sections. These assembler sections,
736 however, are all encompassed within the .text or .data sections of
737 the final output file. We handle this by using different
738 subsegments within these main segments. */
739
740/* Next subsegment to allocate within the .text segment. */
741static subsegT ppc_text_subsegment = 2;
742
743/* Linked list of csects in the text section. */
744static symbolS *ppc_text_csects;
745
746/* Next subsegment to allocate within the .data segment. */
747static subsegT ppc_data_subsegment = 2;
748
749/* Linked list of csects in the data section. */
750static symbolS *ppc_data_csects;
751
752/* The current csect. */
753static symbolS *ppc_current_csect;
754
755/* The RS/6000 assembler uses a TOC which holds addresses of functions
756 and variables. Symbols are put in the TOC with the .tc pseudo-op.
757 A special relocation is used when accessing TOC entries. We handle
758 the TOC as a subsegment within the .data segment. We set it up if
759 we see a .toc pseudo-op, and save the csect symbol here. */
760static symbolS *ppc_toc_csect;
761
762/* The first frag in the TOC subsegment. */
763static fragS *ppc_toc_frag;
764
765/* The first frag in the first subsegment after the TOC in the .data
766 segment. NULL if there are no subsegments after the TOC. */
767static fragS *ppc_after_toc_frag;
768
769/* The current static block. */
770static symbolS *ppc_current_block;
771
772/* The COFF debugging section; set by md_begin. This is not the
773 .debug section, but is instead the secret BFD section which will
774 cause BFD to set the section number of a symbol to N_DEBUG. */
775static asection *ppc_coff_debug_section;
776
777#endif /* OBJ_XCOFF */
778
779#ifdef TE_PE
780
781/* Various sections that we need for PE coff support. */
782static segT ydata_section;
783static segT pdata_section;
784static segT reldata_section;
785static segT rdata_section;
786static segT tocdata_section;
787
81d4177b 788/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 789static segT ppc_previous_section;
790static segT ppc_current_section;
791
792#endif /* TE_PE */
793
794#ifdef OBJ_ELF
795symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 796#define PPC_APUINFO_ISEL 0x40
797#define PPC_APUINFO_PMR 0x41
798#define PPC_APUINFO_RFMCI 0x42
799#define PPC_APUINFO_CACHELCK 0x43
800#define PPC_APUINFO_SPE 0x100
801#define PPC_APUINFO_EFS 0x101
802#define PPC_APUINFO_BRLOCK 0x102
803
b34976b6
AM		 804/*
805 * We keep a list of APUinfo
6a0c61b7
EZ		 806 */
807unsigned long *ppc_apuinfo_list;
808unsigned int ppc_apuinfo_num;
809unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 810#endif /* OBJ_ELF */
811\f
812#ifdef OBJ_ELF
15c1449b 813const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 814#else
15c1449b 815const char *const md_shortopts = "um:";
252b5132 816#endif
15c1449b 817const struct option md_longopts[] = {
252b5132
RH		 818 {NULL, no_argument, NULL, 0}
819};
15c1449b 820const size_t md_longopts_size = sizeof (md_longopts);
252b5132 821
69c040df
AM		 822
823/* Handle -m options that set cpu type, and .machine arg. */
824
825static int
826parse_cpu (const char *arg)
827{
828 /* -mpwrx and -mpwr2 mean to assemble for the IBM POWER/2
829 (RIOS2). */
830 if (strcmp (arg, "pwrx") == 0 || strcmp (arg, "pwr2") == 0)
831 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32;
832 /* -mpwr means to assemble for the IBM POWER (RIOS1). */
833 else if (strcmp (arg, "pwr") == 0)
834 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
835 /* -m601 means to assemble for the PowerPC 601, which includes
836 instructions that are holdovers from the Power. */
837 else if (strcmp (arg, "601") == 0)
838 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
839 | PPC_OPCODE_601 | PPC_OPCODE_32);
840 /* -mppc, -mppc32, -m603, and -m604 mean to assemble for the
841 PowerPC 603/604. */
842 else if (strcmp (arg, "ppc") == 0
843 || strcmp (arg, "ppc32") == 0
844 || strcmp (arg, "603") == 0
845 || strcmp (arg, "604") == 0)
846 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
847 /* -m403 and -m405 mean to assemble for the PowerPC 403/405. */
848 else if (strcmp (arg, "403") == 0
849 || strcmp (arg, "405") == 0)
850 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
851 | PPC_OPCODE_403 | PPC_OPCODE_32);
852 else if (strcmp (arg, "440") == 0)
853 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32
854 | PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI);
855 else if (strcmp (arg, "7400") == 0
856 || strcmp (arg, "7410") == 0
857 || strcmp (arg, "7450") == 0
858 || strcmp (arg, "7455") == 0)
859 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
860 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_32);
861 else if (strcmp (arg, "altivec") == 0)
862 {
863 if (ppc_cpu == 0)
864 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ALTIVEC;
865 else
866 ppc_cpu |= PPC_OPCODE_ALTIVEC;
867 }
868 else if (strcmp (arg, "e500") == 0 || strcmp (arg, "e500x2") == 0)
869 {
870 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
871 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
872 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
873 | PPC_OPCODE_RFMCI);
874 }
875 else if (strcmp (arg, "spe") == 0)
876 {
877 if (ppc_cpu == 0)
878 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_SPE | PPC_OPCODE_EFS;
879 else
880 ppc_cpu |= PPC_OPCODE_SPE;
881 }
882 /* -mppc64 and -m620 mean to assemble for the 64-bit PowerPC
883 620. */
884 else if (strcmp (arg, "ppc64") == 0 || strcmp (arg, "620") == 0)
885 {
886 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
887 }
888 else if (strcmp (arg, "ppc64bridge") == 0)
889 {
890 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
891 | PPC_OPCODE_64_BRIDGE | PPC_OPCODE_64);
892 }
893 /* -mbooke/-mbooke32 mean enable 32-bit BookE support. */
894 else if (strcmp (arg, "booke") == 0 || strcmp (arg, "booke32") == 0)
895 {
896 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32;
897 }
898 /* -mbooke64 means enable 64-bit BookE support. */
899 else if (strcmp (arg, "booke64") == 0)
900 {
901 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE
902 | PPC_OPCODE_BOOKE64 | PPC_OPCODE_64);
903 }
904 else if (strcmp (arg, "power4") == 0)
905 {
906 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
907 | PPC_OPCODE_64 | PPC_OPCODE_POWER4);
908 }
909 /* -mcom means assemble for the common intersection between Power
910 and PowerPC. At present, we just allow the union, rather
911 than the intersection. */
912 else if (strcmp (arg, "com") == 0)
913 ppc_cpu = PPC_OPCODE_COMMON | PPC_OPCODE_32;
914 /* -many means to assemble for any architecture (PWR/PWRX/PPC). */
915 else if (strcmp (arg, "any") == 0)
916 ppc_cpu |= PPC_OPCODE_ANY;
917 else
918 return 0;
919
920 return 1;
921}
922
252b5132
RH		 923int
924md_parse_option (c, arg)
925 int c;
926 char *arg;
927{
928 switch (c)
929 {
930 case 'u':
931 /* -u means that any undefined symbols should be treated as
932 external, which is the default for gas anyhow. */
933 break;
934
935#ifdef OBJ_ELF
936 case 'l':
937 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 938 sake, recognize -be also. */
252b5132
RH		 939 if (strcmp (arg, "e") == 0)
940 {
941 target_big_endian = 0;
942 set_target_endian = 1;
943 }
944 else
945 return 0;
946
947 break;
948
949 case 'b':
950 if (strcmp (arg, "e") == 0)
951 {
952 target_big_endian = 1;
953 set_target_endian = 1;
954 }
955 else
956 return 0;
957
958 break;
959
960 case 'K':
99a814a1 961 /* Recognize -K PIC. */
252b5132
RH		 962 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
963 {
964 shlib = SHLIB_PIC;
965 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
966 }
967 else
968 return 0;
969
970 break;
971#endif
972
7f6d05e8
CP		 973 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
974 case 'a':
975 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 976 {
977#ifdef BFD64
978 ppc_obj64 = 1;
979#else
980 as_fatal (_("%s unsupported"), "-a64");
981#endif
982 }
7f6d05e8 983 else if (strcmp (arg, "32") == 0)
2b3c4602 984 ppc_obj64 = 0;
7f6d05e8
CP		 985 else
986 return 0;
987 break;
81d4177b 988
252b5132 989 case 'm':
69c040df
AM		 990 if (parse_cpu (arg))
991 ;
252b5132
RH		 992
993 else if (strcmp (arg, "regnames") == 0)
b34976b6 994 reg_names_p = TRUE;
252b5132
RH		 995
996 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 997 reg_names_p = FALSE;
252b5132
RH		 998
999#ifdef OBJ_ELF
99a814a1
AM		 1000 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1001 that require relocation. */
252b5132
RH		 1002 else if (strcmp (arg, "relocatable") == 0)
1003 {
5d6f4f16 1004 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1005 ppc_flags |= EF_PPC_RELOCATABLE;
1006 }
1007
1008 else if (strcmp (arg, "relocatable-lib") == 0)
1009 {
5d6f4f16 1010 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1011 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1012 }
1013
99a814a1 1014 /* -memb, set embedded bit. */
252b5132
RH		 1015 else if (strcmp (arg, "emb") == 0)
1016 ppc_flags |= EF_PPC_EMB;
1017
99a814a1
AM		 1018 /* -mlittle/-mbig set the endianess. */
1019 else if (strcmp (arg, "little") == 0
1020 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1021 {
1022 target_big_endian = 0;
1023 set_target_endian = 1;
1024 }
1025
1026 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1027 {
1028 target_big_endian = 1;
1029 set_target_endian = 1;
1030 }
1031
1032 else if (strcmp (arg, "solaris") == 0)
1033 {
b34976b6 1034 msolaris = TRUE;
252b5132
RH		 1035 ppc_comment_chars = ppc_solaris_comment_chars;
1036 }
1037
1038 else if (strcmp (arg, "no-solaris") == 0)
1039 {
b34976b6 1040 msolaris = FALSE;
252b5132
RH		 1041 ppc_comment_chars = ppc_eabi_comment_chars;
1042 }
1043#endif
1044 else
1045 {
1046 as_bad (_("invalid switch -m%s"), arg);
1047 return 0;
1048 }
1049 break;
1050
1051#ifdef OBJ_ELF
1052 /* -V: SVR4 argument to print version ID. */
1053 case 'V':
1054 print_version_id ();
1055 break;
1056
1057 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1058 should be emitted or not. FIXME: Not implemented. */
1059 case 'Q':
1060 break;
1061
1062 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1063 rather than .stabs.excl, which is ignored by the linker.
1064 FIXME: Not implemented. */
1065 case 's':
1066 if (arg)
1067 return 0;
1068
1069 break;
1070#endif
1071
1072 default:
1073 return 0;
1074 }
1075
1076 return 1;
1077}
1078
1079void
1080md_show_usage (stream)
1081 FILE *stream;
1082{
bc805888 1083 fprintf (stream, _("\
252b5132 1084PowerPC options:\n\
df12615d
AM		 1085-a32 generate ELF32/XCOFF32\n\
1086-a64 generate ELF64/XCOFF64\n\
252b5132 1087-u ignored\n\
23e1d84c
AM		 1088-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1089-mpwr generate code for POWER (RIOS1)\n\
1090-m601 generate code for PowerPC 601\n\
418c1742 1091-mppc, -mppc32, -m603, -m604\n\
23e1d84c 1092 generate code for PowerPC 603/604\n\
df12615d 1093-m403, -m405 generate code for PowerPC 403/405\n\
3d8aea2f 1094-m440 generate code for PowerPC 440\n\
f5c120c5 1095-m7400, -m7410, -m7450, -m7455\n\
df12615d
AM		 1096 generate code For PowerPC 7400/7410/7450/7455\n"));
1097 fprintf (stream, _("\
23e1d84c 1098-mppc64, -m620 generate code for PowerPC 620/625/630\n\
d0e9a01c 1099-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
a09cf9bd
MG		 1100-mbooke64 generate code for 64-bit PowerPC BookE\n\
1101-mbooke, mbooke32 generate code for 32-bit PowerPC BookE\n\
23e1d84c 1102-mpower4 generate code for Power4 architecture\n\
252b5132 1103-mcom generate code Power/PowerPC common instructions\n\
df12615d 1104-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1105 fprintf (stream, _("\
df12615d 1106-maltivec generate code for AltiVec\n\
6a0c61b7 1107-me500, -me500x2 generate code for Motorola e500 core complex\n\
df12615d
AM		 1108-mspe generate code for Motorola SPE instructions\n\
1109-mregnames Allow symbolic names for registers\n\
1110-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1111#ifdef OBJ_ELF
bc805888 1112 fprintf (stream, _("\
252b5132
RH		 1113-mrelocatable support for GCC's -mrelocatble option\n\
1114-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1115-memb set PPC_EMB bit in ELF flags\n\
df12615d 1116-mlittle, -mlittle-endian, -l, -le\n\
252b5132 1117 generate code for a little endian machine\n\
df12615d
AM		 1118-mbig, -mbig-endian, -b, -be\n\
1119 generate code for a big endian machine\n\
252b5132
RH		 1120-msolaris generate code for Solaris\n\
1121-mno-solaris do not generate code for Solaris\n\
1122-V print assembler version number\n\
1123-Qy, -Qn ignored\n"));
1124#endif
1125}
1126\f
1127/* Set ppc_cpu if it is not already set. */
1128
1129static void
1130ppc_set_cpu ()
1131{
1132 const char *default_os = TARGET_OS;
1133 const char *default_cpu = TARGET_CPU;
1134
3c9030c1 1135 if ((ppc_cpu & ~PPC_OPCODE_ANY) == 0)
252b5132 1136 {
2a98c3a6 1137 if (ppc_obj64)
3c9030c1 1138 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
2a98c3a6
AM		 1139 else if (strncmp (default_os, "aix", 3) == 0
1140 && default_os[3] >= '4' && default_os[3] <= '9')
3c9030c1 1141 ppc_cpu |= PPC_OPCODE_COMMON | PPC_OPCODE_32;
252b5132 1142 else if (strncmp (default_os, "aix3", 4) == 0)
3c9030c1 1143 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
252b5132 1144 else if (strcmp (default_cpu, "rs6000") == 0)
3c9030c1 1145 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
0baf16f2 1146 else if (strncmp (default_cpu, "powerpc", 7) == 0)
b34976b6
AM		 1147 {
1148 if (default_cpu[7] == '6' && default_cpu[8] == '4')
3c9030c1 1149 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
b34976b6 1150 else
3c9030c1 1151 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
b34976b6 1152 }
252b5132 1153 else
99a814a1
AM		 1154 as_fatal (_("Unknown default cpu = %s, os = %s"),
1155 default_cpu, default_os);
252b5132
RH		 1156 }
1157}
1158
1159/* Figure out the BFD architecture to use. */
1160
1161enum bfd_architecture
1162ppc_arch ()
1163{
1164 const char *default_cpu = TARGET_CPU;
1165 ppc_set_cpu ();
1166
1167 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1168 return bfd_arch_powerpc;
1169 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1170 return bfd_arch_rs6000;
1171 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1172 {
1173 if (strcmp (default_cpu, "rs6000") == 0)
1174 return bfd_arch_rs6000;
0baf16f2 1175 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1176 return bfd_arch_powerpc;
1177 }
1178
1179 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1180 return bfd_arch_unknown;
1181}
1182
7f6d05e8
CP		 1183unsigned long
1184ppc_mach ()
1185{
2a98c3a6
AM		 1186 if (ppc_obj64)
1187 return bfd_mach_ppc64;
1188 else if (ppc_arch () == bfd_arch_rs6000)
1189 return bfd_mach_rs6k;
1190 else
1191 return bfd_mach_ppc;
7f6d05e8
CP		 1192}
1193
81d4177b 1194extern char*
99a814a1 1195ppc_target_format ()
7f6d05e8
CP		 1196{
1197#ifdef OBJ_COFF
1198#ifdef TE_PE
99a814a1 1199 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1200#elif TE_POWERMAC
0baf16f2 1201 return "xcoff-powermac";
7f6d05e8 1202#else
eb1e0e80 1203# ifdef TE_AIX5
2b3c4602 1204 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1205# else
2b3c4602 1206 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1207# endif
7f6d05e8 1208#endif
7f6d05e8
CP		 1209#endif
1210#ifdef OBJ_ELF
0baf16f2 1211 return (target_big_endian
2b3c4602
AM		 1212 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1213 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
7f6d05e8
CP		 1214#endif
1215}
1216
69c040df
AM		 1217/* Insert opcodes and macros into hash tables. Called at startup and
1218 for .cpu pseudo. */
252b5132 1219
69c040df
AM		 1220static void
1221ppc_setup_opcodes (void)
252b5132
RH		 1222{
1223 register const struct powerpc_opcode *op;
1224 const struct powerpc_opcode *op_end;
1225 const struct powerpc_macro *macro;
1226 const struct powerpc_macro *macro_end;
b34976b6 1227 bfd_boolean dup_insn = FALSE;
252b5132 1228
69c040df
AM		 1229 if (ppc_hash != NULL)
1230 hash_die (ppc_hash);
1231 if (ppc_macro_hash != NULL)
1232 hash_die (ppc_macro_hash);
252b5132
RH		 1233
1234 /* Insert the opcodes into a hash table. */
1235 ppc_hash = hash_new ();
1236
1237 op_end = powerpc_opcodes + powerpc_num_opcodes;
1238 for (op = powerpc_opcodes; op < op_end; op++)
1239 {
1240 know ((op->opcode & op->mask) == op->opcode);
1241
2b3c4602 1242 if ((op->flags & ppc_cpu & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) != 0
252b5132 1243 && ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == 0
2b3c4602
AM		 1244 || ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64))
1245 == (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64)))
23e1d84c 1246 || (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0)
341026c1
NC		 1247 /* Certain instructions (eg: extsw) do not exist in the
1248 32-bit BookE instruction set, but they do exist in the
1249 64-bit BookE instruction set, and other PPC instruction
1250 sets. Check to see if the opcode has the BOOKE64 flag set.
1251 If it does make sure that the target CPU is not the BookE32. */
1252 && ((op->flags & PPC_OPCODE_BOOKE64) == 0
1253 || (ppc_cpu & PPC_OPCODE_BOOKE64) == PPC_OPCODE_BOOKE64
1254 || (ppc_cpu & PPC_OPCODE_BOOKE) == 0)
23e1d84c
AM		 1255 && ((op->flags & (PPC_OPCODE_POWER4 | PPC_OPCODE_NOPOWER4)) == 0
1256 || ((op->flags & PPC_OPCODE_POWER4)
1257 == (ppc_cpu & PPC_OPCODE_POWER4))))
252b5132
RH		 1258 {
1259 const char *retval;
1260
1261 retval = hash_insert (ppc_hash, op->name, (PTR) op);
69c040df 1262 if (retval != NULL)
252b5132 1263 {
99a814a1 1264 /* Ignore Power duplicates for -m601. */
252b5132
RH		 1265 if ((ppc_cpu & PPC_OPCODE_601) != 0
1266 && (op->flags & PPC_OPCODE_POWER) != 0)
1267 continue;
1268
99a814a1
AM		 1269 as_bad (_("Internal assembler error for instruction %s"),
1270 op->name);
b34976b6 1271 dup_insn = TRUE;
252b5132
RH		 1272 }
1273 }
1274 }
1275
3c9030c1
AM		 1276 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1277 for (op = powerpc_opcodes; op < op_end; op++)
1278 hash_insert (ppc_hash, op->name, (PTR) op);
1279
252b5132
RH		 1280 /* Insert the macros into a hash table. */
1281 ppc_macro_hash = hash_new ();
1282
1283 macro_end = powerpc_macros + powerpc_num_macros;
1284 for (macro = powerpc_macros; macro < macro_end; macro++)
1285 {
1286 if ((macro->flags & ppc_cpu) != 0)
1287 {
1288 const char *retval;
1289
1290 retval = hash_insert (ppc_macro_hash, macro->name, (PTR) macro);
1291 if (retval != (const char *) NULL)
1292 {
1293 as_bad (_("Internal assembler error for macro %s"), macro->name);
b34976b6 1294 dup_insn = TRUE;
252b5132
RH		 1295 }
1296 }
1297 }
1298
1299 if (dup_insn)
1300 abort ();
69c040df
AM		 1301}
1302
1303/* This function is called when the assembler starts up. It is called
1304 after the options have been parsed and the output file has been
1305 opened. */
1306
1307void
1308md_begin ()
1309{
1310 ppc_set_cpu ();
1311
1312 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1313
1314#ifdef OBJ_ELF
1315 /* Set the ELF flags if desired. */
1316 if (ppc_flags && !msolaris)
1317 bfd_set_private_flags (stdoutput, ppc_flags);
1318#endif
1319
1320 ppc_setup_opcodes ();
252b5132 1321
67c1ffbe 1322 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1323 by the user. */
252b5132
RH		 1324 if (!set_target_endian)
1325 {
1326 set_target_endian = 1;
1327 target_big_endian = PPC_BIG_ENDIAN;
1328 }
1329
1330#ifdef OBJ_XCOFF
1331 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1332
1333 /* Create dummy symbols to serve as initial csects. This forces the
1334 text csects to precede the data csects. These symbols will not
1335 be output. */
1336 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1337 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1338 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1339 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1340#endif
1341
1342#ifdef TE_PE
1343
1344 ppc_current_section = text_section;
81d4177b 1345 ppc_previous_section = 0;
252b5132
RH		 1346
1347#endif
1348}
1349
6a0c61b7
EZ		 1350void
1351ppc_cleanup ()
1352{
dc1d03fc 1353#ifdef OBJ_ELF
6a0c61b7
EZ		 1354 if (ppc_apuinfo_list == NULL)
1355 return;
1356
1357 /* Ok, so write the section info out. We have this layout:
1358
1359 byte data what
1360 ---- ---- ----
1361 0 8 length of "APUinfo\0"
1362 4 (n*4) number of APU's (4 bytes each)
1363 8 2 note type 2
1364 12 "APUinfo\0" name
1365 20 APU#1 first APU's info
1366 24 APU#2 second APU's info
1367 ... ...
1368 */
1369 {
1370 char *p;
1371 asection *seg = now_seg;
1372 subsegT subseg = now_subseg;
1373 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1374 unsigned int i;
6a0c61b7
EZ		 1375
1376 /* Create the .PPC.EMB.apuinfo section. */
1377 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1378 bfd_set_section_flags (stdoutput,
1379 apuinfo_secp,
e1a9cb8e 1380 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1381
1382 p = frag_more (4);
1383 md_number_to_chars (p, (valueT) 8, 4);
1384
1385 p = frag_more (4);
e98d298c 1386 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1387
1388 p = frag_more (4);
1389 md_number_to_chars (p, (valueT) 2, 4);
1390
1391 p = frag_more (8);
1392 strcpy (p, "APUinfo");
1393
1394 for (i = 0; i < ppc_apuinfo_num; i++)
1395 {
b34976b6
AM		 1396 p = frag_more (4);
1397 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1398 }
1399
1400 frag_align (2, 0, 0);
1401
1402 /* We probably can't restore the current segment, for there likely
1403 isn't one yet... */
1404 if (seg && subseg)
1405 subseg_set (seg, subseg);
1406 }
dc1d03fc 1407#endif
6a0c61b7
EZ		 1408}
1409
252b5132
RH		 1410/* Insert an operand value into an instruction. */
1411
1412static unsigned long
1413ppc_insert_operand (insn, operand, val, file, line)
1414 unsigned long insn;
1415 const struct powerpc_operand *operand;
1416 offsetT val;
1417 char *file;
1418 unsigned int line;
1419{
1420 if (operand->bits != 32)
1421 {
1422 long min, max;
1423 offsetT test;
1424
1425 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
1426 {
d0e9a01c 1427 if ((operand->flags & PPC_OPERAND_SIGNOPT) != 0)
252b5132
RH		 1428 max = (1 << operand->bits) - 1;
1429 else
1430 max = (1 << (operand->bits - 1)) - 1;
1431 min = - (1 << (operand->bits - 1));
1432
2b3c4602 1433 if (!ppc_obj64)
252b5132
RH		 1434 {
1435 /* Some people write 32 bit hex constants with the sign
1436 extension done by hand. This shouldn't really be
1437 valid, but, to permit this code to assemble on a 64
1438 bit host, we sign extend the 32 bit value. */
1439 if (val > 0
92161534
ILT		 1440 && (val & (offsetT) 0x80000000) != 0
1441 && (val & (offsetT) 0xffffffff) == val)
252b5132
RH		 1442 {
1443 val -= 0x80000000;
1444 val -= 0x80000000;
1445 }
1446 }
1447 }
1448 else
1449 {
1450 max = (1 << operand->bits) - 1;
1451 min = 0;
1452 }
1453
1454 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
1455 test = - val;
1456 else
1457 test = val;
1458
1459 if (test < (offsetT) min || test > (offsetT) max)
e5976317 1460 as_bad_value_out_of_range (_("operand"), test, (offsetT) min, (offsetT) max, file, line);
252b5132
RH		 1461 }
1462
1463 if (operand->insert)
1464 {
1465 const char *errmsg;
1466
1467 errmsg = NULL;
2b3c4602 1468 insn = (*operand->insert) (insn, (long) val, ppc_cpu, &errmsg);
252b5132 1469 if (errmsg != (const char *) NULL)
0baf16f2 1470 as_bad_where (file, line, errmsg);
252b5132
RH		 1471 }
1472 else
1473 insn |= (((long) val & ((1 << operand->bits) - 1))
1474 << operand->shift);
1475
1476 return insn;
1477}
1478
1479\f
1480#ifdef OBJ_ELF
1481/* Parse @got, etc. and return the desired relocation. */
1482static bfd_reloc_code_real_type
1483ppc_elf_suffix (str_p, exp_p)
1484 char **str_p;
1485 expressionS *exp_p;
1486{
1487 struct map_bfd {
1488 char *string;
b7d7dc63
AM		 1489 unsigned int length : 8;
1490 unsigned int valid32 : 1;
1491 unsigned int valid64 : 1;
1492 unsigned int reloc;
252b5132
RH		 1493 };
1494
1495 char ident[20];
1496 char *str = *str_p;
1497 char *str2;
1498 int ch;
1499 int len;
15c1449b 1500 const struct map_bfd *ptr;
252b5132 1501
b7d7dc63
AM		 1502#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1503#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1504#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1505
15c1449b 1506 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1507 MAP ("l", BFD_RELOC_LO16),
1508 MAP ("h", BFD_RELOC_HI16),
1509 MAP ("ha", BFD_RELOC_HI16_S),
1510 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1511 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1512 MAP ("got", BFD_RELOC_16_GOTOFF),
1513 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1514 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1515 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1516 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1517 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1518 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1519 MAP ("copy", BFD_RELOC_PPC_COPY),
1520 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1521 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1522 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1523 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1524 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1525 MAP ("tls", BFD_RELOC_PPC_TLS),
1526 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1527 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1528 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1529 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1530 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1531 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1532 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1533 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1534 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1535 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1536 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1537 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1538 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1539 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1540 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1541 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1542 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1543 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1544 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1545 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1546 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1547 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1548 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1549 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1550 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1551 MAP32 ("fixup", BFD_RELOC_CTOR),
1552 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1553 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1554 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1555 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1556 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1557 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1558 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1559 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1560 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1561 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1562 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1563 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1564 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1565 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1566 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1567 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1568 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1569 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1570 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1571 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1572 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1573 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1574 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1575 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1576 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1577 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1578 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1579 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1580 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1581 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1582 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1583 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1584 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1585 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1586 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1587 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1588 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1589 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1590 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1591 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1592 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
252b5132
RH		 1593 };
1594
1595 if (*str++ != '@')
1596 return BFD_RELOC_UNUSED;
1597
1598 for (ch = *str, str2 = ident;
1599 (str2 < ident + sizeof (ident) - 1
3882b010 1600 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1601 ch = *++str)
1602 {
3882b010 1603 *str2++ = TOLOWER (ch);
252b5132
RH		 1604 }
1605
1606 *str2 = '\0';
1607 len = str2 - ident;
1608
1609 ch = ident[0];
1610 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1611 if (ch == ptr->string[0]
1612 && len == ptr->length
b7d7dc63
AM		 1613 && memcmp (ident, ptr->string, ptr->length) == 0
1614 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 1615 {
15c1449b
AM		 1616 int reloc = ptr->reloc;
1617
cdba85ec 1618 if (!ppc_obj64)
5f6db75a
AM		 1619 if (exp_p->X_add_number != 0
1620 && (reloc == (int) BFD_RELOC_16_GOTOFF
1621 || reloc == (int) BFD_RELOC_LO16_GOTOFF
1622 || reloc == (int) BFD_RELOC_HI16_GOTOFF
1623 || reloc == (int) BFD_RELOC_HI16_S_GOTOFF))
1624 as_warn (_("identifier+constant@got means identifier@got+constant"));
1625
1626 /* Now check for identifier@suffix+constant. */
1627 if (*str == '-' || *str == '+')
252b5132 1628 {
5f6db75a
AM		 1629 char *orig_line = input_line_pointer;
1630 expressionS new_exp;
1631
1632 input_line_pointer = str;
1633 expression (&new_exp);
1634 if (new_exp.X_op == O_constant)
252b5132 1635 {
5f6db75a
AM		 1636 exp_p->X_add_number += new_exp.X_add_number;
1637 str = input_line_pointer;
252b5132 1638 }
5f6db75a
AM		 1639
1640 if (&input_line_pointer != str_p)
1641 input_line_pointer = orig_line;
252b5132 1642 }
252b5132 1643 *str_p = str;
0baf16f2 1644
2b3c4602 1645 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 1646 && exp_p->X_op == O_symbol
1647 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 1648 {
9f2b53d7
AM		 1649 /* Change the symbol so that the dummy .TOC. symbol can be
1650 omitted from the object file. */
0baf16f2
AM		 1651 exp_p->X_add_symbol = &abs_symbol;
1652 }
1653
15c1449b 1654 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 1655 }
1656
1657 return BFD_RELOC_UNUSED;
1658}
1659
99a814a1
AM		 1660/* Like normal .long/.short/.word, except support @got, etc.
1661 Clobbers input_line_pointer, checks end-of-line. */
252b5132
RH		 1662static void
1663ppc_elf_cons (nbytes)
0baf16f2 1664 register int nbytes; /* 1=.byte, 2=.word, 4=.long, 8=.llong. */
252b5132
RH		 1665{
1666 expressionS exp;
1667 bfd_reloc_code_real_type reloc;
1668
1669 if (is_it_end_of_statement ())
1670 {
1671 demand_empty_rest_of_line ();
1672 return;
1673 }
1674
1675 do
1676 {
1677 expression (&exp);
1678 if (exp.X_op == O_symbol
1679 && *input_line_pointer == '@'
99a814a1
AM		 1680 && (reloc = ppc_elf_suffix (&input_line_pointer,
1681 &exp)) != BFD_RELOC_UNUSED)
252b5132 1682 {
99a814a1
AM		 1683 reloc_howto_type *reloc_howto;
1684 int size;
1685
1686 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1687 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH		 1688
1689 if (size > nbytes)
0baf16f2
AM		 1690 {
1691 as_bad (_("%s relocations do not fit in %d bytes\n"),
1692 reloc_howto->name, nbytes);
1693 }
252b5132
RH		 1694 else
1695 {
0baf16f2
AM		 1696 char *p;
1697 int offset;
252b5132 1698
0baf16f2
AM		 1699 p = frag_more (nbytes);
1700 offset = 0;
1701 if (target_big_endian)
1702 offset = nbytes - size;
99a814a1
AM		 1703 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1704 &exp, 0, reloc);
252b5132
RH		 1705 }
1706 }
1707 else
1708 emit_expr (&exp, (unsigned int) nbytes);
1709 }
1710 while (*input_line_pointer++ == ',');
1711
99a814a1
AM		 1712 /* Put terminator back into stream. */
1713 input_line_pointer--;
252b5132
RH		 1714 demand_empty_rest_of_line ();
1715}
1716
1717/* Solaris pseduo op to change to the .rodata section. */
1718static void
1719ppc_elf_rdata (xxx)
1720 int xxx;
1721{
1722 char *save_line = input_line_pointer;
1723 static char section[] = ".rodata\n";
1724
99a814a1 1725 /* Just pretend this is .section .rodata */
252b5132
RH		 1726 input_line_pointer = section;
1727 obj_elf_section (xxx);
1728
1729 input_line_pointer = save_line;
1730}
1731
99a814a1 1732/* Pseudo op to make file scope bss items. */
252b5132 1733static void
99a814a1 1734ppc_elf_lcomm (xxx)
92161534 1735 int xxx ATTRIBUTE_UNUSED;
252b5132
RH		 1736{
1737 register char *name;
1738 register char c;
1739 register char *p;
1740 offsetT size;
1741 register symbolS *symbolP;
1742 offsetT align;
1743 segT old_sec;
1744 int old_subsec;
1745 char *pfrag;
1746 int align2;
1747
1748 name = input_line_pointer;
1749 c = get_symbol_end ();
1750
99a814a1 1751 /* just after name is now '\0'. */
252b5132
RH		 1752 p = input_line_pointer;
1753 *p = c;
1754 SKIP_WHITESPACE ();
1755 if (*input_line_pointer != ',')
1756 {
1757 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
1758 ignore_rest_of_line ();
1759 return;
1760 }
1761
1762 input_line_pointer++; /* skip ',' */
1763 if ((size = get_absolute_expression ()) < 0)
1764 {
1765 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
1766 ignore_rest_of_line ();
1767 return;
1768 }
1769
1770 /* The third argument to .lcomm is the alignment. */
1771 if (*input_line_pointer != ',')
1772 align = 8;
1773 else
1774 {
1775 ++input_line_pointer;
1776 align = get_absolute_expression ();
1777 if (align <= 0)
1778 {
1779 as_warn (_("ignoring bad alignment"));
1780 align = 8;
1781 }
1782 }
1783
1784 *p = 0;
1785 symbolP = symbol_find_or_make (name);
1786 *p = c;
1787
1788 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
1789 {
1790 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
1791 S_GET_NAME (symbolP));
1792 ignore_rest_of_line ();
1793 return;
1794 }
1795
1796 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
1797 {
1798 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
1799 S_GET_NAME (symbolP),
1800 (long) S_GET_VALUE (symbolP),
1801 (long) size);
1802
1803 ignore_rest_of_line ();
1804 return;
1805 }
1806
99a814a1 1807 /* Allocate_bss. */
252b5132
RH		 1808 old_sec = now_seg;
1809 old_subsec = now_subseg;
1810 if (align)
1811 {
99a814a1 1812 /* Convert to a power of 2 alignment. */
252b5132
RH		 1813 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
1814 if (align != 1)
1815 {
1816 as_bad (_("Common alignment not a power of 2"));
1817 ignore_rest_of_line ();
1818 return;
1819 }
1820 }
1821 else
1822 align2 = 0;
1823
1824 record_alignment (bss_section, align2);
1825 subseg_set (bss_section, 0);
1826 if (align2)
1827 frag_align (align2, 0, 0);
1828 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 1829 symbol_get_frag (symbolP)->fr_symbol = 0;
1830 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 1831 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
1832 (char *) 0);
1833 *pfrag = 0;
1834 S_SET_SIZE (symbolP, size);
1835 S_SET_SEGMENT (symbolP, bss_section);
1836 subseg_set (old_sec, old_subsec);
1837 demand_empty_rest_of_line ();
1838}
1839
1840/* Validate any relocations emitted for -mrelocatable, possibly adding
1841 fixups for word relocations in writable segments, so we can adjust
1842 them at runtime. */
1843static void
1844ppc_elf_validate_fix (fixp, seg)
1845 fixS *fixp;
1846 segT seg;
1847{
1848 if (fixp->fx_done || fixp->fx_pcrel)
1849 return;
1850
1851 switch (shlib)
1852 {
1853 case SHLIB_NONE:
1854 case SHLIB_PIC:
1855 return;
1856
5d6f4f16 1857 case SHLIB_MRELOCATABLE:
252b5132
RH		 1858 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
1859 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
1860 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
1861 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
1862 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 1863 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 1864 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
1865 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
1866 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 1867 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 1868 && strcmp (segment_name (seg), ".got2") != 0
1869 && strcmp (segment_name (seg), ".dtors") != 0
1870 && strcmp (segment_name (seg), ".ctors") != 0
1871 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 1872 && strcmp (segment_name (seg), ".gcc_except_table") != 0
1873 && strcmp (segment_name (seg), ".eh_frame") != 0
1874 && strcmp (segment_name (seg), ".ex_shared") != 0)
1875 {
1876 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
1877 || fixp->fx_r_type != BFD_RELOC_CTOR)
1878 {
1879 as_bad_where (fixp->fx_file, fixp->fx_line,
1880 _("Relocation cannot be done when using -mrelocatable"));
1881 }
1882 }
1883 return;
1884 }
1885}
0baf16f2 1886
7e8d4ab4
AM		 1887/* Prevent elf_frob_file_before_adjust removing a weak undefined
1888 function descriptor sym if the corresponding code sym is used. */
1889
1890void
1891ppc_frob_file_before_adjust ()
0baf16f2 1892{
7e8d4ab4 1893 symbolS *symp;
0baf16f2 1894
7e8d4ab4
AM		 1895 if (!ppc_obj64)
1896 return;
1897
1898 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 1899 {
7e8d4ab4
AM		 1900 const char *name;
1901 char *dotname;
1902 symbolS *dotsym;
1903 size_t len;
1904
1905 name = S_GET_NAME (symp);
1906 if (name[0] == '.')
1907 continue;
1908
1909 if (! S_IS_WEAK (symp)
1910 || S_IS_DEFINED (symp))
1911 continue;
1912
1913 len = strlen (name) + 1;
1914 dotname = xmalloc (len + 1);
1915 dotname[0] = '.';
1916 memcpy (dotname + 1, name, len);
1917 dotsym = symbol_find (dotname);
1918 free (dotname);
1919 if (dotsym != NULL && (symbol_used_p (dotsym)
1920 || symbol_used_in_reloc_p (dotsym)))
1921 {
1922 symbol_mark_used (symp);
1923 }
0baf16f2
AM		 1924 }
1925
7e8d4ab4
AM		 1926 /* Don't emit .TOC. symbol. */
1927 symp = symbol_find (".TOC.");
1928 if (symp != NULL)
1929 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
0baf16f2 1930}
252b5132
RH		 1931#endif /* OBJ_ELF */
1932\f
1933#ifdef TE_PE
1934
1935/*
99a814a1 1936 * Summary of parse_toc_entry.
252b5132
RH		 1937 *
1938 * in: Input_line_pointer points to the '[' in one of:
1939 *
1940 * [toc] [tocv] [toc32] [toc64]
1941 *
1942 * Anything else is an error of one kind or another.
1943 *
81d4177b 1944 * out:
252b5132
RH		 1945 * return value: success or failure
1946 * toc_kind: kind of toc reference
1947 * input_line_pointer:
1948 * success: first char after the ']'
1949 * failure: unchanged
1950 *
1951 * settings:
1952 *
1953 * [toc] - rv == success, toc_kind = default_toc
1954 * [tocv] - rv == success, toc_kind = data_in_toc
1955 * [toc32] - rv == success, toc_kind = must_be_32
1956 * [toc64] - rv == success, toc_kind = must_be_64
1957 *
1958 */
1959
81d4177b
KH		 1960enum toc_size_qualifier
1961{
252b5132
RH		 1962 default_toc, /* The toc cell constructed should be the system default size */
1963 data_in_toc, /* This is a direct reference to a toc cell */
1964 must_be_32, /* The toc cell constructed must be 32 bits wide */
1965 must_be_64 /* The toc cell constructed must be 64 bits wide */
1966};
1967
1968static int
99a814a1 1969parse_toc_entry (toc_kind)
252b5132
RH		 1970 enum toc_size_qualifier *toc_kind;
1971{
1972 char *start;
1973 char *toc_spec;
1974 char c;
1975 enum toc_size_qualifier t;
1976
99a814a1 1977 /* Save the input_line_pointer. */
252b5132
RH		 1978 start = input_line_pointer;
1979
99a814a1 1980 /* Skip over the '[' , and whitespace. */
252b5132
RH		 1981 ++input_line_pointer;
1982 SKIP_WHITESPACE ();
81d4177b 1983
99a814a1 1984 /* Find the spelling of the operand. */
252b5132
RH		 1985 toc_spec = input_line_pointer;
1986 c = get_symbol_end ();
1987
99a814a1 1988 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 1989 {
1990 t = default_toc;
1991 }
99a814a1 1992 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 1993 {
1994 t = data_in_toc;
1995 }
99a814a1 1996 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 1997 {
1998 t = must_be_32;
1999 }
99a814a1 2000 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2001 {
2002 t = must_be_64;
2003 }
2004 else
2005 {
2006 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2007 *input_line_pointer = c;
2008 input_line_pointer = start;
252b5132
RH		 2009 return 0;
2010 }
2011
99a814a1
AM		 2012 /* Now find the ']'. */
2013 *input_line_pointer = c;
252b5132 2014
81d4177b
KH		 2015 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2016 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2017
2018 if (c != ']')
2019 {
2020 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2021 input_line_pointer = start;
252b5132
RH		 2022 return 0;
2023 }
2024
99a814a1 2025 *toc_kind = t;
252b5132
RH		 2026 return 1;
2027}
2028#endif
2029\f
2030
dc1d03fc 2031#ifdef OBJ_ELF
6a0c61b7
EZ		 2032#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2033static void
dc1d03fc 2034ppc_apuinfo_section_add (apu, version)
6a0c61b7
EZ		 2035 unsigned int apu, version;
2036{
2037 unsigned int i;
2038
2039 /* Check we don't already exist. */
2040 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2041 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2042 return;
b34976b6 2043
6a0c61b7
EZ		 2044 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2045 {
2046 if (ppc_apuinfo_num_alloc == 0)
2047 {
2048 ppc_apuinfo_num_alloc = 4;
2049 ppc_apuinfo_list = (unsigned long *)
2050 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2051 }
2052 else
2053 {
2054 ppc_apuinfo_num_alloc += 4;
2055 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2056 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2057 }
2058 }
dc1d03fc 2059 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2060}
2061#undef APUID
dc1d03fc 2062#endif
6a0c61b7
EZ		 2063\f
2064
252b5132
RH		 2065/* We need to keep a list of fixups. We can't simply generate them as
2066 we go, because that would require us to first create the frag, and
2067 that would screw up references to ``.''. */
2068
2069struct ppc_fixup
2070{
2071 expressionS exp;
2072 int opindex;
2073 bfd_reloc_code_real_type reloc;
2074};
2075
2076#define MAX_INSN_FIXUPS (5)
2077
2078/* This routine is called for each instruction to be assembled. */
2079
2080void
2081md_assemble (str)
2082 char *str;
2083{
2084 char *s;
2085 const struct powerpc_opcode *opcode;
2086 unsigned long insn;
2087 const unsigned char *opindex_ptr;
2088 int skip_optional;
2089 int need_paren;
2090 int next_opindex;
2091 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2092 int fc;
2093 char *f;
2094 int i;
2095#ifdef OBJ_ELF
2096 bfd_reloc_code_real_type reloc;
2097#endif
2098
2099 /* Get the opcode. */
3882b010 2100 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2101 ;
2102 if (*s != '\0')
2103 *s++ = '\0';
2104
2105 /* Look up the opcode in the hash table. */
2106 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2107 if (opcode == (const struct powerpc_opcode *) NULL)
2108 {
2109 const struct powerpc_macro *macro;
2110
2111 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2112 if (macro == (const struct powerpc_macro *) NULL)
2113 as_bad (_("Unrecognized opcode: `%s'"), str);
2114 else
2115 ppc_macro (s, macro);
2116
2117 return;
2118 }
2119
2120 insn = opcode->opcode;
2121
2122 str = s;
3882b010 2123 while (ISSPACE (*str))
252b5132
RH		 2124 ++str;
2125
2126 /* PowerPC operands are just expressions. The only real issue is
2127 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2128 an optional operand separate the operands only with commas (in some
2129 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2130 have optional operands). Most instructions with optional operands
2131 have only one. Those that have more than one optional operand can
2132 take either all their operands or none. So, before we start seriously
2133 parsing the operands, we check to see if we have optional operands,
2134 and if we do, we count the number of commas to see which operands
2135 have been omitted. */
252b5132
RH		 2136 skip_optional = 0;
2137 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2138 {
2139 const struct powerpc_operand *operand;
2140
2141 operand = &powerpc_operands[*opindex_ptr];
2142 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2143 {
2144 unsigned int opcount;
7fe9cf6b
NC		 2145 unsigned int num_operands_expected;
2146 unsigned int i;
252b5132
RH		 2147
2148 /* There is an optional operand. Count the number of
2149 commas in the input line. */
2150 if (*str == '\0')
2151 opcount = 0;
2152 else
2153 {
2154 opcount = 1;
2155 s = str;
2156 while ((s = strchr (s, ',')) != (char *) NULL)
2157 {
2158 ++opcount;
2159 ++s;
2160 }
2161 }
2162
7fe9cf6b
NC		 2163 /* Compute the number of expected operands.
2164 Do not count fake operands. */
2165 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2166 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2167 ++ num_operands_expected;
2168
252b5132
RH		 2169 /* If there are fewer operands in the line then are called
2170 for by the instruction, we want to skip the optional
1f6c9eb0 2171 operands. */
7fe9cf6b 2172 if (opcount < num_operands_expected)
252b5132
RH		 2173 skip_optional = 1;
2174
2175 break;
2176 }
2177 }
2178
2179 /* Gather the operands. */
2180 need_paren = 0;
2181 next_opindex = 0;
2182 fc = 0;
2183 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2184 {
2185 const struct powerpc_operand *operand;
2186 const char *errmsg;
2187 char *hold;
2188 expressionS ex;
2189 char endc;
2190
2191 if (next_opindex == 0)
2192 operand = &powerpc_operands[*opindex_ptr];
2193 else
2194 {
2195 operand = &powerpc_operands[next_opindex];
2196 next_opindex = 0;
2197 }
252b5132
RH		 2198 errmsg = NULL;
2199
2200 /* If this is a fake operand, then we do not expect anything
2201 from the input. */
2202 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2203 {
2b3c4602 2204 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2205 if (errmsg != (const char *) NULL)
2206 as_bad (errmsg);
2207 continue;
2208 }
2209
2210 /* If this is an optional operand, and we are skipping it, just
2211 insert a zero. */
2212 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2213 && skip_optional)
2214 {
2215 if (operand->insert)
2216 {
2b3c4602 2217 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2218 if (errmsg != (const char *) NULL)
2219 as_bad (errmsg);
2220 }
2221 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2222 next_opindex = *opindex_ptr + 1;
2223 continue;
2224 }
2225
2226 /* Gather the operand. */
2227 hold = input_line_pointer;
2228 input_line_pointer = str;
2229
2230#ifdef TE_PE
81d4177b 2231 if (*input_line_pointer == '[')
252b5132
RH		 2232 {
2233 /* We are expecting something like the second argument here:
99a814a1
AM		 2234 *
2235 * lwz r4,[toc].GS.0.static_int(rtoc)
2236 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2237 * The argument following the `]' must be a symbol name, and the
2238 * register must be the toc register: 'rtoc' or '2'
2239 *
2240 * The effect is to 0 as the displacement field
2241 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2242 * the appropriate variation) reloc against it based on the symbol.
2243 * The linker will build the toc, and insert the resolved toc offset.
2244 *
2245 * Note:
2246 * o The size of the toc entry is currently assumed to be
2247 * 32 bits. This should not be assumed to be a hard coded
2248 * number.
2249 * o In an effort to cope with a change from 32 to 64 bits,
2250 * there are also toc entries that are specified to be
2251 * either 32 or 64 bits:
2252 * lwz r4,[toc32].GS.0.static_int(rtoc)
2253 * lwz r4,[toc64].GS.0.static_int(rtoc)
2254 * These demand toc entries of the specified size, and the
2255 * instruction probably requires it.
2256 */
252b5132
RH		 2257
2258 int valid_toc;
2259 enum toc_size_qualifier toc_kind;
2260 bfd_reloc_code_real_type toc_reloc;
2261
99a814a1
AM		 2262 /* Go parse off the [tocXX] part. */
2263 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2264
81d4177b 2265 if (!valid_toc)
252b5132 2266 {
99a814a1
AM		 2267 /* Note: message has already been issued.
2268 FIXME: what sort of recovery should we do?
2269 demand_rest_of_line (); return; ? */
252b5132
RH		 2270 }
2271
99a814a1
AM		 2272 /* Now get the symbol following the ']'. */
2273 expression (&ex);
252b5132
RH		 2274
2275 switch (toc_kind)
2276 {
2277 case default_toc:
99a814a1
AM		 2278 /* In this case, we may not have seen the symbol yet,
2279 since it is allowed to appear on a .extern or .globl
2280 or just be a label in the .data section. */
252b5132
RH		 2281 toc_reloc = BFD_RELOC_PPC_TOC16;
2282 break;
2283 case data_in_toc:
99a814a1
AM		 2284 /* 1. The symbol must be defined and either in the toc
2285 section, or a global.
2286 2. The reloc generated must have the TOCDEFN flag set
2287 in upper bit mess of the reloc type.
2288 FIXME: It's a little confusing what the tocv
2289 qualifier can be used for. At the very least, I've
2290 seen three uses, only one of which I'm sure I can
2291 explain. */
81d4177b
KH		 2292 if (ex.X_op == O_symbol)
2293 {
252b5132 2294 assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2295 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2296 != tocdata_section)
252b5132 2297 {
99a814a1 2298 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2299 }
2300 }
2301
2302 toc_reloc = BFD_RELOC_PPC_TOC16;
2303 break;
2304 case must_be_32:
99a814a1
AM		 2305 /* FIXME: these next two specifically specify 32/64 bit
2306 toc entries. We don't support them today. Is this
2307 the right way to say that? */
252b5132
RH		 2308 toc_reloc = BFD_RELOC_UNUSED;
2309 as_bad (_("Unimplemented toc32 expression modifier"));
2310 break;
2311 case must_be_64:
99a814a1 2312 /* FIXME: see above. */
252b5132
RH		 2313 toc_reloc = BFD_RELOC_UNUSED;
2314 as_bad (_("Unimplemented toc64 expression modifier"));
2315 break;
2316 default:
bc805888 2317 fprintf (stderr,
99a814a1
AM		 2318 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2319 toc_kind);
bc805888 2320 abort ();
252b5132
RH		 2321 break;
2322 }
2323
2324 /* We need to generate a fixup for this expression. */
2325 if (fc >= MAX_INSN_FIXUPS)
2326 as_fatal (_("too many fixups"));
2327
2328 fixups[fc].reloc = toc_reloc;
2329 fixups[fc].exp = ex;
2330 fixups[fc].opindex = *opindex_ptr;
2331 ++fc;
2332
99a814a1
AM		 2333 /* Ok. We've set up the fixup for the instruction. Now make it
2334 look like the constant 0 was found here. */
252b5132
RH		 2335 ex.X_unsigned = 1;
2336 ex.X_op = O_constant;
2337 ex.X_add_number = 0;
2338 ex.X_add_symbol = NULL;
2339 ex.X_op_symbol = NULL;
2340 }
2341
2342 else
2343#endif /* TE_PE */
2344 {
2345 if (! register_name (&ex))
2346 {
2347 if ((operand->flags & PPC_OPERAND_CR) != 0)
b34976b6 2348 cr_operand = TRUE;
252b5132 2349 expression (&ex);
b34976b6 2350 cr_operand = FALSE;
252b5132
RH		 2351 }
2352 }
2353
2354 str = input_line_pointer;
2355 input_line_pointer = hold;
2356
2357 if (ex.X_op == O_illegal)
2358 as_bad (_("illegal operand"));
2359 else if (ex.X_op == O_absent)
2360 as_bad (_("missing operand"));
2361 else if (ex.X_op == O_register)
2362 {
2363 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2364 (char *) NULL, 0);
2365 }
2366 else if (ex.X_op == O_constant)
2367 {
2368#ifdef OBJ_ELF
81d4177b 2369 /* Allow @HA, @L, @H on constants. */
252b5132
RH		 2370 char *orig_str = str;
2371
2372 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2373 switch (reloc)
2374 {
2375 default:
2376 str = orig_str;
2377 break;
2378
2379 case BFD_RELOC_LO16:
2380 /* X_unsigned is the default, so if the user has done
0baf16f2
AM		 2381 something which cleared it, we always produce a
2382 signed value. */
2383 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH		 2384 ex.X_add_number &= 0xffff;
2385 else
0baf16f2 2386 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2387 break;
2388
2389 case BFD_RELOC_HI16:
0baf16f2
AM		 2390 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2391 ex.X_add_number = PPC_HI (ex.X_add_number);
2392 else
2393 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH		 2394 break;
2395
2396 case BFD_RELOC_HI16_S:
0baf16f2
AM		 2397 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2398 ex.X_add_number = PPC_HA (ex.X_add_number);
2399 else
2400 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2401 break;
2402
0baf16f2
AM		 2403 case BFD_RELOC_PPC64_HIGHER:
2404 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2405 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2406 else
2407 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2408 break;
2409
2410 case BFD_RELOC_PPC64_HIGHER_S:
2411 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2412 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2413 else
2414 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2415 break;
0baf16f2
AM		 2416
2417 case BFD_RELOC_PPC64_HIGHEST:
2418 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2419 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2420 else
2421 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2422 break;
2423
2424 case BFD_RELOC_PPC64_HIGHEST_S:
2425 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2426 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2427 else
2428 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2429 break;
252b5132 2430 }
0baf16f2 2431#endif /* OBJ_ELF */
252b5132
RH		 2432 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2433 (char *) NULL, 0);
2434 }
2435#ifdef OBJ_ELF
2436 else if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2437 {
cdba85ec
AM		 2438 /* Some TLS tweaks. */
2439 switch (reloc)
2440 {
2441 default:
2442 break;
2443 case BFD_RELOC_PPC_TLS:
2444 insn = ppc_insert_operand (insn, operand, ppc_obj64 ? 13 : 2,
2445 (char *) NULL, 0);
2446 break;
2447 /* We'll only use the 32 (or 64) bit form of these relocations
2448 in constants. Instructions get the 16 bit form. */
2449 case BFD_RELOC_PPC_DTPREL:
2450 reloc = BFD_RELOC_PPC_DTPREL16;
2451 break;
2452 case BFD_RELOC_PPC_TPREL:
2453 reloc = BFD_RELOC_PPC_TPREL16;
2454 break;
2455 }
2456
99a814a1
AM		 2457 /* For the absolute forms of branches, convert the PC
2458 relative form back into the absolute. */
252b5132
RH		 2459 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2460 {
2461 switch (reloc)
2462 {
2463 case BFD_RELOC_PPC_B26:
2464 reloc = BFD_RELOC_PPC_BA26;
2465 break;
2466 case BFD_RELOC_PPC_B16:
2467 reloc = BFD_RELOC_PPC_BA16;
2468 break;
2469 case BFD_RELOC_PPC_B16_BRTAKEN:
2470 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2471 break;
2472 case BFD_RELOC_PPC_B16_BRNTAKEN:
2473 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2474 break;
2475 default:
2476 break;
2477 }
2478 }
2479
2b3c4602 2480 if (ppc_obj64
adadcc0c 2481 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
0baf16f2
AM		 2482 {
2483 switch (reloc)
2484 {
2485 case BFD_RELOC_16:
2486 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2487 break;
2488 case BFD_RELOC_LO16:
2489 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2490 break;
2491 case BFD_RELOC_16_GOTOFF:
2492 reloc = BFD_RELOC_PPC64_GOT16_DS;
2493 break;
2494 case BFD_RELOC_LO16_GOTOFF:
2495 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2496 break;
2497 case BFD_RELOC_LO16_PLTOFF:
2498 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2499 break;
1cfc59d5 2500 case BFD_RELOC_16_BASEREL:
0baf16f2
AM		 2501 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2502 break;
2503 case BFD_RELOC_LO16_BASEREL:
2504 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2505 break;
2506 case BFD_RELOC_PPC_TOC16:
2507 reloc = BFD_RELOC_PPC64_TOC16_DS;
2508 break;
2509 case BFD_RELOC_PPC64_TOC16_LO:
2510 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2511 break;
2512 case BFD_RELOC_PPC64_PLTGOT16:
2513 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2514 break;
2515 case BFD_RELOC_PPC64_PLTGOT16_LO:
2516 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2517 break;
cdba85ec
AM		 2518 case BFD_RELOC_PPC_DTPREL16:
2519 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2520 break;
2521 case BFD_RELOC_PPC_DTPREL16_LO:
2522 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2523 break;
2524 case BFD_RELOC_PPC_TPREL16:
2525 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2526 break;
2527 case BFD_RELOC_PPC_TPREL16_LO:
2528 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2529 break;
2530 case BFD_RELOC_PPC_GOT_DTPREL16:
2531 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2532 case BFD_RELOC_PPC_GOT_TPREL16:
2533 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2534 break;
0baf16f2
AM		 2535 default:
2536 as_bad (_("unsupported relocation for DS offset field"));
2537 break;
2538 }
2539 }
2540
252b5132
RH		 2541 /* We need to generate a fixup for this expression. */
2542 if (fc >= MAX_INSN_FIXUPS)
2543 as_fatal (_("too many fixups"));
2544 fixups[fc].exp = ex;
2545 fixups[fc].opindex = 0;
2546 fixups[fc].reloc = reloc;
2547 ++fc;
2548 }
2549#endif /* OBJ_ELF */
2550
2551 else
2552 {
2553 /* We need to generate a fixup for this expression. */
2554 if (fc >= MAX_INSN_FIXUPS)
2555 as_fatal (_("too many fixups"));
2556 fixups[fc].exp = ex;
2557 fixups[fc].opindex = *opindex_ptr;
2558 fixups[fc].reloc = BFD_RELOC_UNUSED;
2559 ++fc;
2560 }
2561
2562 if (need_paren)
2563 {
2564 endc = ')';
2565 need_paren = 0;
2566 }
2567 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2568 {
2569 endc = '(';
2570 need_paren = 1;
2571 }
2572 else
2573 endc = ',';
2574
2575 /* The call to expression should have advanced str past any
2576 whitespace. */
2577 if (*str != endc
2578 && (endc != ',' || *str != '\0'))
2579 {
2580 as_bad (_("syntax error; found `%c' but expected `%c'"), *str, endc);
2581 break;
2582 }
2583
2584 if (*str != '\0')
2585 ++str;
2586 }
2587
3882b010 2588 while (ISSPACE (*str))
252b5132
RH		 2589 ++str;
2590
2591 if (*str != '\0')
2592 as_bad (_("junk at end of line: `%s'"), str);
2593
dc1d03fc 2594#ifdef OBJ_ELF
6a0c61b7
EZ		 2595 /* Do we need/want a APUinfo section? */
2596 if (ppc_cpu & (PPC_OPCODE_SPE
2597 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS
2598 | PPC_OPCODE_BRLOCK | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
2599 | PPC_OPCODE_RFMCI))
2600 {
2601 /* These are all version "1". */
2602 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 2603 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 2604 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 2605 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 2606 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 2607 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 2608 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 2609 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 2610 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 2611 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 2612 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 2613 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 2614 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 2615 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
6a0c61b7 2616 }
dc1d03fc 2617#endif
6a0c61b7 2618
252b5132
RH		 2619 /* Write out the instruction. */
2620 f = frag_more (4);
2621 md_number_to_chars (f, insn, 4);
2622
5d6f4f16
GK		 2623#ifdef OBJ_ELF
2624 dwarf2_emit_insn (4);
2625#endif
2626
252b5132
RH		 2627 /* Create any fixups. At this point we do not use a
2628 bfd_reloc_code_real_type, but instead just use the
2629 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2630 handle fixups for any operand type, although that is admittedly
2631 not a very exciting feature. We pick a BFD reloc type in
94f592af 2632 md_apply_fix3. */
252b5132
RH		 2633 for (i = 0; i < fc; i++)
2634 {
2635 const struct powerpc_operand *operand;
2636
2637 operand = &powerpc_operands[fixups[i].opindex];
2638 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2639 {
99a814a1 2640 reloc_howto_type *reloc_howto;
252b5132
RH		 2641 int size;
2642 int offset;
2643 fixS *fixP;
2644
99a814a1 2645 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 2646 if (!reloc_howto)
2647 abort ();
2648
2649 size = bfd_get_reloc_size (reloc_howto);
2650 offset = target_big_endian ? (4 - size) : 0;
2651
2652 if (size < 1 || size > 4)
bc805888 2653 abort ();
252b5132 2654
99a814a1
AM		 2655 fixP = fix_new_exp (frag_now,
2656 f - frag_now->fr_literal + offset,
2657 size,
2658 &fixups[i].exp,
2659 reloc_howto->pc_relative,
252b5132
RH		 2660 fixups[i].reloc);
2661
2662 /* Turn off complaints that the addend is too large for things like
2663 foo+100000@ha. */
2664 switch (fixups[i].reloc)
2665 {
2666 case BFD_RELOC_16_GOTOFF:
2667 case BFD_RELOC_PPC_TOC16:
2668 case BFD_RELOC_LO16:
2669 case BFD_RELOC_HI16:
2670 case BFD_RELOC_HI16_S:
0baf16f2 2671#ifdef OBJ_ELF
0baf16f2
AM		 2672 case BFD_RELOC_PPC64_HIGHER:
2673 case BFD_RELOC_PPC64_HIGHER_S:
2674 case BFD_RELOC_PPC64_HIGHEST:
2675 case BFD_RELOC_PPC64_HIGHEST_S:
0baf16f2 2676#endif
252b5132
RH		 2677 fixP->fx_no_overflow = 1;
2678 break;
2679 default:
2680 break;
2681 }
2682 }
2683 else
99a814a1
AM		 2684 fix_new_exp (frag_now,
2685 f - frag_now->fr_literal,
2686 4,
252b5132
RH		 2687 &fixups[i].exp,
2688 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
2689 ((bfd_reloc_code_real_type)
99a814a1 2690 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
252b5132
RH		 2691 }
2692}
2693
2694/* Handle a macro. Gather all the operands, transform them as
2695 described by the macro, and call md_assemble recursively. All the
2696 operands are separated by commas; we don't accept parentheses
2697 around operands here. */
2698
2699static void
2700ppc_macro (str, macro)
2701 char *str;
2702 const struct powerpc_macro *macro;
2703{
2704 char *operands[10];
2705 unsigned int count;
2706 char *s;
2707 unsigned int len;
2708 const char *format;
2709 int arg;
2710 char *send;
2711 char *complete;
2712
2713 /* Gather the users operands into the operands array. */
2714 count = 0;
2715 s = str;
2716 while (1)
2717 {
2718 if (count >= sizeof operands / sizeof operands[0])
2719 break;
2720 operands[count++] = s;
2721 s = strchr (s, ',');
2722 if (s == (char *) NULL)
2723 break;
2724 *s++ = '\0';
81d4177b 2725 }
252b5132
RH		 2726
2727 if (count != macro->operands)
2728 {
2729 as_bad (_("wrong number of operands"));
2730 return;
2731 }
2732
2733 /* Work out how large the string must be (the size is unbounded
2734 because it includes user input). */
2735 len = 0;
2736 format = macro->format;
2737 while (*format != '\0')
2738 {
2739 if (*format != '%')
2740 {
2741 ++len;
2742 ++format;
2743 }
2744 else
2745 {
2746 arg = strtol (format + 1, &send, 10);
2747 know (send != format && arg >= 0 && arg < count);
2748 len += strlen (operands[arg]);
2749 format = send;
2750 }
2751 }
2752
2753 /* Put the string together. */
2754 complete = s = (char *) alloca (len + 1);
2755 format = macro->format;
2756 while (*format != '\0')
2757 {
2758 if (*format != '%')
2759 *s++ = *format++;
2760 else
2761 {
2762 arg = strtol (format + 1, &send, 10);
2763 strcpy (s, operands[arg]);
2764 s += strlen (s);
2765 format = send;
2766 }
2767 }
2768 *s = '\0';
2769
2770 /* Assemble the constructed instruction. */
2771 md_assemble (complete);
81d4177b 2772}
252b5132
RH		 2773\f
2774#ifdef OBJ_ELF
99a814a1 2775/* For ELF, add support for SHF_EXCLUDE and SHT_ORDERED. */
252b5132
RH		 2776
2777int
2778ppc_section_letter (letter, ptr_msg)
2779 int letter;
2780 char **ptr_msg;
2781{
2782 if (letter == 'e')
2783 return SHF_EXCLUDE;
2784
13ae64f3 2785 *ptr_msg = _("Bad .section directive: want a,e,w,x,M,S,G,T in string");
711ef82f 2786 return -1;
252b5132
RH		 2787}
2788
2789int
9de8d8f1
RH		 2790ppc_section_word (str, len)
2791 char *str;
2792 size_t len;
252b5132 2793{
9de8d8f1
RH		 2794 if (len == 7 && strncmp (str, "exclude", 7) == 0)
2795 return SHF_EXCLUDE;
252b5132 2796
9de8d8f1 2797 return -1;
252b5132
RH		 2798}
2799
2800int
9de8d8f1
RH		 2801ppc_section_type (str, len)
2802 char *str;
2803 size_t len;
252b5132 2804{
9de8d8f1
RH		 2805 if (len == 7 && strncmp (str, "ordered", 7) == 0)
2806 return SHT_ORDERED;
252b5132 2807
9de8d8f1 2808 return -1;
252b5132
RH		 2809}
2810
2811int
2812ppc_section_flags (flags, attr, type)
2813 int flags;
2814 int attr;
2815 int type;
2816{
2817 if (type == SHT_ORDERED)
2818 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
2819
2820 if (attr & SHF_EXCLUDE)
2821 flags |= SEC_EXCLUDE;
2822
2823 return flags;
2824}
2825#endif /* OBJ_ELF */
2826
2827\f
2828/* Pseudo-op handling. */
2829
2830/* The .byte pseudo-op. This is similar to the normal .byte
2831 pseudo-op, but it can also take a single ASCII string. */
2832
2833static void
2834ppc_byte (ignore)
92161534 2835 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 2836{
2837 if (*input_line_pointer != '\"')
2838 {
2839 cons (1);
2840 return;
2841 }
2842
2843 /* Gather characters. A real double quote is doubled. Unusual
2844 characters are not permitted. */
2845 ++input_line_pointer;
2846 while (1)
2847 {
2848 char c;
2849
2850 c = *input_line_pointer++;
2851
2852 if (c == '\"')
2853 {
2854 if (*input_line_pointer != '\"')
2855 break;
2856 ++input_line_pointer;
2857 }
2858
2859 FRAG_APPEND_1_CHAR (c);
2860 }
2861
2862 demand_empty_rest_of_line ();
2863}
2864\f
2865#ifdef OBJ_XCOFF
2866
2867/* XCOFF specific pseudo-op handling. */
2868
2869/* This is set if we are creating a .stabx symbol, since we don't want
2870 to handle symbol suffixes for such symbols. */
b34976b6 2871static bfd_boolean ppc_stab_symbol;
252b5132
RH		 2872
2873/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
2874 symbols in the .bss segment as though they were local common
67c1ffbe 2875 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 2876 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 2877
2878static void
2879ppc_comm (lcomm)
2880 int lcomm;
2881{
2882 asection *current_seg = now_seg;
2883 subsegT current_subseg = now_subseg;
2884 char *name;
2885 char endc;
2886 char *end_name;
2887 offsetT size;
2888 offsetT align;
2889 symbolS *lcomm_sym = NULL;
2890 symbolS *sym;
2891 char *pfrag;
2892
2893 name = input_line_pointer;
2894 endc = get_symbol_end ();
2895 end_name = input_line_pointer;
2896 *end_name = endc;
2897
2898 if (*input_line_pointer != ',')
2899 {
2900 as_bad (_("missing size"));
2901 ignore_rest_of_line ();
2902 return;
2903 }
2904 ++input_line_pointer;
2905
2906 size = get_absolute_expression ();
2907 if (size < 0)
2908 {
2909 as_bad (_("negative size"));
2910 ignore_rest_of_line ();
2911 return;
2912 }
2913
2914 if (! lcomm)
2915 {
2916 /* The third argument to .comm is the alignment. */
2917 if (*input_line_pointer != ',')
1ad63b2f 2918 align = 2;
252b5132
RH		 2919 else
2920 {
2921 ++input_line_pointer;
2922 align = get_absolute_expression ();
2923 if (align <= 0)
2924 {
2925 as_warn (_("ignoring bad alignment"));
1ad63b2f 2926 align = 2;
252b5132
RH		 2927 }
2928 }
2929 }
2930 else
2931 {
2932 char *lcomm_name;
2933 char lcomm_endc;
2934
1ad63b2f 2935 if (size <= 4)
252b5132
RH		 2936 align = 2;
2937 else
2938 align = 3;
2939
2940 /* The third argument to .lcomm appears to be the real local
2941 common symbol to create. References to the symbol named in
2942 the first argument are turned into references to the third
2943 argument. */
2944 if (*input_line_pointer != ',')
2945 {
2946 as_bad (_("missing real symbol name"));
2947 ignore_rest_of_line ();
2948 return;
2949 }
2950 ++input_line_pointer;
2951
2952 lcomm_name = input_line_pointer;
2953 lcomm_endc = get_symbol_end ();
81d4177b 2954
252b5132
RH		 2955 lcomm_sym = symbol_find_or_make (lcomm_name);
2956
2957 *input_line_pointer = lcomm_endc;
2958 }
2959
2960 *end_name = '\0';
2961 sym = symbol_find_or_make (name);
2962 *end_name = endc;
2963
2964 if (S_IS_DEFINED (sym)
2965 || S_GET_VALUE (sym) != 0)
2966 {
2967 as_bad (_("attempt to redefine symbol"));
2968 ignore_rest_of_line ();
2969 return;
2970 }
81d4177b 2971
252b5132 2972 record_alignment (bss_section, align);
81d4177b 2973
252b5132
RH		 2974 if (! lcomm
2975 || ! S_IS_DEFINED (lcomm_sym))
2976 {
2977 symbolS *def_sym;
2978 offsetT def_size;
2979
2980 if (! lcomm)
2981 {
2982 def_sym = sym;
2983 def_size = size;
2984 S_SET_EXTERNAL (sym);
2985 }
2986 else
2987 {
809ffe0d 2988 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 2989 def_sym = lcomm_sym;
2990 def_size = 0;
2991 }
2992
2993 subseg_set (bss_section, 1);
2994 frag_align (align, 0, 0);
81d4177b 2995
809ffe0d 2996 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 2997 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
2998 def_size, (char *) NULL);
2999 *pfrag = 0;
3000 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3001 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3002 }
3003 else if (lcomm)
3004 {
3005 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3006 symbol_get_frag (lcomm_sym)->fr_offset =
3007 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3008 &~ ((1 << align) - 1));
809ffe0d
ILT		 3009 if (align > symbol_get_tc (lcomm_sym)->align)
3010 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3011 }
3012
3013 if (lcomm)
3014 {
3015 /* Make sym an offset from lcomm_sym. */
3016 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3017 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3018 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3019 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3020 }
3021
3022 subseg_set (current_seg, current_subseg);
3023
3024 demand_empty_rest_of_line ();
3025}
3026
3027/* The .csect pseudo-op. This switches us into a different
3028 subsegment. The first argument is a symbol whose value is the
3029 start of the .csect. In COFF, csect symbols get special aux
3030 entries defined by the x_csect field of union internal_auxent. The
3031 optional second argument is the alignment (the default is 2). */
3032
3033static void
3034ppc_csect (ignore)
5480ccf3 3035 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3036{
3037 char *name;
3038 char endc;
3039 symbolS *sym;
931e13a6 3040 offsetT align;
252b5132
RH		 3041
3042 name = input_line_pointer;
3043 endc = get_symbol_end ();
81d4177b 3044
252b5132
RH		 3045 sym = symbol_find_or_make (name);
3046
3047 *input_line_pointer = endc;
3048
3049 if (S_GET_NAME (sym)[0] == '\0')
3050 {
3051 /* An unnamed csect is assumed to be [PR]. */
809ffe0d 3052 symbol_get_tc (sym)->class = XMC_PR;
252b5132
RH		 3053 }
3054
931e13a6 3055 align = 2;
252b5132
RH		 3056 if (*input_line_pointer == ',')
3057 {
3058 ++input_line_pointer;
931e13a6 3059 align = get_absolute_expression ();
252b5132
RH		 3060 }
3061
931e13a6
AM		 3062 ppc_change_csect (sym, align);
3063
252b5132
RH		 3064 demand_empty_rest_of_line ();
3065}
3066
3067/* Change to a different csect. */
3068
3069static void
931e13a6 3070ppc_change_csect (sym, align)
252b5132 3071 symbolS *sym;
931e13a6 3072 offsetT align;
252b5132
RH		 3073{
3074 if (S_IS_DEFINED (sym))
809ffe0d 3075 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3076 else
3077 {
3078 symbolS **list_ptr;
3079 int after_toc;
3080 int hold_chunksize;
3081 symbolS *list;
931e13a6
AM		 3082 int is_code;
3083 segT sec;
252b5132
RH		 3084
3085 /* This is a new csect. We need to look at the symbol class to
3086 figure out whether it should go in the text section or the
3087 data section. */
3088 after_toc = 0;
931e13a6 3089 is_code = 0;
809ffe0d 3090 switch (symbol_get_tc (sym)->class)
252b5132
RH		 3091 {
3092 case XMC_PR:
3093 case XMC_RO:
3094 case XMC_DB:
3095 case XMC_GL:
3096 case XMC_XO:
3097 case XMC_SV:
3098 case XMC_TI:
3099 case XMC_TB:
3100 S_SET_SEGMENT (sym, text_section);
809ffe0d 3101 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3102 ++ppc_text_subsegment;
3103 list_ptr = &ppc_text_csects;
931e13a6 3104 is_code = 1;
252b5132
RH		 3105 break;
3106 case XMC_RW:
3107 case XMC_TC0:
3108 case XMC_TC:
3109 case XMC_DS:
3110 case XMC_UA:
3111 case XMC_BS:
3112 case XMC_UC:
3113 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3114 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3115 == ppc_data_subsegment))
252b5132
RH		 3116 after_toc = 1;
3117 S_SET_SEGMENT (sym, data_section);
809ffe0d 3118 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3119 ++ppc_data_subsegment;
3120 list_ptr = &ppc_data_csects;
3121 break;
3122 default:
3123 abort ();
3124 }
3125
3126 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3127 changing subsegments, so that we don't use a lot of memory
3128 space for what may be a small section. */
252b5132
RH		 3129 hold_chunksize = chunksize;
3130 chunksize = 64;
3131
931e13a6
AM		 3132 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3133 symbol_get_tc (sym)->subseg);
252b5132
RH		 3134
3135 chunksize = hold_chunksize;
3136
3137 if (after_toc)
3138 ppc_after_toc_frag = frag_now;
3139
931e13a6
AM		 3140 record_alignment (sec, align);
3141 if (is_code)
3142 frag_align_code (align, 0);
3143 else
3144 frag_align (align, 0, 0);
3145
809ffe0d 3146 symbol_set_frag (sym, frag_now);
252b5132
RH		 3147 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3148
931e13a6 3149 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3150 symbol_get_tc (sym)->output = 1;
3151 symbol_get_tc (sym)->within = sym;
81d4177b 3152
252b5132 3153 for (list = *list_ptr;
809ffe0d
ILT		 3154 symbol_get_tc (list)->next != (symbolS *) NULL;
3155 list = symbol_get_tc (list)->next)
252b5132 3156 ;
809ffe0d 3157 symbol_get_tc (list)->next = sym;
81d4177b 3158
252b5132 3159 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3160 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3161 &symbol_lastP);
252b5132
RH		 3162 }
3163
3164 ppc_current_csect = sym;
3165}
3166
3167/* This function handles the .text and .data pseudo-ops. These
3168 pseudo-ops aren't really used by XCOFF; we implement them for the
3169 convenience of people who aren't used to XCOFF. */
3170
3171static void
3172ppc_section (type)
3173 int type;
3174{
3175 const char *name;
3176 symbolS *sym;
3177
3178 if (type == 't')
3179 name = ".text[PR]";
3180 else if (type == 'd')
3181 name = ".data[RW]";
3182 else
3183 abort ();
3184
3185 sym = symbol_find_or_make (name);
3186
931e13a6 3187 ppc_change_csect (sym, 2);
252b5132
RH		 3188
3189 demand_empty_rest_of_line ();
3190}
3191
3192/* This function handles the .section pseudo-op. This is mostly to
3193 give an error, since XCOFF only supports .text, .data and .bss, but
3194 we do permit the user to name the text or data section. */
3195
3196static void
3197ppc_named_section (ignore)
5480ccf3 3198 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3199{
3200 char *user_name;
3201 const char *real_name;
3202 char c;
3203 symbolS *sym;
3204
3205 user_name = input_line_pointer;
3206 c = get_symbol_end ();
3207
3208 if (strcmp (user_name, ".text") == 0)
3209 real_name = ".text[PR]";
3210 else if (strcmp (user_name, ".data") == 0)
3211 real_name = ".data[RW]";
3212 else
3213 {
3214 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3215 *input_line_pointer = c;
3216 ignore_rest_of_line ();
3217 return;
3218 }
3219
3220 *input_line_pointer = c;
3221
3222 sym = symbol_find_or_make (real_name);
3223
931e13a6 3224 ppc_change_csect (sym, 2);
252b5132
RH		 3225
3226 demand_empty_rest_of_line ();
3227}
3228
3229/* The .extern pseudo-op. We create an undefined symbol. */
3230
3231static void
3232ppc_extern (ignore)
5480ccf3 3233 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3234{
3235 char *name;
3236 char endc;
3237
3238 name = input_line_pointer;
3239 endc = get_symbol_end ();
3240
3241 (void) symbol_find_or_make (name);
3242
3243 *input_line_pointer = endc;
3244
3245 demand_empty_rest_of_line ();
3246}
3247
3248/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3249
3250static void
3251ppc_lglobl (ignore)
5480ccf3 3252 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3253{
3254 char *name;
3255 char endc;
3256 symbolS *sym;
3257
3258 name = input_line_pointer;
3259 endc = get_symbol_end ();
3260
3261 sym = symbol_find_or_make (name);
3262
3263 *input_line_pointer = endc;
3264
809ffe0d 3265 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3266
3267 demand_empty_rest_of_line ();
3268}
3269
3270/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3271 although I don't know why it bothers. */
3272
3273static void
3274ppc_rename (ignore)
5480ccf3 3275 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3276{
3277 char *name;
3278 char endc;
3279 symbolS *sym;
3280 int len;
3281
3282 name = input_line_pointer;
3283 endc = get_symbol_end ();
3284
3285 sym = symbol_find_or_make (name);
3286
3287 *input_line_pointer = endc;
3288
3289 if (*input_line_pointer != ',')
3290 {
3291 as_bad (_("missing rename string"));
3292 ignore_rest_of_line ();
3293 return;
3294 }
3295 ++input_line_pointer;
3296
809ffe0d 3297 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 3298
3299 demand_empty_rest_of_line ();
3300}
3301
3302/* The .stabx pseudo-op. This is similar to a normal .stabs
3303 pseudo-op, but slightly different. A sample is
3304 .stabx "main:F-1",.main,142,0
3305 The first argument is the symbol name to create. The second is the
3306 value, and the third is the storage class. The fourth seems to be
3307 always zero, and I am assuming it is the type. */
3308
3309static void
3310ppc_stabx (ignore)
5480ccf3 3311 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3312{
3313 char *name;
3314 int len;
3315 symbolS *sym;
3316 expressionS exp;
3317
3318 name = demand_copy_C_string (&len);
3319
3320 if (*input_line_pointer != ',')
3321 {
3322 as_bad (_("missing value"));
3323 return;
3324 }
3325 ++input_line_pointer;
3326
b34976b6 3327 ppc_stab_symbol = TRUE;
252b5132 3328 sym = symbol_make (name);
b34976b6 3329 ppc_stab_symbol = FALSE;
252b5132 3330
809ffe0d 3331 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 3332
3333 (void) expression (&exp);
3334
3335 switch (exp.X_op)
3336 {
3337 case O_illegal:
3338 case O_absent:
3339 case O_big:
3340 as_bad (_("illegal .stabx expression; zero assumed"));
3341 exp.X_add_number = 0;
3342 /* Fall through. */
3343 case O_constant:
3344 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 3345 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 3346 break;
3347
3348 case O_symbol:
3349 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 3350 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3351 else
3352 {
3353 S_SET_VALUE (sym,
3354 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 3355 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 3356 }
3357 break;
3358
3359 default:
3360 /* The value is some complex expression. This will probably
99a814a1
AM		 3361 fail at some later point, but this is probably the right
3362 thing to do here. */
809ffe0d 3363 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3364 break;
3365 }
3366
3367 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3368 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3369
3370 if (*input_line_pointer != ',')
3371 {
3372 as_bad (_("missing class"));
3373 return;
3374 }
3375 ++input_line_pointer;
3376
3377 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3378
3379 if (*input_line_pointer != ',')
3380 {
3381 as_bad (_("missing type"));
3382 return;
3383 }
3384 ++input_line_pointer;
3385
3386 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3387
809ffe0d 3388 symbol_get_tc (sym)->output = 1;
252b5132 3389
6877bb43 3390 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
99a814a1 3391
809ffe0d 3392 symbol_get_tc (sym)->within = ppc_current_block;
252b5132 3393
41ea10b1 3394 /* In this case :
99a814a1 3395
41ea10b1
TR		 3396 .bs name
3397 .stabx "z",arrays_,133,0
3398 .es
99a814a1 3399
41ea10b1 3400 .comm arrays_,13768,3
99a814a1 3401
41ea10b1
TR		 3402 resolve_symbol_value will copy the exp's "within" into sym's when the
3403 offset is 0. Since this seems to be corner case problem,
3404 only do the correction for storage class C_STSYM. A better solution
0baf16f2 3405 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1
AM		 3406
3407 if (exp.X_op == O_symbol)
41ea10b1
TR		 3408 {
3409 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3410 }
6877bb43 3411 }
99a814a1 3412
252b5132
RH		 3413 if (exp.X_op != O_symbol
3414 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3415 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3416 ppc_frob_label (sym);
3417 else
3418 {
3419 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3420 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3421 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3422 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 3423 }
3424
3425 demand_empty_rest_of_line ();
3426}
3427
3428/* The .function pseudo-op. This takes several arguments. The first
3429 argument seems to be the external name of the symbol. The second
67c1ffbe 3430 argument seems to be the label for the start of the function. gcc
252b5132
RH		 3431 uses the same name for both. I have no idea what the third and
3432 fourth arguments are meant to be. The optional fifth argument is
3433 an expression for the size of the function. In COFF this symbol
3434 gets an aux entry like that used for a csect. */
3435
3436static void
3437ppc_function (ignore)
5480ccf3 3438 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3439{
3440 char *name;
3441 char endc;
3442 char *s;
3443 symbolS *ext_sym;
3444 symbolS *lab_sym;
3445
3446 name = input_line_pointer;
3447 endc = get_symbol_end ();
3448
3449 /* Ignore any [PR] suffix. */
3450 name = ppc_canonicalize_symbol_name (name);
3451 s = strchr (name, '[');
3452 if (s != (char *) NULL
3453 && strcmp (s + 1, "PR]") == 0)
3454 *s = '\0';
3455
3456 ext_sym = symbol_find_or_make (name);
3457
3458 *input_line_pointer = endc;
3459
3460 if (*input_line_pointer != ',')
3461 {
3462 as_bad (_("missing symbol name"));
3463 ignore_rest_of_line ();
3464 return;
3465 }
3466 ++input_line_pointer;
3467
3468 name = input_line_pointer;
3469 endc = get_symbol_end ();
3470
3471 lab_sym = symbol_find_or_make (name);
3472
3473 *input_line_pointer = endc;
3474
3475 if (ext_sym != lab_sym)
3476 {
809ffe0d
ILT		 3477 expressionS exp;
3478
3479 exp.X_op = O_symbol;
3480 exp.X_add_symbol = lab_sym;
3481 exp.X_op_symbol = NULL;
3482 exp.X_add_number = 0;
3483 exp.X_unsigned = 0;
3484 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 3485 }
3486
809ffe0d
ILT		 3487 if (symbol_get_tc (ext_sym)->class == -1)
3488 symbol_get_tc (ext_sym)->class = XMC_PR;
3489 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 3490
3491 if (*input_line_pointer == ',')
3492 {
3493 expressionS ignore;
3494
3495 /* Ignore the third argument. */
3496 ++input_line_pointer;
3497 expression (&ignore);
3498 if (*input_line_pointer == ',')
3499 {
3500 /* Ignore the fourth argument. */
3501 ++input_line_pointer;
3502 expression (&ignore);
3503 if (*input_line_pointer == ',')
3504 {
3505 /* The fifth argument is the function size. */
3506 ++input_line_pointer;
809ffe0d
ILT		 3507 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
3508 absolute_section,
3509 (valueT) 0,
3510 &zero_address_frag);
3511 pseudo_set (symbol_get_tc (ext_sym)->size);
252b5132
RH		 3512 }
3513 }
3514 }
3515
3516 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
3517 SF_SET_FUNCTION (ext_sym);
3518 SF_SET_PROCESS (ext_sym);
3519 coff_add_linesym (ext_sym);
3520
3521 demand_empty_rest_of_line ();
3522}
3523
3524/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 3525 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
3526 with the correct line number */
5d6255fe 3527
8642cce8 3528static symbolS *saved_bi_sym = 0;
252b5132
RH		 3529
3530static void
3531ppc_bf (ignore)
5480ccf3 3532 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3533{
3534 symbolS *sym;
3535
3536 sym = symbol_make (".bf");
3537 S_SET_SEGMENT (sym, text_section);
809ffe0d 3538 symbol_set_frag (sym, frag_now);
252b5132
RH		 3539 S_SET_VALUE (sym, frag_now_fix ());
3540 S_SET_STORAGE_CLASS (sym, C_FCN);
3541
3542 coff_line_base = get_absolute_expression ();
3543
3544 S_SET_NUMBER_AUXILIARY (sym, 1);
3545 SA_SET_SYM_LNNO (sym, coff_line_base);
3546
8642cce8 3547 /* Line number for bi. */
5d6255fe 3548 if (saved_bi_sym)
8642cce8
TR		 3549 {
3550 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
3551 saved_bi_sym = 0;
3552 }
5d6255fe 3553
8642cce8 3554
809ffe0d 3555 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3556
3557 ppc_frob_label (sym);
3558
3559 demand_empty_rest_of_line ();
3560}
3561
3562/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
3563 ".ef", except that the line number is absolute, not relative to the
3564 most recent ".bf" symbol. */
3565
3566static void
3567ppc_ef (ignore)
5480ccf3 3568 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3569{
3570 symbolS *sym;
3571
3572 sym = symbol_make (".ef");
3573 S_SET_SEGMENT (sym, text_section);
809ffe0d 3574 symbol_set_frag (sym, frag_now);
252b5132
RH		 3575 S_SET_VALUE (sym, frag_now_fix ());
3576 S_SET_STORAGE_CLASS (sym, C_FCN);
3577 S_SET_NUMBER_AUXILIARY (sym, 1);
3578 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3579 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3580
3581 ppc_frob_label (sym);
3582
3583 demand_empty_rest_of_line ();
3584}
3585
3586/* The .bi and .ei pseudo-ops. These take a string argument and
3587 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 3588 the symbol list. The value of .bi will be know when the next .bf
3589 is encountered. */
252b5132
RH		 3590
3591static void
3592ppc_biei (ei)
3593 int ei;
3594{
3595 static symbolS *last_biei;
3596
3597 char *name;
3598 int len;
3599 symbolS *sym;
3600 symbolS *look;
3601
3602 name = demand_copy_C_string (&len);
3603
3604 /* The value of these symbols is actually file offset. Here we set
3605 the value to the index into the line number entries. In
3606 ppc_frob_symbols we set the fix_line field, which will cause BFD
3607 to do the right thing. */
3608
3609 sym = symbol_make (name);
3610 /* obj-coff.c currently only handles line numbers correctly in the
3611 .text section. */
3612 S_SET_SEGMENT (sym, text_section);
3613 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 3614 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3615
3616 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 3617 symbol_get_tc (sym)->output = 1;
81d4177b 3618
8642cce8 3619 /* Save bi. */
5d6255fe 3620 if (ei)
8642cce8
TR		 3621 saved_bi_sym = 0;
3622 else
3623 saved_bi_sym = sym;
3624
252b5132
RH		 3625 for (look = last_biei ? last_biei : symbol_rootP;
3626 (look != (symbolS *) NULL
3627 && (S_GET_STORAGE_CLASS (look) == C_FILE
3628 || S_GET_STORAGE_CLASS (look) == C_BINCL
3629 || S_GET_STORAGE_CLASS (look) == C_EINCL));
3630 look = symbol_next (look))
3631 ;
3632 if (look != (symbolS *) NULL)
3633 {
3634 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3635 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
3636 last_biei = sym;
3637 }
3638
3639 demand_empty_rest_of_line ();
3640}
3641
3642/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
3643 There is one argument, which is a csect symbol. The value of the
3644 .bs symbol is the index of this csect symbol. */
3645
3646static void
3647ppc_bs (ignore)
5480ccf3 3648 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3649{
3650 char *name;
3651 char endc;
3652 symbolS *csect;
3653 symbolS *sym;
3654
3655 if (ppc_current_block != NULL)
3656 as_bad (_("nested .bs blocks"));
3657
3658 name = input_line_pointer;
3659 endc = get_symbol_end ();
3660
3661 csect = symbol_find_or_make (name);
3662
3663 *input_line_pointer = endc;
3664
3665 sym = symbol_make (".bs");
3666 S_SET_SEGMENT (sym, now_seg);
3667 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 3668 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3669 symbol_get_tc (sym)->output = 1;
252b5132 3670
809ffe0d 3671 symbol_get_tc (sym)->within = csect;
252b5132
RH		 3672
3673 ppc_frob_label (sym);
3674
3675 ppc_current_block = sym;
3676
3677 demand_empty_rest_of_line ();
3678}
3679
3680/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
3681
3682static void
3683ppc_es (ignore)
5480ccf3 3684 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3685{
3686 symbolS *sym;
3687
3688 if (ppc_current_block == NULL)
3689 as_bad (_(".es without preceding .bs"));
3690
3691 sym = symbol_make (".es");
3692 S_SET_SEGMENT (sym, now_seg);
3693 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 3694 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3695 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3696
3697 ppc_frob_label (sym);
3698
3699 ppc_current_block = NULL;
3700
3701 demand_empty_rest_of_line ();
3702}
3703
3704/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
3705 line number. */
3706
3707static void
3708ppc_bb (ignore)
5480ccf3 3709 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3710{
3711 symbolS *sym;
3712
3713 sym = symbol_make (".bb");
3714 S_SET_SEGMENT (sym, text_section);
809ffe0d 3715 symbol_set_frag (sym, frag_now);
252b5132
RH		 3716 S_SET_VALUE (sym, frag_now_fix ());
3717 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3718
3719 S_SET_NUMBER_AUXILIARY (sym, 1);
3720 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
3721
809ffe0d 3722 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3723
3724 SF_SET_PROCESS (sym);
3725
3726 ppc_frob_label (sym);
3727
3728 demand_empty_rest_of_line ();
3729}
3730
3731/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
3732 line number. */
3733
3734static void
3735ppc_eb (ignore)
5480ccf3 3736 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3737{
3738 symbolS *sym;
3739
3740 sym = symbol_make (".eb");
3741 S_SET_SEGMENT (sym, text_section);
809ffe0d 3742 symbol_set_frag (sym, frag_now);
252b5132
RH		 3743 S_SET_VALUE (sym, frag_now_fix ());
3744 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3745 S_SET_NUMBER_AUXILIARY (sym, 1);
3746 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3747 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3748
3749 SF_SET_PROCESS (sym);
3750
3751 ppc_frob_label (sym);
3752
3753 demand_empty_rest_of_line ();
3754}
3755
3756/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
3757 specified name. */
3758
3759static void
3760ppc_bc (ignore)
5480ccf3 3761 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3762{
3763 char *name;
3764 int len;
3765 symbolS *sym;
3766
3767 name = demand_copy_C_string (&len);
3768 sym = symbol_make (name);
3769 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3770 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3771 S_SET_STORAGE_CLASS (sym, C_BCOMM);
3772 S_SET_VALUE (sym, 0);
809ffe0d 3773 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3774
3775 ppc_frob_label (sym);
3776
3777 demand_empty_rest_of_line ();
3778}
3779
3780/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
3781
3782static void
3783ppc_ec (ignore)
5480ccf3 3784 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3785{
3786 symbolS *sym;
3787
3788 sym = symbol_make (".ec");
3789 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3790 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3791 S_SET_STORAGE_CLASS (sym, C_ECOMM);
3792 S_SET_VALUE (sym, 0);
809ffe0d 3793 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3794
3795 ppc_frob_label (sym);
3796
3797 demand_empty_rest_of_line ();
3798}
3799
3800/* The .toc pseudo-op. Switch to the .toc subsegment. */
3801
3802static void
3803ppc_toc (ignore)
5480ccf3 3804 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3805{
3806 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 3807 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 3808 else
3809 {
3810 subsegT subseg;
3811 symbolS *sym;
3812 symbolS *list;
81d4177b 3813
252b5132
RH		 3814 subseg = ppc_data_subsegment;
3815 ++ppc_data_subsegment;
3816
3817 subseg_new (segment_name (data_section), subseg);
3818 ppc_toc_frag = frag_now;
3819
3820 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 3821 symbol_set_frag (sym, frag_now);
252b5132
RH		 3822 S_SET_SEGMENT (sym, data_section);
3823 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 3824 symbol_get_tc (sym)->subseg = subseg;
3825 symbol_get_tc (sym)->output = 1;
3826 symbol_get_tc (sym)->within = sym;
252b5132
RH		 3827
3828 ppc_toc_csect = sym;
81d4177b 3829
252b5132 3830 for (list = ppc_data_csects;
809ffe0d
ILT		 3831 symbol_get_tc (list)->next != (symbolS *) NULL;
3832 list = symbol_get_tc (list)->next)
252b5132 3833 ;
809ffe0d 3834 symbol_get_tc (list)->next = sym;
252b5132
RH		 3835
3836 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3837 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3838 &symbol_lastP);
252b5132
RH		 3839 }
3840
3841 ppc_current_csect = ppc_toc_csect;
3842
3843 demand_empty_rest_of_line ();
3844}
3845
3846/* The AIX assembler automatically aligns the operands of a .long or
3847 .short pseudo-op, and we want to be compatible. */
3848
3849static void
3850ppc_xcoff_cons (log_size)
3851 int log_size;
3852{
3853 frag_align (log_size, 0, 0);
3854 record_alignment (now_seg, log_size);
3855 cons (1 << log_size);
3856}
3857
3858static void
3859ppc_vbyte (dummy)
5480ccf3 3860 int dummy ATTRIBUTE_UNUSED;
252b5132
RH		 3861{
3862 expressionS exp;
3863 int byte_count;
3864
3865 (void) expression (&exp);
3866
3867 if (exp.X_op != O_constant)
3868 {
3869 as_bad (_("non-constant byte count"));
3870 return;
3871 }
3872
3873 byte_count = exp.X_add_number;
3874
3875 if (*input_line_pointer != ',')
3876 {
3877 as_bad (_("missing value"));
3878 return;
3879 }
3880
3881 ++input_line_pointer;
3882 cons (byte_count);
3883}
3884
3885#endif /* OBJ_XCOFF */
0baf16f2 3886#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 3887\f
3888/* The .tc pseudo-op. This is used when generating either XCOFF or
3889 ELF. This takes two or more arguments.
3890
3891 When generating XCOFF output, the first argument is the name to
3892 give to this location in the toc; this will be a symbol with class
0baf16f2 3893 TC. The rest of the arguments are N-byte values to actually put at
252b5132 3894 this location in the TOC; often there is just one more argument, a
1049f94e 3895 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 3896 depends on target word size. A 32-bit target uses 4-byte values, a
3897 64-bit target uses 8-byte values.
252b5132
RH		 3898
3899 When not generating XCOFF output, the arguments are the same, but
3900 the first argument is simply ignored. */
3901
3902static void
3903ppc_tc (ignore)
92161534 3904 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3905{
3906#ifdef OBJ_XCOFF
3907
3908 /* Define the TOC symbol name. */
3909 {
3910 char *name;
3911 char endc;
3912 symbolS *sym;
3913
3914 if (ppc_toc_csect == (symbolS *) NULL
3915 || ppc_toc_csect != ppc_current_csect)
3916 {
3917 as_bad (_(".tc not in .toc section"));
3918 ignore_rest_of_line ();
3919 return;
3920 }
3921
3922 name = input_line_pointer;
3923 endc = get_symbol_end ();
3924
3925 sym = symbol_find_or_make (name);
3926
3927 *input_line_pointer = endc;
3928
3929 if (S_IS_DEFINED (sym))
3930 {
3931 symbolS *label;
3932
809ffe0d
ILT		 3933 label = symbol_get_tc (ppc_current_csect)->within;
3934 if (symbol_get_tc (label)->class != XMC_TC0)
252b5132
RH		 3935 {
3936 as_bad (_(".tc with no label"));
3937 ignore_rest_of_line ();
3938 return;
3939 }
3940
3941 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 3942 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 3943 S_SET_VALUE (label, S_GET_VALUE (sym));
3944
3945 while (! is_end_of_line[(unsigned char) *input_line_pointer])
3946 ++input_line_pointer;
3947
3948 return;
3949 }
3950
3951 S_SET_SEGMENT (sym, now_seg);
809ffe0d 3952 symbol_set_frag (sym, frag_now);
252b5132 3953 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 3954 symbol_get_tc (sym)->class = XMC_TC;
3955 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3956
3957 ppc_frob_label (sym);
3958 }
3959
0baf16f2
AM		 3960#endif /* OBJ_XCOFF */
3961#ifdef OBJ_ELF
9c7977b3 3962 int align;
252b5132
RH		 3963
3964 /* Skip the TOC symbol name. */
3965 while (is_part_of_name (*input_line_pointer)
3966 || *input_line_pointer == '['
3967 || *input_line_pointer == ']'
3968 || *input_line_pointer == '{'
3969 || *input_line_pointer == '}')
3970 ++input_line_pointer;
3971
0baf16f2 3972 /* Align to a four/eight byte boundary. */
2b3c4602 3973 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 3974 frag_align (align, 0, 0);
3975 record_alignment (now_seg, align);
0baf16f2 3976#endif /* OBJ_ELF */
252b5132
RH		 3977
3978 if (*input_line_pointer != ',')
3979 demand_empty_rest_of_line ();
3980 else
3981 {
3982 ++input_line_pointer;
2b3c4602 3983 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 3984 }
3985}
0baf16f2
AM		 3986
3987/* Pseudo-op .machine. */
0baf16f2
AM		 3988
3989static void
3990ppc_machine (ignore)
3991 int ignore ATTRIBUTE_UNUSED;
3992{
69c040df
AM		 3993 char *cpu_string;
3994#define MAX_HISTORY 100
3995 static unsigned long *cpu_history;
3996 static int curr_hist;
3997
3998 SKIP_WHITESPACE ();
3999
4000 if (*input_line_pointer == '"')
4001 {
4002 int len;
4003 cpu_string = demand_copy_C_string (&len);
4004 }
4005 else
4006 {
4007 char c;
4008 cpu_string = input_line_pointer;
4009 c = get_symbol_end ();
4010 cpu_string = xstrdup (cpu_string);
4011 *input_line_pointer = c;
4012 }
4013
4014 if (cpu_string != NULL)
4015 {
4016 unsigned long old_cpu = ppc_cpu;
4017 char *p;
4018
4019 for (p = cpu_string; *p != 0; p++)
4020 *p = TOLOWER (*p);
4021
4022 if (strcmp (cpu_string, "push") == 0)
4023 {
4024 if (cpu_history == NULL)
4025 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4026
4027 if (curr_hist >= MAX_HISTORY)
4028 as_bad (_(".machine stack overflow"));
4029 else
4030 cpu_history[curr_hist++] = ppc_cpu;
4031 }
4032 else if (strcmp (cpu_string, "pop") == 0)
4033 {
4034 if (curr_hist <= 0)
4035 as_bad (_(".machine stack underflow"));
4036 else
4037 ppc_cpu = cpu_history[--curr_hist];
4038 }
4039 else if (parse_cpu (cpu_string))
4040 ;
4041 else
4042 as_bad (_("invalid machine `%s'"), cpu_string);
4043
4044 if (ppc_cpu != old_cpu)
4045 ppc_setup_opcodes ();
4046 }
4047
4048 demand_empty_rest_of_line ();
0baf16f2
AM		 4049}
4050
4051/* See whether a symbol is in the TOC section. */
4052
4053static int
4054ppc_is_toc_sym (sym)
4055 symbolS *sym;
4056{
4057#ifdef OBJ_XCOFF
4058 return symbol_get_tc (sym)->class == XMC_TC;
4059#endif
4060#ifdef OBJ_ELF
4061 const char *sname = segment_name (S_GET_SEGMENT (sym));
2b3c4602 4062 if (ppc_obj64)
0baf16f2
AM		 4063 return strcmp (sname, ".toc") == 0;
4064 else
4065 return strcmp (sname, ".got") == 0;
4066#endif
4067}
4068#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 4069\f
4070#ifdef TE_PE
4071
99a814a1 4072/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 4073
4074/* Set the current section. */
4075static void
4076ppc_set_current_section (new)
4077 segT new;
4078{
4079 ppc_previous_section = ppc_current_section;
4080 ppc_current_section = new;
4081}
4082
4083/* pseudo-op: .previous
4084 behaviour: toggles the current section with the previous section.
4085 errors: None
99a814a1
AM		 4086 warnings: "No previous section" */
4087
252b5132 4088static void
99a814a1 4089ppc_previous (ignore)
5480ccf3 4090 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4091{
4092 symbolS *tmp;
4093
81d4177b 4094 if (ppc_previous_section == NULL)
252b5132 4095 {
99a814a1 4096 as_warn (_("No previous section to return to. Directive ignored."));
252b5132
RH		 4097 return;
4098 }
4099
99a814a1 4100 subseg_set (ppc_previous_section, 0);
252b5132 4101
99a814a1 4102 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 4103}
4104
4105/* pseudo-op: .pdata
4106 behaviour: predefined read only data section
b34976b6 4107 double word aligned
252b5132
RH		 4108 errors: None
4109 warnings: None
4110 initial: .section .pdata "adr3"
b34976b6 4111 a - don't know -- maybe a misprint
252b5132
RH		 4112 d - initialized data
4113 r - readable
4114 3 - double word aligned (that would be 4 byte boundary)
4115
4116 commentary:
4117 Tag index tables (also known as the function table) for exception
99a814a1 4118 handling, debugging, etc. */
252b5132 4119
252b5132 4120static void
99a814a1 4121ppc_pdata (ignore)
5480ccf3 4122 int ignore ATTRIBUTE_UNUSED;
252b5132 4123{
81d4177b 4124 if (pdata_section == 0)
252b5132
RH		 4125 {
4126 pdata_section = subseg_new (".pdata", 0);
81d4177b 4127
252b5132
RH		 4128 bfd_set_section_flags (stdoutput, pdata_section,
4129 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4130 | SEC_READONLY | SEC_DATA ));
81d4177b 4131
252b5132
RH		 4132 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4133 }
4134 else
4135 {
99a814a1 4136 pdata_section = subseg_new (".pdata", 0);
252b5132 4137 }
99a814a1 4138 ppc_set_current_section (pdata_section);
252b5132
RH		 4139}
4140
4141/* pseudo-op: .ydata
4142 behaviour: predefined read only data section
b34976b6 4143 double word aligned
252b5132
RH		 4144 errors: None
4145 warnings: None
4146 initial: .section .ydata "drw3"
b34976b6 4147 a - don't know -- maybe a misprint
252b5132
RH		 4148 d - initialized data
4149 r - readable
4150 3 - double word aligned (that would be 4 byte boundary)
4151 commentary:
4152 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 4153 debugging, etc. */
4154
252b5132 4155static void
99a814a1 4156ppc_ydata (ignore)
5480ccf3 4157 int ignore ATTRIBUTE_UNUSED;
252b5132 4158{
81d4177b 4159 if (ydata_section == 0)
252b5132
RH		 4160 {
4161 ydata_section = subseg_new (".ydata", 0);
4162 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 4163 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4164 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 4165
4166 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4167 }
4168 else
4169 {
4170 ydata_section = subseg_new (".ydata", 0);
4171 }
99a814a1 4172 ppc_set_current_section (ydata_section);
252b5132
RH		 4173}
4174
4175/* pseudo-op: .reldata
4176 behaviour: predefined read write data section
b34976b6 4177 double word aligned (4-byte)
252b5132
RH		 4178 FIXME: relocation is applied to it
4179 FIXME: what's the difference between this and .data?
4180 errors: None
4181 warnings: None
4182 initial: .section .reldata "drw3"
4183 d - initialized data
4184 r - readable
4185 w - writeable
4186 3 - double word aligned (that would be 8 byte boundary)
4187
4188 commentary:
4189 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 4190 function descriptors, etc. */
4191
252b5132 4192static void
99a814a1 4193ppc_reldata (ignore)
5480ccf3 4194 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4195{
4196 if (reldata_section == 0)
4197 {
4198 reldata_section = subseg_new (".reldata", 0);
4199
4200 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 4201 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4202 | SEC_DATA));
252b5132
RH		 4203
4204 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4205 }
4206 else
4207 {
4208 reldata_section = subseg_new (".reldata", 0);
4209 }
99a814a1 4210 ppc_set_current_section (reldata_section);
252b5132
RH		 4211}
4212
4213/* pseudo-op: .rdata
4214 behaviour: predefined read only data section
b34976b6 4215 double word aligned
252b5132
RH		 4216 errors: None
4217 warnings: None
4218 initial: .section .rdata "dr3"
4219 d - initialized data
4220 r - readable
99a814a1
AM		 4221 3 - double word aligned (that would be 4 byte boundary) */
4222
252b5132 4223static void
99a814a1 4224ppc_rdata (ignore)
5480ccf3 4225 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4226{
4227 if (rdata_section == 0)
4228 {
4229 rdata_section = subseg_new (".rdata", 0);
4230 bfd_set_section_flags (stdoutput, rdata_section,
4231 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4232 | SEC_READONLY | SEC_DATA ));
4233
4234 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4235 }
4236 else
4237 {
4238 rdata_section = subseg_new (".rdata", 0);
4239 }
99a814a1 4240 ppc_set_current_section (rdata_section);
252b5132
RH		 4241}
4242
4243/* pseudo-op: .ualong
81d4177b 4244 behaviour: much like .int, with the exception that no alignment is
b34976b6 4245 performed.
252b5132
RH		 4246 FIXME: test the alignment statement
4247 errors: None
99a814a1
AM		 4248 warnings: None */
4249
252b5132 4250static void
99a814a1 4251ppc_ualong (ignore)
5480ccf3 4252 int ignore ATTRIBUTE_UNUSED;
252b5132 4253{
99a814a1
AM		 4254 /* Try for long. */
4255 cons (4);
252b5132
RH		 4256}
4257
4258/* pseudo-op: .znop <symbol name>
4259 behaviour: Issue a nop instruction
b34976b6 4260 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 4261 the supplied symbol name.
4262 errors: None
99a814a1
AM		 4263 warnings: Missing symbol name */
4264
252b5132 4265static void
99a814a1 4266ppc_znop (ignore)
5480ccf3 4267 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4268{
4269 unsigned long insn;
4270 const struct powerpc_opcode *opcode;
4271 expressionS ex;
4272 char *f;
252b5132 4273 symbolS *sym;
252b5132
RH		 4274 char *symbol_name;
4275 char c;
4276 char *name;
4277 unsigned int exp;
4278 flagword flags;
4279 asection *sec;
4280
99a814a1 4281 /* Strip out the symbol name. */
252b5132
RH		 4282 symbol_name = input_line_pointer;
4283 c = get_symbol_end ();
4284
4285 name = xmalloc (input_line_pointer - symbol_name + 1);
4286 strcpy (name, symbol_name);
4287
4288 sym = symbol_find_or_make (name);
4289
4290 *input_line_pointer = c;
4291
4292 SKIP_WHITESPACE ();
4293
4294 /* Look up the opcode in the hash table. */
4295 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4296
99a814a1 4297 /* Stick in the nop. */
252b5132
RH		 4298 insn = opcode->opcode;
4299
4300 /* Write out the instruction. */
4301 f = frag_more (4);
4302 md_number_to_chars (f, insn, 4);
4303 fix_new (frag_now,
4304 f - frag_now->fr_literal,
4305 4,
4306 sym,
4307 0,
4308 0,
4309 BFD_RELOC_16_GOT_PCREL);
4310
4311}
4312
81d4177b
KH		 4313/* pseudo-op:
4314 behaviour:
4315 errors:
99a814a1
AM		 4316 warnings: */
4317
252b5132 4318static void
99a814a1 4319ppc_pe_comm (lcomm)
252b5132
RH		 4320 int lcomm;
4321{
4322 register char *name;
4323 register char c;
4324 register char *p;
4325 offsetT temp;
4326 register symbolS *symbolP;
4327 offsetT align;
4328
4329 name = input_line_pointer;
4330 c = get_symbol_end ();
4331
99a814a1 4332 /* just after name is now '\0'. */
252b5132
RH		 4333 p = input_line_pointer;
4334 *p = c;
4335 SKIP_WHITESPACE ();
4336 if (*input_line_pointer != ',')
4337 {
4338 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4339 ignore_rest_of_line ();
4340 return;
4341 }
4342
4343 input_line_pointer++; /* skip ',' */
4344 if ((temp = get_absolute_expression ()) < 0)
4345 {
4346 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4347 ignore_rest_of_line ();
4348 return;
4349 }
4350
4351 if (! lcomm)
4352 {
4353 /* The third argument to .comm is the alignment. */
4354 if (*input_line_pointer != ',')
4355 align = 3;
4356 else
4357 {
4358 ++input_line_pointer;
4359 align = get_absolute_expression ();
4360 if (align <= 0)
4361 {
4362 as_warn (_("ignoring bad alignment"));
4363 align = 3;
4364 }
4365 }
4366 }
4367
4368 *p = 0;
4369 symbolP = symbol_find_or_make (name);
4370
4371 *p = c;
4372 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4373 {
4374 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4375 S_GET_NAME (symbolP));
4376 ignore_rest_of_line ();
4377 return;
4378 }
4379
4380 if (S_GET_VALUE (symbolP))
4381 {
4382 if (S_GET_VALUE (symbolP) != (valueT) temp)
4383 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4384 S_GET_NAME (symbolP),
4385 (long) S_GET_VALUE (symbolP),
4386 (long) temp);
4387 }
4388 else
4389 {
4390 S_SET_VALUE (symbolP, (valueT) temp);
4391 S_SET_EXTERNAL (symbolP);
4392 }
4393
4394 demand_empty_rest_of_line ();
4395}
4396
4397/*
4398 * implement the .section pseudo op:
4399 * .section name {, "flags"}
4400 * ^ ^
4401 * | +--- optional flags: 'b' for bss
4402 * | 'i' for info
4403 * +-- section name 'l' for lib
4404 * 'n' for noload
4405 * 'o' for over
4406 * 'w' for data
4407 * 'd' (apparently m88k for data)
4408 * 'x' for text
4409 * But if the argument is not a quoted string, treat it as a
4410 * subsegment number.
4411 *
4412 * FIXME: this is a copy of the section processing from obj-coff.c, with
4413 * additions/changes for the moto-pas assembler support. There are three
4414 * categories:
4415 *
81d4177b 4416 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 4417 * setting bits that bfd probably neither understands or uses. The
4418 * correct approach (?) will have to incorporate extra fields attached
4419 * to the section to hold the system specific stuff. (krk)
4420 *
4421 * Section Contents:
4422 * 'a' - unknown - referred to in documentation, but no definition supplied
4423 * 'c' - section has code
4424 * 'd' - section has initialized data
4425 * 'u' - section has uninitialized data
4426 * 'i' - section contains directives (info)
4427 * 'n' - section can be discarded
4428 * 'R' - remove section at link time
4429 *
4430 * Section Protection:
4431 * 'r' - section is readable
4432 * 'w' - section is writeable
4433 * 'x' - section is executable
4434 * 's' - section is sharable
4435 *
4436 * Section Alignment:
4437 * '0' - align to byte boundary
4438 * '1' - align to halfword undary
4439 * '2' - align to word boundary
4440 * '3' - align to doubleword boundary
4441 * '4' - align to quadword boundary
4442 * '5' - align to 32 byte boundary
4443 * '6' - align to 64 byte boundary
4444 *
4445 */
4446
4447void
4448ppc_pe_section (ignore)
5480ccf3 4449 int ignore ATTRIBUTE_UNUSED;
252b5132 4450{
99a814a1 4451 /* Strip out the section name. */
252b5132
RH		 4452 char *section_name;
4453 char c;
4454 char *name;
4455 unsigned int exp;
4456 flagword flags;
4457 segT sec;
4458 int align;
4459
4460 section_name = input_line_pointer;
4461 c = get_symbol_end ();
4462
4463 name = xmalloc (input_line_pointer - section_name + 1);
4464 strcpy (name, section_name);
4465
4466 *input_line_pointer = c;
4467
4468 SKIP_WHITESPACE ();
4469
4470 exp = 0;
4471 flags = SEC_NO_FLAGS;
4472
4473 if (strcmp (name, ".idata$2") == 0)
4474 {
4475 align = 0;
4476 }
4477 else if (strcmp (name, ".idata$3") == 0)
4478 {
4479 align = 0;
4480 }
4481 else if (strcmp (name, ".idata$4") == 0)
4482 {
4483 align = 2;
4484 }
4485 else if (strcmp (name, ".idata$5") == 0)
4486 {
4487 align = 2;
4488 }
4489 else if (strcmp (name, ".idata$6") == 0)
4490 {
4491 align = 1;
4492 }
4493 else
99a814a1
AM		 4494 /* Default alignment to 16 byte boundary. */
4495 align = 4;
252b5132
RH		 4496
4497 if (*input_line_pointer == ',')
4498 {
4499 ++input_line_pointer;
4500 SKIP_WHITESPACE ();
4501 if (*input_line_pointer != '"')
4502 exp = get_absolute_expression ();
4503 else
4504 {
4505 ++input_line_pointer;
4506 while (*input_line_pointer != '"'
4507 && ! is_end_of_line[(unsigned char) *input_line_pointer])
4508 {
4509 switch (*input_line_pointer)
4510 {
4511 /* Section Contents */
4512 case 'a': /* unknown */
4513 as_bad (_("Unsupported section attribute -- 'a'"));
4514 break;
4515 case 'c': /* code section */
81d4177b 4516 flags |= SEC_CODE;
252b5132
RH		 4517 break;
4518 case 'd': /* section has initialized data */
4519 flags |= SEC_DATA;
4520 break;
4521 case 'u': /* section has uninitialized data */
4522 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
4523 in winnt.h */
4524 flags |= SEC_ROM;
4525 break;
4526 case 'i': /* section contains directives (info) */
4527 /* FIXME: This is IMAGE_SCN_LNK_INFO
4528 in winnt.h */
4529 flags |= SEC_HAS_CONTENTS;
4530 break;
4531 case 'n': /* section can be discarded */
81d4177b 4532 flags &=~ SEC_LOAD;
252b5132
RH		 4533 break;
4534 case 'R': /* Remove section at link time */
4535 flags |= SEC_NEVER_LOAD;
4536 break;
4537
4538 /* Section Protection */
4539 case 'r': /* section is readable */
4540 flags |= IMAGE_SCN_MEM_READ;
4541 break;
4542 case 'w': /* section is writeable */
4543 flags |= IMAGE_SCN_MEM_WRITE;
4544 break;
4545 case 'x': /* section is executable */
4546 flags |= IMAGE_SCN_MEM_EXECUTE;
4547 break;
4548 case 's': /* section is sharable */
4549 flags |= IMAGE_SCN_MEM_SHARED;
4550 break;
4551
4552 /* Section Alignment */
4553 case '0': /* align to byte boundary */
4554 flags |= IMAGE_SCN_ALIGN_1BYTES;
4555 align = 0;
4556 break;
4557 case '1': /* align to halfword boundary */
4558 flags |= IMAGE_SCN_ALIGN_2BYTES;
4559 align = 1;
4560 break;
4561 case '2': /* align to word boundary */
4562 flags |= IMAGE_SCN_ALIGN_4BYTES;
4563 align = 2;
4564 break;
4565 case '3': /* align to doubleword boundary */
4566 flags |= IMAGE_SCN_ALIGN_8BYTES;
4567 align = 3;
4568 break;
4569 case '4': /* align to quadword boundary */
4570 flags |= IMAGE_SCN_ALIGN_16BYTES;
4571 align = 4;
4572 break;
4573 case '5': /* align to 32 byte boundary */
4574 flags |= IMAGE_SCN_ALIGN_32BYTES;
4575 align = 5;
4576 break;
4577 case '6': /* align to 64 byte boundary */
4578 flags |= IMAGE_SCN_ALIGN_64BYTES;
4579 align = 6;
4580 break;
4581
4582 default:
99a814a1
AM		 4583 as_bad (_("unknown section attribute '%c'"),
4584 *input_line_pointer);
252b5132
RH		 4585 break;
4586 }
4587 ++input_line_pointer;
4588 }
4589 if (*input_line_pointer == '"')
4590 ++input_line_pointer;
4591 }
4592 }
4593
4594 sec = subseg_new (name, (subsegT) exp);
4595
99a814a1 4596 ppc_set_current_section (sec);
252b5132
RH		 4597
4598 if (flags != SEC_NO_FLAGS)
4599 {
4600 if (! bfd_set_section_flags (stdoutput, sec, flags))
4601 as_bad (_("error setting flags for \"%s\": %s"),
4602 bfd_section_name (stdoutput, sec),
4603 bfd_errmsg (bfd_get_error ()));
4604 }
4605
99a814a1 4606 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 4607
4608}
4609
4610static void
4611ppc_pe_function (ignore)
5480ccf3 4612 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4613{
4614 char *name;
4615 char endc;
4616 symbolS *ext_sym;
4617
4618 name = input_line_pointer;
4619 endc = get_symbol_end ();
4620
4621 ext_sym = symbol_find_or_make (name);
4622
4623 *input_line_pointer = endc;
4624
4625 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4626 SF_SET_FUNCTION (ext_sym);
4627 SF_SET_PROCESS (ext_sym);
4628 coff_add_linesym (ext_sym);
4629
4630 demand_empty_rest_of_line ();
4631}
4632
4633static void
4634ppc_pe_tocd (ignore)
5480ccf3 4635 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4636{
4637 if (tocdata_section == 0)
4638 {
4639 tocdata_section = subseg_new (".tocd", 0);
99a814a1 4640 /* FIXME: section flags won't work. */
252b5132
RH		 4641 bfd_set_section_flags (stdoutput, tocdata_section,
4642 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 4643 | SEC_READONLY | SEC_DATA));
252b5132
RH		 4644
4645 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
4646 }
4647 else
4648 {
4649 rdata_section = subseg_new (".tocd", 0);
4650 }
4651
99a814a1 4652 ppc_set_current_section (tocdata_section);
252b5132
RH		 4653
4654 demand_empty_rest_of_line ();
4655}
4656
4657/* Don't adjust TOC relocs to use the section symbol. */
4658
4659int
4660ppc_pe_fix_adjustable (fix)
4661 fixS *fix;
4662{
4663 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
4664}
4665
4666#endif
4667\f
4668#ifdef OBJ_XCOFF
4669
4670/* XCOFF specific symbol and file handling. */
4671
4672/* Canonicalize the symbol name. We use the to force the suffix, if
4673 any, to use square brackets, and to be in upper case. */
4674
4675char *
4676ppc_canonicalize_symbol_name (name)
4677 char *name;
4678{
4679 char *s;
4680
4681 if (ppc_stab_symbol)
4682 return name;
4683
4684 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
4685 ;
4686 if (*s != '\0')
4687 {
4688 char brac;
4689
4690 if (*s == '[')
4691 brac = ']';
4692 else
4693 {
4694 *s = '[';
4695 brac = '}';
4696 }
4697
4698 for (s++; *s != '\0' && *s != brac; s++)
3882b010 4699 *s = TOUPPER (*s);
252b5132
RH		 4700
4701 if (*s == '\0' || s[1] != '\0')
4702 as_bad (_("bad symbol suffix"));
4703
4704 *s = ']';
4705 }
4706
4707 return name;
4708}
4709
4710/* Set the class of a symbol based on the suffix, if any. This is
4711 called whenever a new symbol is created. */
4712
4713void
4714ppc_symbol_new_hook (sym)
4715 symbolS *sym;
4716{
809ffe0d 4717 struct ppc_tc_sy *tc;
252b5132
RH		 4718 const char *s;
4719
809ffe0d
ILT		 4720 tc = symbol_get_tc (sym);
4721 tc->next = NULL;
4722 tc->output = 0;
4723 tc->class = -1;
4724 tc->real_name = NULL;
4725 tc->subseg = 0;
4726 tc->align = 0;
4727 tc->size = NULL;
4728 tc->within = NULL;
252b5132
RH		 4729
4730 if (ppc_stab_symbol)
4731 return;
4732
4733 s = strchr (S_GET_NAME (sym), '[');
4734 if (s == (const char *) NULL)
4735 {
4736 /* There is no suffix. */
4737 return;
4738 }
4739
4740 ++s;
4741
4742 switch (s[0])
4743 {
4744 case 'B':
4745 if (strcmp (s, "BS]") == 0)
809ffe0d 4746 tc->class = XMC_BS;
252b5132
RH		 4747 break;
4748 case 'D':
4749 if (strcmp (s, "DB]") == 0)
809ffe0d 4750 tc->class = XMC_DB;
252b5132 4751 else if (strcmp (s, "DS]") == 0)
809ffe0d 4752 tc->class = XMC_DS;
252b5132
RH		 4753 break;
4754 case 'G':
4755 if (strcmp (s, "GL]") == 0)
809ffe0d 4756 tc->class = XMC_GL;
252b5132
RH		 4757 break;
4758 case 'P':
4759 if (strcmp (s, "PR]") == 0)
809ffe0d 4760 tc->class = XMC_PR;
252b5132
RH		 4761 break;
4762 case 'R':
4763 if (strcmp (s, "RO]") == 0)
809ffe0d 4764 tc->class = XMC_RO;
252b5132 4765 else if (strcmp (s, "RW]") == 0)
809ffe0d 4766 tc->class = XMC_RW;
252b5132
RH		 4767 break;
4768 case 'S':
4769 if (strcmp (s, "SV]") == 0)
809ffe0d 4770 tc->class = XMC_SV;
252b5132
RH		 4771 break;
4772 case 'T':
4773 if (strcmp (s, "TC]") == 0)
809ffe0d 4774 tc->class = XMC_TC;
252b5132 4775 else if (strcmp (s, "TI]") == 0)
809ffe0d 4776 tc->class = XMC_TI;
252b5132 4777 else if (strcmp (s, "TB]") == 0)
809ffe0d 4778 tc->class = XMC_TB;
252b5132 4779 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
809ffe0d 4780 tc->class = XMC_TC0;
252b5132
RH		 4781 break;
4782 case 'U':
4783 if (strcmp (s, "UA]") == 0)
809ffe0d 4784 tc->class = XMC_UA;
252b5132 4785 else if (strcmp (s, "UC]") == 0)
809ffe0d 4786 tc->class = XMC_UC;
252b5132
RH		 4787 break;
4788 case 'X':
4789 if (strcmp (s, "XO]") == 0)
809ffe0d 4790 tc->class = XMC_XO;
252b5132
RH		 4791 break;
4792 }
4793
809ffe0d 4794 if (tc->class == -1)
252b5132
RH		 4795 as_bad (_("Unrecognized symbol suffix"));
4796}
4797
4798/* Set the class of a label based on where it is defined. This
4799 handles symbols without suffixes. Also, move the symbol so that it
4800 follows the csect symbol. */
4801
4802void
4803ppc_frob_label (sym)
4804 symbolS *sym;
4805{
4806 if (ppc_current_csect != (symbolS *) NULL)
4807 {
809ffe0d
ILT		 4808 if (symbol_get_tc (sym)->class == -1)
4809 symbol_get_tc (sym)->class = symbol_get_tc (ppc_current_csect)->class;
252b5132
RH		 4810
4811 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4812 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
4813 &symbol_rootP, &symbol_lastP);
4814 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 4815 }
4816}
4817
4818/* This variable is set by ppc_frob_symbol if any absolute symbols are
4819 seen. It tells ppc_adjust_symtab whether it needs to look through
4820 the symbols. */
4821
b34976b6 4822static bfd_boolean ppc_saw_abs;
252b5132
RH		 4823
4824/* Change the name of a symbol just before writing it out. Set the
4825 real name if the .rename pseudo-op was used. Otherwise, remove any
4826 class suffix. Return 1 if the symbol should not be included in the
4827 symbol table. */
4828
4829int
4830ppc_frob_symbol (sym)
4831 symbolS *sym;
4832{
4833 static symbolS *ppc_last_function;
4834 static symbolS *set_end;
4835
4836 /* Discard symbols that should not be included in the output symbol
4837 table. */
809ffe0d
ILT		 4838 if (! symbol_used_in_reloc_p (sym)
4839 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
252b5132 4840 || (! S_IS_EXTERNAL (sym)
809ffe0d 4841 && ! symbol_get_tc (sym)->output
252b5132
RH		 4842 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
4843 return 1;
4844
a161fe53
AM		 4845 /* This one will disappear anyway. Don't make a csect sym for it. */
4846 if (sym == abs_section_sym)
4847 return 1;
4848
809ffe0d
ILT		 4849 if (symbol_get_tc (sym)->real_name != (char *) NULL)
4850 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 4851 else
4852 {
4853 const char *name;
4854 const char *s;
4855
4856 name = S_GET_NAME (sym);
4857 s = strchr (name, '[');
4858 if (s != (char *) NULL)
4859 {
4860 unsigned int len;
4861 char *snew;
4862
4863 len = s - name;
4864 snew = xmalloc (len + 1);
4865 memcpy (snew, name, len);
4866 snew[len] = '\0';
4867
4868 S_SET_NAME (sym, snew);
4869 }
4870 }
4871
4872 if (set_end != (symbolS *) NULL)
4873 {
4874 SA_SET_SYM_ENDNDX (set_end, sym);
4875 set_end = NULL;
4876 }
4877
4878 if (SF_GET_FUNCTION (sym))
4879 {
4880 if (ppc_last_function != (symbolS *) NULL)
4881 as_bad (_("two .function pseudo-ops with no intervening .ef"));
4882 ppc_last_function = sym;
809ffe0d 4883 if (symbol_get_tc (sym)->size != (symbolS *) NULL)
252b5132 4884 {
6386f3a7 4885 resolve_symbol_value (symbol_get_tc (sym)->size);
809ffe0d
ILT		 4886 SA_SET_SYM_FSIZE (sym,
4887 (long) S_GET_VALUE (symbol_get_tc (sym)->size));
252b5132
RH		 4888 }
4889 }
4890 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
4891 && strcmp (S_GET_NAME (sym), ".ef") == 0)
4892 {
4893 if (ppc_last_function == (symbolS *) NULL)
4894 as_bad (_(".ef with no preceding .function"));
4895 else
4896 {
4897 set_end = ppc_last_function;
4898 ppc_last_function = NULL;
4899
4900 /* We don't have a C_EFCN symbol, but we need to force the
4901 COFF backend to believe that it has seen one. */
4902 coff_last_function = NULL;
4903 }
4904 }
4905
4906 if (! S_IS_EXTERNAL (sym)
809ffe0d 4907 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 4908 && S_GET_STORAGE_CLASS (sym) != C_FILE
4909 && S_GET_STORAGE_CLASS (sym) != C_FCN
4910 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
4911 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
4912 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
4913 && S_GET_STORAGE_CLASS (sym) != C_BINCL
4914 && S_GET_STORAGE_CLASS (sym) != C_EINCL
4915 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
4916 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
4917
4918 if (S_GET_STORAGE_CLASS (sym) == C_EXT
4919 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
4920 {
4921 int i;
4922 union internal_auxent *a;
4923
4924 /* Create a csect aux. */
4925 i = S_GET_NUMBER_AUXILIARY (sym);
4926 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d
ILT		 4927 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
4928 if (symbol_get_tc (sym)->class == XMC_TC0)
252b5132
RH		 4929 {
4930 /* This is the TOC table. */
4931 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
4932 a->x_csect.x_scnlen.l = 0;
4933 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
4934 }
809ffe0d 4935 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 4936 {
4937 /* This is a csect symbol. x_scnlen is the size of the
4938 csect. */
809ffe0d 4939 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 4940 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
4941 S_GET_SEGMENT (sym))
4942 - S_GET_VALUE (sym));
4943 else
4944 {
6386f3a7 4945 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 4946 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 4947 - S_GET_VALUE (sym));
4948 }
809ffe0d 4949 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 4950 }
4951 else if (S_GET_SEGMENT (sym) == bss_section)
4952 {
4953 /* This is a common symbol. */
809ffe0d
ILT		 4954 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
4955 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 4956 if (S_IS_EXTERNAL (sym))
809ffe0d 4957 symbol_get_tc (sym)->class = XMC_RW;
252b5132 4958 else
809ffe0d 4959 symbol_get_tc (sym)->class = XMC_BS;
252b5132
RH		 4960 }
4961 else if (S_GET_SEGMENT (sym) == absolute_section)
4962 {
4963 /* This is an absolute symbol. The csect will be created by
99a814a1 4964 ppc_adjust_symtab. */
b34976b6 4965 ppc_saw_abs = TRUE;
252b5132 4966 a->x_csect.x_smtyp = XTY_LD;
809ffe0d
ILT		 4967 if (symbol_get_tc (sym)->class == -1)
4968 symbol_get_tc (sym)->class = XMC_XO;
252b5132
RH		 4969 }
4970 else if (! S_IS_DEFINED (sym))
4971 {
4972 /* This is an external symbol. */
4973 a->x_csect.x_scnlen.l = 0;
4974 a->x_csect.x_smtyp = XTY_ER;
4975 }
809ffe0d 4976 else if (symbol_get_tc (sym)->class == XMC_TC)
252b5132
RH		 4977 {
4978 symbolS *next;
4979
4980 /* This is a TOC definition. x_scnlen is the size of the
4981 TOC entry. */
4982 next = symbol_next (sym);
809ffe0d 4983 while (symbol_get_tc (next)->class == XMC_TC0)
252b5132
RH		 4984 next = symbol_next (next);
4985 if (next == (symbolS *) NULL
809ffe0d 4986 || symbol_get_tc (next)->class != XMC_TC)
252b5132
RH		 4987 {
4988 if (ppc_after_toc_frag == (fragS *) NULL)
4989 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
4990 data_section)
4991 - S_GET_VALUE (sym));
4992 else
4993 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
4994 - S_GET_VALUE (sym));
4995 }
4996 else
4997 {
6386f3a7 4998 resolve_symbol_value (next);
252b5132
RH		 4999 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5000 - S_GET_VALUE (sym));
5001 }
5002 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5003 }
5004 else
5005 {
5006 symbolS *csect;
5007
5008 /* This is a normal symbol definition. x_scnlen is the
5009 symbol index of the containing csect. */
5010 if (S_GET_SEGMENT (sym) == text_section)
5011 csect = ppc_text_csects;
5012 else if (S_GET_SEGMENT (sym) == data_section)
5013 csect = ppc_data_csects;
5014 else
5015 abort ();
5016
5017 /* Skip the initial dummy symbol. */
809ffe0d 5018 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5019
5020 if (csect == (symbolS *) NULL)
5021 {
5022 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5023 a->x_csect.x_scnlen.l = 0;
5024 }
5025 else
5026 {
809ffe0d 5027 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5028 {
6386f3a7 5029 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5030 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5031 > S_GET_VALUE (sym))
252b5132 5032 break;
809ffe0d 5033 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5034 }
5035
809ffe0d
ILT		 5036 a->x_csect.x_scnlen.p =
5037 coffsymbol (symbol_get_bfdsym (csect))->native;
5038 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5039 1;
252b5132
RH		 5040 }
5041 a->x_csect.x_smtyp = XTY_LD;
5042 }
81d4177b 5043
252b5132
RH		 5044 a->x_csect.x_parmhash = 0;
5045 a->x_csect.x_snhash = 0;
809ffe0d 5046 if (symbol_get_tc (sym)->class == -1)
252b5132
RH		 5047 a->x_csect.x_smclas = XMC_PR;
5048 else
809ffe0d 5049 a->x_csect.x_smclas = symbol_get_tc (sym)->class;
252b5132
RH		 5050 a->x_csect.x_stab = 0;
5051 a->x_csect.x_snstab = 0;
5052
5053 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5054 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5055 }
5056 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5057 {
5058 /* We want the value to be the symbol index of the referenced
5059 csect symbol. BFD will do that for us if we set the right
5060 flags. */
b782de16
AM		 5061 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5062 combined_entry_type *c = coffsymbol (bsym)->native;
5063
5064 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5065 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5066 }
5067 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5068 {
5069 symbolS *block;
5070 symbolS *csect;
5071
5072 /* The value is the offset from the enclosing csect. */
809ffe0d
ILT		 5073 block = symbol_get_tc (sym)->within;
5074 csect = symbol_get_tc (block)->within;
6386f3a7 5075 resolve_symbol_value (csect);
252b5132
RH		 5076 S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
5077 }
5078 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5079 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5080 {
5081 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 5082 BFD will do that for us if we set the right flags. We have
5083 already set the value correctly. */
809ffe0d 5084 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 5085 }
5086
5087 return 0;
5088}
5089
5090/* Adjust the symbol table. This creates csect symbols for all
5091 absolute symbols. */
5092
5093void
5094ppc_adjust_symtab ()
5095{
5096 symbolS *sym;
5097
5098 if (! ppc_saw_abs)
5099 return;
5100
5101 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5102 {
5103 symbolS *csect;
5104 int i;
5105 union internal_auxent *a;
5106
5107 if (S_GET_SEGMENT (sym) != absolute_section)
5108 continue;
5109
5110 csect = symbol_create (".abs[XO]", absolute_section,
5111 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5112 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 5113 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5114 i = S_GET_NUMBER_AUXILIARY (csect);
5115 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5116 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 5117 a->x_csect.x_scnlen.l = 0;
5118 a->x_csect.x_smtyp = XTY_SD;
5119 a->x_csect.x_parmhash = 0;
5120 a->x_csect.x_snhash = 0;
5121 a->x_csect.x_smclas = XMC_XO;
5122 a->x_csect.x_stab = 0;
5123 a->x_csect.x_snstab = 0;
5124
5125 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5126
5127 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 5128 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5129 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5130 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 5131 }
5132
b34976b6 5133 ppc_saw_abs = FALSE;
252b5132
RH		 5134}
5135
5136/* Set the VMA for a section. This is called on all the sections in
5137 turn. */
5138
5139void
5140ppc_frob_section (sec)
5141 asection *sec;
5142{
931e13a6 5143 static bfd_vma vma = 0;
252b5132 5144
931e13a6 5145 vma = md_section_align (sec, vma);
252b5132
RH		 5146 bfd_set_section_vma (stdoutput, sec, vma);
5147 vma += bfd_section_size (stdoutput, sec);
5148}
5149
5150#endif /* OBJ_XCOFF */
5151\f
5152/* Turn a string in input_line_pointer into a floating point constant
bc0d738a
NC		 5153 of type TYPE, and store the appropriate bytes in *LITP. The number
5154 of LITTLENUMS emitted is stored in *SIZEP. An error message is
252b5132
RH		 5155 returned, or NULL on OK. */
5156
5157char *
5158md_atof (type, litp, sizep)
5159 int type;
5160 char *litp;
5161 int *sizep;
5162{
5163 int prec;
5164 LITTLENUM_TYPE words[4];
5165 char *t;
5166 int i;
5167
5168 switch (type)
5169 {
5170 case 'f':
5171 prec = 2;
5172 break;
5173
5174 case 'd':
5175 prec = 4;
5176 break;
5177
5178 default:
5179 *sizep = 0;
5180 return _("bad call to md_atof");
5181 }
5182
5183 t = atof_ieee (input_line_pointer, type, words);
5184 if (t)
5185 input_line_pointer = t;
5186
5187 *sizep = prec * 2;
5188
5189 if (target_big_endian)
5190 {
5191 for (i = 0; i < prec; i++)
5192 {
5193 md_number_to_chars (litp, (valueT) words[i], 2);
5194 litp += 2;
5195 }
5196 }
5197 else
5198 {
5199 for (i = prec - 1; i >= 0; i--)
5200 {
5201 md_number_to_chars (litp, (valueT) words[i], 2);
5202 litp += 2;
5203 }
5204 }
81d4177b 5205
252b5132
RH		 5206 return NULL;
5207}
5208
5209/* Write a value out to the object file, using the appropriate
5210 endianness. */
5211
5212void
5213md_number_to_chars (buf, val, n)
5214 char *buf;
5215 valueT val;
5216 int n;
5217{
5218 if (target_big_endian)
5219 number_to_chars_bigendian (buf, val, n);
5220 else
5221 number_to_chars_littleendian (buf, val, n);
5222}
5223
5224/* Align a section (I don't know why this is machine dependent). */
5225
5226valueT
5227md_section_align (seg, addr)
5228 asection *seg;
5229 valueT addr;
5230{
5231 int align = bfd_get_section_alignment (stdoutput, seg);
5232
5233 return ((addr + (1 << align) - 1) & (-1 << align));
5234}
5235
5236/* We don't have any form of relaxing. */
5237
5238int
5239md_estimate_size_before_relax (fragp, seg)
92161534
ILT		 5240 fragS *fragp ATTRIBUTE_UNUSED;
5241 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH		 5242{
5243 abort ();
5244 return 0;
5245}
5246
5247/* Convert a machine dependent frag. We never generate these. */
5248
5249void
5250md_convert_frag (abfd, sec, fragp)
92161534
ILT		 5251 bfd *abfd ATTRIBUTE_UNUSED;
5252 asection *sec ATTRIBUTE_UNUSED;
5253 fragS *fragp ATTRIBUTE_UNUSED;
252b5132
RH		 5254{
5255 abort ();
5256}
5257
5258/* We have no need to default values of symbols. */
5259
252b5132
RH		 5260symbolS *
5261md_undefined_symbol (name)
92161534 5262 char *name ATTRIBUTE_UNUSED;
252b5132
RH		 5263{
5264 return 0;
5265}
5266\f
5267/* Functions concerning relocs. */
5268
5269/* The location from which a PC relative jump should be calculated,
5270 given a PC relative reloc. */
5271
5272long
5273md_pcrel_from_section (fixp, sec)
5274 fixS *fixp;
92161534 5275 segT sec ATTRIBUTE_UNUSED;
252b5132
RH		 5276{
5277 return fixp->fx_frag->fr_address + fixp->fx_where;
5278}
5279
5280#ifdef OBJ_XCOFF
5281
5282/* This is called to see whether a fixup should be adjusted to use a
5283 section symbol. We take the opportunity to change a fixup against
5284 a symbol in the TOC subsegment into a reloc against the
5285 corresponding .tc symbol. */
5286
5287int
5288ppc_fix_adjustable (fix)
5289 fixS *fix;
5290{
b782de16
AM		 5291 valueT val = resolve_symbol_value (fix->fx_addsy);
5292 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5293 TC_SYMFIELD_TYPE *tc;
5294
5295 if (symseg == absolute_section)
5296 return 0;
252b5132 5297
252b5132 5298 if (ppc_toc_csect != (symbolS *) NULL
252b5132 5299 && fix->fx_addsy != ppc_toc_csect
b782de16 5300 && symseg == data_section
252b5132
RH		 5301 && val >= ppc_toc_frag->fr_address
5302 && (ppc_after_toc_frag == (fragS *) NULL
5303 || val < ppc_after_toc_frag->fr_address))
5304 {
5305 symbolS *sy;
5306
5307 for (sy = symbol_next (ppc_toc_csect);
5308 sy != (symbolS *) NULL;
5309 sy = symbol_next (sy))
5310 {
b782de16
AM		 5311 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5312
5313 if (sy_tc->class == XMC_TC0)
252b5132 5314 continue;
b782de16 5315 if (sy_tc->class != XMC_TC)
252b5132 5316 break;
b782de16 5317 if (val == resolve_symbol_value (sy))
252b5132
RH		 5318 {
5319 fix->fx_addsy = sy;
5320 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5321 return 0;
5322 }
5323 }
5324
5325 as_bad_where (fix->fx_file, fix->fx_line,
5326 _("symbol in .toc does not match any .tc"));
5327 }
5328
5329 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 5330 tc = symbol_get_tc (fix->fx_addsy);
5331 if (tc->subseg == 0
5332 && tc->class != XMC_TC0
5333 && tc->class != XMC_TC
5334 && symseg != bss_section
252b5132 5335 /* Don't adjust if this is a reloc in the toc section. */
b782de16 5336 && (symseg != data_section
252b5132
RH		 5337 || ppc_toc_csect == NULL
5338 || val < ppc_toc_frag->fr_address
5339 || (ppc_after_toc_frag != NULL
5340 && val >= ppc_after_toc_frag->fr_address)))
5341 {
5342 symbolS *csect;
b782de16 5343 symbolS *next_csect;
252b5132 5344
b782de16 5345 if (symseg == text_section)
252b5132 5346 csect = ppc_text_csects;
b782de16 5347 else if (symseg == data_section)
252b5132
RH		 5348 csect = ppc_data_csects;
5349 else
5350 abort ();
5351
5352 /* Skip the initial dummy symbol. */
809ffe0d 5353 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5354
5355 if (csect != (symbolS *) NULL)
5356 {
b782de16
AM		 5357 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5358 && (symbol_get_frag (next_csect)->fr_address <= val))
252b5132
RH		 5359 {
5360 /* If the csect address equals the symbol value, then we
99a814a1
AM		 5361 have to look through the full symbol table to see
5362 whether this is the csect we want. Note that we will
5363 only get here if the csect has zero length. */
b782de16
AM		 5364 if (symbol_get_frag (csect)->fr_address == val
5365 && S_GET_VALUE (csect) == val)
252b5132
RH		 5366 {
5367 symbolS *scan;
5368
809ffe0d 5369 for (scan = symbol_next (csect);
252b5132 5370 scan != NULL;
809ffe0d 5371 scan = symbol_next (scan))
252b5132 5372 {
809ffe0d 5373 if (symbol_get_tc (scan)->subseg != 0)
252b5132
RH		 5374 break;
5375 if (scan == fix->fx_addsy)
5376 break;
5377 }
5378
5379 /* If we found the symbol before the next csect
99a814a1 5380 symbol, then this is the csect we want. */
252b5132
RH		 5381 if (scan == fix->fx_addsy)
5382 break;
5383 }
5384
b782de16 5385 csect = next_csect;
252b5132
RH		 5386 }
5387
b782de16 5388 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
252b5132
RH		 5389 fix->fx_addsy = csect;
5390 }
b782de16 5391 return 0;
252b5132
RH		 5392 }
5393
5394 /* Adjust a reloc against a .lcomm symbol to be against the base
5395 .lcomm. */
b782de16 5396 if (symseg == bss_section
252b5132
RH		 5397 && ! S_IS_EXTERNAL (fix->fx_addsy))
5398 {
b782de16
AM		 5399 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5400
5401 fix->fx_offset += val - resolve_symbol_value (sy);
5402 fix->fx_addsy = sy;
252b5132
RH		 5403 }
5404
5405 return 0;
5406}
5407
5408/* A reloc from one csect to another must be kept. The assembler
5409 will, of course, keep relocs between sections, and it will keep
5410 absolute relocs, but we need to force it to keep PC relative relocs
5411 between two csects in the same section. */
5412
5413int
5414ppc_force_relocation (fix)
5415 fixS *fix;
5416{
5417 /* At this point fix->fx_addsy should already have been converted to
5418 a csect symbol. If the csect does not include the fragment, then
5419 we need to force the relocation. */
5420 if (fix->fx_pcrel
5421 && fix->fx_addsy != NULL
809ffe0d
ILT		 5422 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5423 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5424 > fix->fx_frag->fr_address)
5425 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5426 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 5427 <= fix->fx_frag->fr_address))))
5428 return 1;
5429
ae6063d4 5430 return generic_force_reloc (fix);
252b5132
RH		 5431}
5432
5433#endif /* OBJ_XCOFF */
5434
0baf16f2 5435#ifdef OBJ_ELF
a161fe53
AM		 5436/* If this function returns non-zero, it guarantees that a relocation
5437 will be emitted for a fixup. */
5438
5439int
5440ppc_force_relocation (fix)
5441 fixS *fix;
5442{
5443 /* Branch prediction relocations must force a relocation, as must
5444 the vtable description relocs. */
5445 switch (fix->fx_r_type)
5446 {
5447 case BFD_RELOC_PPC_B16_BRTAKEN:
5448 case BFD_RELOC_PPC_B16_BRNTAKEN:
5449 case BFD_RELOC_PPC_BA16_BRTAKEN:
5450 case BFD_RELOC_PPC_BA16_BRNTAKEN:
5451 case BFD_RELOC_PPC64_TOC:
a161fe53
AM		 5452 return 1;
5453 default:
5454 break;
5455 }
5456
cdba85ec
AM		 5457 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5458 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5459 return 1;
5460
ae6063d4 5461 return generic_force_reloc (fix);
a161fe53
AM		 5462}
5463
0baf16f2
AM		 5464int
5465ppc_fix_adjustable (fix)
5466 fixS *fix;
252b5132 5467{
0baf16f2
AM		 5468 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5469 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5470 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5471 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
5472 && fix->fx_r_type != BFD_RELOC_GPREL16
5473 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5474 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec
AM		 5475 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
5476 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
0baf16f2
AM		 5477 && (fix->fx_pcrel
5478 || (fix->fx_subsy != NULL
5479 && (S_GET_SEGMENT (fix->fx_subsy)
5480 == S_GET_SEGMENT (fix->fx_addsy)))
5481 || S_IS_LOCAL (fix->fx_addsy)));
252b5132 5482}
0baf16f2 5483#endif
252b5132
RH		 5484
5485/* Apply a fixup to the object code. This is called for all the
5486 fixups we generated by the call to fix_new_exp, above. In the call
5487 above we used a reloc code which was the largest legal reloc code
5488 plus the operand index. Here we undo that to recover the operand
5489 index. At this point all symbol values should be fully resolved,
5490 and we attempt to completely resolve the reloc. If we can not do
5491 that, we determine the correct reloc code and put it back in the
5492 fixup. */
5493
94f592af
NC		 5494void
5495md_apply_fix3 (fixP, valP, seg)
5496 fixS *fixP;
5497 valueT * valP;
0baf16f2 5498 segT seg ATTRIBUTE_UNUSED;
252b5132 5499{
94f592af 5500 valueT value = * valP;
252b5132
RH		 5501
5502#ifdef OBJ_ELF
94f592af 5503 if (fixP->fx_addsy != NULL)
252b5132 5504 {
a161fe53 5505 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 5506 if (fixP->fx_pcrel)
5507 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 5508 }
5509 else
94f592af 5510 fixP->fx_done = 1;
252b5132 5511#else
a161fe53 5512 /* FIXME FIXME FIXME: The value we are passed in *valP includes
252b5132
RH		 5513 the symbol values. Since we are using BFD_ASSEMBLER, if we are
5514 doing this relocation the code in write.c is going to call
5515 bfd_install_relocation, which is also going to use the symbol
5516 value. That means that if the reloc is fully resolved we want to
a161fe53 5517 use *valP since bfd_install_relocation is not being used.
252b5132 5518 However, if the reloc is not fully resolved we do not want to use
a161fe53
AM		 5519 *valP, and must use fx_offset instead. However, if the reloc
5520 is PC relative, we do want to use *valP since it includes the
252b5132 5521 result of md_pcrel_from. This is confusing. */
94f592af
NC		 5522 if (fixP->fx_addsy == (symbolS *) NULL)
5523 fixP->fx_done = 1;
5524
5525 else if (fixP->fx_pcrel)
5526 ;
5527
252b5132 5528 else
a161fe53
AM		 5529 value = fixP->fx_offset;
5530#endif
5531
5532 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 5533 {
a161fe53
AM		 5534 /* We can't actually support subtracting a symbol. */
5535 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 5536 }
252b5132 5537
94f592af 5538 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132
RH		 5539 {
5540 int opindex;
5541 const struct powerpc_operand *operand;
5542 char *where;
5543 unsigned long insn;
5544
94f592af 5545 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
252b5132
RH		 5546
5547 operand = &powerpc_operands[opindex];
5548
5549#ifdef OBJ_XCOFF
0baf16f2
AM		 5550 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
5551 does not generate a reloc. It uses the offset of `sym' within its
5552 csect. Other usages, such as `.long sym', generate relocs. This
5553 is the documented behaviour of non-TOC symbols. */
252b5132
RH		 5554 if ((operand->flags & PPC_OPERAND_PARENS) != 0
5555 && operand->bits == 16
5556 && operand->shift == 0
2b3c4602 5557 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 5558 && fixP->fx_addsy != NULL
5559 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
5560 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC
5561 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC0
5562 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 5563 {
94f592af
NC		 5564 value = fixP->fx_offset;
5565 fixP->fx_done = 1;
252b5132
RH		 5566 }
5567#endif
5568
5569 /* Fetch the instruction, insert the fully resolved operand
5570 value, and stuff the instruction back again. */
94f592af 5571 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH		 5572 if (target_big_endian)
5573 insn = bfd_getb32 ((unsigned char *) where);
5574 else
5575 insn = bfd_getl32 ((unsigned char *) where);
5576 insn = ppc_insert_operand (insn, operand, (offsetT) value,
94f592af 5577 fixP->fx_file, fixP->fx_line);
252b5132
RH		 5578 if (target_big_endian)
5579 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5580 else
5581 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5582
94f592af
NC		 5583 if (fixP->fx_done)
5584 /* Nothing else to do here. */
5585 return;
252b5132 5586
94f592af 5587 assert (fixP->fx_addsy != NULL);
0baf16f2 5588
252b5132
RH		 5589 /* Determine a BFD reloc value based on the operand information.
5590 We are only prepared to turn a few of the operands into
0baf16f2 5591 relocs. */
11b37b7b
AM		 5592 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
5593 && operand->bits == 26
5594 && operand->shift == 0)
94f592af 5595 fixP->fx_r_type = BFD_RELOC_PPC_B26;
11b37b7b
AM		 5596 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
5597 && operand->bits == 16
5598 && operand->shift == 0)
95210096
AM		 5599 {
5600 fixP->fx_r_type = BFD_RELOC_PPC_B16;
5601#ifdef OBJ_XCOFF
5602 fixP->fx_size = 2;
5603 if (target_big_endian)
5604 fixP->fx_where += 2;
5605#endif
5606 }
11b37b7b
AM		 5607 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
5608 && operand->bits == 26
5609 && operand->shift == 0)
94f592af 5610 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
11b37b7b
AM		 5611 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
5612 && operand->bits == 16
5613 && operand->shift == 0)
95210096
AM		 5614 {
5615 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
5616#ifdef OBJ_XCOFF
5617 fixP->fx_size = 2;
5618 if (target_big_endian)
5619 fixP->fx_where += 2;
5620#endif
5621 }
0baf16f2 5622#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
11b37b7b
AM		 5623 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
5624 && operand->bits == 16
a7fc733f 5625 && operand->shift == 0)
11b37b7b 5626 {
a7fc733f
AM		 5627 if (ppc_is_toc_sym (fixP->fx_addsy))
5628 {
5629 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
0baf16f2 5630#ifdef OBJ_ELF
a7fc733f
AM		 5631 if (ppc_obj64
5632 && (operand->flags & PPC_OPERAND_DS) != 0)
5633 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
5634#endif
5635 }
5636 else
5637 {
5638 fixP->fx_r_type = BFD_RELOC_16;
5639#ifdef OBJ_ELF
5640 if (ppc_obj64
5641 && (operand->flags & PPC_OPERAND_DS) != 0)
5642 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
0baf16f2 5643#endif
a7fc733f 5644 }
94f592af 5645 fixP->fx_size = 2;
11b37b7b 5646 if (target_big_endian)
94f592af 5647 fixP->fx_where += 2;
11b37b7b 5648 }
0baf16f2 5649#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
11b37b7b 5650 else
252b5132
RH		 5651 {
5652 char *sfile;
5653 unsigned int sline;
5654
5655 /* Use expr_symbol_where to see if this is an expression
0baf16f2 5656 symbol. */
94f592af
NC		 5657 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
5658 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH		 5659 _("unresolved expression that must be resolved"));
5660 else
94f592af 5661 as_bad_where (fixP->fx_file, fixP->fx_line,
0baf16f2 5662 _("unsupported relocation against %s"),
94f592af
NC		 5663 S_GET_NAME (fixP->fx_addsy));
5664 fixP->fx_done = 1;
5665 return;
252b5132
RH		 5666 }
5667 }
5668 else
5669 {
5670#ifdef OBJ_ELF
94f592af 5671 ppc_elf_validate_fix (fixP, seg);
252b5132 5672#endif
94f592af 5673 switch (fixP->fx_r_type)
252b5132 5674 {
252b5132 5675 case BFD_RELOC_CTOR:
2b3c4602 5676 if (ppc_obj64)
9c7977b3
AM		 5677 goto ctor64;
5678 /* fall through */
5679
0baf16f2 5680 case BFD_RELOC_32:
94f592af
NC		 5681 if (fixP->fx_pcrel)
5682 fixP->fx_r_type = BFD_RELOC_32_PCREL;
99a814a1 5683 /* fall through */
252b5132
RH		 5684
5685 case BFD_RELOC_RVA:
5686 case BFD_RELOC_32_PCREL:
252b5132 5687 case BFD_RELOC_PPC_EMB_NADDR32:
94f592af 5688 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5689 value, 4);
5690 break;
5691
7f6d05e8 5692 case BFD_RELOC_64:
9c7977b3 5693 ctor64:
94f592af
NC		 5694 if (fixP->fx_pcrel)
5695 fixP->fx_r_type = BFD_RELOC_64_PCREL;
99a814a1 5696 /* fall through */
0baf16f2 5697
7f6d05e8 5698 case BFD_RELOC_64_PCREL:
94f592af 5699 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7f6d05e8 5700 value, 8);
81d4177b 5701 break;
0baf16f2 5702
252b5132
RH		 5703 case BFD_RELOC_LO16:
5704 case BFD_RELOC_16:
5705 case BFD_RELOC_GPREL16:
5706 case BFD_RELOC_16_GOT_PCREL:
5707 case BFD_RELOC_16_GOTOFF:
5708 case BFD_RELOC_LO16_GOTOFF:
5709 case BFD_RELOC_HI16_GOTOFF:
5710 case BFD_RELOC_HI16_S_GOTOFF:
1cfc59d5 5711 case BFD_RELOC_16_BASEREL:
252b5132
RH		 5712 case BFD_RELOC_LO16_BASEREL:
5713 case BFD_RELOC_HI16_BASEREL:
5714 case BFD_RELOC_HI16_S_BASEREL:
5715 case BFD_RELOC_PPC_EMB_NADDR16:
5716 case BFD_RELOC_PPC_EMB_NADDR16_LO:
5717 case BFD_RELOC_PPC_EMB_NADDR16_HI:
5718 case BFD_RELOC_PPC_EMB_NADDR16_HA:
5719 case BFD_RELOC_PPC_EMB_SDAI16:
5720 case BFD_RELOC_PPC_EMB_SDA2REL:
5721 case BFD_RELOC_PPC_EMB_SDA2I16:
5722 case BFD_RELOC_PPC_EMB_RELSEC16:
5723 case BFD_RELOC_PPC_EMB_RELST_LO:
5724 case BFD_RELOC_PPC_EMB_RELST_HI:
5725 case BFD_RELOC_PPC_EMB_RELST_HA:
5726 case BFD_RELOC_PPC_EMB_RELSDA:
5727 case BFD_RELOC_PPC_TOC16:
0baf16f2 5728#ifdef OBJ_ELF
0baf16f2
AM		 5729 case BFD_RELOC_PPC64_TOC16_LO:
5730 case BFD_RELOC_PPC64_TOC16_HI:
5731 case BFD_RELOC_PPC64_TOC16_HA:
0baf16f2 5732#endif
94f592af 5733 if (fixP->fx_pcrel)
252b5132 5734 {
94f592af
NC		 5735 if (fixP->fx_addsy != NULL)
5736 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5737 _("cannot emit PC relative %s relocation against %s"),
94f592af
NC		 5738 bfd_get_reloc_code_name (fixP->fx_r_type),
5739 S_GET_NAME (fixP->fx_addsy));
252b5132 5740 else
94f592af 5741 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5742 _("cannot emit PC relative %s relocation"),
94f592af 5743 bfd_get_reloc_code_name (fixP->fx_r_type));
252b5132
RH		 5744 }
5745
94f592af 5746 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5747 value, 2);
5748 break;
5749
5750 /* This case happens when you write, for example,
5751 lis %r3,(L1-L2)@ha
5752 where L1 and L2 are defined later. */
5753 case BFD_RELOC_HI16:
94f592af 5754 if (fixP->fx_pcrel)
252b5132 5755 abort ();
94f592af 5756 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5757 PPC_HI (value), 2);
252b5132 5758 break;
0baf16f2 5759
252b5132 5760 case BFD_RELOC_HI16_S:
94f592af 5761 if (fixP->fx_pcrel)
252b5132 5762 abort ();
94f592af 5763 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5764 PPC_HA (value), 2);
5765 break;
5766
5767#ifdef OBJ_ELF
0baf16f2 5768 case BFD_RELOC_PPC64_HIGHER:
94f592af 5769 if (fixP->fx_pcrel)
0baf16f2 5770 abort ();
94f592af 5771 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5772 PPC_HIGHER (value), 2);
252b5132
RH		 5773 break;
5774
0baf16f2 5775 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 5776 if (fixP->fx_pcrel)
0baf16f2 5777 abort ();
94f592af 5778 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5779 PPC_HIGHERA (value), 2);
5780 break;
5781
5782 case BFD_RELOC_PPC64_HIGHEST:
94f592af 5783 if (fixP->fx_pcrel)
0baf16f2 5784 abort ();
94f592af 5785 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5786 PPC_HIGHEST (value), 2);
5787 break;
5788
5789 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 5790 if (fixP->fx_pcrel)
0baf16f2 5791 abort ();
94f592af 5792 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5793 PPC_HIGHESTA (value), 2);
5794 break;
5795
5796 case BFD_RELOC_PPC64_ADDR16_DS:
5797 case BFD_RELOC_PPC64_ADDR16_LO_DS:
5798 case BFD_RELOC_PPC64_GOT16_DS:
5799 case BFD_RELOC_PPC64_GOT16_LO_DS:
5800 case BFD_RELOC_PPC64_PLT16_LO_DS:
5801 case BFD_RELOC_PPC64_SECTOFF_DS:
5802 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
5803 case BFD_RELOC_PPC64_TOC16_DS:
5804 case BFD_RELOC_PPC64_TOC16_LO_DS:
5805 case BFD_RELOC_PPC64_PLTGOT16_DS:
5806 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
94f592af 5807 if (fixP->fx_pcrel)
0baf16f2
AM		 5808 abort ();
5809 {
94f592af 5810 unsigned char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
3d8aea2f 5811 unsigned long val, mask;
0baf16f2
AM		 5812
5813 if (target_big_endian)
adadcc0c 5814 val = bfd_getb32 (where - 2);
0baf16f2 5815 else
adadcc0c
AM		 5816 val = bfd_getl32 (where);
5817 mask = 0xfffc;
5818 /* lq insns reserve the four lsbs. */
5819 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
77a6138a 5820 && (val & (0x3f << 26)) == (56u << 26))
adadcc0c
AM		 5821 mask = 0xfff0;
5822 val |= value & mask;
0baf16f2
AM		 5823 if (target_big_endian)
5824 bfd_putb16 ((bfd_vma) val, where);
5825 else
5826 bfd_putl16 ((bfd_vma) val, where);
5827 }
5828 break;
cdba85ec 5829
ba0b2174
AM		 5830 case BFD_RELOC_PPC_B16_BRTAKEN:
5831 case BFD_RELOC_PPC_B16_BRNTAKEN:
5832 case BFD_RELOC_PPC_BA16_BRTAKEN:
5833 case BFD_RELOC_PPC_BA16_BRNTAKEN:
5834 break;
5835
cdba85ec
AM		 5836 case BFD_RELOC_PPC_TLS:
5837 case BFD_RELOC_PPC_DTPMOD:
5838 case BFD_RELOC_PPC_TPREL16:
5839 case BFD_RELOC_PPC_TPREL16_LO:
5840 case BFD_RELOC_PPC_TPREL16_HI:
5841 case BFD_RELOC_PPC_TPREL16_HA:
5842 case BFD_RELOC_PPC_TPREL:
5843 case BFD_RELOC_PPC_DTPREL16:
5844 case BFD_RELOC_PPC_DTPREL16_LO:
5845 case BFD_RELOC_PPC_DTPREL16_HI:
5846 case BFD_RELOC_PPC_DTPREL16_HA:
5847 case BFD_RELOC_PPC_DTPREL:
5848 case BFD_RELOC_PPC_GOT_TLSGD16:
5849 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
5850 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
5851 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
5852 case BFD_RELOC_PPC_GOT_TLSLD16:
5853 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
5854 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
5855 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
5856 case BFD_RELOC_PPC_GOT_TPREL16:
5857 case BFD_RELOC_PPC_GOT_TPREL16_LO:
5858 case BFD_RELOC_PPC_GOT_TPREL16_HI:
5859 case BFD_RELOC_PPC_GOT_TPREL16_HA:
5860 case BFD_RELOC_PPC_GOT_DTPREL16:
5861 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
5862 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
5863 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
5864 case BFD_RELOC_PPC64_TPREL16_DS:
5865 case BFD_RELOC_PPC64_TPREL16_LO_DS:
5866 case BFD_RELOC_PPC64_TPREL16_HIGHER:
5867 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
5868 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
5869 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
5870 case BFD_RELOC_PPC64_DTPREL16_DS:
5871 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
5872 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
5873 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
5874 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
5875 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
5876 break;
0baf16f2 5877#endif
252b5132 5878 /* Because SDA21 modifies the register field, the size is set to 4
99a814a1 5879 bytes, rather than 2, so offset it here appropriately. */
252b5132 5880 case BFD_RELOC_PPC_EMB_SDA21:
94f592af 5881 if (fixP->fx_pcrel)
252b5132
RH		 5882 abort ();
5883
94f592af 5884 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
252b5132
RH		 5885 + ((target_big_endian) ? 2 : 0),
5886 value, 2);
5887 break;
5888
5889 case BFD_RELOC_8:
94f592af 5890 if (fixP->fx_pcrel)
31a91399
NC		 5891 {
5892 /* This can occur if there is a bug in the input assembler, eg:
b7d7dc63 5893 ".byte <undefined_symbol> - ." */
31a91399
NC		 5894 if (fixP->fx_addsy)
5895 as_bad (_("Unable to handle reference to symbol %s"),
5896 S_GET_NAME (fixP->fx_addsy));
5897 else
5898 as_bad (_("Unable to resolve expression"));
5899 fixP->fx_done = 1;
5900 }
5901 else
5902 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5903 value, 1);
252b5132
RH		 5904 break;
5905
5906 case BFD_RELOC_24_PLT_PCREL:
5907 case BFD_RELOC_PPC_LOCAL24PC:
94f592af 5908 if (!fixP->fx_pcrel && !fixP->fx_done)
252b5132
RH		 5909 abort ();
5910
94f592af 5911 if (fixP->fx_done)
99a814a1
AM		 5912 {
5913 char *where;
5914 unsigned long insn;
5915
5916 /* Fetch the instruction, insert the fully resolved operand
5917 value, and stuff the instruction back again. */
94f592af 5918 where = fixP->fx_frag->fr_literal + fixP->fx_where;
99a814a1
AM		 5919 if (target_big_endian)
5920 insn = bfd_getb32 ((unsigned char *) where);
5921 else
5922 insn = bfd_getl32 ((unsigned char *) where);
5923 if ((value & 3) != 0)
94f592af 5924 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 5925 _("must branch to an address a multiple of 4"));
5926 if ((offsetT) value < -0x40000000
5927 || (offsetT) value >= 0x40000000)
94f592af 5928 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 5929 _("@local or @plt branch destination is too far away, %ld bytes"),
5930 (long) value);
5931 insn = insn | (value & 0x03fffffc);
5932 if (target_big_endian)
5933 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5934 else
5935 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5936 }
252b5132
RH		 5937 break;
5938
5939 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 5940 fixP->fx_done = 0;
5941 if (fixP->fx_addsy
5942 && !S_IS_DEFINED (fixP->fx_addsy)
5943 && !S_IS_WEAK (fixP->fx_addsy))
5944 S_SET_WEAK (fixP->fx_addsy);
252b5132
RH		 5945 break;
5946
5947 case BFD_RELOC_VTABLE_ENTRY:
94f592af 5948 fixP->fx_done = 0;
252b5132
RH		 5949 break;
5950
0baf16f2 5951#ifdef OBJ_ELF
0baf16f2
AM		 5952 /* Generated by reference to `sym@tocbase'. The sym is
5953 ignored by the linker. */
5954 case BFD_RELOC_PPC64_TOC:
94f592af 5955 fixP->fx_done = 0;
0baf16f2 5956 break;
0baf16f2 5957#endif
252b5132 5958 default:
bc805888 5959 fprintf (stderr,
94f592af 5960 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 5961 fflush (stderr);
252b5132
RH		 5962 abort ();
5963 }
5964 }
5965
5966#ifdef OBJ_ELF
94f592af 5967 fixP->fx_addnumber = value;
252b5132 5968#else
94f592af
NC		 5969 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
5970 fixP->fx_addnumber = 0;
252b5132
RH		 5971 else
5972 {
5973#ifdef TE_PE
94f592af 5974 fixP->fx_addnumber = 0;
252b5132
RH		 5975#else
5976 /* We want to use the offset within the data segment of the
5977 symbol, not the actual VMA of the symbol. */
94f592af
NC		 5978 fixP->fx_addnumber =
5979 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy));
252b5132
RH		 5980#endif
5981 }
5982#endif
252b5132
RH		 5983}
5984
5985/* Generate a reloc for a fixup. */
5986
5987arelent *
5988tc_gen_reloc (seg, fixp)
92161534 5989 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH		 5990 fixS *fixp;
5991{
5992 arelent *reloc;
5993
5994 reloc = (arelent *) xmalloc (sizeof (arelent));
5995
49309057
ILT		 5996 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
5997 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 5998 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
5999 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6000 if (reloc->howto == (reloc_howto_type *) NULL)
6001 {
6002 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 6003 _("reloc %d not supported by object file format"),
6004 (int) fixp->fx_r_type);
252b5132
RH		 6005 return NULL;
6006 }
6007 reloc->addend = fixp->fx_addnumber;
6008
6009 return reloc;
6010}
75e21f08
JJ		 6011
6012void
6013ppc_cfi_frame_initial_instructions ()
6014{
6015 cfi_add_CFA_def_cfa (1, 0);
6016}
6017
6018int
6019tc_ppc_regname_to_dw2regnum (const char *regname)
6020{
6021 unsigned int regnum = -1;
6022 unsigned int i;
6023 const char *p;
6024 char *q;
6025 static struct { char *name; int dw2regnum; } regnames[] =
6026 {
6027 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6028 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
6029 { "cc", 68 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
6030 { "spe_acc", 111 }, { "spefscr", 112 }
6031 };
6032
6033 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6034 if (strcmp (regnames[i].name, regname) == 0)
6035 return regnames[i].dw2regnum;
6036
6037 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6038 {
6039 p = regname + 1 + (regname[1] == '.');
6040 regnum = strtoul (p, &q, 10);
6041 if (p == q || *q || regnum >= 32)
6042 return -1;
6043 if (regname[0] == 'f')
b7d7dc63 6044 regnum += 32;
75e21f08 6045 else if (regname[0] == 'v')
b7d7dc63 6046 regnum += 77;
75e21f08
JJ		 6047 }
6048 else if (regname[0] == 'c' && regname[1] == 'r')
6049 {
6050 p = regname + 2 + (regname[2] == '.');
6051 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 6052 return -1;
75e21f08
JJ		 6053 regnum = p[0] - '0' + 68;
6054 }
6055 return regnum;
6056}
GDB Binutils - Deliverables
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