Commit | Line | Data |
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252b5132 | 1 | /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000) |
b7d7dc63 | 2 | Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, |
aea77599 | 3 | 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012 |
cc643b88 | 4 | Free Software Foundation, Inc. |
252b5132 RH |
5 | Written by Ian Lance Taylor, Cygnus Support. |
6 | ||
7 | This file is part of GAS, the GNU Assembler. | |
8 | ||
9 | GAS is free software; you can redistribute it and/or modify | |
10 | it under the terms of the GNU General Public License as published by | |
ec2655a6 | 11 | the Free Software Foundation; either version 3, or (at your option) |
252b5132 RH |
12 | any later version. |
13 | ||
14 | GAS is distributed in the hope that it will be useful, | |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
18 | ||
19 | You should have received a copy of the GNU General Public License | |
20 | along with GAS; see the file COPYING. If not, write to the Free | |
4b4da160 NC |
21 | Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA |
22 | 02110-1301, USA. */ | |
252b5132 | 23 | |
252b5132 | 24 | #include "as.h" |
3882b010 | 25 | #include "safe-ctype.h" |
252b5132 | 26 | #include "subsegs.h" |
75e21f08 | 27 | #include "dw2gencfi.h" |
252b5132 RH |
28 | #include "opcode/ppc.h" |
29 | ||
30 | #ifdef OBJ_ELF | |
31 | #include "elf/ppc.h" | |
5d6f4f16 | 32 | #include "dwarf2dbg.h" |
252b5132 RH |
33 | #endif |
34 | ||
35 | #ifdef TE_PE | |
36 | #include "coff/pe.h" | |
37 | #endif | |
38 | ||
85645aed TG |
39 | #ifdef OBJ_XCOFF |
40 | #include "coff/xcoff.h" | |
41 | #include "libxcoff.h" | |
42 | #endif | |
43 | ||
252b5132 RH |
44 | /* This is the assembler for the PowerPC or POWER (RS/6000) chips. */ |
45 | ||
46 | /* Tell the main code what the endianness is. */ | |
47 | extern int target_big_endian; | |
48 | ||
49 | /* Whether or not, we've set target_big_endian. */ | |
50 | static int set_target_endian = 0; | |
51 | ||
52 | /* Whether to use user friendly register names. */ | |
53 | #ifndef TARGET_REG_NAMES_P | |
54 | #ifdef TE_PE | |
b34976b6 | 55 | #define TARGET_REG_NAMES_P TRUE |
252b5132 | 56 | #else |
b34976b6 | 57 | #define TARGET_REG_NAMES_P FALSE |
252b5132 RH |
58 | #endif |
59 | #endif | |
60 | ||
0baf16f2 AM |
61 | /* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST, |
62 | HIGHESTA. */ | |
63 | ||
64 | /* #lo(value) denotes the least significant 16 bits of the indicated. */ | |
65 | #define PPC_LO(v) ((v) & 0xffff) | |
66 | ||
b9c361e0 JL |
67 | /* Split the indicated value with the msbs in bits 11-15 |
68 | and the lsbs in bits 21-31. */ | |
69 | #define PPC_VLE_SPLIT16A(v) ((v & 0xf800) << 11) | (v & 0x7ff) | |
70 | ||
71 | /* Split the indicated value with the msbs in bits 6-10 | |
72 | and the lsbs in bits 21-31. */ | |
73 | #define PPC_VLE_SPLIT16D(v) ((v & 0xf800) << 5) | (v & 0x7ff) | |
74 | ||
75 | /* #lo(value) denotes the lsb 16 bits in split16a format. */ | |
76 | #define PPC_VLE_LO16A(v) PPC_VLE_SPLIT16A(PPC_LO(v)) | |
77 | ||
78 | /* #lo(value) denotes the lsb 16 bits in split16d format. */ | |
79 | #define PPC_VLE_LO16D(v) PPC_VLE_SPLIT16D(PPC_LO(v)) | |
80 | ||
0baf16f2 AM |
81 | /* #hi(value) denotes bits 16 through 31 of the indicated value. */ |
82 | #define PPC_HI(v) (((v) >> 16) & 0xffff) | |
83 | ||
b9c361e0 JL |
84 | /* #lo(value) denotes the msb 16 bits in split16a format. */ |
85 | #define PPC_VLE_HI16A(v) PPC_VLE_SPLIT16A(PPC_HI(v)) | |
86 | ||
87 | /* #lo(value) denotes the msb 16 bits in split16d format. */ | |
88 | #define PPC_VLE_HI16D(v) PPC_VLE_SPLIT16D(PPC_HI(v)) | |
89 | ||
0baf16f2 AM |
90 | /* #ha(value) denotes the high adjusted value: bits 16 through 31 of |
91 | the indicated value, compensating for #lo() being treated as a | |
92 | signed number. */ | |
15c1449b | 93 | #define PPC_HA(v) PPC_HI ((v) + 0x8000) |
0baf16f2 | 94 | |
b9c361e0 JL |
95 | /* #ha(value) denotes the high adjusted value in split16a format. */ |
96 | #define PPC_VLE_HA16A(v) PPC_VLE_SPLIT16A(PPC_HA(v)) | |
97 | ||
98 | /* #ha(value) denotes the high adjusted value in split16d format. */ | |
99 | #define PPC_VLE_HA16D(v) PPC_VLE_SPLIT16D(PPC_HA(v)) | |
100 | ||
0baf16f2 | 101 | /* #higher(value) denotes bits 32 through 47 of the indicated value. */ |
2a98c3a6 | 102 | #define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff) |
0baf16f2 AM |
103 | |
104 | /* #highera(value) denotes bits 32 through 47 of the indicated value, | |
105 | compensating for #lo() being treated as a signed number. */ | |
15c1449b | 106 | #define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000) |
0baf16f2 AM |
107 | |
108 | /* #highest(value) denotes bits 48 through 63 of the indicated value. */ | |
2a98c3a6 | 109 | #define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff) |
0baf16f2 AM |
110 | |
111 | /* #highesta(value) denotes bits 48 through 63 of the indicated value, | |
15c1449b AM |
112 | compensating for #lo being treated as a signed number. */ |
113 | #define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000) | |
0baf16f2 AM |
114 | |
115 | #define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000) | |
116 | ||
b34976b6 | 117 | static bfd_boolean reg_names_p = TARGET_REG_NAMES_P; |
252b5132 | 118 | |
98027b10 AM |
119 | static void ppc_macro (char *, const struct powerpc_macro *); |
120 | static void ppc_byte (int); | |
0baf16f2 AM |
121 | |
122 | #if defined (OBJ_XCOFF) || defined (OBJ_ELF) | |
98027b10 AM |
123 | static void ppc_tc (int); |
124 | static void ppc_machine (int); | |
0baf16f2 | 125 | #endif |
252b5132 RH |
126 | |
127 | #ifdef OBJ_XCOFF | |
98027b10 AM |
128 | static void ppc_comm (int); |
129 | static void ppc_bb (int); | |
130 | static void ppc_bc (int); | |
131 | static void ppc_bf (int); | |
132 | static void ppc_biei (int); | |
133 | static void ppc_bs (int); | |
134 | static void ppc_eb (int); | |
135 | static void ppc_ec (int); | |
136 | static void ppc_ef (int); | |
137 | static void ppc_es (int); | |
138 | static void ppc_csect (int); | |
85645aed | 139 | static void ppc_dwsect (int); |
98027b10 AM |
140 | static void ppc_change_csect (symbolS *, offsetT); |
141 | static void ppc_function (int); | |
142 | static void ppc_extern (int); | |
143 | static void ppc_lglobl (int); | |
c865e45b | 144 | static void ppc_ref (int); |
98027b10 AM |
145 | static void ppc_section (int); |
146 | static void ppc_named_section (int); | |
147 | static void ppc_stabx (int); | |
148 | static void ppc_rename (int); | |
149 | static void ppc_toc (int); | |
150 | static void ppc_xcoff_cons (int); | |
151 | static void ppc_vbyte (int); | |
252b5132 RH |
152 | #endif |
153 | ||
154 | #ifdef OBJ_ELF | |
98027b10 AM |
155 | static void ppc_elf_cons (int); |
156 | static void ppc_elf_rdata (int); | |
157 | static void ppc_elf_lcomm (int); | |
252b5132 RH |
158 | #endif |
159 | ||
160 | #ifdef TE_PE | |
98027b10 AM |
161 | static void ppc_previous (int); |
162 | static void ppc_pdata (int); | |
163 | static void ppc_ydata (int); | |
164 | static void ppc_reldata (int); | |
165 | static void ppc_rdata (int); | |
166 | static void ppc_ualong (int); | |
167 | static void ppc_znop (int); | |
168 | static void ppc_pe_comm (int); | |
169 | static void ppc_pe_section (int); | |
170 | static void ppc_pe_function (int); | |
171 | static void ppc_pe_tocd (int); | |
252b5132 RH |
172 | #endif |
173 | \f | |
174 | /* Generic assembler global variables which must be defined by all | |
175 | targets. */ | |
176 | ||
177 | #ifdef OBJ_ELF | |
178 | /* This string holds the chars that always start a comment. If the | |
179 | pre-processor is disabled, these aren't very useful. The macro | |
180 | tc_comment_chars points to this. We use this, rather than the | |
181 | usual comment_chars, so that we can switch for Solaris conventions. */ | |
182 | static const char ppc_solaris_comment_chars[] = "#!"; | |
183 | static const char ppc_eabi_comment_chars[] = "#"; | |
184 | ||
185 | #ifdef TARGET_SOLARIS_COMMENT | |
186 | const char *ppc_comment_chars = ppc_solaris_comment_chars; | |
187 | #else | |
188 | const char *ppc_comment_chars = ppc_eabi_comment_chars; | |
189 | #endif | |
190 | #else | |
191 | const char comment_chars[] = "#"; | |
192 | #endif | |
193 | ||
194 | /* Characters which start a comment at the beginning of a line. */ | |
195 | const char line_comment_chars[] = "#"; | |
196 | ||
197 | /* Characters which may be used to separate multiple commands on a | |
198 | single line. */ | |
199 | const char line_separator_chars[] = ";"; | |
200 | ||
201 | /* Characters which are used to indicate an exponent in a floating | |
202 | point number. */ | |
203 | const char EXP_CHARS[] = "eE"; | |
204 | ||
205 | /* Characters which mean that a number is a floating point constant, | |
206 | as in 0d1.0. */ | |
207 | const char FLT_CHARS[] = "dD"; | |
5ce8663f | 208 | |
5e02f92e | 209 | /* Anything that can start an operand needs to be mentioned here, |
ac805826 | 210 | to stop the input scrubber eating whitespace. */ |
5e02f92e | 211 | const char ppc_symbol_chars[] = "%["; |
75e21f08 JJ |
212 | |
213 | /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */ | |
214 | int ppc_cie_data_alignment; | |
783de163 | 215 | |
8fbf7334 JL |
216 | /* The dwarf2 minimum instruction length. */ |
217 | int ppc_dwarf2_line_min_insn_length; | |
218 | ||
cef4f754 AM |
219 | /* More than this number of nops in an alignment op gets a branch |
220 | instead. */ | |
221 | unsigned long nop_limit = 4; | |
222 | ||
783de163 AM |
223 | /* The type of processor we are assembling for. This is one or more |
224 | of the PPC_OPCODE flags defined in opcode/ppc.h. */ | |
fa452fa6 | 225 | ppc_cpu_t ppc_cpu = 0; |
01efc3af AM |
226 | |
227 | /* Flags set on encountering toc relocs. */ | |
228 | enum { | |
229 | has_large_toc_reloc = 1, | |
230 | has_small_toc_reloc = 2 | |
231 | } toc_reloc_types; | |
252b5132 RH |
232 | \f |
233 | /* The target specific pseudo-ops which we support. */ | |
234 | ||
235 | const pseudo_typeS md_pseudo_table[] = | |
236 | { | |
237 | /* Pseudo-ops which must be overridden. */ | |
238 | { "byte", ppc_byte, 0 }, | |
239 | ||
240 | #ifdef OBJ_XCOFF | |
241 | /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these | |
242 | legitimately belong in the obj-*.c file. However, XCOFF is based | |
243 | on COFF, and is only implemented for the RS/6000. We just use | |
244 | obj-coff.c, and add what we need here. */ | |
245 | { "comm", ppc_comm, 0 }, | |
246 | { "lcomm", ppc_comm, 1 }, | |
247 | { "bb", ppc_bb, 0 }, | |
248 | { "bc", ppc_bc, 0 }, | |
249 | { "bf", ppc_bf, 0 }, | |
250 | { "bi", ppc_biei, 0 }, | |
251 | { "bs", ppc_bs, 0 }, | |
252 | { "csect", ppc_csect, 0 }, | |
85645aed | 253 | { "dwsect", ppc_dwsect, 0 }, |
252b5132 RH |
254 | { "data", ppc_section, 'd' }, |
255 | { "eb", ppc_eb, 0 }, | |
256 | { "ec", ppc_ec, 0 }, | |
257 | { "ef", ppc_ef, 0 }, | |
258 | { "ei", ppc_biei, 1 }, | |
259 | { "es", ppc_es, 0 }, | |
260 | { "extern", ppc_extern, 0 }, | |
261 | { "function", ppc_function, 0 }, | |
262 | { "lglobl", ppc_lglobl, 0 }, | |
c865e45b | 263 | { "ref", ppc_ref, 0 }, |
252b5132 RH |
264 | { "rename", ppc_rename, 0 }, |
265 | { "section", ppc_named_section, 0 }, | |
266 | { "stabx", ppc_stabx, 0 }, | |
267 | { "text", ppc_section, 't' }, | |
268 | { "toc", ppc_toc, 0 }, | |
269 | { "long", ppc_xcoff_cons, 2 }, | |
7f6d05e8 | 270 | { "llong", ppc_xcoff_cons, 3 }, |
252b5132 RH |
271 | { "word", ppc_xcoff_cons, 1 }, |
272 | { "short", ppc_xcoff_cons, 1 }, | |
273 | { "vbyte", ppc_vbyte, 0 }, | |
274 | #endif | |
275 | ||
276 | #ifdef OBJ_ELF | |
0baf16f2 AM |
277 | { "llong", ppc_elf_cons, 8 }, |
278 | { "quad", ppc_elf_cons, 8 }, | |
252b5132 RH |
279 | { "long", ppc_elf_cons, 4 }, |
280 | { "word", ppc_elf_cons, 2 }, | |
281 | { "short", ppc_elf_cons, 2 }, | |
282 | { "rdata", ppc_elf_rdata, 0 }, | |
283 | { "rodata", ppc_elf_rdata, 0 }, | |
284 | { "lcomm", ppc_elf_lcomm, 0 }, | |
285 | #endif | |
286 | ||
287 | #ifdef TE_PE | |
99a814a1 | 288 | /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */ |
252b5132 RH |
289 | { "previous", ppc_previous, 0 }, |
290 | { "pdata", ppc_pdata, 0 }, | |
291 | { "ydata", ppc_ydata, 0 }, | |
292 | { "reldata", ppc_reldata, 0 }, | |
293 | { "rdata", ppc_rdata, 0 }, | |
294 | { "ualong", ppc_ualong, 0 }, | |
295 | { "znop", ppc_znop, 0 }, | |
296 | { "comm", ppc_pe_comm, 0 }, | |
297 | { "lcomm", ppc_pe_comm, 1 }, | |
298 | { "section", ppc_pe_section, 0 }, | |
299 | { "function", ppc_pe_function,0 }, | |
300 | { "tocd", ppc_pe_tocd, 0 }, | |
301 | #endif | |
302 | ||
0baf16f2 | 303 | #if defined (OBJ_XCOFF) || defined (OBJ_ELF) |
252b5132 | 304 | { "tc", ppc_tc, 0 }, |
0baf16f2 AM |
305 | { "machine", ppc_machine, 0 }, |
306 | #endif | |
252b5132 RH |
307 | |
308 | { NULL, NULL, 0 } | |
309 | }; | |
310 | ||
311 | \f | |
99a814a1 AM |
312 | /* Predefined register names if -mregnames (or default for Windows NT). |
313 | In general, there are lots of them, in an attempt to be compatible | |
314 | with a number of other Windows NT assemblers. */ | |
252b5132 RH |
315 | |
316 | /* Structure to hold information about predefined registers. */ | |
317 | struct pd_reg | |
318 | { | |
319 | char *name; | |
320 | int value; | |
321 | }; | |
322 | ||
323 | /* List of registers that are pre-defined: | |
324 | ||
325 | Each general register has predefined names of the form: | |
326 | 1. r<reg_num> which has the value <reg_num>. | |
327 | 2. r.<reg_num> which has the value <reg_num>. | |
328 | ||
252b5132 RH |
329 | Each floating point register has predefined names of the form: |
330 | 1. f<reg_num> which has the value <reg_num>. | |
331 | 2. f.<reg_num> which has the value <reg_num>. | |
332 | ||
7a899fff C |
333 | Each vector unit register has predefined names of the form: |
334 | 1. v<reg_num> which has the value <reg_num>. | |
335 | 2. v.<reg_num> which has the value <reg_num>. | |
336 | ||
252b5132 RH |
337 | Each condition register has predefined names of the form: |
338 | 1. cr<reg_num> which has the value <reg_num>. | |
339 | 2. cr.<reg_num> which has the value <reg_num>. | |
340 | ||
341 | There are individual registers as well: | |
342 | sp or r.sp has the value 1 | |
343 | rtoc or r.toc has the value 2 | |
344 | fpscr has the value 0 | |
345 | xer has the value 1 | |
346 | lr has the value 8 | |
347 | ctr has the value 9 | |
348 | pmr has the value 0 | |
349 | dar has the value 19 | |
350 | dsisr has the value 18 | |
351 | dec has the value 22 | |
352 | sdr1 has the value 25 | |
353 | srr0 has the value 26 | |
354 | srr1 has the value 27 | |
355 | ||
81d4177b | 356 | The table is sorted. Suitable for searching by a binary search. */ |
252b5132 RH |
357 | |
358 | static const struct pd_reg pre_defined_registers[] = | |
359 | { | |
360 | { "cr.0", 0 }, /* Condition Registers */ | |
361 | { "cr.1", 1 }, | |
362 | { "cr.2", 2 }, | |
363 | { "cr.3", 3 }, | |
364 | { "cr.4", 4 }, | |
365 | { "cr.5", 5 }, | |
366 | { "cr.6", 6 }, | |
367 | { "cr.7", 7 }, | |
368 | ||
369 | { "cr0", 0 }, | |
370 | { "cr1", 1 }, | |
371 | { "cr2", 2 }, | |
372 | { "cr3", 3 }, | |
373 | { "cr4", 4 }, | |
374 | { "cr5", 5 }, | |
375 | { "cr6", 6 }, | |
376 | { "cr7", 7 }, | |
377 | ||
378 | { "ctr", 9 }, | |
379 | ||
380 | { "dar", 19 }, /* Data Access Register */ | |
381 | { "dec", 22 }, /* Decrementer */ | |
382 | { "dsisr", 18 }, /* Data Storage Interrupt Status Register */ | |
383 | ||
384 | { "f.0", 0 }, /* Floating point registers */ | |
81d4177b KH |
385 | { "f.1", 1 }, |
386 | { "f.10", 10 }, | |
387 | { "f.11", 11 }, | |
388 | { "f.12", 12 }, | |
389 | { "f.13", 13 }, | |
390 | { "f.14", 14 }, | |
391 | { "f.15", 15 }, | |
392 | { "f.16", 16 }, | |
393 | { "f.17", 17 }, | |
394 | { "f.18", 18 }, | |
395 | { "f.19", 19 }, | |
396 | { "f.2", 2 }, | |
397 | { "f.20", 20 }, | |
398 | { "f.21", 21 }, | |
399 | { "f.22", 22 }, | |
400 | { "f.23", 23 }, | |
401 | { "f.24", 24 }, | |
402 | { "f.25", 25 }, | |
403 | { "f.26", 26 }, | |
404 | { "f.27", 27 }, | |
405 | { "f.28", 28 }, | |
406 | { "f.29", 29 }, | |
407 | { "f.3", 3 }, | |
252b5132 RH |
408 | { "f.30", 30 }, |
409 | { "f.31", 31 }, | |
066be9f7 PB |
410 | |
411 | { "f.32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */ | |
412 | { "f.33", 33 }, | |
413 | { "f.34", 34 }, | |
414 | { "f.35", 35 }, | |
415 | { "f.36", 36 }, | |
416 | { "f.37", 37 }, | |
417 | { "f.38", 38 }, | |
418 | { "f.39", 39 }, | |
81d4177b | 419 | { "f.4", 4 }, |
066be9f7 PB |
420 | { "f.40", 40 }, |
421 | { "f.41", 41 }, | |
422 | { "f.42", 42 }, | |
423 | { "f.43", 43 }, | |
424 | { "f.44", 44 }, | |
425 | { "f.45", 45 }, | |
426 | { "f.46", 46 }, | |
427 | { "f.47", 47 }, | |
428 | { "f.48", 48 }, | |
429 | { "f.49", 49 }, | |
81d4177b | 430 | { "f.5", 5 }, |
066be9f7 PB |
431 | { "f.50", 50 }, |
432 | { "f.51", 51 }, | |
433 | { "f.52", 52 }, | |
434 | { "f.53", 53 }, | |
435 | { "f.54", 54 }, | |
436 | { "f.55", 55 }, | |
437 | { "f.56", 56 }, | |
438 | { "f.57", 57 }, | |
439 | { "f.58", 58 }, | |
440 | { "f.59", 59 }, | |
81d4177b | 441 | { "f.6", 6 }, |
066be9f7 PB |
442 | { "f.60", 60 }, |
443 | { "f.61", 61 }, | |
444 | { "f.62", 62 }, | |
445 | { "f.63", 63 }, | |
81d4177b KH |
446 | { "f.7", 7 }, |
447 | { "f.8", 8 }, | |
448 | { "f.9", 9 }, | |
449 | ||
450 | { "f0", 0 }, | |
451 | { "f1", 1 }, | |
452 | { "f10", 10 }, | |
453 | { "f11", 11 }, | |
454 | { "f12", 12 }, | |
455 | { "f13", 13 }, | |
456 | { "f14", 14 }, | |
457 | { "f15", 15 }, | |
458 | { "f16", 16 }, | |
459 | { "f17", 17 }, | |
460 | { "f18", 18 }, | |
461 | { "f19", 19 }, | |
462 | { "f2", 2 }, | |
463 | { "f20", 20 }, | |
464 | { "f21", 21 }, | |
465 | { "f22", 22 }, | |
466 | { "f23", 23 }, | |
467 | { "f24", 24 }, | |
468 | { "f25", 25 }, | |
469 | { "f26", 26 }, | |
470 | { "f27", 27 }, | |
471 | { "f28", 28 }, | |
472 | { "f29", 29 }, | |
473 | { "f3", 3 }, | |
252b5132 RH |
474 | { "f30", 30 }, |
475 | { "f31", 31 }, | |
066be9f7 PB |
476 | |
477 | { "f32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */ | |
478 | { "f33", 33 }, | |
479 | { "f34", 34 }, | |
480 | { "f35", 35 }, | |
481 | { "f36", 36 }, | |
482 | { "f37", 37 }, | |
483 | { "f38", 38 }, | |
484 | { "f39", 39 }, | |
81d4177b | 485 | { "f4", 4 }, |
066be9f7 PB |
486 | { "f40", 40 }, |
487 | { "f41", 41 }, | |
488 | { "f42", 42 }, | |
489 | { "f43", 43 }, | |
490 | { "f44", 44 }, | |
491 | { "f45", 45 }, | |
492 | { "f46", 46 }, | |
493 | { "f47", 47 }, | |
494 | { "f48", 48 }, | |
495 | { "f49", 49 }, | |
81d4177b | 496 | { "f5", 5 }, |
066be9f7 PB |
497 | { "f50", 50 }, |
498 | { "f51", 51 }, | |
499 | { "f52", 52 }, | |
500 | { "f53", 53 }, | |
501 | { "f54", 54 }, | |
502 | { "f55", 55 }, | |
503 | { "f56", 56 }, | |
504 | { "f57", 57 }, | |
505 | { "f58", 58 }, | |
506 | { "f59", 59 }, | |
81d4177b | 507 | { "f6", 6 }, |
066be9f7 PB |
508 | { "f60", 60 }, |
509 | { "f61", 61 }, | |
510 | { "f62", 62 }, | |
511 | { "f63", 63 }, | |
81d4177b KH |
512 | { "f7", 7 }, |
513 | { "f8", 8 }, | |
514 | { "f9", 9 }, | |
252b5132 RH |
515 | |
516 | { "fpscr", 0 }, | |
517 | ||
c3d65c1c BE |
518 | /* Quantization registers used with pair single instructions. */ |
519 | { "gqr.0", 0 }, | |
520 | { "gqr.1", 1 }, | |
521 | { "gqr.2", 2 }, | |
522 | { "gqr.3", 3 }, | |
523 | { "gqr.4", 4 }, | |
524 | { "gqr.5", 5 }, | |
525 | { "gqr.6", 6 }, | |
526 | { "gqr.7", 7 }, | |
527 | { "gqr0", 0 }, | |
528 | { "gqr1", 1 }, | |
529 | { "gqr2", 2 }, | |
530 | { "gqr3", 3 }, | |
531 | { "gqr4", 4 }, | |
532 | { "gqr5", 5 }, | |
533 | { "gqr6", 6 }, | |
534 | { "gqr7", 7 }, | |
535 | ||
252b5132 RH |
536 | { "lr", 8 }, /* Link Register */ |
537 | ||
538 | { "pmr", 0 }, | |
539 | ||
540 | { "r.0", 0 }, /* General Purpose Registers */ | |
541 | { "r.1", 1 }, | |
542 | { "r.10", 10 }, | |
543 | { "r.11", 11 }, | |
544 | { "r.12", 12 }, | |
545 | { "r.13", 13 }, | |
546 | { "r.14", 14 }, | |
547 | { "r.15", 15 }, | |
548 | { "r.16", 16 }, | |
549 | { "r.17", 17 }, | |
550 | { "r.18", 18 }, | |
551 | { "r.19", 19 }, | |
552 | { "r.2", 2 }, | |
553 | { "r.20", 20 }, | |
554 | { "r.21", 21 }, | |
555 | { "r.22", 22 }, | |
556 | { "r.23", 23 }, | |
557 | { "r.24", 24 }, | |
558 | { "r.25", 25 }, | |
559 | { "r.26", 26 }, | |
560 | { "r.27", 27 }, | |
561 | { "r.28", 28 }, | |
562 | { "r.29", 29 }, | |
563 | { "r.3", 3 }, | |
564 | { "r.30", 30 }, | |
565 | { "r.31", 31 }, | |
566 | { "r.4", 4 }, | |
567 | { "r.5", 5 }, | |
568 | { "r.6", 6 }, | |
569 | { "r.7", 7 }, | |
570 | { "r.8", 8 }, | |
571 | { "r.9", 9 }, | |
572 | ||
573 | { "r.sp", 1 }, /* Stack Pointer */ | |
574 | ||
575 | { "r.toc", 2 }, /* Pointer to the table of contents */ | |
576 | ||
577 | { "r0", 0 }, /* More general purpose registers */ | |
578 | { "r1", 1 }, | |
579 | { "r10", 10 }, | |
580 | { "r11", 11 }, | |
581 | { "r12", 12 }, | |
582 | { "r13", 13 }, | |
583 | { "r14", 14 }, | |
584 | { "r15", 15 }, | |
585 | { "r16", 16 }, | |
586 | { "r17", 17 }, | |
587 | { "r18", 18 }, | |
588 | { "r19", 19 }, | |
589 | { "r2", 2 }, | |
590 | { "r20", 20 }, | |
591 | { "r21", 21 }, | |
592 | { "r22", 22 }, | |
593 | { "r23", 23 }, | |
594 | { "r24", 24 }, | |
595 | { "r25", 25 }, | |
596 | { "r26", 26 }, | |
597 | { "r27", 27 }, | |
598 | { "r28", 28 }, | |
599 | { "r29", 29 }, | |
600 | { "r3", 3 }, | |
601 | { "r30", 30 }, | |
602 | { "r31", 31 }, | |
603 | { "r4", 4 }, | |
604 | { "r5", 5 }, | |
605 | { "r6", 6 }, | |
606 | { "r7", 7 }, | |
607 | { "r8", 8 }, | |
608 | { "r9", 9 }, | |
609 | ||
610 | { "rtoc", 2 }, /* Table of contents */ | |
611 | ||
612 | { "sdr1", 25 }, /* Storage Description Register 1 */ | |
613 | ||
614 | { "sp", 1 }, | |
615 | ||
616 | { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */ | |
617 | { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */ | |
81d4177b | 618 | |
066be9f7 | 619 | { "v.0", 0 }, /* Vector (Altivec/VMX) registers */ |
81d4177b KH |
620 | { "v.1", 1 }, |
621 | { "v.10", 10 }, | |
622 | { "v.11", 11 }, | |
623 | { "v.12", 12 }, | |
624 | { "v.13", 13 }, | |
625 | { "v.14", 14 }, | |
626 | { "v.15", 15 }, | |
627 | { "v.16", 16 }, | |
628 | { "v.17", 17 }, | |
629 | { "v.18", 18 }, | |
630 | { "v.19", 19 }, | |
631 | { "v.2", 2 }, | |
632 | { "v.20", 20 }, | |
633 | { "v.21", 21 }, | |
634 | { "v.22", 22 }, | |
635 | { "v.23", 23 }, | |
636 | { "v.24", 24 }, | |
637 | { "v.25", 25 }, | |
638 | { "v.26", 26 }, | |
639 | { "v.27", 27 }, | |
640 | { "v.28", 28 }, | |
641 | { "v.29", 29 }, | |
642 | { "v.3", 3 }, | |
7a899fff C |
643 | { "v.30", 30 }, |
644 | { "v.31", 31 }, | |
81d4177b KH |
645 | { "v.4", 4 }, |
646 | { "v.5", 5 }, | |
647 | { "v.6", 6 }, | |
648 | { "v.7", 7 }, | |
649 | { "v.8", 8 }, | |
650 | { "v.9", 9 }, | |
7a899fff C |
651 | |
652 | { "v0", 0 }, | |
81d4177b KH |
653 | { "v1", 1 }, |
654 | { "v10", 10 }, | |
655 | { "v11", 11 }, | |
656 | { "v12", 12 }, | |
657 | { "v13", 13 }, | |
658 | { "v14", 14 }, | |
659 | { "v15", 15 }, | |
660 | { "v16", 16 }, | |
661 | { "v17", 17 }, | |
662 | { "v18", 18 }, | |
663 | { "v19", 19 }, | |
664 | { "v2", 2 }, | |
665 | { "v20", 20 }, | |
666 | { "v21", 21 }, | |
667 | { "v22", 22 }, | |
668 | { "v23", 23 }, | |
669 | { "v24", 24 }, | |
670 | { "v25", 25 }, | |
671 | { "v26", 26 }, | |
672 | { "v27", 27 }, | |
673 | { "v28", 28 }, | |
674 | { "v29", 29 }, | |
675 | { "v3", 3 }, | |
7a899fff C |
676 | { "v30", 30 }, |
677 | { "v31", 31 }, | |
81d4177b KH |
678 | { "v4", 4 }, |
679 | { "v5", 5 }, | |
680 | { "v6", 6 }, | |
681 | { "v7", 7 }, | |
682 | { "v8", 8 }, | |
7a899fff | 683 | { "v9", 9 }, |
252b5132 | 684 | |
066be9f7 PB |
685 | { "vs.0", 0 }, /* Vector Scalar (VSX) registers (ISA 2.06). */ |
686 | { "vs.1", 1 }, | |
687 | { "vs.10", 10 }, | |
688 | { "vs.11", 11 }, | |
689 | { "vs.12", 12 }, | |
690 | { "vs.13", 13 }, | |
691 | { "vs.14", 14 }, | |
692 | { "vs.15", 15 }, | |
693 | { "vs.16", 16 }, | |
694 | { "vs.17", 17 }, | |
695 | { "vs.18", 18 }, | |
696 | { "vs.19", 19 }, | |
697 | { "vs.2", 2 }, | |
698 | { "vs.20", 20 }, | |
699 | { "vs.21", 21 }, | |
700 | { "vs.22", 22 }, | |
701 | { "vs.23", 23 }, | |
702 | { "vs.24", 24 }, | |
703 | { "vs.25", 25 }, | |
704 | { "vs.26", 26 }, | |
705 | { "vs.27", 27 }, | |
706 | { "vs.28", 28 }, | |
707 | { "vs.29", 29 }, | |
708 | { "vs.3", 3 }, | |
709 | { "vs.30", 30 }, | |
710 | { "vs.31", 31 }, | |
711 | { "vs.32", 32 }, | |
712 | { "vs.33", 33 }, | |
713 | { "vs.34", 34 }, | |
714 | { "vs.35", 35 }, | |
715 | { "vs.36", 36 }, | |
716 | { "vs.37", 37 }, | |
717 | { "vs.38", 38 }, | |
718 | { "vs.39", 39 }, | |
719 | { "vs.4", 4 }, | |
720 | { "vs.40", 40 }, | |
721 | { "vs.41", 41 }, | |
722 | { "vs.42", 42 }, | |
723 | { "vs.43", 43 }, | |
724 | { "vs.44", 44 }, | |
725 | { "vs.45", 45 }, | |
726 | { "vs.46", 46 }, | |
727 | { "vs.47", 47 }, | |
728 | { "vs.48", 48 }, | |
729 | { "vs.49", 49 }, | |
730 | { "vs.5", 5 }, | |
731 | { "vs.50", 50 }, | |
732 | { "vs.51", 51 }, | |
733 | { "vs.52", 52 }, | |
734 | { "vs.53", 53 }, | |
735 | { "vs.54", 54 }, | |
736 | { "vs.55", 55 }, | |
737 | { "vs.56", 56 }, | |
738 | { "vs.57", 57 }, | |
739 | { "vs.58", 58 }, | |
740 | { "vs.59", 59 }, | |
741 | { "vs.6", 6 }, | |
742 | { "vs.60", 60 }, | |
743 | { "vs.61", 61 }, | |
744 | { "vs.62", 62 }, | |
745 | { "vs.63", 63 }, | |
746 | { "vs.7", 7 }, | |
747 | { "vs.8", 8 }, | |
748 | { "vs.9", 9 }, | |
749 | ||
750 | { "vs0", 0 }, | |
751 | { "vs1", 1 }, | |
752 | { "vs10", 10 }, | |
753 | { "vs11", 11 }, | |
754 | { "vs12", 12 }, | |
755 | { "vs13", 13 }, | |
756 | { "vs14", 14 }, | |
757 | { "vs15", 15 }, | |
758 | { "vs16", 16 }, | |
759 | { "vs17", 17 }, | |
760 | { "vs18", 18 }, | |
761 | { "vs19", 19 }, | |
762 | { "vs2", 2 }, | |
763 | { "vs20", 20 }, | |
764 | { "vs21", 21 }, | |
765 | { "vs22", 22 }, | |
766 | { "vs23", 23 }, | |
767 | { "vs24", 24 }, | |
768 | { "vs25", 25 }, | |
769 | { "vs26", 26 }, | |
770 | { "vs27", 27 }, | |
771 | { "vs28", 28 }, | |
772 | { "vs29", 29 }, | |
773 | { "vs3", 3 }, | |
774 | { "vs30", 30 }, | |
775 | { "vs31", 31 }, | |
776 | { "vs32", 32 }, | |
777 | { "vs33", 33 }, | |
778 | { "vs34", 34 }, | |
779 | { "vs35", 35 }, | |
780 | { "vs36", 36 }, | |
781 | { "vs37", 37 }, | |
782 | { "vs38", 38 }, | |
783 | { "vs39", 39 }, | |
784 | { "vs4", 4 }, | |
785 | { "vs40", 40 }, | |
786 | { "vs41", 41 }, | |
787 | { "vs42", 42 }, | |
788 | { "vs43", 43 }, | |
789 | { "vs44", 44 }, | |
790 | { "vs45", 45 }, | |
791 | { "vs46", 46 }, | |
792 | { "vs47", 47 }, | |
793 | { "vs48", 48 }, | |
794 | { "vs49", 49 }, | |
795 | { "vs5", 5 }, | |
796 | { "vs50", 50 }, | |
797 | { "vs51", 51 }, | |
798 | { "vs52", 52 }, | |
799 | { "vs53", 53 }, | |
800 | { "vs54", 54 }, | |
801 | { "vs55", 55 }, | |
802 | { "vs56", 56 }, | |
803 | { "vs57", 57 }, | |
804 | { "vs58", 58 }, | |
805 | { "vs59", 59 }, | |
806 | { "vs6", 6 }, | |
807 | { "vs60", 60 }, | |
808 | { "vs61", 61 }, | |
809 | { "vs62", 62 }, | |
810 | { "vs63", 63 }, | |
811 | { "vs7", 7 }, | |
812 | { "vs8", 8 }, | |
813 | { "vs9", 9 }, | |
814 | ||
252b5132 RH |
815 | { "xer", 1 }, |
816 | ||
817 | }; | |
818 | ||
bc805888 | 819 | #define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg)) |
252b5132 RH |
820 | |
821 | /* Given NAME, find the register number associated with that name, return | |
822 | the integer value associated with the given name or -1 on failure. */ | |
823 | ||
252b5132 | 824 | static int |
98027b10 | 825 | reg_name_search (const struct pd_reg *regs, int regcount, const char *name) |
252b5132 RH |
826 | { |
827 | int middle, low, high; | |
828 | int cmp; | |
829 | ||
830 | low = 0; | |
831 | high = regcount - 1; | |
832 | ||
833 | do | |
834 | { | |
835 | middle = (low + high) / 2; | |
836 | cmp = strcasecmp (name, regs[middle].name); | |
837 | if (cmp < 0) | |
838 | high = middle - 1; | |
839 | else if (cmp > 0) | |
840 | low = middle + 1; | |
841 | else | |
842 | return regs[middle].value; | |
843 | } | |
844 | while (low <= high); | |
845 | ||
846 | return -1; | |
847 | } | |
848 | ||
849 | /* | |
99a814a1 | 850 | * Summary of register_name. |
252b5132 RH |
851 | * |
852 | * in: Input_line_pointer points to 1st char of operand. | |
853 | * | |
854 | * out: A expressionS. | |
855 | * The operand may have been a register: in this case, X_op == O_register, | |
856 | * X_add_number is set to the register number, and truth is returned. | |
857 | * Input_line_pointer->(next non-blank) char after operand, or is in its | |
858 | * original state. | |
859 | */ | |
860 | ||
b34976b6 | 861 | static bfd_boolean |
98027b10 | 862 | register_name (expressionS *expressionP) |
252b5132 RH |
863 | { |
864 | int reg_number; | |
865 | char *name; | |
866 | char *start; | |
867 | char c; | |
868 | ||
99a814a1 | 869 | /* Find the spelling of the operand. */ |
252b5132 | 870 | start = name = input_line_pointer; |
3882b010 | 871 | if (name[0] == '%' && ISALPHA (name[1])) |
252b5132 RH |
872 | name = ++input_line_pointer; |
873 | ||
3882b010 | 874 | else if (!reg_names_p || !ISALPHA (name[0])) |
b34976b6 | 875 | return FALSE; |
252b5132 RH |
876 | |
877 | c = get_symbol_end (); | |
878 | reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name); | |
879 | ||
468cced8 AM |
880 | /* Put back the delimiting char. */ |
881 | *input_line_pointer = c; | |
882 | ||
99a814a1 | 883 | /* Look to see if it's in the register table. */ |
81d4177b | 884 | if (reg_number >= 0) |
252b5132 RH |
885 | { |
886 | expressionP->X_op = O_register; | |
887 | expressionP->X_add_number = reg_number; | |
81d4177b | 888 | |
99a814a1 | 889 | /* Make the rest nice. */ |
252b5132 RH |
890 | expressionP->X_add_symbol = NULL; |
891 | expressionP->X_op_symbol = NULL; | |
b34976b6 | 892 | return TRUE; |
252b5132 | 893 | } |
468cced8 AM |
894 | |
895 | /* Reset the line as if we had not done anything. */ | |
896 | input_line_pointer = start; | |
b34976b6 | 897 | return FALSE; |
252b5132 RH |
898 | } |
899 | \f | |
900 | /* This function is called for each symbol seen in an expression. It | |
901 | handles the special parsing which PowerPC assemblers are supposed | |
902 | to use for condition codes. */ | |
903 | ||
904 | /* Whether to do the special parsing. */ | |
b34976b6 | 905 | static bfd_boolean cr_operand; |
252b5132 RH |
906 | |
907 | /* Names to recognize in a condition code. This table is sorted. */ | |
908 | static const struct pd_reg cr_names[] = | |
909 | { | |
910 | { "cr0", 0 }, | |
911 | { "cr1", 1 }, | |
912 | { "cr2", 2 }, | |
913 | { "cr3", 3 }, | |
914 | { "cr4", 4 }, | |
915 | { "cr5", 5 }, | |
916 | { "cr6", 6 }, | |
917 | { "cr7", 7 }, | |
918 | { "eq", 2 }, | |
919 | { "gt", 1 }, | |
920 | { "lt", 0 }, | |
921 | { "so", 3 }, | |
922 | { "un", 3 } | |
923 | }; | |
924 | ||
925 | /* Parsing function. This returns non-zero if it recognized an | |
926 | expression. */ | |
927 | ||
928 | int | |
91d6fa6a | 929 | ppc_parse_name (const char *name, expressionS *exp) |
252b5132 RH |
930 | { |
931 | int val; | |
932 | ||
933 | if (! cr_operand) | |
934 | return 0; | |
935 | ||
13abbae3 AM |
936 | if (*name == '%') |
937 | ++name; | |
252b5132 RH |
938 | val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0], |
939 | name); | |
940 | if (val < 0) | |
941 | return 0; | |
942 | ||
91d6fa6a NC |
943 | exp->X_op = O_constant; |
944 | exp->X_add_number = val; | |
252b5132 RH |
945 | |
946 | return 1; | |
947 | } | |
948 | \f | |
949 | /* Local variables. */ | |
950 | ||
2b3c4602 AM |
951 | /* Whether to target xcoff64/elf64. */ |
952 | static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64; | |
7f6d05e8 | 953 | |
252b5132 RH |
954 | /* Opcode hash table. */ |
955 | static struct hash_control *ppc_hash; | |
956 | ||
957 | /* Macro hash table. */ | |
958 | static struct hash_control *ppc_macro_hash; | |
959 | ||
960 | #ifdef OBJ_ELF | |
99a814a1 | 961 | /* What type of shared library support to use. */ |
5d6f4f16 | 962 | static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE; |
252b5132 | 963 | |
99a814a1 | 964 | /* Flags to set in the elf header. */ |
252b5132 RH |
965 | static flagword ppc_flags = 0; |
966 | ||
967 | /* Whether this is Solaris or not. */ | |
968 | #ifdef TARGET_SOLARIS_COMMENT | |
b34976b6 | 969 | #define SOLARIS_P TRUE |
252b5132 | 970 | #else |
b34976b6 | 971 | #define SOLARIS_P FALSE |
252b5132 RH |
972 | #endif |
973 | ||
b34976b6 | 974 | static bfd_boolean msolaris = SOLARIS_P; |
252b5132 RH |
975 | #endif |
976 | ||
977 | #ifdef OBJ_XCOFF | |
978 | ||
979 | /* The RS/6000 assembler uses the .csect pseudo-op to generate code | |
980 | using a bunch of different sections. These assembler sections, | |
981 | however, are all encompassed within the .text or .data sections of | |
982 | the final output file. We handle this by using different | |
983 | subsegments within these main segments. */ | |
984 | ||
985 | /* Next subsegment to allocate within the .text segment. */ | |
986 | static subsegT ppc_text_subsegment = 2; | |
987 | ||
988 | /* Linked list of csects in the text section. */ | |
989 | static symbolS *ppc_text_csects; | |
990 | ||
991 | /* Next subsegment to allocate within the .data segment. */ | |
992 | static subsegT ppc_data_subsegment = 2; | |
993 | ||
994 | /* Linked list of csects in the data section. */ | |
995 | static symbolS *ppc_data_csects; | |
996 | ||
997 | /* The current csect. */ | |
998 | static symbolS *ppc_current_csect; | |
999 | ||
1000 | /* The RS/6000 assembler uses a TOC which holds addresses of functions | |
1001 | and variables. Symbols are put in the TOC with the .tc pseudo-op. | |
1002 | A special relocation is used when accessing TOC entries. We handle | |
1003 | the TOC as a subsegment within the .data segment. We set it up if | |
1004 | we see a .toc pseudo-op, and save the csect symbol here. */ | |
1005 | static symbolS *ppc_toc_csect; | |
1006 | ||
1007 | /* The first frag in the TOC subsegment. */ | |
1008 | static fragS *ppc_toc_frag; | |
1009 | ||
1010 | /* The first frag in the first subsegment after the TOC in the .data | |
1011 | segment. NULL if there are no subsegments after the TOC. */ | |
1012 | static fragS *ppc_after_toc_frag; | |
1013 | ||
1014 | /* The current static block. */ | |
1015 | static symbolS *ppc_current_block; | |
1016 | ||
1017 | /* The COFF debugging section; set by md_begin. This is not the | |
1018 | .debug section, but is instead the secret BFD section which will | |
1019 | cause BFD to set the section number of a symbol to N_DEBUG. */ | |
1020 | static asection *ppc_coff_debug_section; | |
1021 | ||
85645aed TG |
1022 | /* Structure to set the length field of the dwarf sections. */ |
1023 | struct dw_subsection { | |
1024 | /* Subsections are simply linked. */ | |
1025 | struct dw_subsection *link; | |
1026 | ||
1027 | /* The subsection number. */ | |
1028 | subsegT subseg; | |
1029 | ||
1030 | /* Expression to compute the length of the section. */ | |
1031 | expressionS end_exp; | |
1032 | }; | |
1033 | ||
1034 | static struct dw_section { | |
1035 | /* Corresponding section. */ | |
1036 | segT sect; | |
1037 | ||
1038 | /* Simply linked list of subsections with a label. */ | |
1039 | struct dw_subsection *list_subseg; | |
1040 | ||
1041 | /* The anonymous subsection. */ | |
1042 | struct dw_subsection *anon_subseg; | |
1043 | } dw_sections[XCOFF_DWSECT_NBR_NAMES]; | |
252b5132 RH |
1044 | #endif /* OBJ_XCOFF */ |
1045 | ||
1046 | #ifdef TE_PE | |
1047 | ||
1048 | /* Various sections that we need for PE coff support. */ | |
1049 | static segT ydata_section; | |
1050 | static segT pdata_section; | |
1051 | static segT reldata_section; | |
1052 | static segT rdata_section; | |
1053 | static segT tocdata_section; | |
1054 | ||
81d4177b | 1055 | /* The current section and the previous section. See ppc_previous. */ |
252b5132 RH |
1056 | static segT ppc_previous_section; |
1057 | static segT ppc_current_section; | |
1058 | ||
1059 | #endif /* TE_PE */ | |
1060 | ||
1061 | #ifdef OBJ_ELF | |
1062 | symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */ | |
6a0c61b7 EZ |
1063 | #define PPC_APUINFO_ISEL 0x40 |
1064 | #define PPC_APUINFO_PMR 0x41 | |
1065 | #define PPC_APUINFO_RFMCI 0x42 | |
1066 | #define PPC_APUINFO_CACHELCK 0x43 | |
1067 | #define PPC_APUINFO_SPE 0x100 | |
1068 | #define PPC_APUINFO_EFS 0x101 | |
1069 | #define PPC_APUINFO_BRLOCK 0x102 | |
b9c361e0 | 1070 | #define PPC_APUINFO_VLE 0x104 |
6a0c61b7 | 1071 | |
b34976b6 AM |
1072 | /* |
1073 | * We keep a list of APUinfo | |
6a0c61b7 EZ |
1074 | */ |
1075 | unsigned long *ppc_apuinfo_list; | |
1076 | unsigned int ppc_apuinfo_num; | |
1077 | unsigned int ppc_apuinfo_num_alloc; | |
252b5132 RH |
1078 | #endif /* OBJ_ELF */ |
1079 | \f | |
1080 | #ifdef OBJ_ELF | |
15c1449b | 1081 | const char *const md_shortopts = "b:l:usm:K:VQ:"; |
252b5132 | 1082 | #else |
15c1449b | 1083 | const char *const md_shortopts = "um:"; |
252b5132 | 1084 | #endif |
cef4f754 | 1085 | #define OPTION_NOPS (OPTION_MD_BASE + 0) |
15c1449b | 1086 | const struct option md_longopts[] = { |
cef4f754 | 1087 | {"nops", required_argument, NULL, OPTION_NOPS}, |
252b5132 RH |
1088 | {NULL, no_argument, NULL, 0} |
1089 | }; | |
15c1449b | 1090 | const size_t md_longopts_size = sizeof (md_longopts); |
252b5132 | 1091 | |
b9c361e0 JL |
1092 | /* Convert the target integer stored in N bytes in BUF to a host |
1093 | integer, returning that value. */ | |
1094 | ||
1095 | static valueT | |
1096 | md_chars_to_number (char *buf, int n) | |
1097 | { | |
1098 | valueT result = 0; | |
1099 | unsigned char *p = (unsigned char *) buf; | |
1100 | ||
1101 | if (target_big_endian) | |
1102 | { | |
1103 | while (n--) | |
1104 | { | |
1105 | result <<= 8; | |
1106 | result |= (*p++ & 0xff); | |
1107 | } | |
1108 | } | |
1109 | else | |
1110 | { | |
1111 | while (n--) | |
1112 | { | |
1113 | result <<= 8; | |
1114 | result |= (p[n] & 0xff); | |
1115 | } | |
1116 | } | |
1117 | ||
1118 | return result; | |
1119 | } | |
1120 | ||
252b5132 | 1121 | int |
98027b10 | 1122 | md_parse_option (int c, char *arg) |
252b5132 | 1123 | { |
69fe9ce5 AM |
1124 | ppc_cpu_t new_cpu; |
1125 | ||
252b5132 RH |
1126 | switch (c) |
1127 | { | |
1128 | case 'u': | |
1129 | /* -u means that any undefined symbols should be treated as | |
1130 | external, which is the default for gas anyhow. */ | |
1131 | break; | |
1132 | ||
1133 | #ifdef OBJ_ELF | |
1134 | case 'l': | |
1135 | /* Solaris as takes -le (presumably for little endian). For completeness | |
99a814a1 | 1136 | sake, recognize -be also. */ |
252b5132 RH |
1137 | if (strcmp (arg, "e") == 0) |
1138 | { | |
1139 | target_big_endian = 0; | |
1140 | set_target_endian = 1; | |
b9c361e0 | 1141 | if (ppc_cpu & PPC_OPCODE_VLE) |
d6ed37ed | 1142 | as_bad (_("the use of -mvle requires big endian.")); |
252b5132 RH |
1143 | } |
1144 | else | |
1145 | return 0; | |
1146 | ||
1147 | break; | |
1148 | ||
1149 | case 'b': | |
1150 | if (strcmp (arg, "e") == 0) | |
1151 | { | |
1152 | target_big_endian = 1; | |
1153 | set_target_endian = 1; | |
1154 | } | |
1155 | else | |
1156 | return 0; | |
1157 | ||
1158 | break; | |
1159 | ||
1160 | case 'K': | |
99a814a1 | 1161 | /* Recognize -K PIC. */ |
252b5132 RH |
1162 | if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0) |
1163 | { | |
1164 | shlib = SHLIB_PIC; | |
1165 | ppc_flags |= EF_PPC_RELOCATABLE_LIB; | |
1166 | } | |
1167 | else | |
1168 | return 0; | |
1169 | ||
1170 | break; | |
1171 | #endif | |
1172 | ||
7f6d05e8 CP |
1173 | /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */ |
1174 | case 'a': | |
1175 | if (strcmp (arg, "64") == 0) | |
2a98c3a6 AM |
1176 | { |
1177 | #ifdef BFD64 | |
1178 | ppc_obj64 = 1; | |
d6ed37ed AM |
1179 | if (ppc_cpu & PPC_OPCODE_VLE) |
1180 | as_bad (_("the use of -mvle requires -a32.")); | |
2a98c3a6 AM |
1181 | #else |
1182 | as_fatal (_("%s unsupported"), "-a64"); | |
1183 | #endif | |
1184 | } | |
7f6d05e8 | 1185 | else if (strcmp (arg, "32") == 0) |
2b3c4602 | 1186 | ppc_obj64 = 0; |
7f6d05e8 CP |
1187 | else |
1188 | return 0; | |
1189 | break; | |
81d4177b | 1190 | |
252b5132 | 1191 | case 'm': |
b9c361e0 JL |
1192 | new_cpu = ppc_parse_cpu (ppc_cpu, arg); |
1193 | if (new_cpu != 0) | |
1194 | { | |
1195 | ppc_cpu = new_cpu; | |
d6ed37ed AM |
1196 | if (strcmp (arg, "vle") == 0) |
1197 | { | |
1198 | if (set_target_endian && target_big_endian == 0) | |
1199 | as_bad (_("the use of -mvle requires big endian.")); | |
1200 | if (ppc_obj64) | |
1201 | as_bad (_("the use of -mvle requires -a32.")); | |
1202 | } | |
b9c361e0 | 1203 | } |
252b5132 RH |
1204 | |
1205 | else if (strcmp (arg, "regnames") == 0) | |
b34976b6 | 1206 | reg_names_p = TRUE; |
252b5132 RH |
1207 | |
1208 | else if (strcmp (arg, "no-regnames") == 0) | |
b34976b6 | 1209 | reg_names_p = FALSE; |
252b5132 RH |
1210 | |
1211 | #ifdef OBJ_ELF | |
99a814a1 AM |
1212 | /* -mrelocatable/-mrelocatable-lib -- warn about initializations |
1213 | that require relocation. */ | |
252b5132 RH |
1214 | else if (strcmp (arg, "relocatable") == 0) |
1215 | { | |
5d6f4f16 | 1216 | shlib = SHLIB_MRELOCATABLE; |
252b5132 RH |
1217 | ppc_flags |= EF_PPC_RELOCATABLE; |
1218 | } | |
1219 | ||
1220 | else if (strcmp (arg, "relocatable-lib") == 0) | |
1221 | { | |
5d6f4f16 | 1222 | shlib = SHLIB_MRELOCATABLE; |
252b5132 RH |
1223 | ppc_flags |= EF_PPC_RELOCATABLE_LIB; |
1224 | } | |
1225 | ||
99a814a1 | 1226 | /* -memb, set embedded bit. */ |
252b5132 RH |
1227 | else if (strcmp (arg, "emb") == 0) |
1228 | ppc_flags |= EF_PPC_EMB; | |
1229 | ||
cc643b88 | 1230 | /* -mlittle/-mbig set the endianness. */ |
99a814a1 AM |
1231 | else if (strcmp (arg, "little") == 0 |
1232 | || strcmp (arg, "little-endian") == 0) | |
252b5132 RH |
1233 | { |
1234 | target_big_endian = 0; | |
1235 | set_target_endian = 1; | |
b9c361e0 | 1236 | if (ppc_cpu & PPC_OPCODE_VLE) |
d6ed37ed | 1237 | as_bad (_("the use of -mvle requires big endian.")); |
252b5132 RH |
1238 | } |
1239 | ||
1240 | else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0) | |
1241 | { | |
1242 | target_big_endian = 1; | |
1243 | set_target_endian = 1; | |
1244 | } | |
1245 | ||
1246 | else if (strcmp (arg, "solaris") == 0) | |
1247 | { | |
b34976b6 | 1248 | msolaris = TRUE; |
252b5132 RH |
1249 | ppc_comment_chars = ppc_solaris_comment_chars; |
1250 | } | |
1251 | ||
1252 | else if (strcmp (arg, "no-solaris") == 0) | |
1253 | { | |
b34976b6 | 1254 | msolaris = FALSE; |
252b5132 RH |
1255 | ppc_comment_chars = ppc_eabi_comment_chars; |
1256 | } | |
1257 | #endif | |
1258 | else | |
1259 | { | |
1260 | as_bad (_("invalid switch -m%s"), arg); | |
1261 | return 0; | |
1262 | } | |
1263 | break; | |
1264 | ||
1265 | #ifdef OBJ_ELF | |
1266 | /* -V: SVR4 argument to print version ID. */ | |
1267 | case 'V': | |
1268 | print_version_id (); | |
1269 | break; | |
1270 | ||
1271 | /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section | |
1272 | should be emitted or not. FIXME: Not implemented. */ | |
1273 | case 'Q': | |
1274 | break; | |
1275 | ||
1276 | /* Solaris takes -s to specify that .stabs go in a .stabs section, | |
1277 | rather than .stabs.excl, which is ignored by the linker. | |
1278 | FIXME: Not implemented. */ | |
1279 | case 's': | |
1280 | if (arg) | |
1281 | return 0; | |
1282 | ||
1283 | break; | |
1284 | #endif | |
1285 | ||
cef4f754 AM |
1286 | case OPTION_NOPS: |
1287 | { | |
1288 | char *end; | |
1289 | nop_limit = strtoul (optarg, &end, 0); | |
1290 | if (*end) | |
1291 | as_bad (_("--nops needs a numeric argument")); | |
1292 | } | |
1293 | break; | |
85645aed | 1294 | |
252b5132 RH |
1295 | default: |
1296 | return 0; | |
1297 | } | |
1298 | ||
1299 | return 1; | |
1300 | } | |
1301 | ||
1302 | void | |
98027b10 | 1303 | md_show_usage (FILE *stream) |
252b5132 | 1304 | { |
bc805888 | 1305 | fprintf (stream, _("\ |
252b5132 | 1306 | PowerPC options:\n\ |
ce3d2015 AM |
1307 | -a32 generate ELF32/XCOFF32\n\ |
1308 | -a64 generate ELF64/XCOFF64\n\ | |
1309 | -u ignored\n\ | |
1310 | -mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\ | |
1311 | -mpwr generate code for POWER (RIOS1)\n\ | |
1312 | -m601 generate code for PowerPC 601\n\ | |
418c1742 | 1313 | -mppc, -mppc32, -m603, -m604\n\ |
ce3d2015 AM |
1314 | generate code for PowerPC 603/604\n\ |
1315 | -m403 generate code for PowerPC 403\n\ | |
1316 | -m405 generate code for PowerPC 405\n\ | |
1317 | -m440 generate code for PowerPC 440\n\ | |
1318 | -m464 generate code for PowerPC 464\n\ | |
1319 | -m476 generate code for PowerPC 476\n\ | |
f5c120c5 | 1320 | -m7400, -m7410, -m7450, -m7455\n\ |
ce3d2015 AM |
1321 | generate code for PowerPC 7400/7410/7450/7455\n\ |
1322 | -m750cl generate code for PowerPC 750cl\n")); | |
df12615d | 1323 | fprintf (stream, _("\ |
ce3d2015 AM |
1324 | -mppc64, -m620 generate code for PowerPC 620/625/630\n\ |
1325 | -mppc64bridge generate code for PowerPC 64, including bridge insns\n\ | |
1326 | -mbooke generate code for 32-bit PowerPC BookE\n\ | |
1327 | -ma2 generate code for A2 architecture\n\ | |
cdc51b07 RS |
1328 | -mpower4, -mpwr4 generate code for Power4 architecture\n\ |
1329 | -mpower5, -mpwr5, -mpwr5x\n\ | |
1330 | generate code for Power5 architecture\n\ | |
1331 | -mpower6, -mpwr6 generate code for Power6 architecture\n\ | |
1332 | -mpower7, -mpwr7 generate code for Power7 architecture\n\ | |
ce3d2015 AM |
1333 | -mcell generate code for Cell Broadband Engine architecture\n\ |
1334 | -mcom generate code Power/PowerPC common instructions\n\ | |
1335 | -many generate code for any architecture (PWR/PWRX/PPC)\n")); | |
6a0c61b7 | 1336 | fprintf (stream, _("\ |
ce3d2015 AM |
1337 | -maltivec generate code for AltiVec\n\ |
1338 | -mvsx generate code for Vector-Scalar (VSX) instructions\n\ | |
1339 | -me300 generate code for PowerPC e300 family\n\ | |
1340 | -me500, -me500x2 generate code for Motorola e500 core complex\n\ | |
1341 | -me500mc, generate code for Freescale e500mc core complex\n\ | |
1342 | -me500mc64, generate code for Freescale e500mc64 core complex\n\ | |
aea77599 AM |
1343 | -me5500, generate code for Freescale e5500 core complex\n\ |
1344 | -me6500, generate code for Freescale e6500 core complex\n\ | |
ce3d2015 | 1345 | -mspe generate code for Motorola SPE instructions\n\ |
b9c361e0 | 1346 | -mvle generate code for Freescale VLE instructions\n\ |
ce3d2015 AM |
1347 | -mtitan generate code for AppliedMicro Titan core complex\n\ |
1348 | -mregnames Allow symbolic names for registers\n\ | |
1349 | -mno-regnames Do not allow symbolic names for registers\n")); | |
252b5132 | 1350 | #ifdef OBJ_ELF |
bc805888 | 1351 | fprintf (stream, _("\ |
ce3d2015 AM |
1352 | -mrelocatable support for GCC's -mrelocatble option\n\ |
1353 | -mrelocatable-lib support for GCC's -mrelocatble-lib option\n\ | |
1354 | -memb set PPC_EMB bit in ELF flags\n\ | |
b8b738ac | 1355 | -mlittle, -mlittle-endian, -le\n\ |
ce3d2015 | 1356 | generate code for a little endian machine\n\ |
b8b738ac | 1357 | -mbig, -mbig-endian, -be\n\ |
ce3d2015 AM |
1358 | generate code for a big endian machine\n\ |
1359 | -msolaris generate code for Solaris\n\ | |
1360 | -mno-solaris do not generate code for Solaris\n\ | |
b8b738ac | 1361 | -K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n\ |
ce3d2015 AM |
1362 | -V print assembler version number\n\ |
1363 | -Qy, -Qn ignored\n")); | |
252b5132 | 1364 | #endif |
cef4f754 AM |
1365 | fprintf (stream, _("\ |
1366 | -nops=count when aligning, more than COUNT nops uses a branch\n")); | |
252b5132 RH |
1367 | } |
1368 | \f | |
1369 | /* Set ppc_cpu if it is not already set. */ | |
1370 | ||
1371 | static void | |
98027b10 | 1372 | ppc_set_cpu (void) |
252b5132 RH |
1373 | { |
1374 | const char *default_os = TARGET_OS; | |
1375 | const char *default_cpu = TARGET_CPU; | |
1376 | ||
7102e95e | 1377 | if ((ppc_cpu & ~(ppc_cpu_t) PPC_OPCODE_ANY) == 0) |
252b5132 | 1378 | { |
2a98c3a6 | 1379 | if (ppc_obj64) |
bdc70b4a | 1380 | ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_64; |
2a98c3a6 AM |
1381 | else if (strncmp (default_os, "aix", 3) == 0 |
1382 | && default_os[3] >= '4' && default_os[3] <= '9') | |
bdc70b4a | 1383 | ppc_cpu |= PPC_OPCODE_COMMON; |
252b5132 | 1384 | else if (strncmp (default_os, "aix3", 4) == 0) |
bdc70b4a | 1385 | ppc_cpu |= PPC_OPCODE_POWER; |
252b5132 | 1386 | else if (strcmp (default_cpu, "rs6000") == 0) |
bdc70b4a | 1387 | ppc_cpu |= PPC_OPCODE_POWER; |
0baf16f2 | 1388 | else if (strncmp (default_cpu, "powerpc", 7) == 0) |
bdc70b4a | 1389 | ppc_cpu |= PPC_OPCODE_PPC; |
252b5132 | 1390 | else |
d6ed37ed | 1391 | as_fatal (_("unknown default cpu = %s, os = %s"), |
99a814a1 | 1392 | default_cpu, default_os); |
252b5132 RH |
1393 | } |
1394 | } | |
1395 | ||
9232bbb0 AM |
1396 | /* Figure out the BFD architecture to use. This function and ppc_mach |
1397 | are called well before md_begin, when the output file is opened. */ | |
252b5132 RH |
1398 | |
1399 | enum bfd_architecture | |
98027b10 | 1400 | ppc_arch (void) |
252b5132 RH |
1401 | { |
1402 | const char *default_cpu = TARGET_CPU; | |
1403 | ppc_set_cpu (); | |
1404 | ||
1405 | if ((ppc_cpu & PPC_OPCODE_PPC) != 0) | |
1406 | return bfd_arch_powerpc; | |
b9c361e0 JL |
1407 | if ((ppc_cpu & PPC_OPCODE_VLE) != 0) |
1408 | return bfd_arch_powerpc; | |
1409 | if ((ppc_cpu & PPC_OPCODE_POWER) != 0) | |
252b5132 | 1410 | return bfd_arch_rs6000; |
b9c361e0 | 1411 | if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0) |
252b5132 RH |
1412 | { |
1413 | if (strcmp (default_cpu, "rs6000") == 0) | |
1414 | return bfd_arch_rs6000; | |
0baf16f2 | 1415 | else if (strncmp (default_cpu, "powerpc", 7) == 0) |
252b5132 RH |
1416 | return bfd_arch_powerpc; |
1417 | } | |
1418 | ||
d6ed37ed | 1419 | as_fatal (_("neither Power nor PowerPC opcodes were selected.")); |
252b5132 RH |
1420 | return bfd_arch_unknown; |
1421 | } | |
1422 | ||
7f6d05e8 | 1423 | unsigned long |
98027b10 | 1424 | ppc_mach (void) |
7f6d05e8 | 1425 | { |
2a98c3a6 AM |
1426 | if (ppc_obj64) |
1427 | return bfd_mach_ppc64; | |
1428 | else if (ppc_arch () == bfd_arch_rs6000) | |
1429 | return bfd_mach_rs6k; | |
ce3d2015 AM |
1430 | else if (ppc_cpu & PPC_OPCODE_TITAN) |
1431 | return bfd_mach_ppc_titan; | |
b9c361e0 JL |
1432 | else if (ppc_cpu & PPC_OPCODE_VLE) |
1433 | return bfd_mach_ppc_vle; | |
2a98c3a6 AM |
1434 | else |
1435 | return bfd_mach_ppc; | |
7f6d05e8 CP |
1436 | } |
1437 | ||
81d4177b | 1438 | extern char* |
98027b10 | 1439 | ppc_target_format (void) |
7f6d05e8 CP |
1440 | { |
1441 | #ifdef OBJ_COFF | |
1442 | #ifdef TE_PE | |
99a814a1 | 1443 | return target_big_endian ? "pe-powerpc" : "pe-powerpcle"; |
7f6d05e8 | 1444 | #elif TE_POWERMAC |
0baf16f2 | 1445 | return "xcoff-powermac"; |
7f6d05e8 | 1446 | #else |
eb1e0e80 | 1447 | # ifdef TE_AIX5 |
edc1d652 | 1448 | return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000"); |
eb1e0e80 | 1449 | # else |
edc1d652 | 1450 | return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000"); |
eb1e0e80 | 1451 | # endif |
7f6d05e8 | 1452 | #endif |
7f6d05e8 CP |
1453 | #endif |
1454 | #ifdef OBJ_ELF | |
edc1d652 AM |
1455 | # ifdef TE_FreeBSD |
1456 | return (ppc_obj64 ? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd"); | |
1457 | # elif defined (TE_VXWORKS) | |
9d8504b1 PB |
1458 | return "elf32-powerpc-vxworks"; |
1459 | # else | |
0baf16f2 | 1460 | return (target_big_endian |
2b3c4602 AM |
1461 | ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc") |
1462 | : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle")); | |
9d8504b1 | 1463 | # endif |
7f6d05e8 CP |
1464 | #endif |
1465 | } | |
1466 | ||
b9c361e0 JL |
1467 | /* Validate one entry in powerpc_opcodes[] or vle_opcodes[]. |
1468 | Return TRUE if there's a problem, otherwise FALSE. */ | |
1469 | ||
1470 | static bfd_boolean | |
1471 | insn_validate (const struct powerpc_opcode *op) | |
1472 | { | |
1473 | const unsigned char *o; | |
1474 | unsigned long omask = op->mask; | |
1475 | ||
1476 | /* The mask had better not trim off opcode bits. */ | |
1477 | if ((op->opcode & omask) != op->opcode) | |
1478 | { | |
1479 | as_bad (_("mask trims opcode bits for %s"), op->name); | |
1480 | return TRUE; | |
1481 | } | |
1482 | ||
1483 | /* The operands must not overlap the opcode or each other. */ | |
1484 | for (o = op->operands; *o; ++o) | |
1485 | { | |
1486 | if (*o >= num_powerpc_operands) | |
1487 | { | |
1488 | as_bad (_("operand index error for %s"), op->name); | |
1489 | return TRUE; | |
1490 | } | |
1491 | else | |
1492 | { | |
1493 | const struct powerpc_operand *operand = &powerpc_operands[*o]; | |
1494 | if (operand->shift != PPC_OPSHIFT_INV) | |
1495 | { | |
1496 | unsigned long mask; | |
1497 | ||
1498 | if (operand->shift >= 0) | |
1499 | mask = operand->bitm << operand->shift; | |
1500 | else | |
1501 | mask = operand->bitm >> -operand->shift; | |
1502 | if (omask & mask) | |
1503 | { | |
1504 | as_bad (_("operand %d overlap in %s"), | |
1505 | (int) (o - op->operands), op->name); | |
1506 | return TRUE; | |
1507 | } | |
1508 | omask |= mask; | |
1509 | } | |
1510 | } | |
1511 | } | |
1512 | return FALSE; | |
1513 | } | |
1514 | ||
69c040df AM |
1515 | /* Insert opcodes and macros into hash tables. Called at startup and |
1516 | for .cpu pseudo. */ | |
252b5132 | 1517 | |
69c040df AM |
1518 | static void |
1519 | ppc_setup_opcodes (void) | |
252b5132 | 1520 | { |
98027b10 | 1521 | const struct powerpc_opcode *op; |
252b5132 RH |
1522 | const struct powerpc_opcode *op_end; |
1523 | const struct powerpc_macro *macro; | |
1524 | const struct powerpc_macro *macro_end; | |
b84bf58a | 1525 | bfd_boolean bad_insn = FALSE; |
252b5132 | 1526 | |
69c040df AM |
1527 | if (ppc_hash != NULL) |
1528 | hash_die (ppc_hash); | |
1529 | if (ppc_macro_hash != NULL) | |
1530 | hash_die (ppc_macro_hash); | |
252b5132 RH |
1531 | |
1532 | /* Insert the opcodes into a hash table. */ | |
1533 | ppc_hash = hash_new (); | |
1534 | ||
c43a438d | 1535 | if (ENABLE_CHECKING) |
b84bf58a | 1536 | { |
c43a438d | 1537 | unsigned int i; |
b84bf58a | 1538 | |
c43a438d AM |
1539 | /* Check operand masks. Code here and in the disassembler assumes |
1540 | all the 1's in the mask are contiguous. */ | |
1541 | for (i = 0; i < num_powerpc_operands; ++i) | |
b84bf58a | 1542 | { |
c43a438d AM |
1543 | unsigned long mask = powerpc_operands[i].bitm; |
1544 | unsigned long right_bit; | |
1545 | unsigned int j; | |
1546 | ||
1547 | right_bit = mask & -mask; | |
1548 | mask += right_bit; | |
1549 | right_bit = mask & -mask; | |
1550 | if (mask != right_bit) | |
1551 | { | |
1552 | as_bad (_("powerpc_operands[%d].bitm invalid"), i); | |
1553 | bad_insn = TRUE; | |
1554 | } | |
1555 | for (j = i + 1; j < num_powerpc_operands; ++j) | |
1556 | if (memcmp (&powerpc_operands[i], &powerpc_operands[j], | |
1557 | sizeof (powerpc_operands[0])) == 0) | |
1558 | { | |
1559 | as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"), | |
1560 | j, i); | |
1561 | bad_insn = TRUE; | |
1562 | } | |
b84bf58a AM |
1563 | } |
1564 | } | |
1565 | ||
252b5132 RH |
1566 | op_end = powerpc_opcodes + powerpc_num_opcodes; |
1567 | for (op = powerpc_opcodes; op < op_end; op++) | |
1568 | { | |
c43a438d | 1569 | if (ENABLE_CHECKING) |
b84bf58a | 1570 | { |
d815f1a9 | 1571 | if (op != powerpc_opcodes) |
8dbcd839 | 1572 | { |
b9c361e0 JL |
1573 | int old_opcode = PPC_OP (op[-1].opcode); |
1574 | int new_opcode = PPC_OP (op[0].opcode); | |
1575 | ||
1576 | #ifdef PRINT_OPCODE_TABLE | |
1577 | printf ("%-14s\t#%04d\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n", | |
1578 | op->name, op - powerpc_opcodes, (unsigned int) new_opcode, | |
1579 | (unsigned int) op->opcode, (unsigned int) op->mask, | |
1580 | (unsigned long long) op->flags); | |
1581 | #endif | |
1582 | ||
d815f1a9 AM |
1583 | /* The major opcodes had better be sorted. Code in the |
1584 | disassembler assumes the insns are sorted according to | |
1585 | major opcode. */ | |
b9c361e0 | 1586 | if (new_opcode < old_opcode) |
d815f1a9 AM |
1587 | { |
1588 | as_bad (_("major opcode is not sorted for %s"), | |
1589 | op->name); | |
1590 | bad_insn = TRUE; | |
1591 | } | |
8dbcd839 | 1592 | } |
b9c361e0 JL |
1593 | bad_insn |= insn_validate (op); |
1594 | } | |
c43a438d | 1595 | |
b9c361e0 JL |
1596 | if ((ppc_cpu & op->flags) != 0 |
1597 | && !(ppc_cpu & op->deprecated)) | |
1598 | { | |
1599 | const char *retval; | |
1600 | ||
1601 | retval = hash_insert (ppc_hash, op->name, (void *) op); | |
1602 | if (retval != NULL) | |
c43a438d | 1603 | { |
b9c361e0 | 1604 | as_bad (_("duplicate instruction %s"), |
c43a438d AM |
1605 | op->name); |
1606 | bad_insn = TRUE; | |
1607 | } | |
b9c361e0 JL |
1608 | } |
1609 | } | |
c43a438d | 1610 | |
b9c361e0 JL |
1611 | if ((ppc_cpu & PPC_OPCODE_ANY) != 0) |
1612 | for (op = powerpc_opcodes; op < op_end; op++) | |
1613 | hash_insert (ppc_hash, op->name, (void *) op); | |
1614 | ||
1615 | op_end = vle_opcodes + vle_num_opcodes; | |
1616 | for (op = vle_opcodes; op < op_end; op++) | |
1617 | { | |
1618 | if (ENABLE_CHECKING) | |
1619 | { | |
1620 | if (op != vle_opcodes) | |
1621 | { | |
1622 | unsigned old_seg, new_seg; | |
1623 | ||
1624 | old_seg = VLE_OP (op[-1].opcode, op[-1].mask); | |
1625 | old_seg = VLE_OP_TO_SEG (old_seg); | |
1626 | new_seg = VLE_OP (op[0].opcode, op[0].mask); | |
1627 | new_seg = VLE_OP_TO_SEG (new_seg); | |
1628 | ||
1629 | #ifdef PRINT_OPCODE_TABLE | |
1630 | printf ("%-14s\t#%04d\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n", | |
1631 | op->name, op - powerpc_opcodes, (unsigned int) new_opcode, | |
1632 | (unsigned int) op->opcode, (unsigned int) op->mask, | |
1633 | (unsigned long long) op->flags); | |
1634 | #endif | |
1635 | /* The major opcodes had better be sorted. Code in the | |
1636 | disassembler assumes the insns are sorted according to | |
1637 | major opcode. */ | |
1638 | if (new_seg < old_seg) | |
1639 | { | |
1640 | as_bad (_("major opcode is not sorted for %s"), | |
1641 | op->name); | |
1642 | bad_insn = TRUE; | |
1643 | } | |
1644 | } | |
1645 | ||
1646 | bad_insn |= insn_validate (op); | |
c43a438d | 1647 | } |
252b5132 | 1648 | |
bdc70b4a | 1649 | if ((ppc_cpu & op->flags) != 0 |
1cb0a767 | 1650 | && !(ppc_cpu & op->deprecated)) |
252b5132 RH |
1651 | { |
1652 | const char *retval; | |
1653 | ||
98027b10 | 1654 | retval = hash_insert (ppc_hash, op->name, (void *) op); |
69c040df | 1655 | if (retval != NULL) |
252b5132 | 1656 | { |
b84bf58a | 1657 | as_bad (_("duplicate instruction %s"), |
99a814a1 | 1658 | op->name); |
b84bf58a | 1659 | bad_insn = TRUE; |
252b5132 RH |
1660 | } |
1661 | } | |
1662 | } | |
1663 | ||
b9c361e0 JL |
1664 | if ((ppc_cpu & PPC_OPCODE_VLE) != 0) |
1665 | for (op = vle_opcodes; op < op_end; op++) | |
98027b10 | 1666 | hash_insert (ppc_hash, op->name, (void *) op); |
3c9030c1 | 1667 | |
252b5132 RH |
1668 | /* Insert the macros into a hash table. */ |
1669 | ppc_macro_hash = hash_new (); | |
1670 | ||
1671 | macro_end = powerpc_macros + powerpc_num_macros; | |
1672 | for (macro = powerpc_macros; macro < macro_end; macro++) | |
1673 | { | |
33740db9 | 1674 | if ((macro->flags & ppc_cpu) != 0 || (ppc_cpu & PPC_OPCODE_ANY) != 0) |
252b5132 RH |
1675 | { |
1676 | const char *retval; | |
1677 | ||
98027b10 | 1678 | retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro); |
252b5132 RH |
1679 | if (retval != (const char *) NULL) |
1680 | { | |
b84bf58a AM |
1681 | as_bad (_("duplicate macro %s"), macro->name); |
1682 | bad_insn = TRUE; | |
252b5132 RH |
1683 | } |
1684 | } | |
1685 | } | |
1686 | ||
b84bf58a | 1687 | if (bad_insn) |
252b5132 | 1688 | abort (); |
69c040df AM |
1689 | } |
1690 | ||
1691 | /* This function is called when the assembler starts up. It is called | |
1692 | after the options have been parsed and the output file has been | |
1693 | opened. */ | |
1694 | ||
1695 | void | |
98027b10 | 1696 | md_begin (void) |
69c040df AM |
1697 | { |
1698 | ppc_set_cpu (); | |
1699 | ||
1700 | ppc_cie_data_alignment = ppc_obj64 ? -8 : -4; | |
8fbf7334 | 1701 | ppc_dwarf2_line_min_insn_length = (ppc_cpu & PPC_OPCODE_VLE) ? 2 : 4; |
69c040df AM |
1702 | |
1703 | #ifdef OBJ_ELF | |
1704 | /* Set the ELF flags if desired. */ | |
1705 | if (ppc_flags && !msolaris) | |
1706 | bfd_set_private_flags (stdoutput, ppc_flags); | |
1707 | #endif | |
1708 | ||
1709 | ppc_setup_opcodes (); | |
252b5132 | 1710 | |
67c1ffbe | 1711 | /* Tell the main code what the endianness is if it is not overridden |
99a814a1 | 1712 | by the user. */ |
252b5132 RH |
1713 | if (!set_target_endian) |
1714 | { | |
1715 | set_target_endian = 1; | |
1716 | target_big_endian = PPC_BIG_ENDIAN; | |
1717 | } | |
1718 | ||
1719 | #ifdef OBJ_XCOFF | |
1720 | ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG); | |
1721 | ||
1722 | /* Create dummy symbols to serve as initial csects. This forces the | |
1723 | text csects to precede the data csects. These symbols will not | |
1724 | be output. */ | |
1725 | ppc_text_csects = symbol_make ("dummy\001"); | |
809ffe0d | 1726 | symbol_get_tc (ppc_text_csects)->within = ppc_text_csects; |
252b5132 | 1727 | ppc_data_csects = symbol_make ("dummy\001"); |
809ffe0d | 1728 | symbol_get_tc (ppc_data_csects)->within = ppc_data_csects; |
252b5132 RH |
1729 | #endif |
1730 | ||
1731 | #ifdef TE_PE | |
1732 | ||
1733 | ppc_current_section = text_section; | |
81d4177b | 1734 | ppc_previous_section = 0; |
252b5132 RH |
1735 | |
1736 | #endif | |
1737 | } | |
1738 | ||
6a0c61b7 | 1739 | void |
98027b10 | 1740 | ppc_cleanup (void) |
6a0c61b7 | 1741 | { |
dc1d03fc | 1742 | #ifdef OBJ_ELF |
6a0c61b7 EZ |
1743 | if (ppc_apuinfo_list == NULL) |
1744 | return; | |
1745 | ||
1746 | /* Ok, so write the section info out. We have this layout: | |
1747 | ||
1748 | byte data what | |
1749 | ---- ---- ---- | |
1750 | 0 8 length of "APUinfo\0" | |
1751 | 4 (n*4) number of APU's (4 bytes each) | |
1752 | 8 2 note type 2 | |
1753 | 12 "APUinfo\0" name | |
1754 | 20 APU#1 first APU's info | |
1755 | 24 APU#2 second APU's info | |
1756 | ... ... | |
1757 | */ | |
1758 | { | |
1759 | char *p; | |
1760 | asection *seg = now_seg; | |
1761 | subsegT subseg = now_subseg; | |
1762 | asection *apuinfo_secp = (asection *) NULL; | |
49181a6a | 1763 | unsigned int i; |
6a0c61b7 EZ |
1764 | |
1765 | /* Create the .PPC.EMB.apuinfo section. */ | |
1766 | apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0); | |
1767 | bfd_set_section_flags (stdoutput, | |
1768 | apuinfo_secp, | |
e1a9cb8e | 1769 | SEC_HAS_CONTENTS | SEC_READONLY); |
6a0c61b7 EZ |
1770 | |
1771 | p = frag_more (4); | |
1772 | md_number_to_chars (p, (valueT) 8, 4); | |
1773 | ||
1774 | p = frag_more (4); | |
e98d298c | 1775 | md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4); |
6a0c61b7 EZ |
1776 | |
1777 | p = frag_more (4); | |
1778 | md_number_to_chars (p, (valueT) 2, 4); | |
1779 | ||
1780 | p = frag_more (8); | |
1781 | strcpy (p, "APUinfo"); | |
1782 | ||
1783 | for (i = 0; i < ppc_apuinfo_num; i++) | |
1784 | { | |
b34976b6 AM |
1785 | p = frag_more (4); |
1786 | md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4); | |
6a0c61b7 EZ |
1787 | } |
1788 | ||
1789 | frag_align (2, 0, 0); | |
1790 | ||
1791 | /* We probably can't restore the current segment, for there likely | |
1792 | isn't one yet... */ | |
1793 | if (seg && subseg) | |
1794 | subseg_set (seg, subseg); | |
1795 | } | |
dc1d03fc | 1796 | #endif |
6a0c61b7 EZ |
1797 | } |
1798 | ||
252b5132 RH |
1799 | /* Insert an operand value into an instruction. */ |
1800 | ||
1801 | static unsigned long | |
a1867a27 AM |
1802 | ppc_insert_operand (unsigned long insn, |
1803 | const struct powerpc_operand *operand, | |
1804 | offsetT val, | |
91d6fa6a | 1805 | ppc_cpu_t cpu, |
a1867a27 AM |
1806 | char *file, |
1807 | unsigned int line) | |
252b5132 | 1808 | { |
b84bf58a | 1809 | long min, max, right; |
eb42fac1 | 1810 | |
b84bf58a AM |
1811 | max = operand->bitm; |
1812 | right = max & -max; | |
1813 | min = 0; | |
1814 | ||
1815 | if ((operand->flags & PPC_OPERAND_SIGNED) != 0) | |
252b5132 | 1816 | { |
b84bf58a | 1817 | if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0) |
931774a9 AM |
1818 | max = (max >> 1) & -right; |
1819 | min = ~max & -right; | |
b84bf58a | 1820 | } |
252b5132 | 1821 | |
b84bf58a | 1822 | if ((operand->flags & PPC_OPERAND_PLUS1) != 0) |
3896c469 | 1823 | max++; |
252b5132 | 1824 | |
b84bf58a | 1825 | if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0) |
a1867a27 AM |
1826 | { |
1827 | long tmp = min; | |
1828 | min = -max; | |
1829 | max = -tmp; | |
1830 | } | |
b84bf58a | 1831 | |
a1867a27 AM |
1832 | if (min <= max) |
1833 | { | |
1834 | /* Some people write constants with the sign extension done by | |
1835 | hand but only up to 32 bits. This shouldn't really be valid, | |
1836 | but, to permit this code to assemble on a 64-bit host, we | |
1837 | sign extend the 32-bit value to 64 bits if so doing makes the | |
1838 | value valid. */ | |
1839 | if (val > max | |
1840 | && (offsetT) (val - 0x80000000 - 0x80000000) >= min | |
1841 | && (offsetT) (val - 0x80000000 - 0x80000000) <= max | |
1842 | && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0) | |
1843 | val = val - 0x80000000 - 0x80000000; | |
1844 | ||
1845 | /* Similarly, people write expressions like ~(1<<15), and expect | |
1846 | this to be OK for a 32-bit unsigned value. */ | |
1847 | else if (val < min | |
1848 | && (offsetT) (val + 0x80000000 + 0x80000000) >= min | |
1849 | && (offsetT) (val + 0x80000000 + 0x80000000) <= max | |
1850 | && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0) | |
1851 | val = val + 0x80000000 + 0x80000000; | |
1852 | ||
1853 | else if (val < min | |
1854 | || val > max | |
1855 | || (val & (right - 1)) != 0) | |
1856 | as_bad_value_out_of_range (_("operand"), val, min, max, file, line); | |
1857 | } | |
b84bf58a | 1858 | |
252b5132 RH |
1859 | if (operand->insert) |
1860 | { | |
1861 | const char *errmsg; | |
1862 | ||
1863 | errmsg = NULL; | |
91d6fa6a | 1864 | insn = (*operand->insert) (insn, (long) val, cpu, &errmsg); |
252b5132 | 1865 | if (errmsg != (const char *) NULL) |
ee2c9aa9 | 1866 | as_bad_where (file, line, "%s", errmsg); |
252b5132 | 1867 | } |
b9c361e0 | 1868 | else if (operand->shift >= 0) |
b84bf58a | 1869 | insn |= ((long) val & operand->bitm) << operand->shift; |
b9c361e0 JL |
1870 | else |
1871 | insn |= ((long) val & operand->bitm) >> -operand->shift; | |
252b5132 RH |
1872 | |
1873 | return insn; | |
1874 | } | |
1875 | ||
1876 | \f | |
1877 | #ifdef OBJ_ELF | |
1878 | /* Parse @got, etc. and return the desired relocation. */ | |
1879 | static bfd_reloc_code_real_type | |
98027b10 | 1880 | ppc_elf_suffix (char **str_p, expressionS *exp_p) |
252b5132 RH |
1881 | { |
1882 | struct map_bfd { | |
1883 | char *string; | |
b7d7dc63 AM |
1884 | unsigned int length : 8; |
1885 | unsigned int valid32 : 1; | |
1886 | unsigned int valid64 : 1; | |
1887 | unsigned int reloc; | |
252b5132 RH |
1888 | }; |
1889 | ||
1890 | char ident[20]; | |
1891 | char *str = *str_p; | |
1892 | char *str2; | |
1893 | int ch; | |
1894 | int len; | |
15c1449b | 1895 | const struct map_bfd *ptr; |
252b5132 | 1896 | |
b7d7dc63 AM |
1897 | #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc } |
1898 | #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc } | |
1899 | #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc } | |
252b5132 | 1900 | |
15c1449b | 1901 | static const struct map_bfd mapping[] = { |
b7d7dc63 AM |
1902 | MAP ("l", BFD_RELOC_LO16), |
1903 | MAP ("h", BFD_RELOC_HI16), | |
1904 | MAP ("ha", BFD_RELOC_HI16_S), | |
1905 | MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN), | |
1906 | MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN), | |
1907 | MAP ("got", BFD_RELOC_16_GOTOFF), | |
1908 | MAP ("got@l", BFD_RELOC_LO16_GOTOFF), | |
1909 | MAP ("got@h", BFD_RELOC_HI16_GOTOFF), | |
1910 | MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF), | |
1911 | MAP ("plt@l", BFD_RELOC_LO16_PLTOFF), | |
1912 | MAP ("plt@h", BFD_RELOC_HI16_PLTOFF), | |
1913 | MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF), | |
1914 | MAP ("copy", BFD_RELOC_PPC_COPY), | |
1915 | MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT), | |
1916 | MAP ("sectoff", BFD_RELOC_16_BASEREL), | |
1917 | MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL), | |
1918 | MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL), | |
1919 | MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL), | |
1920 | MAP ("tls", BFD_RELOC_PPC_TLS), | |
1921 | MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD), | |
1922 | MAP ("dtprel", BFD_RELOC_PPC_DTPREL), | |
1923 | MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO), | |
1924 | MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI), | |
1925 | MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA), | |
1926 | MAP ("tprel", BFD_RELOC_PPC_TPREL), | |
1927 | MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO), | |
1928 | MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI), | |
1929 | MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA), | |
1930 | MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16), | |
1931 | MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO), | |
1932 | MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI), | |
1933 | MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA), | |
1934 | MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16), | |
1935 | MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO), | |
1936 | MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI), | |
1937 | MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA), | |
1938 | MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16), | |
1939 | MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO), | |
1940 | MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI), | |
1941 | MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA), | |
1942 | MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16), | |
1943 | MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO), | |
1944 | MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI), | |
1945 | MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA), | |
1946 | MAP32 ("fixup", BFD_RELOC_CTOR), | |
1947 | MAP32 ("plt", BFD_RELOC_24_PLT_PCREL), | |
1948 | MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL), | |
1949 | MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC), | |
1950 | MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC), | |
1951 | MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL), | |
1952 | MAP32 ("sdarel", BFD_RELOC_GPREL16), | |
b9c361e0 JL |
1953 | MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A), |
1954 | MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A), | |
1955 | MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A), | |
b7d7dc63 AM |
1956 | MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32), |
1957 | MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16), | |
1958 | MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO), | |
1959 | MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI), | |
1960 | MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA), | |
1961 | MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16), | |
1962 | MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL), | |
1963 | MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16), | |
1964 | MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21), | |
b9c361e0 | 1965 | MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO), |
b7d7dc63 AM |
1966 | MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF), |
1967 | MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16), | |
1968 | MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO), | |
1969 | MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI), | |
1970 | MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA), | |
1971 | MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD), | |
1972 | MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA), | |
1973 | MAP32 ("xgot", BFD_RELOC_PPC_TOC16), | |
1974 | MAP64 ("higher", BFD_RELOC_PPC64_HIGHER), | |
1975 | MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S), | |
1976 | MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST), | |
1977 | MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S), | |
1978 | MAP64 ("tocbase", BFD_RELOC_PPC64_TOC), | |
1979 | MAP64 ("toc", BFD_RELOC_PPC_TOC16), | |
1980 | MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO), | |
1981 | MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI), | |
1982 | MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA), | |
1983 | MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER), | |
1984 | MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA), | |
1985 | MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST), | |
1986 | MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA), | |
1987 | MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER), | |
1988 | MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA), | |
1989 | MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST), | |
1990 | MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA), | |
1991 | { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED } | |
252b5132 RH |
1992 | }; |
1993 | ||
1994 | if (*str++ != '@') | |
1995 | return BFD_RELOC_UNUSED; | |
1996 | ||
1997 | for (ch = *str, str2 = ident; | |
1998 | (str2 < ident + sizeof (ident) - 1 | |
3882b010 | 1999 | && (ISALNUM (ch) || ch == '@')); |
252b5132 RH |
2000 | ch = *++str) |
2001 | { | |
3882b010 | 2002 | *str2++ = TOLOWER (ch); |
252b5132 RH |
2003 | } |
2004 | ||
2005 | *str2 = '\0'; | |
2006 | len = str2 - ident; | |
2007 | ||
2008 | ch = ident[0]; | |
2009 | for (ptr = &mapping[0]; ptr->length > 0; ptr++) | |
2010 | if (ch == ptr->string[0] | |
2011 | && len == ptr->length | |
b7d7dc63 AM |
2012 | && memcmp (ident, ptr->string, ptr->length) == 0 |
2013 | && (ppc_obj64 ? ptr->valid64 : ptr->valid32)) | |
252b5132 | 2014 | { |
15c1449b AM |
2015 | int reloc = ptr->reloc; |
2016 | ||
727fc41e AM |
2017 | if (!ppc_obj64 && exp_p->X_add_number != 0) |
2018 | { | |
2019 | switch (reloc) | |
2020 | { | |
2021 | case BFD_RELOC_16_GOTOFF: | |
2022 | case BFD_RELOC_LO16_GOTOFF: | |
2023 | case BFD_RELOC_HI16_GOTOFF: | |
2024 | case BFD_RELOC_HI16_S_GOTOFF: | |
2025 | as_warn (_("identifier+constant@got means " | |
2026 | "identifier@got+constant")); | |
2027 | break; | |
2028 | ||
2029 | case BFD_RELOC_PPC_GOT_TLSGD16: | |
2030 | case BFD_RELOC_PPC_GOT_TLSGD16_LO: | |
2031 | case BFD_RELOC_PPC_GOT_TLSGD16_HI: | |
2032 | case BFD_RELOC_PPC_GOT_TLSGD16_HA: | |
2033 | case BFD_RELOC_PPC_GOT_TLSLD16: | |
2034 | case BFD_RELOC_PPC_GOT_TLSLD16_LO: | |
2035 | case BFD_RELOC_PPC_GOT_TLSLD16_HI: | |
2036 | case BFD_RELOC_PPC_GOT_TLSLD16_HA: | |
2037 | case BFD_RELOC_PPC_GOT_DTPREL16: | |
2038 | case BFD_RELOC_PPC_GOT_DTPREL16_LO: | |
2039 | case BFD_RELOC_PPC_GOT_DTPREL16_HI: | |
2040 | case BFD_RELOC_PPC_GOT_DTPREL16_HA: | |
2041 | case BFD_RELOC_PPC_GOT_TPREL16: | |
2042 | case BFD_RELOC_PPC_GOT_TPREL16_LO: | |
2043 | case BFD_RELOC_PPC_GOT_TPREL16_HI: | |
2044 | case BFD_RELOC_PPC_GOT_TPREL16_HA: | |
2045 | as_bad (_("symbol+offset not supported for got tls")); | |
2046 | break; | |
2047 | } | |
2048 | } | |
5f6db75a AM |
2049 | |
2050 | /* Now check for identifier@suffix+constant. */ | |
2051 | if (*str == '-' || *str == '+') | |
252b5132 | 2052 | { |
5f6db75a AM |
2053 | char *orig_line = input_line_pointer; |
2054 | expressionS new_exp; | |
2055 | ||
2056 | input_line_pointer = str; | |
2057 | expression (&new_exp); | |
2058 | if (new_exp.X_op == O_constant) | |
252b5132 | 2059 | { |
5f6db75a AM |
2060 | exp_p->X_add_number += new_exp.X_add_number; |
2061 | str = input_line_pointer; | |
252b5132 | 2062 | } |
5f6db75a AM |
2063 | |
2064 | if (&input_line_pointer != str_p) | |
2065 | input_line_pointer = orig_line; | |
252b5132 | 2066 | } |
252b5132 | 2067 | *str_p = str; |
0baf16f2 | 2068 | |
2b3c4602 | 2069 | if (reloc == (int) BFD_RELOC_PPC64_TOC |
9f2b53d7 AM |
2070 | && exp_p->X_op == O_symbol |
2071 | && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0) | |
0baf16f2 | 2072 | { |
9f2b53d7 AM |
2073 | /* Change the symbol so that the dummy .TOC. symbol can be |
2074 | omitted from the object file. */ | |
0baf16f2 AM |
2075 | exp_p->X_add_symbol = &abs_symbol; |
2076 | } | |
2077 | ||
15c1449b | 2078 | return (bfd_reloc_code_real_type) reloc; |
252b5132 RH |
2079 | } |
2080 | ||
2081 | return BFD_RELOC_UNUSED; | |
2082 | } | |
2083 | ||
99a814a1 AM |
2084 | /* Like normal .long/.short/.word, except support @got, etc. |
2085 | Clobbers input_line_pointer, checks end-of-line. */ | |
252b5132 | 2086 | static void |
98027b10 | 2087 | ppc_elf_cons (int nbytes /* 1=.byte, 2=.word, 4=.long, 8=.llong */) |
252b5132 RH |
2088 | { |
2089 | expressionS exp; | |
2090 | bfd_reloc_code_real_type reloc; | |
2091 | ||
2092 | if (is_it_end_of_statement ()) | |
2093 | { | |
2094 | demand_empty_rest_of_line (); | |
2095 | return; | |
2096 | } | |
2097 | ||
2098 | do | |
2099 | { | |
2100 | expression (&exp); | |
2101 | if (exp.X_op == O_symbol | |
2102 | && *input_line_pointer == '@' | |
99a814a1 AM |
2103 | && (reloc = ppc_elf_suffix (&input_line_pointer, |
2104 | &exp)) != BFD_RELOC_UNUSED) | |
252b5132 | 2105 | { |
99a814a1 AM |
2106 | reloc_howto_type *reloc_howto; |
2107 | int size; | |
2108 | ||
2109 | reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc); | |
2110 | size = bfd_get_reloc_size (reloc_howto); | |
252b5132 RH |
2111 | |
2112 | if (size > nbytes) | |
0baf16f2 AM |
2113 | { |
2114 | as_bad (_("%s relocations do not fit in %d bytes\n"), | |
2115 | reloc_howto->name, nbytes); | |
2116 | } | |
252b5132 RH |
2117 | else |
2118 | { | |
0baf16f2 AM |
2119 | char *p; |
2120 | int offset; | |
252b5132 | 2121 | |
0baf16f2 | 2122 | p = frag_more (nbytes); |
aa0c8c1a | 2123 | memset (p, 0, nbytes); |
0baf16f2 AM |
2124 | offset = 0; |
2125 | if (target_big_endian) | |
2126 | offset = nbytes - size; | |
99a814a1 AM |
2127 | fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size, |
2128 | &exp, 0, reloc); | |
252b5132 RH |
2129 | } |
2130 | } | |
2131 | else | |
2132 | emit_expr (&exp, (unsigned int) nbytes); | |
2133 | } | |
2134 | while (*input_line_pointer++ == ','); | |
2135 | ||
99a814a1 AM |
2136 | /* Put terminator back into stream. */ |
2137 | input_line_pointer--; | |
252b5132 RH |
2138 | demand_empty_rest_of_line (); |
2139 | } | |
2140 | ||
2141 | /* Solaris pseduo op to change to the .rodata section. */ | |
2142 | static void | |
98027b10 | 2143 | ppc_elf_rdata (int xxx) |
252b5132 RH |
2144 | { |
2145 | char *save_line = input_line_pointer; | |
2146 | static char section[] = ".rodata\n"; | |
2147 | ||
99a814a1 | 2148 | /* Just pretend this is .section .rodata */ |
252b5132 RH |
2149 | input_line_pointer = section; |
2150 | obj_elf_section (xxx); | |
2151 | ||
2152 | input_line_pointer = save_line; | |
2153 | } | |
2154 | ||
99a814a1 | 2155 | /* Pseudo op to make file scope bss items. */ |
252b5132 | 2156 | static void |
98027b10 | 2157 | ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED) |
252b5132 | 2158 | { |
98027b10 AM |
2159 | char *name; |
2160 | char c; | |
2161 | char *p; | |
252b5132 | 2162 | offsetT size; |
98027b10 | 2163 | symbolS *symbolP; |
252b5132 RH |
2164 | offsetT align; |
2165 | segT old_sec; | |
2166 | int old_subsec; | |
2167 | char *pfrag; | |
2168 | int align2; | |
2169 | ||
2170 | name = input_line_pointer; | |
2171 | c = get_symbol_end (); | |
2172 | ||
99a814a1 | 2173 | /* just after name is now '\0'. */ |
252b5132 RH |
2174 | p = input_line_pointer; |
2175 | *p = c; | |
2176 | SKIP_WHITESPACE (); | |
2177 | if (*input_line_pointer != ',') | |
2178 | { | |
d6ed37ed | 2179 | as_bad (_("expected comma after symbol-name: rest of line ignored.")); |
252b5132 RH |
2180 | ignore_rest_of_line (); |
2181 | return; | |
2182 | } | |
2183 | ||
2184 | input_line_pointer++; /* skip ',' */ | |
2185 | if ((size = get_absolute_expression ()) < 0) | |
2186 | { | |
2187 | as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size); | |
2188 | ignore_rest_of_line (); | |
2189 | return; | |
2190 | } | |
2191 | ||
2192 | /* The third argument to .lcomm is the alignment. */ | |
2193 | if (*input_line_pointer != ',') | |
2194 | align = 8; | |
2195 | else | |
2196 | { | |
2197 | ++input_line_pointer; | |
2198 | align = get_absolute_expression (); | |
2199 | if (align <= 0) | |
2200 | { | |
2201 | as_warn (_("ignoring bad alignment")); | |
2202 | align = 8; | |
2203 | } | |
2204 | } | |
2205 | ||
2206 | *p = 0; | |
2207 | symbolP = symbol_find_or_make (name); | |
2208 | *p = c; | |
2209 | ||
2210 | if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP)) | |
2211 | { | |
d6ed37ed | 2212 | as_bad (_("ignoring attempt to re-define symbol `%s'."), |
252b5132 RH |
2213 | S_GET_NAME (symbolP)); |
2214 | ignore_rest_of_line (); | |
2215 | return; | |
2216 | } | |
2217 | ||
2218 | if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size) | |
2219 | { | |
d6ed37ed | 2220 | as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."), |
252b5132 RH |
2221 | S_GET_NAME (symbolP), |
2222 | (long) S_GET_VALUE (symbolP), | |
2223 | (long) size); | |
2224 | ||
2225 | ignore_rest_of_line (); | |
2226 | return; | |
2227 | } | |
2228 | ||
99a814a1 | 2229 | /* Allocate_bss. */ |
252b5132 RH |
2230 | old_sec = now_seg; |
2231 | old_subsec = now_subseg; | |
2232 | if (align) | |
2233 | { | |
99a814a1 | 2234 | /* Convert to a power of 2 alignment. */ |
252b5132 RH |
2235 | for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2); |
2236 | if (align != 1) | |
2237 | { | |
d6ed37ed | 2238 | as_bad (_("common alignment not a power of 2")); |
252b5132 RH |
2239 | ignore_rest_of_line (); |
2240 | return; | |
2241 | } | |
2242 | } | |
2243 | else | |
2244 | align2 = 0; | |
2245 | ||
2246 | record_alignment (bss_section, align2); | |
2247 | subseg_set (bss_section, 0); | |
2248 | if (align2) | |
2249 | frag_align (align2, 0, 0); | |
2250 | if (S_GET_SEGMENT (symbolP) == bss_section) | |
49309057 ILT |
2251 | symbol_get_frag (symbolP)->fr_symbol = 0; |
2252 | symbol_set_frag (symbolP, frag_now); | |
252b5132 RH |
2253 | pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size, |
2254 | (char *) 0); | |
2255 | *pfrag = 0; | |
2256 | S_SET_SIZE (symbolP, size); | |
2257 | S_SET_SEGMENT (symbolP, bss_section); | |
2258 | subseg_set (old_sec, old_subsec); | |
2259 | demand_empty_rest_of_line (); | |
2260 | } | |
2261 | ||
2262 | /* Validate any relocations emitted for -mrelocatable, possibly adding | |
2263 | fixups for word relocations in writable segments, so we can adjust | |
2264 | them at runtime. */ | |
2265 | static void | |
98027b10 | 2266 | ppc_elf_validate_fix (fixS *fixp, segT seg) |
252b5132 RH |
2267 | { |
2268 | if (fixp->fx_done || fixp->fx_pcrel) | |
2269 | return; | |
2270 | ||
2271 | switch (shlib) | |
2272 | { | |
2273 | case SHLIB_NONE: | |
2274 | case SHLIB_PIC: | |
2275 | return; | |
2276 | ||
5d6f4f16 | 2277 | case SHLIB_MRELOCATABLE: |
252b5132 RH |
2278 | if (fixp->fx_r_type <= BFD_RELOC_UNUSED |
2279 | && fixp->fx_r_type != BFD_RELOC_16_GOTOFF | |
2280 | && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF | |
2281 | && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF | |
2282 | && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF | |
1cfc59d5 | 2283 | && fixp->fx_r_type != BFD_RELOC_16_BASEREL |
252b5132 RH |
2284 | && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL |
2285 | && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL | |
2286 | && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL | |
e138127a | 2287 | && (seg->flags & SEC_LOAD) != 0 |
252b5132 RH |
2288 | && strcmp (segment_name (seg), ".got2") != 0 |
2289 | && strcmp (segment_name (seg), ".dtors") != 0 | |
2290 | && strcmp (segment_name (seg), ".ctors") != 0 | |
2291 | && strcmp (segment_name (seg), ".fixup") != 0 | |
252b5132 RH |
2292 | && strcmp (segment_name (seg), ".gcc_except_table") != 0 |
2293 | && strcmp (segment_name (seg), ".eh_frame") != 0 | |
2294 | && strcmp (segment_name (seg), ".ex_shared") != 0) | |
2295 | { | |
2296 | if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0 | |
2297 | || fixp->fx_r_type != BFD_RELOC_CTOR) | |
2298 | { | |
2299 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
d6ed37ed | 2300 | _("relocation cannot be done when using -mrelocatable")); |
252b5132 RH |
2301 | } |
2302 | } | |
2303 | return; | |
2304 | } | |
2305 | } | |
0baf16f2 | 2306 | |
7e8d4ab4 AM |
2307 | /* Prevent elf_frob_file_before_adjust removing a weak undefined |
2308 | function descriptor sym if the corresponding code sym is used. */ | |
2309 | ||
2310 | void | |
98027b10 | 2311 | ppc_frob_file_before_adjust (void) |
0baf16f2 | 2312 | { |
7e8d4ab4 | 2313 | symbolS *symp; |
9232bbb0 | 2314 | asection *toc; |
0baf16f2 | 2315 | |
7e8d4ab4 AM |
2316 | if (!ppc_obj64) |
2317 | return; | |
2318 | ||
2319 | for (symp = symbol_rootP; symp; symp = symbol_next (symp)) | |
0baf16f2 | 2320 | { |
7e8d4ab4 AM |
2321 | const char *name; |
2322 | char *dotname; | |
2323 | symbolS *dotsym; | |
2324 | size_t len; | |
2325 | ||
2326 | name = S_GET_NAME (symp); | |
2327 | if (name[0] == '.') | |
2328 | continue; | |
2329 | ||
2330 | if (! S_IS_WEAK (symp) | |
2331 | || S_IS_DEFINED (symp)) | |
2332 | continue; | |
2333 | ||
2334 | len = strlen (name) + 1; | |
2335 | dotname = xmalloc (len + 1); | |
2336 | dotname[0] = '.'; | |
2337 | memcpy (dotname + 1, name, len); | |
461b725f | 2338 | dotsym = symbol_find_noref (dotname, 1); |
7e8d4ab4 AM |
2339 | free (dotname); |
2340 | if (dotsym != NULL && (symbol_used_p (dotsym) | |
2341 | || symbol_used_in_reloc_p (dotsym))) | |
670ec21d NC |
2342 | symbol_mark_used (symp); |
2343 | ||
0baf16f2 AM |
2344 | } |
2345 | ||
9232bbb0 AM |
2346 | toc = bfd_get_section_by_name (stdoutput, ".toc"); |
2347 | if (toc != NULL | |
01efc3af | 2348 | && toc_reloc_types != has_large_toc_reloc |
9232bbb0 AM |
2349 | && bfd_section_size (stdoutput, toc) > 0x10000) |
2350 | as_warn (_("TOC section size exceeds 64k")); | |
2351 | ||
7e8d4ab4 AM |
2352 | /* Don't emit .TOC. symbol. */ |
2353 | symp = symbol_find (".TOC."); | |
2354 | if (symp != NULL) | |
2355 | symbol_remove (symp, &symbol_rootP, &symbol_lastP); | |
0baf16f2 | 2356 | } |
252b5132 RH |
2357 | #endif /* OBJ_ELF */ |
2358 | \f | |
2359 | #ifdef TE_PE | |
2360 | ||
2361 | /* | |
99a814a1 | 2362 | * Summary of parse_toc_entry. |
252b5132 RH |
2363 | * |
2364 | * in: Input_line_pointer points to the '[' in one of: | |
2365 | * | |
2366 | * [toc] [tocv] [toc32] [toc64] | |
2367 | * | |
2368 | * Anything else is an error of one kind or another. | |
2369 | * | |
81d4177b | 2370 | * out: |
252b5132 RH |
2371 | * return value: success or failure |
2372 | * toc_kind: kind of toc reference | |
2373 | * input_line_pointer: | |
2374 | * success: first char after the ']' | |
2375 | * failure: unchanged | |
2376 | * | |
2377 | * settings: | |
2378 | * | |
2379 | * [toc] - rv == success, toc_kind = default_toc | |
2380 | * [tocv] - rv == success, toc_kind = data_in_toc | |
2381 | * [toc32] - rv == success, toc_kind = must_be_32 | |
2382 | * [toc64] - rv == success, toc_kind = must_be_64 | |
2383 | * | |
2384 | */ | |
2385 | ||
81d4177b KH |
2386 | enum toc_size_qualifier |
2387 | { | |
252b5132 RH |
2388 | default_toc, /* The toc cell constructed should be the system default size */ |
2389 | data_in_toc, /* This is a direct reference to a toc cell */ | |
2390 | must_be_32, /* The toc cell constructed must be 32 bits wide */ | |
2391 | must_be_64 /* The toc cell constructed must be 64 bits wide */ | |
2392 | }; | |
2393 | ||
2394 | static int | |
98027b10 | 2395 | parse_toc_entry (enum toc_size_qualifier *toc_kind) |
252b5132 RH |
2396 | { |
2397 | char *start; | |
2398 | char *toc_spec; | |
2399 | char c; | |
2400 | enum toc_size_qualifier t; | |
2401 | ||
99a814a1 | 2402 | /* Save the input_line_pointer. */ |
252b5132 RH |
2403 | start = input_line_pointer; |
2404 | ||
99a814a1 | 2405 | /* Skip over the '[' , and whitespace. */ |
252b5132 RH |
2406 | ++input_line_pointer; |
2407 | SKIP_WHITESPACE (); | |
81d4177b | 2408 | |
99a814a1 | 2409 | /* Find the spelling of the operand. */ |
252b5132 RH |
2410 | toc_spec = input_line_pointer; |
2411 | c = get_symbol_end (); | |
2412 | ||
99a814a1 | 2413 | if (strcmp (toc_spec, "toc") == 0) |
252b5132 RH |
2414 | { |
2415 | t = default_toc; | |
2416 | } | |
99a814a1 | 2417 | else if (strcmp (toc_spec, "tocv") == 0) |
252b5132 RH |
2418 | { |
2419 | t = data_in_toc; | |
2420 | } | |
99a814a1 | 2421 | else if (strcmp (toc_spec, "toc32") == 0) |
252b5132 RH |
2422 | { |
2423 | t = must_be_32; | |
2424 | } | |
99a814a1 | 2425 | else if (strcmp (toc_spec, "toc64") == 0) |
252b5132 RH |
2426 | { |
2427 | t = must_be_64; | |
2428 | } | |
2429 | else | |
2430 | { | |
2431 | as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec); | |
99a814a1 AM |
2432 | *input_line_pointer = c; |
2433 | input_line_pointer = start; | |
252b5132 RH |
2434 | return 0; |
2435 | } | |
2436 | ||
99a814a1 AM |
2437 | /* Now find the ']'. */ |
2438 | *input_line_pointer = c; | |
252b5132 | 2439 | |
81d4177b KH |
2440 | SKIP_WHITESPACE (); /* leading whitespace could be there. */ |
2441 | c = *input_line_pointer++; /* input_line_pointer->past char in c. */ | |
252b5132 RH |
2442 | |
2443 | if (c != ']') | |
2444 | { | |
2445 | as_bad (_("syntax error: expected `]', found `%c'"), c); | |
99a814a1 | 2446 | input_line_pointer = start; |
252b5132 RH |
2447 | return 0; |
2448 | } | |
2449 | ||
99a814a1 | 2450 | *toc_kind = t; |
252b5132 RH |
2451 | return 1; |
2452 | } | |
2453 | #endif | |
2454 | \f | |
2455 | ||
dc1d03fc | 2456 | #ifdef OBJ_ELF |
6a0c61b7 EZ |
2457 | #define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff)) |
2458 | static void | |
98027b10 | 2459 | ppc_apuinfo_section_add (unsigned int apu, unsigned int version) |
6a0c61b7 EZ |
2460 | { |
2461 | unsigned int i; | |
2462 | ||
2463 | /* Check we don't already exist. */ | |
2464 | for (i = 0; i < ppc_apuinfo_num; i++) | |
dc1d03fc | 2465 | if (ppc_apuinfo_list[i] == APUID (apu, version)) |
6a0c61b7 | 2466 | return; |
b34976b6 | 2467 | |
6a0c61b7 EZ |
2468 | if (ppc_apuinfo_num == ppc_apuinfo_num_alloc) |
2469 | { | |
2470 | if (ppc_apuinfo_num_alloc == 0) | |
2471 | { | |
2472 | ppc_apuinfo_num_alloc = 4; | |
2473 | ppc_apuinfo_list = (unsigned long *) | |
2474 | xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc); | |
2475 | } | |
2476 | else | |
2477 | { | |
2478 | ppc_apuinfo_num_alloc += 4; | |
2479 | ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list, | |
2480 | sizeof (unsigned long) * ppc_apuinfo_num_alloc); | |
2481 | } | |
2482 | } | |
dc1d03fc | 2483 | ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version); |
6a0c61b7 EZ |
2484 | } |
2485 | #undef APUID | |
dc1d03fc | 2486 | #endif |
6a0c61b7 EZ |
2487 | \f |
2488 | ||
252b5132 RH |
2489 | /* We need to keep a list of fixups. We can't simply generate them as |
2490 | we go, because that would require us to first create the frag, and | |
2491 | that would screw up references to ``.''. */ | |
2492 | ||
2493 | struct ppc_fixup | |
2494 | { | |
2495 | expressionS exp; | |
2496 | int opindex; | |
2497 | bfd_reloc_code_real_type reloc; | |
2498 | }; | |
2499 | ||
2500 | #define MAX_INSN_FIXUPS (5) | |
2501 | ||
b9c361e0 JL |
2502 | /* Form I16L. */ |
2503 | #define E_OR2I_INSN 0x7000C000 | |
2504 | #define E_AND2I_DOT_INSN 0x7000C800 | |
2505 | #define E_OR2IS_INSN 0x7000D000 | |
2506 | #define E_LIS_INSN 0x7000E000 | |
2507 | #define E_AND2IS_DOT_INSN 0x7000E800 | |
2508 | ||
2509 | /* Form I16A. */ | |
2510 | #define E_ADD2I_DOT_INSN 0x70008800 | |
2511 | #define E_ADD2IS_INSN 0x70009000 | |
2512 | #define E_CMP16I_INSN 0x70009800 | |
2513 | #define E_MULL2I_INSN 0x7000A000 | |
2514 | #define E_CMPL16I_INSN 0x7000A800 | |
2515 | #define E_CMPH16I_INSN 0x7000B000 | |
2516 | #define E_CMPHL16I_INSN 0x7000B800 | |
2517 | ||
252b5132 RH |
2518 | /* This routine is called for each instruction to be assembled. */ |
2519 | ||
2520 | void | |
98027b10 | 2521 | md_assemble (char *str) |
252b5132 RH |
2522 | { |
2523 | char *s; | |
2524 | const struct powerpc_opcode *opcode; | |
2525 | unsigned long insn; | |
2526 | const unsigned char *opindex_ptr; | |
2527 | int skip_optional; | |
2528 | int need_paren; | |
2529 | int next_opindex; | |
2530 | struct ppc_fixup fixups[MAX_INSN_FIXUPS]; | |
2531 | int fc; | |
2532 | char *f; | |
09b935ac | 2533 | int addr_mod; |
252b5132 | 2534 | int i; |
b9c361e0 | 2535 | unsigned int insn_length; |
252b5132 RH |
2536 | #ifdef OBJ_ELF |
2537 | bfd_reloc_code_real_type reloc; | |
2538 | #endif | |
2539 | ||
2540 | /* Get the opcode. */ | |
3882b010 | 2541 | for (s = str; *s != '\0' && ! ISSPACE (*s); s++) |
252b5132 RH |
2542 | ; |
2543 | if (*s != '\0') | |
2544 | *s++ = '\0'; | |
2545 | ||
2546 | /* Look up the opcode in the hash table. */ | |
2547 | opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str); | |
2548 | if (opcode == (const struct powerpc_opcode *) NULL) | |
2549 | { | |
2550 | const struct powerpc_macro *macro; | |
2551 | ||
2552 | macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str); | |
2553 | if (macro == (const struct powerpc_macro *) NULL) | |
d6ed37ed | 2554 | as_bad (_("unrecognized opcode: `%s'"), str); |
252b5132 RH |
2555 | else |
2556 | ppc_macro (s, macro); | |
2557 | ||
2558 | return; | |
2559 | } | |
2560 | ||
2561 | insn = opcode->opcode; | |
2562 | ||
2563 | str = s; | |
3882b010 | 2564 | while (ISSPACE (*str)) |
252b5132 RH |
2565 | ++str; |
2566 | ||
2567 | /* PowerPC operands are just expressions. The only real issue is | |
2568 | that a few operand types are optional. All cases which might use | |
1f6c9eb0 ZW |
2569 | an optional operand separate the operands only with commas (in some |
2570 | cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never | |
2571 | have optional operands). Most instructions with optional operands | |
2572 | have only one. Those that have more than one optional operand can | |
2573 | take either all their operands or none. So, before we start seriously | |
2574 | parsing the operands, we check to see if we have optional operands, | |
2575 | and if we do, we count the number of commas to see which operands | |
2576 | have been omitted. */ | |
252b5132 RH |
2577 | skip_optional = 0; |
2578 | for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++) | |
2579 | { | |
2580 | const struct powerpc_operand *operand; | |
2581 | ||
2582 | operand = &powerpc_operands[*opindex_ptr]; | |
2583 | if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0) | |
2584 | { | |
2585 | unsigned int opcount; | |
7fe9cf6b | 2586 | unsigned int num_operands_expected; |
252b5132 RH |
2587 | |
2588 | /* There is an optional operand. Count the number of | |
2589 | commas in the input line. */ | |
2590 | if (*str == '\0') | |
2591 | opcount = 0; | |
2592 | else | |
2593 | { | |
2594 | opcount = 1; | |
2595 | s = str; | |
2596 | while ((s = strchr (s, ',')) != (char *) NULL) | |
2597 | { | |
2598 | ++opcount; | |
2599 | ++s; | |
2600 | } | |
2601 | } | |
2602 | ||
7fe9cf6b NC |
2603 | /* Compute the number of expected operands. |
2604 | Do not count fake operands. */ | |
2605 | for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++) | |
2606 | if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0) | |
2607 | ++ num_operands_expected; | |
2608 | ||
252b5132 RH |
2609 | /* If there are fewer operands in the line then are called |
2610 | for by the instruction, we want to skip the optional | |
1f6c9eb0 | 2611 | operands. */ |
7fe9cf6b | 2612 | if (opcount < num_operands_expected) |
252b5132 RH |
2613 | skip_optional = 1; |
2614 | ||
2615 | break; | |
2616 | } | |
2617 | } | |
2618 | ||
2619 | /* Gather the operands. */ | |
2620 | need_paren = 0; | |
2621 | next_opindex = 0; | |
2622 | fc = 0; | |
2623 | for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++) | |
2624 | { | |
2625 | const struct powerpc_operand *operand; | |
2626 | const char *errmsg; | |
2627 | char *hold; | |
2628 | expressionS ex; | |
2629 | char endc; | |
2630 | ||
2631 | if (next_opindex == 0) | |
2632 | operand = &powerpc_operands[*opindex_ptr]; | |
2633 | else | |
2634 | { | |
2635 | operand = &powerpc_operands[next_opindex]; | |
2636 | next_opindex = 0; | |
2637 | } | |
252b5132 RH |
2638 | errmsg = NULL; |
2639 | ||
2640 | /* If this is a fake operand, then we do not expect anything | |
2641 | from the input. */ | |
2642 | if ((operand->flags & PPC_OPERAND_FAKE) != 0) | |
2643 | { | |
2b3c4602 | 2644 | insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg); |
252b5132 | 2645 | if (errmsg != (const char *) NULL) |
ee2c9aa9 | 2646 | as_bad ("%s", errmsg); |
252b5132 RH |
2647 | continue; |
2648 | } | |
2649 | ||
2650 | /* If this is an optional operand, and we are skipping it, just | |
2651 | insert a zero. */ | |
2652 | if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0 | |
2653 | && skip_optional) | |
2654 | { | |
2655 | if (operand->insert) | |
2656 | { | |
2b3c4602 | 2657 | insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg); |
252b5132 | 2658 | if (errmsg != (const char *) NULL) |
ee2c9aa9 | 2659 | as_bad ("%s", errmsg); |
252b5132 RH |
2660 | } |
2661 | if ((operand->flags & PPC_OPERAND_NEXT) != 0) | |
2662 | next_opindex = *opindex_ptr + 1; | |
2663 | continue; | |
2664 | } | |
2665 | ||
2666 | /* Gather the operand. */ | |
2667 | hold = input_line_pointer; | |
2668 | input_line_pointer = str; | |
2669 | ||
2670 | #ifdef TE_PE | |
81d4177b | 2671 | if (*input_line_pointer == '[') |
252b5132 RH |
2672 | { |
2673 | /* We are expecting something like the second argument here: | |
99a814a1 AM |
2674 | * |
2675 | * lwz r4,[toc].GS.0.static_int(rtoc) | |
2676 | * ^^^^^^^^^^^^^^^^^^^^^^^^^^^ | |
2677 | * The argument following the `]' must be a symbol name, and the | |
2678 | * register must be the toc register: 'rtoc' or '2' | |
2679 | * | |
2680 | * The effect is to 0 as the displacement field | |
2681 | * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or | |
2682 | * the appropriate variation) reloc against it based on the symbol. | |
2683 | * The linker will build the toc, and insert the resolved toc offset. | |
2684 | * | |
2685 | * Note: | |
2686 | * o The size of the toc entry is currently assumed to be | |
2687 | * 32 bits. This should not be assumed to be a hard coded | |
2688 | * number. | |
2689 | * o In an effort to cope with a change from 32 to 64 bits, | |
2690 | * there are also toc entries that are specified to be | |
2691 | * either 32 or 64 bits: | |
2692 | * lwz r4,[toc32].GS.0.static_int(rtoc) | |
2693 | * lwz r4,[toc64].GS.0.static_int(rtoc) | |
2694 | * These demand toc entries of the specified size, and the | |
2695 | * instruction probably requires it. | |
2696 | */ | |
252b5132 RH |
2697 | |
2698 | int valid_toc; | |
2699 | enum toc_size_qualifier toc_kind; | |
2700 | bfd_reloc_code_real_type toc_reloc; | |
2701 | ||
99a814a1 AM |
2702 | /* Go parse off the [tocXX] part. */ |
2703 | valid_toc = parse_toc_entry (&toc_kind); | |
252b5132 | 2704 | |
81d4177b | 2705 | if (!valid_toc) |
252b5132 | 2706 | { |
99a814a1 AM |
2707 | /* Note: message has already been issued. |
2708 | FIXME: what sort of recovery should we do? | |
2709 | demand_rest_of_line (); return; ? */ | |
252b5132 RH |
2710 | } |
2711 | ||
99a814a1 AM |
2712 | /* Now get the symbol following the ']'. */ |
2713 | expression (&ex); | |
252b5132 RH |
2714 | |
2715 | switch (toc_kind) | |
2716 | { | |
2717 | case default_toc: | |
99a814a1 AM |
2718 | /* In this case, we may not have seen the symbol yet, |
2719 | since it is allowed to appear on a .extern or .globl | |
2720 | or just be a label in the .data section. */ | |
252b5132 RH |
2721 | toc_reloc = BFD_RELOC_PPC_TOC16; |
2722 | break; | |
2723 | case data_in_toc: | |
99a814a1 AM |
2724 | /* 1. The symbol must be defined and either in the toc |
2725 | section, or a global. | |
2726 | 2. The reloc generated must have the TOCDEFN flag set | |
2727 | in upper bit mess of the reloc type. | |
2728 | FIXME: It's a little confusing what the tocv | |
2729 | qualifier can be used for. At the very least, I've | |
2730 | seen three uses, only one of which I'm sure I can | |
2731 | explain. */ | |
81d4177b KH |
2732 | if (ex.X_op == O_symbol) |
2733 | { | |
9c2799c2 | 2734 | gas_assert (ex.X_add_symbol != NULL); |
fed9b18a ILT |
2735 | if (symbol_get_bfdsym (ex.X_add_symbol)->section |
2736 | != tocdata_section) | |
252b5132 | 2737 | { |
99a814a1 | 2738 | as_bad (_("[tocv] symbol is not a toc symbol")); |
252b5132 RH |
2739 | } |
2740 | } | |
2741 | ||
2742 | toc_reloc = BFD_RELOC_PPC_TOC16; | |
2743 | break; | |
2744 | case must_be_32: | |
99a814a1 AM |
2745 | /* FIXME: these next two specifically specify 32/64 bit |
2746 | toc entries. We don't support them today. Is this | |
2747 | the right way to say that? */ | |
252b5132 | 2748 | toc_reloc = BFD_RELOC_UNUSED; |
d6ed37ed | 2749 | as_bad (_("unimplemented toc32 expression modifier")); |
252b5132 RH |
2750 | break; |
2751 | case must_be_64: | |
99a814a1 | 2752 | /* FIXME: see above. */ |
252b5132 | 2753 | toc_reloc = BFD_RELOC_UNUSED; |
d6ed37ed | 2754 | as_bad (_("unimplemented toc64 expression modifier")); |
252b5132 RH |
2755 | break; |
2756 | default: | |
bc805888 | 2757 | fprintf (stderr, |
99a814a1 AM |
2758 | _("Unexpected return value [%d] from parse_toc_entry!\n"), |
2759 | toc_kind); | |
bc805888 | 2760 | abort (); |
252b5132 RH |
2761 | break; |
2762 | } | |
2763 | ||
2764 | /* We need to generate a fixup for this expression. */ | |
2765 | if (fc >= MAX_INSN_FIXUPS) | |
2766 | as_fatal (_("too many fixups")); | |
2767 | ||
2768 | fixups[fc].reloc = toc_reloc; | |
2769 | fixups[fc].exp = ex; | |
2770 | fixups[fc].opindex = *opindex_ptr; | |
2771 | ++fc; | |
2772 | ||
99a814a1 AM |
2773 | /* Ok. We've set up the fixup for the instruction. Now make it |
2774 | look like the constant 0 was found here. */ | |
252b5132 RH |
2775 | ex.X_unsigned = 1; |
2776 | ex.X_op = O_constant; | |
2777 | ex.X_add_number = 0; | |
2778 | ex.X_add_symbol = NULL; | |
2779 | ex.X_op_symbol = NULL; | |
2780 | } | |
2781 | ||
2782 | else | |
2783 | #endif /* TE_PE */ | |
2784 | { | |
b9c361e0 JL |
2785 | if ((reg_names_p |
2786 | && (((operand->flags & PPC_OPERAND_CR_BIT) != 0) | |
2787 | || ((operand->flags & PPC_OPERAND_CR_REG) != 0))) | |
2ad068be | 2788 | || !register_name (&ex)) |
252b5132 | 2789 | { |
13abbae3 AM |
2790 | char save_lex = lex_type['%']; |
2791 | ||
b9c361e0 JL |
2792 | if (((operand->flags & PPC_OPERAND_CR_REG) != 0) |
2793 | || (operand->flags & PPC_OPERAND_CR_BIT) != 0) | |
13abbae3 AM |
2794 | { |
2795 | cr_operand = TRUE; | |
2796 | lex_type['%'] |= LEX_BEGIN_NAME; | |
2797 | } | |
252b5132 | 2798 | expression (&ex); |
b34976b6 | 2799 | cr_operand = FALSE; |
13abbae3 | 2800 | lex_type['%'] = save_lex; |
252b5132 RH |
2801 | } |
2802 | } | |
2803 | ||
2804 | str = input_line_pointer; | |
2805 | input_line_pointer = hold; | |
2806 | ||
2807 | if (ex.X_op == O_illegal) | |
2808 | as_bad (_("illegal operand")); | |
2809 | else if (ex.X_op == O_absent) | |
2810 | as_bad (_("missing operand")); | |
2811 | else if (ex.X_op == O_register) | |
2812 | { | |
2813 | insn = ppc_insert_operand (insn, operand, ex.X_add_number, | |
783de163 | 2814 | ppc_cpu, (char *) NULL, 0); |
252b5132 RH |
2815 | } |
2816 | else if (ex.X_op == O_constant) | |
2817 | { | |
2818 | #ifdef OBJ_ELF | |
81d4177b | 2819 | /* Allow @HA, @L, @H on constants. */ |
252b5132 RH |
2820 | char *orig_str = str; |
2821 | ||
2822 | if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED) | |
2823 | switch (reloc) | |
2824 | { | |
2825 | default: | |
2826 | str = orig_str; | |
2827 | break; | |
2828 | ||
2829 | case BFD_RELOC_LO16: | |
2830 | /* X_unsigned is the default, so if the user has done | |
0baf16f2 AM |
2831 | something which cleared it, we always produce a |
2832 | signed value. */ | |
2833 | if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED)) | |
252b5132 RH |
2834 | ex.X_add_number &= 0xffff; |
2835 | else | |
0baf16f2 | 2836 | ex.X_add_number = SEX16 (ex.X_add_number); |
252b5132 RH |
2837 | break; |
2838 | ||
2839 | case BFD_RELOC_HI16: | |
0baf16f2 AM |
2840 | if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED)) |
2841 | ex.X_add_number = PPC_HI (ex.X_add_number); | |
2842 | else | |
2843 | ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number)); | |
252b5132 RH |
2844 | break; |
2845 | ||
2846 | case BFD_RELOC_HI16_S: | |
0baf16f2 AM |
2847 | if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED)) |
2848 | ex.X_add_number = PPC_HA (ex.X_add_number); | |
2849 | else | |
2850 | ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number)); | |
2851 | break; | |
2852 | ||
0baf16f2 AM |
2853 | case BFD_RELOC_PPC64_HIGHER: |
2854 | if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED)) | |
2855 | ex.X_add_number = PPC_HIGHER (ex.X_add_number); | |
2856 | else | |
2857 | ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number)); | |
2858 | break; | |
2859 | ||
2860 | case BFD_RELOC_PPC64_HIGHER_S: | |
2861 | if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED)) | |
2862 | ex.X_add_number = PPC_HIGHERA (ex.X_add_number); | |
2863 | else | |
2864 | ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number)); | |
252b5132 | 2865 | break; |
0baf16f2 AM |
2866 | |
2867 | case BFD_RELOC_PPC64_HIGHEST: | |
2868 | if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED)) | |
2869 | ex.X_add_number = PPC_HIGHEST (ex.X_add_number); | |
2870 | else | |
2871 | ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number)); | |
2872 | break; | |
2873 | ||
2874 | case BFD_RELOC_PPC64_HIGHEST_S: | |
2875 | if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED)) | |
2876 | ex.X_add_number = PPC_HIGHESTA (ex.X_add_number); | |
2877 | else | |
2878 | ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number)); | |
2879 | break; | |
252b5132 | 2880 | } |
0baf16f2 | 2881 | #endif /* OBJ_ELF */ |
252b5132 | 2882 | insn = ppc_insert_operand (insn, operand, ex.X_add_number, |
783de163 | 2883 | ppc_cpu, (char *) NULL, 0); |
252b5132 RH |
2884 | } |
2885 | #ifdef OBJ_ELF | |
727fc41e | 2886 | else |
252b5132 | 2887 | { |
727fc41e | 2888 | if (ex.X_op == O_symbol && str[0] == '(') |
cdba85ec | 2889 | { |
727fc41e AM |
2890 | const char *sym_name = S_GET_NAME (ex.X_add_symbol); |
2891 | if (sym_name[0] == '.') | |
2892 | ++sym_name; | |
cdba85ec | 2893 | |
727fc41e | 2894 | if (strcasecmp (sym_name, "__tls_get_addr") == 0) |
252b5132 | 2895 | { |
727fc41e AM |
2896 | expressionS tls_exp; |
2897 | ||
2898 | hold = input_line_pointer; | |
2899 | input_line_pointer = str + 1; | |
2900 | expression (&tls_exp); | |
2901 | if (tls_exp.X_op == O_symbol) | |
2902 | { | |
2903 | reloc = BFD_RELOC_UNUSED; | |
2904 | if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0) | |
2905 | { | |
2906 | reloc = BFD_RELOC_PPC_TLSGD; | |
2907 | input_line_pointer += 7; | |
2908 | } | |
2909 | else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0) | |
2910 | { | |
2911 | reloc = BFD_RELOC_PPC_TLSLD; | |
2912 | input_line_pointer += 7; | |
2913 | } | |
2914 | if (reloc != BFD_RELOC_UNUSED) | |
2915 | { | |
2916 | SKIP_WHITESPACE (); | |
2917 | str = input_line_pointer; | |
2918 | ||
2919 | if (fc >= MAX_INSN_FIXUPS) | |
2920 | as_fatal (_("too many fixups")); | |
2921 | fixups[fc].exp = tls_exp; | |
2922 | fixups[fc].opindex = *opindex_ptr; | |
2923 | fixups[fc].reloc = reloc; | |
2924 | ++fc; | |
2925 | } | |
2926 | } | |
2927 | input_line_pointer = hold; | |
252b5132 RH |
2928 | } |
2929 | } | |
2930 | ||
727fc41e | 2931 | if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED) |
0baf16f2 | 2932 | { |
727fc41e | 2933 | /* Some TLS tweaks. */ |
0baf16f2 AM |
2934 | switch (reloc) |
2935 | { | |
727fc41e | 2936 | default: |
cdba85ec | 2937 | break; |
727fc41e AM |
2938 | |
2939 | case BFD_RELOC_PPC_TLS: | |
2d0f3896 AM |
2940 | if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0)) |
2941 | as_bad (_("@tls may not be used with \"%s\" operands"), | |
2942 | opcode->name); | |
2943 | else if (operand->shift != 11) | |
2944 | as_bad (_("@tls may only be used in last operand")); | |
2945 | else | |
2946 | insn = ppc_insert_operand (insn, operand, | |
2947 | ppc_obj64 ? 13 : 2, | |
2948 | ppc_cpu, (char *) NULL, 0); | |
cdba85ec | 2949 | break; |
727fc41e AM |
2950 | |
2951 | /* We'll only use the 32 (or 64) bit form of these relocations | |
2952 | in constants. Instructions get the 16 bit form. */ | |
2953 | case BFD_RELOC_PPC_DTPREL: | |
2954 | reloc = BFD_RELOC_PPC_DTPREL16; | |
cdba85ec | 2955 | break; |
727fc41e AM |
2956 | case BFD_RELOC_PPC_TPREL: |
2957 | reloc = BFD_RELOC_PPC_TPREL16; | |
0baf16f2 AM |
2958 | break; |
2959 | } | |
727fc41e | 2960 | |
b9c361e0 JL |
2961 | /* If VLE-mode convert LO/HI/HA relocations. */ |
2962 | if (opcode->flags & PPC_OPCODE_VLE) | |
2963 | { | |
2964 | int tmp_insn = insn & opcode->mask; | |
2965 | ||
2966 | int use_d_reloc = (tmp_insn == E_OR2I_INSN | |
2967 | || tmp_insn == E_AND2I_DOT_INSN | |
2968 | || tmp_insn == E_OR2IS_INSN | |
2969 | || tmp_insn == E_LIS_INSN | |
2970 | || tmp_insn == E_AND2IS_DOT_INSN); | |
2971 | ||
2972 | ||
2973 | int use_a_reloc = (tmp_insn == E_ADD2I_DOT_INSN | |
2974 | || tmp_insn == E_ADD2IS_INSN | |
2975 | || tmp_insn == E_CMP16I_INSN | |
2976 | || tmp_insn == E_MULL2I_INSN | |
2977 | || tmp_insn == E_CMPL16I_INSN | |
2978 | || tmp_insn == E_CMPH16I_INSN | |
2979 | || tmp_insn == E_CMPHL16I_INSN); | |
2980 | ||
2981 | switch (reloc) | |
2982 | { | |
2983 | default: | |
2984 | break; | |
2985 | ||
2986 | case BFD_RELOC_PPC_EMB_SDA21: | |
2987 | reloc = BFD_RELOC_PPC_VLE_SDA21; | |
2988 | break; | |
2989 | ||
2990 | case BFD_RELOC_LO16: | |
2991 | if (use_d_reloc) | |
2992 | reloc = BFD_RELOC_PPC_VLE_LO16D; | |
2993 | else if (use_a_reloc) | |
2994 | reloc = BFD_RELOC_PPC_VLE_LO16A; | |
2995 | break; | |
2996 | ||
2997 | case BFD_RELOC_HI16: | |
2998 | if (use_d_reloc) | |
2999 | reloc = BFD_RELOC_PPC_VLE_HI16D; | |
3000 | else if (use_a_reloc) | |
3001 | reloc = BFD_RELOC_PPC_VLE_HI16A; | |
3002 | break; | |
3003 | ||
3004 | case BFD_RELOC_HI16_S: | |
3005 | if (use_d_reloc) | |
3006 | reloc = BFD_RELOC_PPC_VLE_HA16D; | |
3007 | else if (use_a_reloc) | |
3008 | reloc = BFD_RELOC_PPC_VLE_HA16A; | |
3009 | break; | |
3010 | ||
3011 | case BFD_RELOC_PPC_VLE_SDAREL_LO16A: | |
3012 | if (use_d_reloc) | |
3013 | reloc = BFD_RELOC_PPC_VLE_SDAREL_LO16D; | |
3014 | break; | |
3015 | ||
3016 | case BFD_RELOC_PPC_VLE_SDAREL_HI16A: | |
3017 | if (use_d_reloc) | |
3018 | reloc = BFD_RELOC_PPC_VLE_SDAREL_HI16D; | |
3019 | break; | |
3020 | ||
3021 | case BFD_RELOC_PPC_VLE_SDAREL_HA16A: | |
3022 | if (use_d_reloc) | |
3023 | reloc = BFD_RELOC_PPC_VLE_SDAREL_HA16D; | |
3024 | break; | |
3025 | } | |
3026 | } | |
3027 | ||
727fc41e AM |
3028 | /* For the absolute forms of branches, convert the PC |
3029 | relative form back into the absolute. */ | |
3030 | if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0) | |
3031 | { | |
3032 | switch (reloc) | |
3033 | { | |
3034 | case BFD_RELOC_PPC_B26: | |
3035 | reloc = BFD_RELOC_PPC_BA26; | |
3036 | break; | |
3037 | case BFD_RELOC_PPC_B16: | |
3038 | reloc = BFD_RELOC_PPC_BA16; | |
3039 | break; | |
3040 | case BFD_RELOC_PPC_B16_BRTAKEN: | |
3041 | reloc = BFD_RELOC_PPC_BA16_BRTAKEN; | |
3042 | break; | |
3043 | case BFD_RELOC_PPC_B16_BRNTAKEN: | |
3044 | reloc = BFD_RELOC_PPC_BA16_BRNTAKEN; | |
3045 | break; | |
3046 | default: | |
3047 | break; | |
3048 | } | |
3049 | } | |
3050 | ||
01efc3af AM |
3051 | switch (reloc) |
3052 | { | |
3053 | case BFD_RELOC_PPC_TOC16: | |
3054 | toc_reloc_types |= has_small_toc_reloc; | |
3055 | break; | |
3056 | case BFD_RELOC_PPC64_TOC16_LO: | |
3057 | case BFD_RELOC_PPC64_TOC16_HI: | |
3058 | case BFD_RELOC_PPC64_TOC16_HA: | |
3059 | toc_reloc_types |= has_large_toc_reloc; | |
3060 | break; | |
3061 | default: | |
3062 | break; | |
3063 | } | |
3064 | ||
727fc41e AM |
3065 | if (ppc_obj64 |
3066 | && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0) | |
3067 | { | |
3068 | switch (reloc) | |
3069 | { | |
3070 | case BFD_RELOC_16: | |
3071 | reloc = BFD_RELOC_PPC64_ADDR16_DS; | |
3072 | break; | |
3073 | case BFD_RELOC_LO16: | |
3074 | reloc = BFD_RELOC_PPC64_ADDR16_LO_DS; | |
3075 | break; | |
3076 | case BFD_RELOC_16_GOTOFF: | |
3077 | reloc = BFD_RELOC_PPC64_GOT16_DS; | |
3078 | break; | |
3079 | case BFD_RELOC_LO16_GOTOFF: | |
3080 | reloc = BFD_RELOC_PPC64_GOT16_LO_DS; | |
3081 | break; | |
3082 | case BFD_RELOC_LO16_PLTOFF: | |
3083 | reloc = BFD_RELOC_PPC64_PLT16_LO_DS; | |
3084 | break; | |
3085 | case BFD_RELOC_16_BASEREL: | |
3086 | reloc = BFD_RELOC_PPC64_SECTOFF_DS; | |
3087 | break; | |
3088 | case BFD_RELOC_LO16_BASEREL: | |
3089 | reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS; | |
3090 | break; | |
3091 | case BFD_RELOC_PPC_TOC16: | |
3092 | reloc = BFD_RELOC_PPC64_TOC16_DS; | |
3093 | break; | |
3094 | case BFD_RELOC_PPC64_TOC16_LO: | |
3095 | reloc = BFD_RELOC_PPC64_TOC16_LO_DS; | |
3096 | break; | |
3097 | case BFD_RELOC_PPC64_PLTGOT16: | |
3098 | reloc = BFD_RELOC_PPC64_PLTGOT16_DS; | |
3099 | break; | |
3100 | case BFD_RELOC_PPC64_PLTGOT16_LO: | |
3101 | reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS; | |
3102 | break; | |
3103 | case BFD_RELOC_PPC_DTPREL16: | |
3104 | reloc = BFD_RELOC_PPC64_DTPREL16_DS; | |
3105 | break; | |
3106 | case BFD_RELOC_PPC_DTPREL16_LO: | |
3107 | reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS; | |
3108 | break; | |
3109 | case BFD_RELOC_PPC_TPREL16: | |
3110 | reloc = BFD_RELOC_PPC64_TPREL16_DS; | |
3111 | break; | |
3112 | case BFD_RELOC_PPC_TPREL16_LO: | |
3113 | reloc = BFD_RELOC_PPC64_TPREL16_LO_DS; | |
3114 | break; | |
3115 | case BFD_RELOC_PPC_GOT_DTPREL16: | |
3116 | case BFD_RELOC_PPC_GOT_DTPREL16_LO: | |
3117 | case BFD_RELOC_PPC_GOT_TPREL16: | |
3118 | case BFD_RELOC_PPC_GOT_TPREL16_LO: | |
3119 | break; | |
3120 | default: | |
3121 | as_bad (_("unsupported relocation for DS offset field")); | |
3122 | break; | |
3123 | } | |
3124 | } | |
0baf16f2 AM |
3125 | } |
3126 | ||
252b5132 RH |
3127 | /* We need to generate a fixup for this expression. */ |
3128 | if (fc >= MAX_INSN_FIXUPS) | |
3129 | as_fatal (_("too many fixups")); | |
3130 | fixups[fc].exp = ex; | |
727fc41e | 3131 | fixups[fc].opindex = *opindex_ptr; |
252b5132 RH |
3132 | fixups[fc].reloc = reloc; |
3133 | ++fc; | |
3134 | } | |
727fc41e | 3135 | #else /* OBJ_ELF */ |
252b5132 RH |
3136 | else |
3137 | { | |
3138 | /* We need to generate a fixup for this expression. */ | |
3139 | if (fc >= MAX_INSN_FIXUPS) | |
3140 | as_fatal (_("too many fixups")); | |
3141 | fixups[fc].exp = ex; | |
3142 | fixups[fc].opindex = *opindex_ptr; | |
3143 | fixups[fc].reloc = BFD_RELOC_UNUSED; | |
3144 | ++fc; | |
3145 | } | |
727fc41e | 3146 | #endif /* OBJ_ELF */ |
252b5132 RH |
3147 | |
3148 | if (need_paren) | |
3149 | { | |
3150 | endc = ')'; | |
3151 | need_paren = 0; | |
c3d65c1c BE |
3152 | /* If expecting more operands, then we want to see "),". */ |
3153 | if (*str == endc && opindex_ptr[1] != 0) | |
3154 | { | |
3155 | do | |
3156 | ++str; | |
3157 | while (ISSPACE (*str)); | |
3158 | endc = ','; | |
3159 | } | |
252b5132 RH |
3160 | } |
3161 | else if ((operand->flags & PPC_OPERAND_PARENS) != 0) | |
3162 | { | |
3163 | endc = '('; | |
3164 | need_paren = 1; | |
3165 | } | |
3166 | else | |
3167 | endc = ','; | |
3168 | ||
3169 | /* The call to expression should have advanced str past any | |
3170 | whitespace. */ | |
3171 | if (*str != endc | |
3172 | && (endc != ',' || *str != '\0')) | |
3173 | { | |
5a938047 AM |
3174 | if (*str == '\0') |
3175 | as_bad (_("syntax error; end of line, expected `%c'"), endc); | |
3176 | else | |
3177 | as_bad (_("syntax error; found `%c', expected `%c'"), *str, endc); | |
252b5132 RH |
3178 | break; |
3179 | } | |
3180 | ||
3181 | if (*str != '\0') | |
3182 | ++str; | |
3183 | } | |
3184 | ||
3882b010 | 3185 | while (ISSPACE (*str)) |
252b5132 RH |
3186 | ++str; |
3187 | ||
3188 | if (*str != '\0') | |
3189 | as_bad (_("junk at end of line: `%s'"), str); | |
3190 | ||
dc1d03fc | 3191 | #ifdef OBJ_ELF |
b9c361e0 JL |
3192 | /* Do we need/want an APUinfo section? */ |
3193 | if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC | PPC_OPCODE_VLE)) != 0) | |
6a0c61b7 EZ |
3194 | { |
3195 | /* These are all version "1". */ | |
3196 | if (opcode->flags & PPC_OPCODE_SPE) | |
b34976b6 | 3197 | ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1); |
6a0c61b7 | 3198 | if (opcode->flags & PPC_OPCODE_ISEL) |
b34976b6 | 3199 | ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1); |
6a0c61b7 | 3200 | if (opcode->flags & PPC_OPCODE_EFS) |
b34976b6 | 3201 | ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1); |
6a0c61b7 | 3202 | if (opcode->flags & PPC_OPCODE_BRLOCK) |
b34976b6 | 3203 | ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1); |
6a0c61b7 | 3204 | if (opcode->flags & PPC_OPCODE_PMR) |
b34976b6 | 3205 | ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1); |
6a0c61b7 | 3206 | if (opcode->flags & PPC_OPCODE_CACHELCK) |
b34976b6 | 3207 | ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1); |
6a0c61b7 | 3208 | if (opcode->flags & PPC_OPCODE_RFMCI) |
b34976b6 | 3209 | ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1); |
b9c361e0 JL |
3210 | if (opcode->flags & PPC_OPCODE_VLE) |
3211 | ppc_apuinfo_section_add (PPC_APUINFO_VLE, 1); | |
6a0c61b7 | 3212 | } |
dc1d03fc | 3213 | #endif |
6a0c61b7 | 3214 | |
252b5132 | 3215 | /* Write out the instruction. */ |
b9c361e0 JL |
3216 | /* Differentiate between two and four byte insns. */ |
3217 | if (ppc_mach () == bfd_mach_ppc_vle) | |
3218 | { | |
3219 | if (PPC_OP_SE_VLE (insn)) | |
3220 | insn_length = 2; | |
3221 | else | |
3222 | insn_length = 4; | |
3223 | addr_mod = frag_now_fix () & 1; | |
3224 | } | |
3225 | else | |
3226 | { | |
3227 | insn_length = 4; | |
3228 | addr_mod = frag_now_fix () & 3; | |
3229 | } | |
3230 | /* All instructions can start on a 2 byte boundary for VLE. */ | |
3231 | f = frag_more (insn_length); | |
09b935ac | 3232 | if (frag_now->has_code && frag_now->insn_addr != addr_mod) |
b9c361e0 JL |
3233 | { |
3234 | if (ppc_mach() == bfd_mach_ppc_vle) | |
3235 | as_bad (_("instruction address is not a multiple of 2")); | |
3236 | else | |
3237 | as_bad (_("instruction address is not a multiple of 4")); | |
3238 | } | |
09b935ac AM |
3239 | frag_now->insn_addr = addr_mod; |
3240 | frag_now->has_code = 1; | |
b9c361e0 | 3241 | md_number_to_chars (f, insn, insn_length); |
252b5132 | 3242 | |
5d6f4f16 | 3243 | #ifdef OBJ_ELF |
b9c361e0 | 3244 | dwarf2_emit_insn (insn_length); |
5d6f4f16 GK |
3245 | #endif |
3246 | ||
252b5132 RH |
3247 | /* Create any fixups. At this point we do not use a |
3248 | bfd_reloc_code_real_type, but instead just use the | |
3249 | BFD_RELOC_UNUSED plus the operand index. This lets us easily | |
3250 | handle fixups for any operand type, although that is admittedly | |
3251 | not a very exciting feature. We pick a BFD reloc type in | |
55cf6793 | 3252 | md_apply_fix. */ |
252b5132 RH |
3253 | for (i = 0; i < fc; i++) |
3254 | { | |
252b5132 RH |
3255 | if (fixups[i].reloc != BFD_RELOC_UNUSED) |
3256 | { | |
99a814a1 | 3257 | reloc_howto_type *reloc_howto; |
252b5132 RH |
3258 | int size; |
3259 | int offset; | |
3260 | fixS *fixP; | |
3261 | ||
99a814a1 | 3262 | reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc); |
252b5132 RH |
3263 | if (!reloc_howto) |
3264 | abort (); | |
3265 | ||
3266 | size = bfd_get_reloc_size (reloc_howto); | |
3267 | offset = target_big_endian ? (4 - size) : 0; | |
3268 | ||
3269 | if (size < 1 || size > 4) | |
bc805888 | 3270 | abort (); |
252b5132 | 3271 | |
99a814a1 AM |
3272 | fixP = fix_new_exp (frag_now, |
3273 | f - frag_now->fr_literal + offset, | |
3274 | size, | |
3275 | &fixups[i].exp, | |
3276 | reloc_howto->pc_relative, | |
252b5132 RH |
3277 | fixups[i].reloc); |
3278 | ||
3279 | /* Turn off complaints that the addend is too large for things like | |
3280 | foo+100000@ha. */ | |
3281 | switch (fixups[i].reloc) | |
3282 | { | |
3283 | case BFD_RELOC_16_GOTOFF: | |
3284 | case BFD_RELOC_PPC_TOC16: | |
3285 | case BFD_RELOC_LO16: | |
3286 | case BFD_RELOC_HI16: | |
3287 | case BFD_RELOC_HI16_S: | |
b9c361e0 JL |
3288 | case BFD_RELOC_PPC_VLE_LO16A: |
3289 | case BFD_RELOC_PPC_VLE_LO16D: | |
3290 | case BFD_RELOC_PPC_VLE_HI16A: | |
3291 | case BFD_RELOC_PPC_VLE_HI16D: | |
3292 | case BFD_RELOC_PPC_VLE_HA16A: | |
3293 | case BFD_RELOC_PPC_VLE_HA16D: | |
0baf16f2 | 3294 | #ifdef OBJ_ELF |
0baf16f2 AM |
3295 | case BFD_RELOC_PPC64_HIGHER: |
3296 | case BFD_RELOC_PPC64_HIGHER_S: | |
3297 | case BFD_RELOC_PPC64_HIGHEST: | |
3298 | case BFD_RELOC_PPC64_HIGHEST_S: | |
0baf16f2 | 3299 | #endif |
252b5132 RH |
3300 | fixP->fx_no_overflow = 1; |
3301 | break; | |
3302 | default: | |
3303 | break; | |
3304 | } | |
3305 | } | |
3306 | else | |
727fc41e AM |
3307 | { |
3308 | const struct powerpc_operand *operand; | |
3309 | ||
3310 | operand = &powerpc_operands[fixups[i].opindex]; | |
3311 | fix_new_exp (frag_now, | |
3312 | f - frag_now->fr_literal, | |
b9c361e0 | 3313 | insn_length, |
727fc41e AM |
3314 | &fixups[i].exp, |
3315 | (operand->flags & PPC_OPERAND_RELATIVE) != 0, | |
3316 | ((bfd_reloc_code_real_type) | |
3317 | (fixups[i].opindex + (int) BFD_RELOC_UNUSED))); | |
3318 | } | |
252b5132 RH |
3319 | } |
3320 | } | |
3321 | ||
3322 | /* Handle a macro. Gather all the operands, transform them as | |
3323 | described by the macro, and call md_assemble recursively. All the | |
3324 | operands are separated by commas; we don't accept parentheses | |
3325 | around operands here. */ | |
3326 | ||
3327 | static void | |
98027b10 | 3328 | ppc_macro (char *str, const struct powerpc_macro *macro) |
252b5132 RH |
3329 | { |
3330 | char *operands[10]; | |
3331 | unsigned int count; | |
3332 | char *s; | |
3333 | unsigned int len; | |
3334 | const char *format; | |
db557034 | 3335 | unsigned int arg; |
252b5132 RH |
3336 | char *send; |
3337 | char *complete; | |
3338 | ||
3339 | /* Gather the users operands into the operands array. */ | |
3340 | count = 0; | |
3341 | s = str; | |
3342 | while (1) | |
3343 | { | |
3344 | if (count >= sizeof operands / sizeof operands[0]) | |
3345 | break; | |
3346 | operands[count++] = s; | |
3347 | s = strchr (s, ','); | |
3348 | if (s == (char *) NULL) | |
3349 | break; | |
3350 | *s++ = '\0'; | |
81d4177b | 3351 | } |
252b5132 RH |
3352 | |
3353 | if (count != macro->operands) | |
3354 | { | |
3355 | as_bad (_("wrong number of operands")); | |
3356 | return; | |
3357 | } | |
3358 | ||
3359 | /* Work out how large the string must be (the size is unbounded | |
3360 | because it includes user input). */ | |
3361 | len = 0; | |
3362 | format = macro->format; | |
3363 | while (*format != '\0') | |
3364 | { | |
3365 | if (*format != '%') | |
3366 | { | |
3367 | ++len; | |
3368 | ++format; | |
3369 | } | |
3370 | else | |
3371 | { | |
3372 | arg = strtol (format + 1, &send, 10); | |
db557034 | 3373 | know (send != format && arg < count); |
252b5132 RH |
3374 | len += strlen (operands[arg]); |
3375 | format = send; | |
3376 | } | |
3377 | } | |
3378 | ||
3379 | /* Put the string together. */ | |
3380 | complete = s = (char *) alloca (len + 1); | |
3381 | format = macro->format; | |
3382 | while (*format != '\0') | |
3383 | { | |
3384 | if (*format != '%') | |
3385 | *s++ = *format++; | |
3386 | else | |
3387 | { | |
3388 | arg = strtol (format + 1, &send, 10); | |
3389 | strcpy (s, operands[arg]); | |
3390 | s += strlen (s); | |
3391 | format = send; | |
3392 | } | |
3393 | } | |
3394 | *s = '\0'; | |
3395 | ||
3396 | /* Assemble the constructed instruction. */ | |
3397 | md_assemble (complete); | |
81d4177b | 3398 | } |
252b5132 RH |
3399 | \f |
3400 | #ifdef OBJ_ELF | |
18ae9cc1 | 3401 | /* For ELF, add support for SHT_ORDERED. */ |
252b5132 RH |
3402 | |
3403 | int | |
98027b10 | 3404 | ppc_section_type (char *str, size_t len) |
252b5132 | 3405 | { |
9de8d8f1 RH |
3406 | if (len == 7 && strncmp (str, "ordered", 7) == 0) |
3407 | return SHT_ORDERED; | |
252b5132 | 3408 | |
9de8d8f1 | 3409 | return -1; |
252b5132 RH |
3410 | } |
3411 | ||
3412 | int | |
1239de13 | 3413 | ppc_section_flags (flagword flags, bfd_vma attr ATTRIBUTE_UNUSED, int type) |
252b5132 RH |
3414 | { |
3415 | if (type == SHT_ORDERED) | |
3416 | flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES; | |
3417 | ||
252b5132 RH |
3418 | return flags; |
3419 | } | |
3420 | #endif /* OBJ_ELF */ | |
3421 | ||
3422 | \f | |
3423 | /* Pseudo-op handling. */ | |
3424 | ||
3425 | /* The .byte pseudo-op. This is similar to the normal .byte | |
3426 | pseudo-op, but it can also take a single ASCII string. */ | |
3427 | ||
3428 | static void | |
98027b10 | 3429 | ppc_byte (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
3430 | { |
3431 | if (*input_line_pointer != '\"') | |
3432 | { | |
3433 | cons (1); | |
3434 | return; | |
3435 | } | |
3436 | ||
3437 | /* Gather characters. A real double quote is doubled. Unusual | |
3438 | characters are not permitted. */ | |
3439 | ++input_line_pointer; | |
3440 | while (1) | |
3441 | { | |
3442 | char c; | |
3443 | ||
3444 | c = *input_line_pointer++; | |
3445 | ||
3446 | if (c == '\"') | |
3447 | { | |
3448 | if (*input_line_pointer != '\"') | |
3449 | break; | |
3450 | ++input_line_pointer; | |
3451 | } | |
3452 | ||
3453 | FRAG_APPEND_1_CHAR (c); | |
3454 | } | |
3455 | ||
3456 | demand_empty_rest_of_line (); | |
3457 | } | |
3458 | \f | |
3459 | #ifdef OBJ_XCOFF | |
3460 | ||
3461 | /* XCOFF specific pseudo-op handling. */ | |
3462 | ||
3463 | /* This is set if we are creating a .stabx symbol, since we don't want | |
3464 | to handle symbol suffixes for such symbols. */ | |
b34976b6 | 3465 | static bfd_boolean ppc_stab_symbol; |
252b5132 RH |
3466 | |
3467 | /* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common | |
3468 | symbols in the .bss segment as though they were local common | |
67c1ffbe | 3469 | symbols, and uses a different smclas. The native Aix 4.3.3 assembler |
1ad63b2f | 3470 | aligns .comm and .lcomm to 4 bytes. */ |
252b5132 RH |
3471 | |
3472 | static void | |
98027b10 | 3473 | ppc_comm (int lcomm) |
252b5132 RH |
3474 | { |
3475 | asection *current_seg = now_seg; | |
3476 | subsegT current_subseg = now_subseg; | |
3477 | char *name; | |
3478 | char endc; | |
3479 | char *end_name; | |
3480 | offsetT size; | |
3481 | offsetT align; | |
3482 | symbolS *lcomm_sym = NULL; | |
3483 | symbolS *sym; | |
3484 | char *pfrag; | |
3485 | ||
3486 | name = input_line_pointer; | |
3487 | endc = get_symbol_end (); | |
3488 | end_name = input_line_pointer; | |
3489 | *end_name = endc; | |
3490 | ||
3491 | if (*input_line_pointer != ',') | |
3492 | { | |
3493 | as_bad (_("missing size")); | |
3494 | ignore_rest_of_line (); | |
3495 | return; | |
3496 | } | |
3497 | ++input_line_pointer; | |
3498 | ||
3499 | size = get_absolute_expression (); | |
3500 | if (size < 0) | |
3501 | { | |
3502 | as_bad (_("negative size")); | |
3503 | ignore_rest_of_line (); | |
3504 | return; | |
3505 | } | |
3506 | ||
3507 | if (! lcomm) | |
3508 | { | |
3509 | /* The third argument to .comm is the alignment. */ | |
3510 | if (*input_line_pointer != ',') | |
1ad63b2f | 3511 | align = 2; |
252b5132 RH |
3512 | else |
3513 | { | |
3514 | ++input_line_pointer; | |
3515 | align = get_absolute_expression (); | |
3516 | if (align <= 0) | |
3517 | { | |
3518 | as_warn (_("ignoring bad alignment")); | |
1ad63b2f | 3519 | align = 2; |
252b5132 RH |
3520 | } |
3521 | } | |
3522 | } | |
3523 | else | |
3524 | { | |
3525 | char *lcomm_name; | |
3526 | char lcomm_endc; | |
3527 | ||
1ad63b2f | 3528 | if (size <= 4) |
252b5132 RH |
3529 | align = 2; |
3530 | else | |
3531 | align = 3; | |
3532 | ||
3533 | /* The third argument to .lcomm appears to be the real local | |
3534 | common symbol to create. References to the symbol named in | |
3535 | the first argument are turned into references to the third | |
3536 | argument. */ | |
3537 | if (*input_line_pointer != ',') | |
3538 | { | |
3539 | as_bad (_("missing real symbol name")); | |
3540 | ignore_rest_of_line (); | |
3541 | return; | |
3542 | } | |
3543 | ++input_line_pointer; | |
3544 | ||
3545 | lcomm_name = input_line_pointer; | |
3546 | lcomm_endc = get_symbol_end (); | |
81d4177b | 3547 | |
252b5132 RH |
3548 | lcomm_sym = symbol_find_or_make (lcomm_name); |
3549 | ||
3550 | *input_line_pointer = lcomm_endc; | |
3551 | } | |
3552 | ||
3553 | *end_name = '\0'; | |
3554 | sym = symbol_find_or_make (name); | |
3555 | *end_name = endc; | |
3556 | ||
3557 | if (S_IS_DEFINED (sym) | |
3558 | || S_GET_VALUE (sym) != 0) | |
3559 | { | |
3560 | as_bad (_("attempt to redefine symbol")); | |
3561 | ignore_rest_of_line (); | |
3562 | return; | |
3563 | } | |
81d4177b | 3564 | |
252b5132 | 3565 | record_alignment (bss_section, align); |
81d4177b | 3566 | |
252b5132 RH |
3567 | if (! lcomm |
3568 | || ! S_IS_DEFINED (lcomm_sym)) | |
3569 | { | |
3570 | symbolS *def_sym; | |
3571 | offsetT def_size; | |
3572 | ||
3573 | if (! lcomm) | |
3574 | { | |
3575 | def_sym = sym; | |
3576 | def_size = size; | |
3577 | S_SET_EXTERNAL (sym); | |
3578 | } | |
3579 | else | |
3580 | { | |
809ffe0d | 3581 | symbol_get_tc (lcomm_sym)->output = 1; |
252b5132 RH |
3582 | def_sym = lcomm_sym; |
3583 | def_size = 0; | |
3584 | } | |
3585 | ||
3586 | subseg_set (bss_section, 1); | |
3587 | frag_align (align, 0, 0); | |
81d4177b | 3588 | |
809ffe0d | 3589 | symbol_set_frag (def_sym, frag_now); |
252b5132 RH |
3590 | pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym, |
3591 | def_size, (char *) NULL); | |
3592 | *pfrag = 0; | |
3593 | S_SET_SEGMENT (def_sym, bss_section); | |
809ffe0d | 3594 | symbol_get_tc (def_sym)->align = align; |
252b5132 RH |
3595 | } |
3596 | else if (lcomm) | |
3597 | { | |
3598 | /* Align the size of lcomm_sym. */ | |
809ffe0d ILT |
3599 | symbol_get_frag (lcomm_sym)->fr_offset = |
3600 | ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1) | |
252b5132 | 3601 | &~ ((1 << align) - 1)); |
809ffe0d ILT |
3602 | if (align > symbol_get_tc (lcomm_sym)->align) |
3603 | symbol_get_tc (lcomm_sym)->align = align; | |
252b5132 RH |
3604 | } |
3605 | ||
3606 | if (lcomm) | |
3607 | { | |
3608 | /* Make sym an offset from lcomm_sym. */ | |
3609 | S_SET_SEGMENT (sym, bss_section); | |
809ffe0d ILT |
3610 | symbol_set_frag (sym, symbol_get_frag (lcomm_sym)); |
3611 | S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset); | |
3612 | symbol_get_frag (lcomm_sym)->fr_offset += size; | |
252b5132 RH |
3613 | } |
3614 | ||
3615 | subseg_set (current_seg, current_subseg); | |
3616 | ||
3617 | demand_empty_rest_of_line (); | |
3618 | } | |
3619 | ||
3620 | /* The .csect pseudo-op. This switches us into a different | |
3621 | subsegment. The first argument is a symbol whose value is the | |
3622 | start of the .csect. In COFF, csect symbols get special aux | |
3623 | entries defined by the x_csect field of union internal_auxent. The | |
3624 | optional second argument is the alignment (the default is 2). */ | |
3625 | ||
3626 | static void | |
98027b10 | 3627 | ppc_csect (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
3628 | { |
3629 | char *name; | |
3630 | char endc; | |
3631 | symbolS *sym; | |
931e13a6 | 3632 | offsetT align; |
252b5132 RH |
3633 | |
3634 | name = input_line_pointer; | |
3635 | endc = get_symbol_end (); | |
81d4177b | 3636 | |
252b5132 RH |
3637 | sym = symbol_find_or_make (name); |
3638 | ||
3639 | *input_line_pointer = endc; | |
3640 | ||
3641 | if (S_GET_NAME (sym)[0] == '\0') | |
3642 | { | |
3643 | /* An unnamed csect is assumed to be [PR]. */ | |
96d56e9f | 3644 | symbol_get_tc (sym)->symbol_class = XMC_PR; |
252b5132 RH |
3645 | } |
3646 | ||
931e13a6 | 3647 | align = 2; |
252b5132 RH |
3648 | if (*input_line_pointer == ',') |
3649 | { | |
3650 | ++input_line_pointer; | |
931e13a6 | 3651 | align = get_absolute_expression (); |
252b5132 RH |
3652 | } |
3653 | ||
931e13a6 AM |
3654 | ppc_change_csect (sym, align); |
3655 | ||
252b5132 RH |
3656 | demand_empty_rest_of_line (); |
3657 | } | |
3658 | ||
3659 | /* Change to a different csect. */ | |
3660 | ||
3661 | static void | |
98027b10 | 3662 | ppc_change_csect (symbolS *sym, offsetT align) |
252b5132 RH |
3663 | { |
3664 | if (S_IS_DEFINED (sym)) | |
809ffe0d | 3665 | subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg); |
252b5132 RH |
3666 | else |
3667 | { | |
3668 | symbolS **list_ptr; | |
3669 | int after_toc; | |
3670 | int hold_chunksize; | |
3671 | symbolS *list; | |
931e13a6 AM |
3672 | int is_code; |
3673 | segT sec; | |
252b5132 RH |
3674 | |
3675 | /* This is a new csect. We need to look at the symbol class to | |
3676 | figure out whether it should go in the text section or the | |
3677 | data section. */ | |
3678 | after_toc = 0; | |
931e13a6 | 3679 | is_code = 0; |
96d56e9f | 3680 | switch (symbol_get_tc (sym)->symbol_class) |
252b5132 RH |
3681 | { |
3682 | case XMC_PR: | |
3683 | case XMC_RO: | |
3684 | case XMC_DB: | |
3685 | case XMC_GL: | |
3686 | case XMC_XO: | |
3687 | case XMC_SV: | |
3688 | case XMC_TI: | |
3689 | case XMC_TB: | |
3690 | S_SET_SEGMENT (sym, text_section); | |
809ffe0d | 3691 | symbol_get_tc (sym)->subseg = ppc_text_subsegment; |
252b5132 RH |
3692 | ++ppc_text_subsegment; |
3693 | list_ptr = &ppc_text_csects; | |
931e13a6 | 3694 | is_code = 1; |
252b5132 RH |
3695 | break; |
3696 | case XMC_RW: | |
3697 | case XMC_TC0: | |
3698 | case XMC_TC: | |
3699 | case XMC_DS: | |
3700 | case XMC_UA: | |
3701 | case XMC_BS: | |
3702 | case XMC_UC: | |
3703 | if (ppc_toc_csect != NULL | |
809ffe0d ILT |
3704 | && (symbol_get_tc (ppc_toc_csect)->subseg + 1 |
3705 | == ppc_data_subsegment)) | |
252b5132 RH |
3706 | after_toc = 1; |
3707 | S_SET_SEGMENT (sym, data_section); | |
809ffe0d | 3708 | symbol_get_tc (sym)->subseg = ppc_data_subsegment; |
252b5132 RH |
3709 | ++ppc_data_subsegment; |
3710 | list_ptr = &ppc_data_csects; | |
3711 | break; | |
3712 | default: | |
3713 | abort (); | |
3714 | } | |
3715 | ||
3716 | /* We set the obstack chunk size to a small value before | |
99a814a1 AM |
3717 | changing subsegments, so that we don't use a lot of memory |
3718 | space for what may be a small section. */ | |
252b5132 RH |
3719 | hold_chunksize = chunksize; |
3720 | chunksize = 64; | |
3721 | ||
931e13a6 AM |
3722 | sec = subseg_new (segment_name (S_GET_SEGMENT (sym)), |
3723 | symbol_get_tc (sym)->subseg); | |
252b5132 RH |
3724 | |
3725 | chunksize = hold_chunksize; | |
3726 | ||
3727 | if (after_toc) | |
3728 | ppc_after_toc_frag = frag_now; | |
3729 | ||
931e13a6 AM |
3730 | record_alignment (sec, align); |
3731 | if (is_code) | |
3732 | frag_align_code (align, 0); | |
3733 | else | |
3734 | frag_align (align, 0, 0); | |
3735 | ||
809ffe0d | 3736 | symbol_set_frag (sym, frag_now); |
252b5132 RH |
3737 | S_SET_VALUE (sym, (valueT) frag_now_fix ()); |
3738 | ||
931e13a6 | 3739 | symbol_get_tc (sym)->align = align; |
809ffe0d ILT |
3740 | symbol_get_tc (sym)->output = 1; |
3741 | symbol_get_tc (sym)->within = sym; | |
81d4177b | 3742 | |
252b5132 | 3743 | for (list = *list_ptr; |
809ffe0d ILT |
3744 | symbol_get_tc (list)->next != (symbolS *) NULL; |
3745 | list = symbol_get_tc (list)->next) | |
252b5132 | 3746 | ; |
809ffe0d | 3747 | symbol_get_tc (list)->next = sym; |
81d4177b | 3748 | |
252b5132 | 3749 | symbol_remove (sym, &symbol_rootP, &symbol_lastP); |
809ffe0d ILT |
3750 | symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP, |
3751 | &symbol_lastP); | |
252b5132 RH |
3752 | } |
3753 | ||
3754 | ppc_current_csect = sym; | |
3755 | } | |
3756 | ||
85645aed TG |
3757 | static void |
3758 | ppc_change_debug_section (unsigned int idx, subsegT subseg) | |
3759 | { | |
3760 | segT sec; | |
3761 | flagword oldflags; | |
3762 | const struct xcoff_dwsect_name *dw = &xcoff_dwsect_names[idx]; | |
3763 | ||
3764 | sec = subseg_new (dw->name, subseg); | |
3765 | oldflags = bfd_get_section_flags (stdoutput, sec); | |
3766 | if (oldflags == SEC_NO_FLAGS) | |
3767 | { | |
3768 | /* Just created section. */ | |
3769 | gas_assert (dw_sections[idx].sect == NULL); | |
3770 | ||
3771 | bfd_set_section_flags (stdoutput, sec, SEC_DEBUGGING); | |
3772 | bfd_set_section_alignment (stdoutput, sec, 0); | |
3773 | dw_sections[idx].sect = sec; | |
3774 | } | |
3775 | ||
3776 | /* Not anymore in a csect. */ | |
3777 | ppc_current_csect = NULL; | |
3778 | } | |
3779 | ||
3780 | /* The .dwsect pseudo-op. Defines a DWARF section. Syntax is: | |
3781 | .dwsect flag [, opt-label ] | |
3782 | */ | |
3783 | ||
3784 | static void | |
3785 | ppc_dwsect (int ignore ATTRIBUTE_UNUSED) | |
3786 | { | |
3787 | offsetT flag; | |
3788 | symbolS *opt_label; | |
3789 | const struct xcoff_dwsect_name *dw; | |
3790 | struct dw_subsection *subseg; | |
3791 | struct dw_section *dws; | |
3792 | int i; | |
3793 | ||
3794 | /* Find section. */ | |
3795 | flag = get_absolute_expression (); | |
3796 | dw = NULL; | |
3797 | for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++) | |
3798 | if (xcoff_dwsect_names[i].flag == flag) | |
3799 | { | |
3800 | dw = &xcoff_dwsect_names[i]; | |
3801 | break; | |
3802 | } | |
3803 | ||
3804 | /* Parse opt-label. */ | |
3805 | if (*input_line_pointer == ',') | |
3806 | { | |
3807 | const char *label; | |
3808 | char c; | |
3809 | ||
3810 | ++input_line_pointer; | |
3811 | ||
3812 | label = input_line_pointer; | |
3813 | c = get_symbol_end (); | |
3814 | opt_label = symbol_find_or_make (label); | |
3815 | *input_line_pointer = c; | |
3816 | } | |
3817 | else | |
3818 | opt_label = NULL; | |
3819 | ||
3820 | demand_empty_rest_of_line (); | |
3821 | ||
3822 | /* Return now in case of unknown subsection. */ | |
3823 | if (dw == NULL) | |
3824 | { | |
d6ed37ed | 3825 | as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"), |
85645aed TG |
3826 | (unsigned)flag); |
3827 | return; | |
3828 | } | |
3829 | ||
3830 | /* Find the subsection. */ | |
3831 | dws = &dw_sections[i]; | |
3832 | subseg = NULL; | |
3833 | if (opt_label != NULL && S_IS_DEFINED (opt_label)) | |
3834 | { | |
3835 | /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */ | |
3836 | if (dws->sect == NULL || S_GET_SEGMENT (opt_label) != dws->sect) | |
3837 | { | |
3838 | as_bad (_("label %s was not defined in this dwarf section"), | |
3839 | S_GET_NAME (opt_label)); | |
3840 | subseg = dws->anon_subseg; | |
3841 | opt_label = NULL; | |
3842 | } | |
3843 | else | |
3844 | subseg = symbol_get_tc (opt_label)->u.dw; | |
3845 | } | |
3846 | ||
3847 | if (subseg != NULL) | |
3848 | { | |
3849 | /* Switch to the subsection. */ | |
3850 | ppc_change_debug_section (i, subseg->subseg); | |
3851 | } | |
3852 | else | |
3853 | { | |
3854 | /* Create a new dw subsection. */ | |
3855 | subseg = (struct dw_subsection *) | |
3856 | xmalloc (sizeof (struct dw_subsection)); | |
3857 | ||
3858 | if (opt_label == NULL) | |
3859 | { | |
3860 | /* The anonymous one. */ | |
3861 | subseg->subseg = 0; | |
3862 | subseg->link = NULL; | |
3863 | dws->anon_subseg = subseg; | |
3864 | } | |
3865 | else | |
3866 | { | |
3867 | /* A named one. */ | |
3868 | if (dws->list_subseg != NULL) | |
3869 | subseg->subseg = dws->list_subseg->subseg + 1; | |
3870 | else | |
3871 | subseg->subseg = 1; | |
3872 | ||
3873 | subseg->link = dws->list_subseg; | |
3874 | dws->list_subseg = subseg; | |
3875 | symbol_get_tc (opt_label)->u.dw = subseg; | |
3876 | } | |
3877 | ||
3878 | ppc_change_debug_section (i, subseg->subseg); | |
3879 | ||
3880 | if (dw->def_size) | |
3881 | { | |
3882 | /* Add the length field. */ | |
3883 | expressionS *exp = &subseg->end_exp; | |
3884 | int sz; | |
3885 | ||
3886 | if (opt_label != NULL) | |
3887 | symbol_set_value_now (opt_label); | |
3888 | ||
3889 | /* Add the length field. Note that according to the AIX assembler | |
3890 | manual, the size of the length field is 4 for powerpc32 but | |
3891 | 12 for powerpc64. */ | |
3892 | if (ppc_obj64) | |
3893 | { | |
3894 | /* Write the 64bit marker. */ | |
3895 | md_number_to_chars (frag_more (4), -1, 4); | |
3896 | } | |
3897 | ||
3898 | exp->X_op = O_subtract; | |
3899 | exp->X_op_symbol = symbol_temp_new_now (); | |
3900 | exp->X_add_symbol = symbol_temp_make (); | |
3901 | ||
3902 | sz = ppc_obj64 ? 8 : 4; | |
3903 | exp->X_add_number = -sz; | |
3904 | emit_expr (exp, sz); | |
3905 | } | |
3906 | } | |
3907 | } | |
3908 | ||
252b5132 RH |
3909 | /* This function handles the .text and .data pseudo-ops. These |
3910 | pseudo-ops aren't really used by XCOFF; we implement them for the | |
3911 | convenience of people who aren't used to XCOFF. */ | |
3912 | ||
3913 | static void | |
98027b10 | 3914 | ppc_section (int type) |
252b5132 RH |
3915 | { |
3916 | const char *name; | |
3917 | symbolS *sym; | |
3918 | ||
3919 | if (type == 't') | |
3920 | name = ".text[PR]"; | |
3921 | else if (type == 'd') | |
3922 | name = ".data[RW]"; | |
3923 | else | |
3924 | abort (); | |
3925 | ||
3926 | sym = symbol_find_or_make (name); | |
3927 | ||
931e13a6 | 3928 | ppc_change_csect (sym, 2); |
252b5132 RH |
3929 | |
3930 | demand_empty_rest_of_line (); | |
3931 | } | |
3932 | ||
3933 | /* This function handles the .section pseudo-op. This is mostly to | |
3934 | give an error, since XCOFF only supports .text, .data and .bss, but | |
3935 | we do permit the user to name the text or data section. */ | |
3936 | ||
3937 | static void | |
98027b10 | 3938 | ppc_named_section (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
3939 | { |
3940 | char *user_name; | |
3941 | const char *real_name; | |
3942 | char c; | |
3943 | symbolS *sym; | |
3944 | ||
3945 | user_name = input_line_pointer; | |
3946 | c = get_symbol_end (); | |
3947 | ||
3948 | if (strcmp (user_name, ".text") == 0) | |
3949 | real_name = ".text[PR]"; | |
3950 | else if (strcmp (user_name, ".data") == 0) | |
3951 | real_name = ".data[RW]"; | |
3952 | else | |
3953 | { | |
d6ed37ed | 3954 | as_bad (_("the XCOFF file format does not support arbitrary sections")); |
252b5132 RH |
3955 | *input_line_pointer = c; |
3956 | ignore_rest_of_line (); | |
3957 | return; | |
3958 | } | |
3959 | ||
3960 | *input_line_pointer = c; | |
3961 | ||
3962 | sym = symbol_find_or_make (real_name); | |
3963 | ||
931e13a6 | 3964 | ppc_change_csect (sym, 2); |
252b5132 RH |
3965 | |
3966 | demand_empty_rest_of_line (); | |
3967 | } | |
3968 | ||
3969 | /* The .extern pseudo-op. We create an undefined symbol. */ | |
3970 | ||
3971 | static void | |
98027b10 | 3972 | ppc_extern (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
3973 | { |
3974 | char *name; | |
3975 | char endc; | |
3976 | ||
3977 | name = input_line_pointer; | |
3978 | endc = get_symbol_end (); | |
3979 | ||
3980 | (void) symbol_find_or_make (name); | |
3981 | ||
3982 | *input_line_pointer = endc; | |
3983 | ||
3984 | demand_empty_rest_of_line (); | |
3985 | } | |
3986 | ||
3987 | /* The .lglobl pseudo-op. Keep the symbol in the symbol table. */ | |
3988 | ||
3989 | static void | |
98027b10 | 3990 | ppc_lglobl (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
3991 | { |
3992 | char *name; | |
3993 | char endc; | |
3994 | symbolS *sym; | |
3995 | ||
3996 | name = input_line_pointer; | |
3997 | endc = get_symbol_end (); | |
3998 | ||
3999 | sym = symbol_find_or_make (name); | |
4000 | ||
4001 | *input_line_pointer = endc; | |
4002 | ||
809ffe0d | 4003 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
4004 | |
4005 | demand_empty_rest_of_line (); | |
4006 | } | |
4007 | ||
c865e45b RS |
4008 | /* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF |
4009 | relocations at the beginning of the current csect. | |
4010 | ||
4011 | (In principle, there's no reason why the relocations _have_ to be at | |
4012 | the beginning. Anywhere in the csect would do. However, inserting | |
4013 | at the beginning is what the native assmebler does, and it helps to | |
4014 | deal with cases where the .ref statements follow the section contents.) | |
4015 | ||
4016 | ??? .refs don't work for empty .csects. However, the native assembler | |
4017 | doesn't report an error in this case, and neither yet do we. */ | |
4018 | ||
4019 | static void | |
4020 | ppc_ref (int ignore ATTRIBUTE_UNUSED) | |
4021 | { | |
4022 | char *name; | |
4023 | char c; | |
4024 | ||
4025 | if (ppc_current_csect == NULL) | |
4026 | { | |
4027 | as_bad (_(".ref outside .csect")); | |
4028 | ignore_rest_of_line (); | |
4029 | return; | |
4030 | } | |
4031 | ||
4032 | do | |
4033 | { | |
4034 | name = input_line_pointer; | |
4035 | c = get_symbol_end (); | |
4036 | ||
4037 | fix_at_start (symbol_get_frag (ppc_current_csect), 0, | |
4038 | symbol_find_or_make (name), 0, FALSE, BFD_RELOC_NONE); | |
4039 | ||
4040 | *input_line_pointer = c; | |
4041 | SKIP_WHITESPACE (); | |
4042 | c = *input_line_pointer; | |
4043 | if (c == ',') | |
4044 | { | |
4045 | input_line_pointer++; | |
4046 | SKIP_WHITESPACE (); | |
4047 | if (is_end_of_line[(unsigned char) *input_line_pointer]) | |
4048 | { | |
4049 | as_bad (_("missing symbol name")); | |
4050 | ignore_rest_of_line (); | |
4051 | return; | |
4052 | } | |
4053 | } | |
4054 | } | |
4055 | while (c == ','); | |
4056 | ||
4057 | demand_empty_rest_of_line (); | |
4058 | } | |
4059 | ||
252b5132 RH |
4060 | /* The .rename pseudo-op. The RS/6000 assembler can rename symbols, |
4061 | although I don't know why it bothers. */ | |
4062 | ||
4063 | static void | |
98027b10 | 4064 | ppc_rename (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4065 | { |
4066 | char *name; | |
4067 | char endc; | |
4068 | symbolS *sym; | |
4069 | int len; | |
4070 | ||
4071 | name = input_line_pointer; | |
4072 | endc = get_symbol_end (); | |
4073 | ||
4074 | sym = symbol_find_or_make (name); | |
4075 | ||
4076 | *input_line_pointer = endc; | |
4077 | ||
4078 | if (*input_line_pointer != ',') | |
4079 | { | |
4080 | as_bad (_("missing rename string")); | |
4081 | ignore_rest_of_line (); | |
4082 | return; | |
4083 | } | |
4084 | ++input_line_pointer; | |
4085 | ||
809ffe0d | 4086 | symbol_get_tc (sym)->real_name = demand_copy_C_string (&len); |
252b5132 RH |
4087 | |
4088 | demand_empty_rest_of_line (); | |
4089 | } | |
4090 | ||
4091 | /* The .stabx pseudo-op. This is similar to a normal .stabs | |
4092 | pseudo-op, but slightly different. A sample is | |
4093 | .stabx "main:F-1",.main,142,0 | |
4094 | The first argument is the symbol name to create. The second is the | |
4095 | value, and the third is the storage class. The fourth seems to be | |
4096 | always zero, and I am assuming it is the type. */ | |
4097 | ||
4098 | static void | |
98027b10 | 4099 | ppc_stabx (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4100 | { |
4101 | char *name; | |
4102 | int len; | |
4103 | symbolS *sym; | |
4104 | expressionS exp; | |
4105 | ||
4106 | name = demand_copy_C_string (&len); | |
4107 | ||
4108 | if (*input_line_pointer != ',') | |
4109 | { | |
4110 | as_bad (_("missing value")); | |
4111 | return; | |
4112 | } | |
4113 | ++input_line_pointer; | |
4114 | ||
b34976b6 | 4115 | ppc_stab_symbol = TRUE; |
252b5132 | 4116 | sym = symbol_make (name); |
b34976b6 | 4117 | ppc_stab_symbol = FALSE; |
252b5132 | 4118 | |
809ffe0d | 4119 | symbol_get_tc (sym)->real_name = name; |
252b5132 RH |
4120 | |
4121 | (void) expression (&exp); | |
4122 | ||
4123 | switch (exp.X_op) | |
4124 | { | |
4125 | case O_illegal: | |
4126 | case O_absent: | |
4127 | case O_big: | |
4128 | as_bad (_("illegal .stabx expression; zero assumed")); | |
4129 | exp.X_add_number = 0; | |
4130 | /* Fall through. */ | |
4131 | case O_constant: | |
4132 | S_SET_VALUE (sym, (valueT) exp.X_add_number); | |
809ffe0d | 4133 | symbol_set_frag (sym, &zero_address_frag); |
252b5132 RH |
4134 | break; |
4135 | ||
4136 | case O_symbol: | |
4137 | if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section) | |
809ffe0d | 4138 | symbol_set_value_expression (sym, &exp); |
252b5132 RH |
4139 | else |
4140 | { | |
4141 | S_SET_VALUE (sym, | |
4142 | exp.X_add_number + S_GET_VALUE (exp.X_add_symbol)); | |
809ffe0d | 4143 | symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol)); |
252b5132 RH |
4144 | } |
4145 | break; | |
4146 | ||
4147 | default: | |
4148 | /* The value is some complex expression. This will probably | |
99a814a1 AM |
4149 | fail at some later point, but this is probably the right |
4150 | thing to do here. */ | |
809ffe0d | 4151 | symbol_set_value_expression (sym, &exp); |
252b5132 RH |
4152 | break; |
4153 | } | |
4154 | ||
4155 | S_SET_SEGMENT (sym, ppc_coff_debug_section); | |
809ffe0d | 4156 | symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; |
252b5132 RH |
4157 | |
4158 | if (*input_line_pointer != ',') | |
4159 | { | |
4160 | as_bad (_("missing class")); | |
4161 | return; | |
4162 | } | |
4163 | ++input_line_pointer; | |
4164 | ||
4165 | S_SET_STORAGE_CLASS (sym, get_absolute_expression ()); | |
4166 | ||
4167 | if (*input_line_pointer != ',') | |
4168 | { | |
4169 | as_bad (_("missing type")); | |
4170 | return; | |
4171 | } | |
4172 | ++input_line_pointer; | |
4173 | ||
4174 | S_SET_DATA_TYPE (sym, get_absolute_expression ()); | |
4175 | ||
809ffe0d | 4176 | symbol_get_tc (sym)->output = 1; |
252b5132 | 4177 | |
c734e7e3 TG |
4178 | if (S_GET_STORAGE_CLASS (sym) == C_STSYM) |
4179 | { | |
4180 | /* In this case : | |
252b5132 | 4181 | |
c734e7e3 TG |
4182 | .bs name |
4183 | .stabx "z",arrays_,133,0 | |
4184 | .es | |
99a814a1 | 4185 | |
c734e7e3 | 4186 | .comm arrays_,13768,3 |
99a814a1 | 4187 | |
c734e7e3 TG |
4188 | resolve_symbol_value will copy the exp's "within" into sym's when the |
4189 | offset is 0. Since this seems to be corner case problem, | |
4190 | only do the correction for storage class C_STSYM. A better solution | |
4191 | would be to have the tc field updated in ppc_symbol_new_hook. */ | |
99a814a1 | 4192 | |
c734e7e3 TG |
4193 | if (exp.X_op == O_symbol) |
4194 | { | |
4195 | if (ppc_current_block == NULL) | |
4196 | as_bad (_(".stabx of storage class stsym must be within .bs/.es")); | |
99a814a1 | 4197 | |
c734e7e3 TG |
4198 | symbol_get_tc (sym)->within = ppc_current_block; |
4199 | symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block; | |
4200 | } | |
4201 | } | |
99a814a1 | 4202 | |
252b5132 RH |
4203 | if (exp.X_op != O_symbol |
4204 | || ! S_IS_EXTERNAL (exp.X_add_symbol) | |
4205 | || S_GET_SEGMENT (exp.X_add_symbol) != bss_section) | |
4206 | ppc_frob_label (sym); | |
4207 | else | |
4208 | { | |
4209 | symbol_remove (sym, &symbol_rootP, &symbol_lastP); | |
4210 | symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP); | |
809ffe0d ILT |
4211 | if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol) |
4212 | symbol_get_tc (ppc_current_csect)->within = sym; | |
252b5132 RH |
4213 | } |
4214 | ||
4215 | demand_empty_rest_of_line (); | |
4216 | } | |
4217 | ||
4218 | /* The .function pseudo-op. This takes several arguments. The first | |
4219 | argument seems to be the external name of the symbol. The second | |
67c1ffbe | 4220 | argument seems to be the label for the start of the function. gcc |
252b5132 RH |
4221 | uses the same name for both. I have no idea what the third and |
4222 | fourth arguments are meant to be. The optional fifth argument is | |
4223 | an expression for the size of the function. In COFF this symbol | |
4224 | gets an aux entry like that used for a csect. */ | |
4225 | ||
4226 | static void | |
98027b10 | 4227 | ppc_function (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4228 | { |
4229 | char *name; | |
4230 | char endc; | |
4231 | char *s; | |
4232 | symbolS *ext_sym; | |
4233 | symbolS *lab_sym; | |
4234 | ||
4235 | name = input_line_pointer; | |
4236 | endc = get_symbol_end (); | |
4237 | ||
4238 | /* Ignore any [PR] suffix. */ | |
4239 | name = ppc_canonicalize_symbol_name (name); | |
4240 | s = strchr (name, '['); | |
4241 | if (s != (char *) NULL | |
4242 | && strcmp (s + 1, "PR]") == 0) | |
4243 | *s = '\0'; | |
4244 | ||
4245 | ext_sym = symbol_find_or_make (name); | |
4246 | ||
4247 | *input_line_pointer = endc; | |
4248 | ||
4249 | if (*input_line_pointer != ',') | |
4250 | { | |
4251 | as_bad (_("missing symbol name")); | |
4252 | ignore_rest_of_line (); | |
4253 | return; | |
4254 | } | |
4255 | ++input_line_pointer; | |
4256 | ||
4257 | name = input_line_pointer; | |
4258 | endc = get_symbol_end (); | |
4259 | ||
4260 | lab_sym = symbol_find_or_make (name); | |
4261 | ||
4262 | *input_line_pointer = endc; | |
4263 | ||
4264 | if (ext_sym != lab_sym) | |
4265 | { | |
809ffe0d ILT |
4266 | expressionS exp; |
4267 | ||
4268 | exp.X_op = O_symbol; | |
4269 | exp.X_add_symbol = lab_sym; | |
4270 | exp.X_op_symbol = NULL; | |
4271 | exp.X_add_number = 0; | |
4272 | exp.X_unsigned = 0; | |
4273 | symbol_set_value_expression (ext_sym, &exp); | |
252b5132 RH |
4274 | } |
4275 | ||
96d56e9f NC |
4276 | if (symbol_get_tc (ext_sym)->symbol_class == -1) |
4277 | symbol_get_tc (ext_sym)->symbol_class = XMC_PR; | |
809ffe0d | 4278 | symbol_get_tc (ext_sym)->output = 1; |
252b5132 RH |
4279 | |
4280 | if (*input_line_pointer == ',') | |
4281 | { | |
91d6fa6a | 4282 | expressionS exp; |
252b5132 RH |
4283 | |
4284 | /* Ignore the third argument. */ | |
4285 | ++input_line_pointer; | |
91d6fa6a | 4286 | expression (& exp); |
252b5132 RH |
4287 | if (*input_line_pointer == ',') |
4288 | { | |
4289 | /* Ignore the fourth argument. */ | |
4290 | ++input_line_pointer; | |
91d6fa6a | 4291 | expression (& exp); |
252b5132 RH |
4292 | if (*input_line_pointer == ',') |
4293 | { | |
4294 | /* The fifth argument is the function size. */ | |
4295 | ++input_line_pointer; | |
85645aed TG |
4296 | symbol_get_tc (ext_sym)->u.size = symbol_new |
4297 | ("L0\001", absolute_section,(valueT) 0, &zero_address_frag); | |
4298 | pseudo_set (symbol_get_tc (ext_sym)->u.size); | |
252b5132 RH |
4299 | } |
4300 | } | |
4301 | } | |
4302 | ||
4303 | S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT); | |
4304 | SF_SET_FUNCTION (ext_sym); | |
4305 | SF_SET_PROCESS (ext_sym); | |
4306 | coff_add_linesym (ext_sym); | |
4307 | ||
4308 | demand_empty_rest_of_line (); | |
4309 | } | |
4310 | ||
4311 | /* The .bf pseudo-op. This is just like a COFF C_FCN symbol named | |
8642cce8 TR |
4312 | ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym |
4313 | with the correct line number */ | |
5d6255fe | 4314 | |
8642cce8 | 4315 | static symbolS *saved_bi_sym = 0; |
252b5132 RH |
4316 | |
4317 | static void | |
98027b10 | 4318 | ppc_bf (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4319 | { |
4320 | symbolS *sym; | |
4321 | ||
4322 | sym = symbol_make (".bf"); | |
4323 | S_SET_SEGMENT (sym, text_section); | |
809ffe0d | 4324 | symbol_set_frag (sym, frag_now); |
252b5132 RH |
4325 | S_SET_VALUE (sym, frag_now_fix ()); |
4326 | S_SET_STORAGE_CLASS (sym, C_FCN); | |
4327 | ||
4328 | coff_line_base = get_absolute_expression (); | |
4329 | ||
4330 | S_SET_NUMBER_AUXILIARY (sym, 1); | |
4331 | SA_SET_SYM_LNNO (sym, coff_line_base); | |
4332 | ||
8642cce8 | 4333 | /* Line number for bi. */ |
5d6255fe | 4334 | if (saved_bi_sym) |
8642cce8 TR |
4335 | { |
4336 | S_SET_VALUE (saved_bi_sym, coff_n_line_nos); | |
4337 | saved_bi_sym = 0; | |
4338 | } | |
5d6255fe | 4339 | |
8642cce8 | 4340 | |
809ffe0d | 4341 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
4342 | |
4343 | ppc_frob_label (sym); | |
4344 | ||
4345 | demand_empty_rest_of_line (); | |
4346 | } | |
4347 | ||
4348 | /* The .ef pseudo-op. This is just like a COFF C_FCN symbol named | |
4349 | ".ef", except that the line number is absolute, not relative to the | |
4350 | most recent ".bf" symbol. */ | |
4351 | ||
4352 | static void | |
98027b10 | 4353 | ppc_ef (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4354 | { |
4355 | symbolS *sym; | |
4356 | ||
4357 | sym = symbol_make (".ef"); | |
4358 | S_SET_SEGMENT (sym, text_section); | |
809ffe0d | 4359 | symbol_set_frag (sym, frag_now); |
252b5132 RH |
4360 | S_SET_VALUE (sym, frag_now_fix ()); |
4361 | S_SET_STORAGE_CLASS (sym, C_FCN); | |
4362 | S_SET_NUMBER_AUXILIARY (sym, 1); | |
4363 | SA_SET_SYM_LNNO (sym, get_absolute_expression ()); | |
809ffe0d | 4364 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
4365 | |
4366 | ppc_frob_label (sym); | |
4367 | ||
4368 | demand_empty_rest_of_line (); | |
4369 | } | |
4370 | ||
4371 | /* The .bi and .ei pseudo-ops. These take a string argument and | |
4372 | generates a C_BINCL or C_EINCL symbol, which goes at the start of | |
8642cce8 TR |
4373 | the symbol list. The value of .bi will be know when the next .bf |
4374 | is encountered. */ | |
252b5132 RH |
4375 | |
4376 | static void | |
98027b10 | 4377 | ppc_biei (int ei) |
252b5132 RH |
4378 | { |
4379 | static symbolS *last_biei; | |
4380 | ||
4381 | char *name; | |
4382 | int len; | |
4383 | symbolS *sym; | |
4384 | symbolS *look; | |
4385 | ||
4386 | name = demand_copy_C_string (&len); | |
4387 | ||
4388 | /* The value of these symbols is actually file offset. Here we set | |
4389 | the value to the index into the line number entries. In | |
4390 | ppc_frob_symbols we set the fix_line field, which will cause BFD | |
4391 | to do the right thing. */ | |
4392 | ||
4393 | sym = symbol_make (name); | |
4394 | /* obj-coff.c currently only handles line numbers correctly in the | |
4395 | .text section. */ | |
4396 | S_SET_SEGMENT (sym, text_section); | |
4397 | S_SET_VALUE (sym, coff_n_line_nos); | |
809ffe0d | 4398 | symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; |
252b5132 RH |
4399 | |
4400 | S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL); | |
809ffe0d | 4401 | symbol_get_tc (sym)->output = 1; |
81d4177b | 4402 | |
8642cce8 | 4403 | /* Save bi. */ |
5d6255fe | 4404 | if (ei) |
8642cce8 TR |
4405 | saved_bi_sym = 0; |
4406 | else | |
4407 | saved_bi_sym = sym; | |
4408 | ||
252b5132 RH |
4409 | for (look = last_biei ? last_biei : symbol_rootP; |
4410 | (look != (symbolS *) NULL | |
4411 | && (S_GET_STORAGE_CLASS (look) == C_FILE | |
4412 | || S_GET_STORAGE_CLASS (look) == C_BINCL | |
4413 | || S_GET_STORAGE_CLASS (look) == C_EINCL)); | |
4414 | look = symbol_next (look)) | |
4415 | ; | |
4416 | if (look != (symbolS *) NULL) | |
4417 | { | |
4418 | symbol_remove (sym, &symbol_rootP, &symbol_lastP); | |
4419 | symbol_insert (sym, look, &symbol_rootP, &symbol_lastP); | |
4420 | last_biei = sym; | |
4421 | } | |
4422 | ||
4423 | demand_empty_rest_of_line (); | |
4424 | } | |
4425 | ||
4426 | /* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs". | |
4427 | There is one argument, which is a csect symbol. The value of the | |
4428 | .bs symbol is the index of this csect symbol. */ | |
4429 | ||
4430 | static void | |
98027b10 | 4431 | ppc_bs (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4432 | { |
4433 | char *name; | |
4434 | char endc; | |
4435 | symbolS *csect; | |
4436 | symbolS *sym; | |
4437 | ||
4438 | if (ppc_current_block != NULL) | |
4439 | as_bad (_("nested .bs blocks")); | |
4440 | ||
4441 | name = input_line_pointer; | |
4442 | endc = get_symbol_end (); | |
4443 | ||
4444 | csect = symbol_find_or_make (name); | |
4445 | ||
4446 | *input_line_pointer = endc; | |
4447 | ||
4448 | sym = symbol_make (".bs"); | |
4449 | S_SET_SEGMENT (sym, now_seg); | |
4450 | S_SET_STORAGE_CLASS (sym, C_BSTAT); | |
809ffe0d ILT |
4451 | symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; |
4452 | symbol_get_tc (sym)->output = 1; | |
252b5132 | 4453 | |
809ffe0d | 4454 | symbol_get_tc (sym)->within = csect; |
252b5132 RH |
4455 | |
4456 | ppc_frob_label (sym); | |
4457 | ||
4458 | ppc_current_block = sym; | |
4459 | ||
4460 | demand_empty_rest_of_line (); | |
4461 | } | |
4462 | ||
4463 | /* The .es pseudo-op. Generate a C_ESTART symbol named .es. */ | |
4464 | ||
4465 | static void | |
98027b10 | 4466 | ppc_es (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4467 | { |
4468 | symbolS *sym; | |
4469 | ||
4470 | if (ppc_current_block == NULL) | |
4471 | as_bad (_(".es without preceding .bs")); | |
4472 | ||
4473 | sym = symbol_make (".es"); | |
4474 | S_SET_SEGMENT (sym, now_seg); | |
4475 | S_SET_STORAGE_CLASS (sym, C_ESTAT); | |
809ffe0d ILT |
4476 | symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; |
4477 | symbol_get_tc (sym)->output = 1; | |
252b5132 RH |
4478 | |
4479 | ppc_frob_label (sym); | |
4480 | ||
4481 | ppc_current_block = NULL; | |
4482 | ||
4483 | demand_empty_rest_of_line (); | |
4484 | } | |
4485 | ||
4486 | /* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a | |
4487 | line number. */ | |
4488 | ||
4489 | static void | |
98027b10 | 4490 | ppc_bb (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4491 | { |
4492 | symbolS *sym; | |
4493 | ||
4494 | sym = symbol_make (".bb"); | |
4495 | S_SET_SEGMENT (sym, text_section); | |
809ffe0d | 4496 | symbol_set_frag (sym, frag_now); |
252b5132 RH |
4497 | S_SET_VALUE (sym, frag_now_fix ()); |
4498 | S_SET_STORAGE_CLASS (sym, C_BLOCK); | |
4499 | ||
4500 | S_SET_NUMBER_AUXILIARY (sym, 1); | |
4501 | SA_SET_SYM_LNNO (sym, get_absolute_expression ()); | |
4502 | ||
809ffe0d | 4503 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
4504 | |
4505 | SF_SET_PROCESS (sym); | |
4506 | ||
4507 | ppc_frob_label (sym); | |
4508 | ||
4509 | demand_empty_rest_of_line (); | |
4510 | } | |
4511 | ||
4512 | /* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a | |
4513 | line number. */ | |
4514 | ||
4515 | static void | |
98027b10 | 4516 | ppc_eb (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4517 | { |
4518 | symbolS *sym; | |
4519 | ||
4520 | sym = symbol_make (".eb"); | |
4521 | S_SET_SEGMENT (sym, text_section); | |
809ffe0d | 4522 | symbol_set_frag (sym, frag_now); |
252b5132 RH |
4523 | S_SET_VALUE (sym, frag_now_fix ()); |
4524 | S_SET_STORAGE_CLASS (sym, C_BLOCK); | |
4525 | S_SET_NUMBER_AUXILIARY (sym, 1); | |
4526 | SA_SET_SYM_LNNO (sym, get_absolute_expression ()); | |
809ffe0d | 4527 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
4528 | |
4529 | SF_SET_PROCESS (sym); | |
4530 | ||
4531 | ppc_frob_label (sym); | |
4532 | ||
4533 | demand_empty_rest_of_line (); | |
4534 | } | |
4535 | ||
4536 | /* The .bc pseudo-op. This just creates a C_BCOMM symbol with a | |
4537 | specified name. */ | |
4538 | ||
4539 | static void | |
98027b10 | 4540 | ppc_bc (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4541 | { |
4542 | char *name; | |
4543 | int len; | |
4544 | symbolS *sym; | |
4545 | ||
4546 | name = demand_copy_C_string (&len); | |
4547 | sym = symbol_make (name); | |
4548 | S_SET_SEGMENT (sym, ppc_coff_debug_section); | |
809ffe0d | 4549 | symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; |
252b5132 RH |
4550 | S_SET_STORAGE_CLASS (sym, C_BCOMM); |
4551 | S_SET_VALUE (sym, 0); | |
809ffe0d | 4552 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
4553 | |
4554 | ppc_frob_label (sym); | |
4555 | ||
4556 | demand_empty_rest_of_line (); | |
4557 | } | |
4558 | ||
4559 | /* The .ec pseudo-op. This just creates a C_ECOMM symbol. */ | |
4560 | ||
4561 | static void | |
98027b10 | 4562 | ppc_ec (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4563 | { |
4564 | symbolS *sym; | |
4565 | ||
4566 | sym = symbol_make (".ec"); | |
4567 | S_SET_SEGMENT (sym, ppc_coff_debug_section); | |
809ffe0d | 4568 | symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; |
252b5132 RH |
4569 | S_SET_STORAGE_CLASS (sym, C_ECOMM); |
4570 | S_SET_VALUE (sym, 0); | |
809ffe0d | 4571 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
4572 | |
4573 | ppc_frob_label (sym); | |
4574 | ||
4575 | demand_empty_rest_of_line (); | |
4576 | } | |
4577 | ||
4578 | /* The .toc pseudo-op. Switch to the .toc subsegment. */ | |
4579 | ||
4580 | static void | |
98027b10 | 4581 | ppc_toc (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4582 | { |
4583 | if (ppc_toc_csect != (symbolS *) NULL) | |
809ffe0d | 4584 | subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg); |
252b5132 RH |
4585 | else |
4586 | { | |
4587 | subsegT subseg; | |
4588 | symbolS *sym; | |
4589 | symbolS *list; | |
81d4177b | 4590 | |
252b5132 RH |
4591 | subseg = ppc_data_subsegment; |
4592 | ++ppc_data_subsegment; | |
4593 | ||
4594 | subseg_new (segment_name (data_section), subseg); | |
4595 | ppc_toc_frag = frag_now; | |
4596 | ||
4597 | sym = symbol_find_or_make ("TOC[TC0]"); | |
809ffe0d | 4598 | symbol_set_frag (sym, frag_now); |
252b5132 RH |
4599 | S_SET_SEGMENT (sym, data_section); |
4600 | S_SET_VALUE (sym, (valueT) frag_now_fix ()); | |
809ffe0d ILT |
4601 | symbol_get_tc (sym)->subseg = subseg; |
4602 | symbol_get_tc (sym)->output = 1; | |
4603 | symbol_get_tc (sym)->within = sym; | |
252b5132 RH |
4604 | |
4605 | ppc_toc_csect = sym; | |
81d4177b | 4606 | |
252b5132 | 4607 | for (list = ppc_data_csects; |
809ffe0d ILT |
4608 | symbol_get_tc (list)->next != (symbolS *) NULL; |
4609 | list = symbol_get_tc (list)->next) | |
252b5132 | 4610 | ; |
809ffe0d | 4611 | symbol_get_tc (list)->next = sym; |
252b5132 RH |
4612 | |
4613 | symbol_remove (sym, &symbol_rootP, &symbol_lastP); | |
809ffe0d ILT |
4614 | symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP, |
4615 | &symbol_lastP); | |
252b5132 RH |
4616 | } |
4617 | ||
4618 | ppc_current_csect = ppc_toc_csect; | |
4619 | ||
4620 | demand_empty_rest_of_line (); | |
4621 | } | |
4622 | ||
4623 | /* The AIX assembler automatically aligns the operands of a .long or | |
4624 | .short pseudo-op, and we want to be compatible. */ | |
4625 | ||
4626 | static void | |
98027b10 | 4627 | ppc_xcoff_cons (int log_size) |
252b5132 RH |
4628 | { |
4629 | frag_align (log_size, 0, 0); | |
4630 | record_alignment (now_seg, log_size); | |
4631 | cons (1 << log_size); | |
4632 | } | |
4633 | ||
4634 | static void | |
98027b10 | 4635 | ppc_vbyte (int dummy ATTRIBUTE_UNUSED) |
252b5132 RH |
4636 | { |
4637 | expressionS exp; | |
4638 | int byte_count; | |
4639 | ||
4640 | (void) expression (&exp); | |
4641 | ||
4642 | if (exp.X_op != O_constant) | |
4643 | { | |
4644 | as_bad (_("non-constant byte count")); | |
4645 | return; | |
4646 | } | |
4647 | ||
4648 | byte_count = exp.X_add_number; | |
4649 | ||
4650 | if (*input_line_pointer != ',') | |
4651 | { | |
4652 | as_bad (_("missing value")); | |
4653 | return; | |
4654 | } | |
4655 | ||
4656 | ++input_line_pointer; | |
4657 | cons (byte_count); | |
4658 | } | |
4659 | ||
85645aed TG |
4660 | void |
4661 | ppc_xcoff_end (void) | |
4662 | { | |
4663 | int i; | |
4664 | ||
4665 | for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++) | |
4666 | { | |
4667 | struct dw_section *dws = &dw_sections[i]; | |
4668 | struct dw_subsection *dwss; | |
4669 | ||
4670 | if (dws->anon_subseg) | |
4671 | { | |
4672 | dwss = dws->anon_subseg; | |
4673 | dwss->link = dws->list_subseg; | |
4674 | } | |
4675 | else | |
4676 | dwss = dws->list_subseg; | |
4677 | ||
4678 | for (; dwss != NULL; dwss = dwss->link) | |
4679 | if (dwss->end_exp.X_add_symbol != NULL) | |
4680 | { | |
4681 | subseg_set (dws->sect, dwss->subseg); | |
4682 | symbol_set_value_now (dwss->end_exp.X_add_symbol); | |
4683 | } | |
4684 | } | |
4685 | } | |
4686 | ||
252b5132 | 4687 | #endif /* OBJ_XCOFF */ |
0baf16f2 | 4688 | #if defined (OBJ_XCOFF) || defined (OBJ_ELF) |
252b5132 RH |
4689 | \f |
4690 | /* The .tc pseudo-op. This is used when generating either XCOFF or | |
4691 | ELF. This takes two or more arguments. | |
4692 | ||
4693 | When generating XCOFF output, the first argument is the name to | |
4694 | give to this location in the toc; this will be a symbol with class | |
0baf16f2 | 4695 | TC. The rest of the arguments are N-byte values to actually put at |
252b5132 | 4696 | this location in the TOC; often there is just one more argument, a |
1049f94e | 4697 | relocatable symbol reference. The size of the value to store |
0baf16f2 AM |
4698 | depends on target word size. A 32-bit target uses 4-byte values, a |
4699 | 64-bit target uses 8-byte values. | |
252b5132 RH |
4700 | |
4701 | When not generating XCOFF output, the arguments are the same, but | |
4702 | the first argument is simply ignored. */ | |
4703 | ||
4704 | static void | |
98027b10 | 4705 | ppc_tc (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4706 | { |
4707 | #ifdef OBJ_XCOFF | |
4708 | ||
4709 | /* Define the TOC symbol name. */ | |
4710 | { | |
4711 | char *name; | |
4712 | char endc; | |
4713 | symbolS *sym; | |
4714 | ||
4715 | if (ppc_toc_csect == (symbolS *) NULL | |
4716 | || ppc_toc_csect != ppc_current_csect) | |
4717 | { | |
4718 | as_bad (_(".tc not in .toc section")); | |
4719 | ignore_rest_of_line (); | |
4720 | return; | |
4721 | } | |
4722 | ||
4723 | name = input_line_pointer; | |
4724 | endc = get_symbol_end (); | |
4725 | ||
4726 | sym = symbol_find_or_make (name); | |
4727 | ||
4728 | *input_line_pointer = endc; | |
4729 | ||
4730 | if (S_IS_DEFINED (sym)) | |
4731 | { | |
4732 | symbolS *label; | |
4733 | ||
809ffe0d | 4734 | label = symbol_get_tc (ppc_current_csect)->within; |
96d56e9f | 4735 | if (symbol_get_tc (label)->symbol_class != XMC_TC0) |
252b5132 RH |
4736 | { |
4737 | as_bad (_(".tc with no label")); | |
4738 | ignore_rest_of_line (); | |
4739 | return; | |
4740 | } | |
4741 | ||
4742 | S_SET_SEGMENT (label, S_GET_SEGMENT (sym)); | |
809ffe0d | 4743 | symbol_set_frag (label, symbol_get_frag (sym)); |
252b5132 RH |
4744 | S_SET_VALUE (label, S_GET_VALUE (sym)); |
4745 | ||
4746 | while (! is_end_of_line[(unsigned char) *input_line_pointer]) | |
4747 | ++input_line_pointer; | |
4748 | ||
4749 | return; | |
4750 | } | |
4751 | ||
4752 | S_SET_SEGMENT (sym, now_seg); | |
809ffe0d | 4753 | symbol_set_frag (sym, frag_now); |
252b5132 | 4754 | S_SET_VALUE (sym, (valueT) frag_now_fix ()); |
96d56e9f | 4755 | symbol_get_tc (sym)->symbol_class = XMC_TC; |
809ffe0d | 4756 | symbol_get_tc (sym)->output = 1; |
252b5132 RH |
4757 | |
4758 | ppc_frob_label (sym); | |
4759 | } | |
4760 | ||
0baf16f2 AM |
4761 | #endif /* OBJ_XCOFF */ |
4762 | #ifdef OBJ_ELF | |
9c7977b3 | 4763 | int align; |
252b5132 RH |
4764 | |
4765 | /* Skip the TOC symbol name. */ | |
4766 | while (is_part_of_name (*input_line_pointer) | |
d13d4015 | 4767 | || *input_line_pointer == ' ' |
252b5132 RH |
4768 | || *input_line_pointer == '[' |
4769 | || *input_line_pointer == ']' | |
4770 | || *input_line_pointer == '{' | |
4771 | || *input_line_pointer == '}') | |
4772 | ++input_line_pointer; | |
4773 | ||
0baf16f2 | 4774 | /* Align to a four/eight byte boundary. */ |
2b3c4602 | 4775 | align = ppc_obj64 ? 3 : 2; |
9c7977b3 AM |
4776 | frag_align (align, 0, 0); |
4777 | record_alignment (now_seg, align); | |
0baf16f2 | 4778 | #endif /* OBJ_ELF */ |
252b5132 RH |
4779 | |
4780 | if (*input_line_pointer != ',') | |
4781 | demand_empty_rest_of_line (); | |
4782 | else | |
4783 | { | |
4784 | ++input_line_pointer; | |
2b3c4602 | 4785 | cons (ppc_obj64 ? 8 : 4); |
252b5132 RH |
4786 | } |
4787 | } | |
0baf16f2 AM |
4788 | |
4789 | /* Pseudo-op .machine. */ | |
0baf16f2 AM |
4790 | |
4791 | static void | |
98027b10 | 4792 | ppc_machine (int ignore ATTRIBUTE_UNUSED) |
0baf16f2 | 4793 | { |
69c040df AM |
4794 | char *cpu_string; |
4795 | #define MAX_HISTORY 100 | |
fa452fa6 | 4796 | static ppc_cpu_t *cpu_history; |
69c040df AM |
4797 | static int curr_hist; |
4798 | ||
4799 | SKIP_WHITESPACE (); | |
4800 | ||
4801 | if (*input_line_pointer == '"') | |
4802 | { | |
4803 | int len; | |
4804 | cpu_string = demand_copy_C_string (&len); | |
4805 | } | |
4806 | else | |
4807 | { | |
4808 | char c; | |
4809 | cpu_string = input_line_pointer; | |
4810 | c = get_symbol_end (); | |
4811 | cpu_string = xstrdup (cpu_string); | |
4812 | *input_line_pointer = c; | |
4813 | } | |
4814 | ||
4815 | if (cpu_string != NULL) | |
4816 | { | |
fa452fa6 | 4817 | ppc_cpu_t old_cpu = ppc_cpu; |
69fe9ce5 | 4818 | ppc_cpu_t new_cpu; |
69c040df AM |
4819 | char *p; |
4820 | ||
4821 | for (p = cpu_string; *p != 0; p++) | |
4822 | *p = TOLOWER (*p); | |
4823 | ||
4824 | if (strcmp (cpu_string, "push") == 0) | |
4825 | { | |
4826 | if (cpu_history == NULL) | |
4827 | cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history)); | |
4828 | ||
4829 | if (curr_hist >= MAX_HISTORY) | |
4830 | as_bad (_(".machine stack overflow")); | |
4831 | else | |
4832 | cpu_history[curr_hist++] = ppc_cpu; | |
4833 | } | |
4834 | else if (strcmp (cpu_string, "pop") == 0) | |
4835 | { | |
4836 | if (curr_hist <= 0) | |
4837 | as_bad (_(".machine stack underflow")); | |
4838 | else | |
4839 | ppc_cpu = cpu_history[--curr_hist]; | |
4840 | } | |
69fe9ce5 AM |
4841 | else if ((new_cpu = ppc_parse_cpu (ppc_cpu, cpu_string)) != 0) |
4842 | ppc_cpu = new_cpu; | |
69c040df AM |
4843 | else |
4844 | as_bad (_("invalid machine `%s'"), cpu_string); | |
4845 | ||
4846 | if (ppc_cpu != old_cpu) | |
4847 | ppc_setup_opcodes (); | |
4848 | } | |
4849 | ||
4850 | demand_empty_rest_of_line (); | |
0baf16f2 AM |
4851 | } |
4852 | ||
4853 | /* See whether a symbol is in the TOC section. */ | |
4854 | ||
4855 | static int | |
98027b10 | 4856 | ppc_is_toc_sym (symbolS *sym) |
0baf16f2 AM |
4857 | { |
4858 | #ifdef OBJ_XCOFF | |
96d56e9f | 4859 | return symbol_get_tc (sym)->symbol_class == XMC_TC; |
0baf16f2 AM |
4860 | #endif |
4861 | #ifdef OBJ_ELF | |
4862 | const char *sname = segment_name (S_GET_SEGMENT (sym)); | |
2b3c4602 | 4863 | if (ppc_obj64) |
0baf16f2 AM |
4864 | return strcmp (sname, ".toc") == 0; |
4865 | else | |
4866 | return strcmp (sname, ".got") == 0; | |
4867 | #endif | |
4868 | } | |
4869 | #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */ | |
252b5132 RH |
4870 | \f |
4871 | #ifdef TE_PE | |
4872 | ||
99a814a1 | 4873 | /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */ |
252b5132 RH |
4874 | |
4875 | /* Set the current section. */ | |
4876 | static void | |
98027b10 | 4877 | ppc_set_current_section (segT new) |
252b5132 RH |
4878 | { |
4879 | ppc_previous_section = ppc_current_section; | |
4880 | ppc_current_section = new; | |
4881 | } | |
4882 | ||
4883 | /* pseudo-op: .previous | |
4884 | behaviour: toggles the current section with the previous section. | |
4885 | errors: None | |
99a814a1 AM |
4886 | warnings: "No previous section" */ |
4887 | ||
252b5132 | 4888 | static void |
98027b10 | 4889 | ppc_previous (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4890 | { |
4891 | symbolS *tmp; | |
4892 | ||
81d4177b | 4893 | if (ppc_previous_section == NULL) |
252b5132 | 4894 | { |
d6ed37ed | 4895 | as_warn (_("no previous section to return to, ignored.")); |
252b5132 RH |
4896 | return; |
4897 | } | |
4898 | ||
99a814a1 | 4899 | subseg_set (ppc_previous_section, 0); |
252b5132 | 4900 | |
99a814a1 | 4901 | ppc_set_current_section (ppc_previous_section); |
252b5132 RH |
4902 | } |
4903 | ||
4904 | /* pseudo-op: .pdata | |
4905 | behaviour: predefined read only data section | |
b34976b6 | 4906 | double word aligned |
252b5132 RH |
4907 | errors: None |
4908 | warnings: None | |
4909 | initial: .section .pdata "adr3" | |
b34976b6 | 4910 | a - don't know -- maybe a misprint |
252b5132 RH |
4911 | d - initialized data |
4912 | r - readable | |
4913 | 3 - double word aligned (that would be 4 byte boundary) | |
4914 | ||
4915 | commentary: | |
4916 | Tag index tables (also known as the function table) for exception | |
99a814a1 | 4917 | handling, debugging, etc. */ |
252b5132 | 4918 | |
252b5132 | 4919 | static void |
98027b10 | 4920 | ppc_pdata (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 4921 | { |
81d4177b | 4922 | if (pdata_section == 0) |
252b5132 RH |
4923 | { |
4924 | pdata_section = subseg_new (".pdata", 0); | |
81d4177b | 4925 | |
252b5132 RH |
4926 | bfd_set_section_flags (stdoutput, pdata_section, |
4927 | (SEC_ALLOC | SEC_LOAD | SEC_RELOC | |
4928 | | SEC_READONLY | SEC_DATA )); | |
81d4177b | 4929 | |
252b5132 RH |
4930 | bfd_set_section_alignment (stdoutput, pdata_section, 2); |
4931 | } | |
4932 | else | |
4933 | { | |
99a814a1 | 4934 | pdata_section = subseg_new (".pdata", 0); |
252b5132 | 4935 | } |
99a814a1 | 4936 | ppc_set_current_section (pdata_section); |
252b5132 RH |
4937 | } |
4938 | ||
4939 | /* pseudo-op: .ydata | |
4940 | behaviour: predefined read only data section | |
b34976b6 | 4941 | double word aligned |
252b5132 RH |
4942 | errors: None |
4943 | warnings: None | |
4944 | initial: .section .ydata "drw3" | |
b34976b6 | 4945 | a - don't know -- maybe a misprint |
252b5132 RH |
4946 | d - initialized data |
4947 | r - readable | |
4948 | 3 - double word aligned (that would be 4 byte boundary) | |
4949 | commentary: | |
4950 | Tag tables (also known as the scope table) for exception handling, | |
99a814a1 AM |
4951 | debugging, etc. */ |
4952 | ||
252b5132 | 4953 | static void |
98027b10 | 4954 | ppc_ydata (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 4955 | { |
81d4177b | 4956 | if (ydata_section == 0) |
252b5132 RH |
4957 | { |
4958 | ydata_section = subseg_new (".ydata", 0); | |
4959 | bfd_set_section_flags (stdoutput, ydata_section, | |
99a814a1 AM |
4960 | (SEC_ALLOC | SEC_LOAD | SEC_RELOC |
4961 | | SEC_READONLY | SEC_DATA )); | |
252b5132 RH |
4962 | |
4963 | bfd_set_section_alignment (stdoutput, ydata_section, 3); | |
4964 | } | |
4965 | else | |
4966 | { | |
4967 | ydata_section = subseg_new (".ydata", 0); | |
4968 | } | |
99a814a1 | 4969 | ppc_set_current_section (ydata_section); |
252b5132 RH |
4970 | } |
4971 | ||
4972 | /* pseudo-op: .reldata | |
4973 | behaviour: predefined read write data section | |
b34976b6 | 4974 | double word aligned (4-byte) |
252b5132 RH |
4975 | FIXME: relocation is applied to it |
4976 | FIXME: what's the difference between this and .data? | |
4977 | errors: None | |
4978 | warnings: None | |
4979 | initial: .section .reldata "drw3" | |
4980 | d - initialized data | |
4981 | r - readable | |
4982 | w - writeable | |
4983 | 3 - double word aligned (that would be 8 byte boundary) | |
4984 | ||
4985 | commentary: | |
4986 | Like .data, but intended to hold data subject to relocation, such as | |
99a814a1 AM |
4987 | function descriptors, etc. */ |
4988 | ||
252b5132 | 4989 | static void |
98027b10 | 4990 | ppc_reldata (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
4991 | { |
4992 | if (reldata_section == 0) | |
4993 | { | |
4994 | reldata_section = subseg_new (".reldata", 0); | |
4995 | ||
4996 | bfd_set_section_flags (stdoutput, reldata_section, | |
99a814a1 AM |
4997 | (SEC_ALLOC | SEC_LOAD | SEC_RELOC |
4998 | | SEC_DATA)); | |
252b5132 RH |
4999 | |
5000 | bfd_set_section_alignment (stdoutput, reldata_section, 2); | |
5001 | } | |
5002 | else | |
5003 | { | |
5004 | reldata_section = subseg_new (".reldata", 0); | |
5005 | } | |
99a814a1 | 5006 | ppc_set_current_section (reldata_section); |
252b5132 RH |
5007 | } |
5008 | ||
5009 | /* pseudo-op: .rdata | |
5010 | behaviour: predefined read only data section | |
b34976b6 | 5011 | double word aligned |
252b5132 RH |
5012 | errors: None |
5013 | warnings: None | |
5014 | initial: .section .rdata "dr3" | |
5015 | d - initialized data | |
5016 | r - readable | |
99a814a1 AM |
5017 | 3 - double word aligned (that would be 4 byte boundary) */ |
5018 | ||
252b5132 | 5019 | static void |
98027b10 | 5020 | ppc_rdata (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
5021 | { |
5022 | if (rdata_section == 0) | |
5023 | { | |
5024 | rdata_section = subseg_new (".rdata", 0); | |
5025 | bfd_set_section_flags (stdoutput, rdata_section, | |
5026 | (SEC_ALLOC | SEC_LOAD | SEC_RELOC | |
5027 | | SEC_READONLY | SEC_DATA )); | |
5028 | ||
5029 | bfd_set_section_alignment (stdoutput, rdata_section, 2); | |
5030 | } | |
5031 | else | |
5032 | { | |
5033 | rdata_section = subseg_new (".rdata", 0); | |
5034 | } | |
99a814a1 | 5035 | ppc_set_current_section (rdata_section); |
252b5132 RH |
5036 | } |
5037 | ||
5038 | /* pseudo-op: .ualong | |
81d4177b | 5039 | behaviour: much like .int, with the exception that no alignment is |
b34976b6 | 5040 | performed. |
252b5132 RH |
5041 | FIXME: test the alignment statement |
5042 | errors: None | |
99a814a1 AM |
5043 | warnings: None */ |
5044 | ||
252b5132 | 5045 | static void |
98027b10 | 5046 | ppc_ualong (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 5047 | { |
99a814a1 AM |
5048 | /* Try for long. */ |
5049 | cons (4); | |
252b5132 RH |
5050 | } |
5051 | ||
5052 | /* pseudo-op: .znop <symbol name> | |
5053 | behaviour: Issue a nop instruction | |
b34976b6 | 5054 | Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using |
252b5132 RH |
5055 | the supplied symbol name. |
5056 | errors: None | |
99a814a1 AM |
5057 | warnings: Missing symbol name */ |
5058 | ||
252b5132 | 5059 | static void |
98027b10 | 5060 | ppc_znop (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
5061 | { |
5062 | unsigned long insn; | |
5063 | const struct powerpc_opcode *opcode; | |
5064 | expressionS ex; | |
5065 | char *f; | |
252b5132 | 5066 | symbolS *sym; |
252b5132 RH |
5067 | char *symbol_name; |
5068 | char c; | |
5069 | char *name; | |
5070 | unsigned int exp; | |
5071 | flagword flags; | |
5072 | asection *sec; | |
5073 | ||
99a814a1 | 5074 | /* Strip out the symbol name. */ |
252b5132 RH |
5075 | symbol_name = input_line_pointer; |
5076 | c = get_symbol_end (); | |
5077 | ||
5078 | name = xmalloc (input_line_pointer - symbol_name + 1); | |
5079 | strcpy (name, symbol_name); | |
5080 | ||
5081 | sym = symbol_find_or_make (name); | |
5082 | ||
5083 | *input_line_pointer = c; | |
5084 | ||
5085 | SKIP_WHITESPACE (); | |
5086 | ||
5087 | /* Look up the opcode in the hash table. */ | |
5088 | opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop"); | |
5089 | ||
99a814a1 | 5090 | /* Stick in the nop. */ |
252b5132 RH |
5091 | insn = opcode->opcode; |
5092 | ||
5093 | /* Write out the instruction. */ | |
5094 | f = frag_more (4); | |
5095 | md_number_to_chars (f, insn, 4); | |
5096 | fix_new (frag_now, | |
5097 | f - frag_now->fr_literal, | |
5098 | 4, | |
5099 | sym, | |
5100 | 0, | |
5101 | 0, | |
5102 | BFD_RELOC_16_GOT_PCREL); | |
5103 | ||
5104 | } | |
5105 | ||
81d4177b KH |
5106 | /* pseudo-op: |
5107 | behaviour: | |
5108 | errors: | |
99a814a1 AM |
5109 | warnings: */ |
5110 | ||
252b5132 | 5111 | static void |
98027b10 | 5112 | ppc_pe_comm (int lcomm) |
252b5132 | 5113 | { |
98027b10 AM |
5114 | char *name; |
5115 | char c; | |
5116 | char *p; | |
252b5132 | 5117 | offsetT temp; |
98027b10 | 5118 | symbolS *symbolP; |
252b5132 RH |
5119 | offsetT align; |
5120 | ||
5121 | name = input_line_pointer; | |
5122 | c = get_symbol_end (); | |
5123 | ||
99a814a1 | 5124 | /* just after name is now '\0'. */ |
252b5132 RH |
5125 | p = input_line_pointer; |
5126 | *p = c; | |
5127 | SKIP_WHITESPACE (); | |
5128 | if (*input_line_pointer != ',') | |
5129 | { | |
d6ed37ed | 5130 | as_bad (_("expected comma after symbol-name: rest of line ignored.")); |
252b5132 RH |
5131 | ignore_rest_of_line (); |
5132 | return; | |
5133 | } | |
5134 | ||
5135 | input_line_pointer++; /* skip ',' */ | |
5136 | if ((temp = get_absolute_expression ()) < 0) | |
5137 | { | |
5138 | as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp); | |
5139 | ignore_rest_of_line (); | |
5140 | return; | |
5141 | } | |
5142 | ||
5143 | if (! lcomm) | |
5144 | { | |
5145 | /* The third argument to .comm is the alignment. */ | |
5146 | if (*input_line_pointer != ',') | |
5147 | align = 3; | |
5148 | else | |
5149 | { | |
5150 | ++input_line_pointer; | |
5151 | align = get_absolute_expression (); | |
5152 | if (align <= 0) | |
5153 | { | |
5154 | as_warn (_("ignoring bad alignment")); | |
5155 | align = 3; | |
5156 | } | |
5157 | } | |
5158 | } | |
5159 | ||
5160 | *p = 0; | |
5161 | symbolP = symbol_find_or_make (name); | |
5162 | ||
5163 | *p = c; | |
5164 | if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP)) | |
5165 | { | |
d6ed37ed | 5166 | as_bad (_("ignoring attempt to re-define symbol `%s'."), |
252b5132 RH |
5167 | S_GET_NAME (symbolP)); |
5168 | ignore_rest_of_line (); | |
5169 | return; | |
5170 | } | |
5171 | ||
5172 | if (S_GET_VALUE (symbolP)) | |
5173 | { | |
5174 | if (S_GET_VALUE (symbolP) != (valueT) temp) | |
d6ed37ed | 5175 | as_bad (_("length of .comm \"%s\" is already %ld. Not changed to %ld."), |
252b5132 RH |
5176 | S_GET_NAME (symbolP), |
5177 | (long) S_GET_VALUE (symbolP), | |
5178 | (long) temp); | |
5179 | } | |
5180 | else | |
5181 | { | |
5182 | S_SET_VALUE (symbolP, (valueT) temp); | |
5183 | S_SET_EXTERNAL (symbolP); | |
86ebace2 | 5184 | S_SET_SEGMENT (symbolP, bfd_com_section_ptr); |
252b5132 RH |
5185 | } |
5186 | ||
5187 | demand_empty_rest_of_line (); | |
5188 | } | |
5189 | ||
5190 | /* | |
5191 | * implement the .section pseudo op: | |
5192 | * .section name {, "flags"} | |
5193 | * ^ ^ | |
5194 | * | +--- optional flags: 'b' for bss | |
5195 | * | 'i' for info | |
5196 | * +-- section name 'l' for lib | |
5197 | * 'n' for noload | |
5198 | * 'o' for over | |
5199 | * 'w' for data | |
5200 | * 'd' (apparently m88k for data) | |
5201 | * 'x' for text | |
5202 | * But if the argument is not a quoted string, treat it as a | |
5203 | * subsegment number. | |
5204 | * | |
5205 | * FIXME: this is a copy of the section processing from obj-coff.c, with | |
5206 | * additions/changes for the moto-pas assembler support. There are three | |
5207 | * categories: | |
5208 | * | |
81d4177b | 5209 | * FIXME: I just noticed this. This doesn't work at all really. It it |
252b5132 RH |
5210 | * setting bits that bfd probably neither understands or uses. The |
5211 | * correct approach (?) will have to incorporate extra fields attached | |
5212 | * to the section to hold the system specific stuff. (krk) | |
5213 | * | |
5214 | * Section Contents: | |
5215 | * 'a' - unknown - referred to in documentation, but no definition supplied | |
5216 | * 'c' - section has code | |
5217 | * 'd' - section has initialized data | |
5218 | * 'u' - section has uninitialized data | |
5219 | * 'i' - section contains directives (info) | |
5220 | * 'n' - section can be discarded | |
5221 | * 'R' - remove section at link time | |
5222 | * | |
5223 | * Section Protection: | |
5224 | * 'r' - section is readable | |
5225 | * 'w' - section is writeable | |
5226 | * 'x' - section is executable | |
5227 | * 's' - section is sharable | |
5228 | * | |
5229 | * Section Alignment: | |
5230 | * '0' - align to byte boundary | |
5231 | * '1' - align to halfword undary | |
5232 | * '2' - align to word boundary | |
5233 | * '3' - align to doubleword boundary | |
5234 | * '4' - align to quadword boundary | |
5235 | * '5' - align to 32 byte boundary | |
5236 | * '6' - align to 64 byte boundary | |
5237 | * | |
5238 | */ | |
5239 | ||
5240 | void | |
98027b10 | 5241 | ppc_pe_section (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 5242 | { |
99a814a1 | 5243 | /* Strip out the section name. */ |
252b5132 RH |
5244 | char *section_name; |
5245 | char c; | |
5246 | char *name; | |
5247 | unsigned int exp; | |
5248 | flagword flags; | |
5249 | segT sec; | |
5250 | int align; | |
5251 | ||
5252 | section_name = input_line_pointer; | |
5253 | c = get_symbol_end (); | |
5254 | ||
5255 | name = xmalloc (input_line_pointer - section_name + 1); | |
5256 | strcpy (name, section_name); | |
5257 | ||
5258 | *input_line_pointer = c; | |
5259 | ||
5260 | SKIP_WHITESPACE (); | |
5261 | ||
5262 | exp = 0; | |
5263 | flags = SEC_NO_FLAGS; | |
5264 | ||
5265 | if (strcmp (name, ".idata$2") == 0) | |
5266 | { | |
5267 | align = 0; | |
5268 | } | |
5269 | else if (strcmp (name, ".idata$3") == 0) | |
5270 | { | |
5271 | align = 0; | |
5272 | } | |
5273 | else if (strcmp (name, ".idata$4") == 0) | |
5274 | { | |
5275 | align = 2; | |
5276 | } | |
5277 | else if (strcmp (name, ".idata$5") == 0) | |
5278 | { | |
5279 | align = 2; | |
5280 | } | |
5281 | else if (strcmp (name, ".idata$6") == 0) | |
5282 | { | |
5283 | align = 1; | |
5284 | } | |
5285 | else | |
99a814a1 AM |
5286 | /* Default alignment to 16 byte boundary. */ |
5287 | align = 4; | |
252b5132 RH |
5288 | |
5289 | if (*input_line_pointer == ',') | |
5290 | { | |
5291 | ++input_line_pointer; | |
5292 | SKIP_WHITESPACE (); | |
5293 | if (*input_line_pointer != '"') | |
5294 | exp = get_absolute_expression (); | |
5295 | else | |
5296 | { | |
5297 | ++input_line_pointer; | |
5298 | while (*input_line_pointer != '"' | |
5299 | && ! is_end_of_line[(unsigned char) *input_line_pointer]) | |
5300 | { | |
5301 | switch (*input_line_pointer) | |
5302 | { | |
5303 | /* Section Contents */ | |
5304 | case 'a': /* unknown */ | |
d6ed37ed | 5305 | as_bad (_("unsupported section attribute -- 'a'")); |
252b5132 RH |
5306 | break; |
5307 | case 'c': /* code section */ | |
81d4177b | 5308 | flags |= SEC_CODE; |
252b5132 RH |
5309 | break; |
5310 | case 'd': /* section has initialized data */ | |
5311 | flags |= SEC_DATA; | |
5312 | break; | |
5313 | case 'u': /* section has uninitialized data */ | |
5314 | /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA | |
5315 | in winnt.h */ | |
5316 | flags |= SEC_ROM; | |
5317 | break; | |
5318 | case 'i': /* section contains directives (info) */ | |
5319 | /* FIXME: This is IMAGE_SCN_LNK_INFO | |
5320 | in winnt.h */ | |
5321 | flags |= SEC_HAS_CONTENTS; | |
5322 | break; | |
5323 | case 'n': /* section can be discarded */ | |
81d4177b | 5324 | flags &=~ SEC_LOAD; |
252b5132 RH |
5325 | break; |
5326 | case 'R': /* Remove section at link time */ | |
5327 | flags |= SEC_NEVER_LOAD; | |
5328 | break; | |
8d452c78 | 5329 | #if IFLICT_BRAIN_DAMAGE |
252b5132 RH |
5330 | /* Section Protection */ |
5331 | case 'r': /* section is readable */ | |
5332 | flags |= IMAGE_SCN_MEM_READ; | |
5333 | break; | |
5334 | case 'w': /* section is writeable */ | |
5335 | flags |= IMAGE_SCN_MEM_WRITE; | |
5336 | break; | |
5337 | case 'x': /* section is executable */ | |
5338 | flags |= IMAGE_SCN_MEM_EXECUTE; | |
5339 | break; | |
5340 | case 's': /* section is sharable */ | |
5341 | flags |= IMAGE_SCN_MEM_SHARED; | |
5342 | break; | |
5343 | ||
5344 | /* Section Alignment */ | |
5345 | case '0': /* align to byte boundary */ | |
5346 | flags |= IMAGE_SCN_ALIGN_1BYTES; | |
5347 | align = 0; | |
5348 | break; | |
5349 | case '1': /* align to halfword boundary */ | |
5350 | flags |= IMAGE_SCN_ALIGN_2BYTES; | |
5351 | align = 1; | |
5352 | break; | |
5353 | case '2': /* align to word boundary */ | |
5354 | flags |= IMAGE_SCN_ALIGN_4BYTES; | |
5355 | align = 2; | |
5356 | break; | |
5357 | case '3': /* align to doubleword boundary */ | |
5358 | flags |= IMAGE_SCN_ALIGN_8BYTES; | |
5359 | align = 3; | |
5360 | break; | |
5361 | case '4': /* align to quadword boundary */ | |
5362 | flags |= IMAGE_SCN_ALIGN_16BYTES; | |
5363 | align = 4; | |
5364 | break; | |
5365 | case '5': /* align to 32 byte boundary */ | |
5366 | flags |= IMAGE_SCN_ALIGN_32BYTES; | |
5367 | align = 5; | |
5368 | break; | |
5369 | case '6': /* align to 64 byte boundary */ | |
5370 | flags |= IMAGE_SCN_ALIGN_64BYTES; | |
5371 | align = 6; | |
5372 | break; | |
8d452c78 | 5373 | #endif |
252b5132 | 5374 | default: |
99a814a1 AM |
5375 | as_bad (_("unknown section attribute '%c'"), |
5376 | *input_line_pointer); | |
252b5132 RH |
5377 | break; |
5378 | } | |
5379 | ++input_line_pointer; | |
5380 | } | |
5381 | if (*input_line_pointer == '"') | |
5382 | ++input_line_pointer; | |
5383 | } | |
5384 | } | |
5385 | ||
5386 | sec = subseg_new (name, (subsegT) exp); | |
5387 | ||
99a814a1 | 5388 | ppc_set_current_section (sec); |
252b5132 RH |
5389 | |
5390 | if (flags != SEC_NO_FLAGS) | |
5391 | { | |
5392 | if (! bfd_set_section_flags (stdoutput, sec, flags)) | |
5393 | as_bad (_("error setting flags for \"%s\": %s"), | |
5394 | bfd_section_name (stdoutput, sec), | |
5395 | bfd_errmsg (bfd_get_error ())); | |
5396 | } | |
5397 | ||
99a814a1 | 5398 | bfd_set_section_alignment (stdoutput, sec, align); |
252b5132 RH |
5399 | } |
5400 | ||
5401 | static void | |
98027b10 | 5402 | ppc_pe_function (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
5403 | { |
5404 | char *name; | |
5405 | char endc; | |
5406 | symbolS *ext_sym; | |
5407 | ||
5408 | name = input_line_pointer; | |
5409 | endc = get_symbol_end (); | |
5410 | ||
5411 | ext_sym = symbol_find_or_make (name); | |
5412 | ||
5413 | *input_line_pointer = endc; | |
5414 | ||
5415 | S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT); | |
5416 | SF_SET_FUNCTION (ext_sym); | |
5417 | SF_SET_PROCESS (ext_sym); | |
5418 | coff_add_linesym (ext_sym); | |
5419 | ||
5420 | demand_empty_rest_of_line (); | |
5421 | } | |
5422 | ||
5423 | static void | |
98027b10 | 5424 | ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
5425 | { |
5426 | if (tocdata_section == 0) | |
5427 | { | |
5428 | tocdata_section = subseg_new (".tocd", 0); | |
99a814a1 | 5429 | /* FIXME: section flags won't work. */ |
252b5132 RH |
5430 | bfd_set_section_flags (stdoutput, tocdata_section, |
5431 | (SEC_ALLOC | SEC_LOAD | SEC_RELOC | |
99a814a1 | 5432 | | SEC_READONLY | SEC_DATA)); |
252b5132 RH |
5433 | |
5434 | bfd_set_section_alignment (stdoutput, tocdata_section, 2); | |
5435 | } | |
5436 | else | |
5437 | { | |
5438 | rdata_section = subseg_new (".tocd", 0); | |
5439 | } | |
5440 | ||
99a814a1 | 5441 | ppc_set_current_section (tocdata_section); |
252b5132 RH |
5442 | |
5443 | demand_empty_rest_of_line (); | |
5444 | } | |
5445 | ||
5446 | /* Don't adjust TOC relocs to use the section symbol. */ | |
5447 | ||
5448 | int | |
98027b10 | 5449 | ppc_pe_fix_adjustable (fixS *fix) |
252b5132 RH |
5450 | { |
5451 | return fix->fx_r_type != BFD_RELOC_PPC_TOC16; | |
5452 | } | |
5453 | ||
5454 | #endif | |
5455 | \f | |
5456 | #ifdef OBJ_XCOFF | |
5457 | ||
5458 | /* XCOFF specific symbol and file handling. */ | |
5459 | ||
5460 | /* Canonicalize the symbol name. We use the to force the suffix, if | |
5461 | any, to use square brackets, and to be in upper case. */ | |
5462 | ||
5463 | char * | |
98027b10 | 5464 | ppc_canonicalize_symbol_name (char *name) |
252b5132 RH |
5465 | { |
5466 | char *s; | |
5467 | ||
5468 | if (ppc_stab_symbol) | |
5469 | return name; | |
5470 | ||
5471 | for (s = name; *s != '\0' && *s != '{' && *s != '['; s++) | |
5472 | ; | |
5473 | if (*s != '\0') | |
5474 | { | |
5475 | char brac; | |
5476 | ||
5477 | if (*s == '[') | |
5478 | brac = ']'; | |
5479 | else | |
5480 | { | |
5481 | *s = '['; | |
5482 | brac = '}'; | |
5483 | } | |
5484 | ||
5485 | for (s++; *s != '\0' && *s != brac; s++) | |
3882b010 | 5486 | *s = TOUPPER (*s); |
252b5132 RH |
5487 | |
5488 | if (*s == '\0' || s[1] != '\0') | |
5489 | as_bad (_("bad symbol suffix")); | |
5490 | ||
5491 | *s = ']'; | |
5492 | } | |
5493 | ||
5494 | return name; | |
5495 | } | |
5496 | ||
5497 | /* Set the class of a symbol based on the suffix, if any. This is | |
5498 | called whenever a new symbol is created. */ | |
5499 | ||
5500 | void | |
98027b10 | 5501 | ppc_symbol_new_hook (symbolS *sym) |
252b5132 | 5502 | { |
809ffe0d | 5503 | struct ppc_tc_sy *tc; |
252b5132 RH |
5504 | const char *s; |
5505 | ||
809ffe0d ILT |
5506 | tc = symbol_get_tc (sym); |
5507 | tc->next = NULL; | |
5508 | tc->output = 0; | |
96d56e9f | 5509 | tc->symbol_class = -1; |
809ffe0d ILT |
5510 | tc->real_name = NULL; |
5511 | tc->subseg = 0; | |
5512 | tc->align = 0; | |
85645aed TG |
5513 | tc->u.size = NULL; |
5514 | tc->u.dw = NULL; | |
809ffe0d | 5515 | tc->within = NULL; |
252b5132 RH |
5516 | |
5517 | if (ppc_stab_symbol) | |
5518 | return; | |
5519 | ||
5520 | s = strchr (S_GET_NAME (sym), '['); | |
5521 | if (s == (const char *) NULL) | |
5522 | { | |
5523 | /* There is no suffix. */ | |
5524 | return; | |
5525 | } | |
5526 | ||
5527 | ++s; | |
5528 | ||
5529 | switch (s[0]) | |
5530 | { | |
5531 | case 'B': | |
5532 | if (strcmp (s, "BS]") == 0) | |
96d56e9f | 5533 | tc->symbol_class = XMC_BS; |
252b5132 RH |
5534 | break; |
5535 | case 'D': | |
5536 | if (strcmp (s, "DB]") == 0) | |
96d56e9f | 5537 | tc->symbol_class = XMC_DB; |
252b5132 | 5538 | else if (strcmp (s, "DS]") == 0) |
96d56e9f | 5539 | tc->symbol_class = XMC_DS; |
252b5132 RH |
5540 | break; |
5541 | case 'G': | |
5542 | if (strcmp (s, "GL]") == 0) | |
96d56e9f | 5543 | tc->symbol_class = XMC_GL; |
252b5132 RH |
5544 | break; |
5545 | case 'P': | |
5546 | if (strcmp (s, "PR]") == 0) | |
96d56e9f | 5547 | tc->symbol_class = XMC_PR; |
252b5132 RH |
5548 | break; |
5549 | case 'R': | |
5550 | if (strcmp (s, "RO]") == 0) | |
96d56e9f | 5551 | tc->symbol_class = XMC_RO; |
252b5132 | 5552 | else if (strcmp (s, "RW]") == 0) |
96d56e9f | 5553 | tc->symbol_class = XMC_RW; |
252b5132 RH |
5554 | break; |
5555 | case 'S': | |
5556 | if (strcmp (s, "SV]") == 0) | |
96d56e9f | 5557 | tc->symbol_class = XMC_SV; |
252b5132 RH |
5558 | break; |
5559 | case 'T': | |
5560 | if (strcmp (s, "TC]") == 0) | |
96d56e9f | 5561 | tc->symbol_class = XMC_TC; |
252b5132 | 5562 | else if (strcmp (s, "TI]") == 0) |
96d56e9f | 5563 | tc->symbol_class = XMC_TI; |
252b5132 | 5564 | else if (strcmp (s, "TB]") == 0) |
96d56e9f | 5565 | tc->symbol_class = XMC_TB; |
252b5132 | 5566 | else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0) |
96d56e9f | 5567 | tc->symbol_class = XMC_TC0; |
252b5132 RH |
5568 | break; |
5569 | case 'U': | |
5570 | if (strcmp (s, "UA]") == 0) | |
96d56e9f | 5571 | tc->symbol_class = XMC_UA; |
252b5132 | 5572 | else if (strcmp (s, "UC]") == 0) |
96d56e9f | 5573 | tc->symbol_class = XMC_UC; |
252b5132 RH |
5574 | break; |
5575 | case 'X': | |
5576 | if (strcmp (s, "XO]") == 0) | |
96d56e9f | 5577 | tc->symbol_class = XMC_XO; |
252b5132 RH |
5578 | break; |
5579 | } | |
5580 | ||
96d56e9f | 5581 | if (tc->symbol_class == -1) |
d6ed37ed | 5582 | as_bad (_("unrecognized symbol suffix")); |
252b5132 RH |
5583 | } |
5584 | ||
5585 | /* Set the class of a label based on where it is defined. This | |
5586 | handles symbols without suffixes. Also, move the symbol so that it | |
5587 | follows the csect symbol. */ | |
5588 | ||
5589 | void | |
98027b10 | 5590 | ppc_frob_label (symbolS *sym) |
252b5132 RH |
5591 | { |
5592 | if (ppc_current_csect != (symbolS *) NULL) | |
5593 | { | |
96d56e9f NC |
5594 | if (symbol_get_tc (sym)->symbol_class == -1) |
5595 | symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class; | |
252b5132 RH |
5596 | |
5597 | symbol_remove (sym, &symbol_rootP, &symbol_lastP); | |
809ffe0d ILT |
5598 | symbol_append (sym, symbol_get_tc (ppc_current_csect)->within, |
5599 | &symbol_rootP, &symbol_lastP); | |
5600 | symbol_get_tc (ppc_current_csect)->within = sym; | |
2fb4b302 | 5601 | symbol_get_tc (sym)->within = ppc_current_csect; |
252b5132 | 5602 | } |
07a53e5c RH |
5603 | |
5604 | #ifdef OBJ_ELF | |
5605 | dwarf2_emit_label (sym); | |
5606 | #endif | |
252b5132 RH |
5607 | } |
5608 | ||
5609 | /* This variable is set by ppc_frob_symbol if any absolute symbols are | |
5610 | seen. It tells ppc_adjust_symtab whether it needs to look through | |
5611 | the symbols. */ | |
5612 | ||
b34976b6 | 5613 | static bfd_boolean ppc_saw_abs; |
252b5132 RH |
5614 | |
5615 | /* Change the name of a symbol just before writing it out. Set the | |
5616 | real name if the .rename pseudo-op was used. Otherwise, remove any | |
5617 | class suffix. Return 1 if the symbol should not be included in the | |
5618 | symbol table. */ | |
5619 | ||
5620 | int | |
98027b10 | 5621 | ppc_frob_symbol (symbolS *sym) |
252b5132 RH |
5622 | { |
5623 | static symbolS *ppc_last_function; | |
5624 | static symbolS *set_end; | |
5625 | ||
5626 | /* Discard symbols that should not be included in the output symbol | |
5627 | table. */ | |
809ffe0d ILT |
5628 | if (! symbol_used_in_reloc_p (sym) |
5629 | && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0 | |
670ec21d | 5630 | || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym)) |
809ffe0d | 5631 | && ! symbol_get_tc (sym)->output |
252b5132 RH |
5632 | && S_GET_STORAGE_CLASS (sym) != C_FILE))) |
5633 | return 1; | |
5634 | ||
a161fe53 AM |
5635 | /* This one will disappear anyway. Don't make a csect sym for it. */ |
5636 | if (sym == abs_section_sym) | |
5637 | return 1; | |
5638 | ||
809ffe0d ILT |
5639 | if (symbol_get_tc (sym)->real_name != (char *) NULL) |
5640 | S_SET_NAME (sym, symbol_get_tc (sym)->real_name); | |
252b5132 RH |
5641 | else |
5642 | { | |
5643 | const char *name; | |
5644 | const char *s; | |
5645 | ||
5646 | name = S_GET_NAME (sym); | |
5647 | s = strchr (name, '['); | |
5648 | if (s != (char *) NULL) | |
5649 | { | |
5650 | unsigned int len; | |
5651 | char *snew; | |
5652 | ||
5653 | len = s - name; | |
5654 | snew = xmalloc (len + 1); | |
5655 | memcpy (snew, name, len); | |
5656 | snew[len] = '\0'; | |
5657 | ||
5658 | S_SET_NAME (sym, snew); | |
5659 | } | |
5660 | } | |
5661 | ||
5662 | if (set_end != (symbolS *) NULL) | |
5663 | { | |
5664 | SA_SET_SYM_ENDNDX (set_end, sym); | |
5665 | set_end = NULL; | |
5666 | } | |
5667 | ||
5668 | if (SF_GET_FUNCTION (sym)) | |
5669 | { | |
5670 | if (ppc_last_function != (symbolS *) NULL) | |
5671 | as_bad (_("two .function pseudo-ops with no intervening .ef")); | |
5672 | ppc_last_function = sym; | |
85645aed | 5673 | if (symbol_get_tc (sym)->u.size != (symbolS *) NULL) |
252b5132 | 5674 | { |
85645aed | 5675 | resolve_symbol_value (symbol_get_tc (sym)->u.size); |
809ffe0d | 5676 | SA_SET_SYM_FSIZE (sym, |
85645aed | 5677 | (long) S_GET_VALUE (symbol_get_tc (sym)->u.size)); |
252b5132 RH |
5678 | } |
5679 | } | |
5680 | else if (S_GET_STORAGE_CLASS (sym) == C_FCN | |
5681 | && strcmp (S_GET_NAME (sym), ".ef") == 0) | |
5682 | { | |
5683 | if (ppc_last_function == (symbolS *) NULL) | |
5684 | as_bad (_(".ef with no preceding .function")); | |
5685 | else | |
5686 | { | |
5687 | set_end = ppc_last_function; | |
5688 | ppc_last_function = NULL; | |
5689 | ||
5690 | /* We don't have a C_EFCN symbol, but we need to force the | |
5691 | COFF backend to believe that it has seen one. */ | |
5692 | coff_last_function = NULL; | |
5693 | } | |
5694 | } | |
5695 | ||
670ec21d | 5696 | if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym)) |
809ffe0d | 5697 | && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0 |
252b5132 RH |
5698 | && S_GET_STORAGE_CLASS (sym) != C_FILE |
5699 | && S_GET_STORAGE_CLASS (sym) != C_FCN | |
5700 | && S_GET_STORAGE_CLASS (sym) != C_BLOCK | |
5701 | && S_GET_STORAGE_CLASS (sym) != C_BSTAT | |
5702 | && S_GET_STORAGE_CLASS (sym) != C_ESTAT | |
5703 | && S_GET_STORAGE_CLASS (sym) != C_BINCL | |
5704 | && S_GET_STORAGE_CLASS (sym) != C_EINCL | |
5705 | && S_GET_SEGMENT (sym) != ppc_coff_debug_section) | |
5706 | S_SET_STORAGE_CLASS (sym, C_HIDEXT); | |
5707 | ||
5708 | if (S_GET_STORAGE_CLASS (sym) == C_EXT | |
8602d4fe | 5709 | || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT |
252b5132 RH |
5710 | || S_GET_STORAGE_CLASS (sym) == C_HIDEXT) |
5711 | { | |
5712 | int i; | |
5713 | union internal_auxent *a; | |
5714 | ||
5715 | /* Create a csect aux. */ | |
5716 | i = S_GET_NUMBER_AUXILIARY (sym); | |
5717 | S_SET_NUMBER_AUXILIARY (sym, i + 1); | |
809ffe0d | 5718 | a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent; |
96d56e9f | 5719 | if (symbol_get_tc (sym)->symbol_class == XMC_TC0) |
252b5132 RH |
5720 | { |
5721 | /* This is the TOC table. */ | |
5722 | know (strcmp (S_GET_NAME (sym), "TOC") == 0); | |
5723 | a->x_csect.x_scnlen.l = 0; | |
5724 | a->x_csect.x_smtyp = (2 << 3) | XTY_SD; | |
5725 | } | |
809ffe0d | 5726 | else if (symbol_get_tc (sym)->subseg != 0) |
252b5132 RH |
5727 | { |
5728 | /* This is a csect symbol. x_scnlen is the size of the | |
5729 | csect. */ | |
809ffe0d | 5730 | if (symbol_get_tc (sym)->next == (symbolS *) NULL) |
252b5132 RH |
5731 | a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput, |
5732 | S_GET_SEGMENT (sym)) | |
5733 | - S_GET_VALUE (sym)); | |
5734 | else | |
5735 | { | |
6386f3a7 | 5736 | resolve_symbol_value (symbol_get_tc (sym)->next); |
809ffe0d | 5737 | a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next) |
252b5132 RH |
5738 | - S_GET_VALUE (sym)); |
5739 | } | |
809ffe0d | 5740 | a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD; |
252b5132 RH |
5741 | } |
5742 | else if (S_GET_SEGMENT (sym) == bss_section) | |
5743 | { | |
5744 | /* This is a common symbol. */ | |
809ffe0d ILT |
5745 | a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset; |
5746 | a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM; | |
252b5132 | 5747 | if (S_IS_EXTERNAL (sym)) |
96d56e9f | 5748 | symbol_get_tc (sym)->symbol_class = XMC_RW; |
252b5132 | 5749 | else |
96d56e9f | 5750 | symbol_get_tc (sym)->symbol_class = XMC_BS; |
252b5132 RH |
5751 | } |
5752 | else if (S_GET_SEGMENT (sym) == absolute_section) | |
5753 | { | |
5754 | /* This is an absolute symbol. The csect will be created by | |
99a814a1 | 5755 | ppc_adjust_symtab. */ |
b34976b6 | 5756 | ppc_saw_abs = TRUE; |
252b5132 | 5757 | a->x_csect.x_smtyp = XTY_LD; |
96d56e9f NC |
5758 | if (symbol_get_tc (sym)->symbol_class == -1) |
5759 | symbol_get_tc (sym)->symbol_class = XMC_XO; | |
252b5132 RH |
5760 | } |
5761 | else if (! S_IS_DEFINED (sym)) | |
5762 | { | |
5763 | /* This is an external symbol. */ | |
5764 | a->x_csect.x_scnlen.l = 0; | |
5765 | a->x_csect.x_smtyp = XTY_ER; | |
5766 | } | |
96d56e9f | 5767 | else if (symbol_get_tc (sym)->symbol_class == XMC_TC) |
252b5132 RH |
5768 | { |
5769 | symbolS *next; | |
5770 | ||
5771 | /* This is a TOC definition. x_scnlen is the size of the | |
5772 | TOC entry. */ | |
5773 | next = symbol_next (sym); | |
96d56e9f | 5774 | while (symbol_get_tc (next)->symbol_class == XMC_TC0) |
252b5132 RH |
5775 | next = symbol_next (next); |
5776 | if (next == (symbolS *) NULL | |
96d56e9f | 5777 | || symbol_get_tc (next)->symbol_class != XMC_TC) |
252b5132 RH |
5778 | { |
5779 | if (ppc_after_toc_frag == (fragS *) NULL) | |
5780 | a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput, | |
5781 | data_section) | |
5782 | - S_GET_VALUE (sym)); | |
5783 | else | |
5784 | a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address | |
5785 | - S_GET_VALUE (sym)); | |
5786 | } | |
5787 | else | |
5788 | { | |
6386f3a7 | 5789 | resolve_symbol_value (next); |
252b5132 RH |
5790 | a->x_csect.x_scnlen.l = (S_GET_VALUE (next) |
5791 | - S_GET_VALUE (sym)); | |
5792 | } | |
5793 | a->x_csect.x_smtyp = (2 << 3) | XTY_SD; | |
5794 | } | |
5795 | else | |
5796 | { | |
5797 | symbolS *csect; | |
5798 | ||
5799 | /* This is a normal symbol definition. x_scnlen is the | |
5800 | symbol index of the containing csect. */ | |
5801 | if (S_GET_SEGMENT (sym) == text_section) | |
5802 | csect = ppc_text_csects; | |
5803 | else if (S_GET_SEGMENT (sym) == data_section) | |
5804 | csect = ppc_data_csects; | |
5805 | else | |
5806 | abort (); | |
5807 | ||
5808 | /* Skip the initial dummy symbol. */ | |
809ffe0d | 5809 | csect = symbol_get_tc (csect)->next; |
252b5132 RH |
5810 | |
5811 | if (csect == (symbolS *) NULL) | |
5812 | { | |
5813 | as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym)); | |
5814 | a->x_csect.x_scnlen.l = 0; | |
5815 | } | |
5816 | else | |
5817 | { | |
809ffe0d | 5818 | while (symbol_get_tc (csect)->next != (symbolS *) NULL) |
252b5132 | 5819 | { |
6386f3a7 | 5820 | resolve_symbol_value (symbol_get_tc (csect)->next); |
809ffe0d ILT |
5821 | if (S_GET_VALUE (symbol_get_tc (csect)->next) |
5822 | > S_GET_VALUE (sym)) | |
252b5132 | 5823 | break; |
809ffe0d | 5824 | csect = symbol_get_tc (csect)->next; |
252b5132 RH |
5825 | } |
5826 | ||
809ffe0d ILT |
5827 | a->x_csect.x_scnlen.p = |
5828 | coffsymbol (symbol_get_bfdsym (csect))->native; | |
5829 | coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen = | |
5830 | 1; | |
252b5132 RH |
5831 | } |
5832 | a->x_csect.x_smtyp = XTY_LD; | |
5833 | } | |
81d4177b | 5834 | |
252b5132 RH |
5835 | a->x_csect.x_parmhash = 0; |
5836 | a->x_csect.x_snhash = 0; | |
96d56e9f | 5837 | if (symbol_get_tc (sym)->symbol_class == -1) |
252b5132 RH |
5838 | a->x_csect.x_smclas = XMC_PR; |
5839 | else | |
96d56e9f | 5840 | a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class; |
252b5132 RH |
5841 | a->x_csect.x_stab = 0; |
5842 | a->x_csect.x_snstab = 0; | |
5843 | ||
5844 | /* Don't let the COFF backend resort these symbols. */ | |
809ffe0d | 5845 | symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END; |
252b5132 RH |
5846 | } |
5847 | else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT) | |
5848 | { | |
5849 | /* We want the value to be the symbol index of the referenced | |
5850 | csect symbol. BFD will do that for us if we set the right | |
5851 | flags. */ | |
b782de16 AM |
5852 | asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within); |
5853 | combined_entry_type *c = coffsymbol (bsym)->native; | |
5854 | ||
5855 | S_SET_VALUE (sym, (valueT) (size_t) c); | |
809ffe0d | 5856 | coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1; |
252b5132 RH |
5857 | } |
5858 | else if (S_GET_STORAGE_CLASS (sym) == C_STSYM) | |
5859 | { | |
5860 | symbolS *block; | |
c734e7e3 | 5861 | valueT base; |
252b5132 | 5862 | |
809ffe0d | 5863 | block = symbol_get_tc (sym)->within; |
c734e7e3 TG |
5864 | if (block) |
5865 | { | |
5866 | /* The value is the offset from the enclosing csect. */ | |
5867 | symbolS *csect; | |
5868 | ||
5869 | csect = symbol_get_tc (block)->within; | |
5870 | resolve_symbol_value (csect); | |
5871 | base = S_GET_VALUE (csect); | |
5872 | } | |
5873 | else | |
5874 | base = 0; | |
5875 | ||
5876 | S_SET_VALUE (sym, S_GET_VALUE (sym) - base); | |
252b5132 RH |
5877 | } |
5878 | else if (S_GET_STORAGE_CLASS (sym) == C_BINCL | |
5879 | || S_GET_STORAGE_CLASS (sym) == C_EINCL) | |
5880 | { | |
5881 | /* We want the value to be a file offset into the line numbers. | |
99a814a1 AM |
5882 | BFD will do that for us if we set the right flags. We have |
5883 | already set the value correctly. */ | |
809ffe0d | 5884 | coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1; |
252b5132 RH |
5885 | } |
5886 | ||
5887 | return 0; | |
5888 | } | |
5889 | ||
5890 | /* Adjust the symbol table. This creates csect symbols for all | |
5891 | absolute symbols. */ | |
5892 | ||
5893 | void | |
98027b10 | 5894 | ppc_adjust_symtab (void) |
252b5132 RH |
5895 | { |
5896 | symbolS *sym; | |
5897 | ||
5898 | if (! ppc_saw_abs) | |
5899 | return; | |
5900 | ||
5901 | for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym)) | |
5902 | { | |
5903 | symbolS *csect; | |
5904 | int i; | |
5905 | union internal_auxent *a; | |
5906 | ||
5907 | if (S_GET_SEGMENT (sym) != absolute_section) | |
5908 | continue; | |
5909 | ||
5910 | csect = symbol_create (".abs[XO]", absolute_section, | |
5911 | S_GET_VALUE (sym), &zero_address_frag); | |
809ffe0d | 5912 | symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym); |
252b5132 RH |
5913 | S_SET_STORAGE_CLASS (csect, C_HIDEXT); |
5914 | i = S_GET_NUMBER_AUXILIARY (csect); | |
5915 | S_SET_NUMBER_AUXILIARY (csect, i + 1); | |
809ffe0d | 5916 | a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent; |
252b5132 RH |
5917 | a->x_csect.x_scnlen.l = 0; |
5918 | a->x_csect.x_smtyp = XTY_SD; | |
5919 | a->x_csect.x_parmhash = 0; | |
5920 | a->x_csect.x_snhash = 0; | |
5921 | a->x_csect.x_smclas = XMC_XO; | |
5922 | a->x_csect.x_stab = 0; | |
5923 | a->x_csect.x_snstab = 0; | |
5924 | ||
5925 | symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP); | |
5926 | ||
5927 | i = S_GET_NUMBER_AUXILIARY (sym); | |
809ffe0d ILT |
5928 | a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent; |
5929 | a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native; | |
5930 | coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1; | |
252b5132 RH |
5931 | } |
5932 | ||
b34976b6 | 5933 | ppc_saw_abs = FALSE; |
252b5132 RH |
5934 | } |
5935 | ||
5936 | /* Set the VMA for a section. This is called on all the sections in | |
5937 | turn. */ | |
5938 | ||
5939 | void | |
98027b10 | 5940 | ppc_frob_section (asection *sec) |
252b5132 | 5941 | { |
931e13a6 | 5942 | static bfd_vma vma = 0; |
252b5132 | 5943 | |
85645aed TG |
5944 | /* Dwarf sections start at 0. */ |
5945 | if (bfd_get_section_flags (NULL, sec) & SEC_DEBUGGING) | |
5946 | return; | |
5947 | ||
931e13a6 | 5948 | vma = md_section_align (sec, vma); |
252b5132 RH |
5949 | bfd_set_section_vma (stdoutput, sec, vma); |
5950 | vma += bfd_section_size (stdoutput, sec); | |
5951 | } | |
5952 | ||
5953 | #endif /* OBJ_XCOFF */ | |
5954 | \f | |
252b5132 | 5955 | char * |
98027b10 | 5956 | md_atof (int type, char *litp, int *sizep) |
252b5132 | 5957 | { |
499ac353 | 5958 | return ieee_md_atof (type, litp, sizep, target_big_endian); |
252b5132 RH |
5959 | } |
5960 | ||
5961 | /* Write a value out to the object file, using the appropriate | |
5962 | endianness. */ | |
5963 | ||
5964 | void | |
98027b10 | 5965 | md_number_to_chars (char *buf, valueT val, int n) |
252b5132 RH |
5966 | { |
5967 | if (target_big_endian) | |
5968 | number_to_chars_bigendian (buf, val, n); | |
5969 | else | |
5970 | number_to_chars_littleendian (buf, val, n); | |
5971 | } | |
5972 | ||
5973 | /* Align a section (I don't know why this is machine dependent). */ | |
5974 | ||
5975 | valueT | |
3aeeedbb | 5976 | md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr) |
252b5132 | 5977 | { |
3aeeedbb AM |
5978 | #ifdef OBJ_ELF |
5979 | return addr; | |
5980 | #else | |
252b5132 RH |
5981 | int align = bfd_get_section_alignment (stdoutput, seg); |
5982 | ||
5983 | return ((addr + (1 << align) - 1) & (-1 << align)); | |
3aeeedbb | 5984 | #endif |
252b5132 RH |
5985 | } |
5986 | ||
5987 | /* We don't have any form of relaxing. */ | |
5988 | ||
5989 | int | |
98027b10 AM |
5990 | md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED, |
5991 | asection *seg ATTRIBUTE_UNUSED) | |
252b5132 RH |
5992 | { |
5993 | abort (); | |
5994 | return 0; | |
5995 | } | |
5996 | ||
5997 | /* Convert a machine dependent frag. We never generate these. */ | |
5998 | ||
5999 | void | |
98027b10 AM |
6000 | md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, |
6001 | asection *sec ATTRIBUTE_UNUSED, | |
6002 | fragS *fragp ATTRIBUTE_UNUSED) | |
252b5132 RH |
6003 | { |
6004 | abort (); | |
6005 | } | |
6006 | ||
6007 | /* We have no need to default values of symbols. */ | |
6008 | ||
252b5132 | 6009 | symbolS * |
98027b10 | 6010 | md_undefined_symbol (char *name ATTRIBUTE_UNUSED) |
252b5132 RH |
6011 | { |
6012 | return 0; | |
6013 | } | |
6014 | \f | |
6015 | /* Functions concerning relocs. */ | |
6016 | ||
6017 | /* The location from which a PC relative jump should be calculated, | |
6018 | given a PC relative reloc. */ | |
6019 | ||
6020 | long | |
98027b10 | 6021 | md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED) |
252b5132 RH |
6022 | { |
6023 | return fixp->fx_frag->fr_address + fixp->fx_where; | |
6024 | } | |
6025 | ||
6026 | #ifdef OBJ_XCOFF | |
6027 | ||
6028 | /* This is called to see whether a fixup should be adjusted to use a | |
6029 | section symbol. We take the opportunity to change a fixup against | |
6030 | a symbol in the TOC subsegment into a reloc against the | |
6031 | corresponding .tc symbol. */ | |
6032 | ||
6033 | int | |
98027b10 | 6034 | ppc_fix_adjustable (fixS *fix) |
252b5132 | 6035 | { |
b782de16 AM |
6036 | valueT val = resolve_symbol_value (fix->fx_addsy); |
6037 | segT symseg = S_GET_SEGMENT (fix->fx_addsy); | |
6038 | TC_SYMFIELD_TYPE *tc; | |
6039 | ||
6040 | if (symseg == absolute_section) | |
6041 | return 0; | |
252b5132 | 6042 | |
85645aed TG |
6043 | /* Always adjust symbols in debugging sections. */ |
6044 | if (bfd_get_section_flags (stdoutput, symseg) & SEC_DEBUGGING) | |
6045 | return 1; | |
6046 | ||
252b5132 | 6047 | if (ppc_toc_csect != (symbolS *) NULL |
252b5132 | 6048 | && fix->fx_addsy != ppc_toc_csect |
b782de16 | 6049 | && symseg == data_section |
252b5132 RH |
6050 | && val >= ppc_toc_frag->fr_address |
6051 | && (ppc_after_toc_frag == (fragS *) NULL | |
6052 | || val < ppc_after_toc_frag->fr_address)) | |
6053 | { | |
6054 | symbolS *sy; | |
6055 | ||
6056 | for (sy = symbol_next (ppc_toc_csect); | |
6057 | sy != (symbolS *) NULL; | |
6058 | sy = symbol_next (sy)) | |
6059 | { | |
b782de16 AM |
6060 | TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy); |
6061 | ||
96d56e9f | 6062 | if (sy_tc->symbol_class == XMC_TC0) |
252b5132 | 6063 | continue; |
96d56e9f | 6064 | if (sy_tc->symbol_class != XMC_TC) |
252b5132 | 6065 | break; |
b782de16 | 6066 | if (val == resolve_symbol_value (sy)) |
252b5132 RH |
6067 | { |
6068 | fix->fx_addsy = sy; | |
6069 | fix->fx_addnumber = val - ppc_toc_frag->fr_address; | |
6070 | return 0; | |
6071 | } | |
6072 | } | |
6073 | ||
6074 | as_bad_where (fix->fx_file, fix->fx_line, | |
6075 | _("symbol in .toc does not match any .tc")); | |
6076 | } | |
6077 | ||
6078 | /* Possibly adjust the reloc to be against the csect. */ | |
b782de16 AM |
6079 | tc = symbol_get_tc (fix->fx_addsy); |
6080 | if (tc->subseg == 0 | |
96d56e9f NC |
6081 | && tc->symbol_class != XMC_TC0 |
6082 | && tc->symbol_class != XMC_TC | |
b782de16 | 6083 | && symseg != bss_section |
252b5132 | 6084 | /* Don't adjust if this is a reloc in the toc section. */ |
b782de16 | 6085 | && (symseg != data_section |
252b5132 RH |
6086 | || ppc_toc_csect == NULL |
6087 | || val < ppc_toc_frag->fr_address | |
6088 | || (ppc_after_toc_frag != NULL | |
6089 | && val >= ppc_after_toc_frag->fr_address))) | |
6090 | { | |
2fb4b302 | 6091 | symbolS *csect = tc->within; |
252b5132 | 6092 | |
2fb4b302 TG |
6093 | /* If the symbol was not declared by a label (eg: a section symbol), |
6094 | use the section instead of the csect. This doesn't happen in | |
6095 | normal AIX assembly code. */ | |
6096 | if (csect == NULL) | |
6097 | csect = seg_info (symseg)->sym; | |
252b5132 | 6098 | |
2fb4b302 TG |
6099 | fix->fx_offset += val - symbol_get_frag (csect)->fr_address; |
6100 | fix->fx_addsy = csect; | |
252b5132 | 6101 | |
b782de16 | 6102 | return 0; |
252b5132 RH |
6103 | } |
6104 | ||
6105 | /* Adjust a reloc against a .lcomm symbol to be against the base | |
6106 | .lcomm. */ | |
b782de16 | 6107 | if (symseg == bss_section |
252b5132 RH |
6108 | && ! S_IS_EXTERNAL (fix->fx_addsy)) |
6109 | { | |
b782de16 AM |
6110 | symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol; |
6111 | ||
6112 | fix->fx_offset += val - resolve_symbol_value (sy); | |
6113 | fix->fx_addsy = sy; | |
252b5132 RH |
6114 | } |
6115 | ||
6116 | return 0; | |
6117 | } | |
6118 | ||
6119 | /* A reloc from one csect to another must be kept. The assembler | |
6120 | will, of course, keep relocs between sections, and it will keep | |
6121 | absolute relocs, but we need to force it to keep PC relative relocs | |
6122 | between two csects in the same section. */ | |
6123 | ||
6124 | int | |
98027b10 | 6125 | ppc_force_relocation (fixS *fix) |
252b5132 RH |
6126 | { |
6127 | /* At this point fix->fx_addsy should already have been converted to | |
6128 | a csect symbol. If the csect does not include the fragment, then | |
6129 | we need to force the relocation. */ | |
6130 | if (fix->fx_pcrel | |
6131 | && fix->fx_addsy != NULL | |
809ffe0d ILT |
6132 | && symbol_get_tc (fix->fx_addsy)->subseg != 0 |
6133 | && ((symbol_get_frag (fix->fx_addsy)->fr_address | |
6134 | > fix->fx_frag->fr_address) | |
6135 | || (symbol_get_tc (fix->fx_addsy)->next != NULL | |
6136 | && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address | |
252b5132 RH |
6137 | <= fix->fx_frag->fr_address)))) |
6138 | return 1; | |
6139 | ||
ae6063d4 | 6140 | return generic_force_reloc (fix); |
252b5132 RH |
6141 | } |
6142 | ||
2fb4b302 TG |
6143 | void |
6144 | ppc_new_dot_label (symbolS *sym) | |
6145 | { | |
6146 | /* Anchor this label to the current csect for relocations. */ | |
6147 | symbol_get_tc (sym)->within = ppc_current_csect; | |
6148 | } | |
6149 | ||
252b5132 RH |
6150 | #endif /* OBJ_XCOFF */ |
6151 | ||
0baf16f2 | 6152 | #ifdef OBJ_ELF |
a161fe53 AM |
6153 | /* If this function returns non-zero, it guarantees that a relocation |
6154 | will be emitted for a fixup. */ | |
6155 | ||
6156 | int | |
98027b10 | 6157 | ppc_force_relocation (fixS *fix) |
a161fe53 AM |
6158 | { |
6159 | /* Branch prediction relocations must force a relocation, as must | |
6160 | the vtable description relocs. */ | |
6161 | switch (fix->fx_r_type) | |
6162 | { | |
6163 | case BFD_RELOC_PPC_B16_BRTAKEN: | |
6164 | case BFD_RELOC_PPC_B16_BRNTAKEN: | |
6165 | case BFD_RELOC_PPC_BA16_BRTAKEN: | |
6166 | case BFD_RELOC_PPC_BA16_BRNTAKEN: | |
c744ecf2 | 6167 | case BFD_RELOC_24_PLT_PCREL: |
a161fe53 | 6168 | case BFD_RELOC_PPC64_TOC: |
a161fe53 AM |
6169 | return 1; |
6170 | default: | |
6171 | break; | |
6172 | } | |
6173 | ||
cdba85ec AM |
6174 | if (fix->fx_r_type >= BFD_RELOC_PPC_TLS |
6175 | && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA) | |
6176 | return 1; | |
6177 | ||
ae6063d4 | 6178 | return generic_force_reloc (fix); |
a161fe53 AM |
6179 | } |
6180 | ||
0baf16f2 | 6181 | int |
98027b10 | 6182 | ppc_fix_adjustable (fixS *fix) |
252b5132 | 6183 | { |
0baf16f2 AM |
6184 | return (fix->fx_r_type != BFD_RELOC_16_GOTOFF |
6185 | && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF | |
6186 | && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF | |
6187 | && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF | |
cc9edbf3 AM |
6188 | && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_DS |
6189 | && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_LO_DS | |
0baf16f2 AM |
6190 | && fix->fx_r_type != BFD_RELOC_GPREL16 |
6191 | && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT | |
6192 | && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY | |
cdba85ec | 6193 | && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS |
ab1e9ef7 | 6194 | && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)); |
252b5132 | 6195 | } |
0baf16f2 | 6196 | #endif |
252b5132 | 6197 | |
b9c361e0 JL |
6198 | void |
6199 | ppc_frag_check (struct frag *fragP) | |
6200 | { | |
6201 | if (!fragP->has_code) | |
6202 | return; | |
6203 | ||
6204 | if (ppc_mach() == bfd_mach_ppc_vle) | |
6205 | { | |
6206 | if (((fragP->fr_address + fragP->insn_addr) & 1) != 0) | |
6207 | as_bad (_("instruction address is not a multiple of 2")); | |
6208 | } | |
6209 | else | |
6210 | { | |
6211 | if (((fragP->fr_address + fragP->insn_addr) & 3) != 0) | |
6212 | as_bad (_("instruction address is not a multiple of 4")); | |
6213 | } | |
6214 | } | |
6215 | ||
3aeeedbb AM |
6216 | /* Implement HANDLE_ALIGN. This writes the NOP pattern into an |
6217 | rs_align_code frag. */ | |
6218 | ||
6219 | void | |
6220 | ppc_handle_align (struct frag *fragP) | |
6221 | { | |
6222 | valueT count = (fragP->fr_next->fr_address | |
6223 | - (fragP->fr_address + fragP->fr_fix)); | |
6224 | ||
b9c361e0 JL |
6225 | if (ppc_mach() == bfd_mach_ppc_vle && count != 0 && (count & 1) == 0) |
6226 | { | |
6227 | char *dest = fragP->fr_literal + fragP->fr_fix; | |
6228 | ||
6229 | fragP->fr_var = 2; | |
6230 | md_number_to_chars (dest, 0x4400, 2); | |
6231 | } | |
6232 | else if (count != 0 && (count & 3) == 0) | |
3aeeedbb AM |
6233 | { |
6234 | char *dest = fragP->fr_literal + fragP->fr_fix; | |
6235 | ||
6236 | fragP->fr_var = 4; | |
cef4f754 AM |
6237 | |
6238 | if (count > 4 * nop_limit && count < 0x2000000) | |
6239 | { | |
6240 | struct frag *rest; | |
6241 | ||
6242 | /* Make a branch, then follow with nops. Insert another | |
6243 | frag to handle the nops. */ | |
6244 | md_number_to_chars (dest, 0x48000000 + count, 4); | |
6245 | count -= 4; | |
6246 | if (count == 0) | |
6247 | return; | |
6248 | ||
6249 | rest = xmalloc (SIZEOF_STRUCT_FRAG + 4); | |
6250 | memcpy (rest, fragP, SIZEOF_STRUCT_FRAG); | |
6251 | fragP->fr_next = rest; | |
6252 | fragP = rest; | |
6253 | rest->fr_address += rest->fr_fix + 4; | |
6254 | rest->fr_fix = 0; | |
6255 | /* If we leave the next frag as rs_align_code we'll come here | |
6256 | again, resulting in a bunch of branches rather than a | |
6257 | branch followed by nops. */ | |
6258 | rest->fr_type = rs_align; | |
6259 | dest = rest->fr_literal; | |
6260 | } | |
6261 | ||
3aeeedbb AM |
6262 | md_number_to_chars (dest, 0x60000000, 4); |
6263 | ||
42240548 PB |
6264 | if ((ppc_cpu & PPC_OPCODE_POWER6) != 0 |
6265 | || (ppc_cpu & PPC_OPCODE_POWER7) != 0) | |
3aeeedbb | 6266 | { |
42240548 PB |
6267 | /* For power6 and power7, we want the last nop to be a group |
6268 | terminating one. Do this by inserting an rs_fill frag immediately | |
6269 | after this one, with its address set to the last nop location. | |
6270 | This will automatically reduce the number of nops in the current | |
6271 | frag by one. */ | |
3aeeedbb AM |
6272 | if (count > 4) |
6273 | { | |
6274 | struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4); | |
6275 | ||
6276 | memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG); | |
6277 | group_nop->fr_address = group_nop->fr_next->fr_address - 4; | |
6278 | group_nop->fr_fix = 0; | |
6279 | group_nop->fr_offset = 1; | |
6280 | group_nop->fr_type = rs_fill; | |
6281 | fragP->fr_next = group_nop; | |
6282 | dest = group_nop->fr_literal; | |
6283 | } | |
6284 | ||
42240548 | 6285 | if ((ppc_cpu & PPC_OPCODE_POWER7) != 0) |
aea77599 AM |
6286 | { |
6287 | if (ppc_cpu & PPC_OPCODE_E500MC) | |
6288 | /* e500mc group terminating nop: "ori 0,0,0". */ | |
6289 | md_number_to_chars (dest, 0x60000000, 4); | |
6290 | else | |
6291 | /* power7 group terminating nop: "ori 2,2,0". */ | |
6292 | md_number_to_chars (dest, 0x60420000, 4); | |
6293 | } | |
42240548 PB |
6294 | else |
6295 | /* power6 group terminating nop: "ori 1,1,0". */ | |
6296 | md_number_to_chars (dest, 0x60210000, 4); | |
3aeeedbb AM |
6297 | } |
6298 | } | |
6299 | } | |
6300 | ||
252b5132 RH |
6301 | /* Apply a fixup to the object code. This is called for all the |
6302 | fixups we generated by the call to fix_new_exp, above. In the call | |
6303 | above we used a reloc code which was the largest legal reloc code | |
6304 | plus the operand index. Here we undo that to recover the operand | |
6305 | index. At this point all symbol values should be fully resolved, | |
6306 | and we attempt to completely resolve the reloc. If we can not do | |
6307 | that, we determine the correct reloc code and put it back in the | |
6308 | fixup. */ | |
6309 | ||
94f592af | 6310 | void |
98027b10 | 6311 | md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) |
252b5132 | 6312 | { |
94f592af | 6313 | valueT value = * valP; |
252b5132 RH |
6314 | |
6315 | #ifdef OBJ_ELF | |
94f592af | 6316 | if (fixP->fx_addsy != NULL) |
252b5132 | 6317 | { |
a161fe53 | 6318 | /* Hack around bfd_install_relocation brain damage. */ |
94f592af NC |
6319 | if (fixP->fx_pcrel) |
6320 | value += fixP->fx_frag->fr_address + fixP->fx_where; | |
252b5132 RH |
6321 | } |
6322 | else | |
94f592af | 6323 | fixP->fx_done = 1; |
252b5132 | 6324 | #else |
a161fe53 | 6325 | /* FIXME FIXME FIXME: The value we are passed in *valP includes |
7be1c489 AM |
6326 | the symbol values. If we are doing this relocation the code in |
6327 | write.c is going to call bfd_install_relocation, which is also | |
6328 | going to use the symbol value. That means that if the reloc is | |
6329 | fully resolved we want to use *valP since bfd_install_relocation is | |
6330 | not being used. | |
9f0eb232 RS |
6331 | However, if the reloc is not fully resolved we do not want to |
6332 | use *valP, and must use fx_offset instead. If the relocation | |
6333 | is PC-relative, we then need to re-apply md_pcrel_from_section | |
6334 | to this new relocation value. */ | |
94f592af NC |
6335 | if (fixP->fx_addsy == (symbolS *) NULL) |
6336 | fixP->fx_done = 1; | |
6337 | ||
252b5132 | 6338 | else |
9f0eb232 RS |
6339 | { |
6340 | value = fixP->fx_offset; | |
6341 | if (fixP->fx_pcrel) | |
6342 | value -= md_pcrel_from_section (fixP, seg); | |
6343 | } | |
a161fe53 AM |
6344 | #endif |
6345 | ||
6346 | if (fixP->fx_subsy != (symbolS *) NULL) | |
252b5132 | 6347 | { |
a161fe53 AM |
6348 | /* We can't actually support subtracting a symbol. */ |
6349 | as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex")); | |
252b5132 | 6350 | } |
252b5132 | 6351 | |
94f592af | 6352 | if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED) |
252b5132 RH |
6353 | { |
6354 | int opindex; | |
6355 | const struct powerpc_operand *operand; | |
6356 | char *where; | |
6357 | unsigned long insn; | |
6358 | ||
94f592af | 6359 | opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED; |
252b5132 RH |
6360 | |
6361 | operand = &powerpc_operands[opindex]; | |
6362 | ||
6363 | #ifdef OBJ_XCOFF | |
0baf16f2 AM |
6364 | /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol |
6365 | does not generate a reloc. It uses the offset of `sym' within its | |
6366 | csect. Other usages, such as `.long sym', generate relocs. This | |
6367 | is the documented behaviour of non-TOC symbols. */ | |
252b5132 | 6368 | if ((operand->flags & PPC_OPERAND_PARENS) != 0 |
b84bf58a | 6369 | && (operand->bitm & 0xfff0) == 0xfff0 |
252b5132 | 6370 | && operand->shift == 0 |
2b3c4602 | 6371 | && (operand->insert == NULL || ppc_obj64) |
94f592af NC |
6372 | && fixP->fx_addsy != NULL |
6373 | && symbol_get_tc (fixP->fx_addsy)->subseg != 0 | |
96d56e9f NC |
6374 | && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC |
6375 | && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0 | |
94f592af | 6376 | && S_GET_SEGMENT (fixP->fx_addsy) != bss_section) |
252b5132 | 6377 | { |
94f592af NC |
6378 | value = fixP->fx_offset; |
6379 | fixP->fx_done = 1; | |
252b5132 RH |
6380 | } |
6381 | #endif | |
6382 | ||
6383 | /* Fetch the instruction, insert the fully resolved operand | |
6384 | value, and stuff the instruction back again. */ | |
94f592af | 6385 | where = fixP->fx_frag->fr_literal + fixP->fx_where; |
252b5132 | 6386 | if (target_big_endian) |
b9c361e0 JL |
6387 | { |
6388 | if (fixP->fx_size == 4) | |
6389 | insn = bfd_getb32 ((unsigned char *) where); | |
6390 | else | |
6391 | insn = bfd_getb16 ((unsigned char *) where); | |
6392 | } | |
252b5132 | 6393 | else |
b9c361e0 JL |
6394 | { |
6395 | if (fixP->fx_size == 4) | |
6396 | insn = bfd_getl32 ((unsigned char *) where); | |
6397 | else | |
6398 | insn = bfd_getl16 ((unsigned char *) where); | |
6399 | } | |
252b5132 | 6400 | insn = ppc_insert_operand (insn, operand, (offsetT) value, |
783de163 | 6401 | fixP->tc_fix_data.ppc_cpu, |
94f592af | 6402 | fixP->fx_file, fixP->fx_line); |
252b5132 | 6403 | if (target_big_endian) |
b9c361e0 JL |
6404 | { |
6405 | if (fixP->fx_size == 4) | |
6406 | bfd_putb32 ((bfd_vma) insn, (unsigned char *) where); | |
6407 | else | |
6408 | bfd_putb16 ((bfd_vma) insn, (unsigned char *) where); | |
6409 | } | |
252b5132 | 6410 | else |
b9c361e0 JL |
6411 | { |
6412 | if (fixP->fx_size == 4) | |
6413 | bfd_putl32 ((bfd_vma) insn, (unsigned char *) where); | |
6414 | else | |
6415 | bfd_putl16 ((bfd_vma) insn, (unsigned char *) where); | |
6416 | } | |
252b5132 | 6417 | |
94f592af NC |
6418 | if (fixP->fx_done) |
6419 | /* Nothing else to do here. */ | |
6420 | return; | |
252b5132 | 6421 | |
9c2799c2 | 6422 | gas_assert (fixP->fx_addsy != NULL); |
0baf16f2 | 6423 | |
252b5132 RH |
6424 | /* Determine a BFD reloc value based on the operand information. |
6425 | We are only prepared to turn a few of the operands into | |
0baf16f2 | 6426 | relocs. */ |
11b37b7b | 6427 | if ((operand->flags & PPC_OPERAND_RELATIVE) != 0 |
b84bf58a | 6428 | && operand->bitm == 0x3fffffc |
11b37b7b | 6429 | && operand->shift == 0) |
94f592af | 6430 | fixP->fx_r_type = BFD_RELOC_PPC_B26; |
11b37b7b | 6431 | else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0 |
b84bf58a | 6432 | && operand->bitm == 0xfffc |
11b37b7b | 6433 | && operand->shift == 0) |
95210096 AM |
6434 | { |
6435 | fixP->fx_r_type = BFD_RELOC_PPC_B16; | |
6436 | #ifdef OBJ_XCOFF | |
6437 | fixP->fx_size = 2; | |
6438 | if (target_big_endian) | |
6439 | fixP->fx_where += 2; | |
6440 | #endif | |
6441 | } | |
b9c361e0 JL |
6442 | else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0 |
6443 | && operand->bitm == 0x1fe | |
6444 | && operand->shift == -1) | |
6445 | fixP->fx_r_type = BFD_RELOC_PPC_VLE_REL8; | |
6446 | else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0 | |
6447 | && operand->bitm == 0xfffe | |
6448 | && operand->shift == 0) | |
6449 | fixP->fx_r_type = BFD_RELOC_PPC_VLE_REL15; | |
6450 | else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0 | |
6451 | && operand->bitm == 0x1fffffe | |
6452 | && operand->shift == 0) | |
6453 | fixP->fx_r_type = BFD_RELOC_PPC_VLE_REL24; | |
11b37b7b | 6454 | else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0 |
b84bf58a | 6455 | && operand->bitm == 0x3fffffc |
11b37b7b | 6456 | && operand->shift == 0) |
94f592af | 6457 | fixP->fx_r_type = BFD_RELOC_PPC_BA26; |
11b37b7b | 6458 | else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0 |
b84bf58a | 6459 | && operand->bitm == 0xfffc |
11b37b7b | 6460 | && operand->shift == 0) |
95210096 AM |
6461 | { |
6462 | fixP->fx_r_type = BFD_RELOC_PPC_BA16; | |
6463 | #ifdef OBJ_XCOFF | |
6464 | fixP->fx_size = 2; | |
6465 | if (target_big_endian) | |
6466 | fixP->fx_where += 2; | |
6467 | #endif | |
6468 | } | |
0baf16f2 | 6469 | #if defined (OBJ_XCOFF) || defined (OBJ_ELF) |
11b37b7b | 6470 | else if ((operand->flags & PPC_OPERAND_PARENS) != 0 |
b84bf58a | 6471 | && (operand->bitm & 0xfff0) == 0xfff0 |
a7fc733f | 6472 | && operand->shift == 0) |
11b37b7b | 6473 | { |
a7fc733f AM |
6474 | if (ppc_is_toc_sym (fixP->fx_addsy)) |
6475 | { | |
6476 | fixP->fx_r_type = BFD_RELOC_PPC_TOC16; | |
0baf16f2 | 6477 | #ifdef OBJ_ELF |
a7fc733f AM |
6478 | if (ppc_obj64 |
6479 | && (operand->flags & PPC_OPERAND_DS) != 0) | |
6480 | fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS; | |
6481 | #endif | |
6482 | } | |
6483 | else | |
6484 | { | |
6485 | fixP->fx_r_type = BFD_RELOC_16; | |
6486 | #ifdef OBJ_ELF | |
6487 | if (ppc_obj64 | |
6488 | && (operand->flags & PPC_OPERAND_DS) != 0) | |
6489 | fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS; | |
0baf16f2 | 6490 | #endif |
a7fc733f | 6491 | } |
94f592af | 6492 | fixP->fx_size = 2; |
11b37b7b | 6493 | if (target_big_endian) |
94f592af | 6494 | fixP->fx_where += 2; |
11b37b7b | 6495 | } |
0baf16f2 | 6496 | #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */ |
11b37b7b | 6497 | else |
252b5132 RH |
6498 | { |
6499 | char *sfile; | |
6500 | unsigned int sline; | |
6501 | ||
6502 | /* Use expr_symbol_where to see if this is an expression | |
0baf16f2 | 6503 | symbol. */ |
94f592af NC |
6504 | if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline)) |
6505 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
252b5132 RH |
6506 | _("unresolved expression that must be resolved")); |
6507 | else | |
94f592af | 6508 | as_bad_where (fixP->fx_file, fixP->fx_line, |
0baf16f2 | 6509 | _("unsupported relocation against %s"), |
94f592af NC |
6510 | S_GET_NAME (fixP->fx_addsy)); |
6511 | fixP->fx_done = 1; | |
6512 | return; | |
252b5132 RH |
6513 | } |
6514 | } | |
6515 | else | |
6516 | { | |
6517 | #ifdef OBJ_ELF | |
94f592af | 6518 | ppc_elf_validate_fix (fixP, seg); |
252b5132 | 6519 | #endif |
94f592af | 6520 | switch (fixP->fx_r_type) |
252b5132 | 6521 | { |
252b5132 | 6522 | case BFD_RELOC_CTOR: |
2b3c4602 | 6523 | if (ppc_obj64) |
9c7977b3 AM |
6524 | goto ctor64; |
6525 | /* fall through */ | |
6526 | ||
0baf16f2 | 6527 | case BFD_RELOC_32: |
94f592af NC |
6528 | if (fixP->fx_pcrel) |
6529 | fixP->fx_r_type = BFD_RELOC_32_PCREL; | |
99a814a1 | 6530 | /* fall through */ |
252b5132 RH |
6531 | |
6532 | case BFD_RELOC_RVA: | |
6533 | case BFD_RELOC_32_PCREL: | |
252b5132 | 6534 | case BFD_RELOC_PPC_EMB_NADDR32: |
94f592af | 6535 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, |
252b5132 RH |
6536 | value, 4); |
6537 | break; | |
6538 | ||
7f6d05e8 | 6539 | case BFD_RELOC_64: |
9c7977b3 | 6540 | ctor64: |
94f592af NC |
6541 | if (fixP->fx_pcrel) |
6542 | fixP->fx_r_type = BFD_RELOC_64_PCREL; | |
99a814a1 | 6543 | /* fall through */ |
0baf16f2 | 6544 | |
7f6d05e8 | 6545 | case BFD_RELOC_64_PCREL: |
94f592af | 6546 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, |
7f6d05e8 | 6547 | value, 8); |
81d4177b | 6548 | break; |
0baf16f2 | 6549 | |
252b5132 RH |
6550 | case BFD_RELOC_GPREL16: |
6551 | case BFD_RELOC_16_GOT_PCREL: | |
6552 | case BFD_RELOC_16_GOTOFF: | |
6553 | case BFD_RELOC_LO16_GOTOFF: | |
6554 | case BFD_RELOC_HI16_GOTOFF: | |
6555 | case BFD_RELOC_HI16_S_GOTOFF: | |
1cfc59d5 | 6556 | case BFD_RELOC_16_BASEREL: |
252b5132 RH |
6557 | case BFD_RELOC_LO16_BASEREL: |
6558 | case BFD_RELOC_HI16_BASEREL: | |
6559 | case BFD_RELOC_HI16_S_BASEREL: | |
6560 | case BFD_RELOC_PPC_EMB_NADDR16: | |
6561 | case BFD_RELOC_PPC_EMB_NADDR16_LO: | |
6562 | case BFD_RELOC_PPC_EMB_NADDR16_HI: | |
6563 | case BFD_RELOC_PPC_EMB_NADDR16_HA: | |
6564 | case BFD_RELOC_PPC_EMB_SDAI16: | |
6565 | case BFD_RELOC_PPC_EMB_SDA2REL: | |
6566 | case BFD_RELOC_PPC_EMB_SDA2I16: | |
6567 | case BFD_RELOC_PPC_EMB_RELSEC16: | |
6568 | case BFD_RELOC_PPC_EMB_RELST_LO: | |
6569 | case BFD_RELOC_PPC_EMB_RELST_HI: | |
6570 | case BFD_RELOC_PPC_EMB_RELST_HA: | |
6571 | case BFD_RELOC_PPC_EMB_RELSDA: | |
6572 | case BFD_RELOC_PPC_TOC16: | |
0baf16f2 | 6573 | #ifdef OBJ_ELF |
0baf16f2 AM |
6574 | case BFD_RELOC_PPC64_TOC16_LO: |
6575 | case BFD_RELOC_PPC64_TOC16_HI: | |
6576 | case BFD_RELOC_PPC64_TOC16_HA: | |
0baf16f2 | 6577 | #endif |
94f592af | 6578 | if (fixP->fx_pcrel) |
252b5132 | 6579 | { |
94f592af NC |
6580 | if (fixP->fx_addsy != NULL) |
6581 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
252b5132 | 6582 | _("cannot emit PC relative %s relocation against %s"), |
94f592af NC |
6583 | bfd_get_reloc_code_name (fixP->fx_r_type), |
6584 | S_GET_NAME (fixP->fx_addsy)); | |
252b5132 | 6585 | else |
94f592af | 6586 | as_bad_where (fixP->fx_file, fixP->fx_line, |
252b5132 | 6587 | _("cannot emit PC relative %s relocation"), |
94f592af | 6588 | bfd_get_reloc_code_name (fixP->fx_r_type)); |
252b5132 RH |
6589 | } |
6590 | ||
94f592af | 6591 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, |
252b5132 RH |
6592 | value, 2); |
6593 | break; | |
6594 | ||
3c9d25f4 AM |
6595 | case BFD_RELOC_16: |
6596 | if (fixP->fx_pcrel) | |
6597 | fixP->fx_r_type = BFD_RELOC_16_PCREL; | |
6598 | /* fall through */ | |
6599 | ||
6600 | case BFD_RELOC_16_PCREL: | |
6601 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, | |
6602 | value, 2); | |
6603 | break; | |
6604 | ||
6605 | case BFD_RELOC_LO16: | |
6606 | if (fixP->fx_pcrel) | |
6607 | fixP->fx_r_type = BFD_RELOC_LO16_PCREL; | |
6608 | /* fall through */ | |
6609 | ||
6610 | case BFD_RELOC_LO16_PCREL: | |
6611 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, | |
6612 | value, 2); | |
6613 | break; | |
6614 | ||
252b5132 RH |
6615 | /* This case happens when you write, for example, |
6616 | lis %r3,(L1-L2)@ha | |
6617 | where L1 and L2 are defined later. */ | |
6618 | case BFD_RELOC_HI16: | |
94f592af | 6619 | if (fixP->fx_pcrel) |
3c9d25f4 AM |
6620 | fixP->fx_r_type = BFD_RELOC_HI16_PCREL; |
6621 | /* fall through */ | |
6622 | ||
6623 | case BFD_RELOC_HI16_PCREL: | |
94f592af | 6624 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, |
0baf16f2 | 6625 | PPC_HI (value), 2); |
252b5132 | 6626 | break; |
0baf16f2 | 6627 | |
252b5132 | 6628 | case BFD_RELOC_HI16_S: |
94f592af | 6629 | if (fixP->fx_pcrel) |
3c9d25f4 AM |
6630 | fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL; |
6631 | /* fall through */ | |
6632 | ||
6633 | case BFD_RELOC_HI16_S_PCREL: | |
94f592af | 6634 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, |
0baf16f2 AM |
6635 | PPC_HA (value), 2); |
6636 | break; | |
6637 | ||
b9c361e0 JL |
6638 | case BFD_RELOC_PPC_VLE_SDAREL_LO16A: |
6639 | case BFD_RELOC_PPC_VLE_LO16A: | |
6640 | { | |
6641 | int tval = PPC_VLE_LO16A (value); | |
6642 | valueT oldval = md_chars_to_number ( | |
6643 | fixP->fx_frag->fr_literal + fixP->fx_where, 4); | |
6644 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, | |
6645 | (oldval | tval), 4); | |
6646 | } | |
6647 | break; | |
6648 | ||
6649 | case BFD_RELOC_PPC_VLE_SDAREL_LO16D: | |
6650 | case BFD_RELOC_PPC_VLE_LO16D: | |
6651 | { | |
6652 | int tval = PPC_VLE_LO16D (value); | |
6653 | valueT oldval = md_chars_to_number ( | |
6654 | fixP->fx_frag->fr_literal + fixP->fx_where, 4); | |
6655 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, | |
6656 | (oldval | tval), 4); | |
6657 | } | |
6658 | break; | |
6659 | ||
6660 | case BFD_RELOC_PPC_VLE_SDAREL_HI16A: | |
6661 | case BFD_RELOC_PPC_VLE_HI16A: | |
6662 | { | |
6663 | int tval = PPC_VLE_HI16A (value); | |
6664 | valueT oldval = md_chars_to_number ( | |
6665 | fixP->fx_frag->fr_literal + fixP->fx_where, 4); | |
6666 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, | |
6667 | (oldval | tval), 4); | |
6668 | } | |
6669 | break; | |
6670 | ||
6671 | case BFD_RELOC_PPC_VLE_SDAREL_HI16D: | |
6672 | case BFD_RELOC_PPC_VLE_HI16D: | |
6673 | { | |
6674 | int tval = PPC_VLE_HI16D (value); | |
6675 | valueT oldval = md_chars_to_number ( | |
6676 | fixP->fx_frag->fr_literal + fixP->fx_where, 4); | |
6677 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, | |
6678 | (oldval | tval), 4); | |
6679 | } | |
6680 | break; | |
6681 | ||
6682 | case BFD_RELOC_PPC_VLE_SDAREL_HA16A: | |
6683 | case BFD_RELOC_PPC_VLE_HA16A: | |
6684 | { | |
6685 | int tval = PPC_VLE_HA16A (value); | |
6686 | valueT oldval = md_chars_to_number ( | |
6687 | fixP->fx_frag->fr_literal + fixP->fx_where, 4); | |
6688 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, | |
6689 | (oldval | tval), 4); | |
6690 | } | |
6691 | break; | |
6692 | ||
6693 | case BFD_RELOC_PPC_VLE_SDAREL_HA16D: | |
6694 | case BFD_RELOC_PPC_VLE_HA16D: | |
6695 | { | |
6696 | int tval = PPC_VLE_HA16D (value); | |
6697 | valueT oldval = md_chars_to_number ( | |
6698 | fixP->fx_frag->fr_literal + fixP->fx_where, 4); | |
6699 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, | |
6700 | (oldval | tval), 4); | |
6701 | } | |
6702 | break; | |
6703 | ||
6704 | case BFD_RELOC_PPC_VLE_SDA21_LO: | |
6705 | { | |
6706 | int tval = PPC_LO (value); | |
6707 | valueT oldval = md_chars_to_number ( | |
6708 | fixP->fx_frag->fr_literal + fixP->fx_where, 4); | |
6709 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, | |
6710 | (oldval | tval), 4); | |
6711 | } | |
6712 | break; | |
6713 | ||
6714 | case BFD_RELOC_PPC_VLE_SDA21: | |
6715 | { | |
6716 | valueT oldval = md_chars_to_number ( | |
6717 | fixP->fx_frag->fr_literal + fixP->fx_where, 4); | |
6718 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, | |
6719 | (oldval | value), 4); | |
6720 | } | |
6721 | break; | |
6722 | ||
c865e45b RS |
6723 | #ifdef OBJ_XCOFF |
6724 | case BFD_RELOC_NONE: | |
6725 | break; | |
6726 | #endif | |
6727 | ||
0baf16f2 | 6728 | #ifdef OBJ_ELF |
0baf16f2 | 6729 | case BFD_RELOC_PPC64_HIGHER: |
94f592af | 6730 | if (fixP->fx_pcrel) |
0baf16f2 | 6731 | abort (); |
94f592af | 6732 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, |
0baf16f2 | 6733 | PPC_HIGHER (value), 2); |
252b5132 RH |
6734 | break; |
6735 | ||
0baf16f2 | 6736 | case BFD_RELOC_PPC64_HIGHER_S: |
94f592af | 6737 | if (fixP->fx_pcrel) |
0baf16f2 | 6738 | abort (); |
94f592af | 6739 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, |
0baf16f2 AM |
6740 | PPC_HIGHERA (value), 2); |
6741 | break; | |
6742 | ||
6743 | case BFD_RELOC_PPC64_HIGHEST: | |
94f592af | 6744 | if (fixP->fx_pcrel) |
0baf16f2 | 6745 | abort (); |
94f592af | 6746 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, |
0baf16f2 AM |
6747 | PPC_HIGHEST (value), 2); |
6748 | break; | |
6749 | ||
6750 | case BFD_RELOC_PPC64_HIGHEST_S: | |
94f592af | 6751 | if (fixP->fx_pcrel) |
0baf16f2 | 6752 | abort (); |
94f592af | 6753 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, |
0baf16f2 AM |
6754 | PPC_HIGHESTA (value), 2); |
6755 | break; | |
6756 | ||
6757 | case BFD_RELOC_PPC64_ADDR16_DS: | |
6758 | case BFD_RELOC_PPC64_ADDR16_LO_DS: | |
6759 | case BFD_RELOC_PPC64_GOT16_DS: | |
6760 | case BFD_RELOC_PPC64_GOT16_LO_DS: | |
6761 | case BFD_RELOC_PPC64_PLT16_LO_DS: | |
6762 | case BFD_RELOC_PPC64_SECTOFF_DS: | |
6763 | case BFD_RELOC_PPC64_SECTOFF_LO_DS: | |
6764 | case BFD_RELOC_PPC64_TOC16_DS: | |
6765 | case BFD_RELOC_PPC64_TOC16_LO_DS: | |
6766 | case BFD_RELOC_PPC64_PLTGOT16_DS: | |
6767 | case BFD_RELOC_PPC64_PLTGOT16_LO_DS: | |
94f592af | 6768 | if (fixP->fx_pcrel) |
0baf16f2 AM |
6769 | abort (); |
6770 | { | |
2132e3a3 | 6771 | char *where = fixP->fx_frag->fr_literal + fixP->fx_where; |
3d8aea2f | 6772 | unsigned long val, mask; |
0baf16f2 AM |
6773 | |
6774 | if (target_big_endian) | |
adadcc0c | 6775 | val = bfd_getb32 (where - 2); |
0baf16f2 | 6776 | else |
adadcc0c AM |
6777 | val = bfd_getl32 (where); |
6778 | mask = 0xfffc; | |
6779 | /* lq insns reserve the four lsbs. */ | |
6780 | if ((ppc_cpu & PPC_OPCODE_POWER4) != 0 | |
77a6138a | 6781 | && (val & (0x3f << 26)) == (56u << 26)) |
adadcc0c AM |
6782 | mask = 0xfff0; |
6783 | val |= value & mask; | |
0baf16f2 AM |
6784 | if (target_big_endian) |
6785 | bfd_putb16 ((bfd_vma) val, where); | |
6786 | else | |
6787 | bfd_putl16 ((bfd_vma) val, where); | |
6788 | } | |
6789 | break; | |
cdba85ec | 6790 | |
ba0b2174 AM |
6791 | case BFD_RELOC_PPC_B16_BRTAKEN: |
6792 | case BFD_RELOC_PPC_B16_BRNTAKEN: | |
6793 | case BFD_RELOC_PPC_BA16_BRTAKEN: | |
6794 | case BFD_RELOC_PPC_BA16_BRNTAKEN: | |
6795 | break; | |
6796 | ||
cdba85ec | 6797 | case BFD_RELOC_PPC_TLS: |
727fc41e AM |
6798 | case BFD_RELOC_PPC_TLSGD: |
6799 | case BFD_RELOC_PPC_TLSLD: | |
7c1d0959 L |
6800 | break; |
6801 | ||
cdba85ec AM |
6802 | case BFD_RELOC_PPC_DTPMOD: |
6803 | case BFD_RELOC_PPC_TPREL16: | |
6804 | case BFD_RELOC_PPC_TPREL16_LO: | |
6805 | case BFD_RELOC_PPC_TPREL16_HI: | |
6806 | case BFD_RELOC_PPC_TPREL16_HA: | |
6807 | case BFD_RELOC_PPC_TPREL: | |
6808 | case BFD_RELOC_PPC_DTPREL16: | |
6809 | case BFD_RELOC_PPC_DTPREL16_LO: | |
6810 | case BFD_RELOC_PPC_DTPREL16_HI: | |
6811 | case BFD_RELOC_PPC_DTPREL16_HA: | |
6812 | case BFD_RELOC_PPC_DTPREL: | |
6813 | case BFD_RELOC_PPC_GOT_TLSGD16: | |
6814 | case BFD_RELOC_PPC_GOT_TLSGD16_LO: | |
6815 | case BFD_RELOC_PPC_GOT_TLSGD16_HI: | |
6816 | case BFD_RELOC_PPC_GOT_TLSGD16_HA: | |
6817 | case BFD_RELOC_PPC_GOT_TLSLD16: | |
6818 | case BFD_RELOC_PPC_GOT_TLSLD16_LO: | |
6819 | case BFD_RELOC_PPC_GOT_TLSLD16_HI: | |
6820 | case BFD_RELOC_PPC_GOT_TLSLD16_HA: | |
6821 | case BFD_RELOC_PPC_GOT_TPREL16: | |
6822 | case BFD_RELOC_PPC_GOT_TPREL16_LO: | |
6823 | case BFD_RELOC_PPC_GOT_TPREL16_HI: | |
6824 | case BFD_RELOC_PPC_GOT_TPREL16_HA: | |
6825 | case BFD_RELOC_PPC_GOT_DTPREL16: | |
6826 | case BFD_RELOC_PPC_GOT_DTPREL16_LO: | |
6827 | case BFD_RELOC_PPC_GOT_DTPREL16_HI: | |
6828 | case BFD_RELOC_PPC_GOT_DTPREL16_HA: | |
6829 | case BFD_RELOC_PPC64_TPREL16_DS: | |
6830 | case BFD_RELOC_PPC64_TPREL16_LO_DS: | |
6831 | case BFD_RELOC_PPC64_TPREL16_HIGHER: | |
6832 | case BFD_RELOC_PPC64_TPREL16_HIGHERA: | |
6833 | case BFD_RELOC_PPC64_TPREL16_HIGHEST: | |
6834 | case BFD_RELOC_PPC64_TPREL16_HIGHESTA: | |
6835 | case BFD_RELOC_PPC64_DTPREL16_DS: | |
6836 | case BFD_RELOC_PPC64_DTPREL16_LO_DS: | |
6837 | case BFD_RELOC_PPC64_DTPREL16_HIGHER: | |
6838 | case BFD_RELOC_PPC64_DTPREL16_HIGHERA: | |
6839 | case BFD_RELOC_PPC64_DTPREL16_HIGHEST: | |
6840 | case BFD_RELOC_PPC64_DTPREL16_HIGHESTA: | |
7c1d0959 | 6841 | S_SET_THREAD_LOCAL (fixP->fx_addsy); |
cdba85ec | 6842 | break; |
0baf16f2 | 6843 | #endif |
252b5132 | 6844 | /* Because SDA21 modifies the register field, the size is set to 4 |
99a814a1 | 6845 | bytes, rather than 2, so offset it here appropriately. */ |
252b5132 | 6846 | case BFD_RELOC_PPC_EMB_SDA21: |
94f592af | 6847 | if (fixP->fx_pcrel) |
252b5132 RH |
6848 | abort (); |
6849 | ||
94f592af | 6850 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where |
252b5132 RH |
6851 | + ((target_big_endian) ? 2 : 0), |
6852 | value, 2); | |
6853 | break; | |
6854 | ||
6855 | case BFD_RELOC_8: | |
94f592af | 6856 | if (fixP->fx_pcrel) |
31a91399 NC |
6857 | { |
6858 | /* This can occur if there is a bug in the input assembler, eg: | |
b7d7dc63 | 6859 | ".byte <undefined_symbol> - ." */ |
31a91399 | 6860 | if (fixP->fx_addsy) |
d6ed37ed | 6861 | as_bad (_("unable to handle reference to symbol %s"), |
31a91399 NC |
6862 | S_GET_NAME (fixP->fx_addsy)); |
6863 | else | |
d6ed37ed | 6864 | as_bad (_("unable to resolve expression")); |
31a91399 NC |
6865 | fixP->fx_done = 1; |
6866 | } | |
6867 | else | |
6868 | md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, | |
6869 | value, 1); | |
252b5132 RH |
6870 | break; |
6871 | ||
6872 | case BFD_RELOC_24_PLT_PCREL: | |
6873 | case BFD_RELOC_PPC_LOCAL24PC: | |
94f592af | 6874 | if (!fixP->fx_pcrel && !fixP->fx_done) |
252b5132 RH |
6875 | abort (); |
6876 | ||
94f592af | 6877 | if (fixP->fx_done) |
99a814a1 AM |
6878 | { |
6879 | char *where; | |
6880 | unsigned long insn; | |
6881 | ||
6882 | /* Fetch the instruction, insert the fully resolved operand | |
6883 | value, and stuff the instruction back again. */ | |
94f592af | 6884 | where = fixP->fx_frag->fr_literal + fixP->fx_where; |
99a814a1 AM |
6885 | if (target_big_endian) |
6886 | insn = bfd_getb32 ((unsigned char *) where); | |
6887 | else | |
6888 | insn = bfd_getl32 ((unsigned char *) where); | |
8fbf7334 JL |
6889 | if (ppc_mach() == bfd_mach_ppc_vle) |
6890 | { | |
6891 | if ((value & 1) != 0) | |
6892 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
6893 | _("branch address must be a multiple of 2")); | |
6894 | } | |
6895 | else | |
6896 | { | |
6897 | if ((value & 3) != 0) | |
6898 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
6899 | _("branch address must be a multiple of 4")); | |
6900 | } | |
99a814a1 AM |
6901 | if ((offsetT) value < -0x40000000 |
6902 | || (offsetT) value >= 0x40000000) | |
94f592af | 6903 | as_bad_where (fixP->fx_file, fixP->fx_line, |
99a814a1 AM |
6904 | _("@local or @plt branch destination is too far away, %ld bytes"), |
6905 | (long) value); | |
6906 | insn = insn | (value & 0x03fffffc); | |
6907 | if (target_big_endian) | |
6908 | bfd_putb32 ((bfd_vma) insn, (unsigned char *) where); | |
6909 | else | |
6910 | bfd_putl32 ((bfd_vma) insn, (unsigned char *) where); | |
6911 | } | |
252b5132 RH |
6912 | break; |
6913 | ||
6914 | case BFD_RELOC_VTABLE_INHERIT: | |
94f592af NC |
6915 | fixP->fx_done = 0; |
6916 | if (fixP->fx_addsy | |
6917 | && !S_IS_DEFINED (fixP->fx_addsy) | |
6918 | && !S_IS_WEAK (fixP->fx_addsy)) | |
6919 | S_SET_WEAK (fixP->fx_addsy); | |
252b5132 RH |
6920 | break; |
6921 | ||
6922 | case BFD_RELOC_VTABLE_ENTRY: | |
94f592af | 6923 | fixP->fx_done = 0; |
252b5132 RH |
6924 | break; |
6925 | ||
0baf16f2 | 6926 | #ifdef OBJ_ELF |
0baf16f2 AM |
6927 | /* Generated by reference to `sym@tocbase'. The sym is |
6928 | ignored by the linker. */ | |
6929 | case BFD_RELOC_PPC64_TOC: | |
94f592af | 6930 | fixP->fx_done = 0; |
0baf16f2 | 6931 | break; |
0baf16f2 | 6932 | #endif |
252b5132 | 6933 | default: |
bc805888 | 6934 | fprintf (stderr, |
94f592af | 6935 | _("Gas failure, reloc value %d\n"), fixP->fx_r_type); |
99a814a1 | 6936 | fflush (stderr); |
252b5132 RH |
6937 | abort (); |
6938 | } | |
6939 | } | |
6940 | ||
6941 | #ifdef OBJ_ELF | |
94f592af | 6942 | fixP->fx_addnumber = value; |
4e6935a6 AM |
6943 | |
6944 | /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately | |
6945 | from the section contents. If we are going to be emitting a reloc | |
6946 | then the section contents are immaterial, so don't warn if they | |
6947 | happen to overflow. Leave such warnings to ld. */ | |
6948 | if (!fixP->fx_done) | |
6949 | fixP->fx_no_overflow = 1; | |
252b5132 | 6950 | #else |
94f592af NC |
6951 | if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16) |
6952 | fixP->fx_addnumber = 0; | |
252b5132 RH |
6953 | else |
6954 | { | |
6955 | #ifdef TE_PE | |
94f592af | 6956 | fixP->fx_addnumber = 0; |
252b5132 | 6957 | #else |
8edcbfcd TG |
6958 | /* We want to use the offset within the toc, not the actual VMA |
6959 | of the symbol. */ | |
94f592af | 6960 | fixP->fx_addnumber = |
8edcbfcd TG |
6961 | - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy)) |
6962 | - S_GET_VALUE (ppc_toc_csect); | |
252b5132 RH |
6963 | #endif |
6964 | } | |
6965 | #endif | |
252b5132 RH |
6966 | } |
6967 | ||
6968 | /* Generate a reloc for a fixup. */ | |
6969 | ||
6970 | arelent * | |
98027b10 | 6971 | tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp) |
252b5132 RH |
6972 | { |
6973 | arelent *reloc; | |
6974 | ||
6975 | reloc = (arelent *) xmalloc (sizeof (arelent)); | |
6976 | ||
49309057 ILT |
6977 | reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); |
6978 | *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); | |
252b5132 RH |
6979 | reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; |
6980 | reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); | |
6981 | if (reloc->howto == (reloc_howto_type *) NULL) | |
6982 | { | |
6983 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
99a814a1 AM |
6984 | _("reloc %d not supported by object file format"), |
6985 | (int) fixp->fx_r_type); | |
252b5132 RH |
6986 | return NULL; |
6987 | } | |
6988 | reloc->addend = fixp->fx_addnumber; | |
6989 | ||
6990 | return reloc; | |
6991 | } | |
75e21f08 JJ |
6992 | |
6993 | void | |
98027b10 | 6994 | ppc_cfi_frame_initial_instructions (void) |
75e21f08 JJ |
6995 | { |
6996 | cfi_add_CFA_def_cfa (1, 0); | |
6997 | } | |
6998 | ||
6999 | int | |
1df69f4f | 7000 | tc_ppc_regname_to_dw2regnum (char *regname) |
75e21f08 JJ |
7001 | { |
7002 | unsigned int regnum = -1; | |
7003 | unsigned int i; | |
7004 | const char *p; | |
7005 | char *q; | |
7006 | static struct { char *name; int dw2regnum; } regnames[] = | |
7007 | { | |
7008 | { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 }, | |
7009 | { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 }, | |
80f846b6 | 7010 | { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 }, |
75e21f08 JJ |
7011 | { "spe_acc", 111 }, { "spefscr", 112 } |
7012 | }; | |
7013 | ||
7014 | for (i = 0; i < ARRAY_SIZE (regnames); ++i) | |
7015 | if (strcmp (regnames[i].name, regname) == 0) | |
7016 | return regnames[i].dw2regnum; | |
7017 | ||
7018 | if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v') | |
7019 | { | |
7020 | p = regname + 1 + (regname[1] == '.'); | |
7021 | regnum = strtoul (p, &q, 10); | |
7022 | if (p == q || *q || regnum >= 32) | |
7023 | return -1; | |
7024 | if (regname[0] == 'f') | |
b7d7dc63 | 7025 | regnum += 32; |
75e21f08 | 7026 | else if (regname[0] == 'v') |
b7d7dc63 | 7027 | regnum += 77; |
75e21f08 JJ |
7028 | } |
7029 | else if (regname[0] == 'c' && regname[1] == 'r') | |
7030 | { | |
7031 | p = regname + 2 + (regname[2] == '.'); | |
7032 | if (p[0] < '0' || p[0] > '7' || p[1]) | |
b7d7dc63 | 7033 | return -1; |
75e21f08 JJ |
7034 | regnum = p[0] - '0' + 68; |
7035 | } | |
7036 | return regnum; | |
7037 | } |