projects / deliverable / binutils-gdb.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
* config/tc-ppc.c (ppc_target_format): Add format for powerpc*-freebsd.
[deliverable/binutils-gdb.git] / gas / config / tc-ppc.c
CommitLineData
252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b7d7dc63 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
cc643b88
NC		 3 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
4 Free Software Foundation, Inc.
252b5132
RH		 5 Written by Ian Lance Taylor, Cygnus Support.
6
7 This file is part of GAS, the GNU Assembler.
8
9 GAS is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
ec2655a6 11 the Free Software Foundation; either version 3, or (at your option)
252b5132
RH		 12 any later version.
13
14 GAS is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC		 21 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
22 02110-1301, USA. */
252b5132 23
252b5132 24#include "as.h"
3882b010 25#include "safe-ctype.h"
252b5132 26#include "subsegs.h"
75e21f08 27#include "dw2gencfi.h"
252b5132
RH		 28#include "opcode/ppc.h"
29
30#ifdef OBJ_ELF
31#include "elf/ppc.h"
5d6f4f16 32#include "dwarf2dbg.h"
252b5132
RH		 33#endif
34
35#ifdef TE_PE
36#include "coff/pe.h"
37#endif
38
85645aed
TG		 39#ifdef OBJ_XCOFF
40#include "coff/xcoff.h"
41#include "libxcoff.h"
42#endif
43
252b5132
RH		 44/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
45
46/* Tell the main code what the endianness is. */
47extern int target_big_endian;
48
49/* Whether or not, we've set target_big_endian. */
50static int set_target_endian = 0;
51
52/* Whether to use user friendly register names. */
53#ifndef TARGET_REG_NAMES_P
54#ifdef TE_PE
b34976b6 55#define TARGET_REG_NAMES_P TRUE
252b5132 56#else
b34976b6 57#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 58#endif
59#endif
60
0baf16f2
AM		 61/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
62 HIGHESTA. */
63
64/* #lo(value) denotes the least significant 16 bits of the indicated. */
65#define PPC_LO(v) ((v) & 0xffff)
66
67/* #hi(value) denotes bits 16 through 31 of the indicated value. */
68#define PPC_HI(v) (((v) >> 16) & 0xffff)
69
70/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
71 the indicated value, compensating for #lo() being treated as a
72 signed number. */
15c1449b 73#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 74
75/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 76#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 77
78/* #highera(value) denotes bits 32 through 47 of the indicated value,
79 compensating for #lo() being treated as a signed number. */
15c1449b 80#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 81
82/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 83#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 84
85/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 86 compensating for #lo being treated as a signed number. */
87#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM		 88
89#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
90
b34976b6 91static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 92
98027b10
AM		 93static void ppc_macro (char *, const struct powerpc_macro *);
94static void ppc_byte (int);
0baf16f2
AM		 95
96#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
98027b10
AM		 97static void ppc_tc (int);
98static void ppc_machine (int);
0baf16f2 99#endif
252b5132
RH		 100
101#ifdef OBJ_XCOFF
98027b10
AM		 102static void ppc_comm (int);
103static void ppc_bb (int);
104static void ppc_bc (int);
105static void ppc_bf (int);
106static void ppc_biei (int);
107static void ppc_bs (int);
108static void ppc_eb (int);
109static void ppc_ec (int);
110static void ppc_ef (int);
111static void ppc_es (int);
112static void ppc_csect (int);
85645aed 113static void ppc_dwsect (int);
98027b10
AM		 114static void ppc_change_csect (symbolS *, offsetT);
115static void ppc_function (int);
116static void ppc_extern (int);
117static void ppc_lglobl (int);
c865e45b 118static void ppc_ref (int);
98027b10
AM		 119static void ppc_section (int);
120static void ppc_named_section (int);
121static void ppc_stabx (int);
122static void ppc_rename (int);
123static void ppc_toc (int);
124static void ppc_xcoff_cons (int);
125static void ppc_vbyte (int);
252b5132
RH		 126#endif
127
128#ifdef OBJ_ELF
98027b10
AM		 129static void ppc_elf_cons (int);
130static void ppc_elf_rdata (int);
131static void ppc_elf_lcomm (int);
252b5132
RH		 132#endif
133
134#ifdef TE_PE
98027b10
AM		 135static void ppc_previous (int);
136static void ppc_pdata (int);
137static void ppc_ydata (int);
138static void ppc_reldata (int);
139static void ppc_rdata (int);
140static void ppc_ualong (int);
141static void ppc_znop (int);
142static void ppc_pe_comm (int);
143static void ppc_pe_section (int);
144static void ppc_pe_function (int);
145static void ppc_pe_tocd (int);
252b5132
RH		 146#endif
147\f
148/* Generic assembler global variables which must be defined by all
149 targets. */
150
151#ifdef OBJ_ELF
152/* This string holds the chars that always start a comment. If the
153 pre-processor is disabled, these aren't very useful. The macro
154 tc_comment_chars points to this. We use this, rather than the
155 usual comment_chars, so that we can switch for Solaris conventions. */
156static const char ppc_solaris_comment_chars[] = "#!";
157static const char ppc_eabi_comment_chars[] = "#";
158
159#ifdef TARGET_SOLARIS_COMMENT
160const char *ppc_comment_chars = ppc_solaris_comment_chars;
161#else
162const char *ppc_comment_chars = ppc_eabi_comment_chars;
163#endif
164#else
165const char comment_chars[] = "#";
166#endif
167
168/* Characters which start a comment at the beginning of a line. */
169const char line_comment_chars[] = "#";
170
171/* Characters which may be used to separate multiple commands on a
172 single line. */
173const char line_separator_chars[] = ";";
174
175/* Characters which are used to indicate an exponent in a floating
176 point number. */
177const char EXP_CHARS[] = "eE";
178
179/* Characters which mean that a number is a floating point constant,
180 as in 0d1.0. */
181const char FLT_CHARS[] = "dD";
5ce8663f 182
5e02f92e 183/* Anything that can start an operand needs to be mentioned here,
ac805826 184 to stop the input scrubber eating whitespace. */
5e02f92e 185const char ppc_symbol_chars[] = "%[";
75e21f08
JJ		 186
187/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
188int ppc_cie_data_alignment;
783de163 189
cef4f754
AM		 190/* More than this number of nops in an alignment op gets a branch
191 instead. */
192unsigned long nop_limit = 4;
193
783de163
AM		 194/* The type of processor we are assembling for. This is one or more
195 of the PPC_OPCODE flags defined in opcode/ppc.h. */
fa452fa6 196ppc_cpu_t ppc_cpu = 0;
01efc3af
AM		 197
198/* Flags set on encountering toc relocs. */
199enum {
200 has_large_toc_reloc = 1,
201 has_small_toc_reloc = 2
202} toc_reloc_types;
252b5132
RH		 203\f
204/* The target specific pseudo-ops which we support. */
205
206const pseudo_typeS md_pseudo_table[] =
207{
208 /* Pseudo-ops which must be overridden. */
209 { "byte", ppc_byte, 0 },
210
211#ifdef OBJ_XCOFF
212 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
213 legitimately belong in the obj-*.c file. However, XCOFF is based
214 on COFF, and is only implemented for the RS/6000. We just use
215 obj-coff.c, and add what we need here. */
216 { "comm", ppc_comm, 0 },
217 { "lcomm", ppc_comm, 1 },
218 { "bb", ppc_bb, 0 },
219 { "bc", ppc_bc, 0 },
220 { "bf", ppc_bf, 0 },
221 { "bi", ppc_biei, 0 },
222 { "bs", ppc_bs, 0 },
223 { "csect", ppc_csect, 0 },
85645aed 224 { "dwsect", ppc_dwsect, 0 },
252b5132
RH		 225 { "data", ppc_section, 'd' },
226 { "eb", ppc_eb, 0 },
227 { "ec", ppc_ec, 0 },
228 { "ef", ppc_ef, 0 },
229 { "ei", ppc_biei, 1 },
230 { "es", ppc_es, 0 },
231 { "extern", ppc_extern, 0 },
232 { "function", ppc_function, 0 },
233 { "lglobl", ppc_lglobl, 0 },
c865e45b 234 { "ref", ppc_ref, 0 },
252b5132
RH		 235 { "rename", ppc_rename, 0 },
236 { "section", ppc_named_section, 0 },
237 { "stabx", ppc_stabx, 0 },
238 { "text", ppc_section, 't' },
239 { "toc", ppc_toc, 0 },
240 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 241 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 242 { "word", ppc_xcoff_cons, 1 },
243 { "short", ppc_xcoff_cons, 1 },
244 { "vbyte", ppc_vbyte, 0 },
245#endif
246
247#ifdef OBJ_ELF
0baf16f2
AM		 248 { "llong", ppc_elf_cons, 8 },
249 { "quad", ppc_elf_cons, 8 },
252b5132
RH		 250 { "long", ppc_elf_cons, 4 },
251 { "word", ppc_elf_cons, 2 },
252 { "short", ppc_elf_cons, 2 },
253 { "rdata", ppc_elf_rdata, 0 },
254 { "rodata", ppc_elf_rdata, 0 },
255 { "lcomm", ppc_elf_lcomm, 0 },
256#endif
257
258#ifdef TE_PE
99a814a1 259 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 260 { "previous", ppc_previous, 0 },
261 { "pdata", ppc_pdata, 0 },
262 { "ydata", ppc_ydata, 0 },
263 { "reldata", ppc_reldata, 0 },
264 { "rdata", ppc_rdata, 0 },
265 { "ualong", ppc_ualong, 0 },
266 { "znop", ppc_znop, 0 },
267 { "comm", ppc_pe_comm, 0 },
268 { "lcomm", ppc_pe_comm, 1 },
269 { "section", ppc_pe_section, 0 },
270 { "function", ppc_pe_function,0 },
271 { "tocd", ppc_pe_tocd, 0 },
272#endif
273
0baf16f2 274#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 275 { "tc", ppc_tc, 0 },
0baf16f2
AM		 276 { "machine", ppc_machine, 0 },
277#endif
252b5132
RH		 278
279 { NULL, NULL, 0 }
280};
281
282\f
99a814a1
AM		 283/* Predefined register names if -mregnames (or default for Windows NT).
284 In general, there are lots of them, in an attempt to be compatible
285 with a number of other Windows NT assemblers. */
252b5132
RH		 286
287/* Structure to hold information about predefined registers. */
288struct pd_reg
289 {
290 char *name;
291 int value;
292 };
293
294/* List of registers that are pre-defined:
295
296 Each general register has predefined names of the form:
297 1. r<reg_num> which has the value <reg_num>.
298 2. r.<reg_num> which has the value <reg_num>.
299
252b5132
RH		 300 Each floating point register has predefined names of the form:
301 1. f<reg_num> which has the value <reg_num>.
302 2. f.<reg_num> which has the value <reg_num>.
303
7a899fff
C		 304 Each vector unit register has predefined names of the form:
305 1. v<reg_num> which has the value <reg_num>.
306 2. v.<reg_num> which has the value <reg_num>.
307
252b5132
RH		 308 Each condition register has predefined names of the form:
309 1. cr<reg_num> which has the value <reg_num>.
310 2. cr.<reg_num> which has the value <reg_num>.
311
312 There are individual registers as well:
313 sp or r.sp has the value 1
314 rtoc or r.toc has the value 2
315 fpscr has the value 0
316 xer has the value 1
317 lr has the value 8
318 ctr has the value 9
319 pmr has the value 0
320 dar has the value 19
321 dsisr has the value 18
322 dec has the value 22
323 sdr1 has the value 25
324 srr0 has the value 26
325 srr1 has the value 27
326
81d4177b 327 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 328
329static const struct pd_reg pre_defined_registers[] =
330{
331 { "cr.0", 0 }, /* Condition Registers */
332 { "cr.1", 1 },
333 { "cr.2", 2 },
334 { "cr.3", 3 },
335 { "cr.4", 4 },
336 { "cr.5", 5 },
337 { "cr.6", 6 },
338 { "cr.7", 7 },
339
340 { "cr0", 0 },
341 { "cr1", 1 },
342 { "cr2", 2 },
343 { "cr3", 3 },
344 { "cr4", 4 },
345 { "cr5", 5 },
346 { "cr6", 6 },
347 { "cr7", 7 },
348
349 { "ctr", 9 },
350
351 { "dar", 19 }, /* Data Access Register */
352 { "dec", 22 }, /* Decrementer */
353 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
354
355 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 356 { "f.1", 1 },
357 { "f.10", 10 },
358 { "f.11", 11 },
359 { "f.12", 12 },
360 { "f.13", 13 },
361 { "f.14", 14 },
362 { "f.15", 15 },
363 { "f.16", 16 },
364 { "f.17", 17 },
365 { "f.18", 18 },
366 { "f.19", 19 },
367 { "f.2", 2 },
368 { "f.20", 20 },
369 { "f.21", 21 },
370 { "f.22", 22 },
371 { "f.23", 23 },
372 { "f.24", 24 },
373 { "f.25", 25 },
374 { "f.26", 26 },
375 { "f.27", 27 },
376 { "f.28", 28 },
377 { "f.29", 29 },
378 { "f.3", 3 },
252b5132
RH		 379 { "f.30", 30 },
380 { "f.31", 31 },
066be9f7
PB		 381
382 { "f.32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
383 { "f.33", 33 },
384 { "f.34", 34 },
385 { "f.35", 35 },
386 { "f.36", 36 },
387 { "f.37", 37 },
388 { "f.38", 38 },
389 { "f.39", 39 },
81d4177b 390 { "f.4", 4 },
066be9f7
PB		 391 { "f.40", 40 },
392 { "f.41", 41 },
393 { "f.42", 42 },
394 { "f.43", 43 },
395 { "f.44", 44 },
396 { "f.45", 45 },
397 { "f.46", 46 },
398 { "f.47", 47 },
399 { "f.48", 48 },
400 { "f.49", 49 },
81d4177b 401 { "f.5", 5 },
066be9f7
PB		 402 { "f.50", 50 },
403 { "f.51", 51 },
404 { "f.52", 52 },
405 { "f.53", 53 },
406 { "f.54", 54 },
407 { "f.55", 55 },
408 { "f.56", 56 },
409 { "f.57", 57 },
410 { "f.58", 58 },
411 { "f.59", 59 },
81d4177b 412 { "f.6", 6 },
066be9f7
PB		 413 { "f.60", 60 },
414 { "f.61", 61 },
415 { "f.62", 62 },
416 { "f.63", 63 },
81d4177b
KH		 417 { "f.7", 7 },
418 { "f.8", 8 },
419 { "f.9", 9 },
420
421 { "f0", 0 },
422 { "f1", 1 },
423 { "f10", 10 },
424 { "f11", 11 },
425 { "f12", 12 },
426 { "f13", 13 },
427 { "f14", 14 },
428 { "f15", 15 },
429 { "f16", 16 },
430 { "f17", 17 },
431 { "f18", 18 },
432 { "f19", 19 },
433 { "f2", 2 },
434 { "f20", 20 },
435 { "f21", 21 },
436 { "f22", 22 },
437 { "f23", 23 },
438 { "f24", 24 },
439 { "f25", 25 },
440 { "f26", 26 },
441 { "f27", 27 },
442 { "f28", 28 },
443 { "f29", 29 },
444 { "f3", 3 },
252b5132
RH		 445 { "f30", 30 },
446 { "f31", 31 },
066be9f7
PB		 447
448 { "f32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
449 { "f33", 33 },
450 { "f34", 34 },
451 { "f35", 35 },
452 { "f36", 36 },
453 { "f37", 37 },
454 { "f38", 38 },
455 { "f39", 39 },
81d4177b 456 { "f4", 4 },
066be9f7
PB		 457 { "f40", 40 },
458 { "f41", 41 },
459 { "f42", 42 },
460 { "f43", 43 },
461 { "f44", 44 },
462 { "f45", 45 },
463 { "f46", 46 },
464 { "f47", 47 },
465 { "f48", 48 },
466 { "f49", 49 },
81d4177b 467 { "f5", 5 },
066be9f7
PB		 468 { "f50", 50 },
469 { "f51", 51 },
470 { "f52", 52 },
471 { "f53", 53 },
472 { "f54", 54 },
473 { "f55", 55 },
474 { "f56", 56 },
475 { "f57", 57 },
476 { "f58", 58 },
477 { "f59", 59 },
81d4177b 478 { "f6", 6 },
066be9f7
PB		 479 { "f60", 60 },
480 { "f61", 61 },
481 { "f62", 62 },
482 { "f63", 63 },
81d4177b
KH		 483 { "f7", 7 },
484 { "f8", 8 },
485 { "f9", 9 },
252b5132
RH		 486
487 { "fpscr", 0 },
488
c3d65c1c
BE		 489 /* Quantization registers used with pair single instructions. */
490 { "gqr.0", 0 },
491 { "gqr.1", 1 },
492 { "gqr.2", 2 },
493 { "gqr.3", 3 },
494 { "gqr.4", 4 },
495 { "gqr.5", 5 },
496 { "gqr.6", 6 },
497 { "gqr.7", 7 },
498 { "gqr0", 0 },
499 { "gqr1", 1 },
500 { "gqr2", 2 },
501 { "gqr3", 3 },
502 { "gqr4", 4 },
503 { "gqr5", 5 },
504 { "gqr6", 6 },
505 { "gqr7", 7 },
506
252b5132
RH		 507 { "lr", 8 }, /* Link Register */
508
509 { "pmr", 0 },
510
511 { "r.0", 0 }, /* General Purpose Registers */
512 { "r.1", 1 },
513 { "r.10", 10 },
514 { "r.11", 11 },
515 { "r.12", 12 },
516 { "r.13", 13 },
517 { "r.14", 14 },
518 { "r.15", 15 },
519 { "r.16", 16 },
520 { "r.17", 17 },
521 { "r.18", 18 },
522 { "r.19", 19 },
523 { "r.2", 2 },
524 { "r.20", 20 },
525 { "r.21", 21 },
526 { "r.22", 22 },
527 { "r.23", 23 },
528 { "r.24", 24 },
529 { "r.25", 25 },
530 { "r.26", 26 },
531 { "r.27", 27 },
532 { "r.28", 28 },
533 { "r.29", 29 },
534 { "r.3", 3 },
535 { "r.30", 30 },
536 { "r.31", 31 },
537 { "r.4", 4 },
538 { "r.5", 5 },
539 { "r.6", 6 },
540 { "r.7", 7 },
541 { "r.8", 8 },
542 { "r.9", 9 },
543
544 { "r.sp", 1 }, /* Stack Pointer */
545
546 { "r.toc", 2 }, /* Pointer to the table of contents */
547
548 { "r0", 0 }, /* More general purpose registers */
549 { "r1", 1 },
550 { "r10", 10 },
551 { "r11", 11 },
552 { "r12", 12 },
553 { "r13", 13 },
554 { "r14", 14 },
555 { "r15", 15 },
556 { "r16", 16 },
557 { "r17", 17 },
558 { "r18", 18 },
559 { "r19", 19 },
560 { "r2", 2 },
561 { "r20", 20 },
562 { "r21", 21 },
563 { "r22", 22 },
564 { "r23", 23 },
565 { "r24", 24 },
566 { "r25", 25 },
567 { "r26", 26 },
568 { "r27", 27 },
569 { "r28", 28 },
570 { "r29", 29 },
571 { "r3", 3 },
572 { "r30", 30 },
573 { "r31", 31 },
574 { "r4", 4 },
575 { "r5", 5 },
576 { "r6", 6 },
577 { "r7", 7 },
578 { "r8", 8 },
579 { "r9", 9 },
580
581 { "rtoc", 2 }, /* Table of contents */
582
583 { "sdr1", 25 }, /* Storage Description Register 1 */
584
585 { "sp", 1 },
586
587 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
588 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 589
066be9f7 590 { "v.0", 0 }, /* Vector (Altivec/VMX) registers */
81d4177b
KH		 591 { "v.1", 1 },
592 { "v.10", 10 },
593 { "v.11", 11 },
594 { "v.12", 12 },
595 { "v.13", 13 },
596 { "v.14", 14 },
597 { "v.15", 15 },
598 { "v.16", 16 },
599 { "v.17", 17 },
600 { "v.18", 18 },
601 { "v.19", 19 },
602 { "v.2", 2 },
603 { "v.20", 20 },
604 { "v.21", 21 },
605 { "v.22", 22 },
606 { "v.23", 23 },
607 { "v.24", 24 },
608 { "v.25", 25 },
609 { "v.26", 26 },
610 { "v.27", 27 },
611 { "v.28", 28 },
612 { "v.29", 29 },
613 { "v.3", 3 },
7a899fff
C		 614 { "v.30", 30 },
615 { "v.31", 31 },
81d4177b
KH		 616 { "v.4", 4 },
617 { "v.5", 5 },
618 { "v.6", 6 },
619 { "v.7", 7 },
620 { "v.8", 8 },
621 { "v.9", 9 },
7a899fff
C		 622
623 { "v0", 0 },
81d4177b
KH		 624 { "v1", 1 },
625 { "v10", 10 },
626 { "v11", 11 },
627 { "v12", 12 },
628 { "v13", 13 },
629 { "v14", 14 },
630 { "v15", 15 },
631 { "v16", 16 },
632 { "v17", 17 },
633 { "v18", 18 },
634 { "v19", 19 },
635 { "v2", 2 },
636 { "v20", 20 },
637 { "v21", 21 },
638 { "v22", 22 },
639 { "v23", 23 },
640 { "v24", 24 },
641 { "v25", 25 },
642 { "v26", 26 },
643 { "v27", 27 },
644 { "v28", 28 },
645 { "v29", 29 },
646 { "v3", 3 },
7a899fff
C		 647 { "v30", 30 },
648 { "v31", 31 },
81d4177b
KH		 649 { "v4", 4 },
650 { "v5", 5 },
651 { "v6", 6 },
652 { "v7", 7 },
653 { "v8", 8 },
7a899fff 654 { "v9", 9 },
252b5132 655
066be9f7
PB		 656 { "vs.0", 0 }, /* Vector Scalar (VSX) registers (ISA 2.06). */
657 { "vs.1", 1 },
658 { "vs.10", 10 },
659 { "vs.11", 11 },
660 { "vs.12", 12 },
661 { "vs.13", 13 },
662 { "vs.14", 14 },
663 { "vs.15", 15 },
664 { "vs.16", 16 },
665 { "vs.17", 17 },
666 { "vs.18", 18 },
667 { "vs.19", 19 },
668 { "vs.2", 2 },
669 { "vs.20", 20 },
670 { "vs.21", 21 },
671 { "vs.22", 22 },
672 { "vs.23", 23 },
673 { "vs.24", 24 },
674 { "vs.25", 25 },
675 { "vs.26", 26 },
676 { "vs.27", 27 },
677 { "vs.28", 28 },
678 { "vs.29", 29 },
679 { "vs.3", 3 },
680 { "vs.30", 30 },
681 { "vs.31", 31 },
682 { "vs.32", 32 },
683 { "vs.33", 33 },
684 { "vs.34", 34 },
685 { "vs.35", 35 },
686 { "vs.36", 36 },
687 { "vs.37", 37 },
688 { "vs.38", 38 },
689 { "vs.39", 39 },
690 { "vs.4", 4 },
691 { "vs.40", 40 },
692 { "vs.41", 41 },
693 { "vs.42", 42 },
694 { "vs.43", 43 },
695 { "vs.44", 44 },
696 { "vs.45", 45 },
697 { "vs.46", 46 },
698 { "vs.47", 47 },
699 { "vs.48", 48 },
700 { "vs.49", 49 },
701 { "vs.5", 5 },
702 { "vs.50", 50 },
703 { "vs.51", 51 },
704 { "vs.52", 52 },
705 { "vs.53", 53 },
706 { "vs.54", 54 },
707 { "vs.55", 55 },
708 { "vs.56", 56 },
709 { "vs.57", 57 },
710 { "vs.58", 58 },
711 { "vs.59", 59 },
712 { "vs.6", 6 },
713 { "vs.60", 60 },
714 { "vs.61", 61 },
715 { "vs.62", 62 },
716 { "vs.63", 63 },
717 { "vs.7", 7 },
718 { "vs.8", 8 },
719 { "vs.9", 9 },
720
721 { "vs0", 0 },
722 { "vs1", 1 },
723 { "vs10", 10 },
724 { "vs11", 11 },
725 { "vs12", 12 },
726 { "vs13", 13 },
727 { "vs14", 14 },
728 { "vs15", 15 },
729 { "vs16", 16 },
730 { "vs17", 17 },
731 { "vs18", 18 },
732 { "vs19", 19 },
733 { "vs2", 2 },
734 { "vs20", 20 },
735 { "vs21", 21 },
736 { "vs22", 22 },
737 { "vs23", 23 },
738 { "vs24", 24 },
739 { "vs25", 25 },
740 { "vs26", 26 },
741 { "vs27", 27 },
742 { "vs28", 28 },
743 { "vs29", 29 },
744 { "vs3", 3 },
745 { "vs30", 30 },
746 { "vs31", 31 },
747 { "vs32", 32 },
748 { "vs33", 33 },
749 { "vs34", 34 },
750 { "vs35", 35 },
751 { "vs36", 36 },
752 { "vs37", 37 },
753 { "vs38", 38 },
754 { "vs39", 39 },
755 { "vs4", 4 },
756 { "vs40", 40 },
757 { "vs41", 41 },
758 { "vs42", 42 },
759 { "vs43", 43 },
760 { "vs44", 44 },
761 { "vs45", 45 },
762 { "vs46", 46 },
763 { "vs47", 47 },
764 { "vs48", 48 },
765 { "vs49", 49 },
766 { "vs5", 5 },
767 { "vs50", 50 },
768 { "vs51", 51 },
769 { "vs52", 52 },
770 { "vs53", 53 },
771 { "vs54", 54 },
772 { "vs55", 55 },
773 { "vs56", 56 },
774 { "vs57", 57 },
775 { "vs58", 58 },
776 { "vs59", 59 },
777 { "vs6", 6 },
778 { "vs60", 60 },
779 { "vs61", 61 },
780 { "vs62", 62 },
781 { "vs63", 63 },
782 { "vs7", 7 },
783 { "vs8", 8 },
784 { "vs9", 9 },
785
252b5132
RH		 786 { "xer", 1 },
787
788};
789
bc805888 790#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 791
792/* Given NAME, find the register number associated with that name, return
793 the integer value associated with the given name or -1 on failure. */
794
252b5132 795static int
98027b10 796reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
252b5132
RH		 797{
798 int middle, low, high;
799 int cmp;
800
801 low = 0;
802 high = regcount - 1;
803
804 do
805 {
806 middle = (low + high) / 2;
807 cmp = strcasecmp (name, regs[middle].name);
808 if (cmp < 0)
809 high = middle - 1;
810 else if (cmp > 0)
811 low = middle + 1;
812 else
813 return regs[middle].value;
814 }
815 while (low <= high);
816
817 return -1;
818}
819
820/*
99a814a1 821 * Summary of register_name.
252b5132
RH		 822 *
823 * in: Input_line_pointer points to 1st char of operand.
824 *
825 * out: A expressionS.
826 * The operand may have been a register: in this case, X_op == O_register,
827 * X_add_number is set to the register number, and truth is returned.
828 * Input_line_pointer->(next non-blank) char after operand, or is in its
829 * original state.
830 */
831
b34976b6 832static bfd_boolean
98027b10 833register_name (expressionS *expressionP)
252b5132
RH		 834{
835 int reg_number;
836 char *name;
837 char *start;
838 char c;
839
99a814a1 840 /* Find the spelling of the operand. */
252b5132 841 start = name = input_line_pointer;
3882b010 842 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 843 name = ++input_line_pointer;
844
3882b010 845 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 846 return FALSE;
252b5132
RH		 847
848 c = get_symbol_end ();
849 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
850
468cced8
AM		 851 /* Put back the delimiting char. */
852 *input_line_pointer = c;
853
99a814a1 854 /* Look to see if it's in the register table. */
81d4177b 855 if (reg_number >= 0)
252b5132
RH		 856 {
857 expressionP->X_op = O_register;
858 expressionP->X_add_number = reg_number;
81d4177b 859
99a814a1 860 /* Make the rest nice. */
252b5132
RH		 861 expressionP->X_add_symbol = NULL;
862 expressionP->X_op_symbol = NULL;
b34976b6 863 return TRUE;
252b5132 864 }
468cced8
AM		 865
866 /* Reset the line as if we had not done anything. */
867 input_line_pointer = start;
b34976b6 868 return FALSE;
252b5132
RH		 869}
870\f
871/* This function is called for each symbol seen in an expression. It
872 handles the special parsing which PowerPC assemblers are supposed
873 to use for condition codes. */
874
875/* Whether to do the special parsing. */
b34976b6 876static bfd_boolean cr_operand;
252b5132
RH		 877
878/* Names to recognize in a condition code. This table is sorted. */
879static const struct pd_reg cr_names[] =
880{
881 { "cr0", 0 },
882 { "cr1", 1 },
883 { "cr2", 2 },
884 { "cr3", 3 },
885 { "cr4", 4 },
886 { "cr5", 5 },
887 { "cr6", 6 },
888 { "cr7", 7 },
889 { "eq", 2 },
890 { "gt", 1 },
891 { "lt", 0 },
892 { "so", 3 },
893 { "un", 3 }
894};
895
896/* Parsing function. This returns non-zero if it recognized an
897 expression. */
898
899int
91d6fa6a 900ppc_parse_name (const char *name, expressionS *exp)
252b5132
RH		 901{
902 int val;
903
904 if (! cr_operand)
905 return 0;
906
13abbae3
AM		 907 if (*name == '%')
908 ++name;
252b5132
RH		 909 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
910 name);
911 if (val < 0)
912 return 0;
913
91d6fa6a
NC		 914 exp->X_op = O_constant;
915 exp->X_add_number = val;
252b5132
RH		 916
917 return 1;
918}
919\f
920/* Local variables. */
921
2b3c4602
AM		 922/* Whether to target xcoff64/elf64. */
923static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 924
252b5132
RH		 925/* Opcode hash table. */
926static struct hash_control *ppc_hash;
927
928/* Macro hash table. */
929static struct hash_control *ppc_macro_hash;
930
931#ifdef OBJ_ELF
99a814a1 932/* What type of shared library support to use. */
5d6f4f16 933static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 934
99a814a1 935/* Flags to set in the elf header. */
252b5132
RH		 936static flagword ppc_flags = 0;
937
938/* Whether this is Solaris or not. */
939#ifdef TARGET_SOLARIS_COMMENT
b34976b6 940#define SOLARIS_P TRUE
252b5132 941#else
b34976b6 942#define SOLARIS_P FALSE
252b5132
RH		 943#endif
944
b34976b6 945static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 946#endif
947
948#ifdef OBJ_XCOFF
949
950/* The RS/6000 assembler uses the .csect pseudo-op to generate code
951 using a bunch of different sections. These assembler sections,
952 however, are all encompassed within the .text or .data sections of
953 the final output file. We handle this by using different
954 subsegments within these main segments. */
955
956/* Next subsegment to allocate within the .text segment. */
957static subsegT ppc_text_subsegment = 2;
958
959/* Linked list of csects in the text section. */
960static symbolS *ppc_text_csects;
961
962/* Next subsegment to allocate within the .data segment. */
963static subsegT ppc_data_subsegment = 2;
964
965/* Linked list of csects in the data section. */
966static symbolS *ppc_data_csects;
967
968/* The current csect. */
969static symbolS *ppc_current_csect;
970
971/* The RS/6000 assembler uses a TOC which holds addresses of functions
972 and variables. Symbols are put in the TOC with the .tc pseudo-op.
973 A special relocation is used when accessing TOC entries. We handle
974 the TOC as a subsegment within the .data segment. We set it up if
975 we see a .toc pseudo-op, and save the csect symbol here. */
976static symbolS *ppc_toc_csect;
977
978/* The first frag in the TOC subsegment. */
979static fragS *ppc_toc_frag;
980
981/* The first frag in the first subsegment after the TOC in the .data
982 segment. NULL if there are no subsegments after the TOC. */
983static fragS *ppc_after_toc_frag;
984
985/* The current static block. */
986static symbolS *ppc_current_block;
987
988/* The COFF debugging section; set by md_begin. This is not the
989 .debug section, but is instead the secret BFD section which will
990 cause BFD to set the section number of a symbol to N_DEBUG. */
991static asection *ppc_coff_debug_section;
992
85645aed
TG		 993/* Structure to set the length field of the dwarf sections. */
994struct dw_subsection {
995 /* Subsections are simply linked. */
996 struct dw_subsection *link;
997
998 /* The subsection number. */
999 subsegT subseg;
1000
1001 /* Expression to compute the length of the section. */
1002 expressionS end_exp;
1003};
1004
1005static struct dw_section {
1006 /* Corresponding section. */
1007 segT sect;
1008
1009 /* Simply linked list of subsections with a label. */
1010 struct dw_subsection *list_subseg;
1011
1012 /* The anonymous subsection. */
1013 struct dw_subsection *anon_subseg;
1014} dw_sections[XCOFF_DWSECT_NBR_NAMES];
252b5132
RH		 1015#endif /* OBJ_XCOFF */
1016
1017#ifdef TE_PE
1018
1019/* Various sections that we need for PE coff support. */
1020static segT ydata_section;
1021static segT pdata_section;
1022static segT reldata_section;
1023static segT rdata_section;
1024static segT tocdata_section;
1025
81d4177b 1026/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 1027static segT ppc_previous_section;
1028static segT ppc_current_section;
1029
1030#endif /* TE_PE */
1031
1032#ifdef OBJ_ELF
1033symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 1034#define PPC_APUINFO_ISEL 0x40
1035#define PPC_APUINFO_PMR 0x41
1036#define PPC_APUINFO_RFMCI 0x42
1037#define PPC_APUINFO_CACHELCK 0x43
1038#define PPC_APUINFO_SPE 0x100
1039#define PPC_APUINFO_EFS 0x101
1040#define PPC_APUINFO_BRLOCK 0x102
1041
b34976b6
AM		 1042/*
1043 * We keep a list of APUinfo
6a0c61b7
EZ		 1044 */
1045unsigned long *ppc_apuinfo_list;
1046unsigned int ppc_apuinfo_num;
1047unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 1048#endif /* OBJ_ELF */
1049\f
1050#ifdef OBJ_ELF
15c1449b 1051const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 1052#else
15c1449b 1053const char *const md_shortopts = "um:";
252b5132 1054#endif
cef4f754 1055#define OPTION_NOPS (OPTION_MD_BASE + 0)
15c1449b 1056const struct option md_longopts[] = {
cef4f754 1057 {"nops", required_argument, NULL, OPTION_NOPS},
252b5132
RH		 1058 {NULL, no_argument, NULL, 0}
1059};
15c1449b 1060const size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH		 1061
1062int
98027b10 1063md_parse_option (int c, char *arg)
252b5132 1064{
69fe9ce5
AM		 1065 ppc_cpu_t new_cpu;
1066
252b5132
RH		 1067 switch (c)
1068 {
1069 case 'u':
1070 /* -u means that any undefined symbols should be treated as
1071 external, which is the default for gas anyhow. */
1072 break;
1073
1074#ifdef OBJ_ELF
1075 case 'l':
1076 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 1077 sake, recognize -be also. */
252b5132
RH		 1078 if (strcmp (arg, "e") == 0)
1079 {
1080 target_big_endian = 0;
1081 set_target_endian = 1;
1082 }
1083 else
1084 return 0;
1085
1086 break;
1087
1088 case 'b':
1089 if (strcmp (arg, "e") == 0)
1090 {
1091 target_big_endian = 1;
1092 set_target_endian = 1;
1093 }
1094 else
1095 return 0;
1096
1097 break;
1098
1099 case 'K':
99a814a1 1100 /* Recognize -K PIC. */
252b5132
RH		 1101 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
1102 {
1103 shlib = SHLIB_PIC;
1104 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1105 }
1106 else
1107 return 0;
1108
1109 break;
1110#endif
1111
7f6d05e8
CP		 1112 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1113 case 'a':
1114 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 1115 {
1116#ifdef BFD64
1117 ppc_obj64 = 1;
1118#else
1119 as_fatal (_("%s unsupported"), "-a64");
1120#endif
1121 }
7f6d05e8 1122 else if (strcmp (arg, "32") == 0)
2b3c4602 1123 ppc_obj64 = 0;
7f6d05e8
CP		 1124 else
1125 return 0;
1126 break;
81d4177b 1127
252b5132 1128 case 'm':
69fe9ce5
AM		 1129 if ((new_cpu = ppc_parse_cpu (ppc_cpu, arg)) != 0)
1130 ppc_cpu = new_cpu;
252b5132
RH		 1131
1132 else if (strcmp (arg, "regnames") == 0)
b34976b6 1133 reg_names_p = TRUE;
252b5132
RH		 1134
1135 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 1136 reg_names_p = FALSE;
252b5132
RH		 1137
1138#ifdef OBJ_ELF
99a814a1
AM		 1139 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1140 that require relocation. */
252b5132
RH		 1141 else if (strcmp (arg, "relocatable") == 0)
1142 {
5d6f4f16 1143 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1144 ppc_flags |= EF_PPC_RELOCATABLE;
1145 }
1146
1147 else if (strcmp (arg, "relocatable-lib") == 0)
1148 {
5d6f4f16 1149 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1150 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1151 }
1152
99a814a1 1153 /* -memb, set embedded bit. */
252b5132
RH		 1154 else if (strcmp (arg, "emb") == 0)
1155 ppc_flags |= EF_PPC_EMB;
1156
cc643b88 1157 /* -mlittle/-mbig set the endianness. */
99a814a1
AM		 1158 else if (strcmp (arg, "little") == 0
1159 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1160 {
1161 target_big_endian = 0;
1162 set_target_endian = 1;
1163 }
1164
1165 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1166 {
1167 target_big_endian = 1;
1168 set_target_endian = 1;
1169 }
1170
1171 else if (strcmp (arg, "solaris") == 0)
1172 {
b34976b6 1173 msolaris = TRUE;
252b5132
RH		 1174 ppc_comment_chars = ppc_solaris_comment_chars;
1175 }
1176
1177 else if (strcmp (arg, "no-solaris") == 0)
1178 {
b34976b6 1179 msolaris = FALSE;
252b5132
RH		 1180 ppc_comment_chars = ppc_eabi_comment_chars;
1181 }
1182#endif
1183 else
1184 {
1185 as_bad (_("invalid switch -m%s"), arg);
1186 return 0;
1187 }
1188 break;
1189
1190#ifdef OBJ_ELF
1191 /* -V: SVR4 argument to print version ID. */
1192 case 'V':
1193 print_version_id ();
1194 break;
1195
1196 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1197 should be emitted or not. FIXME: Not implemented. */
1198 case 'Q':
1199 break;
1200
1201 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1202 rather than .stabs.excl, which is ignored by the linker.
1203 FIXME: Not implemented. */
1204 case 's':
1205 if (arg)
1206 return 0;
1207
1208 break;
1209#endif
1210
cef4f754
AM		 1211 case OPTION_NOPS:
1212 {
1213 char *end;
1214 nop_limit = strtoul (optarg, &end, 0);
1215 if (*end)
1216 as_bad (_("--nops needs a numeric argument"));
1217 }
1218 break;
85645aed 1219
252b5132
RH		 1220 default:
1221 return 0;
1222 }
1223
1224 return 1;
1225}
1226
1227void
98027b10 1228md_show_usage (FILE *stream)
252b5132 1229{
bc805888 1230 fprintf (stream, _("\
252b5132 1231PowerPC options:\n\
ce3d2015
AM		 1232-a32 generate ELF32/XCOFF32\n\
1233-a64 generate ELF64/XCOFF64\n\
1234-u ignored\n\
1235-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1236-mpwr generate code for POWER (RIOS1)\n\
1237-m601 generate code for PowerPC 601\n\
418c1742 1238-mppc, -mppc32, -m603, -m604\n\
ce3d2015
AM		 1239 generate code for PowerPC 603/604\n\
1240-m403 generate code for PowerPC 403\n\
1241-m405 generate code for PowerPC 405\n\
1242-m440 generate code for PowerPC 440\n\
1243-m464 generate code for PowerPC 464\n\
1244-m476 generate code for PowerPC 476\n\
f5c120c5 1245-m7400, -m7410, -m7450, -m7455\n\
ce3d2015
AM		 1246 generate code for PowerPC 7400/7410/7450/7455\n\
1247-m750cl generate code for PowerPC 750cl\n"));
df12615d 1248 fprintf (stream, _("\
ce3d2015
AM		 1249-mppc64, -m620 generate code for PowerPC 620/625/630\n\
1250-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
1251-mbooke generate code for 32-bit PowerPC BookE\n\
1252-ma2 generate code for A2 architecture\n\
cdc51b07
RS		 1253-mpower4, -mpwr4 generate code for Power4 architecture\n\
1254-mpower5, -mpwr5, -mpwr5x\n\
1255 generate code for Power5 architecture\n\
1256-mpower6, -mpwr6 generate code for Power6 architecture\n\
1257-mpower7, -mpwr7 generate code for Power7 architecture\n\
ce3d2015
AM		 1258-mcell generate code for Cell Broadband Engine architecture\n\
1259-mcom generate code Power/PowerPC common instructions\n\
1260-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1261 fprintf (stream, _("\
ce3d2015
AM		 1262-maltivec generate code for AltiVec\n\
1263-mvsx generate code for Vector-Scalar (VSX) instructions\n\
1264-me300 generate code for PowerPC e300 family\n\
1265-me500, -me500x2 generate code for Motorola e500 core complex\n\
1266-me500mc, generate code for Freescale e500mc core complex\n\
1267-me500mc64, generate code for Freescale e500mc64 core complex\n\
1268-mspe generate code for Motorola SPE instructions\n\
1269-mtitan generate code for AppliedMicro Titan core complex\n\
1270-mregnames Allow symbolic names for registers\n\
1271-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1272#ifdef OBJ_ELF
bc805888 1273 fprintf (stream, _("\
ce3d2015
AM		 1274-mrelocatable support for GCC's -mrelocatble option\n\
1275-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1276-memb set PPC_EMB bit in ELF flags\n\
b8b738ac 1277-mlittle, -mlittle-endian, -le\n\
ce3d2015 1278 generate code for a little endian machine\n\
b8b738ac 1279-mbig, -mbig-endian, -be\n\
ce3d2015
AM		 1280 generate code for a big endian machine\n\
1281-msolaris generate code for Solaris\n\
1282-mno-solaris do not generate code for Solaris\n\
b8b738ac 1283-K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n\
ce3d2015
AM		 1284-V print assembler version number\n\
1285-Qy, -Qn ignored\n"));
252b5132 1286#endif
cef4f754
AM		 1287 fprintf (stream, _("\
1288-nops=count when aligning, more than COUNT nops uses a branch\n"));
252b5132
RH		 1289}
1290\f
1291/* Set ppc_cpu if it is not already set. */
1292
1293static void
98027b10 1294ppc_set_cpu (void)
252b5132
RH		 1295{
1296 const char *default_os = TARGET_OS;
1297 const char *default_cpu = TARGET_CPU;
1298
7102e95e 1299 if ((ppc_cpu & ~(ppc_cpu_t) PPC_OPCODE_ANY) == 0)
252b5132 1300 {
2a98c3a6 1301 if (ppc_obj64)
bdc70b4a 1302 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_64;
2a98c3a6
AM		 1303 else if (strncmp (default_os, "aix", 3) == 0
1304 && default_os[3] >= '4' && default_os[3] <= '9')
bdc70b4a 1305 ppc_cpu |= PPC_OPCODE_COMMON;
252b5132 1306 else if (strncmp (default_os, "aix3", 4) == 0)
bdc70b4a 1307 ppc_cpu |= PPC_OPCODE_POWER;
252b5132 1308 else if (strcmp (default_cpu, "rs6000") == 0)
bdc70b4a 1309 ppc_cpu |= PPC_OPCODE_POWER;
0baf16f2 1310 else if (strncmp (default_cpu, "powerpc", 7) == 0)
bdc70b4a 1311 ppc_cpu |= PPC_OPCODE_PPC;
252b5132 1312 else
99a814a1
AM		 1313 as_fatal (_("Unknown default cpu = %s, os = %s"),
1314 default_cpu, default_os);
252b5132
RH		 1315 }
1316}
1317
9232bbb0
AM		 1318/* Figure out the BFD architecture to use. This function and ppc_mach
1319 are called well before md_begin, when the output file is opened. */
252b5132
RH		 1320
1321enum bfd_architecture
98027b10 1322ppc_arch (void)
252b5132
RH		 1323{
1324 const char *default_cpu = TARGET_CPU;
1325 ppc_set_cpu ();
1326
1327 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1328 return bfd_arch_powerpc;
1329 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1330 return bfd_arch_rs6000;
1331 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1332 {
1333 if (strcmp (default_cpu, "rs6000") == 0)
1334 return bfd_arch_rs6000;
0baf16f2 1335 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1336 return bfd_arch_powerpc;
1337 }
1338
1339 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1340 return bfd_arch_unknown;
1341}
1342
7f6d05e8 1343unsigned long
98027b10 1344ppc_mach (void)
7f6d05e8 1345{
2a98c3a6
AM		 1346 if (ppc_obj64)
1347 return bfd_mach_ppc64;
1348 else if (ppc_arch () == bfd_arch_rs6000)
1349 return bfd_mach_rs6k;
ce3d2015
AM		 1350 else if (ppc_cpu & PPC_OPCODE_TITAN)
1351 return bfd_mach_ppc_titan;
2a98c3a6
AM		 1352 else
1353 return bfd_mach_ppc;
7f6d05e8
CP		 1354}
1355
81d4177b 1356extern char*
98027b10 1357ppc_target_format (void)
7f6d05e8
CP		 1358{
1359#ifdef OBJ_COFF
1360#ifdef TE_PE
99a814a1 1361 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1362#elif TE_POWERMAC
0baf16f2 1363 return "xcoff-powermac";
7f6d05e8 1364#else
eb1e0e80 1365# ifdef TE_AIX5
edc1d652 1366 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1367# else
edc1d652 1368 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1369# endif
7f6d05e8 1370#endif
7f6d05e8
CP		 1371#endif
1372#ifdef OBJ_ELF
edc1d652
AM		 1373# ifdef TE_FreeBSD
1374 return (ppc_obj64 ? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd");
1375# elif defined (TE_VXWORKS)
9d8504b1
PB		 1376 return "elf32-powerpc-vxworks";
1377# else
0baf16f2 1378 return (target_big_endian
2b3c4602
AM		 1379 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1380 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
9d8504b1 1381# endif
7f6d05e8
CP		 1382#endif
1383}
1384
69c040df
AM		 1385/* Insert opcodes and macros into hash tables. Called at startup and
1386 for .cpu pseudo. */
252b5132 1387
69c040df
AM		 1388static void
1389ppc_setup_opcodes (void)
252b5132 1390{
98027b10 1391 const struct powerpc_opcode *op;
252b5132
RH		 1392 const struct powerpc_opcode *op_end;
1393 const struct powerpc_macro *macro;
1394 const struct powerpc_macro *macro_end;
b84bf58a 1395 bfd_boolean bad_insn = FALSE;
252b5132 1396
69c040df
AM		 1397 if (ppc_hash != NULL)
1398 hash_die (ppc_hash);
1399 if (ppc_macro_hash != NULL)
1400 hash_die (ppc_macro_hash);
252b5132
RH		 1401
1402 /* Insert the opcodes into a hash table. */
1403 ppc_hash = hash_new ();
1404
c43a438d 1405 if (ENABLE_CHECKING)
b84bf58a 1406 {
c43a438d 1407 unsigned int i;
b84bf58a 1408
c43a438d
AM		 1409 /* Check operand masks. Code here and in the disassembler assumes
1410 all the 1's in the mask are contiguous. */
1411 for (i = 0; i < num_powerpc_operands; ++i)
b84bf58a 1412 {
c43a438d
AM		 1413 unsigned long mask = powerpc_operands[i].bitm;
1414 unsigned long right_bit;
1415 unsigned int j;
1416
1417 right_bit = mask & -mask;
1418 mask += right_bit;
1419 right_bit = mask & -mask;
1420 if (mask != right_bit)
1421 {
1422 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1423 bad_insn = TRUE;
1424 }
1425 for (j = i + 1; j < num_powerpc_operands; ++j)
1426 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1427 sizeof (powerpc_operands[0])) == 0)
1428 {
1429 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1430 j, i);
1431 bad_insn = TRUE;
1432 }
b84bf58a
AM		 1433 }
1434 }
1435
252b5132
RH		 1436 op_end = powerpc_opcodes + powerpc_num_opcodes;
1437 for (op = powerpc_opcodes; op < op_end; op++)
1438 {
c43a438d 1439 if (ENABLE_CHECKING)
b84bf58a 1440 {
c43a438d
AM		 1441 const unsigned char *o;
1442 unsigned long omask = op->mask;
8dbcd839 1443
d815f1a9 1444 if (op != powerpc_opcodes)
8dbcd839 1445 {
d815f1a9
AM		 1446 /* The major opcodes had better be sorted. Code in the
1447 disassembler assumes the insns are sorted according to
1448 major opcode. */
1449 if (PPC_OP (op[0].opcode) < PPC_OP (op[-1].opcode))
1450 {
1451 as_bad (_("major opcode is not sorted for %s"),
1452 op->name);
1453 bad_insn = TRUE;
1454 }
1455
1456 /* Warn if the table isn't more strictly ordered.
1457 Unfortunately it doesn't seem possible to order the
1458 table on much more than the major opcode, which makes
1459 it difficult to implement a binary search in the
1460 disassembler. The problem is that we have multiple
1461 ways to disassemble instructions, and we usually want
1462 to choose a more specific form (with more bits set in
1463 the opcode) than a more general form. eg. all of the
1464 following are equivalent:
1465 bne label # opcode = 0x40820000, mask = 0xff830003
1466 bf 2,label # opcode = 0x40800000, mask = 0xff800003
1467 bc 4,2,label # opcode = 0x40000000, mask = 0xfc000003
1468
1469 There are also cases where the table needs to be out
1470 of order to disassemble the correct instruction for
2f3bb96a 1471 processor variants. */
d815f1a9
AM		 1472 else if (0)
1473 {
1474 unsigned long t1 = op[0].opcode;
1475 unsigned long t2 = op[-1].opcode;
1476
1477 if (((t1 ^ t2) & 0xfc0007ff) == 0
1478 && (t1 & 0xfc0006df) == 0x7c000286)
1479 {
1480 /* spr field is split. */
1481 t1 = ((t1 & ~0x1ff800)
1482 | ((t1 & 0xf800) << 5) | ((t1 & 0x1f0000) >> 5));
1483 t2 = ((t2 & ~0x1ff800)
1484 | ((t2 & 0xf800) << 5) | ((t2 & 0x1f0000) >> 5));
1485 }
1486 if (t1 < t2)
1487 as_warn (_("%s (%08lx %08lx) after %s (%08lx %08lx)"),
1488 op[0].name, op[0].opcode, op[0].mask,
1489 op[-1].name, op[-1].opcode, op[-1].mask);
1490 }
8dbcd839 1491 }
c43a438d
AM		 1492
1493 /* The mask had better not trim off opcode bits. */
1494 if ((op->opcode & omask) != op->opcode)
1495 {
1496 as_bad (_("mask trims opcode bits for %s"),
1497 op->name);
1498 bad_insn = TRUE;
1499 }
1500
1501 /* The operands must not overlap the opcode or each other. */
1502 for (o = op->operands; *o; ++o)
1503 if (*o >= num_powerpc_operands)
1504 {
1505 as_bad (_("operand index error for %s"),
1506 op->name);
1507 bad_insn = TRUE;
1508 }
1509 else
b84bf58a 1510 {
c43a438d
AM		 1511 const struct powerpc_operand *operand = &powerpc_operands[*o];
1512 if (operand->shift >= 0)
b84bf58a 1513 {
c43a438d
AM		 1514 unsigned long mask = operand->bitm << operand->shift;
1515 if (omask & mask)
1516 {
1517 as_bad (_("operand %d overlap in %s"),
1518 (int) (o - op->operands), op->name);
1519 bad_insn = TRUE;
1520 }
1521 omask |= mask;
b84bf58a 1522 }
b84bf58a 1523 }
c43a438d 1524 }
252b5132 1525
bdc70b4a 1526 if ((ppc_cpu & op->flags) != 0
1cb0a767 1527 && !(ppc_cpu & op->deprecated))
252b5132
RH		 1528 {
1529 const char *retval;
1530
98027b10 1531 retval = hash_insert (ppc_hash, op->name, (void *) op);
69c040df 1532 if (retval != NULL)
252b5132 1533 {
b84bf58a 1534 as_bad (_("duplicate instruction %s"),
99a814a1 1535 op->name);
b84bf58a 1536 bad_insn = TRUE;
252b5132
RH		 1537 }
1538 }
1539 }
1540
3c9030c1
AM		 1541 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1542 for (op = powerpc_opcodes; op < op_end; op++)
98027b10 1543 hash_insert (ppc_hash, op->name, (void *) op);
3c9030c1 1544
252b5132
RH		 1545 /* Insert the macros into a hash table. */
1546 ppc_macro_hash = hash_new ();
1547
1548 macro_end = powerpc_macros + powerpc_num_macros;
1549 for (macro = powerpc_macros; macro < macro_end; macro++)
1550 {
33740db9 1551 if ((macro->flags & ppc_cpu) != 0 || (ppc_cpu & PPC_OPCODE_ANY) != 0)
252b5132
RH		 1552 {
1553 const char *retval;
1554
98027b10 1555 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
252b5132
RH		 1556 if (retval != (const char *) NULL)
1557 {
b84bf58a
AM		 1558 as_bad (_("duplicate macro %s"), macro->name);
1559 bad_insn = TRUE;
252b5132
RH		 1560 }
1561 }
1562 }
1563
b84bf58a 1564 if (bad_insn)
252b5132 1565 abort ();
69c040df
AM		 1566}
1567
1568/* This function is called when the assembler starts up. It is called
1569 after the options have been parsed and the output file has been
1570 opened. */
1571
1572void
98027b10 1573md_begin (void)
69c040df
AM		 1574{
1575 ppc_set_cpu ();
1576
1577 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1578
1579#ifdef OBJ_ELF
1580 /* Set the ELF flags if desired. */
1581 if (ppc_flags && !msolaris)
1582 bfd_set_private_flags (stdoutput, ppc_flags);
1583#endif
1584
1585 ppc_setup_opcodes ();
252b5132 1586
67c1ffbe 1587 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1588 by the user. */
252b5132
RH		 1589 if (!set_target_endian)
1590 {
1591 set_target_endian = 1;
1592 target_big_endian = PPC_BIG_ENDIAN;
1593 }
1594
1595#ifdef OBJ_XCOFF
1596 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1597
1598 /* Create dummy symbols to serve as initial csects. This forces the
1599 text csects to precede the data csects. These symbols will not
1600 be output. */
1601 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1602 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1603 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1604 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1605#endif
1606
1607#ifdef TE_PE
1608
1609 ppc_current_section = text_section;
81d4177b 1610 ppc_previous_section = 0;
252b5132
RH		 1611
1612#endif
1613}
1614
6a0c61b7 1615void
98027b10 1616ppc_cleanup (void)
6a0c61b7 1617{
dc1d03fc 1618#ifdef OBJ_ELF
6a0c61b7
EZ		 1619 if (ppc_apuinfo_list == NULL)
1620 return;
1621
1622 /* Ok, so write the section info out. We have this layout:
1623
1624 byte data what
1625 ---- ---- ----
1626 0 8 length of "APUinfo\0"
1627 4 (n*4) number of APU's (4 bytes each)
1628 8 2 note type 2
1629 12 "APUinfo\0" name
1630 20 APU#1 first APU's info
1631 24 APU#2 second APU's info
1632 ... ...
1633 */
1634 {
1635 char *p;
1636 asection *seg = now_seg;
1637 subsegT subseg = now_subseg;
1638 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1639 unsigned int i;
6a0c61b7
EZ		 1640
1641 /* Create the .PPC.EMB.apuinfo section. */
1642 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1643 bfd_set_section_flags (stdoutput,
1644 apuinfo_secp,
e1a9cb8e 1645 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1646
1647 p = frag_more (4);
1648 md_number_to_chars (p, (valueT) 8, 4);
1649
1650 p = frag_more (4);
e98d298c 1651 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1652
1653 p = frag_more (4);
1654 md_number_to_chars (p, (valueT) 2, 4);
1655
1656 p = frag_more (8);
1657 strcpy (p, "APUinfo");
1658
1659 for (i = 0; i < ppc_apuinfo_num; i++)
1660 {
b34976b6
AM		 1661 p = frag_more (4);
1662 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1663 }
1664
1665 frag_align (2, 0, 0);
1666
1667 /* We probably can't restore the current segment, for there likely
1668 isn't one yet... */
1669 if (seg && subseg)
1670 subseg_set (seg, subseg);
1671 }
dc1d03fc 1672#endif
6a0c61b7
EZ		 1673}
1674
252b5132
RH		 1675/* Insert an operand value into an instruction. */
1676
1677static unsigned long
a1867a27
AM		 1678ppc_insert_operand (unsigned long insn,
1679 const struct powerpc_operand *operand,
1680 offsetT val,
91d6fa6a 1681 ppc_cpu_t cpu,
a1867a27
AM		 1682 char *file,
1683 unsigned int line)
252b5132 1684{
b84bf58a 1685 long min, max, right;
eb42fac1 1686
b84bf58a
AM		 1687 max = operand->bitm;
1688 right = max & -max;
1689 min = 0;
1690
1691 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
252b5132 1692 {
b84bf58a 1693 if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0)
931774a9
AM		 1694 max = (max >> 1) & -right;
1695 min = ~max & -right;
b84bf58a 1696 }
252b5132 1697
b84bf58a 1698 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
3896c469 1699 max++;
252b5132 1700
b84bf58a 1701 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
a1867a27
AM		 1702 {
1703 long tmp = min;
1704 min = -max;
1705 max = -tmp;
1706 }
b84bf58a 1707
a1867a27
AM		 1708 if (min <= max)
1709 {
1710 /* Some people write constants with the sign extension done by
1711 hand but only up to 32 bits. This shouldn't really be valid,
1712 but, to permit this code to assemble on a 64-bit host, we
1713 sign extend the 32-bit value to 64 bits if so doing makes the
1714 value valid. */
1715 if (val > max
1716 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1717 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1718 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1719 val = val - 0x80000000 - 0x80000000;
1720
1721 /* Similarly, people write expressions like ~(1<<15), and expect
1722 this to be OK for a 32-bit unsigned value. */
1723 else if (val < min
1724 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1725 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1726 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1727 val = val + 0x80000000 + 0x80000000;
1728
1729 else if (val < min
1730 || val > max
1731 || (val & (right - 1)) != 0)
1732 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1733 }
b84bf58a 1734
252b5132
RH		 1735 if (operand->insert)
1736 {
1737 const char *errmsg;
1738
1739 errmsg = NULL;
91d6fa6a 1740 insn = (*operand->insert) (insn, (long) val, cpu, &errmsg);
252b5132 1741 if (errmsg != (const char *) NULL)
ee2c9aa9 1742 as_bad_where (file, line, "%s", errmsg);
252b5132
RH		 1743 }
1744 else
b84bf58a 1745 insn |= ((long) val & operand->bitm) << operand->shift;
252b5132
RH		 1746
1747 return insn;
1748}
1749
1750\f
1751#ifdef OBJ_ELF
1752/* Parse @got, etc. and return the desired relocation. */
1753static bfd_reloc_code_real_type
98027b10 1754ppc_elf_suffix (char **str_p, expressionS *exp_p)
252b5132
RH		 1755{
1756 struct map_bfd {
1757 char *string;
b7d7dc63
AM		 1758 unsigned int length : 8;
1759 unsigned int valid32 : 1;
1760 unsigned int valid64 : 1;
1761 unsigned int reloc;
252b5132
RH		 1762 };
1763
1764 char ident[20];
1765 char *str = *str_p;
1766 char *str2;
1767 int ch;
1768 int len;
15c1449b 1769 const struct map_bfd *ptr;
252b5132 1770
b7d7dc63
AM		 1771#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1772#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1773#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1774
15c1449b 1775 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1776 MAP ("l", BFD_RELOC_LO16),
1777 MAP ("h", BFD_RELOC_HI16),
1778 MAP ("ha", BFD_RELOC_HI16_S),
1779 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1780 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1781 MAP ("got", BFD_RELOC_16_GOTOFF),
1782 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1783 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1784 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1785 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1786 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1787 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1788 MAP ("copy", BFD_RELOC_PPC_COPY),
1789 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1790 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1791 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1792 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1793 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1794 MAP ("tls", BFD_RELOC_PPC_TLS),
1795 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1796 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1797 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1798 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1799 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1800 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1801 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1802 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1803 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1804 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1805 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1806 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1807 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1808 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1809 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1810 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1811 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1812 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1813 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1814 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1815 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1816 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1817 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1818 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1819 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1820 MAP32 ("fixup", BFD_RELOC_CTOR),
1821 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1822 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1823 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1824 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1825 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1826 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1827 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1828 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1829 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1830 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1831 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1832 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1833 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1834 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1835 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1836 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1837 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1838 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1839 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1840 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1841 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1842 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1843 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1844 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1845 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1846 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1847 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1848 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1849 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1850 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1851 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1852 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1853 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1854 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1855 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1856 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1857 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1858 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1859 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1860 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1861 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
252b5132
RH		 1862 };
1863
1864 if (*str++ != '@')
1865 return BFD_RELOC_UNUSED;
1866
1867 for (ch = *str, str2 = ident;
1868 (str2 < ident + sizeof (ident) - 1
3882b010 1869 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1870 ch = *++str)
1871 {
3882b010 1872 *str2++ = TOLOWER (ch);
252b5132
RH		 1873 }
1874
1875 *str2 = '\0';
1876 len = str2 - ident;
1877
1878 ch = ident[0];
1879 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1880 if (ch == ptr->string[0]
1881 && len == ptr->length
b7d7dc63
AM		 1882 && memcmp (ident, ptr->string, ptr->length) == 0
1883 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 1884 {
15c1449b
AM		 1885 int reloc = ptr->reloc;
1886
727fc41e
AM		 1887 if (!ppc_obj64 && exp_p->X_add_number != 0)
1888 {
1889 switch (reloc)
1890 {
1891 case BFD_RELOC_16_GOTOFF:
1892 case BFD_RELOC_LO16_GOTOFF:
1893 case BFD_RELOC_HI16_GOTOFF:
1894 case BFD_RELOC_HI16_S_GOTOFF:
1895 as_warn (_("identifier+constant@got means "
1896 "identifier@got+constant"));
1897 break;
1898
1899 case BFD_RELOC_PPC_GOT_TLSGD16:
1900 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
1901 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
1902 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
1903 case BFD_RELOC_PPC_GOT_TLSLD16:
1904 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
1905 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
1906 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
1907 case BFD_RELOC_PPC_GOT_DTPREL16:
1908 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
1909 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
1910 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
1911 case BFD_RELOC_PPC_GOT_TPREL16:
1912 case BFD_RELOC_PPC_GOT_TPREL16_LO:
1913 case BFD_RELOC_PPC_GOT_TPREL16_HI:
1914 case BFD_RELOC_PPC_GOT_TPREL16_HA:
1915 as_bad (_("symbol+offset not supported for got tls"));
1916 break;
1917 }
1918 }
5f6db75a
AM		 1919
1920 /* Now check for identifier@suffix+constant. */
1921 if (*str == '-' || *str == '+')
252b5132 1922 {
5f6db75a
AM		 1923 char *orig_line = input_line_pointer;
1924 expressionS new_exp;
1925
1926 input_line_pointer = str;
1927 expression (&new_exp);
1928 if (new_exp.X_op == O_constant)
252b5132 1929 {
5f6db75a
AM		 1930 exp_p->X_add_number += new_exp.X_add_number;
1931 str = input_line_pointer;
252b5132 1932 }
5f6db75a
AM		 1933
1934 if (&input_line_pointer != str_p)
1935 input_line_pointer = orig_line;
252b5132 1936 }
252b5132 1937 *str_p = str;
0baf16f2 1938
2b3c4602 1939 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 1940 && exp_p->X_op == O_symbol
1941 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 1942 {
9f2b53d7
AM		 1943 /* Change the symbol so that the dummy .TOC. symbol can be
1944 omitted from the object file. */
0baf16f2
AM		 1945 exp_p->X_add_symbol = &abs_symbol;
1946 }
1947
15c1449b 1948 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 1949 }
1950
1951 return BFD_RELOC_UNUSED;
1952}
1953
99a814a1
AM		 1954/* Like normal .long/.short/.word, except support @got, etc.
1955 Clobbers input_line_pointer, checks end-of-line. */
252b5132 1956static void
98027b10 1957ppc_elf_cons (int nbytes /* 1=.byte, 2=.word, 4=.long, 8=.llong */)
252b5132
RH		 1958{
1959 expressionS exp;
1960 bfd_reloc_code_real_type reloc;
1961
1962 if (is_it_end_of_statement ())
1963 {
1964 demand_empty_rest_of_line ();
1965 return;
1966 }
1967
1968 do
1969 {
1970 expression (&exp);
1971 if (exp.X_op == O_symbol
1972 && *input_line_pointer == '@'
99a814a1
AM		 1973 && (reloc = ppc_elf_suffix (&input_line_pointer,
1974 &exp)) != BFD_RELOC_UNUSED)
252b5132 1975 {
99a814a1
AM		 1976 reloc_howto_type *reloc_howto;
1977 int size;
1978
1979 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1980 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH		 1981
1982 if (size > nbytes)
0baf16f2
AM		 1983 {
1984 as_bad (_("%s relocations do not fit in %d bytes\n"),
1985 reloc_howto->name, nbytes);
1986 }
252b5132
RH		 1987 else
1988 {
0baf16f2
AM		 1989 char *p;
1990 int offset;
252b5132 1991
0baf16f2 1992 p = frag_more (nbytes);
aa0c8c1a 1993 memset (p, 0, nbytes);
0baf16f2
AM		 1994 offset = 0;
1995 if (target_big_endian)
1996 offset = nbytes - size;
99a814a1
AM		 1997 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1998 &exp, 0, reloc);
252b5132
RH		 1999 }
2000 }
2001 else
2002 emit_expr (&exp, (unsigned int) nbytes);
2003 }
2004 while (*input_line_pointer++ == ',');
2005
99a814a1
AM		 2006 /* Put terminator back into stream. */
2007 input_line_pointer--;
252b5132
RH		 2008 demand_empty_rest_of_line ();
2009}
2010
2011/* Solaris pseduo op to change to the .rodata section. */
2012static void
98027b10 2013ppc_elf_rdata (int xxx)
252b5132
RH		 2014{
2015 char *save_line = input_line_pointer;
2016 static char section[] = ".rodata\n";
2017
99a814a1 2018 /* Just pretend this is .section .rodata */
252b5132
RH		 2019 input_line_pointer = section;
2020 obj_elf_section (xxx);
2021
2022 input_line_pointer = save_line;
2023}
2024
99a814a1 2025/* Pseudo op to make file scope bss items. */
252b5132 2026static void
98027b10 2027ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
252b5132 2028{
98027b10
AM		 2029 char *name;
2030 char c;
2031 char *p;
252b5132 2032 offsetT size;
98027b10 2033 symbolS *symbolP;
252b5132
RH		 2034 offsetT align;
2035 segT old_sec;
2036 int old_subsec;
2037 char *pfrag;
2038 int align2;
2039
2040 name = input_line_pointer;
2041 c = get_symbol_end ();
2042
99a814a1 2043 /* just after name is now '\0'. */
252b5132
RH		 2044 p = input_line_pointer;
2045 *p = c;
2046 SKIP_WHITESPACE ();
2047 if (*input_line_pointer != ',')
2048 {
2049 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
2050 ignore_rest_of_line ();
2051 return;
2052 }
2053
2054 input_line_pointer++; /* skip ',' */
2055 if ((size = get_absolute_expression ()) < 0)
2056 {
2057 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
2058 ignore_rest_of_line ();
2059 return;
2060 }
2061
2062 /* The third argument to .lcomm is the alignment. */
2063 if (*input_line_pointer != ',')
2064 align = 8;
2065 else
2066 {
2067 ++input_line_pointer;
2068 align = get_absolute_expression ();
2069 if (align <= 0)
2070 {
2071 as_warn (_("ignoring bad alignment"));
2072 align = 8;
2073 }
2074 }
2075
2076 *p = 0;
2077 symbolP = symbol_find_or_make (name);
2078 *p = c;
2079
2080 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
2081 {
2082 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
2083 S_GET_NAME (symbolP));
2084 ignore_rest_of_line ();
2085 return;
2086 }
2087
2088 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
2089 {
2090 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2091 S_GET_NAME (symbolP),
2092 (long) S_GET_VALUE (symbolP),
2093 (long) size);
2094
2095 ignore_rest_of_line ();
2096 return;
2097 }
2098
99a814a1 2099 /* Allocate_bss. */
252b5132
RH		 2100 old_sec = now_seg;
2101 old_subsec = now_subseg;
2102 if (align)
2103 {
99a814a1 2104 /* Convert to a power of 2 alignment. */
252b5132
RH		 2105 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
2106 if (align != 1)
2107 {
2108 as_bad (_("Common alignment not a power of 2"));
2109 ignore_rest_of_line ();
2110 return;
2111 }
2112 }
2113 else
2114 align2 = 0;
2115
2116 record_alignment (bss_section, align2);
2117 subseg_set (bss_section, 0);
2118 if (align2)
2119 frag_align (align2, 0, 0);
2120 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 2121 symbol_get_frag (symbolP)->fr_symbol = 0;
2122 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 2123 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
2124 (char *) 0);
2125 *pfrag = 0;
2126 S_SET_SIZE (symbolP, size);
2127 S_SET_SEGMENT (symbolP, bss_section);
2128 subseg_set (old_sec, old_subsec);
2129 demand_empty_rest_of_line ();
2130}
2131
2132/* Validate any relocations emitted for -mrelocatable, possibly adding
2133 fixups for word relocations in writable segments, so we can adjust
2134 them at runtime. */
2135static void
98027b10 2136ppc_elf_validate_fix (fixS *fixp, segT seg)
252b5132
RH		 2137{
2138 if (fixp->fx_done || fixp->fx_pcrel)
2139 return;
2140
2141 switch (shlib)
2142 {
2143 case SHLIB_NONE:
2144 case SHLIB_PIC:
2145 return;
2146
5d6f4f16 2147 case SHLIB_MRELOCATABLE:
252b5132
RH		 2148 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
2149 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
2150 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2151 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2152 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 2153 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 2154 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2155 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2156 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 2157 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 2158 && strcmp (segment_name (seg), ".got2") != 0
2159 && strcmp (segment_name (seg), ".dtors") != 0
2160 && strcmp (segment_name (seg), ".ctors") != 0
2161 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 2162 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2163 && strcmp (segment_name (seg), ".eh_frame") != 0
2164 && strcmp (segment_name (seg), ".ex_shared") != 0)
2165 {
2166 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2167 || fixp->fx_r_type != BFD_RELOC_CTOR)
2168 {
2169 as_bad_where (fixp->fx_file, fixp->fx_line,
2170 _("Relocation cannot be done when using -mrelocatable"));
2171 }
2172 }
2173 return;
2174 }
2175}
0baf16f2 2176
7e8d4ab4
AM		 2177/* Prevent elf_frob_file_before_adjust removing a weak undefined
2178 function descriptor sym if the corresponding code sym is used. */
2179
2180void
98027b10 2181ppc_frob_file_before_adjust (void)
0baf16f2 2182{
7e8d4ab4 2183 symbolS *symp;
9232bbb0 2184 asection *toc;
0baf16f2 2185
7e8d4ab4
AM		 2186 if (!ppc_obj64)
2187 return;
2188
2189 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 2190 {
7e8d4ab4
AM		 2191 const char *name;
2192 char *dotname;
2193 symbolS *dotsym;
2194 size_t len;
2195
2196 name = S_GET_NAME (symp);
2197 if (name[0] == '.')
2198 continue;
2199
2200 if (! S_IS_WEAK (symp)
2201 || S_IS_DEFINED (symp))
2202 continue;
2203
2204 len = strlen (name) + 1;
2205 dotname = xmalloc (len + 1);
2206 dotname[0] = '.';
2207 memcpy (dotname + 1, name, len);
461b725f 2208 dotsym = symbol_find_noref (dotname, 1);
7e8d4ab4
AM		 2209 free (dotname);
2210 if (dotsym != NULL && (symbol_used_p (dotsym)
2211 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 2212 symbol_mark_used (symp);
2213
0baf16f2
AM		 2214 }
2215
9232bbb0
AM		 2216 toc = bfd_get_section_by_name (stdoutput, ".toc");
2217 if (toc != NULL
01efc3af 2218 && toc_reloc_types != has_large_toc_reloc
9232bbb0
AM		 2219 && bfd_section_size (stdoutput, toc) > 0x10000)
2220 as_warn (_("TOC section size exceeds 64k"));
2221
7e8d4ab4
AM		 2222 /* Don't emit .TOC. symbol. */
2223 symp = symbol_find (".TOC.");
2224 if (symp != NULL)
2225 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
0baf16f2 2226}
252b5132
RH		 2227#endif /* OBJ_ELF */
2228\f
2229#ifdef TE_PE
2230
2231/*
99a814a1 2232 * Summary of parse_toc_entry.
252b5132
RH		 2233 *
2234 * in: Input_line_pointer points to the '[' in one of:
2235 *
2236 * [toc] [tocv] [toc32] [toc64]
2237 *
2238 * Anything else is an error of one kind or another.
2239 *
81d4177b 2240 * out:
252b5132
RH		 2241 * return value: success or failure
2242 * toc_kind: kind of toc reference
2243 * input_line_pointer:
2244 * success: first char after the ']'
2245 * failure: unchanged
2246 *
2247 * settings:
2248 *
2249 * [toc] - rv == success, toc_kind = default_toc
2250 * [tocv] - rv == success, toc_kind = data_in_toc
2251 * [toc32] - rv == success, toc_kind = must_be_32
2252 * [toc64] - rv == success, toc_kind = must_be_64
2253 *
2254 */
2255
81d4177b
KH		 2256enum toc_size_qualifier
2257{
252b5132
RH		 2258 default_toc, /* The toc cell constructed should be the system default size */
2259 data_in_toc, /* This is a direct reference to a toc cell */
2260 must_be_32, /* The toc cell constructed must be 32 bits wide */
2261 must_be_64 /* The toc cell constructed must be 64 bits wide */
2262};
2263
2264static int
98027b10 2265parse_toc_entry (enum toc_size_qualifier *toc_kind)
252b5132
RH		 2266{
2267 char *start;
2268 char *toc_spec;
2269 char c;
2270 enum toc_size_qualifier t;
2271
99a814a1 2272 /* Save the input_line_pointer. */
252b5132
RH		 2273 start = input_line_pointer;
2274
99a814a1 2275 /* Skip over the '[' , and whitespace. */
252b5132
RH		 2276 ++input_line_pointer;
2277 SKIP_WHITESPACE ();
81d4177b 2278
99a814a1 2279 /* Find the spelling of the operand. */
252b5132
RH		 2280 toc_spec = input_line_pointer;
2281 c = get_symbol_end ();
2282
99a814a1 2283 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 2284 {
2285 t = default_toc;
2286 }
99a814a1 2287 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 2288 {
2289 t = data_in_toc;
2290 }
99a814a1 2291 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2292 {
2293 t = must_be_32;
2294 }
99a814a1 2295 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2296 {
2297 t = must_be_64;
2298 }
2299 else
2300 {
2301 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2302 *input_line_pointer = c;
2303 input_line_pointer = start;
252b5132
RH		 2304 return 0;
2305 }
2306
99a814a1
AM		 2307 /* Now find the ']'. */
2308 *input_line_pointer = c;
252b5132 2309
81d4177b
KH		 2310 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2311 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2312
2313 if (c != ']')
2314 {
2315 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2316 input_line_pointer = start;
252b5132
RH		 2317 return 0;
2318 }
2319
99a814a1 2320 *toc_kind = t;
252b5132
RH		 2321 return 1;
2322}
2323#endif
2324\f
2325
dc1d03fc 2326#ifdef OBJ_ELF
6a0c61b7
EZ		 2327#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2328static void
98027b10 2329ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
6a0c61b7
EZ		 2330{
2331 unsigned int i;
2332
2333 /* Check we don't already exist. */
2334 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2335 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2336 return;
b34976b6 2337
6a0c61b7
EZ		 2338 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2339 {
2340 if (ppc_apuinfo_num_alloc == 0)
2341 {
2342 ppc_apuinfo_num_alloc = 4;
2343 ppc_apuinfo_list = (unsigned long *)
2344 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2345 }
2346 else
2347 {
2348 ppc_apuinfo_num_alloc += 4;
2349 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2350 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2351 }
2352 }
dc1d03fc 2353 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2354}
2355#undef APUID
dc1d03fc 2356#endif
6a0c61b7
EZ		 2357\f
2358
252b5132
RH		 2359/* We need to keep a list of fixups. We can't simply generate them as
2360 we go, because that would require us to first create the frag, and
2361 that would screw up references to ``.''. */
2362
2363struct ppc_fixup
2364{
2365 expressionS exp;
2366 int opindex;
2367 bfd_reloc_code_real_type reloc;
2368};
2369
2370#define MAX_INSN_FIXUPS (5)
2371
2372/* This routine is called for each instruction to be assembled. */
2373
2374void
98027b10 2375md_assemble (char *str)
252b5132
RH		 2376{
2377 char *s;
2378 const struct powerpc_opcode *opcode;
2379 unsigned long insn;
2380 const unsigned char *opindex_ptr;
2381 int skip_optional;
2382 int need_paren;
2383 int next_opindex;
2384 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2385 int fc;
2386 char *f;
09b935ac 2387 int addr_mod;
252b5132
RH		 2388 int i;
2389#ifdef OBJ_ELF
2390 bfd_reloc_code_real_type reloc;
2391#endif
2392
2393 /* Get the opcode. */
3882b010 2394 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2395 ;
2396 if (*s != '\0')
2397 *s++ = '\0';
2398
2399 /* Look up the opcode in the hash table. */
2400 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2401 if (opcode == (const struct powerpc_opcode *) NULL)
2402 {
2403 const struct powerpc_macro *macro;
2404
2405 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2406 if (macro == (const struct powerpc_macro *) NULL)
2407 as_bad (_("Unrecognized opcode: `%s'"), str);
2408 else
2409 ppc_macro (s, macro);
2410
2411 return;
2412 }
2413
2414 insn = opcode->opcode;
2415
2416 str = s;
3882b010 2417 while (ISSPACE (*str))
252b5132
RH		 2418 ++str;
2419
2420 /* PowerPC operands are just expressions. The only real issue is
2421 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2422 an optional operand separate the operands only with commas (in some
2423 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2424 have optional operands). Most instructions with optional operands
2425 have only one. Those that have more than one optional operand can
2426 take either all their operands or none. So, before we start seriously
2427 parsing the operands, we check to see if we have optional operands,
2428 and if we do, we count the number of commas to see which operands
2429 have been omitted. */
252b5132
RH		 2430 skip_optional = 0;
2431 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2432 {
2433 const struct powerpc_operand *operand;
2434
2435 operand = &powerpc_operands[*opindex_ptr];
2436 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2437 {
2438 unsigned int opcount;
7fe9cf6b 2439 unsigned int num_operands_expected;
252b5132
RH		 2440
2441 /* There is an optional operand. Count the number of
2442 commas in the input line. */
2443 if (*str == '\0')
2444 opcount = 0;
2445 else
2446 {
2447 opcount = 1;
2448 s = str;
2449 while ((s = strchr (s, ',')) != (char *) NULL)
2450 {
2451 ++opcount;
2452 ++s;
2453 }
2454 }
2455
7fe9cf6b
NC		 2456 /* Compute the number of expected operands.
2457 Do not count fake operands. */
2458 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2459 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2460 ++ num_operands_expected;
2461
252b5132
RH		 2462 /* If there are fewer operands in the line then are called
2463 for by the instruction, we want to skip the optional
1f6c9eb0 2464 operands. */
7fe9cf6b 2465 if (opcount < num_operands_expected)
252b5132
RH		 2466 skip_optional = 1;
2467
2468 break;
2469 }
2470 }
2471
2472 /* Gather the operands. */
2473 need_paren = 0;
2474 next_opindex = 0;
2475 fc = 0;
2476 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2477 {
2478 const struct powerpc_operand *operand;
2479 const char *errmsg;
2480 char *hold;
2481 expressionS ex;
2482 char endc;
2483
2484 if (next_opindex == 0)
2485 operand = &powerpc_operands[*opindex_ptr];
2486 else
2487 {
2488 operand = &powerpc_operands[next_opindex];
2489 next_opindex = 0;
2490 }
252b5132
RH		 2491 errmsg = NULL;
2492
2493 /* If this is a fake operand, then we do not expect anything
2494 from the input. */
2495 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2496 {
2b3c4602 2497 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2498 if (errmsg != (const char *) NULL)
ee2c9aa9 2499 as_bad ("%s", errmsg);
252b5132
RH		 2500 continue;
2501 }
2502
2503 /* If this is an optional operand, and we are skipping it, just
2504 insert a zero. */
2505 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2506 && skip_optional)
2507 {
2508 if (operand->insert)
2509 {
2b3c4602 2510 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2511 if (errmsg != (const char *) NULL)
ee2c9aa9 2512 as_bad ("%s", errmsg);
252b5132
RH		 2513 }
2514 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2515 next_opindex = *opindex_ptr + 1;
2516 continue;
2517 }
2518
2519 /* Gather the operand. */
2520 hold = input_line_pointer;
2521 input_line_pointer = str;
2522
2523#ifdef TE_PE
81d4177b 2524 if (*input_line_pointer == '[')
252b5132
RH		 2525 {
2526 /* We are expecting something like the second argument here:
99a814a1
AM		 2527 *
2528 * lwz r4,[toc].GS.0.static_int(rtoc)
2529 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2530 * The argument following the `]' must be a symbol name, and the
2531 * register must be the toc register: 'rtoc' or '2'
2532 *
2533 * The effect is to 0 as the displacement field
2534 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2535 * the appropriate variation) reloc against it based on the symbol.
2536 * The linker will build the toc, and insert the resolved toc offset.
2537 *
2538 * Note:
2539 * o The size of the toc entry is currently assumed to be
2540 * 32 bits. This should not be assumed to be a hard coded
2541 * number.
2542 * o In an effort to cope with a change from 32 to 64 bits,
2543 * there are also toc entries that are specified to be
2544 * either 32 or 64 bits:
2545 * lwz r4,[toc32].GS.0.static_int(rtoc)
2546 * lwz r4,[toc64].GS.0.static_int(rtoc)
2547 * These demand toc entries of the specified size, and the
2548 * instruction probably requires it.
2549 */
252b5132
RH		 2550
2551 int valid_toc;
2552 enum toc_size_qualifier toc_kind;
2553 bfd_reloc_code_real_type toc_reloc;
2554
99a814a1
AM		 2555 /* Go parse off the [tocXX] part. */
2556 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2557
81d4177b 2558 if (!valid_toc)
252b5132 2559 {
99a814a1
AM		 2560 /* Note: message has already been issued.
2561 FIXME: what sort of recovery should we do?
2562 demand_rest_of_line (); return; ? */
252b5132
RH		 2563 }
2564
99a814a1
AM		 2565 /* Now get the symbol following the ']'. */
2566 expression (&ex);
252b5132
RH		 2567
2568 switch (toc_kind)
2569 {
2570 case default_toc:
99a814a1
AM		 2571 /* In this case, we may not have seen the symbol yet,
2572 since it is allowed to appear on a .extern or .globl
2573 or just be a label in the .data section. */
252b5132
RH		 2574 toc_reloc = BFD_RELOC_PPC_TOC16;
2575 break;
2576 case data_in_toc:
99a814a1
AM		 2577 /* 1. The symbol must be defined and either in the toc
2578 section, or a global.
2579 2. The reloc generated must have the TOCDEFN flag set
2580 in upper bit mess of the reloc type.
2581 FIXME: It's a little confusing what the tocv
2582 qualifier can be used for. At the very least, I've
2583 seen three uses, only one of which I'm sure I can
2584 explain. */
81d4177b
KH		 2585 if (ex.X_op == O_symbol)
2586 {
9c2799c2 2587 gas_assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2588 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2589 != tocdata_section)
252b5132 2590 {
99a814a1 2591 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2592 }
2593 }
2594
2595 toc_reloc = BFD_RELOC_PPC_TOC16;
2596 break;
2597 case must_be_32:
99a814a1
AM		 2598 /* FIXME: these next two specifically specify 32/64 bit
2599 toc entries. We don't support them today. Is this
2600 the right way to say that? */
252b5132
RH		 2601 toc_reloc = BFD_RELOC_UNUSED;
2602 as_bad (_("Unimplemented toc32 expression modifier"));
2603 break;
2604 case must_be_64:
99a814a1 2605 /* FIXME: see above. */
252b5132
RH		 2606 toc_reloc = BFD_RELOC_UNUSED;
2607 as_bad (_("Unimplemented toc64 expression modifier"));
2608 break;
2609 default:
bc805888 2610 fprintf (stderr,
99a814a1
AM		 2611 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2612 toc_kind);
bc805888 2613 abort ();
252b5132
RH		 2614 break;
2615 }
2616
2617 /* We need to generate a fixup for this expression. */
2618 if (fc >= MAX_INSN_FIXUPS)
2619 as_fatal (_("too many fixups"));
2620
2621 fixups[fc].reloc = toc_reloc;
2622 fixups[fc].exp = ex;
2623 fixups[fc].opindex = *opindex_ptr;
2624 ++fc;
2625
99a814a1
AM		 2626 /* Ok. We've set up the fixup for the instruction. Now make it
2627 look like the constant 0 was found here. */
252b5132
RH		 2628 ex.X_unsigned = 1;
2629 ex.X_op = O_constant;
2630 ex.X_add_number = 0;
2631 ex.X_add_symbol = NULL;
2632 ex.X_op_symbol = NULL;
2633 }
2634
2635 else
2636#endif /* TE_PE */
2637 {
2ad068be
AM		 2638 if ((reg_names_p && (operand->flags & PPC_OPERAND_CR) != 0)
2639 || !register_name (&ex))
252b5132 2640 {
13abbae3
AM		 2641 char save_lex = lex_type['%'];
2642
252b5132 2643 if ((operand->flags & PPC_OPERAND_CR) != 0)
13abbae3
AM		 2644 {
2645 cr_operand = TRUE;
2646 lex_type['%'] |= LEX_BEGIN_NAME;
2647 }
252b5132 2648 expression (&ex);
b34976b6 2649 cr_operand = FALSE;
13abbae3 2650 lex_type['%'] = save_lex;
252b5132
RH		 2651 }
2652 }
2653
2654 str = input_line_pointer;
2655 input_line_pointer = hold;
2656
2657 if (ex.X_op == O_illegal)
2658 as_bad (_("illegal operand"));
2659 else if (ex.X_op == O_absent)
2660 as_bad (_("missing operand"));
2661 else if (ex.X_op == O_register)
2662 {
2663 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2664 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2665 }
2666 else if (ex.X_op == O_constant)
2667 {
2668#ifdef OBJ_ELF
81d4177b 2669 /* Allow @HA, @L, @H on constants. */
252b5132
RH		 2670 char *orig_str = str;
2671
2672 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2673 switch (reloc)
2674 {
2675 default:
2676 str = orig_str;
2677 break;
2678
2679 case BFD_RELOC_LO16:
2680 /* X_unsigned is the default, so if the user has done
0baf16f2
AM		 2681 something which cleared it, we always produce a
2682 signed value. */
2683 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH		 2684 ex.X_add_number &= 0xffff;
2685 else
0baf16f2 2686 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2687 break;
2688
2689 case BFD_RELOC_HI16:
0baf16f2
AM		 2690 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2691 ex.X_add_number = PPC_HI (ex.X_add_number);
2692 else
2693 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH		 2694 break;
2695
2696 case BFD_RELOC_HI16_S:
0baf16f2
AM		 2697 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2698 ex.X_add_number = PPC_HA (ex.X_add_number);
2699 else
2700 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2701 break;
2702
0baf16f2
AM		 2703 case BFD_RELOC_PPC64_HIGHER:
2704 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2705 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2706 else
2707 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2708 break;
2709
2710 case BFD_RELOC_PPC64_HIGHER_S:
2711 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2712 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2713 else
2714 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2715 break;
0baf16f2
AM		 2716
2717 case BFD_RELOC_PPC64_HIGHEST:
2718 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2719 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2720 else
2721 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2722 break;
2723
2724 case BFD_RELOC_PPC64_HIGHEST_S:
2725 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2726 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2727 else
2728 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2729 break;
252b5132 2730 }
0baf16f2 2731#endif /* OBJ_ELF */
252b5132 2732 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2733 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2734 }
2735#ifdef OBJ_ELF
727fc41e 2736 else
252b5132 2737 {
727fc41e 2738 if (ex.X_op == O_symbol && str[0] == '(')
cdba85ec 2739 {
727fc41e
AM		 2740 const char *sym_name = S_GET_NAME (ex.X_add_symbol);
2741 if (sym_name[0] == '.')
2742 ++sym_name;
cdba85ec 2743
727fc41e 2744 if (strcasecmp (sym_name, "__tls_get_addr") == 0)
252b5132 2745 {
727fc41e
AM		 2746 expressionS tls_exp;
2747
2748 hold = input_line_pointer;
2749 input_line_pointer = str + 1;
2750 expression (&tls_exp);
2751 if (tls_exp.X_op == O_symbol)
2752 {
2753 reloc = BFD_RELOC_UNUSED;
2754 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0)
2755 {
2756 reloc = BFD_RELOC_PPC_TLSGD;
2757 input_line_pointer += 7;
2758 }
2759 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0)
2760 {
2761 reloc = BFD_RELOC_PPC_TLSLD;
2762 input_line_pointer += 7;
2763 }
2764 if (reloc != BFD_RELOC_UNUSED)
2765 {
2766 SKIP_WHITESPACE ();
2767 str = input_line_pointer;
2768
2769 if (fc >= MAX_INSN_FIXUPS)
2770 as_fatal (_("too many fixups"));
2771 fixups[fc].exp = tls_exp;
2772 fixups[fc].opindex = *opindex_ptr;
2773 fixups[fc].reloc = reloc;
2774 ++fc;
2775 }
2776 }
2777 input_line_pointer = hold;
252b5132
RH		 2778 }
2779 }
2780
727fc41e 2781 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
0baf16f2 2782 {
727fc41e 2783 /* Some TLS tweaks. */
0baf16f2
AM		 2784 switch (reloc)
2785 {
727fc41e 2786 default:
cdba85ec 2787 break;
727fc41e
AM		 2788
2789 case BFD_RELOC_PPC_TLS:
2d0f3896
AM		 2790 if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0))
2791 as_bad (_("@tls may not be used with \"%s\" operands"),
2792 opcode->name);
2793 else if (operand->shift != 11)
2794 as_bad (_("@tls may only be used in last operand"));
2795 else
2796 insn = ppc_insert_operand (insn, operand,
2797 ppc_obj64 ? 13 : 2,
2798 ppc_cpu, (char *) NULL, 0);
cdba85ec 2799 break;
727fc41e
AM		 2800
2801 /* We'll only use the 32 (or 64) bit form of these relocations
2802 in constants. Instructions get the 16 bit form. */
2803 case BFD_RELOC_PPC_DTPREL:
2804 reloc = BFD_RELOC_PPC_DTPREL16;
cdba85ec 2805 break;
727fc41e
AM		 2806 case BFD_RELOC_PPC_TPREL:
2807 reloc = BFD_RELOC_PPC_TPREL16;
0baf16f2
AM		 2808 break;
2809 }
727fc41e
AM		 2810
2811 /* For the absolute forms of branches, convert the PC
2812 relative form back into the absolute. */
2813 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2814 {
2815 switch (reloc)
2816 {
2817 case BFD_RELOC_PPC_B26:
2818 reloc = BFD_RELOC_PPC_BA26;
2819 break;
2820 case BFD_RELOC_PPC_B16:
2821 reloc = BFD_RELOC_PPC_BA16;
2822 break;
2823 case BFD_RELOC_PPC_B16_BRTAKEN:
2824 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2825 break;
2826 case BFD_RELOC_PPC_B16_BRNTAKEN:
2827 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2828 break;
2829 default:
2830 break;
2831 }
2832 }
2833
01efc3af
AM		 2834 switch (reloc)
2835 {
2836 case BFD_RELOC_PPC_TOC16:
2837 toc_reloc_types |= has_small_toc_reloc;
2838 break;
2839 case BFD_RELOC_PPC64_TOC16_LO:
2840 case BFD_RELOC_PPC64_TOC16_HI:
2841 case BFD_RELOC_PPC64_TOC16_HA:
2842 toc_reloc_types |= has_large_toc_reloc;
2843 break;
2844 default:
2845 break;
2846 }
2847
727fc41e
AM		 2848 if (ppc_obj64
2849 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
2850 {
2851 switch (reloc)
2852 {
2853 case BFD_RELOC_16:
2854 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2855 break;
2856 case BFD_RELOC_LO16:
2857 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2858 break;
2859 case BFD_RELOC_16_GOTOFF:
2860 reloc = BFD_RELOC_PPC64_GOT16_DS;
2861 break;
2862 case BFD_RELOC_LO16_GOTOFF:
2863 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2864 break;
2865 case BFD_RELOC_LO16_PLTOFF:
2866 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2867 break;
2868 case BFD_RELOC_16_BASEREL:
2869 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2870 break;
2871 case BFD_RELOC_LO16_BASEREL:
2872 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2873 break;
2874 case BFD_RELOC_PPC_TOC16:
2875 reloc = BFD_RELOC_PPC64_TOC16_DS;
2876 break;
2877 case BFD_RELOC_PPC64_TOC16_LO:
2878 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2879 break;
2880 case BFD_RELOC_PPC64_PLTGOT16:
2881 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2882 break;
2883 case BFD_RELOC_PPC64_PLTGOT16_LO:
2884 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2885 break;
2886 case BFD_RELOC_PPC_DTPREL16:
2887 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2888 break;
2889 case BFD_RELOC_PPC_DTPREL16_LO:
2890 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2891 break;
2892 case BFD_RELOC_PPC_TPREL16:
2893 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2894 break;
2895 case BFD_RELOC_PPC_TPREL16_LO:
2896 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2897 break;
2898 case BFD_RELOC_PPC_GOT_DTPREL16:
2899 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2900 case BFD_RELOC_PPC_GOT_TPREL16:
2901 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2902 break;
2903 default:
2904 as_bad (_("unsupported relocation for DS offset field"));
2905 break;
2906 }
2907 }
0baf16f2
AM		 2908 }
2909
252b5132
RH		 2910 /* We need to generate a fixup for this expression. */
2911 if (fc >= MAX_INSN_FIXUPS)
2912 as_fatal (_("too many fixups"));
2913 fixups[fc].exp = ex;
727fc41e 2914 fixups[fc].opindex = *opindex_ptr;
252b5132
RH		 2915 fixups[fc].reloc = reloc;
2916 ++fc;
2917 }
727fc41e 2918#else /* OBJ_ELF */
252b5132
RH		 2919 else
2920 {
2921 /* We need to generate a fixup for this expression. */
2922 if (fc >= MAX_INSN_FIXUPS)
2923 as_fatal (_("too many fixups"));
2924 fixups[fc].exp = ex;
2925 fixups[fc].opindex = *opindex_ptr;
2926 fixups[fc].reloc = BFD_RELOC_UNUSED;
2927 ++fc;
2928 }
727fc41e 2929#endif /* OBJ_ELF */
252b5132
RH		 2930
2931 if (need_paren)
2932 {
2933 endc = ')';
2934 need_paren = 0;
c3d65c1c
BE		 2935 /* If expecting more operands, then we want to see "),". */
2936 if (*str == endc && opindex_ptr[1] != 0)
2937 {
2938 do
2939 ++str;
2940 while (ISSPACE (*str));
2941 endc = ',';
2942 }
252b5132
RH		 2943 }
2944 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2945 {
2946 endc = '(';
2947 need_paren = 1;
2948 }
2949 else
2950 endc = ',';
2951
2952 /* The call to expression should have advanced str past any
2953 whitespace. */
2954 if (*str != endc
2955 && (endc != ',' || *str != '\0'))
2956 {
5a938047
AM		 2957 if (*str == '\0')
2958 as_bad (_("syntax error; end of line, expected `%c'"), endc);
2959 else
2960 as_bad (_("syntax error; found `%c', expected `%c'"), *str, endc);
252b5132
RH		 2961 break;
2962 }
2963
2964 if (*str != '\0')
2965 ++str;
2966 }
2967
3882b010 2968 while (ISSPACE (*str))
252b5132
RH		 2969 ++str;
2970
2971 if (*str != '\0')
2972 as_bad (_("junk at end of line: `%s'"), str);
2973
dc1d03fc 2974#ifdef OBJ_ELF
6a0c61b7 2975 /* Do we need/want a APUinfo section? */
e01d869a 2976 if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC)) != 0)
6a0c61b7
EZ		 2977 {
2978 /* These are all version "1". */
2979 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 2980 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 2981 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 2982 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 2983 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 2984 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 2985 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 2986 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 2987 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 2988 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 2989 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 2990 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 2991 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 2992 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
6a0c61b7 2993 }
dc1d03fc 2994#endif
6a0c61b7 2995
252b5132
RH		 2996 /* Write out the instruction. */
2997 f = frag_more (4);
09b935ac
AM		 2998 addr_mod = frag_now_fix () & 3;
2999 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
3000 as_bad (_("instruction address is not a multiple of 4"));
3001 frag_now->insn_addr = addr_mod;
3002 frag_now->has_code = 1;
252b5132
RH		 3003 md_number_to_chars (f, insn, 4);
3004
5d6f4f16
GK		 3005#ifdef OBJ_ELF
3006 dwarf2_emit_insn (4);
3007#endif
3008
252b5132
RH		 3009 /* Create any fixups. At this point we do not use a
3010 bfd_reloc_code_real_type, but instead just use the
3011 BFD_RELOC_UNUSED plus the operand index. This lets us easily
3012 handle fixups for any operand type, although that is admittedly
3013 not a very exciting feature. We pick a BFD reloc type in
55cf6793 3014 md_apply_fix. */
252b5132
RH		 3015 for (i = 0; i < fc; i++)
3016 {
252b5132
RH		 3017 if (fixups[i].reloc != BFD_RELOC_UNUSED)
3018 {
99a814a1 3019 reloc_howto_type *reloc_howto;
252b5132
RH		 3020 int size;
3021 int offset;
3022 fixS *fixP;
3023
99a814a1 3024 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 3025 if (!reloc_howto)
3026 abort ();
3027
3028 size = bfd_get_reloc_size (reloc_howto);
3029 offset = target_big_endian ? (4 - size) : 0;
3030
3031 if (size < 1 || size > 4)
bc805888 3032 abort ();
252b5132 3033
99a814a1
AM		 3034 fixP = fix_new_exp (frag_now,
3035 f - frag_now->fr_literal + offset,
3036 size,
3037 &fixups[i].exp,
3038 reloc_howto->pc_relative,
252b5132
RH		 3039 fixups[i].reloc);
3040
3041 /* Turn off complaints that the addend is too large for things like
3042 foo+100000@ha. */
3043 switch (fixups[i].reloc)
3044 {
3045 case BFD_RELOC_16_GOTOFF:
3046 case BFD_RELOC_PPC_TOC16:
3047 case BFD_RELOC_LO16:
3048 case BFD_RELOC_HI16:
3049 case BFD_RELOC_HI16_S:
0baf16f2 3050#ifdef OBJ_ELF
0baf16f2
AM		 3051 case BFD_RELOC_PPC64_HIGHER:
3052 case BFD_RELOC_PPC64_HIGHER_S:
3053 case BFD_RELOC_PPC64_HIGHEST:
3054 case BFD_RELOC_PPC64_HIGHEST_S:
0baf16f2 3055#endif
252b5132
RH		 3056 fixP->fx_no_overflow = 1;
3057 break;
3058 default:
3059 break;
3060 }
3061 }
3062 else
727fc41e
AM		 3063 {
3064 const struct powerpc_operand *operand;
3065
3066 operand = &powerpc_operands[fixups[i].opindex];
3067 fix_new_exp (frag_now,
3068 f - frag_now->fr_literal,
3069 4,
3070 &fixups[i].exp,
3071 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
3072 ((bfd_reloc_code_real_type)
3073 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
3074 }
252b5132
RH		 3075 }
3076}
3077
3078/* Handle a macro. Gather all the operands, transform them as
3079 described by the macro, and call md_assemble recursively. All the
3080 operands are separated by commas; we don't accept parentheses
3081 around operands here. */
3082
3083static void
98027b10 3084ppc_macro (char *str, const struct powerpc_macro *macro)
252b5132
RH		 3085{
3086 char *operands[10];
3087 unsigned int count;
3088 char *s;
3089 unsigned int len;
3090 const char *format;
db557034 3091 unsigned int arg;
252b5132
RH		 3092 char *send;
3093 char *complete;
3094
3095 /* Gather the users operands into the operands array. */
3096 count = 0;
3097 s = str;
3098 while (1)
3099 {
3100 if (count >= sizeof operands / sizeof operands[0])
3101 break;
3102 operands[count++] = s;
3103 s = strchr (s, ',');
3104 if (s == (char *) NULL)
3105 break;
3106 *s++ = '\0';
81d4177b 3107 }
252b5132
RH		 3108
3109 if (count != macro->operands)
3110 {
3111 as_bad (_("wrong number of operands"));
3112 return;
3113 }
3114
3115 /* Work out how large the string must be (the size is unbounded
3116 because it includes user input). */
3117 len = 0;
3118 format = macro->format;
3119 while (*format != '\0')
3120 {
3121 if (*format != '%')
3122 {
3123 ++len;
3124 ++format;
3125 }
3126 else
3127 {
3128 arg = strtol (format + 1, &send, 10);
db557034 3129 know (send != format && arg < count);
252b5132
RH		 3130 len += strlen (operands[arg]);
3131 format = send;
3132 }
3133 }
3134
3135 /* Put the string together. */
3136 complete = s = (char *) alloca (len + 1);
3137 format = macro->format;
3138 while (*format != '\0')
3139 {
3140 if (*format != '%')
3141 *s++ = *format++;
3142 else
3143 {
3144 arg = strtol (format + 1, &send, 10);
3145 strcpy (s, operands[arg]);
3146 s += strlen (s);
3147 format = send;
3148 }
3149 }
3150 *s = '\0';
3151
3152 /* Assemble the constructed instruction. */
3153 md_assemble (complete);
81d4177b 3154}
252b5132
RH		 3155\f
3156#ifdef OBJ_ELF
18ae9cc1 3157/* For ELF, add support for SHT_ORDERED. */
252b5132
RH		 3158
3159int
98027b10 3160ppc_section_type (char *str, size_t len)
252b5132 3161{
9de8d8f1
RH		 3162 if (len == 7 && strncmp (str, "ordered", 7) == 0)
3163 return SHT_ORDERED;
252b5132 3164
9de8d8f1 3165 return -1;
252b5132
RH		 3166}
3167
3168int
1239de13 3169ppc_section_flags (flagword flags, bfd_vma attr ATTRIBUTE_UNUSED, int type)
252b5132
RH		 3170{
3171 if (type == SHT_ORDERED)
3172 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
3173
252b5132
RH		 3174 return flags;
3175}
3176#endif /* OBJ_ELF */
3177
3178\f
3179/* Pseudo-op handling. */
3180
3181/* The .byte pseudo-op. This is similar to the normal .byte
3182 pseudo-op, but it can also take a single ASCII string. */
3183
3184static void
98027b10 3185ppc_byte (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3186{
3187 if (*input_line_pointer != '\"')
3188 {
3189 cons (1);
3190 return;
3191 }
3192
3193 /* Gather characters. A real double quote is doubled. Unusual
3194 characters are not permitted. */
3195 ++input_line_pointer;
3196 while (1)
3197 {
3198 char c;
3199
3200 c = *input_line_pointer++;
3201
3202 if (c == '\"')
3203 {
3204 if (*input_line_pointer != '\"')
3205 break;
3206 ++input_line_pointer;
3207 }
3208
3209 FRAG_APPEND_1_CHAR (c);
3210 }
3211
3212 demand_empty_rest_of_line ();
3213}
3214\f
3215#ifdef OBJ_XCOFF
3216
3217/* XCOFF specific pseudo-op handling. */
3218
3219/* This is set if we are creating a .stabx symbol, since we don't want
3220 to handle symbol suffixes for such symbols. */
b34976b6 3221static bfd_boolean ppc_stab_symbol;
252b5132
RH		 3222
3223/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3224 symbols in the .bss segment as though they were local common
67c1ffbe 3225 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 3226 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 3227
3228static void
98027b10 3229ppc_comm (int lcomm)
252b5132
RH		 3230{
3231 asection *current_seg = now_seg;
3232 subsegT current_subseg = now_subseg;
3233 char *name;
3234 char endc;
3235 char *end_name;
3236 offsetT size;
3237 offsetT align;
3238 symbolS *lcomm_sym = NULL;
3239 symbolS *sym;
3240 char *pfrag;
3241
3242 name = input_line_pointer;
3243 endc = get_symbol_end ();
3244 end_name = input_line_pointer;
3245 *end_name = endc;
3246
3247 if (*input_line_pointer != ',')
3248 {
3249 as_bad (_("missing size"));
3250 ignore_rest_of_line ();
3251 return;
3252 }
3253 ++input_line_pointer;
3254
3255 size = get_absolute_expression ();
3256 if (size < 0)
3257 {
3258 as_bad (_("negative size"));
3259 ignore_rest_of_line ();
3260 return;
3261 }
3262
3263 if (! lcomm)
3264 {
3265 /* The third argument to .comm is the alignment. */
3266 if (*input_line_pointer != ',')
1ad63b2f 3267 align = 2;
252b5132
RH		 3268 else
3269 {
3270 ++input_line_pointer;
3271 align = get_absolute_expression ();
3272 if (align <= 0)
3273 {
3274 as_warn (_("ignoring bad alignment"));
1ad63b2f 3275 align = 2;
252b5132
RH		 3276 }
3277 }
3278 }
3279 else
3280 {
3281 char *lcomm_name;
3282 char lcomm_endc;
3283
1ad63b2f 3284 if (size <= 4)
252b5132
RH		 3285 align = 2;
3286 else
3287 align = 3;
3288
3289 /* The third argument to .lcomm appears to be the real local
3290 common symbol to create. References to the symbol named in
3291 the first argument are turned into references to the third
3292 argument. */
3293 if (*input_line_pointer != ',')
3294 {
3295 as_bad (_("missing real symbol name"));
3296 ignore_rest_of_line ();
3297 return;
3298 }
3299 ++input_line_pointer;
3300
3301 lcomm_name = input_line_pointer;
3302 lcomm_endc = get_symbol_end ();
81d4177b 3303
252b5132
RH		 3304 lcomm_sym = symbol_find_or_make (lcomm_name);
3305
3306 *input_line_pointer = lcomm_endc;
3307 }
3308
3309 *end_name = '\0';
3310 sym = symbol_find_or_make (name);
3311 *end_name = endc;
3312
3313 if (S_IS_DEFINED (sym)
3314 || S_GET_VALUE (sym) != 0)
3315 {
3316 as_bad (_("attempt to redefine symbol"));
3317 ignore_rest_of_line ();
3318 return;
3319 }
81d4177b 3320
252b5132 3321 record_alignment (bss_section, align);
81d4177b 3322
252b5132
RH		 3323 if (! lcomm
3324 || ! S_IS_DEFINED (lcomm_sym))
3325 {
3326 symbolS *def_sym;
3327 offsetT def_size;
3328
3329 if (! lcomm)
3330 {
3331 def_sym = sym;
3332 def_size = size;
3333 S_SET_EXTERNAL (sym);
3334 }
3335 else
3336 {
809ffe0d 3337 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 3338 def_sym = lcomm_sym;
3339 def_size = 0;
3340 }
3341
3342 subseg_set (bss_section, 1);
3343 frag_align (align, 0, 0);
81d4177b 3344
809ffe0d 3345 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3346 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3347 def_size, (char *) NULL);
3348 *pfrag = 0;
3349 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3350 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3351 }
3352 else if (lcomm)
3353 {
3354 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3355 symbol_get_frag (lcomm_sym)->fr_offset =
3356 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3357 &~ ((1 << align) - 1));
809ffe0d
ILT		 3358 if (align > symbol_get_tc (lcomm_sym)->align)
3359 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3360 }
3361
3362 if (lcomm)
3363 {
3364 /* Make sym an offset from lcomm_sym. */
3365 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3366 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3367 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3368 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3369 }
3370
3371 subseg_set (current_seg, current_subseg);
3372
3373 demand_empty_rest_of_line ();
3374}
3375
3376/* The .csect pseudo-op. This switches us into a different
3377 subsegment. The first argument is a symbol whose value is the
3378 start of the .csect. In COFF, csect symbols get special aux
3379 entries defined by the x_csect field of union internal_auxent. The
3380 optional second argument is the alignment (the default is 2). */
3381
3382static void
98027b10 3383ppc_csect (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3384{
3385 char *name;
3386 char endc;
3387 symbolS *sym;
931e13a6 3388 offsetT align;
252b5132
RH		 3389
3390 name = input_line_pointer;
3391 endc = get_symbol_end ();
81d4177b 3392
252b5132
RH		 3393 sym = symbol_find_or_make (name);
3394
3395 *input_line_pointer = endc;
3396
3397 if (S_GET_NAME (sym)[0] == '\0')
3398 {
3399 /* An unnamed csect is assumed to be [PR]. */
96d56e9f 3400 symbol_get_tc (sym)->symbol_class = XMC_PR;
252b5132
RH		 3401 }
3402
931e13a6 3403 align = 2;
252b5132
RH		 3404 if (*input_line_pointer == ',')
3405 {
3406 ++input_line_pointer;
931e13a6 3407 align = get_absolute_expression ();
252b5132
RH		 3408 }
3409
931e13a6
AM		 3410 ppc_change_csect (sym, align);
3411
252b5132
RH		 3412 demand_empty_rest_of_line ();
3413}
3414
3415/* Change to a different csect. */
3416
3417static void
98027b10 3418ppc_change_csect (symbolS *sym, offsetT align)
252b5132
RH		 3419{
3420 if (S_IS_DEFINED (sym))
809ffe0d 3421 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3422 else
3423 {
3424 symbolS **list_ptr;
3425 int after_toc;
3426 int hold_chunksize;
3427 symbolS *list;
931e13a6
AM		 3428 int is_code;
3429 segT sec;
252b5132
RH		 3430
3431 /* This is a new csect. We need to look at the symbol class to
3432 figure out whether it should go in the text section or the
3433 data section. */
3434 after_toc = 0;
931e13a6 3435 is_code = 0;
96d56e9f 3436 switch (symbol_get_tc (sym)->symbol_class)
252b5132
RH		 3437 {
3438 case XMC_PR:
3439 case XMC_RO:
3440 case XMC_DB:
3441 case XMC_GL:
3442 case XMC_XO:
3443 case XMC_SV:
3444 case XMC_TI:
3445 case XMC_TB:
3446 S_SET_SEGMENT (sym, text_section);
809ffe0d 3447 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3448 ++ppc_text_subsegment;
3449 list_ptr = &ppc_text_csects;
931e13a6 3450 is_code = 1;
252b5132
RH		 3451 break;
3452 case XMC_RW:
3453 case XMC_TC0:
3454 case XMC_TC:
3455 case XMC_DS:
3456 case XMC_UA:
3457 case XMC_BS:
3458 case XMC_UC:
3459 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3460 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3461 == ppc_data_subsegment))
252b5132
RH		 3462 after_toc = 1;
3463 S_SET_SEGMENT (sym, data_section);
809ffe0d 3464 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3465 ++ppc_data_subsegment;
3466 list_ptr = &ppc_data_csects;
3467 break;
3468 default:
3469 abort ();
3470 }
3471
3472 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3473 changing subsegments, so that we don't use a lot of memory
3474 space for what may be a small section. */
252b5132
RH		 3475 hold_chunksize = chunksize;
3476 chunksize = 64;
3477
931e13a6
AM		 3478 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3479 symbol_get_tc (sym)->subseg);
252b5132
RH		 3480
3481 chunksize = hold_chunksize;
3482
3483 if (after_toc)
3484 ppc_after_toc_frag = frag_now;
3485
931e13a6
AM		 3486 record_alignment (sec, align);
3487 if (is_code)
3488 frag_align_code (align, 0);
3489 else
3490 frag_align (align, 0, 0);
3491
809ffe0d 3492 symbol_set_frag (sym, frag_now);
252b5132
RH		 3493 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3494
931e13a6 3495 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3496 symbol_get_tc (sym)->output = 1;
3497 symbol_get_tc (sym)->within = sym;
81d4177b 3498
252b5132 3499 for (list = *list_ptr;
809ffe0d
ILT		 3500 symbol_get_tc (list)->next != (symbolS *) NULL;
3501 list = symbol_get_tc (list)->next)
252b5132 3502 ;
809ffe0d 3503 symbol_get_tc (list)->next = sym;
81d4177b 3504
252b5132 3505 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3506 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3507 &symbol_lastP);
252b5132
RH		 3508 }
3509
3510 ppc_current_csect = sym;
3511}
3512
85645aed
TG		 3513static void
3514ppc_change_debug_section (unsigned int idx, subsegT subseg)
3515{
3516 segT sec;
3517 flagword oldflags;
3518 const struct xcoff_dwsect_name *dw = &xcoff_dwsect_names[idx];
3519
3520 sec = subseg_new (dw->name, subseg);
3521 oldflags = bfd_get_section_flags (stdoutput, sec);
3522 if (oldflags == SEC_NO_FLAGS)
3523 {
3524 /* Just created section. */
3525 gas_assert (dw_sections[idx].sect == NULL);
3526
3527 bfd_set_section_flags (stdoutput, sec, SEC_DEBUGGING);
3528 bfd_set_section_alignment (stdoutput, sec, 0);
3529 dw_sections[idx].sect = sec;
3530 }
3531
3532 /* Not anymore in a csect. */
3533 ppc_current_csect = NULL;
3534}
3535
3536/* The .dwsect pseudo-op. Defines a DWARF section. Syntax is:
3537 .dwsect flag [, opt-label ]
3538*/
3539
3540static void
3541ppc_dwsect (int ignore ATTRIBUTE_UNUSED)
3542{
3543 offsetT flag;
3544 symbolS *opt_label;
3545 const struct xcoff_dwsect_name *dw;
3546 struct dw_subsection *subseg;
3547 struct dw_section *dws;
3548 int i;
3549
3550 /* Find section. */
3551 flag = get_absolute_expression ();
3552 dw = NULL;
3553 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
3554 if (xcoff_dwsect_names[i].flag == flag)
3555 {
3556 dw = &xcoff_dwsect_names[i];
3557 break;
3558 }
3559
3560 /* Parse opt-label. */
3561 if (*input_line_pointer == ',')
3562 {
3563 const char *label;
3564 char c;
3565
3566 ++input_line_pointer;
3567
3568 label = input_line_pointer;
3569 c = get_symbol_end ();
3570 opt_label = symbol_find_or_make (label);
3571 *input_line_pointer = c;
3572 }
3573 else
3574 opt_label = NULL;
3575
3576 demand_empty_rest_of_line ();
3577
3578 /* Return now in case of unknown subsection. */
3579 if (dw == NULL)
3580 {
3581 as_bad (_("No known dwarf XCOFF section for flag 0x%08x\n"),
3582 (unsigned)flag);
3583 return;
3584 }
3585
3586 /* Find the subsection. */
3587 dws = &dw_sections[i];
3588 subseg = NULL;
3589 if (opt_label != NULL && S_IS_DEFINED (opt_label))
3590 {
3591 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */
3592 if (dws->sect == NULL || S_GET_SEGMENT (opt_label) != dws->sect)
3593 {
3594 as_bad (_("label %s was not defined in this dwarf section"),
3595 S_GET_NAME (opt_label));
3596 subseg = dws->anon_subseg;
3597 opt_label = NULL;
3598 }
3599 else
3600 subseg = symbol_get_tc (opt_label)->u.dw;
3601 }
3602
3603 if (subseg != NULL)
3604 {
3605 /* Switch to the subsection. */
3606 ppc_change_debug_section (i, subseg->subseg);
3607 }
3608 else
3609 {
3610 /* Create a new dw subsection. */
3611 subseg = (struct dw_subsection *)
3612 xmalloc (sizeof (struct dw_subsection));
3613
3614 if (opt_label == NULL)
3615 {
3616 /* The anonymous one. */
3617 subseg->subseg = 0;
3618 subseg->link = NULL;
3619 dws->anon_subseg = subseg;
3620 }
3621 else
3622 {
3623 /* A named one. */
3624 if (dws->list_subseg != NULL)
3625 subseg->subseg = dws->list_subseg->subseg + 1;
3626 else
3627 subseg->subseg = 1;
3628
3629 subseg->link = dws->list_subseg;
3630 dws->list_subseg = subseg;
3631 symbol_get_tc (opt_label)->u.dw = subseg;
3632 }
3633
3634 ppc_change_debug_section (i, subseg->subseg);
3635
3636 if (dw->def_size)
3637 {
3638 /* Add the length field. */
3639 expressionS *exp = &subseg->end_exp;
3640 int sz;
3641
3642 if (opt_label != NULL)
3643 symbol_set_value_now (opt_label);
3644
3645 /* Add the length field. Note that according to the AIX assembler
3646 manual, the size of the length field is 4 for powerpc32 but
3647 12 for powerpc64. */
3648 if (ppc_obj64)
3649 {
3650 /* Write the 64bit marker. */
3651 md_number_to_chars (frag_more (4), -1, 4);
3652 }
3653
3654 exp->X_op = O_subtract;
3655 exp->X_op_symbol = symbol_temp_new_now ();
3656 exp->X_add_symbol = symbol_temp_make ();
3657
3658 sz = ppc_obj64 ? 8 : 4;
3659 exp->X_add_number = -sz;
3660 emit_expr (exp, sz);
3661 }
3662 }
3663}
3664
252b5132
RH		 3665/* This function handles the .text and .data pseudo-ops. These
3666 pseudo-ops aren't really used by XCOFF; we implement them for the
3667 convenience of people who aren't used to XCOFF. */
3668
3669static void
98027b10 3670ppc_section (int type)
252b5132
RH		 3671{
3672 const char *name;
3673 symbolS *sym;
3674
3675 if (type == 't')
3676 name = ".text[PR]";
3677 else if (type == 'd')
3678 name = ".data[RW]";
3679 else
3680 abort ();
3681
3682 sym = symbol_find_or_make (name);
3683
931e13a6 3684 ppc_change_csect (sym, 2);
252b5132
RH		 3685
3686 demand_empty_rest_of_line ();
3687}
3688
3689/* This function handles the .section pseudo-op. This is mostly to
3690 give an error, since XCOFF only supports .text, .data and .bss, but
3691 we do permit the user to name the text or data section. */
3692
3693static void
98027b10 3694ppc_named_section (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3695{
3696 char *user_name;
3697 const char *real_name;
3698 char c;
3699 symbolS *sym;
3700
3701 user_name = input_line_pointer;
3702 c = get_symbol_end ();
3703
3704 if (strcmp (user_name, ".text") == 0)
3705 real_name = ".text[PR]";
3706 else if (strcmp (user_name, ".data") == 0)
3707 real_name = ".data[RW]";
3708 else
3709 {
3710 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3711 *input_line_pointer = c;
3712 ignore_rest_of_line ();
3713 return;
3714 }
3715
3716 *input_line_pointer = c;
3717
3718 sym = symbol_find_or_make (real_name);
3719
931e13a6 3720 ppc_change_csect (sym, 2);
252b5132
RH		 3721
3722 demand_empty_rest_of_line ();
3723}
3724
3725/* The .extern pseudo-op. We create an undefined symbol. */
3726
3727static void
98027b10 3728ppc_extern (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3729{
3730 char *name;
3731 char endc;
3732
3733 name = input_line_pointer;
3734 endc = get_symbol_end ();
3735
3736 (void) symbol_find_or_make (name);
3737
3738 *input_line_pointer = endc;
3739
3740 demand_empty_rest_of_line ();
3741}
3742
3743/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3744
3745static void
98027b10 3746ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3747{
3748 char *name;
3749 char endc;
3750 symbolS *sym;
3751
3752 name = input_line_pointer;
3753 endc = get_symbol_end ();
3754
3755 sym = symbol_find_or_make (name);
3756
3757 *input_line_pointer = endc;
3758
809ffe0d 3759 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3760
3761 demand_empty_rest_of_line ();
3762}
3763
c865e45b
RS		 3764/* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
3765 relocations at the beginning of the current csect.
3766
3767 (In principle, there's no reason why the relocations _have_ to be at
3768 the beginning. Anywhere in the csect would do. However, inserting
3769 at the beginning is what the native assmebler does, and it helps to
3770 deal with cases where the .ref statements follow the section contents.)
3771
3772 ??? .refs don't work for empty .csects. However, the native assembler
3773 doesn't report an error in this case, and neither yet do we. */
3774
3775static void
3776ppc_ref (int ignore ATTRIBUTE_UNUSED)
3777{
3778 char *name;
3779 char c;
3780
3781 if (ppc_current_csect == NULL)
3782 {
3783 as_bad (_(".ref outside .csect"));
3784 ignore_rest_of_line ();
3785 return;
3786 }
3787
3788 do
3789 {
3790 name = input_line_pointer;
3791 c = get_symbol_end ();
3792
3793 fix_at_start (symbol_get_frag (ppc_current_csect), 0,
3794 symbol_find_or_make (name), 0, FALSE, BFD_RELOC_NONE);
3795
3796 *input_line_pointer = c;
3797 SKIP_WHITESPACE ();
3798 c = *input_line_pointer;
3799 if (c == ',')
3800 {
3801 input_line_pointer++;
3802 SKIP_WHITESPACE ();
3803 if (is_end_of_line[(unsigned char) *input_line_pointer])
3804 {
3805 as_bad (_("missing symbol name"));
3806 ignore_rest_of_line ();
3807 return;
3808 }
3809 }
3810 }
3811 while (c == ',');
3812
3813 demand_empty_rest_of_line ();
3814}
3815
252b5132
RH		 3816/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3817 although I don't know why it bothers. */
3818
3819static void
98027b10 3820ppc_rename (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3821{
3822 char *name;
3823 char endc;
3824 symbolS *sym;
3825 int len;
3826
3827 name = input_line_pointer;
3828 endc = get_symbol_end ();
3829
3830 sym = symbol_find_or_make (name);
3831
3832 *input_line_pointer = endc;
3833
3834 if (*input_line_pointer != ',')
3835 {
3836 as_bad (_("missing rename string"));
3837 ignore_rest_of_line ();
3838 return;
3839 }
3840 ++input_line_pointer;
3841
809ffe0d 3842 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 3843
3844 demand_empty_rest_of_line ();
3845}
3846
3847/* The .stabx pseudo-op. This is similar to a normal .stabs
3848 pseudo-op, but slightly different. A sample is
3849 .stabx "main:F-1",.main,142,0
3850 The first argument is the symbol name to create. The second is the
3851 value, and the third is the storage class. The fourth seems to be
3852 always zero, and I am assuming it is the type. */
3853
3854static void
98027b10 3855ppc_stabx (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3856{
3857 char *name;
3858 int len;
3859 symbolS *sym;
3860 expressionS exp;
3861
3862 name = demand_copy_C_string (&len);
3863
3864 if (*input_line_pointer != ',')
3865 {
3866 as_bad (_("missing value"));
3867 return;
3868 }
3869 ++input_line_pointer;
3870
b34976b6 3871 ppc_stab_symbol = TRUE;
252b5132 3872 sym = symbol_make (name);
b34976b6 3873 ppc_stab_symbol = FALSE;
252b5132 3874
809ffe0d 3875 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 3876
3877 (void) expression (&exp);
3878
3879 switch (exp.X_op)
3880 {
3881 case O_illegal:
3882 case O_absent:
3883 case O_big:
3884 as_bad (_("illegal .stabx expression; zero assumed"));
3885 exp.X_add_number = 0;
3886 /* Fall through. */
3887 case O_constant:
3888 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 3889 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 3890 break;
3891
3892 case O_symbol:
3893 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 3894 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3895 else
3896 {
3897 S_SET_VALUE (sym,
3898 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 3899 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 3900 }
3901 break;
3902
3903 default:
3904 /* The value is some complex expression. This will probably
99a814a1
AM		 3905 fail at some later point, but this is probably the right
3906 thing to do here. */
809ffe0d 3907 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3908 break;
3909 }
3910
3911 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3912 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3913
3914 if (*input_line_pointer != ',')
3915 {
3916 as_bad (_("missing class"));
3917 return;
3918 }
3919 ++input_line_pointer;
3920
3921 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3922
3923 if (*input_line_pointer != ',')
3924 {
3925 as_bad (_("missing type"));
3926 return;
3927 }
3928 ++input_line_pointer;
3929
3930 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3931
809ffe0d 3932 symbol_get_tc (sym)->output = 1;
252b5132 3933
c734e7e3
TG		 3934 if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
3935 {
3936 /* In this case :
252b5132 3937
c734e7e3
TG		 3938 .bs name
3939 .stabx "z",arrays_,133,0
3940 .es
99a814a1 3941
c734e7e3 3942 .comm arrays_,13768,3
99a814a1 3943
c734e7e3
TG		 3944 resolve_symbol_value will copy the exp's "within" into sym's when the
3945 offset is 0. Since this seems to be corner case problem,
3946 only do the correction for storage class C_STSYM. A better solution
3947 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1 3948
c734e7e3
TG		 3949 if (exp.X_op == O_symbol)
3950 {
3951 if (ppc_current_block == NULL)
3952 as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
99a814a1 3953
c734e7e3
TG		 3954 symbol_get_tc (sym)->within = ppc_current_block;
3955 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3956 }
3957 }
99a814a1 3958
252b5132
RH		 3959 if (exp.X_op != O_symbol
3960 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3961 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3962 ppc_frob_label (sym);
3963 else
3964 {
3965 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3966 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3967 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3968 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 3969 }
3970
3971 demand_empty_rest_of_line ();
3972}
3973
3974/* The .function pseudo-op. This takes several arguments. The first
3975 argument seems to be the external name of the symbol. The second
67c1ffbe 3976 argument seems to be the label for the start of the function. gcc
252b5132
RH		 3977 uses the same name for both. I have no idea what the third and
3978 fourth arguments are meant to be. The optional fifth argument is
3979 an expression for the size of the function. In COFF this symbol
3980 gets an aux entry like that used for a csect. */
3981
3982static void
98027b10 3983ppc_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3984{
3985 char *name;
3986 char endc;
3987 char *s;
3988 symbolS *ext_sym;
3989 symbolS *lab_sym;
3990
3991 name = input_line_pointer;
3992 endc = get_symbol_end ();
3993
3994 /* Ignore any [PR] suffix. */
3995 name = ppc_canonicalize_symbol_name (name);
3996 s = strchr (name, '[');
3997 if (s != (char *) NULL
3998 && strcmp (s + 1, "PR]") == 0)
3999 *s = '\0';
4000
4001 ext_sym = symbol_find_or_make (name);
4002
4003 *input_line_pointer = endc;
4004
4005 if (*input_line_pointer != ',')
4006 {
4007 as_bad (_("missing symbol name"));
4008 ignore_rest_of_line ();
4009 return;
4010 }
4011 ++input_line_pointer;
4012
4013 name = input_line_pointer;
4014 endc = get_symbol_end ();
4015
4016 lab_sym = symbol_find_or_make (name);
4017
4018 *input_line_pointer = endc;
4019
4020 if (ext_sym != lab_sym)
4021 {
809ffe0d
ILT		 4022 expressionS exp;
4023
4024 exp.X_op = O_symbol;
4025 exp.X_add_symbol = lab_sym;
4026 exp.X_op_symbol = NULL;
4027 exp.X_add_number = 0;
4028 exp.X_unsigned = 0;
4029 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 4030 }
4031
96d56e9f
NC		 4032 if (symbol_get_tc (ext_sym)->symbol_class == -1)
4033 symbol_get_tc (ext_sym)->symbol_class = XMC_PR;
809ffe0d 4034 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 4035
4036 if (*input_line_pointer == ',')
4037 {
91d6fa6a 4038 expressionS exp;
252b5132
RH		 4039
4040 /* Ignore the third argument. */
4041 ++input_line_pointer;
91d6fa6a 4042 expression (& exp);
252b5132
RH		 4043 if (*input_line_pointer == ',')
4044 {
4045 /* Ignore the fourth argument. */
4046 ++input_line_pointer;
91d6fa6a 4047 expression (& exp);
252b5132
RH		 4048 if (*input_line_pointer == ',')
4049 {
4050 /* The fifth argument is the function size. */
4051 ++input_line_pointer;
85645aed
TG		 4052 symbol_get_tc (ext_sym)->u.size = symbol_new
4053 ("L0\001", absolute_section,(valueT) 0, &zero_address_frag);
4054 pseudo_set (symbol_get_tc (ext_sym)->u.size);
252b5132
RH		 4055 }
4056 }
4057 }
4058
4059 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4060 SF_SET_FUNCTION (ext_sym);
4061 SF_SET_PROCESS (ext_sym);
4062 coff_add_linesym (ext_sym);
4063
4064 demand_empty_rest_of_line ();
4065}
4066
4067/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 4068 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
4069 with the correct line number */
5d6255fe 4070
8642cce8 4071static symbolS *saved_bi_sym = 0;
252b5132
RH		 4072
4073static void
98027b10 4074ppc_bf (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4075{
4076 symbolS *sym;
4077
4078 sym = symbol_make (".bf");
4079 S_SET_SEGMENT (sym, text_section);
809ffe0d 4080 symbol_set_frag (sym, frag_now);
252b5132
RH		 4081 S_SET_VALUE (sym, frag_now_fix ());
4082 S_SET_STORAGE_CLASS (sym, C_FCN);
4083
4084 coff_line_base = get_absolute_expression ();
4085
4086 S_SET_NUMBER_AUXILIARY (sym, 1);
4087 SA_SET_SYM_LNNO (sym, coff_line_base);
4088
8642cce8 4089 /* Line number for bi. */
5d6255fe 4090 if (saved_bi_sym)
8642cce8
TR		 4091 {
4092 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
4093 saved_bi_sym = 0;
4094 }
5d6255fe 4095
8642cce8 4096
809ffe0d 4097 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4098
4099 ppc_frob_label (sym);
4100
4101 demand_empty_rest_of_line ();
4102}
4103
4104/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
4105 ".ef", except that the line number is absolute, not relative to the
4106 most recent ".bf" symbol. */
4107
4108static void
98027b10 4109ppc_ef (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4110{
4111 symbolS *sym;
4112
4113 sym = symbol_make (".ef");
4114 S_SET_SEGMENT (sym, text_section);
809ffe0d 4115 symbol_set_frag (sym, frag_now);
252b5132
RH		 4116 S_SET_VALUE (sym, frag_now_fix ());
4117 S_SET_STORAGE_CLASS (sym, C_FCN);
4118 S_SET_NUMBER_AUXILIARY (sym, 1);
4119 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 4120 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4121
4122 ppc_frob_label (sym);
4123
4124 demand_empty_rest_of_line ();
4125}
4126
4127/* The .bi and .ei pseudo-ops. These take a string argument and
4128 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 4129 the symbol list. The value of .bi will be know when the next .bf
4130 is encountered. */
252b5132
RH		 4131
4132static void
98027b10 4133ppc_biei (int ei)
252b5132
RH		 4134{
4135 static symbolS *last_biei;
4136
4137 char *name;
4138 int len;
4139 symbolS *sym;
4140 symbolS *look;
4141
4142 name = demand_copy_C_string (&len);
4143
4144 /* The value of these symbols is actually file offset. Here we set
4145 the value to the index into the line number entries. In
4146 ppc_frob_symbols we set the fix_line field, which will cause BFD
4147 to do the right thing. */
4148
4149 sym = symbol_make (name);
4150 /* obj-coff.c currently only handles line numbers correctly in the
4151 .text section. */
4152 S_SET_SEGMENT (sym, text_section);
4153 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 4154 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4155
4156 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 4157 symbol_get_tc (sym)->output = 1;
81d4177b 4158
8642cce8 4159 /* Save bi. */
5d6255fe 4160 if (ei)
8642cce8
TR		 4161 saved_bi_sym = 0;
4162 else
4163 saved_bi_sym = sym;
4164
252b5132
RH		 4165 for (look = last_biei ? last_biei : symbol_rootP;
4166 (look != (symbolS *) NULL
4167 && (S_GET_STORAGE_CLASS (look) == C_FILE
4168 || S_GET_STORAGE_CLASS (look) == C_BINCL
4169 || S_GET_STORAGE_CLASS (look) == C_EINCL));
4170 look = symbol_next (look))
4171 ;
4172 if (look != (symbolS *) NULL)
4173 {
4174 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4175 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
4176 last_biei = sym;
4177 }
4178
4179 demand_empty_rest_of_line ();
4180}
4181
4182/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
4183 There is one argument, which is a csect symbol. The value of the
4184 .bs symbol is the index of this csect symbol. */
4185
4186static void
98027b10 4187ppc_bs (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4188{
4189 char *name;
4190 char endc;
4191 symbolS *csect;
4192 symbolS *sym;
4193
4194 if (ppc_current_block != NULL)
4195 as_bad (_("nested .bs blocks"));
4196
4197 name = input_line_pointer;
4198 endc = get_symbol_end ();
4199
4200 csect = symbol_find_or_make (name);
4201
4202 *input_line_pointer = endc;
4203
4204 sym = symbol_make (".bs");
4205 S_SET_SEGMENT (sym, now_seg);
4206 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 4207 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4208 symbol_get_tc (sym)->output = 1;
252b5132 4209
809ffe0d 4210 symbol_get_tc (sym)->within = csect;
252b5132
RH		 4211
4212 ppc_frob_label (sym);
4213
4214 ppc_current_block = sym;
4215
4216 demand_empty_rest_of_line ();
4217}
4218
4219/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
4220
4221static void
98027b10 4222ppc_es (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4223{
4224 symbolS *sym;
4225
4226 if (ppc_current_block == NULL)
4227 as_bad (_(".es without preceding .bs"));
4228
4229 sym = symbol_make (".es");
4230 S_SET_SEGMENT (sym, now_seg);
4231 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 4232 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4233 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4234
4235 ppc_frob_label (sym);
4236
4237 ppc_current_block = NULL;
4238
4239 demand_empty_rest_of_line ();
4240}
4241
4242/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
4243 line number. */
4244
4245static void
98027b10 4246ppc_bb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4247{
4248 symbolS *sym;
4249
4250 sym = symbol_make (".bb");
4251 S_SET_SEGMENT (sym, text_section);
809ffe0d 4252 symbol_set_frag (sym, frag_now);
252b5132
RH		 4253 S_SET_VALUE (sym, frag_now_fix ());
4254 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4255
4256 S_SET_NUMBER_AUXILIARY (sym, 1);
4257 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4258
809ffe0d 4259 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4260
4261 SF_SET_PROCESS (sym);
4262
4263 ppc_frob_label (sym);
4264
4265 demand_empty_rest_of_line ();
4266}
4267
4268/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
4269 line number. */
4270
4271static void
98027b10 4272ppc_eb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4273{
4274 symbolS *sym;
4275
4276 sym = symbol_make (".eb");
4277 S_SET_SEGMENT (sym, text_section);
809ffe0d 4278 symbol_set_frag (sym, frag_now);
252b5132
RH		 4279 S_SET_VALUE (sym, frag_now_fix ());
4280 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4281 S_SET_NUMBER_AUXILIARY (sym, 1);
4282 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 4283 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4284
4285 SF_SET_PROCESS (sym);
4286
4287 ppc_frob_label (sym);
4288
4289 demand_empty_rest_of_line ();
4290}
4291
4292/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
4293 specified name. */
4294
4295static void
98027b10 4296ppc_bc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4297{
4298 char *name;
4299 int len;
4300 symbolS *sym;
4301
4302 name = demand_copy_C_string (&len);
4303 sym = symbol_make (name);
4304 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4305 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4306 S_SET_STORAGE_CLASS (sym, C_BCOMM);
4307 S_SET_VALUE (sym, 0);
809ffe0d 4308 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4309
4310 ppc_frob_label (sym);
4311
4312 demand_empty_rest_of_line ();
4313}
4314
4315/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
4316
4317static void
98027b10 4318ppc_ec (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4319{
4320 symbolS *sym;
4321
4322 sym = symbol_make (".ec");
4323 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4324 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4325 S_SET_STORAGE_CLASS (sym, C_ECOMM);
4326 S_SET_VALUE (sym, 0);
809ffe0d 4327 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4328
4329 ppc_frob_label (sym);
4330
4331 demand_empty_rest_of_line ();
4332}
4333
4334/* The .toc pseudo-op. Switch to the .toc subsegment. */
4335
4336static void
98027b10 4337ppc_toc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4338{
4339 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 4340 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 4341 else
4342 {
4343 subsegT subseg;
4344 symbolS *sym;
4345 symbolS *list;
81d4177b 4346
252b5132
RH		 4347 subseg = ppc_data_subsegment;
4348 ++ppc_data_subsegment;
4349
4350 subseg_new (segment_name (data_section), subseg);
4351 ppc_toc_frag = frag_now;
4352
4353 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 4354 symbol_set_frag (sym, frag_now);
252b5132
RH		 4355 S_SET_SEGMENT (sym, data_section);
4356 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 4357 symbol_get_tc (sym)->subseg = subseg;
4358 symbol_get_tc (sym)->output = 1;
4359 symbol_get_tc (sym)->within = sym;
252b5132
RH		 4360
4361 ppc_toc_csect = sym;
81d4177b 4362
252b5132 4363 for (list = ppc_data_csects;
809ffe0d
ILT		 4364 symbol_get_tc (list)->next != (symbolS *) NULL;
4365 list = symbol_get_tc (list)->next)
252b5132 4366 ;
809ffe0d 4367 symbol_get_tc (list)->next = sym;
252b5132
RH		 4368
4369 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4370 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
4371 &symbol_lastP);
252b5132
RH		 4372 }
4373
4374 ppc_current_csect = ppc_toc_csect;
4375
4376 demand_empty_rest_of_line ();
4377}
4378
4379/* The AIX assembler automatically aligns the operands of a .long or
4380 .short pseudo-op, and we want to be compatible. */
4381
4382static void
98027b10 4383ppc_xcoff_cons (int log_size)
252b5132
RH		 4384{
4385 frag_align (log_size, 0, 0);
4386 record_alignment (now_seg, log_size);
4387 cons (1 << log_size);
4388}
4389
4390static void
98027b10 4391ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
252b5132
RH		 4392{
4393 expressionS exp;
4394 int byte_count;
4395
4396 (void) expression (&exp);
4397
4398 if (exp.X_op != O_constant)
4399 {
4400 as_bad (_("non-constant byte count"));
4401 return;
4402 }
4403
4404 byte_count = exp.X_add_number;
4405
4406 if (*input_line_pointer != ',')
4407 {
4408 as_bad (_("missing value"));
4409 return;
4410 }
4411
4412 ++input_line_pointer;
4413 cons (byte_count);
4414}
4415
85645aed
TG		 4416void
4417ppc_xcoff_end (void)
4418{
4419 int i;
4420
4421 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
4422 {
4423 struct dw_section *dws = &dw_sections[i];
4424 struct dw_subsection *dwss;
4425
4426 if (dws->anon_subseg)
4427 {
4428 dwss = dws->anon_subseg;
4429 dwss->link = dws->list_subseg;
4430 }
4431 else
4432 dwss = dws->list_subseg;
4433
4434 for (; dwss != NULL; dwss = dwss->link)
4435 if (dwss->end_exp.X_add_symbol != NULL)
4436 {
4437 subseg_set (dws->sect, dwss->subseg);
4438 symbol_set_value_now (dwss->end_exp.X_add_symbol);
4439 }
4440 }
4441}
4442
252b5132 4443#endif /* OBJ_XCOFF */
0baf16f2 4444#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 4445\f
4446/* The .tc pseudo-op. This is used when generating either XCOFF or
4447 ELF. This takes two or more arguments.
4448
4449 When generating XCOFF output, the first argument is the name to
4450 give to this location in the toc; this will be a symbol with class
0baf16f2 4451 TC. The rest of the arguments are N-byte values to actually put at
252b5132 4452 this location in the TOC; often there is just one more argument, a
1049f94e 4453 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 4454 depends on target word size. A 32-bit target uses 4-byte values, a
4455 64-bit target uses 8-byte values.
252b5132
RH		 4456
4457 When not generating XCOFF output, the arguments are the same, but
4458 the first argument is simply ignored. */
4459
4460static void
98027b10 4461ppc_tc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4462{
4463#ifdef OBJ_XCOFF
4464
4465 /* Define the TOC symbol name. */
4466 {
4467 char *name;
4468 char endc;
4469 symbolS *sym;
4470
4471 if (ppc_toc_csect == (symbolS *) NULL
4472 || ppc_toc_csect != ppc_current_csect)
4473 {
4474 as_bad (_(".tc not in .toc section"));
4475 ignore_rest_of_line ();
4476 return;
4477 }
4478
4479 name = input_line_pointer;
4480 endc = get_symbol_end ();
4481
4482 sym = symbol_find_or_make (name);
4483
4484 *input_line_pointer = endc;
4485
4486 if (S_IS_DEFINED (sym))
4487 {
4488 symbolS *label;
4489
809ffe0d 4490 label = symbol_get_tc (ppc_current_csect)->within;
96d56e9f 4491 if (symbol_get_tc (label)->symbol_class != XMC_TC0)
252b5132
RH		 4492 {
4493 as_bad (_(".tc with no label"));
4494 ignore_rest_of_line ();
4495 return;
4496 }
4497
4498 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 4499 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 4500 S_SET_VALUE (label, S_GET_VALUE (sym));
4501
4502 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4503 ++input_line_pointer;
4504
4505 return;
4506 }
4507
4508 S_SET_SEGMENT (sym, now_seg);
809ffe0d 4509 symbol_set_frag (sym, frag_now);
252b5132 4510 S_SET_VALUE (sym, (valueT) frag_now_fix ());
96d56e9f 4511 symbol_get_tc (sym)->symbol_class = XMC_TC;
809ffe0d 4512 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4513
4514 ppc_frob_label (sym);
4515 }
4516
0baf16f2
AM		 4517#endif /* OBJ_XCOFF */
4518#ifdef OBJ_ELF
9c7977b3 4519 int align;
252b5132
RH		 4520
4521 /* Skip the TOC symbol name. */
4522 while (is_part_of_name (*input_line_pointer)
d13d4015 4523 || *input_line_pointer == ' '
252b5132
RH		 4524 || *input_line_pointer == '['
4525 || *input_line_pointer == ']'
4526 || *input_line_pointer == '{'
4527 || *input_line_pointer == '}')
4528 ++input_line_pointer;
4529
0baf16f2 4530 /* Align to a four/eight byte boundary. */
2b3c4602 4531 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 4532 frag_align (align, 0, 0);
4533 record_alignment (now_seg, align);
0baf16f2 4534#endif /* OBJ_ELF */
252b5132
RH		 4535
4536 if (*input_line_pointer != ',')
4537 demand_empty_rest_of_line ();
4538 else
4539 {
4540 ++input_line_pointer;
2b3c4602 4541 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 4542 }
4543}
0baf16f2
AM		 4544
4545/* Pseudo-op .machine. */
0baf16f2
AM		 4546
4547static void
98027b10 4548ppc_machine (int ignore ATTRIBUTE_UNUSED)
0baf16f2 4549{
69c040df
AM		 4550 char *cpu_string;
4551#define MAX_HISTORY 100
fa452fa6 4552 static ppc_cpu_t *cpu_history;
69c040df
AM		 4553 static int curr_hist;
4554
4555 SKIP_WHITESPACE ();
4556
4557 if (*input_line_pointer == '"')
4558 {
4559 int len;
4560 cpu_string = demand_copy_C_string (&len);
4561 }
4562 else
4563 {
4564 char c;
4565 cpu_string = input_line_pointer;
4566 c = get_symbol_end ();
4567 cpu_string = xstrdup (cpu_string);
4568 *input_line_pointer = c;
4569 }
4570
4571 if (cpu_string != NULL)
4572 {
fa452fa6 4573 ppc_cpu_t old_cpu = ppc_cpu;
69fe9ce5 4574 ppc_cpu_t new_cpu;
69c040df
AM		 4575 char *p;
4576
4577 for (p = cpu_string; *p != 0; p++)
4578 *p = TOLOWER (*p);
4579
4580 if (strcmp (cpu_string, "push") == 0)
4581 {
4582 if (cpu_history == NULL)
4583 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4584
4585 if (curr_hist >= MAX_HISTORY)
4586 as_bad (_(".machine stack overflow"));
4587 else
4588 cpu_history[curr_hist++] = ppc_cpu;
4589 }
4590 else if (strcmp (cpu_string, "pop") == 0)
4591 {
4592 if (curr_hist <= 0)
4593 as_bad (_(".machine stack underflow"));
4594 else
4595 ppc_cpu = cpu_history[--curr_hist];
4596 }
69fe9ce5
AM		 4597 else if ((new_cpu = ppc_parse_cpu (ppc_cpu, cpu_string)) != 0)
4598 ppc_cpu = new_cpu;
69c040df
AM		 4599 else
4600 as_bad (_("invalid machine `%s'"), cpu_string);
4601
4602 if (ppc_cpu != old_cpu)
4603 ppc_setup_opcodes ();
4604 }
4605
4606 demand_empty_rest_of_line ();
0baf16f2
AM		 4607}
4608
4609/* See whether a symbol is in the TOC section. */
4610
4611static int
98027b10 4612ppc_is_toc_sym (symbolS *sym)
0baf16f2
AM		 4613{
4614#ifdef OBJ_XCOFF
96d56e9f 4615 return symbol_get_tc (sym)->symbol_class == XMC_TC;
0baf16f2
AM		 4616#endif
4617#ifdef OBJ_ELF
4618 const char *sname = segment_name (S_GET_SEGMENT (sym));
2b3c4602 4619 if (ppc_obj64)
0baf16f2
AM		 4620 return strcmp (sname, ".toc") == 0;
4621 else
4622 return strcmp (sname, ".got") == 0;
4623#endif
4624}
4625#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 4626\f
4627#ifdef TE_PE
4628
99a814a1 4629/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 4630
4631/* Set the current section. */
4632static void
98027b10 4633ppc_set_current_section (segT new)
252b5132
RH		 4634{
4635 ppc_previous_section = ppc_current_section;
4636 ppc_current_section = new;
4637}
4638
4639/* pseudo-op: .previous
4640 behaviour: toggles the current section with the previous section.
4641 errors: None
99a814a1
AM		 4642 warnings: "No previous section" */
4643
252b5132 4644static void
98027b10 4645ppc_previous (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4646{
4647 symbolS *tmp;
4648
81d4177b 4649 if (ppc_previous_section == NULL)
252b5132 4650 {
99a814a1 4651 as_warn (_("No previous section to return to. Directive ignored."));
252b5132
RH		 4652 return;
4653 }
4654
99a814a1 4655 subseg_set (ppc_previous_section, 0);
252b5132 4656
99a814a1 4657 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 4658}
4659
4660/* pseudo-op: .pdata
4661 behaviour: predefined read only data section
b34976b6 4662 double word aligned
252b5132
RH		 4663 errors: None
4664 warnings: None
4665 initial: .section .pdata "adr3"
b34976b6 4666 a - don't know -- maybe a misprint
252b5132
RH		 4667 d - initialized data
4668 r - readable
4669 3 - double word aligned (that would be 4 byte boundary)
4670
4671 commentary:
4672 Tag index tables (also known as the function table) for exception
99a814a1 4673 handling, debugging, etc. */
252b5132 4674
252b5132 4675static void
98027b10 4676ppc_pdata (int ignore ATTRIBUTE_UNUSED)
252b5132 4677{
81d4177b 4678 if (pdata_section == 0)
252b5132
RH		 4679 {
4680 pdata_section = subseg_new (".pdata", 0);
81d4177b 4681
252b5132
RH		 4682 bfd_set_section_flags (stdoutput, pdata_section,
4683 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4684 | SEC_READONLY | SEC_DATA ));
81d4177b 4685
252b5132
RH		 4686 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4687 }
4688 else
4689 {
99a814a1 4690 pdata_section = subseg_new (".pdata", 0);
252b5132 4691 }
99a814a1 4692 ppc_set_current_section (pdata_section);
252b5132
RH		 4693}
4694
4695/* pseudo-op: .ydata
4696 behaviour: predefined read only data section
b34976b6 4697 double word aligned
252b5132
RH		 4698 errors: None
4699 warnings: None
4700 initial: .section .ydata "drw3"
b34976b6 4701 a - don't know -- maybe a misprint
252b5132
RH		 4702 d - initialized data
4703 r - readable
4704 3 - double word aligned (that would be 4 byte boundary)
4705 commentary:
4706 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 4707 debugging, etc. */
4708
252b5132 4709static void
98027b10 4710ppc_ydata (int ignore ATTRIBUTE_UNUSED)
252b5132 4711{
81d4177b 4712 if (ydata_section == 0)
252b5132
RH		 4713 {
4714 ydata_section = subseg_new (".ydata", 0);
4715 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 4716 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4717 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 4718
4719 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4720 }
4721 else
4722 {
4723 ydata_section = subseg_new (".ydata", 0);
4724 }
99a814a1 4725 ppc_set_current_section (ydata_section);
252b5132
RH		 4726}
4727
4728/* pseudo-op: .reldata
4729 behaviour: predefined read write data section
b34976b6 4730 double word aligned (4-byte)
252b5132
RH		 4731 FIXME: relocation is applied to it
4732 FIXME: what's the difference between this and .data?
4733 errors: None
4734 warnings: None
4735 initial: .section .reldata "drw3"
4736 d - initialized data
4737 r - readable
4738 w - writeable
4739 3 - double word aligned (that would be 8 byte boundary)
4740
4741 commentary:
4742 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 4743 function descriptors, etc. */
4744
252b5132 4745static void
98027b10 4746ppc_reldata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4747{
4748 if (reldata_section == 0)
4749 {
4750 reldata_section = subseg_new (".reldata", 0);
4751
4752 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 4753 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4754 | SEC_DATA));
252b5132
RH		 4755
4756 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4757 }
4758 else
4759 {
4760 reldata_section = subseg_new (".reldata", 0);
4761 }
99a814a1 4762 ppc_set_current_section (reldata_section);
252b5132
RH		 4763}
4764
4765/* pseudo-op: .rdata
4766 behaviour: predefined read only data section
b34976b6 4767 double word aligned
252b5132
RH		 4768 errors: None
4769 warnings: None
4770 initial: .section .rdata "dr3"
4771 d - initialized data
4772 r - readable
99a814a1
AM		 4773 3 - double word aligned (that would be 4 byte boundary) */
4774
252b5132 4775static void
98027b10 4776ppc_rdata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4777{
4778 if (rdata_section == 0)
4779 {
4780 rdata_section = subseg_new (".rdata", 0);
4781 bfd_set_section_flags (stdoutput, rdata_section,
4782 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4783 | SEC_READONLY | SEC_DATA ));
4784
4785 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4786 }
4787 else
4788 {
4789 rdata_section = subseg_new (".rdata", 0);
4790 }
99a814a1 4791 ppc_set_current_section (rdata_section);
252b5132
RH		 4792}
4793
4794/* pseudo-op: .ualong
81d4177b 4795 behaviour: much like .int, with the exception that no alignment is
b34976b6 4796 performed.
252b5132
RH		 4797 FIXME: test the alignment statement
4798 errors: None
99a814a1
AM		 4799 warnings: None */
4800
252b5132 4801static void
98027b10 4802ppc_ualong (int ignore ATTRIBUTE_UNUSED)
252b5132 4803{
99a814a1
AM		 4804 /* Try for long. */
4805 cons (4);
252b5132
RH		 4806}
4807
4808/* pseudo-op: .znop <symbol name>
4809 behaviour: Issue a nop instruction
b34976b6 4810 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 4811 the supplied symbol name.
4812 errors: None
99a814a1
AM		 4813 warnings: Missing symbol name */
4814
252b5132 4815static void
98027b10 4816ppc_znop (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4817{
4818 unsigned long insn;
4819 const struct powerpc_opcode *opcode;
4820 expressionS ex;
4821 char *f;
252b5132 4822 symbolS *sym;
252b5132
RH		 4823 char *symbol_name;
4824 char c;
4825 char *name;
4826 unsigned int exp;
4827 flagword flags;
4828 asection *sec;
4829
99a814a1 4830 /* Strip out the symbol name. */
252b5132
RH		 4831 symbol_name = input_line_pointer;
4832 c = get_symbol_end ();
4833
4834 name = xmalloc (input_line_pointer - symbol_name + 1);
4835 strcpy (name, symbol_name);
4836
4837 sym = symbol_find_or_make (name);
4838
4839 *input_line_pointer = c;
4840
4841 SKIP_WHITESPACE ();
4842
4843 /* Look up the opcode in the hash table. */
4844 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4845
99a814a1 4846 /* Stick in the nop. */
252b5132
RH		 4847 insn = opcode->opcode;
4848
4849 /* Write out the instruction. */
4850 f = frag_more (4);
4851 md_number_to_chars (f, insn, 4);
4852 fix_new (frag_now,
4853 f - frag_now->fr_literal,
4854 4,
4855 sym,
4856 0,
4857 0,
4858 BFD_RELOC_16_GOT_PCREL);
4859
4860}
4861
81d4177b
KH		 4862/* pseudo-op:
4863 behaviour:
4864 errors:
99a814a1
AM		 4865 warnings: */
4866
252b5132 4867static void
98027b10 4868ppc_pe_comm (int lcomm)
252b5132 4869{
98027b10
AM		 4870 char *name;
4871 char c;
4872 char *p;
252b5132 4873 offsetT temp;
98027b10 4874 symbolS *symbolP;
252b5132
RH		 4875 offsetT align;
4876
4877 name = input_line_pointer;
4878 c = get_symbol_end ();
4879
99a814a1 4880 /* just after name is now '\0'. */
252b5132
RH		 4881 p = input_line_pointer;
4882 *p = c;
4883 SKIP_WHITESPACE ();
4884 if (*input_line_pointer != ',')
4885 {
4886 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4887 ignore_rest_of_line ();
4888 return;
4889 }
4890
4891 input_line_pointer++; /* skip ',' */
4892 if ((temp = get_absolute_expression ()) < 0)
4893 {
4894 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4895 ignore_rest_of_line ();
4896 return;
4897 }
4898
4899 if (! lcomm)
4900 {
4901 /* The third argument to .comm is the alignment. */
4902 if (*input_line_pointer != ',')
4903 align = 3;
4904 else
4905 {
4906 ++input_line_pointer;
4907 align = get_absolute_expression ();
4908 if (align <= 0)
4909 {
4910 as_warn (_("ignoring bad alignment"));
4911 align = 3;
4912 }
4913 }
4914 }
4915
4916 *p = 0;
4917 symbolP = symbol_find_or_make (name);
4918
4919 *p = c;
4920 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4921 {
4922 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4923 S_GET_NAME (symbolP));
4924 ignore_rest_of_line ();
4925 return;
4926 }
4927
4928 if (S_GET_VALUE (symbolP))
4929 {
4930 if (S_GET_VALUE (symbolP) != (valueT) temp)
4931 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4932 S_GET_NAME (symbolP),
4933 (long) S_GET_VALUE (symbolP),
4934 (long) temp);
4935 }
4936 else
4937 {
4938 S_SET_VALUE (symbolP, (valueT) temp);
4939 S_SET_EXTERNAL (symbolP);
86ebace2 4940 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
252b5132
RH		 4941 }
4942
4943 demand_empty_rest_of_line ();
4944}
4945
4946/*
4947 * implement the .section pseudo op:
4948 * .section name {, "flags"}
4949 * ^ ^
4950 * | +--- optional flags: 'b' for bss
4951 * | 'i' for info
4952 * +-- section name 'l' for lib
4953 * 'n' for noload
4954 * 'o' for over
4955 * 'w' for data
4956 * 'd' (apparently m88k for data)
4957 * 'x' for text
4958 * But if the argument is not a quoted string, treat it as a
4959 * subsegment number.
4960 *
4961 * FIXME: this is a copy of the section processing from obj-coff.c, with
4962 * additions/changes for the moto-pas assembler support. There are three
4963 * categories:
4964 *
81d4177b 4965 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 4966 * setting bits that bfd probably neither understands or uses. The
4967 * correct approach (?) will have to incorporate extra fields attached
4968 * to the section to hold the system specific stuff. (krk)
4969 *
4970 * Section Contents:
4971 * 'a' - unknown - referred to in documentation, but no definition supplied
4972 * 'c' - section has code
4973 * 'd' - section has initialized data
4974 * 'u' - section has uninitialized data
4975 * 'i' - section contains directives (info)
4976 * 'n' - section can be discarded
4977 * 'R' - remove section at link time
4978 *
4979 * Section Protection:
4980 * 'r' - section is readable
4981 * 'w' - section is writeable
4982 * 'x' - section is executable
4983 * 's' - section is sharable
4984 *
4985 * Section Alignment:
4986 * '0' - align to byte boundary
4987 * '1' - align to halfword undary
4988 * '2' - align to word boundary
4989 * '3' - align to doubleword boundary
4990 * '4' - align to quadword boundary
4991 * '5' - align to 32 byte boundary
4992 * '6' - align to 64 byte boundary
4993 *
4994 */
4995
4996void
98027b10 4997ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
252b5132 4998{
99a814a1 4999 /* Strip out the section name. */
252b5132
RH		 5000 char *section_name;
5001 char c;
5002 char *name;
5003 unsigned int exp;
5004 flagword flags;
5005 segT sec;
5006 int align;
5007
5008 section_name = input_line_pointer;
5009 c = get_symbol_end ();
5010
5011 name = xmalloc (input_line_pointer - section_name + 1);
5012 strcpy (name, section_name);
5013
5014 *input_line_pointer = c;
5015
5016 SKIP_WHITESPACE ();
5017
5018 exp = 0;
5019 flags = SEC_NO_FLAGS;
5020
5021 if (strcmp (name, ".idata$2") == 0)
5022 {
5023 align = 0;
5024 }
5025 else if (strcmp (name, ".idata$3") == 0)
5026 {
5027 align = 0;
5028 }
5029 else if (strcmp (name, ".idata$4") == 0)
5030 {
5031 align = 2;
5032 }
5033 else if (strcmp (name, ".idata$5") == 0)
5034 {
5035 align = 2;
5036 }
5037 else if (strcmp (name, ".idata$6") == 0)
5038 {
5039 align = 1;
5040 }
5041 else
99a814a1
AM		 5042 /* Default alignment to 16 byte boundary. */
5043 align = 4;
252b5132
RH		 5044
5045 if (*input_line_pointer == ',')
5046 {
5047 ++input_line_pointer;
5048 SKIP_WHITESPACE ();
5049 if (*input_line_pointer != '"')
5050 exp = get_absolute_expression ();
5051 else
5052 {
5053 ++input_line_pointer;
5054 while (*input_line_pointer != '"'
5055 && ! is_end_of_line[(unsigned char) *input_line_pointer])
5056 {
5057 switch (*input_line_pointer)
5058 {
5059 /* Section Contents */
5060 case 'a': /* unknown */
5061 as_bad (_("Unsupported section attribute -- 'a'"));
5062 break;
5063 case 'c': /* code section */
81d4177b 5064 flags |= SEC_CODE;
252b5132
RH		 5065 break;
5066 case 'd': /* section has initialized data */
5067 flags |= SEC_DATA;
5068 break;
5069 case 'u': /* section has uninitialized data */
5070 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
5071 in winnt.h */
5072 flags |= SEC_ROM;
5073 break;
5074 case 'i': /* section contains directives (info) */
5075 /* FIXME: This is IMAGE_SCN_LNK_INFO
5076 in winnt.h */
5077 flags |= SEC_HAS_CONTENTS;
5078 break;
5079 case 'n': /* section can be discarded */
81d4177b 5080 flags &=~ SEC_LOAD;
252b5132
RH		 5081 break;
5082 case 'R': /* Remove section at link time */
5083 flags |= SEC_NEVER_LOAD;
5084 break;
8d452c78 5085#if IFLICT_BRAIN_DAMAGE
252b5132
RH		 5086 /* Section Protection */
5087 case 'r': /* section is readable */
5088 flags |= IMAGE_SCN_MEM_READ;
5089 break;
5090 case 'w': /* section is writeable */
5091 flags |= IMAGE_SCN_MEM_WRITE;
5092 break;
5093 case 'x': /* section is executable */
5094 flags |= IMAGE_SCN_MEM_EXECUTE;
5095 break;
5096 case 's': /* section is sharable */
5097 flags |= IMAGE_SCN_MEM_SHARED;
5098 break;
5099
5100 /* Section Alignment */
5101 case '0': /* align to byte boundary */
5102 flags |= IMAGE_SCN_ALIGN_1BYTES;
5103 align = 0;
5104 break;
5105 case '1': /* align to halfword boundary */
5106 flags |= IMAGE_SCN_ALIGN_2BYTES;
5107 align = 1;
5108 break;
5109 case '2': /* align to word boundary */
5110 flags |= IMAGE_SCN_ALIGN_4BYTES;
5111 align = 2;
5112 break;
5113 case '3': /* align to doubleword boundary */
5114 flags |= IMAGE_SCN_ALIGN_8BYTES;
5115 align = 3;
5116 break;
5117 case '4': /* align to quadword boundary */
5118 flags |= IMAGE_SCN_ALIGN_16BYTES;
5119 align = 4;
5120 break;
5121 case '5': /* align to 32 byte boundary */
5122 flags |= IMAGE_SCN_ALIGN_32BYTES;
5123 align = 5;
5124 break;
5125 case '6': /* align to 64 byte boundary */
5126 flags |= IMAGE_SCN_ALIGN_64BYTES;
5127 align = 6;
5128 break;
8d452c78 5129#endif
252b5132 5130 default:
99a814a1
AM		 5131 as_bad (_("unknown section attribute '%c'"),
5132 *input_line_pointer);
252b5132
RH		 5133 break;
5134 }
5135 ++input_line_pointer;
5136 }
5137 if (*input_line_pointer == '"')
5138 ++input_line_pointer;
5139 }
5140 }
5141
5142 sec = subseg_new (name, (subsegT) exp);
5143
99a814a1 5144 ppc_set_current_section (sec);
252b5132
RH		 5145
5146 if (flags != SEC_NO_FLAGS)
5147 {
5148 if (! bfd_set_section_flags (stdoutput, sec, flags))
5149 as_bad (_("error setting flags for \"%s\": %s"),
5150 bfd_section_name (stdoutput, sec),
5151 bfd_errmsg (bfd_get_error ()));
5152 }
5153
99a814a1 5154 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 5155}
5156
5157static void
98027b10 5158ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5159{
5160 char *name;
5161 char endc;
5162 symbolS *ext_sym;
5163
5164 name = input_line_pointer;
5165 endc = get_symbol_end ();
5166
5167 ext_sym = symbol_find_or_make (name);
5168
5169 *input_line_pointer = endc;
5170
5171 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
5172 SF_SET_FUNCTION (ext_sym);
5173 SF_SET_PROCESS (ext_sym);
5174 coff_add_linesym (ext_sym);
5175
5176 demand_empty_rest_of_line ();
5177}
5178
5179static void
98027b10 5180ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 5181{
5182 if (tocdata_section == 0)
5183 {
5184 tocdata_section = subseg_new (".tocd", 0);
99a814a1 5185 /* FIXME: section flags won't work. */
252b5132
RH		 5186 bfd_set_section_flags (stdoutput, tocdata_section,
5187 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 5188 | SEC_READONLY | SEC_DATA));
252b5132
RH		 5189
5190 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
5191 }
5192 else
5193 {
5194 rdata_section = subseg_new (".tocd", 0);
5195 }
5196
99a814a1 5197 ppc_set_current_section (tocdata_section);
252b5132
RH		 5198
5199 demand_empty_rest_of_line ();
5200}
5201
5202/* Don't adjust TOC relocs to use the section symbol. */
5203
5204int
98027b10 5205ppc_pe_fix_adjustable (fixS *fix)
252b5132
RH		 5206{
5207 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
5208}
5209
5210#endif
5211\f
5212#ifdef OBJ_XCOFF
5213
5214/* XCOFF specific symbol and file handling. */
5215
5216/* Canonicalize the symbol name. We use the to force the suffix, if
5217 any, to use square brackets, and to be in upper case. */
5218
5219char *
98027b10 5220ppc_canonicalize_symbol_name (char *name)
252b5132
RH		 5221{
5222 char *s;
5223
5224 if (ppc_stab_symbol)
5225 return name;
5226
5227 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
5228 ;
5229 if (*s != '\0')
5230 {
5231 char brac;
5232
5233 if (*s == '[')
5234 brac = ']';
5235 else
5236 {
5237 *s = '[';
5238 brac = '}';
5239 }
5240
5241 for (s++; *s != '\0' && *s != brac; s++)
3882b010 5242 *s = TOUPPER (*s);
252b5132
RH		 5243
5244 if (*s == '\0' || s[1] != '\0')
5245 as_bad (_("bad symbol suffix"));
5246
5247 *s = ']';
5248 }
5249
5250 return name;
5251}
5252
5253/* Set the class of a symbol based on the suffix, if any. This is
5254 called whenever a new symbol is created. */
5255
5256void
98027b10 5257ppc_symbol_new_hook (symbolS *sym)
252b5132 5258{
809ffe0d 5259 struct ppc_tc_sy *tc;
252b5132
RH		 5260 const char *s;
5261
809ffe0d
ILT		 5262 tc = symbol_get_tc (sym);
5263 tc->next = NULL;
5264 tc->output = 0;
96d56e9f 5265 tc->symbol_class = -1;
809ffe0d
ILT		 5266 tc->real_name = NULL;
5267 tc->subseg = 0;
5268 tc->align = 0;
85645aed
TG		 5269 tc->u.size = NULL;
5270 tc->u.dw = NULL;
809ffe0d 5271 tc->within = NULL;
252b5132
RH		 5272
5273 if (ppc_stab_symbol)
5274 return;
5275
5276 s = strchr (S_GET_NAME (sym), '[');
5277 if (s == (const char *) NULL)
5278 {
5279 /* There is no suffix. */
5280 return;
5281 }
5282
5283 ++s;
5284
5285 switch (s[0])
5286 {
5287 case 'B':
5288 if (strcmp (s, "BS]") == 0)
96d56e9f 5289 tc->symbol_class = XMC_BS;
252b5132
RH		 5290 break;
5291 case 'D':
5292 if (strcmp (s, "DB]") == 0)
96d56e9f 5293 tc->symbol_class = XMC_DB;
252b5132 5294 else if (strcmp (s, "DS]") == 0)
96d56e9f 5295 tc->symbol_class = XMC_DS;
252b5132
RH		 5296 break;
5297 case 'G':
5298 if (strcmp (s, "GL]") == 0)
96d56e9f 5299 tc->symbol_class = XMC_GL;
252b5132
RH		 5300 break;
5301 case 'P':
5302 if (strcmp (s, "PR]") == 0)
96d56e9f 5303 tc->symbol_class = XMC_PR;
252b5132
RH		 5304 break;
5305 case 'R':
5306 if (strcmp (s, "RO]") == 0)
96d56e9f 5307 tc->symbol_class = XMC_RO;
252b5132 5308 else if (strcmp (s, "RW]") == 0)
96d56e9f 5309 tc->symbol_class = XMC_RW;
252b5132
RH		 5310 break;
5311 case 'S':
5312 if (strcmp (s, "SV]") == 0)
96d56e9f 5313 tc->symbol_class = XMC_SV;
252b5132
RH		 5314 break;
5315 case 'T':
5316 if (strcmp (s, "TC]") == 0)
96d56e9f 5317 tc->symbol_class = XMC_TC;
252b5132 5318 else if (strcmp (s, "TI]") == 0)
96d56e9f 5319 tc->symbol_class = XMC_TI;
252b5132 5320 else if (strcmp (s, "TB]") == 0)
96d56e9f 5321 tc->symbol_class = XMC_TB;
252b5132 5322 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
96d56e9f 5323 tc->symbol_class = XMC_TC0;
252b5132
RH		 5324 break;
5325 case 'U':
5326 if (strcmp (s, "UA]") == 0)
96d56e9f 5327 tc->symbol_class = XMC_UA;
252b5132 5328 else if (strcmp (s, "UC]") == 0)
96d56e9f 5329 tc->symbol_class = XMC_UC;
252b5132
RH		 5330 break;
5331 case 'X':
5332 if (strcmp (s, "XO]") == 0)
96d56e9f 5333 tc->symbol_class = XMC_XO;
252b5132
RH		 5334 break;
5335 }
5336
96d56e9f 5337 if (tc->symbol_class == -1)
252b5132
RH		 5338 as_bad (_("Unrecognized symbol suffix"));
5339}
5340
5341/* Set the class of a label based on where it is defined. This
5342 handles symbols without suffixes. Also, move the symbol so that it
5343 follows the csect symbol. */
5344
5345void
98027b10 5346ppc_frob_label (symbolS *sym)
252b5132
RH		 5347{
5348 if (ppc_current_csect != (symbolS *) NULL)
5349 {
96d56e9f
NC		 5350 if (symbol_get_tc (sym)->symbol_class == -1)
5351 symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class;
252b5132
RH		 5352
5353 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 5354 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
5355 &symbol_rootP, &symbol_lastP);
5356 symbol_get_tc (ppc_current_csect)->within = sym;
2fb4b302 5357 symbol_get_tc (sym)->within = ppc_current_csect;
252b5132 5358 }
07a53e5c
RH		 5359
5360#ifdef OBJ_ELF
5361 dwarf2_emit_label (sym);
5362#endif
252b5132
RH		 5363}
5364
5365/* This variable is set by ppc_frob_symbol if any absolute symbols are
5366 seen. It tells ppc_adjust_symtab whether it needs to look through
5367 the symbols. */
5368
b34976b6 5369static bfd_boolean ppc_saw_abs;
252b5132
RH		 5370
5371/* Change the name of a symbol just before writing it out. Set the
5372 real name if the .rename pseudo-op was used. Otherwise, remove any
5373 class suffix. Return 1 if the symbol should not be included in the
5374 symbol table. */
5375
5376int
98027b10 5377ppc_frob_symbol (symbolS *sym)
252b5132
RH		 5378{
5379 static symbolS *ppc_last_function;
5380 static symbolS *set_end;
5381
5382 /* Discard symbols that should not be included in the output symbol
5383 table. */
809ffe0d
ILT		 5384 if (! symbol_used_in_reloc_p (sym)
5385 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 5386 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5387 && ! symbol_get_tc (sym)->output
252b5132
RH		 5388 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
5389 return 1;
5390
a161fe53
AM		 5391 /* This one will disappear anyway. Don't make a csect sym for it. */
5392 if (sym == abs_section_sym)
5393 return 1;
5394
809ffe0d
ILT		 5395 if (symbol_get_tc (sym)->real_name != (char *) NULL)
5396 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 5397 else
5398 {
5399 const char *name;
5400 const char *s;
5401
5402 name = S_GET_NAME (sym);
5403 s = strchr (name, '[');
5404 if (s != (char *) NULL)
5405 {
5406 unsigned int len;
5407 char *snew;
5408
5409 len = s - name;
5410 snew = xmalloc (len + 1);
5411 memcpy (snew, name, len);
5412 snew[len] = '\0';
5413
5414 S_SET_NAME (sym, snew);
5415 }
5416 }
5417
5418 if (set_end != (symbolS *) NULL)
5419 {
5420 SA_SET_SYM_ENDNDX (set_end, sym);
5421 set_end = NULL;
5422 }
5423
5424 if (SF_GET_FUNCTION (sym))
5425 {
5426 if (ppc_last_function != (symbolS *) NULL)
5427 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5428 ppc_last_function = sym;
85645aed 5429 if (symbol_get_tc (sym)->u.size != (symbolS *) NULL)
252b5132 5430 {
85645aed 5431 resolve_symbol_value (symbol_get_tc (sym)->u.size);
809ffe0d 5432 SA_SET_SYM_FSIZE (sym,
85645aed 5433 (long) S_GET_VALUE (symbol_get_tc (sym)->u.size));
252b5132
RH		 5434 }
5435 }
5436 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5437 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5438 {
5439 if (ppc_last_function == (symbolS *) NULL)
5440 as_bad (_(".ef with no preceding .function"));
5441 else
5442 {
5443 set_end = ppc_last_function;
5444 ppc_last_function = NULL;
5445
5446 /* We don't have a C_EFCN symbol, but we need to force the
5447 COFF backend to believe that it has seen one. */
5448 coff_last_function = NULL;
5449 }
5450 }
5451
670ec21d 5452 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5453 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 5454 && S_GET_STORAGE_CLASS (sym) != C_FILE
5455 && S_GET_STORAGE_CLASS (sym) != C_FCN
5456 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5457 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5458 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5459 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5460 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5461 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5462 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5463
5464 if (S_GET_STORAGE_CLASS (sym) == C_EXT
8602d4fe 5465 || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT
252b5132
RH		 5466 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5467 {
5468 int i;
5469 union internal_auxent *a;
5470
5471 /* Create a csect aux. */
5472 i = S_GET_NUMBER_AUXILIARY (sym);
5473 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d 5474 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
96d56e9f 5475 if (symbol_get_tc (sym)->symbol_class == XMC_TC0)
252b5132
RH		 5476 {
5477 /* This is the TOC table. */
5478 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5479 a->x_csect.x_scnlen.l = 0;
5480 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5481 }
809ffe0d 5482 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 5483 {
5484 /* This is a csect symbol. x_scnlen is the size of the
5485 csect. */
809ffe0d 5486 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 5487 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5488 S_GET_SEGMENT (sym))
5489 - S_GET_VALUE (sym));
5490 else
5491 {
6386f3a7 5492 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 5493 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 5494 - S_GET_VALUE (sym));
5495 }
809ffe0d 5496 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 5497 }
5498 else if (S_GET_SEGMENT (sym) == bss_section)
5499 {
5500 /* This is a common symbol. */
809ffe0d
ILT		 5501 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5502 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 5503 if (S_IS_EXTERNAL (sym))
96d56e9f 5504 symbol_get_tc (sym)->symbol_class = XMC_RW;
252b5132 5505 else
96d56e9f 5506 symbol_get_tc (sym)->symbol_class = XMC_BS;
252b5132
RH		 5507 }
5508 else if (S_GET_SEGMENT (sym) == absolute_section)
5509 {
5510 /* This is an absolute symbol. The csect will be created by
99a814a1 5511 ppc_adjust_symtab. */
b34976b6 5512 ppc_saw_abs = TRUE;
252b5132 5513 a->x_csect.x_smtyp = XTY_LD;
96d56e9f
NC		 5514 if (symbol_get_tc (sym)->symbol_class == -1)
5515 symbol_get_tc (sym)->symbol_class = XMC_XO;
252b5132
RH		 5516 }
5517 else if (! S_IS_DEFINED (sym))
5518 {
5519 /* This is an external symbol. */
5520 a->x_csect.x_scnlen.l = 0;
5521 a->x_csect.x_smtyp = XTY_ER;
5522 }
96d56e9f 5523 else if (symbol_get_tc (sym)->symbol_class == XMC_TC)
252b5132
RH		 5524 {
5525 symbolS *next;
5526
5527 /* This is a TOC definition. x_scnlen is the size of the
5528 TOC entry. */
5529 next = symbol_next (sym);
96d56e9f 5530 while (symbol_get_tc (next)->symbol_class == XMC_TC0)
252b5132
RH		 5531 next = symbol_next (next);
5532 if (next == (symbolS *) NULL
96d56e9f 5533 || symbol_get_tc (next)->symbol_class != XMC_TC)
252b5132
RH		 5534 {
5535 if (ppc_after_toc_frag == (fragS *) NULL)
5536 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5537 data_section)
5538 - S_GET_VALUE (sym));
5539 else
5540 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5541 - S_GET_VALUE (sym));
5542 }
5543 else
5544 {
6386f3a7 5545 resolve_symbol_value (next);
252b5132
RH		 5546 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5547 - S_GET_VALUE (sym));
5548 }
5549 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5550 }
5551 else
5552 {
5553 symbolS *csect;
5554
5555 /* This is a normal symbol definition. x_scnlen is the
5556 symbol index of the containing csect. */
5557 if (S_GET_SEGMENT (sym) == text_section)
5558 csect = ppc_text_csects;
5559 else if (S_GET_SEGMENT (sym) == data_section)
5560 csect = ppc_data_csects;
5561 else
5562 abort ();
5563
5564 /* Skip the initial dummy symbol. */
809ffe0d 5565 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5566
5567 if (csect == (symbolS *) NULL)
5568 {
5569 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5570 a->x_csect.x_scnlen.l = 0;
5571 }
5572 else
5573 {
809ffe0d 5574 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5575 {
6386f3a7 5576 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5577 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5578 > S_GET_VALUE (sym))
252b5132 5579 break;
809ffe0d 5580 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5581 }
5582
809ffe0d
ILT		 5583 a->x_csect.x_scnlen.p =
5584 coffsymbol (symbol_get_bfdsym (csect))->native;
5585 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5586 1;
252b5132
RH		 5587 }
5588 a->x_csect.x_smtyp = XTY_LD;
5589 }
81d4177b 5590
252b5132
RH		 5591 a->x_csect.x_parmhash = 0;
5592 a->x_csect.x_snhash = 0;
96d56e9f 5593 if (symbol_get_tc (sym)->symbol_class == -1)
252b5132
RH		 5594 a->x_csect.x_smclas = XMC_PR;
5595 else
96d56e9f 5596 a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class;
252b5132
RH		 5597 a->x_csect.x_stab = 0;
5598 a->x_csect.x_snstab = 0;
5599
5600 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5601 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5602 }
5603 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5604 {
5605 /* We want the value to be the symbol index of the referenced
5606 csect symbol. BFD will do that for us if we set the right
5607 flags. */
b782de16
AM		 5608 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5609 combined_entry_type *c = coffsymbol (bsym)->native;
5610
5611 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5612 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5613 }
5614 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5615 {
5616 symbolS *block;
c734e7e3 5617 valueT base;
252b5132 5618
809ffe0d 5619 block = symbol_get_tc (sym)->within;
c734e7e3
TG		 5620 if (block)
5621 {
5622 /* The value is the offset from the enclosing csect. */
5623 symbolS *csect;
5624
5625 csect = symbol_get_tc (block)->within;
5626 resolve_symbol_value (csect);
5627 base = S_GET_VALUE (csect);
5628 }
5629 else
5630 base = 0;
5631
5632 S_SET_VALUE (sym, S_GET_VALUE (sym) - base);
252b5132
RH		 5633 }
5634 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5635 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5636 {
5637 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 5638 BFD will do that for us if we set the right flags. We have
5639 already set the value correctly. */
809ffe0d 5640 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 5641 }
5642
5643 return 0;
5644}
5645
5646/* Adjust the symbol table. This creates csect symbols for all
5647 absolute symbols. */
5648
5649void
98027b10 5650ppc_adjust_symtab (void)
252b5132
RH		 5651{
5652 symbolS *sym;
5653
5654 if (! ppc_saw_abs)
5655 return;
5656
5657 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5658 {
5659 symbolS *csect;
5660 int i;
5661 union internal_auxent *a;
5662
5663 if (S_GET_SEGMENT (sym) != absolute_section)
5664 continue;
5665
5666 csect = symbol_create (".abs[XO]", absolute_section,
5667 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5668 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 5669 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5670 i = S_GET_NUMBER_AUXILIARY (csect);
5671 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5672 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 5673 a->x_csect.x_scnlen.l = 0;
5674 a->x_csect.x_smtyp = XTY_SD;
5675 a->x_csect.x_parmhash = 0;
5676 a->x_csect.x_snhash = 0;
5677 a->x_csect.x_smclas = XMC_XO;
5678 a->x_csect.x_stab = 0;
5679 a->x_csect.x_snstab = 0;
5680
5681 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5682
5683 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 5684 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5685 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5686 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 5687 }
5688
b34976b6 5689 ppc_saw_abs = FALSE;
252b5132
RH		 5690}
5691
5692/* Set the VMA for a section. This is called on all the sections in
5693 turn. */
5694
5695void
98027b10 5696ppc_frob_section (asection *sec)
252b5132 5697{
931e13a6 5698 static bfd_vma vma = 0;
252b5132 5699
85645aed
TG		 5700 /* Dwarf sections start at 0. */
5701 if (bfd_get_section_flags (NULL, sec) & SEC_DEBUGGING)
5702 return;
5703
931e13a6 5704 vma = md_section_align (sec, vma);
252b5132
RH		 5705 bfd_set_section_vma (stdoutput, sec, vma);
5706 vma += bfd_section_size (stdoutput, sec);
5707}
5708
5709#endif /* OBJ_XCOFF */
5710\f
252b5132 5711char *
98027b10 5712md_atof (int type, char *litp, int *sizep)
252b5132 5713{
499ac353 5714 return ieee_md_atof (type, litp, sizep, target_big_endian);
252b5132
RH		 5715}
5716
5717/* Write a value out to the object file, using the appropriate
5718 endianness. */
5719
5720void
98027b10 5721md_number_to_chars (char *buf, valueT val, int n)
252b5132
RH		 5722{
5723 if (target_big_endian)
5724 number_to_chars_bigendian (buf, val, n);
5725 else
5726 number_to_chars_littleendian (buf, val, n);
5727}
5728
5729/* Align a section (I don't know why this is machine dependent). */
5730
5731valueT
3aeeedbb 5732md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
252b5132 5733{
3aeeedbb
AM		 5734#ifdef OBJ_ELF
5735 return addr;
5736#else
252b5132
RH		 5737 int align = bfd_get_section_alignment (stdoutput, seg);
5738
5739 return ((addr + (1 << align) - 1) & (-1 << align));
3aeeedbb 5740#endif
252b5132
RH		 5741}
5742
5743/* We don't have any form of relaxing. */
5744
5745int
98027b10
AM		 5746md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
5747 asection *seg ATTRIBUTE_UNUSED)
252b5132
RH		 5748{
5749 abort ();
5750 return 0;
5751}
5752
5753/* Convert a machine dependent frag. We never generate these. */
5754
5755void
98027b10
AM		 5756md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
5757 asection *sec ATTRIBUTE_UNUSED,
5758 fragS *fragp ATTRIBUTE_UNUSED)
252b5132
RH		 5759{
5760 abort ();
5761}
5762
5763/* We have no need to default values of symbols. */
5764
252b5132 5765symbolS *
98027b10 5766md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
252b5132
RH		 5767{
5768 return 0;
5769}
5770\f
5771/* Functions concerning relocs. */
5772
5773/* The location from which a PC relative jump should be calculated,
5774 given a PC relative reloc. */
5775
5776long
98027b10 5777md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
252b5132
RH		 5778{
5779 return fixp->fx_frag->fr_address + fixp->fx_where;
5780}
5781
5782#ifdef OBJ_XCOFF
5783
5784/* This is called to see whether a fixup should be adjusted to use a
5785 section symbol. We take the opportunity to change a fixup against
5786 a symbol in the TOC subsegment into a reloc against the
5787 corresponding .tc symbol. */
5788
5789int
98027b10 5790ppc_fix_adjustable (fixS *fix)
252b5132 5791{
b782de16
AM		 5792 valueT val = resolve_symbol_value (fix->fx_addsy);
5793 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5794 TC_SYMFIELD_TYPE *tc;
5795
5796 if (symseg == absolute_section)
5797 return 0;
252b5132 5798
85645aed
TG		 5799 /* Always adjust symbols in debugging sections. */
5800 if (bfd_get_section_flags (stdoutput, symseg) & SEC_DEBUGGING)
5801 return 1;
5802
252b5132 5803 if (ppc_toc_csect != (symbolS *) NULL
252b5132 5804 && fix->fx_addsy != ppc_toc_csect
b782de16 5805 && symseg == data_section
252b5132
RH		 5806 && val >= ppc_toc_frag->fr_address
5807 && (ppc_after_toc_frag == (fragS *) NULL
5808 || val < ppc_after_toc_frag->fr_address))
5809 {
5810 symbolS *sy;
5811
5812 for (sy = symbol_next (ppc_toc_csect);
5813 sy != (symbolS *) NULL;
5814 sy = symbol_next (sy))
5815 {
b782de16
AM		 5816 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5817
96d56e9f 5818 if (sy_tc->symbol_class == XMC_TC0)
252b5132 5819 continue;
96d56e9f 5820 if (sy_tc->symbol_class != XMC_TC)
252b5132 5821 break;
b782de16 5822 if (val == resolve_symbol_value (sy))
252b5132
RH		 5823 {
5824 fix->fx_addsy = sy;
5825 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5826 return 0;
5827 }
5828 }
5829
5830 as_bad_where (fix->fx_file, fix->fx_line,
5831 _("symbol in .toc does not match any .tc"));
5832 }
5833
5834 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 5835 tc = symbol_get_tc (fix->fx_addsy);
5836 if (tc->subseg == 0
96d56e9f
NC		 5837 && tc->symbol_class != XMC_TC0
5838 && tc->symbol_class != XMC_TC
b782de16 5839 && symseg != bss_section
252b5132 5840 /* Don't adjust if this is a reloc in the toc section. */
b782de16 5841 && (symseg != data_section
252b5132
RH		 5842 || ppc_toc_csect == NULL
5843 || val < ppc_toc_frag->fr_address
5844 || (ppc_after_toc_frag != NULL
5845 && val >= ppc_after_toc_frag->fr_address)))
5846 {
2fb4b302 5847 symbolS *csect = tc->within;
252b5132 5848
2fb4b302
TG		 5849 /* If the symbol was not declared by a label (eg: a section symbol),
5850 use the section instead of the csect. This doesn't happen in
5851 normal AIX assembly code. */
5852 if (csect == NULL)
5853 csect = seg_info (symseg)->sym;
252b5132 5854
2fb4b302
TG		 5855 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
5856 fix->fx_addsy = csect;
252b5132 5857
b782de16 5858 return 0;
252b5132
RH		 5859 }
5860
5861 /* Adjust a reloc against a .lcomm symbol to be against the base
5862 .lcomm. */
b782de16 5863 if (symseg == bss_section
252b5132
RH		 5864 && ! S_IS_EXTERNAL (fix->fx_addsy))
5865 {
b782de16
AM		 5866 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5867
5868 fix->fx_offset += val - resolve_symbol_value (sy);
5869 fix->fx_addsy = sy;
252b5132
RH		 5870 }
5871
5872 return 0;
5873}
5874
5875/* A reloc from one csect to another must be kept. The assembler
5876 will, of course, keep relocs between sections, and it will keep
5877 absolute relocs, but we need to force it to keep PC relative relocs
5878 between two csects in the same section. */
5879
5880int
98027b10 5881ppc_force_relocation (fixS *fix)
252b5132
RH		 5882{
5883 /* At this point fix->fx_addsy should already have been converted to
5884 a csect symbol. If the csect does not include the fragment, then
5885 we need to force the relocation. */
5886 if (fix->fx_pcrel
5887 && fix->fx_addsy != NULL
809ffe0d
ILT		 5888 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5889 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5890 > fix->fx_frag->fr_address)
5891 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5892 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 5893 <= fix->fx_frag->fr_address))))
5894 return 1;
5895
ae6063d4 5896 return generic_force_reloc (fix);
252b5132
RH		 5897}
5898
2fb4b302
TG		 5899void
5900ppc_new_dot_label (symbolS *sym)
5901{
5902 /* Anchor this label to the current csect for relocations. */
5903 symbol_get_tc (sym)->within = ppc_current_csect;
5904}
5905
252b5132
RH		 5906#endif /* OBJ_XCOFF */
5907
0baf16f2 5908#ifdef OBJ_ELF
a161fe53
AM		 5909/* If this function returns non-zero, it guarantees that a relocation
5910 will be emitted for a fixup. */
5911
5912int
98027b10 5913ppc_force_relocation (fixS *fix)
a161fe53
AM		 5914{
5915 /* Branch prediction relocations must force a relocation, as must
5916 the vtable description relocs. */
5917 switch (fix->fx_r_type)
5918 {
5919 case BFD_RELOC_PPC_B16_BRTAKEN:
5920 case BFD_RELOC_PPC_B16_BRNTAKEN:
5921 case BFD_RELOC_PPC_BA16_BRTAKEN:
5922 case BFD_RELOC_PPC_BA16_BRNTAKEN:
c744ecf2 5923 case BFD_RELOC_24_PLT_PCREL:
a161fe53 5924 case BFD_RELOC_PPC64_TOC:
a161fe53
AM		 5925 return 1;
5926 default:
5927 break;
5928 }
5929
cdba85ec
AM		 5930 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5931 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5932 return 1;
5933
ae6063d4 5934 return generic_force_reloc (fix);
a161fe53
AM		 5935}
5936
0baf16f2 5937int
98027b10 5938ppc_fix_adjustable (fixS *fix)
252b5132 5939{
0baf16f2
AM		 5940 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5941 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5942 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5943 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
cc9edbf3
AM		 5944 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_DS
5945 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_LO_DS
0baf16f2
AM		 5946 && fix->fx_r_type != BFD_RELOC_GPREL16
5947 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5948 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 5949 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 5950 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 5951}
0baf16f2 5952#endif
252b5132 5953
3aeeedbb
AM		 5954/* Implement HANDLE_ALIGN. This writes the NOP pattern into an
5955 rs_align_code frag. */
5956
5957void
5958ppc_handle_align (struct frag *fragP)
5959{
5960 valueT count = (fragP->fr_next->fr_address
5961 - (fragP->fr_address + fragP->fr_fix));
5962
5963 if (count != 0 && (count & 3) == 0)
5964 {
5965 char *dest = fragP->fr_literal + fragP->fr_fix;
5966
5967 fragP->fr_var = 4;
cef4f754
AM		 5968
5969 if (count > 4 * nop_limit && count < 0x2000000)
5970 {
5971 struct frag *rest;
5972
5973 /* Make a branch, then follow with nops. Insert another
5974 frag to handle the nops. */
5975 md_number_to_chars (dest, 0x48000000 + count, 4);
5976 count -= 4;
5977 if (count == 0)
5978 return;
5979
5980 rest = xmalloc (SIZEOF_STRUCT_FRAG + 4);
5981 memcpy (rest, fragP, SIZEOF_STRUCT_FRAG);
5982 fragP->fr_next = rest;
5983 fragP = rest;
5984 rest->fr_address += rest->fr_fix + 4;
5985 rest->fr_fix = 0;
5986 /* If we leave the next frag as rs_align_code we'll come here
5987 again, resulting in a bunch of branches rather than a
5988 branch followed by nops. */
5989 rest->fr_type = rs_align;
5990 dest = rest->fr_literal;
5991 }
5992
3aeeedbb
AM		 5993 md_number_to_chars (dest, 0x60000000, 4);
5994
42240548
PB		 5995 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0
5996 || (ppc_cpu & PPC_OPCODE_POWER7) != 0)
3aeeedbb 5997 {
42240548
PB		 5998 /* For power6 and power7, we want the last nop to be a group
5999 terminating one. Do this by inserting an rs_fill frag immediately
6000 after this one, with its address set to the last nop location.
6001 This will automatically reduce the number of nops in the current
6002 frag by one. */
3aeeedbb
AM		 6003 if (count > 4)
6004 {
6005 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6006
6007 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
6008 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
6009 group_nop->fr_fix = 0;
6010 group_nop->fr_offset = 1;
6011 group_nop->fr_type = rs_fill;
6012 fragP->fr_next = group_nop;
6013 dest = group_nop->fr_literal;
6014 }
6015
42240548
PB		 6016 if ((ppc_cpu & PPC_OPCODE_POWER7) != 0)
6017 /* power7 group terminating nop: "ori 2,2,0". */
6018 md_number_to_chars (dest, 0x60420000, 4);
6019 else
6020 /* power6 group terminating nop: "ori 1,1,0". */
6021 md_number_to_chars (dest, 0x60210000, 4);
3aeeedbb
AM		 6022 }
6023 }
6024}
6025
252b5132
RH		 6026/* Apply a fixup to the object code. This is called for all the
6027 fixups we generated by the call to fix_new_exp, above. In the call
6028 above we used a reloc code which was the largest legal reloc code
6029 plus the operand index. Here we undo that to recover the operand
6030 index. At this point all symbol values should be fully resolved,
6031 and we attempt to completely resolve the reloc. If we can not do
6032 that, we determine the correct reloc code and put it back in the
6033 fixup. */
6034
94f592af 6035void
98027b10 6036md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
252b5132 6037{
94f592af 6038 valueT value = * valP;
252b5132
RH		 6039
6040#ifdef OBJ_ELF
94f592af 6041 if (fixP->fx_addsy != NULL)
252b5132 6042 {
a161fe53 6043 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 6044 if (fixP->fx_pcrel)
6045 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 6046 }
6047 else
94f592af 6048 fixP->fx_done = 1;
252b5132 6049#else
a161fe53 6050 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7be1c489
AM		 6051 the symbol values. If we are doing this relocation the code in
6052 write.c is going to call bfd_install_relocation, which is also
6053 going to use the symbol value. That means that if the reloc is
6054 fully resolved we want to use *valP since bfd_install_relocation is
6055 not being used.
9f0eb232
RS		 6056 However, if the reloc is not fully resolved we do not want to
6057 use *valP, and must use fx_offset instead. If the relocation
6058 is PC-relative, we then need to re-apply md_pcrel_from_section
6059 to this new relocation value. */
94f592af
NC		 6060 if (fixP->fx_addsy == (symbolS *) NULL)
6061 fixP->fx_done = 1;
6062
252b5132 6063 else
9f0eb232
RS		 6064 {
6065 value = fixP->fx_offset;
6066 if (fixP->fx_pcrel)
6067 value -= md_pcrel_from_section (fixP, seg);
6068 }
a161fe53
AM		 6069#endif
6070
6071 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 6072 {
a161fe53
AM		 6073 /* We can't actually support subtracting a symbol. */
6074 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 6075 }
252b5132 6076
94f592af 6077 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132
RH		 6078 {
6079 int opindex;
6080 const struct powerpc_operand *operand;
6081 char *where;
6082 unsigned long insn;
6083
94f592af 6084 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
252b5132
RH		 6085
6086 operand = &powerpc_operands[opindex];
6087
6088#ifdef OBJ_XCOFF
0baf16f2
AM		 6089 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
6090 does not generate a reloc. It uses the offset of `sym' within its
6091 csect. Other usages, such as `.long sym', generate relocs. This
6092 is the documented behaviour of non-TOC symbols. */
252b5132 6093 if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 6094 && (operand->bitm & 0xfff0) == 0xfff0
252b5132 6095 && operand->shift == 0
2b3c4602 6096 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 6097 && fixP->fx_addsy != NULL
6098 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
96d56e9f
NC		 6099 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC
6100 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0
94f592af 6101 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 6102 {
94f592af
NC		 6103 value = fixP->fx_offset;
6104 fixP->fx_done = 1;
252b5132
RH		 6105 }
6106#endif
6107
6108 /* Fetch the instruction, insert the fully resolved operand
6109 value, and stuff the instruction back again. */
94f592af 6110 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH		 6111 if (target_big_endian)
6112 insn = bfd_getb32 ((unsigned char *) where);
6113 else
6114 insn = bfd_getl32 ((unsigned char *) where);
6115 insn = ppc_insert_operand (insn, operand, (offsetT) value,
783de163 6116 fixP->tc_fix_data.ppc_cpu,
94f592af 6117 fixP->fx_file, fixP->fx_line);
252b5132
RH		 6118 if (target_big_endian)
6119 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6120 else
6121 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6122
94f592af
NC		 6123 if (fixP->fx_done)
6124 /* Nothing else to do here. */
6125 return;
252b5132 6126
9c2799c2 6127 gas_assert (fixP->fx_addsy != NULL);
0baf16f2 6128
252b5132
RH		 6129 /* Determine a BFD reloc value based on the operand information.
6130 We are only prepared to turn a few of the operands into
0baf16f2 6131 relocs. */
11b37b7b 6132 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 6133 && operand->bitm == 0x3fffffc
11b37b7b 6134 && operand->shift == 0)
94f592af 6135 fixP->fx_r_type = BFD_RELOC_PPC_B26;
11b37b7b 6136 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 6137 && operand->bitm == 0xfffc
11b37b7b 6138 && operand->shift == 0)
95210096
AM		 6139 {
6140 fixP->fx_r_type = BFD_RELOC_PPC_B16;
6141#ifdef OBJ_XCOFF
6142 fixP->fx_size = 2;
6143 if (target_big_endian)
6144 fixP->fx_where += 2;
6145#endif
6146 }
11b37b7b 6147 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 6148 && operand->bitm == 0x3fffffc
11b37b7b 6149 && operand->shift == 0)
94f592af 6150 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
11b37b7b 6151 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 6152 && operand->bitm == 0xfffc
11b37b7b 6153 && operand->shift == 0)
95210096
AM		 6154 {
6155 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
6156#ifdef OBJ_XCOFF
6157 fixP->fx_size = 2;
6158 if (target_big_endian)
6159 fixP->fx_where += 2;
6160#endif
6161 }
0baf16f2 6162#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
11b37b7b 6163 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 6164 && (operand->bitm & 0xfff0) == 0xfff0
a7fc733f 6165 && operand->shift == 0)
11b37b7b 6166 {
a7fc733f
AM		 6167 if (ppc_is_toc_sym (fixP->fx_addsy))
6168 {
6169 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
0baf16f2 6170#ifdef OBJ_ELF
a7fc733f
AM		 6171 if (ppc_obj64
6172 && (operand->flags & PPC_OPERAND_DS) != 0)
6173 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
6174#endif
6175 }
6176 else
6177 {
6178 fixP->fx_r_type = BFD_RELOC_16;
6179#ifdef OBJ_ELF
6180 if (ppc_obj64
6181 && (operand->flags & PPC_OPERAND_DS) != 0)
6182 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
0baf16f2 6183#endif
a7fc733f 6184 }
94f592af 6185 fixP->fx_size = 2;
11b37b7b 6186 if (target_big_endian)
94f592af 6187 fixP->fx_where += 2;
11b37b7b 6188 }
0baf16f2 6189#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
11b37b7b 6190 else
252b5132
RH		 6191 {
6192 char *sfile;
6193 unsigned int sline;
6194
6195 /* Use expr_symbol_where to see if this is an expression
0baf16f2 6196 symbol. */
94f592af
NC		 6197 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
6198 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH		 6199 _("unresolved expression that must be resolved"));
6200 else
94f592af 6201 as_bad_where (fixP->fx_file, fixP->fx_line,
0baf16f2 6202 _("unsupported relocation against %s"),
94f592af
NC		 6203 S_GET_NAME (fixP->fx_addsy));
6204 fixP->fx_done = 1;
6205 return;
252b5132
RH		 6206 }
6207 }
6208 else
6209 {
6210#ifdef OBJ_ELF
94f592af 6211 ppc_elf_validate_fix (fixP, seg);
252b5132 6212#endif
94f592af 6213 switch (fixP->fx_r_type)
252b5132 6214 {
252b5132 6215 case BFD_RELOC_CTOR:
2b3c4602 6216 if (ppc_obj64)
9c7977b3
AM		 6217 goto ctor64;
6218 /* fall through */
6219
0baf16f2 6220 case BFD_RELOC_32:
94f592af
NC		 6221 if (fixP->fx_pcrel)
6222 fixP->fx_r_type = BFD_RELOC_32_PCREL;
99a814a1 6223 /* fall through */
252b5132
RH		 6224
6225 case BFD_RELOC_RVA:
6226 case BFD_RELOC_32_PCREL:
252b5132 6227 case BFD_RELOC_PPC_EMB_NADDR32:
94f592af 6228 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 6229 value, 4);
6230 break;
6231
7f6d05e8 6232 case BFD_RELOC_64:
9c7977b3 6233 ctor64:
94f592af
NC		 6234 if (fixP->fx_pcrel)
6235 fixP->fx_r_type = BFD_RELOC_64_PCREL;
99a814a1 6236 /* fall through */
0baf16f2 6237
7f6d05e8 6238 case BFD_RELOC_64_PCREL:
94f592af 6239 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7f6d05e8 6240 value, 8);
81d4177b 6241 break;
0baf16f2 6242
252b5132
RH		 6243 case BFD_RELOC_GPREL16:
6244 case BFD_RELOC_16_GOT_PCREL:
6245 case BFD_RELOC_16_GOTOFF:
6246 case BFD_RELOC_LO16_GOTOFF:
6247 case BFD_RELOC_HI16_GOTOFF:
6248 case BFD_RELOC_HI16_S_GOTOFF:
1cfc59d5 6249 case BFD_RELOC_16_BASEREL:
252b5132
RH		 6250 case BFD_RELOC_LO16_BASEREL:
6251 case BFD_RELOC_HI16_BASEREL:
6252 case BFD_RELOC_HI16_S_BASEREL:
6253 case BFD_RELOC_PPC_EMB_NADDR16:
6254 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6255 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6256 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6257 case BFD_RELOC_PPC_EMB_SDAI16:
6258 case BFD_RELOC_PPC_EMB_SDA2REL:
6259 case BFD_RELOC_PPC_EMB_SDA2I16:
6260 case BFD_RELOC_PPC_EMB_RELSEC16:
6261 case BFD_RELOC_PPC_EMB_RELST_LO:
6262 case BFD_RELOC_PPC_EMB_RELST_HI:
6263 case BFD_RELOC_PPC_EMB_RELST_HA:
6264 case BFD_RELOC_PPC_EMB_RELSDA:
6265 case BFD_RELOC_PPC_TOC16:
0baf16f2 6266#ifdef OBJ_ELF
0baf16f2
AM		 6267 case BFD_RELOC_PPC64_TOC16_LO:
6268 case BFD_RELOC_PPC64_TOC16_HI:
6269 case BFD_RELOC_PPC64_TOC16_HA:
0baf16f2 6270#endif
94f592af 6271 if (fixP->fx_pcrel)
252b5132 6272 {
94f592af
NC		 6273 if (fixP->fx_addsy != NULL)
6274 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 6275 _("cannot emit PC relative %s relocation against %s"),
94f592af
NC		 6276 bfd_get_reloc_code_name (fixP->fx_r_type),
6277 S_GET_NAME (fixP->fx_addsy));
252b5132 6278 else
94f592af 6279 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 6280 _("cannot emit PC relative %s relocation"),
94f592af 6281 bfd_get_reloc_code_name (fixP->fx_r_type));
252b5132
RH		 6282 }
6283
94f592af 6284 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 6285 value, 2);
6286 break;
6287
3c9d25f4
AM		 6288 case BFD_RELOC_16:
6289 if (fixP->fx_pcrel)
6290 fixP->fx_r_type = BFD_RELOC_16_PCREL;
6291 /* fall through */
6292
6293 case BFD_RELOC_16_PCREL:
6294 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6295 value, 2);
6296 break;
6297
6298 case BFD_RELOC_LO16:
6299 if (fixP->fx_pcrel)
6300 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
6301 /* fall through */
6302
6303 case BFD_RELOC_LO16_PCREL:
6304 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6305 value, 2);
6306 break;
6307
252b5132
RH		 6308 /* This case happens when you write, for example,
6309 lis %r3,(L1-L2)@ha
6310 where L1 and L2 are defined later. */
6311 case BFD_RELOC_HI16:
94f592af 6312 if (fixP->fx_pcrel)
3c9d25f4
AM		 6313 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
6314 /* fall through */
6315
6316 case BFD_RELOC_HI16_PCREL:
94f592af 6317 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 6318 PPC_HI (value), 2);
252b5132 6319 break;
0baf16f2 6320
252b5132 6321 case BFD_RELOC_HI16_S:
94f592af 6322 if (fixP->fx_pcrel)
3c9d25f4
AM		 6323 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
6324 /* fall through */
6325
6326 case BFD_RELOC_HI16_S_PCREL:
94f592af 6327 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6328 PPC_HA (value), 2);
6329 break;
6330
c865e45b
RS		 6331#ifdef OBJ_XCOFF
6332 case BFD_RELOC_NONE:
6333 break;
6334#endif
6335
0baf16f2 6336#ifdef OBJ_ELF
0baf16f2 6337 case BFD_RELOC_PPC64_HIGHER:
94f592af 6338 if (fixP->fx_pcrel)
0baf16f2 6339 abort ();
94f592af 6340 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 6341 PPC_HIGHER (value), 2);
252b5132
RH		 6342 break;
6343
0baf16f2 6344 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 6345 if (fixP->fx_pcrel)
0baf16f2 6346 abort ();
94f592af 6347 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6348 PPC_HIGHERA (value), 2);
6349 break;
6350
6351 case BFD_RELOC_PPC64_HIGHEST:
94f592af 6352 if (fixP->fx_pcrel)
0baf16f2 6353 abort ();
94f592af 6354 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6355 PPC_HIGHEST (value), 2);
6356 break;
6357
6358 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 6359 if (fixP->fx_pcrel)
0baf16f2 6360 abort ();
94f592af 6361 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6362 PPC_HIGHESTA (value), 2);
6363 break;
6364
6365 case BFD_RELOC_PPC64_ADDR16_DS:
6366 case BFD_RELOC_PPC64_ADDR16_LO_DS:
6367 case BFD_RELOC_PPC64_GOT16_DS:
6368 case BFD_RELOC_PPC64_GOT16_LO_DS:
6369 case BFD_RELOC_PPC64_PLT16_LO_DS:
6370 case BFD_RELOC_PPC64_SECTOFF_DS:
6371 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
6372 case BFD_RELOC_PPC64_TOC16_DS:
6373 case BFD_RELOC_PPC64_TOC16_LO_DS:
6374 case BFD_RELOC_PPC64_PLTGOT16_DS:
6375 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
94f592af 6376 if (fixP->fx_pcrel)
0baf16f2
AM		 6377 abort ();
6378 {
2132e3a3 6379 char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
3d8aea2f 6380 unsigned long val, mask;
0baf16f2
AM		 6381
6382 if (target_big_endian)
adadcc0c 6383 val = bfd_getb32 (where - 2);
0baf16f2 6384 else
adadcc0c
AM		 6385 val = bfd_getl32 (where);
6386 mask = 0xfffc;
6387 /* lq insns reserve the four lsbs. */
6388 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
77a6138a 6389 && (val & (0x3f << 26)) == (56u << 26))
adadcc0c
AM		 6390 mask = 0xfff0;
6391 val |= value & mask;
0baf16f2
AM		 6392 if (target_big_endian)
6393 bfd_putb16 ((bfd_vma) val, where);
6394 else
6395 bfd_putl16 ((bfd_vma) val, where);
6396 }
6397 break;
cdba85ec 6398
ba0b2174
AM		 6399 case BFD_RELOC_PPC_B16_BRTAKEN:
6400 case BFD_RELOC_PPC_B16_BRNTAKEN:
6401 case BFD_RELOC_PPC_BA16_BRTAKEN:
6402 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6403 break;
6404
cdba85ec 6405 case BFD_RELOC_PPC_TLS:
727fc41e
AM		 6406 case BFD_RELOC_PPC_TLSGD:
6407 case BFD_RELOC_PPC_TLSLD:
7c1d0959
L		 6408 break;
6409
cdba85ec
AM		 6410 case BFD_RELOC_PPC_DTPMOD:
6411 case BFD_RELOC_PPC_TPREL16:
6412 case BFD_RELOC_PPC_TPREL16_LO:
6413 case BFD_RELOC_PPC_TPREL16_HI:
6414 case BFD_RELOC_PPC_TPREL16_HA:
6415 case BFD_RELOC_PPC_TPREL:
6416 case BFD_RELOC_PPC_DTPREL16:
6417 case BFD_RELOC_PPC_DTPREL16_LO:
6418 case BFD_RELOC_PPC_DTPREL16_HI:
6419 case BFD_RELOC_PPC_DTPREL16_HA:
6420 case BFD_RELOC_PPC_DTPREL:
6421 case BFD_RELOC_PPC_GOT_TLSGD16:
6422 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6423 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6424 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6425 case BFD_RELOC_PPC_GOT_TLSLD16:
6426 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6427 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6428 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6429 case BFD_RELOC_PPC_GOT_TPREL16:
6430 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6431 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6432 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6433 case BFD_RELOC_PPC_GOT_DTPREL16:
6434 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6435 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6436 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6437 case BFD_RELOC_PPC64_TPREL16_DS:
6438 case BFD_RELOC_PPC64_TPREL16_LO_DS:
6439 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6440 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6441 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6442 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6443 case BFD_RELOC_PPC64_DTPREL16_DS:
6444 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6445 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6446 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6447 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6448 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
7c1d0959 6449 S_SET_THREAD_LOCAL (fixP->fx_addsy);
cdba85ec 6450 break;
0baf16f2 6451#endif
252b5132 6452 /* Because SDA21 modifies the register field, the size is set to 4
99a814a1 6453 bytes, rather than 2, so offset it here appropriately. */
252b5132 6454 case BFD_RELOC_PPC_EMB_SDA21:
94f592af 6455 if (fixP->fx_pcrel)
252b5132
RH		 6456 abort ();
6457
94f592af 6458 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
252b5132
RH		 6459 + ((target_big_endian) ? 2 : 0),
6460 value, 2);
6461 break;
6462
6463 case BFD_RELOC_8:
94f592af 6464 if (fixP->fx_pcrel)
31a91399
NC		 6465 {
6466 /* This can occur if there is a bug in the input assembler, eg:
b7d7dc63 6467 ".byte <undefined_symbol> - ." */
31a91399
NC		 6468 if (fixP->fx_addsy)
6469 as_bad (_("Unable to handle reference to symbol %s"),
6470 S_GET_NAME (fixP->fx_addsy));
6471 else
6472 as_bad (_("Unable to resolve expression"));
6473 fixP->fx_done = 1;
6474 }
6475 else
6476 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6477 value, 1);
252b5132
RH		 6478 break;
6479
6480 case BFD_RELOC_24_PLT_PCREL:
6481 case BFD_RELOC_PPC_LOCAL24PC:
94f592af 6482 if (!fixP->fx_pcrel && !fixP->fx_done)
252b5132
RH		 6483 abort ();
6484
94f592af 6485 if (fixP->fx_done)
99a814a1
AM		 6486 {
6487 char *where;
6488 unsigned long insn;
6489
6490 /* Fetch the instruction, insert the fully resolved operand
6491 value, and stuff the instruction back again. */
94f592af 6492 where = fixP->fx_frag->fr_literal + fixP->fx_where;
99a814a1
AM		 6493 if (target_big_endian)
6494 insn = bfd_getb32 ((unsigned char *) where);
6495 else
6496 insn = bfd_getl32 ((unsigned char *) where);
6497 if ((value & 3) != 0)
94f592af 6498 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6499 _("must branch to an address a multiple of 4"));
6500 if ((offsetT) value < -0x40000000
6501 || (offsetT) value >= 0x40000000)
94f592af 6502 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6503 _("@local or @plt branch destination is too far away, %ld bytes"),
6504 (long) value);
6505 insn = insn | (value & 0x03fffffc);
6506 if (target_big_endian)
6507 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6508 else
6509 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6510 }
252b5132
RH		 6511 break;
6512
6513 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 6514 fixP->fx_done = 0;
6515 if (fixP->fx_addsy
6516 && !S_IS_DEFINED (fixP->fx_addsy)
6517 && !S_IS_WEAK (fixP->fx_addsy))
6518 S_SET_WEAK (fixP->fx_addsy);
252b5132
RH		 6519 break;
6520
6521 case BFD_RELOC_VTABLE_ENTRY:
94f592af 6522 fixP->fx_done = 0;
252b5132
RH		 6523 break;
6524
0baf16f2 6525#ifdef OBJ_ELF
0baf16f2
AM		 6526 /* Generated by reference to `sym@tocbase'. The sym is
6527 ignored by the linker. */
6528 case BFD_RELOC_PPC64_TOC:
94f592af 6529 fixP->fx_done = 0;
0baf16f2 6530 break;
0baf16f2 6531#endif
252b5132 6532 default:
bc805888 6533 fprintf (stderr,
94f592af 6534 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 6535 fflush (stderr);
252b5132
RH		 6536 abort ();
6537 }
6538 }
6539
6540#ifdef OBJ_ELF
94f592af 6541 fixP->fx_addnumber = value;
4e6935a6
AM		 6542
6543 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
6544 from the section contents. If we are going to be emitting a reloc
6545 then the section contents are immaterial, so don't warn if they
6546 happen to overflow. Leave such warnings to ld. */
6547 if (!fixP->fx_done)
6548 fixP->fx_no_overflow = 1;
252b5132 6549#else
94f592af
NC		 6550 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
6551 fixP->fx_addnumber = 0;
252b5132
RH		 6552 else
6553 {
6554#ifdef TE_PE
94f592af 6555 fixP->fx_addnumber = 0;
252b5132 6556#else
8edcbfcd
TG		 6557 /* We want to use the offset within the toc, not the actual VMA
6558 of the symbol. */
94f592af 6559 fixP->fx_addnumber =
8edcbfcd
TG		 6560 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
6561 - S_GET_VALUE (ppc_toc_csect);
252b5132
RH		 6562#endif
6563 }
6564#endif
252b5132
RH		 6565}
6566
6567/* Generate a reloc for a fixup. */
6568
6569arelent *
98027b10 6570tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
252b5132
RH		 6571{
6572 arelent *reloc;
6573
6574 reloc = (arelent *) xmalloc (sizeof (arelent));
6575
49309057
ILT		 6576 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6577 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 6578 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6579 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6580 if (reloc->howto == (reloc_howto_type *) NULL)
6581 {
6582 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 6583 _("reloc %d not supported by object file format"),
6584 (int) fixp->fx_r_type);
252b5132
RH		 6585 return NULL;
6586 }
6587 reloc->addend = fixp->fx_addnumber;
6588
6589 return reloc;
6590}
75e21f08
JJ		 6591
6592void
98027b10 6593ppc_cfi_frame_initial_instructions (void)
75e21f08
JJ		 6594{
6595 cfi_add_CFA_def_cfa (1, 0);
6596}
6597
6598int
1df69f4f 6599tc_ppc_regname_to_dw2regnum (char *regname)
75e21f08
JJ		 6600{
6601 unsigned int regnum = -1;
6602 unsigned int i;
6603 const char *p;
6604 char *q;
6605 static struct { char *name; int dw2regnum; } regnames[] =
6606 {
6607 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6608 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 6609 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ		 6610 { "spe_acc", 111 }, { "spefscr", 112 }
6611 };
6612
6613 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6614 if (strcmp (regnames[i].name, regname) == 0)
6615 return regnames[i].dw2regnum;
6616
6617 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6618 {
6619 p = regname + 1 + (regname[1] == '.');
6620 regnum = strtoul (p, &q, 10);
6621 if (p == q || *q || regnum >= 32)
6622 return -1;
6623 if (regname[0] == 'f')
b7d7dc63 6624 regnum += 32;
75e21f08 6625 else if (regname[0] == 'v')
b7d7dc63 6626 regnum += 77;
75e21f08
JJ		 6627 }
6628 else if (regname[0] == 'c' && regname[1] == 'r')
6629 {
6630 p = regname + 2 + (regname[2] == '.');
6631 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 6632 return -1;
75e21f08
JJ		 6633 regnum = p[0] - '0' + 68;
6634 }
6635 return regnum;
6636}
GDB Binutils - Deliverables
This page took 1.023257 seconds and 4 git commands to generate.