Commit | Line | Data |
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252b5132 | 1 | /* tc-sh.c -- Assemble code for the Hitachi Super-H |
49309057 | 2 | Copyright (C) 1993, 94, 95, 96, 97, 98, 1999 Free Software Foundation. |
252b5132 RH |
3 | |
4 | This file is part of GAS, the GNU Assembler. | |
5 | ||
6 | GAS is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2, or (at your option) | |
9 | any later version. | |
10 | ||
11 | GAS is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GAS; see the file COPYING. If not, write to | |
18 | the Free Software Foundation, 59 Temple Place - Suite 330, | |
19 | Boston, MA 02111-1307, USA. */ | |
20 | ||
21 | /* | |
22 | Written By Steve Chamberlain | |
23 | sac@cygnus.com | |
24 | */ | |
25 | ||
26 | #include <stdio.h> | |
27 | #include "as.h" | |
28 | #include "bfd.h" | |
29 | #include "subsegs.h" | |
30 | #define DEFINE_TABLE | |
31 | #include "opcodes/sh-opc.h" | |
32 | #include <ctype.h> | |
d4845d57 JR |
33 | |
34 | #ifdef OBJ_ELF | |
35 | #include "elf/sh.h" | |
36 | #endif | |
37 | ||
252b5132 RH |
38 | const char comment_chars[] = "!"; |
39 | const char line_separator_chars[] = ";"; | |
40 | const char line_comment_chars[] = "!#"; | |
41 | ||
42 | static void s_uses PARAMS ((int)); | |
43 | ||
44 | static void sh_count_relocs PARAMS ((bfd *, segT, PTR)); | |
45 | static void sh_frob_section PARAMS ((bfd *, segT, PTR)); | |
46 | ||
252b5132 RH |
47 | void cons (); |
48 | void s_align_bytes (); | |
49 | static void s_uacons PARAMS ((int)); | |
d4845d57 JR |
50 | static sh_opcode_info *find_cooked_opcode PARAMS ((char **)); |
51 | static void assemble_ppi PARAMS ((char *, sh_opcode_info *)); | |
252b5132 RH |
52 | |
53 | int shl = 0; | |
54 | ||
55 | static void | |
56 | little (ignore) | |
57 | int ignore; | |
58 | { | |
59 | shl = 1; | |
60 | target_big_endian = 0; | |
61 | } | |
62 | ||
d4845d57 JR |
63 | /* This table describes all the machine specific pseudo-ops the assembler |
64 | has to support. The fields are: | |
65 | pseudo-op name without dot | |
66 | function to call to execute this pseudo-op | |
67 | Integer arg to pass to the function | |
68 | */ | |
69 | ||
252b5132 RH |
70 | const pseudo_typeS md_pseudo_table[] = |
71 | { | |
72 | {"int", cons, 4}, | |
73 | {"word", cons, 2}, | |
74 | {"form", listing_psize, 0}, | |
75 | {"little", little, 0}, | |
76 | {"heading", listing_title, 0}, | |
77 | {"import", s_ignore, 0}, | |
78 | {"page", listing_eject, 0}, | |
79 | {"program", s_ignore, 0}, | |
80 | {"uses", s_uses, 0}, | |
81 | {"uaword", s_uacons, 2}, | |
82 | {"ualong", s_uacons, 4}, | |
83 | {0, 0, 0} | |
84 | }; | |
85 | ||
86 | /*int md_reloc_size; */ | |
87 | ||
88 | int sh_relax; /* set if -relax seen */ | |
89 | ||
90 | /* Whether -small was seen. */ | |
91 | ||
92 | int sh_small; | |
93 | ||
d4845d57 JR |
94 | /* Whether -dsp was seen. */ |
95 | ||
96 | static int sh_dsp; | |
97 | ||
98 | /* The bit mask of architectures that could | |
99 | accomodate the insns seen so far. */ | |
100 | static int valid_arch; | |
101 | ||
252b5132 RH |
102 | const char EXP_CHARS[] = "eE"; |
103 | ||
104 | /* Chars that mean this number is a floating point constant */ | |
105 | /* As in 0f12.456 */ | |
106 | /* or 0d1.2345e12 */ | |
107 | const char FLT_CHARS[] = "rRsSfFdDxXpP"; | |
108 | ||
109 | #define C(a,b) ENCODE_RELAX(a,b) | |
110 | ||
111 | #define JREG 14 /* Register used as a temp when relaxing */ | |
112 | #define ENCODE_RELAX(what,length) (((what) << 4) + (length)) | |
113 | #define GET_WHAT(x) ((x>>4)) | |
114 | ||
115 | /* These are the three types of relaxable instrction */ | |
116 | #define COND_JUMP 1 | |
117 | #define COND_JUMP_DELAY 2 | |
118 | #define UNCOND_JUMP 3 | |
119 | #define END 4 | |
120 | ||
121 | #define UNDEF_DISP 0 | |
122 | #define COND8 1 | |
123 | #define COND12 2 | |
124 | #define COND32 3 | |
125 | #define UNCOND12 1 | |
126 | #define UNCOND32 2 | |
127 | #define UNDEF_WORD_DISP 4 | |
128 | ||
129 | #define UNCOND12 1 | |
130 | #define UNCOND32 2 | |
131 | ||
132 | /* Branch displacements are from the address of the branch plus | |
133 | four, thus all minimum and maximum values have 4 added to them. */ | |
134 | #define COND8_F 258 | |
135 | #define COND8_M -252 | |
136 | #define COND8_LENGTH 2 | |
137 | ||
138 | /* There is one extra instruction before the branch, so we must add | |
139 | two more bytes to account for it. */ | |
140 | #define COND12_F 4100 | |
141 | #define COND12_M -4090 | |
142 | #define COND12_LENGTH 6 | |
143 | ||
144 | #define COND12_DELAY_LENGTH 4 | |
145 | ||
146 | /* ??? The minimum and maximum values are wrong, but this does not matter | |
147 | since this relocation type is not supported yet. */ | |
148 | #define COND32_F (1<<30) | |
149 | #define COND32_M -(1<<30) | |
150 | #define COND32_LENGTH 14 | |
151 | ||
152 | #define UNCOND12_F 4098 | |
153 | #define UNCOND12_M -4092 | |
154 | #define UNCOND12_LENGTH 2 | |
155 | ||
156 | /* ??? The minimum and maximum values are wrong, but this does not matter | |
157 | since this relocation type is not supported yet. */ | |
158 | #define UNCOND32_F (1<<30) | |
159 | #define UNCOND32_M -(1<<30) | |
160 | #define UNCOND32_LENGTH 14 | |
161 | ||
162 | const relax_typeS md_relax_table[C (END, 0)] = { | |
163 | { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, | |
164 | { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, | |
165 | ||
166 | { 0 }, | |
167 | /* C (COND_JUMP, COND8) */ | |
168 | { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP, COND12) }, | |
169 | /* C (COND_JUMP, COND12) */ | |
170 | { COND12_F, COND12_M, COND12_LENGTH, C (COND_JUMP, COND32), }, | |
171 | /* C (COND_JUMP, COND32) */ | |
172 | { COND32_F, COND32_M, COND32_LENGTH, 0, }, | |
173 | { 0 }, { 0 }, { 0 }, { 0 }, | |
174 | { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, | |
175 | ||
176 | { 0 }, | |
177 | /* C (COND_JUMP_DELAY, COND8) */ | |
178 | { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP_DELAY, COND12) }, | |
179 | /* C (COND_JUMP_DELAY, COND12) */ | |
180 | { COND12_F, COND12_M, COND12_DELAY_LENGTH, C (COND_JUMP_DELAY, COND32), }, | |
181 | /* C (COND_JUMP_DELAY, COND32) */ | |
182 | { COND32_F, COND32_M, COND32_LENGTH, 0, }, | |
183 | { 0 }, { 0 }, { 0 }, { 0 }, | |
184 | { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, | |
185 | ||
186 | { 0 }, | |
187 | /* C (UNCOND_JUMP, UNCOND12) */ | |
188 | { UNCOND12_F, UNCOND12_M, UNCOND12_LENGTH, C (UNCOND_JUMP, UNCOND32), }, | |
189 | /* C (UNCOND_JUMP, UNCOND32) */ | |
190 | { UNCOND32_F, UNCOND32_M, UNCOND32_LENGTH, 0, }, | |
191 | { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, | |
192 | { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, | |
193 | }; | |
194 | ||
195 | static struct hash_control *opcode_hash_control; /* Opcode mnemonics */ | |
196 | ||
197 | /* | |
198 | This function is called once, at assembler startup time. This should | |
199 | set up all the tables, etc that the MD part of the assembler needs | |
200 | */ | |
201 | ||
202 | void | |
203 | md_begin () | |
204 | { | |
205 | sh_opcode_info *opcode; | |
206 | char *prev_name = ""; | |
d4845d57 | 207 | int target_arch; |
252b5132 | 208 | |
056350c6 NC |
209 | #ifdef TE_PE |
210 | /* The WinCE OS only supports little endian executables. */ | |
211 | target_big_endian = 0; | |
212 | #else | |
252b5132 RH |
213 | if (! shl) |
214 | target_big_endian = 1; | |
056350c6 | 215 | #endif |
252b5132 | 216 | |
d4845d57 JR |
217 | target_arch = arch_sh1_up & ~(sh_dsp ? arch_sh3e_up : arch_sh_dsp_up); |
218 | valid_arch = target_arch; | |
219 | ||
252b5132 RH |
220 | opcode_hash_control = hash_new (); |
221 | ||
222 | /* Insert unique names into hash table */ | |
223 | for (opcode = sh_table; opcode->name; opcode++) | |
224 | { | |
d4845d57 | 225 | if (opcode->arch & target_arch && strcmp (prev_name, opcode->name)) |
252b5132 RH |
226 | { |
227 | prev_name = opcode->name; | |
228 | hash_insert (opcode_hash_control, opcode->name, (char *) opcode); | |
229 | } | |
230 | else | |
231 | { | |
232 | /* Make all the opcodes with the same name point to the same | |
233 | string */ | |
234 | opcode->name = prev_name; | |
235 | } | |
236 | } | |
237 | } | |
238 | ||
239 | static int reg_m; | |
240 | static int reg_n; | |
d4845d57 JR |
241 | static int reg_x, reg_y; |
242 | static int reg_efg; | |
252b5132 RH |
243 | static int reg_b; |
244 | ||
245 | static expressionS immediate; /* absolute expression */ | |
246 | ||
247 | typedef struct | |
248 | { | |
249 | sh_arg_type type; | |
250 | int reg; | |
251 | } | |
252 | ||
253 | sh_operand_info; | |
254 | ||
255 | /* try and parse a reg name, returns number of chars consumed */ | |
256 | static int | |
257 | parse_reg (src, mode, reg) | |
258 | char *src; | |
259 | int *mode; | |
260 | int *reg; | |
261 | { | |
262 | /* We use !isalnum for the next character after the register name, to | |
263 | make sure that we won't accidentally recognize a symbol name such as | |
264 | 'sram' as being a reference to the register 'sr'. */ | |
265 | ||
266 | if (src[0] == 'r') | |
267 | { | |
84f73d89 NC |
268 | if (src[1] >= '0' && src[1] <= '7' && strncmp (&src[2], "_bank", 5) == 0 |
269 | && ! isalnum ((unsigned char) src[7])) | |
270 | { | |
271 | *mode = A_REG_B; | |
272 | *reg = (src[1] - '0'); | |
273 | return 7; | |
274 | } | |
d4845d57 JR |
275 | if (src[1] == '1') |
276 | { | |
277 | if (src[2] >= '0' && src[2] <= '5' | |
278 | && ! isalnum ((unsigned char) src[3])) | |
279 | { | |
280 | *mode = A_REG_N; | |
281 | *reg = 10 + src[2] - '0'; | |
282 | return 3; | |
283 | } | |
284 | } | |
285 | if (src[1] >= '0' && src[1] <= '9' | |
286 | && ! isalnum ((unsigned char) src[2])) | |
287 | { | |
288 | *mode = A_REG_N; | |
289 | *reg = (src[1] - '0'); | |
290 | return 2; | |
291 | } | |
d4845d57 JR |
292 | |
293 | if (src[1] == 'e' && ! isalnum ((unsigned char) src[2])) | |
294 | { | |
295 | *mode = A_RE; | |
296 | return 2; | |
297 | } | |
298 | if (src[1] == 's' && ! isalnum ((unsigned char) src[2])) | |
299 | { | |
300 | *mode = A_RS; | |
301 | return 2; | |
302 | } | |
252b5132 RH |
303 | } |
304 | ||
d4845d57 | 305 | if (src[0] == 'a') |
252b5132 | 306 | { |
d4845d57 JR |
307 | if (src[1] == '0') |
308 | { | |
309 | if (! isalnum ((unsigned char) src[2])) | |
310 | { | |
311 | *mode = DSP_REG_N; | |
312 | *reg = A_A0_NUM; | |
313 | return 2; | |
314 | } | |
315 | if (src[2] == 'g' && ! isalnum ((unsigned char) src[3])) | |
316 | { | |
317 | *mode = DSP_REG_N; | |
318 | *reg = A_A0G_NUM; | |
319 | return 3; | |
320 | } | |
321 | } | |
252b5132 RH |
322 | if (src[1] == '1') |
323 | { | |
d4845d57 | 324 | if (! isalnum ((unsigned char) src[2])) |
252b5132 | 325 | { |
d4845d57 JR |
326 | *mode = DSP_REG_N; |
327 | *reg = A_A1_NUM; | |
328 | return 2; | |
329 | } | |
330 | if (src[2] == 'g' && ! isalnum ((unsigned char) src[3])) | |
331 | { | |
332 | *mode = DSP_REG_N; | |
333 | *reg = A_A1G_NUM; | |
252b5132 RH |
334 | return 3; |
335 | } | |
336 | } | |
d4845d57 JR |
337 | |
338 | if (src[1] == 'x' && src[2] >= '0' && src[2] <= '1' | |
339 | && ! isalnum ((unsigned char) src[3])) | |
252b5132 RH |
340 | { |
341 | *mode = A_REG_N; | |
d4845d57 JR |
342 | *reg = 4 + (src[1] - '0'); |
343 | return 3; | |
344 | } | |
345 | if (src[1] == 'y' && src[2] >= '0' && src[2] <= '1' | |
346 | && ! isalnum ((unsigned char) src[3])) | |
347 | { | |
348 | *mode = A_REG_N; | |
349 | *reg = 6 + (src[1] - '0'); | |
350 | return 3; | |
351 | } | |
352 | if (src[1] == 's' && src[2] >= '0' && src[2] <= '3' | |
353 | && ! isalnum ((unsigned char) src[3])) | |
354 | { | |
355 | int n = src[1] - '0'; | |
356 | ||
357 | *mode = A_REG_N; | |
358 | *reg = n | ((~n & 2) << 1); | |
359 | return 3; | |
360 | } | |
361 | } | |
362 | ||
363 | if (src[0] == 'i' && src[1] && ! isalnum ((unsigned char) src[3])) | |
364 | { | |
365 | if (src[1] == 's') | |
366 | { | |
367 | *mode = A_REG_N; | |
368 | *reg = 8; | |
252b5132 RH |
369 | return 2; |
370 | } | |
d4845d57 JR |
371 | if (src[1] == 'x') |
372 | { | |
373 | *mode = A_REG_N; | |
374 | *reg = 8; | |
375 | return 2; | |
376 | } | |
377 | if (src[1] == 'y') | |
378 | { | |
379 | *mode = A_REG_N; | |
380 | *reg = 9; | |
381 | return 2; | |
382 | } | |
383 | } | |
384 | ||
385 | if (src[0] == 'x' && src[1] >= '0' && src[1] <= '1' | |
386 | && ! isalnum ((unsigned char) src[2])) | |
387 | { | |
388 | *mode = DSP_REG_N; | |
389 | *reg = A_X0_NUM + src[1] - '0'; | |
390 | return 2; | |
391 | } | |
392 | ||
393 | if (src[0] == 'y' && src[1] >= '0' && src[1] <= '1' | |
394 | && ! isalnum ((unsigned char) src[2])) | |
395 | { | |
396 | *mode = DSP_REG_N; | |
397 | *reg = A_Y0_NUM + src[1] - '0'; | |
398 | return 2; | |
399 | } | |
400 | ||
401 | if (src[0] == 'm' && src[1] >= '0' && src[1] <= '1' | |
402 | && ! isalnum ((unsigned char) src[2])) | |
403 | { | |
404 | *mode = DSP_REG_N; | |
405 | *reg = src[1] == '0' ? A_M0_NUM : A_M1_NUM; | |
406 | return 2; | |
252b5132 RH |
407 | } |
408 | ||
409 | if (src[0] == 's' | |
410 | && src[1] == 's' | |
411 | && src[2] == 'r' && ! isalnum ((unsigned char) src[3])) | |
412 | { | |
413 | *mode = A_SSR; | |
414 | return 3; | |
415 | } | |
416 | ||
417 | if (src[0] == 's' && src[1] == 'p' && src[2] == 'c' | |
418 | && ! isalnum ((unsigned char) src[3])) | |
419 | { | |
420 | *mode = A_SPC; | |
421 | return 3; | |
422 | } | |
423 | ||
424 | if (src[0] == 's' && src[1] == 'g' && src[2] == 'r' | |
425 | && ! isalnum ((unsigned char) src[3])) | |
426 | { | |
427 | *mode = A_SGR; | |
428 | return 3; | |
429 | } | |
430 | ||
d4845d57 JR |
431 | if (src[0] == 'd' && src[1] == 's' && src[2] == 'r' |
432 | && ! isalnum ((unsigned char) src[3])) | |
433 | { | |
434 | *mode = A_DSR; | |
435 | return 3; | |
436 | } | |
437 | ||
252b5132 RH |
438 | if (src[0] == 'd' && src[1] == 'b' && src[2] == 'r' |
439 | && ! isalnum ((unsigned char) src[3])) | |
440 | { | |
441 | *mode = A_DBR; | |
442 | return 3; | |
443 | } | |
444 | ||
445 | if (src[0] == 's' && src[1] == 'r' && ! isalnum ((unsigned char) src[2])) | |
446 | { | |
447 | *mode = A_SR; | |
448 | return 2; | |
449 | } | |
450 | ||
451 | if (src[0] == 's' && src[1] == 'p' && ! isalnum ((unsigned char) src[2])) | |
452 | { | |
453 | *mode = A_REG_N; | |
454 | *reg = 15; | |
455 | return 2; | |
456 | } | |
457 | ||
458 | if (src[0] == 'p' && src[1] == 'r' && ! isalnum ((unsigned char) src[2])) | |
459 | { | |
460 | *mode = A_PR; | |
461 | return 2; | |
462 | } | |
463 | if (src[0] == 'p' && src[1] == 'c' && ! isalnum ((unsigned char) src[2])) | |
464 | { | |
465 | *mode = A_DISP_PC; | |
466 | return 2; | |
467 | } | |
468 | if (src[0] == 'g' && src[1] == 'b' && src[2] == 'r' | |
469 | && ! isalnum ((unsigned char) src[3])) | |
470 | { | |
471 | *mode = A_GBR; | |
472 | return 3; | |
473 | } | |
474 | if (src[0] == 'v' && src[1] == 'b' && src[2] == 'r' | |
475 | && ! isalnum ((unsigned char) src[3])) | |
476 | { | |
477 | *mode = A_VBR; | |
478 | return 3; | |
479 | } | |
480 | ||
481 | if (src[0] == 'm' && src[1] == 'a' && src[2] == 'c' | |
482 | && ! isalnum ((unsigned char) src[4])) | |
483 | { | |
484 | if (src[3] == 'l') | |
485 | { | |
486 | *mode = A_MACL; | |
487 | return 4; | |
488 | } | |
489 | if (src[3] == 'h') | |
490 | { | |
491 | *mode = A_MACH; | |
492 | return 4; | |
493 | } | |
494 | } | |
d4845d57 JR |
495 | if (src[0] == 'm' && src[1] == 'o' && src[2] == 'd' |
496 | && ! isalnum ((unsigned char) src[4])) | |
497 | { | |
498 | *mode = A_MOD; | |
499 | return 3; | |
500 | } | |
252b5132 RH |
501 | if (src[0] == 'f' && src[1] == 'r') |
502 | { | |
503 | if (src[2] == '1') | |
504 | { | |
505 | if (src[3] >= '0' && src[3] <= '5' | |
506 | && ! isalnum ((unsigned char) src[4])) | |
507 | { | |
508 | *mode = F_REG_N; | |
509 | *reg = 10 + src[3] - '0'; | |
510 | return 4; | |
511 | } | |
512 | } | |
513 | if (src[2] >= '0' && src[2] <= '9' | |
514 | && ! isalnum ((unsigned char) src[3])) | |
515 | { | |
516 | *mode = F_REG_N; | |
517 | *reg = (src[2] - '0'); | |
518 | return 3; | |
519 | } | |
520 | } | |
521 | if (src[0] == 'd' && src[1] == 'r') | |
522 | { | |
523 | if (src[2] == '1') | |
524 | { | |
525 | if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1) | |
526 | && ! isalnum ((unsigned char) src[4])) | |
527 | { | |
528 | *mode = D_REG_N; | |
529 | *reg = 10 + src[3] - '0'; | |
530 | return 4; | |
531 | } | |
532 | } | |
533 | if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1) | |
534 | && ! isalnum ((unsigned char) src[3])) | |
535 | { | |
536 | *mode = D_REG_N; | |
537 | *reg = (src[2] - '0'); | |
538 | return 3; | |
539 | } | |
540 | } | |
541 | if (src[0] == 'x' && src[1] == 'd') | |
542 | { | |
543 | if (src[2] == '1') | |
544 | { | |
545 | if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1) | |
546 | && ! isalnum ((unsigned char) src[4])) | |
547 | { | |
548 | *mode = X_REG_N; | |
549 | *reg = 11 + src[3] - '0'; | |
550 | return 4; | |
551 | } | |
552 | } | |
553 | if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1) | |
554 | && ! isalnum ((unsigned char) src[3])) | |
555 | { | |
556 | *mode = X_REG_N; | |
557 | *reg = (src[2] - '0') + 1; | |
558 | return 3; | |
559 | } | |
560 | } | |
561 | if (src[0] == 'f' && src[1] == 'v') | |
562 | { | |
563 | if (src[2] == '1'&& src[3] == '2' && ! isalnum ((unsigned char) src[4])) | |
564 | { | |
565 | *mode = V_REG_N; | |
566 | *reg = 12; | |
567 | return 4; | |
568 | } | |
569 | if ((src[2] == '0' || src[2] == '4' || src[2] == '8') | |
570 | && ! isalnum ((unsigned char) src[3])) | |
571 | { | |
572 | *mode = V_REG_N; | |
573 | *reg = (src[2] - '0'); | |
574 | return 3; | |
575 | } | |
576 | } | |
577 | if (src[0] == 'f' && src[1] == 'p' && src[2] == 'u' && src[3] == 'l' | |
578 | && ! isalnum ((unsigned char) src[4])) | |
579 | { | |
580 | *mode = FPUL_N; | |
581 | return 4; | |
582 | } | |
583 | ||
584 | if (src[0] == 'f' && src[1] == 'p' && src[2] == 's' && src[3] == 'c' | |
585 | && src[4] == 'r' && ! isalnum ((unsigned char) src[5])) | |
586 | { | |
587 | *mode = FPSCR_N; | |
588 | return 5; | |
589 | } | |
590 | ||
591 | if (src[0] == 'x' && src[1] == 'm' && src[2] == 't' && src[3] == 'r' | |
592 | && src[4] == 'x' && ! isalnum ((unsigned char) src[5])) | |
593 | { | |
594 | *mode = XMTRX_M4; | |
595 | return 5; | |
596 | } | |
597 | ||
598 | return 0; | |
599 | } | |
600 | ||
601 | static symbolS *dot() | |
602 | { | |
603 | const char *fake; | |
604 | ||
605 | /* JF: '.' is pseudo symbol with value of current location | |
606 | in current segment. */ | |
607 | fake = FAKE_LABEL_NAME; | |
608 | return symbol_new (fake, | |
609 | now_seg, | |
610 | (valueT) frag_now_fix (), | |
611 | frag_now); | |
612 | ||
613 | } | |
614 | ||
615 | ||
616 | static | |
617 | char * | |
618 | parse_exp (s) | |
619 | char *s; | |
620 | { | |
621 | char *save; | |
622 | char *new; | |
623 | ||
624 | save = input_line_pointer; | |
625 | input_line_pointer = s; | |
626 | expression (&immediate); | |
627 | if (immediate.X_op == O_absent) | |
628 | as_bad (_("missing operand")); | |
629 | new = input_line_pointer; | |
630 | input_line_pointer = save; | |
631 | return new; | |
632 | } | |
633 | ||
634 | ||
635 | /* The many forms of operand: | |
636 | ||
637 | Rn Register direct | |
638 | @Rn Register indirect | |
639 | @Rn+ Autoincrement | |
640 | @-Rn Autodecrement | |
641 | @(disp:4,Rn) | |
642 | @(disp:8,GBR) | |
643 | @(disp:8,PC) | |
644 | ||
645 | @(R0,Rn) | |
646 | @(R0,GBR) | |
647 | ||
648 | disp:8 | |
649 | disp:12 | |
650 | #imm8 | |
651 | pr, gbr, vbr, macl, mach | |
652 | ||
653 | */ | |
654 | ||
655 | static | |
656 | char * | |
657 | parse_at (src, op) | |
658 | char *src; | |
659 | sh_operand_info *op; | |
660 | { | |
661 | int len; | |
662 | int mode; | |
663 | src++; | |
664 | if (src[0] == '-') | |
665 | { | |
666 | /* Must be predecrement */ | |
667 | src++; | |
668 | ||
669 | len = parse_reg (src, &mode, &(op->reg)); | |
670 | if (mode != A_REG_N) | |
671 | as_bad (_("illegal register after @-")); | |
672 | ||
673 | op->type = A_DEC_N; | |
674 | src += len; | |
675 | } | |
676 | else if (src[0] == '(') | |
677 | { | |
678 | /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or | |
679 | @(r0, rn) */ | |
680 | src++; | |
681 | len = parse_reg (src, &mode, &(op->reg)); | |
682 | if (len && mode == A_REG_N) | |
683 | { | |
684 | src += len; | |
685 | if (op->reg != 0) | |
686 | { | |
687 | as_bad (_("must be @(r0,...)")); | |
688 | } | |
689 | if (src[0] == ',') | |
690 | src++; | |
691 | /* Now can be rn or gbr */ | |
692 | len = parse_reg (src, &mode, &(op->reg)); | |
693 | if (mode == A_GBR) | |
694 | { | |
695 | op->type = A_R0_GBR; | |
696 | } | |
697 | else if (mode == A_REG_N) | |
698 | { | |
699 | op->type = A_IND_R0_REG_N; | |
700 | } | |
701 | else | |
702 | { | |
703 | as_bad (_("syntax error in @(r0,...)")); | |
704 | } | |
705 | } | |
706 | else | |
707 | { | |
708 | /* Must be an @(disp,.. thing) */ | |
709 | src = parse_exp (src); | |
710 | if (src[0] == ',') | |
711 | src++; | |
712 | /* Now can be rn, gbr or pc */ | |
713 | len = parse_reg (src, &mode, &op->reg); | |
714 | if (len) | |
715 | { | |
716 | if (mode == A_REG_N) | |
717 | { | |
718 | op->type = A_DISP_REG_N; | |
719 | } | |
720 | else if (mode == A_GBR) | |
721 | { | |
722 | op->type = A_DISP_GBR; | |
723 | } | |
724 | else if (mode == A_DISP_PC) | |
725 | { | |
726 | /* Turn a plain @(4,pc) into @(.+4,pc) */ | |
727 | if (immediate.X_op == O_constant) { | |
728 | immediate.X_add_symbol = dot(); | |
729 | immediate.X_op = O_symbol; | |
730 | } | |
731 | op->type = A_DISP_PC; | |
732 | } | |
733 | else | |
734 | { | |
735 | as_bad (_("syntax error in @(disp,[Rn, gbr, pc])")); | |
736 | } | |
737 | } | |
738 | else | |
739 | { | |
740 | as_bad (_("syntax error in @(disp,[Rn, gbr, pc])")); | |
741 | } | |
742 | } | |
743 | src += len; | |
744 | if (src[0] != ')') | |
745 | as_bad (_("expecting )")); | |
746 | else | |
747 | src++; | |
748 | } | |
749 | else | |
750 | { | |
751 | src += parse_reg (src, &mode, &(op->reg)); | |
752 | if (mode != A_REG_N) | |
753 | { | |
754 | as_bad (_("illegal register after @")); | |
755 | } | |
756 | if (src[0] == '+') | |
757 | { | |
252b5132 | 758 | src++; |
d4845d57 JR |
759 | if ((src[0] == 'r' && src[1] == '8') |
760 | || (src[0] == 'i' && (src[1] == 'x' || src[1] == 's'))) | |
761 | { | |
762 | src += 2; | |
763 | op->type = A_PMOD_N; | |
764 | } | |
765 | if ((src[0] == 'r' && src[1] == '9') | |
766 | || (src[0] == 'i' && src[1] == 'y')) | |
767 | { | |
768 | src += 2; | |
769 | op->type = A_PMODY_N; | |
770 | } | |
771 | else | |
772 | op->type = A_INC_N; | |
252b5132 RH |
773 | } |
774 | else | |
775 | { | |
776 | op->type = A_IND_N; | |
777 | } | |
778 | } | |
779 | return src; | |
780 | } | |
781 | ||
782 | static void | |
783 | get_operand (ptr, op) | |
784 | char **ptr; | |
785 | sh_operand_info *op; | |
786 | { | |
787 | char *src = *ptr; | |
788 | int mode = -1; | |
789 | unsigned int len; | |
790 | ||
791 | if (src[0] == '#') | |
792 | { | |
793 | src++; | |
794 | *ptr = parse_exp (src); | |
795 | op->type = A_IMM; | |
796 | return; | |
797 | } | |
798 | ||
799 | else if (src[0] == '@') | |
800 | { | |
801 | *ptr = parse_at (src, op); | |
802 | return; | |
803 | } | |
804 | len = parse_reg (src, &mode, &(op->reg)); | |
805 | if (len) | |
806 | { | |
807 | *ptr = src + len; | |
808 | op->type = mode; | |
809 | return; | |
810 | } | |
811 | else | |
812 | { | |
813 | /* Not a reg, the only thing left is a displacement */ | |
814 | *ptr = parse_exp (src); | |
815 | op->type = A_DISP_PC; | |
816 | return; | |
817 | } | |
818 | } | |
819 | ||
820 | static | |
821 | char * | |
822 | get_operands (info, args, operand) | |
823 | sh_opcode_info *info; | |
824 | char *args; | |
825 | sh_operand_info *operand; | |
826 | ||
827 | { | |
828 | char *ptr = args; | |
829 | if (info->arg[0]) | |
830 | { | |
d4845d57 JR |
831 | /* The pre-processor will eliminate whitespace in front of '@' |
832 | after the first argument; we may be called multiple times | |
833 | from assemble_ppi, so don't insist on finding whitespace here. */ | |
834 | if (*ptr == ' ') | |
835 | ptr++; | |
252b5132 RH |
836 | |
837 | get_operand (&ptr, operand + 0); | |
838 | if (info->arg[1]) | |
839 | { | |
840 | if (*ptr == ',') | |
841 | { | |
842 | ptr++; | |
843 | } | |
844 | get_operand (&ptr, operand + 1); | |
845 | if (info->arg[2]) | |
846 | { | |
847 | if (*ptr == ',') | |
848 | { | |
849 | ptr++; | |
850 | } | |
851 | get_operand (&ptr, operand + 2); | |
852 | } | |
853 | else | |
854 | { | |
855 | operand[2].type = 0; | |
856 | } | |
857 | } | |
858 | else | |
859 | { | |
860 | operand[1].type = 0; | |
861 | operand[2].type = 0; | |
862 | } | |
863 | } | |
864 | else | |
865 | { | |
866 | operand[0].type = 0; | |
867 | operand[1].type = 0; | |
868 | operand[2].type = 0; | |
869 | } | |
870 | return ptr; | |
871 | } | |
872 | ||
873 | /* Passed a pointer to a list of opcodes which use different | |
874 | addressing modes, return the opcode which matches the opcodes | |
875 | provided | |
876 | */ | |
877 | ||
878 | static | |
879 | sh_opcode_info * | |
880 | get_specific (opcode, operands) | |
881 | sh_opcode_info *opcode; | |
882 | sh_operand_info *operands; | |
883 | { | |
884 | sh_opcode_info *this_try = opcode; | |
885 | char *name = opcode->name; | |
886 | int n = 0; | |
887 | while (opcode->name) | |
888 | { | |
889 | this_try = opcode++; | |
890 | if (this_try->name != name) | |
891 | { | |
892 | /* We've looked so far down the table that we've run out of | |
893 | opcodes with the same name */ | |
894 | return 0; | |
895 | } | |
896 | /* look at both operands needed by the opcodes and provided by | |
897 | the user - since an arg test will often fail on the same arg | |
898 | again and again, we'll try and test the last failing arg the | |
899 | first on each opcode try */ | |
900 | ||
901 | for (n = 0; this_try->arg[n]; n++) | |
902 | { | |
903 | sh_operand_info *user = operands + n; | |
904 | sh_arg_type arg = this_try->arg[n]; | |
905 | switch (arg) | |
906 | { | |
907 | case A_IMM: | |
908 | case A_BDISP12: | |
909 | case A_BDISP8: | |
910 | case A_DISP_GBR: | |
911 | case A_DISP_PC: | |
912 | case A_MACH: | |
913 | case A_PR: | |
914 | case A_MACL: | |
915 | if (user->type != arg) | |
916 | goto fail; | |
917 | break; | |
918 | case A_R0: | |
919 | /* opcode needs r0 */ | |
920 | if (user->type != A_REG_N || user->reg != 0) | |
921 | goto fail; | |
922 | break; | |
923 | case A_R0_GBR: | |
924 | if (user->type != A_R0_GBR || user->reg != 0) | |
925 | goto fail; | |
926 | break; | |
927 | case F_FR0: | |
928 | if (user->type != F_REG_N || user->reg != 0) | |
929 | goto fail; | |
930 | break; | |
931 | ||
932 | case A_REG_N: | |
933 | case A_INC_N: | |
934 | case A_DEC_N: | |
935 | case A_IND_N: | |
936 | case A_IND_R0_REG_N: | |
937 | case A_DISP_REG_N: | |
938 | case F_REG_N: | |
939 | case D_REG_N: | |
940 | case X_REG_N: | |
941 | case V_REG_N: | |
942 | case FPUL_N: | |
943 | case FPSCR_N: | |
d4845d57 JR |
944 | case A_PMOD_N: |
945 | case A_PMODY_N: | |
946 | case DSP_REG_N: | |
252b5132 RH |
947 | /* Opcode needs rn */ |
948 | if (user->type != arg) | |
949 | goto fail; | |
950 | reg_n = user->reg; | |
951 | break; | |
252b5132 RH |
952 | case DX_REG_N: |
953 | if (user->type != D_REG_N && user->type != X_REG_N) | |
954 | goto fail; | |
955 | reg_n = user->reg; | |
956 | break; | |
957 | case A_GBR: | |
958 | case A_SR: | |
959 | case A_VBR: | |
d4845d57 JR |
960 | case A_DSR: |
961 | case A_MOD: | |
962 | case A_RE: | |
963 | case A_RS: | |
252b5132 RH |
964 | case A_SSR: |
965 | case A_SPC: | |
966 | case A_SGR: | |
967 | case A_DBR: | |
968 | if (user->type != arg) | |
969 | goto fail; | |
970 | break; | |
971 | ||
972 | case A_REG_B: | |
973 | if (user->type != arg) | |
974 | goto fail; | |
975 | reg_b = user->reg; | |
976 | break; | |
977 | ||
978 | case A_REG_M: | |
979 | case A_INC_M: | |
980 | case A_DEC_M: | |
981 | case A_IND_M: | |
982 | case A_IND_R0_REG_M: | |
983 | case A_DISP_REG_M: | |
d4845d57 | 984 | case DSP_REG_M: |
252b5132 RH |
985 | /* Opcode needs rn */ |
986 | if (user->type != arg - A_REG_M + A_REG_N) | |
987 | goto fail; | |
988 | reg_m = user->reg; | |
989 | break; | |
990 | ||
d4845d57 JR |
991 | case DSP_REG_X: |
992 | if (user->type != DSP_REG_N) | |
993 | goto fail; | |
994 | switch (user->reg) | |
995 | { | |
996 | case A_X0_NUM: | |
997 | reg_x = 0; | |
998 | break; | |
999 | case A_X1_NUM: | |
1000 | reg_x = 1; | |
1001 | break; | |
1002 | case A_A0_NUM: | |
1003 | reg_x = 2; | |
1004 | break; | |
1005 | case A_A1_NUM: | |
1006 | reg_x = 3; | |
1007 | break; | |
1008 | default: | |
1009 | goto fail; | |
1010 | } | |
1011 | break; | |
1012 | ||
1013 | case DSP_REG_Y: | |
1014 | if (user->type != DSP_REG_N) | |
1015 | goto fail; | |
1016 | switch (user->reg) | |
1017 | { | |
1018 | case A_Y0_NUM: | |
1019 | reg_y = 0; | |
1020 | break; | |
1021 | case A_Y1_NUM: | |
1022 | reg_y = 1; | |
1023 | break; | |
1024 | case A_M0_NUM: | |
1025 | reg_y = 2; | |
1026 | break; | |
1027 | case A_M1_NUM: | |
1028 | reg_y = 3; | |
1029 | break; | |
1030 | default: | |
1031 | goto fail; | |
1032 | } | |
1033 | break; | |
1034 | ||
1035 | case DSP_REG_E: | |
1036 | if (user->type != DSP_REG_N) | |
1037 | goto fail; | |
1038 | switch (user->reg) | |
1039 | { | |
1040 | case A_X0_NUM: | |
1041 | reg_efg = 0 << 10; | |
1042 | break; | |
1043 | case A_X1_NUM: | |
1044 | reg_efg = 1 << 10; | |
1045 | break; | |
1046 | case A_Y0_NUM: | |
1047 | reg_efg = 2 << 10; | |
1048 | break; | |
1049 | case A_A1_NUM: | |
1050 | reg_efg = 3 << 10; | |
1051 | break; | |
1052 | default: | |
1053 | goto fail; | |
1054 | } | |
1055 | break; | |
1056 | ||
1057 | case DSP_REG_F: | |
1058 | if (user->type != DSP_REG_N) | |
1059 | goto fail; | |
1060 | switch (user->reg) | |
1061 | { | |
1062 | case A_Y0_NUM: | |
1063 | reg_efg |= 0 << 8; | |
1064 | break; | |
1065 | case A_Y1_NUM: | |
1066 | reg_efg |= 1 << 8; | |
1067 | break; | |
1068 | case A_X0_NUM: | |
1069 | reg_efg |= 2 << 8; | |
1070 | break; | |
1071 | case A_A1_NUM: | |
1072 | reg_efg |= 3 << 8; | |
1073 | break; | |
1074 | default: | |
1075 | goto fail; | |
1076 | } | |
1077 | break; | |
1078 | ||
1079 | case DSP_REG_G: | |
1080 | if (user->type != DSP_REG_N) | |
1081 | goto fail; | |
1082 | switch (user->reg) | |
1083 | { | |
1084 | case A_M0_NUM: | |
1085 | reg_efg |= 0 << 2; | |
1086 | break; | |
1087 | case A_M1_NUM: | |
1088 | reg_efg |= 1 << 2; | |
1089 | break; | |
1090 | case A_A0_NUM: | |
1091 | reg_efg |= 2 << 2; | |
1092 | break; | |
1093 | case A_A1_NUM: | |
1094 | reg_efg |= 3 << 2; | |
1095 | break; | |
1096 | default: | |
1097 | goto fail; | |
1098 | } | |
1099 | break; | |
1100 | ||
1101 | case A_A0: | |
1102 | if (user->type != DSP_REG_N || user->reg != A_A0_NUM) | |
1103 | goto fail; | |
1104 | break; | |
1105 | case A_X0: | |
1106 | if (user->type != DSP_REG_N || user->reg != A_X0_NUM) | |
1107 | goto fail; | |
1108 | break; | |
1109 | case A_X1: | |
1110 | if (user->type != DSP_REG_N || user->reg != A_X1_NUM) | |
1111 | goto fail; | |
1112 | break; | |
1113 | case A_Y0: | |
1114 | if (user->type != DSP_REG_N || user->reg != A_Y0_NUM) | |
1115 | goto fail; | |
1116 | break; | |
1117 | case A_Y1: | |
1118 | if (user->type != DSP_REG_N || user->reg != A_Y1_NUM) | |
1119 | goto fail; | |
1120 | break; | |
1121 | ||
252b5132 RH |
1122 | case F_REG_M: |
1123 | case D_REG_M: | |
1124 | case X_REG_M: | |
1125 | case V_REG_M: | |
1126 | case FPUL_M: | |
1127 | case FPSCR_M: | |
1128 | /* Opcode needs rn */ | |
1129 | if (user->type != arg - F_REG_M + F_REG_N) | |
1130 | goto fail; | |
1131 | reg_m = user->reg; | |
1132 | break; | |
1133 | case DX_REG_M: | |
1134 | if (user->type != D_REG_N && user->type != X_REG_N) | |
1135 | goto fail; | |
1136 | reg_m = user->reg; | |
1137 | break; | |
1138 | case XMTRX_M4: | |
1139 | if (user->type != XMTRX_M4) | |
1140 | goto fail; | |
1141 | reg_m = 4; | |
1142 | break; | |
1143 | ||
1144 | default: | |
1145 | printf (_("unhandled %d\n"), arg); | |
1146 | goto fail; | |
1147 | } | |
1148 | } | |
d4845d57 | 1149 | valid_arch &= this_try->arch; |
252b5132 RH |
1150 | return this_try; |
1151 | fail:; | |
1152 | } | |
1153 | ||
1154 | return 0; | |
1155 | } | |
1156 | ||
1157 | int | |
1158 | check (operand, low, high) | |
1159 | expressionS *operand; | |
1160 | int low; | |
1161 | int high; | |
1162 | { | |
1163 | if (operand->X_op != O_constant | |
1164 | || operand->X_add_number < low | |
1165 | || operand->X_add_number > high) | |
1166 | { | |
1167 | as_bad (_("operand must be absolute in range %d..%d"), low, high); | |
1168 | } | |
1169 | return operand->X_add_number; | |
1170 | } | |
1171 | ||
1172 | ||
1173 | static void | |
1174 | insert (where, how, pcrel) | |
1175 | char *where; | |
1176 | int how; | |
1177 | int pcrel; | |
1178 | { | |
1179 | fix_new_exp (frag_now, | |
1180 | where - frag_now->fr_literal, | |
1181 | 2, | |
1182 | &immediate, | |
1183 | pcrel, | |
1184 | how); | |
1185 | } | |
1186 | ||
1187 | static void | |
1188 | build_relax (opcode) | |
1189 | sh_opcode_info *opcode; | |
1190 | { | |
1191 | int high_byte = target_big_endian ? 0 : 1; | |
1192 | char *p; | |
1193 | ||
1194 | if (opcode->arg[0] == A_BDISP8) | |
1195 | { | |
1196 | int what = (opcode->nibbles[1] & 4) ? COND_JUMP_DELAY : COND_JUMP; | |
1197 | p = frag_var (rs_machine_dependent, | |
1198 | md_relax_table[C (what, COND32)].rlx_length, | |
1199 | md_relax_table[C (what, COND8)].rlx_length, | |
1200 | C (what, 0), | |
1201 | immediate.X_add_symbol, | |
1202 | immediate.X_add_number, | |
1203 | 0); | |
1204 | p[high_byte] = (opcode->nibbles[0] << 4) | (opcode->nibbles[1]); | |
1205 | } | |
1206 | else if (opcode->arg[0] == A_BDISP12) | |
1207 | { | |
1208 | p = frag_var (rs_machine_dependent, | |
1209 | md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length, | |
1210 | md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length, | |
1211 | C (UNCOND_JUMP, 0), | |
1212 | immediate.X_add_symbol, | |
1213 | immediate.X_add_number, | |
1214 | 0); | |
1215 | p[high_byte] = (opcode->nibbles[0] << 4); | |
1216 | } | |
1217 | ||
1218 | } | |
1219 | ||
1220 | /* Now we know what sort of opcodes it is, lets build the bytes - | |
1221 | */ | |
1222 | static void | |
1223 | build_Mytes (opcode, operand) | |
1224 | sh_opcode_info *opcode; | |
1225 | sh_operand_info *operand; | |
1226 | ||
1227 | { | |
1228 | int index; | |
1229 | char nbuf[4]; | |
1230 | char *output = frag_more (2); | |
1231 | int low_byte = target_big_endian ? 1 : 0; | |
1232 | nbuf[0] = 0; | |
1233 | nbuf[1] = 0; | |
1234 | nbuf[2] = 0; | |
1235 | nbuf[3] = 0; | |
1236 | ||
1237 | for (index = 0; index < 4; index++) | |
1238 | { | |
1239 | sh_nibble_type i = opcode->nibbles[index]; | |
1240 | if (i < 16) | |
1241 | { | |
1242 | nbuf[index] = i; | |
1243 | } | |
1244 | else | |
1245 | { | |
1246 | switch (i) | |
1247 | { | |
1248 | case REG_N: | |
1249 | nbuf[index] = reg_n; | |
1250 | break; | |
1251 | case REG_M: | |
1252 | nbuf[index] = reg_m; | |
1253 | break; | |
d4845d57 JR |
1254 | case SDT_REG_N: |
1255 | if (reg_n < 2 || reg_n > 5) | |
1256 | as_bad (_("Invalid register: 'r%d'"), reg_n); | |
1257 | nbuf[index] = (reg_n & 3) | 4; | |
1258 | break; | |
252b5132 RH |
1259 | case REG_NM: |
1260 | nbuf[index] = reg_n | (reg_m >> 2); | |
1261 | break; | |
1262 | case REG_B: | |
1263 | nbuf[index] = reg_b | 0x08; | |
1264 | break; | |
1265 | case DISP_4: | |
1266 | insert (output + low_byte, BFD_RELOC_SH_IMM4, 0); | |
1267 | break; | |
1268 | case IMM_4BY4: | |
1269 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0); | |
1270 | break; | |
1271 | case IMM_4BY2: | |
1272 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0); | |
1273 | break; | |
1274 | case IMM_4: | |
1275 | insert (output + low_byte, BFD_RELOC_SH_IMM4, 0); | |
1276 | break; | |
1277 | case IMM_8BY4: | |
1278 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0); | |
1279 | break; | |
1280 | case IMM_8BY2: | |
1281 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0); | |
1282 | break; | |
1283 | case IMM_8: | |
1284 | insert (output + low_byte, BFD_RELOC_SH_IMM8, 0); | |
1285 | break; | |
1286 | case PCRELIMM_8BY4: | |
1287 | insert (output, BFD_RELOC_SH_PCRELIMM8BY4, 1); | |
1288 | break; | |
1289 | case PCRELIMM_8BY2: | |
1290 | insert (output, BFD_RELOC_SH_PCRELIMM8BY2, 1); | |
1291 | break; | |
1292 | default: | |
1293 | printf (_("failed for %d\n"), i); | |
1294 | } | |
1295 | } | |
1296 | } | |
1297 | if (! target_big_endian) { | |
1298 | output[1] = (nbuf[0] << 4) | (nbuf[1]); | |
1299 | output[0] = (nbuf[2] << 4) | (nbuf[3]); | |
1300 | } | |
1301 | else { | |
1302 | output[0] = (nbuf[0] << 4) | (nbuf[1]); | |
1303 | output[1] = (nbuf[2] << 4) | (nbuf[3]); | |
1304 | } | |
1305 | } | |
1306 | ||
d4845d57 JR |
1307 | /* Find an opcode at the start of *STR_P in the hash table, and set |
1308 | *STR_P to the first character after the last one read. */ | |
252b5132 | 1309 | |
d4845d57 JR |
1310 | static sh_opcode_info * |
1311 | find_cooked_opcode (str_p) | |
1312 | char **str_p; | |
252b5132 | 1313 | { |
d4845d57 | 1314 | char *str = *str_p; |
252b5132 RH |
1315 | unsigned char *op_start; |
1316 | unsigned char *op_end; | |
252b5132 RH |
1317 | char name[20]; |
1318 | int nlen = 0; | |
1319 | /* Drop leading whitespace */ | |
1320 | while (*str == ' ') | |
1321 | str++; | |
1322 | ||
d4845d57 JR |
1323 | /* Find the op code end. |
1324 | The pre-processor will eliminate whitespace in front of | |
1325 | any '@' after the first argument; we may be called from | |
1326 | assemble_ppi, so the opcode might be terminated by an '@'. */ | |
252b5132 RH |
1327 | for (op_start = op_end = (unsigned char *) (str); |
1328 | *op_end | |
1329 | && nlen < 20 | |
d4845d57 | 1330 | && !is_end_of_line[*op_end] && *op_end != ' ' && *op_end != '@'; |
252b5132 RH |
1331 | op_end++) |
1332 | { | |
1333 | unsigned char c = op_start[nlen]; | |
1334 | ||
1335 | /* The machine independent code will convert CMP/EQ into cmp/EQ | |
d4845d57 JR |
1336 | because it thinks the '/' is the end of the symbol. Moreover, |
1337 | all but the first sub-insn is a parallel processing insn won't | |
1338 | be capitailzed. Instead of hacking up the machine independent | |
1339 | code, we just deal with it here. */ | |
252b5132 RH |
1340 | c = isupper (c) ? tolower (c) : c; |
1341 | name[nlen] = c; | |
1342 | nlen++; | |
1343 | } | |
1344 | name[nlen] = 0; | |
d4845d57 | 1345 | *str_p = op_end; |
252b5132 RH |
1346 | |
1347 | if (nlen == 0) | |
1348 | { | |
1349 | as_bad (_("can't find opcode ")); | |
1350 | } | |
1351 | ||
d4845d57 JR |
1352 | return (sh_opcode_info *) hash_find (opcode_hash_control, name); |
1353 | } | |
1354 | ||
1355 | /* Assemble a parallel processing insn. */ | |
1356 | #define DDT_BASE 0xf000 /* Base value for double data transfer insns */ | |
1357 | static void | |
1358 | assemble_ppi (op_end, opcode) | |
1359 | char *op_end; | |
1360 | sh_opcode_info *opcode; | |
1361 | { | |
1362 | int movx = 0; | |
1363 | int movy = 0; | |
1364 | int cond = 0; | |
1365 | int field_b = 0; | |
1366 | char *output; | |
1367 | int move_code; | |
1368 | ||
1369 | /* Some insn ignore one or more register fields, e.g. psts machl,a0. | |
1370 | Make sure we encode a defined insn pattern. */ | |
1371 | reg_x = 0; | |
1372 | reg_y = 0; | |
1373 | ||
1374 | for (;;) | |
1375 | { | |
1376 | sh_operand_info operand[3]; | |
1377 | ||
1378 | if (opcode->arg[0] != A_END) | |
1379 | op_end = get_operands (opcode, op_end, operand); | |
1380 | opcode = get_specific (opcode, operand); | |
1381 | if (opcode == 0) | |
1382 | { | |
1383 | /* Couldn't find an opcode which matched the operands */ | |
1384 | char *where = frag_more (2); | |
1385 | ||
1386 | where[0] = 0x0; | |
1387 | where[1] = 0x0; | |
1388 | as_bad (_("invalid operands for opcode")); | |
1389 | return; | |
1390 | } | |
1391 | if (opcode->nibbles[0] != PPI) | |
1392 | as_bad (_("insn can't be combined with parallel processing insn")); | |
1393 | ||
1394 | switch (opcode->nibbles[1]) | |
1395 | { | |
1396 | ||
1397 | case NOPX: | |
1398 | if (movx) | |
1399 | as_bad (_("multiple movx specifications")); | |
1400 | movx = DDT_BASE; | |
1401 | break; | |
1402 | case NOPY: | |
1403 | if (movy) | |
1404 | as_bad (_("multiple movy specifications")); | |
1405 | movy = DDT_BASE; | |
1406 | break; | |
1407 | ||
1408 | case MOVX: | |
1409 | if (movx) | |
1410 | as_bad (_("multiple movx specifications")); | |
1411 | if (reg_n < 4 || reg_n > 5) | |
1412 | as_bad (_("invalid movx address register")); | |
1413 | if (opcode->nibbles[2] & 8) | |
1414 | { | |
1415 | if (reg_m == A_A1_NUM) | |
1416 | movx = 1 << 7; | |
1417 | else if (reg_m != A_A0_NUM) | |
1418 | as_bad (_("invalid movx dsp register")); | |
1419 | } | |
1420 | else | |
1421 | { | |
1422 | if (reg_x > 1) | |
1423 | as_bad (_("invalid movx dsp register")); | |
1424 | movx = reg_x << 7; | |
1425 | } | |
1426 | movx += ((reg_n - 4) << 9) + (opcode->nibbles[2] << 2) + DDT_BASE; | |
1427 | break; | |
1428 | ||
1429 | case MOVY: | |
1430 | if (movy) | |
1431 | as_bad (_("multiple movy specifications")); | |
1432 | if (opcode->nibbles[2] & 8) | |
1433 | { | |
1434 | /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode, | |
1435 | so add 8 more. */ | |
1436 | movy = 8; | |
1437 | if (reg_m == A_A1_NUM) | |
1438 | movy += 1 << 6; | |
1439 | else if (reg_m != A_A0_NUM) | |
1440 | as_bad (_("invalid movy dsp register")); | |
1441 | } | |
1442 | else | |
1443 | { | |
1444 | if (reg_y > 1) | |
1445 | as_bad (_("invalid movy dsp register")); | |
1446 | movy = reg_y << 6; | |
1447 | } | |
1448 | if (reg_n < 6 || reg_n > 7) | |
1449 | as_bad (_("invalid movy address register")); | |
1450 | movy += ((reg_n - 6) << 8) + opcode->nibbles[2] + DDT_BASE; | |
1451 | break; | |
1452 | ||
1453 | case PSH: | |
1454 | if (immediate.X_op != O_constant) | |
1455 | as_bad (_("dsp immediate shift value not constant")); | |
1456 | field_b = ((opcode->nibbles[2] << 12) | |
1457 | | (immediate.X_add_number & 127) << 4 | |
1458 | | reg_n); | |
1459 | break; | |
1460 | case PPI3: | |
1461 | if (field_b) | |
1462 | as_bad (_("multiple parallel processing specifications")); | |
1463 | field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8) | |
1464 | + (reg_x << 6) + (reg_y << 4) + reg_n); | |
1465 | break; | |
1466 | case PDC: | |
1467 | if (cond) | |
1468 | as_bad (_("multiple condition specifications")); | |
1469 | cond = opcode->nibbles[2] << 8; | |
1470 | if (*op_end) | |
1471 | goto skip_cond_check; | |
1472 | break; | |
1473 | case PPIC: | |
1474 | if (field_b) | |
1475 | as_bad (_("multiple parallel processing specifications")); | |
1476 | field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8) | |
1477 | + cond + (reg_x << 6) + (reg_y << 4) + reg_n); | |
1478 | cond = 0; | |
1479 | break; | |
1480 | case PMUL: | |
1481 | if (field_b) | |
1482 | { | |
1483 | if ((field_b & 0xef00) != 0xa100) | |
1484 | as_bad (_("insn cannot be combined with pmuls")); | |
1485 | field_b -= 0x8100; | |
1486 | switch (field_b & 0xf) | |
1487 | { | |
1488 | case A_X0_NUM: | |
1489 | field_b += 0 - A_X0_NUM; | |
1490 | break; | |
1491 | case A_Y0_NUM: | |
1492 | field_b += 1 - A_Y0_NUM; | |
1493 | break; | |
1494 | case A_A0_NUM: | |
1495 | field_b += 2 - A_A0_NUM; | |
1496 | break; | |
1497 | case A_A1_NUM: | |
1498 | field_b += 3 - A_A1_NUM; | |
1499 | break; | |
1500 | default: | |
1501 | as_bad (_("bad padd / psub pmuls output operand")); | |
1502 | } | |
1503 | } | |
1504 | field_b += 0x4000 + reg_efg; | |
1505 | break; | |
1506 | default: | |
1507 | abort (); | |
1508 | } | |
1509 | if (cond) | |
1510 | { | |
1511 | as_bad (_("condition not followed by conditionalizable insn")); | |
1512 | cond = 0; | |
1513 | } | |
1514 | if (! *op_end) | |
1515 | break; | |
1516 | skip_cond_check: | |
1517 | opcode = find_cooked_opcode (&op_end); | |
1518 | if (opcode == NULL) | |
1519 | { | |
1520 | (as_bad | |
1521 | (_("unrecognized characters at end of parallel processing insn"))); | |
1522 | break; | |
1523 | } | |
1524 | } | |
1525 | ||
1526 | move_code = movx | movy; | |
1527 | if (field_b) | |
1528 | { | |
1529 | /* Parallel processing insn. */ | |
1530 | unsigned long ppi_code = (movx | movy | 0xf800) << 16 | field_b; | |
1531 | ||
1532 | output = frag_more (4); | |
1533 | if (! target_big_endian) | |
1534 | { | |
1535 | output[3] = ppi_code >> 8; | |
1536 | output[2] = ppi_code; | |
1537 | } | |
1538 | else | |
1539 | { | |
1540 | output[2] = ppi_code >> 8; | |
1541 | output[3] = ppi_code; | |
1542 | } | |
1543 | move_code |= 0xf800; | |
1544 | } | |
1545 | else | |
1546 | /* Just a double data transfer. */ | |
1547 | output = frag_more (2); | |
1548 | if (! target_big_endian) | |
1549 | { | |
1550 | output[1] = move_code >> 8; | |
1551 | output[0] = move_code; | |
1552 | } | |
1553 | else | |
1554 | { | |
1555 | output[0] = move_code >> 8; | |
1556 | output[1] = move_code; | |
1557 | } | |
1558 | } | |
1559 | ||
1560 | /* This is the guts of the machine-dependent assembler. STR points to a | |
1561 | machine dependent instruction. This function is supposed to emit | |
1562 | the frags/bytes it assembles to. | |
1563 | */ | |
1564 | ||
1565 | void | |
1566 | md_assemble (str) | |
1567 | char *str; | |
1568 | { | |
1569 | unsigned char *op_end; | |
1570 | sh_operand_info operand[3]; | |
1571 | sh_opcode_info *opcode; | |
1572 | ||
1573 | opcode = find_cooked_opcode (&str); | |
1574 | op_end = str; | |
252b5132 RH |
1575 | |
1576 | if (opcode == NULL) | |
1577 | { | |
1578 | as_bad (_("unknown opcode")); | |
1579 | return; | |
1580 | } | |
1581 | ||
1582 | if (sh_relax | |
1583 | && ! seg_info (now_seg)->tc_segment_info_data.in_code) | |
1584 | { | |
1585 | /* Output a CODE reloc to tell the linker that the following | |
1586 | bytes are instructions, not data. */ | |
1587 | fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, | |
1588 | BFD_RELOC_SH_CODE); | |
1589 | seg_info (now_seg)->tc_segment_info_data.in_code = 1; | |
1590 | } | |
1591 | ||
d4845d57 JR |
1592 | if (opcode->nibbles[0] == PPI) |
1593 | { | |
1594 | assemble_ppi (op_end, opcode); | |
1595 | return; | |
1596 | } | |
1597 | ||
252b5132 RH |
1598 | if (opcode->arg[0] == A_BDISP12 |
1599 | || opcode->arg[0] == A_BDISP8) | |
1600 | { | |
1601 | parse_exp (op_end + 1); | |
1602 | build_relax (opcode); | |
1603 | } | |
1604 | else | |
1605 | { | |
5fc44b2d | 1606 | if (opcode->arg[0] == A_END) |
252b5132 | 1607 | { |
5fc44b2d JR |
1608 | /* Ignore trailing whitespace. If there is any, it has already |
1609 | been compressed to a single space. */ | |
1610 | if (*op_end == ' ') | |
1611 | op_end++; | |
1612 | } | |
1613 | else | |
1614 | { | |
1615 | op_end = get_operands (opcode, op_end, operand); | |
252b5132 RH |
1616 | } |
1617 | opcode = get_specific (opcode, operand); | |
1618 | ||
1619 | if (opcode == 0) | |
1620 | { | |
1621 | /* Couldn't find an opcode which matched the operands */ | |
1622 | char *where = frag_more (2); | |
1623 | ||
1624 | where[0] = 0x0; | |
1625 | where[1] = 0x0; | |
1626 | as_bad (_("invalid operands for opcode")); | |
1627 | return; | |
1628 | } | |
1629 | ||
5fc44b2d JR |
1630 | if (*op_end) |
1631 | as_bad (_("excess operands: '%s'"), op_end); | |
1632 | ||
252b5132 RH |
1633 | build_Mytes (opcode, operand); |
1634 | } | |
1635 | ||
1636 | } | |
1637 | ||
1638 | /* This routine is called each time a label definition is seen. It | |
1639 | emits a BFD_RELOC_SH_LABEL reloc if necessary. */ | |
1640 | ||
1641 | void | |
1642 | sh_frob_label () | |
1643 | { | |
1644 | static fragS *last_label_frag; | |
1645 | static int last_label_offset; | |
1646 | ||
1647 | if (sh_relax | |
1648 | && seg_info (now_seg)->tc_segment_info_data.in_code) | |
1649 | { | |
1650 | int offset; | |
1651 | ||
1652 | offset = frag_now_fix (); | |
1653 | if (frag_now != last_label_frag | |
1654 | || offset != last_label_offset) | |
1655 | { | |
1656 | fix_new (frag_now, offset, 2, &abs_symbol, 0, 0, BFD_RELOC_SH_LABEL); | |
1657 | last_label_frag = frag_now; | |
1658 | last_label_offset = offset; | |
1659 | } | |
1660 | } | |
1661 | } | |
1662 | ||
1663 | /* This routine is called when the assembler is about to output some | |
1664 | data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */ | |
1665 | ||
1666 | void | |
1667 | sh_flush_pending_output () | |
1668 | { | |
1669 | if (sh_relax | |
1670 | && seg_info (now_seg)->tc_segment_info_data.in_code) | |
1671 | { | |
1672 | fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, | |
1673 | BFD_RELOC_SH_DATA); | |
1674 | seg_info (now_seg)->tc_segment_info_data.in_code = 0; | |
1675 | } | |
1676 | } | |
1677 | ||
1678 | symbolS * | |
1679 | DEFUN (md_undefined_symbol, (name), | |
1680 | char *name) | |
1681 | { | |
1682 | return 0; | |
1683 | } | |
1684 | ||
1685 | #ifdef OBJ_COFF | |
056350c6 | 1686 | #ifndef BFD_ASSEMBLER |
252b5132 RH |
1687 | |
1688 | void | |
1689 | DEFUN (tc_crawl_symbol_chain, (headers), | |
1690 | object_headers * headers) | |
1691 | { | |
1692 | printf (_("call to tc_crawl_symbol_chain \n")); | |
1693 | } | |
1694 | ||
1695 | void | |
1696 | DEFUN (tc_headers_hook, (headers), | |
1697 | object_headers * headers) | |
1698 | { | |
1699 | printf (_("call to tc_headers_hook \n")); | |
1700 | } | |
1701 | ||
056350c6 | 1702 | #endif |
252b5132 RH |
1703 | #endif |
1704 | ||
1705 | /* Various routines to kill one day */ | |
1706 | /* Equal to MAX_PRECISION in atof-ieee.c */ | |
1707 | #define MAX_LITTLENUMS 6 | |
1708 | ||
1709 | /* Turn a string in input_line_pointer into a floating point constant of type | |
1710 | type, and store the appropriate bytes in *litP. The number of LITTLENUMS | |
1711 | emitted is stored in *sizeP . An error message is returned, or NULL on OK. | |
1712 | */ | |
1713 | char * | |
1714 | md_atof (type, litP, sizeP) | |
1715 | int type; | |
1716 | char *litP; | |
1717 | int *sizeP; | |
1718 | { | |
1719 | int prec; | |
1720 | LITTLENUM_TYPE words[4]; | |
1721 | char *t; | |
1722 | int i; | |
1723 | ||
1724 | switch (type) | |
1725 | { | |
1726 | case 'f': | |
1727 | prec = 2; | |
1728 | break; | |
1729 | ||
1730 | case 'd': | |
1731 | prec = 4; | |
1732 | break; | |
1733 | ||
1734 | default: | |
1735 | *sizeP = 0; | |
1736 | return _("bad call to md_atof"); | |
1737 | } | |
1738 | ||
1739 | t = atof_ieee (input_line_pointer, type, words); | |
1740 | if (t) | |
1741 | input_line_pointer = t; | |
1742 | ||
1743 | *sizeP = prec * 2; | |
1744 | ||
1745 | if (! target_big_endian) | |
1746 | { | |
1747 | for (i = prec - 1; i >= 0; i--) | |
1748 | { | |
1749 | md_number_to_chars (litP, (valueT) words[i], 2); | |
1750 | litP += 2; | |
1751 | } | |
1752 | } | |
1753 | else | |
1754 | { | |
1755 | for (i = 0; i < prec; i++) | |
1756 | { | |
1757 | md_number_to_chars (litP, (valueT) words[i], 2); | |
1758 | litP += 2; | |
1759 | } | |
1760 | } | |
1761 | ||
1762 | return NULL; | |
1763 | } | |
1764 | ||
1765 | /* Handle the .uses pseudo-op. This pseudo-op is used just before a | |
1766 | call instruction. It refers to a label of the instruction which | |
1767 | loads the register which the call uses. We use it to generate a | |
1768 | special reloc for the linker. */ | |
1769 | ||
1770 | static void | |
1771 | s_uses (ignore) | |
1772 | int ignore; | |
1773 | { | |
1774 | expressionS ex; | |
1775 | ||
1776 | if (! sh_relax) | |
1777 | as_warn (_(".uses pseudo-op seen when not relaxing")); | |
1778 | ||
1779 | expression (&ex); | |
1780 | ||
1781 | if (ex.X_op != O_symbol || ex.X_add_number != 0) | |
1782 | { | |
1783 | as_bad (_("bad .uses format")); | |
1784 | ignore_rest_of_line (); | |
1785 | return; | |
1786 | } | |
1787 | ||
1788 | fix_new_exp (frag_now, frag_now_fix (), 2, &ex, 1, BFD_RELOC_SH_USES); | |
1789 | ||
1790 | demand_empty_rest_of_line (); | |
1791 | } | |
1792 | \f | |
1793 | CONST char *md_shortopts = ""; | |
1794 | struct option md_longopts[] = { | |
1795 | ||
1796 | #define OPTION_RELAX (OPTION_MD_BASE) | |
1797 | #define OPTION_LITTLE (OPTION_MD_BASE + 1) | |
1798 | #define OPTION_SMALL (OPTION_LITTLE + 1) | |
d4845d57 | 1799 | #define OPTION_DSP (OPTION_SMALL + 1) |
252b5132 RH |
1800 | |
1801 | {"relax", no_argument, NULL, OPTION_RELAX}, | |
1802 | {"little", no_argument, NULL, OPTION_LITTLE}, | |
1803 | {"small", no_argument, NULL, OPTION_SMALL}, | |
d4845d57 | 1804 | {"dsp", no_argument, NULL, OPTION_DSP}, |
252b5132 RH |
1805 | {NULL, no_argument, NULL, 0} |
1806 | }; | |
1807 | size_t md_longopts_size = sizeof(md_longopts); | |
1808 | ||
1809 | int | |
1810 | md_parse_option (c, arg) | |
1811 | int c; | |
1812 | char *arg; | |
1813 | { | |
1814 | switch (c) | |
1815 | { | |
1816 | case OPTION_RELAX: | |
1817 | sh_relax = 1; | |
1818 | break; | |
1819 | ||
1820 | case OPTION_LITTLE: | |
1821 | shl = 1; | |
1822 | target_big_endian = 0; | |
1823 | break; | |
1824 | ||
1825 | case OPTION_SMALL: | |
1826 | sh_small = 1; | |
1827 | break; | |
1828 | ||
d4845d57 JR |
1829 | case OPTION_DSP: |
1830 | sh_dsp = 1; | |
1831 | break; | |
1832 | ||
252b5132 RH |
1833 | default: |
1834 | return 0; | |
1835 | } | |
1836 | ||
1837 | return 1; | |
1838 | } | |
1839 | ||
1840 | void | |
1841 | md_show_usage (stream) | |
1842 | FILE *stream; | |
1843 | { | |
1844 | fprintf(stream, _("\ | |
1845 | SH options:\n\ | |
1846 | -little generate little endian code\n\ | |
1847 | -relax alter jump instructions for long displacements\n\ | |
182e89d3 JR |
1848 | -small align sections to 4 byte boundaries, not 16\n |
1849 | -dsp enable sh-dsp insns, and disable sh3e / sh4 insns.\n")); | |
252b5132 RH |
1850 | } |
1851 | \f | |
1852 | void | |
1853 | tc_Nout_fix_to_chars () | |
1854 | { | |
1855 | printf (_("call to tc_Nout_fix_to_chars \n")); | |
1856 | abort (); | |
1857 | } | |
1858 | ||
1859 | /* This struct is used to pass arguments to sh_count_relocs through | |
1860 | bfd_map_over_sections. */ | |
1861 | ||
1862 | struct sh_count_relocs | |
1863 | { | |
1864 | /* Symbol we are looking for. */ | |
1865 | symbolS *sym; | |
1866 | /* Count of relocs found. */ | |
1867 | int count; | |
1868 | }; | |
1869 | ||
1870 | /* Count the number of fixups in a section which refer to a particular | |
1871 | symbol. When using BFD_ASSEMBLER, this is called via | |
1872 | bfd_map_over_sections. */ | |
1873 | ||
1874 | /*ARGSUSED*/ | |
1875 | static void | |
1876 | sh_count_relocs (abfd, sec, data) | |
1877 | bfd *abfd; | |
1878 | segT sec; | |
1879 | PTR data; | |
1880 | { | |
1881 | struct sh_count_relocs *info = (struct sh_count_relocs *) data; | |
1882 | segment_info_type *seginfo; | |
1883 | symbolS *sym; | |
1884 | fixS *fix; | |
1885 | ||
1886 | seginfo = seg_info (sec); | |
1887 | if (seginfo == NULL) | |
1888 | return; | |
1889 | ||
1890 | sym = info->sym; | |
1891 | for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) | |
1892 | { | |
1893 | if (fix->fx_addsy == sym) | |
1894 | { | |
1895 | ++info->count; | |
1896 | fix->fx_tcbit = 1; | |
1897 | } | |
1898 | } | |
1899 | } | |
1900 | ||
1901 | /* Handle the count relocs for a particular section. When using | |
1902 | BFD_ASSEMBLER, this is called via bfd_map_over_sections. */ | |
1903 | ||
1904 | /*ARGSUSED*/ | |
1905 | static void | |
1906 | sh_frob_section (abfd, sec, ignore) | |
1907 | bfd *abfd; | |
1908 | segT sec; | |
1909 | PTR ignore; | |
1910 | { | |
1911 | segment_info_type *seginfo; | |
1912 | fixS *fix; | |
1913 | ||
1914 | seginfo = seg_info (sec); | |
1915 | if (seginfo == NULL) | |
1916 | return; | |
1917 | ||
1918 | for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) | |
1919 | { | |
1920 | symbolS *sym; | |
1921 | bfd_vma val; | |
1922 | fixS *fscan; | |
1923 | struct sh_count_relocs info; | |
1924 | ||
1925 | if (fix->fx_r_type != BFD_RELOC_SH_USES) | |
1926 | continue; | |
1927 | ||
1928 | /* The BFD_RELOC_SH_USES reloc should refer to a defined local | |
1929 | symbol in the same section. */ | |
1930 | sym = fix->fx_addsy; | |
1931 | if (sym == NULL | |
1932 | || fix->fx_subsy != NULL | |
1933 | || fix->fx_addnumber != 0 | |
1934 | || S_GET_SEGMENT (sym) != sec | |
1935 | #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF) | |
1936 | || S_GET_STORAGE_CLASS (sym) == C_EXT | |
1937 | #endif | |
1938 | || S_IS_EXTERNAL (sym)) | |
1939 | { | |
1940 | as_warn_where (fix->fx_file, fix->fx_line, | |
1941 | _(".uses does not refer to a local symbol in the same section")); | |
1942 | continue; | |
1943 | } | |
1944 | ||
1945 | /* Look through the fixups again, this time looking for one | |
1946 | at the same location as sym. */ | |
1947 | val = S_GET_VALUE (sym); | |
1948 | for (fscan = seginfo->fix_root; | |
1949 | fscan != NULL; | |
1950 | fscan = fscan->fx_next) | |
1951 | if (val == fscan->fx_frag->fr_address + fscan->fx_where | |
1952 | && fscan->fx_r_type != BFD_RELOC_SH_ALIGN | |
1953 | && fscan->fx_r_type != BFD_RELOC_SH_CODE | |
1954 | && fscan->fx_r_type != BFD_RELOC_SH_DATA | |
1955 | && fscan->fx_r_type != BFD_RELOC_SH_LABEL) | |
1956 | break; | |
1957 | if (fscan == NULL) | |
1958 | { | |
1959 | as_warn_where (fix->fx_file, fix->fx_line, | |
1960 | _("can't find fixup pointed to by .uses")); | |
1961 | continue; | |
1962 | } | |
1963 | ||
1964 | if (fscan->fx_tcbit) | |
1965 | { | |
1966 | /* We've already done this one. */ | |
1967 | continue; | |
1968 | } | |
1969 | ||
1970 | /* fscan should also be a fixup to a local symbol in the same | |
1971 | section. */ | |
1972 | sym = fscan->fx_addsy; | |
1973 | if (sym == NULL | |
1974 | || fscan->fx_subsy != NULL | |
1975 | || fscan->fx_addnumber != 0 | |
1976 | || S_GET_SEGMENT (sym) != sec | |
1977 | #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF) | |
1978 | || S_GET_STORAGE_CLASS (sym) == C_EXT | |
1979 | #endif | |
1980 | || S_IS_EXTERNAL (sym)) | |
1981 | { | |
1982 | as_warn_where (fix->fx_file, fix->fx_line, | |
1983 | _(".uses target does not refer to a local symbol in the same section")); | |
1984 | continue; | |
1985 | } | |
1986 | ||
1987 | /* Now we look through all the fixups of all the sections, | |
1988 | counting the number of times we find a reference to sym. */ | |
1989 | info.sym = sym; | |
1990 | info.count = 0; | |
1991 | #ifdef BFD_ASSEMBLER | |
1992 | bfd_map_over_sections (stdoutput, sh_count_relocs, (PTR) &info); | |
1993 | #else | |
1994 | { | |
1995 | int iscan; | |
1996 | ||
1997 | for (iscan = SEG_E0; iscan < SEG_UNKNOWN; iscan++) | |
1998 | sh_count_relocs ((bfd *) NULL, iscan, (PTR) &info); | |
1999 | } | |
2000 | #endif | |
2001 | ||
2002 | if (info.count < 1) | |
2003 | abort (); | |
2004 | ||
2005 | /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym. | |
2006 | We have already adjusted the value of sym to include the | |
2007 | fragment address, so we undo that adjustment here. */ | |
2008 | subseg_change (sec, 0); | |
49309057 ILT |
2009 | fix_new (symbol_get_frag (sym), |
2010 | S_GET_VALUE (sym) - symbol_get_frag (sym)->fr_address, | |
252b5132 RH |
2011 | 4, &abs_symbol, info.count, 0, BFD_RELOC_SH_COUNT); |
2012 | } | |
2013 | } | |
2014 | ||
2015 | /* This function is called after the symbol table has been completed, | |
2016 | but before the relocs or section contents have been written out. | |
2017 | If we have seen any .uses pseudo-ops, they point to an instruction | |
2018 | which loads a register with the address of a function. We look | |
2019 | through the fixups to find where the function address is being | |
2020 | loaded from. We then generate a COUNT reloc giving the number of | |
2021 | times that function address is referred to. The linker uses this | |
2022 | information when doing relaxing, to decide when it can eliminate | |
2023 | the stored function address entirely. */ | |
2024 | ||
2025 | void | |
2026 | sh_frob_file () | |
2027 | { | |
2028 | if (! sh_relax) | |
2029 | return; | |
2030 | ||
2031 | #ifdef BFD_ASSEMBLER | |
2032 | bfd_map_over_sections (stdoutput, sh_frob_section, (PTR) NULL); | |
2033 | #else | |
2034 | { | |
2035 | int iseg; | |
2036 | ||
2037 | for (iseg = SEG_E0; iseg < SEG_UNKNOWN; iseg++) | |
2038 | sh_frob_section ((bfd *) NULL, iseg, (PTR) NULL); | |
2039 | } | |
2040 | #endif | |
2041 | } | |
2042 | ||
2043 | /* Called after relaxing. Set the correct sizes of the fragments, and | |
2044 | create relocs so that md_apply_fix will fill in the correct values. */ | |
2045 | ||
2046 | void | |
2047 | md_convert_frag (headers, seg, fragP) | |
2048 | #ifdef BFD_ASSEMBLER | |
2049 | bfd *headers; | |
2050 | #else | |
2051 | object_headers *headers; | |
2052 | #endif | |
2053 | segT seg; | |
2054 | fragS *fragP; | |
2055 | { | |
2056 | int donerelax = 0; | |
2057 | ||
2058 | switch (fragP->fr_subtype) | |
2059 | { | |
2060 | case C (COND_JUMP, COND8): | |
2061 | case C (COND_JUMP_DELAY, COND8): | |
2062 | subseg_change (seg, 0); | |
2063 | fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset, | |
2064 | 1, BFD_RELOC_SH_PCDISP8BY2); | |
2065 | fragP->fr_fix += 2; | |
2066 | fragP->fr_var = 0; | |
2067 | break; | |
2068 | ||
2069 | case C (UNCOND_JUMP, UNCOND12): | |
2070 | subseg_change (seg, 0); | |
2071 | fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset, | |
2072 | 1, BFD_RELOC_SH_PCDISP12BY2); | |
2073 | fragP->fr_fix += 2; | |
2074 | fragP->fr_var = 0; | |
2075 | break; | |
2076 | ||
2077 | case C (UNCOND_JUMP, UNCOND32): | |
2078 | case C (UNCOND_JUMP, UNDEF_WORD_DISP): | |
2079 | if (fragP->fr_symbol == NULL) | |
2080 | as_bad (_("at 0x%lx, displacement overflows 12-bit field"), | |
2081 | (unsigned long) fragP->fr_address); | |
2082 | else if (S_IS_DEFINED (fragP->fr_symbol)) | |
2083 | as_bad (_("at 0x%lx, displacement to defined symbol %s overflows 12-bit field"), | |
2084 | (unsigned long) fragP->fr_address, | |
2085 | S_GET_NAME (fragP->fr_symbol)); | |
2086 | else | |
2087 | as_bad (_("at 0x%lx, displacement to undefined symbol %s overflows 12-bit field"), | |
2088 | (unsigned long) fragP->fr_address, | |
2089 | S_GET_NAME (fragP->fr_symbol)); | |
2090 | ||
2091 | #if 0 /* This code works, but generates poor code and the compiler | |
2092 | should never produce a sequence that requires it to be used. */ | |
2093 | ||
2094 | /* A jump wont fit in 12 bits, make code which looks like | |
2095 | bra foo | |
2096 | mov.w @(0, PC), r14 | |
2097 | .long disp | |
2098 | foo: bra @r14 | |
2099 | */ | |
2100 | int t = buffer[0] & 0x10; | |
2101 | ||
2102 | buffer[highbyte] = 0xa0; /* branch over move and disp */ | |
2103 | buffer[lowbyte] = 3; | |
2104 | buffer[highbyte+2] = 0xd0 | JREG; /* Build mov insn */ | |
2105 | buffer[lowbyte+2] = 0x00; | |
2106 | ||
2107 | buffer[highbyte+4] = 0; /* space for 32 bit jump disp */ | |
2108 | buffer[lowbyte+4] = 0; | |
2109 | buffer[highbyte+6] = 0; | |
2110 | buffer[lowbyte+6] = 0; | |
2111 | ||
2112 | buffer[highbyte+8] = 0x40 | JREG; /* Build jmp @JREG */ | |
2113 | buffer[lowbyte+8] = t ? 0xb : 0x2b; | |
2114 | ||
2115 | buffer[highbyte+10] = 0x20; /* build nop */ | |
2116 | buffer[lowbyte+10] = 0x0b; | |
2117 | ||
2118 | /* Make reloc for the long disp */ | |
2119 | fix_new (fragP, | |
2120 | fragP->fr_fix + 4, | |
2121 | 4, | |
2122 | fragP->fr_symbol, | |
2123 | fragP->fr_offset, | |
2124 | 0, | |
2125 | BFD_RELOC_32); | |
2126 | fragP->fr_fix += UNCOND32_LENGTH; | |
2127 | fragP->fr_var = 0; | |
2128 | donerelax = 1; | |
2129 | #endif | |
2130 | ||
2131 | break; | |
2132 | ||
2133 | case C (COND_JUMP, COND12): | |
2134 | case C (COND_JUMP_DELAY, COND12): | |
2135 | /* A bcond won't fit, so turn it into a b!cond; bra disp; nop */ | |
2136 | /* I found that a relax failure for gcc.c-torture/execute/930628-1.c | |
2137 | was due to gas incorrectly relaxing an out-of-range conditional | |
2138 | branch with delay slot. It turned: | |
2139 | bf.s L6 (slot mov.l r12,@(44,r0)) | |
2140 | into: | |
2141 | ||
2142 | 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6) | |
2143 | 30: 00 09 nop | |
2144 | 32: 10 cb mov.l r12,@(44,r0) | |
2145 | Therefore, branches with delay slots have to be handled | |
2146 | differently from ones without delay slots. */ | |
2147 | { | |
2148 | unsigned char *buffer = | |
2149 | (unsigned char *) (fragP->fr_fix + fragP->fr_literal); | |
2150 | int highbyte = target_big_endian ? 0 : 1; | |
2151 | int lowbyte = target_big_endian ? 1 : 0; | |
2152 | int delay = fragP->fr_subtype == C (COND_JUMP_DELAY, COND12); | |
2153 | ||
2154 | /* Toggle the true/false bit of the bcond. */ | |
2155 | buffer[highbyte] ^= 0x2; | |
2156 | ||
2157 | /* If this is a dalayed branch, we may not put the the bra in the | |
2158 | slot. So we change it to a non-delayed branch, like that: | |
2159 | b! cond slot_label; bra disp; slot_label: slot_insn | |
2160 | ??? We should try if swapping the conditional branch and | |
2161 | its delay-slot insn already makes the branch reach. */ | |
2162 | ||
2163 | /* Build a relocation to six / four bytes farther on. */ | |
2164 | subseg_change (seg, 0); | |
2165 | fix_new (fragP, fragP->fr_fix, 2, | |
2166 | #ifdef BFD_ASSEMBLER | |
2167 | section_symbol (seg), | |
2168 | #else | |
2169 | seg_info (seg)->dot, | |
2170 | #endif | |
2171 | fragP->fr_address + fragP->fr_fix + (delay ? 4 : 6), | |
2172 | 1, BFD_RELOC_SH_PCDISP8BY2); | |
2173 | ||
2174 | /* Set up a jump instruction. */ | |
2175 | buffer[highbyte + 2] = 0xa0; | |
2176 | buffer[lowbyte + 2] = 0; | |
2177 | fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol, | |
2178 | fragP->fr_offset, 1, BFD_RELOC_SH_PCDISP12BY2); | |
2179 | ||
2180 | if (delay) | |
2181 | { | |
2182 | buffer[highbyte] &= ~0x4; /* Removes delay slot from branch. */ | |
2183 | fragP->fr_fix += 4; | |
2184 | } | |
2185 | else | |
2186 | { | |
2187 | /* Fill in a NOP instruction. */ | |
2188 | buffer[highbyte + 4] = 0x0; | |
2189 | buffer[lowbyte + 4] = 0x9; | |
2190 | ||
2191 | fragP->fr_fix += 6; | |
2192 | } | |
2193 | fragP->fr_var = 0; | |
2194 | donerelax = 1; | |
2195 | } | |
2196 | break; | |
2197 | ||
2198 | case C (COND_JUMP, COND32): | |
2199 | case C (COND_JUMP_DELAY, COND32): | |
2200 | case C (COND_JUMP, UNDEF_WORD_DISP): | |
2201 | case C (COND_JUMP_DELAY, UNDEF_WORD_DISP): | |
2202 | if (fragP->fr_symbol == NULL) | |
2203 | as_bad (_("at 0x%lx, displacement overflows 8-bit field"), | |
2204 | (unsigned long) fragP->fr_address); | |
2205 | else if (S_IS_DEFINED (fragP->fr_symbol)) | |
2206 | as_bad (_("at 0x%lx, displacement to defined symbol %s overflows 8-bit field "), | |
2207 | (unsigned long) fragP->fr_address, | |
2208 | S_GET_NAME (fragP->fr_symbol)); | |
2209 | else | |
2210 | as_bad (_("at 0x%lx, displacement to undefined symbol %s overflows 8-bit field "), | |
2211 | (unsigned long) fragP->fr_address, | |
2212 | S_GET_NAME (fragP->fr_symbol)); | |
2213 | ||
2214 | #if 0 /* This code works, but generates poor code, and the compiler | |
2215 | should never produce a sequence that requires it to be used. */ | |
2216 | ||
2217 | /* A bcond won't fit and it won't go into a 12 bit | |
2218 | displacement either, the code sequence looks like: | |
2219 | b!cond foop | |
2220 | mov.w @(n, PC), r14 | |
2221 | jmp @r14 | |
2222 | nop | |
2223 | .long where | |
2224 | foop: | |
2225 | */ | |
2226 | ||
2227 | buffer[0] ^= 0x2; /* Toggle T/F bit */ | |
2228 | #define JREG 14 | |
2229 | buffer[1] = 5; /* branch over mov, jump, nop and ptr */ | |
2230 | buffer[2] = 0xd0 | JREG; /* Build mov insn */ | |
2231 | buffer[3] = 0x2; | |
2232 | buffer[4] = 0x40 | JREG; /* Build jmp @JREG */ | |
2233 | buffer[5] = 0x0b; | |
2234 | buffer[6] = 0x20; /* build nop */ | |
2235 | buffer[7] = 0x0b; | |
2236 | buffer[8] = 0; /* space for 32 bit jump disp */ | |
2237 | buffer[9] = 0; | |
2238 | buffer[10] = 0; | |
2239 | buffer[11] = 0; | |
2240 | buffer[12] = 0; | |
2241 | buffer[13] = 0; | |
2242 | /* Make reloc for the long disp */ | |
2243 | fix_new (fragP, | |
2244 | fragP->fr_fix + 8, | |
2245 | 4, | |
2246 | fragP->fr_symbol, | |
2247 | fragP->fr_offset, | |
2248 | 0, | |
2249 | BFD_RELOC_32); | |
2250 | fragP->fr_fix += COND32_LENGTH; | |
2251 | fragP->fr_var = 0; | |
2252 | donerelax = 1; | |
2253 | #endif | |
2254 | ||
2255 | break; | |
2256 | ||
2257 | default: | |
2258 | abort (); | |
2259 | } | |
2260 | ||
2261 | if (donerelax && !sh_relax) | |
2262 | as_warn_where (fragP->fr_file, fragP->fr_line, | |
2263 | _("overflow in branch to %s; converted into longer instruction sequence"), | |
2264 | (fragP->fr_symbol != NULL | |
2265 | ? S_GET_NAME (fragP->fr_symbol) | |
2266 | : "")); | |
2267 | } | |
2268 | ||
2269 | valueT | |
2270 | DEFUN (md_section_align, (seg, size), | |
2271 | segT seg AND | |
2272 | valueT size) | |
2273 | { | |
2274 | #ifdef BFD_ASSEMBLER | |
2275 | #ifdef OBJ_ELF | |
2276 | return size; | |
2277 | #else /* ! OBJ_ELF */ | |
2278 | return ((size + (1 << bfd_get_section_alignment (stdoutput, seg)) - 1) | |
2279 | & (-1 << bfd_get_section_alignment (stdoutput, seg))); | |
2280 | #endif /* ! OBJ_ELF */ | |
2281 | #else /* ! BFD_ASSEMBLER */ | |
2282 | return ((size + (1 << section_alignment[(int) seg]) - 1) | |
2283 | & (-1 << section_alignment[(int) seg])); | |
2284 | #endif /* ! BFD_ASSEMBLER */ | |
2285 | } | |
2286 | ||
2287 | /* This static variable is set by s_uacons to tell sh_cons_align that | |
2288 | the expession does not need to be aligned. */ | |
2289 | ||
2290 | static int sh_no_align_cons = 0; | |
2291 | ||
2292 | /* This handles the unaligned space allocation pseudo-ops, such as | |
2293 | .uaword. .uaword is just like .word, but the value does not need | |
2294 | to be aligned. */ | |
2295 | ||
2296 | static void | |
2297 | s_uacons (bytes) | |
2298 | int bytes; | |
2299 | { | |
2300 | /* Tell sh_cons_align not to align this value. */ | |
2301 | sh_no_align_cons = 1; | |
2302 | cons (bytes); | |
2303 | } | |
2304 | ||
2305 | /* If a .word, et. al., pseud-op is seen, warn if the value is not | |
2306 | aligned correctly. Note that this can cause warnings to be issued | |
2307 | when assembling initialized structured which were declared with the | |
2308 | packed attribute. FIXME: Perhaps we should require an option to | |
2309 | enable this warning? */ | |
2310 | ||
2311 | void | |
2312 | sh_cons_align (nbytes) | |
2313 | int nbytes; | |
2314 | { | |
2315 | int nalign; | |
2316 | char *p; | |
2317 | ||
2318 | if (sh_no_align_cons) | |
2319 | { | |
2320 | /* This is an unaligned pseudo-op. */ | |
2321 | sh_no_align_cons = 0; | |
2322 | return; | |
2323 | } | |
2324 | ||
2325 | nalign = 0; | |
2326 | while ((nbytes & 1) == 0) | |
2327 | { | |
2328 | ++nalign; | |
2329 | nbytes >>= 1; | |
2330 | } | |
2331 | ||
2332 | if (nalign == 0) | |
2333 | return; | |
2334 | ||
2335 | if (now_seg == absolute_section) | |
2336 | { | |
2337 | if ((abs_section_offset & ((1 << nalign) - 1)) != 0) | |
2338 | as_warn (_("misaligned data")); | |
2339 | return; | |
2340 | } | |
2341 | ||
2342 | p = frag_var (rs_align_code, 1, 1, (relax_substateT) 0, | |
2343 | (symbolS *) NULL, (offsetT) nalign, (char *) NULL); | |
2344 | ||
2345 | record_alignment (now_seg, nalign); | |
2346 | } | |
2347 | ||
2348 | /* When relaxing, we need to output a reloc for any .align directive | |
2349 | that requests alignment to a four byte boundary or larger. This is | |
2350 | also where we check for misaligned data. */ | |
2351 | ||
2352 | void | |
2353 | sh_handle_align (frag) | |
2354 | fragS *frag; | |
2355 | { | |
2356 | if (sh_relax | |
2357 | && frag->fr_type == rs_align | |
2358 | && frag->fr_address + frag->fr_fix > 0 | |
2359 | && frag->fr_offset > 1 | |
2360 | && now_seg != bss_section) | |
2361 | fix_new (frag, frag->fr_fix, 2, &abs_symbol, frag->fr_offset, 0, | |
2362 | BFD_RELOC_SH_ALIGN); | |
2363 | ||
2364 | if (frag->fr_type == rs_align_code | |
2365 | && frag->fr_next->fr_address - frag->fr_address - frag->fr_fix != 0) | |
2366 | as_warn_where (frag->fr_file, frag->fr_line, _("misaligned data")); | |
2367 | } | |
2368 | ||
2369 | /* This macro decides whether a particular reloc is an entry in a | |
2370 | switch table. It is used when relaxing, because the linker needs | |
2371 | to know about all such entries so that it can adjust them if | |
2372 | necessary. */ | |
2373 | ||
2374 | #ifdef BFD_ASSEMBLER | |
2375 | #define SWITCH_TABLE_CONS(fix) (0) | |
2376 | #else | |
2377 | #define SWITCH_TABLE_CONS(fix) \ | |
2378 | ((fix)->fx_r_type == 0 \ | |
2379 | && ((fix)->fx_size == 2 \ | |
2380 | || (fix)->fx_size == 1 \ | |
2381 | || (fix)->fx_size == 4)) | |
2382 | #endif | |
2383 | ||
2384 | #define SWITCH_TABLE(fix) \ | |
2385 | ((fix)->fx_addsy != NULL \ | |
2386 | && (fix)->fx_subsy != NULL \ | |
2387 | && S_GET_SEGMENT ((fix)->fx_addsy) == text_section \ | |
2388 | && S_GET_SEGMENT ((fix)->fx_subsy) == text_section \ | |
2389 | && ((fix)->fx_r_type == BFD_RELOC_32 \ | |
2390 | || (fix)->fx_r_type == BFD_RELOC_16 \ | |
2391 | || (fix)->fx_r_type == BFD_RELOC_8 \ | |
2392 | || SWITCH_TABLE_CONS (fix))) | |
2393 | ||
2394 | /* See whether we need to force a relocation into the output file. | |
2395 | This is used to force out switch and PC relative relocations when | |
2396 | relaxing. */ | |
2397 | ||
2398 | int | |
2399 | sh_force_relocation (fix) | |
2400 | fixS *fix; | |
2401 | { | |
2402 | ||
2403 | if (fix->fx_r_type == BFD_RELOC_VTABLE_INHERIT | |
2404 | || fix->fx_r_type == BFD_RELOC_VTABLE_ENTRY) | |
2405 | return 1; | |
2406 | ||
2407 | if (! sh_relax) | |
2408 | return 0; | |
2409 | ||
2410 | return (fix->fx_pcrel | |
2411 | || SWITCH_TABLE (fix) | |
2412 | || fix->fx_r_type == BFD_RELOC_SH_COUNT | |
2413 | || fix->fx_r_type == BFD_RELOC_SH_ALIGN | |
2414 | || fix->fx_r_type == BFD_RELOC_SH_CODE | |
2415 | || fix->fx_r_type == BFD_RELOC_SH_DATA | |
2416 | || fix->fx_r_type == BFD_RELOC_SH_LABEL); | |
2417 | } | |
2418 | ||
2419 | #ifdef OBJ_ELF | |
2420 | boolean | |
2421 | sh_fix_adjustable (fixP) | |
2422 | fixS *fixP; | |
2423 | { | |
2424 | ||
2425 | if (fixP->fx_addsy == NULL) | |
2426 | return 1; | |
2427 | ||
2428 | /* We need the symbol name for the VTABLE entries */ | |
2429 | if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT | |
2430 | || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY) | |
2431 | return 0; | |
2432 | ||
2433 | return 1; | |
2434 | } | |
d4845d57 JR |
2435 | |
2436 | void sh_elf_final_processing() | |
2437 | { | |
2438 | int val; | |
2439 | ||
2440 | /* Set file-specific flags to indicate if this code needs | |
2441 | a processor with the sh-dsp / sh3e ISA to execute. */ | |
2442 | if (valid_arch & arch_sh1) | |
2443 | val = EF_SH1; | |
2444 | else if (valid_arch & arch_sh2) | |
2445 | val = EF_SH2; | |
2446 | else if (valid_arch & arch_sh_dsp) | |
2447 | val = EF_SH_DSP; | |
2448 | else if (valid_arch & arch_sh3) | |
2449 | val = EF_SH3; | |
2450 | else if (valid_arch & arch_sh3_dsp) | |
2451 | val = EF_SH_DSP; | |
2452 | else if (valid_arch & arch_sh3e) | |
2453 | val = EF_SH3E; | |
2454 | else if (valid_arch & arch_sh4) | |
2455 | val = EF_SH4; | |
2456 | else | |
2457 | abort (); | |
2458 | ||
2459 | elf_elfheader (stdoutput)->e_flags &= ~EF_SH_MACH_MASK; | |
2460 | elf_elfheader (stdoutput)->e_flags |= val; | |
2461 | } | |
252b5132 RH |
2462 | #endif |
2463 | ||
2464 | /* Apply a fixup to the object file. */ | |
2465 | ||
2466 | #ifdef BFD_ASSEMBLER | |
2467 | int | |
2468 | md_apply_fix (fixP, valp) | |
2469 | fixS *fixP; | |
2470 | valueT *valp; | |
2471 | #else | |
2472 | void | |
2473 | md_apply_fix (fixP, val) | |
2474 | fixS *fixP; | |
2475 | long val; | |
2476 | #endif | |
2477 | { | |
2478 | char *buf = fixP->fx_where + fixP->fx_frag->fr_literal; | |
2479 | int lowbyte = target_big_endian ? 1 : 0; | |
2480 | int highbyte = target_big_endian ? 0 : 1; | |
2481 | #ifdef BFD_ASSEMBLER | |
2482 | long val = *valp; | |
2483 | #endif | |
2484 | long max, min; | |
2485 | int shift; | |
2486 | ||
2487 | #ifdef BFD_ASSEMBLER | |
2488 | /* adjust_reloc_syms won't convert a reloc against a weak symbol | |
2489 | into a reloc against a section, but bfd_install_relocation will | |
2490 | screw up if the symbol is defined, so we have to adjust val here | |
2491 | to avoid the screw up later. */ | |
2492 | if (fixP->fx_addsy != NULL | |
2493 | && S_IS_WEAK (fixP->fx_addsy)) | |
2494 | val -= S_GET_VALUE (fixP->fx_addsy); | |
2495 | #endif | |
2496 | ||
2497 | #ifndef BFD_ASSEMBLER | |
2498 | if (fixP->fx_r_type == 0) | |
2499 | { | |
2500 | if (fixP->fx_size == 2) | |
2501 | fixP->fx_r_type = BFD_RELOC_16; | |
2502 | else if (fixP->fx_size == 4) | |
2503 | fixP->fx_r_type = BFD_RELOC_32; | |
2504 | else if (fixP->fx_size == 1) | |
2505 | fixP->fx_r_type = BFD_RELOC_8; | |
2506 | else | |
2507 | abort (); | |
2508 | } | |
2509 | #endif | |
2510 | ||
2511 | max = min = 0; | |
2512 | shift = 0; | |
2513 | switch (fixP->fx_r_type) | |
2514 | { | |
2515 | case BFD_RELOC_SH_IMM4: | |
2516 | max = 0xf; | |
2517 | *buf = (*buf & 0xf0) | (val & 0xf); | |
2518 | break; | |
2519 | ||
2520 | case BFD_RELOC_SH_IMM4BY2: | |
2521 | max = 0xf; | |
2522 | shift = 1; | |
2523 | *buf = (*buf & 0xf0) | ((val >> 1) & 0xf); | |
2524 | break; | |
2525 | ||
2526 | case BFD_RELOC_SH_IMM4BY4: | |
2527 | max = 0xf; | |
2528 | shift = 2; | |
2529 | *buf = (*buf & 0xf0) | ((val >> 2) & 0xf); | |
2530 | break; | |
2531 | ||
2532 | case BFD_RELOC_SH_IMM8BY2: | |
2533 | max = 0xff; | |
2534 | shift = 1; | |
2535 | *buf = val >> 1; | |
2536 | break; | |
2537 | ||
2538 | case BFD_RELOC_SH_IMM8BY4: | |
2539 | max = 0xff; | |
2540 | shift = 2; | |
2541 | *buf = val >> 2; | |
2542 | break; | |
2543 | ||
2544 | case BFD_RELOC_8: | |
2545 | case BFD_RELOC_SH_IMM8: | |
2546 | /* Sometimes the 8 bit value is sign extended (e.g., add) and | |
2547 | sometimes it is not (e.g., and). We permit any 8 bit value. | |
2548 | Note that adding further restrictions may invalidate | |
2549 | reasonable looking assembly code, such as ``and -0x1,r0''. */ | |
2550 | max = 0xff; | |
2551 | min = - 0xff; | |
2552 | *buf++ = val; | |
2553 | break; | |
2554 | ||
2555 | case BFD_RELOC_SH_PCRELIMM8BY4: | |
2556 | /* The lower two bits of the PC are cleared before the | |
2557 | displacement is added in. We can assume that the destination | |
2558 | is on a 4 byte bounday. If this instruction is also on a 4 | |
2559 | byte boundary, then we want | |
2560 | (target - here) / 4 | |
2561 | and target - here is a multiple of 4. | |
2562 | Otherwise, we are on a 2 byte boundary, and we want | |
2563 | (target - (here - 2)) / 4 | |
2564 | and target - here is not a multiple of 4. Computing | |
2565 | (target - (here - 2)) / 4 == (target - here + 2) / 4 | |
2566 | works for both cases, since in the first case the addition of | |
2567 | 2 will be removed by the division. target - here is in the | |
2568 | variable val. */ | |
2569 | val = (val + 2) / 4; | |
2570 | if (val & ~0xff) | |
2571 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); | |
2572 | buf[lowbyte] = val; | |
2573 | break; | |
2574 | ||
2575 | case BFD_RELOC_SH_PCRELIMM8BY2: | |
2576 | val /= 2; | |
2577 | if (val & ~0xff) | |
2578 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); | |
2579 | buf[lowbyte] = val; | |
2580 | break; | |
2581 | ||
2582 | case BFD_RELOC_SH_PCDISP8BY2: | |
2583 | val /= 2; | |
2584 | if (val < -0x80 || val > 0x7f) | |
2585 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); | |
2586 | buf[lowbyte] = val; | |
2587 | break; | |
2588 | ||
2589 | case BFD_RELOC_SH_PCDISP12BY2: | |
2590 | val /= 2; | |
2591 | if (val < -0x800 || val >= 0x7ff) | |
2592 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); | |
2593 | buf[lowbyte] = val & 0xff; | |
2594 | buf[highbyte] |= (val >> 8) & 0xf; | |
2595 | break; | |
2596 | ||
2597 | case BFD_RELOC_32: | |
2598 | if (! target_big_endian) | |
2599 | { | |
2600 | *buf++ = val >> 0; | |
2601 | *buf++ = val >> 8; | |
2602 | *buf++ = val >> 16; | |
2603 | *buf++ = val >> 24; | |
2604 | } | |
2605 | else | |
2606 | { | |
2607 | *buf++ = val >> 24; | |
2608 | *buf++ = val >> 16; | |
2609 | *buf++ = val >> 8; | |
2610 | *buf++ = val >> 0; | |
2611 | } | |
2612 | break; | |
2613 | ||
2614 | case BFD_RELOC_16: | |
2615 | if (! target_big_endian) | |
2616 | { | |
2617 | *buf++ = val >> 0; | |
2618 | *buf++ = val >> 8; | |
2619 | } | |
2620 | else | |
2621 | { | |
2622 | *buf++ = val >> 8; | |
2623 | *buf++ = val >> 0; | |
2624 | } | |
2625 | break; | |
2626 | ||
2627 | case BFD_RELOC_SH_USES: | |
2628 | /* Pass the value into sh_coff_reloc_mangle. */ | |
2629 | fixP->fx_addnumber = val; | |
2630 | break; | |
2631 | ||
2632 | case BFD_RELOC_SH_COUNT: | |
2633 | case BFD_RELOC_SH_ALIGN: | |
2634 | case BFD_RELOC_SH_CODE: | |
2635 | case BFD_RELOC_SH_DATA: | |
2636 | case BFD_RELOC_SH_LABEL: | |
2637 | /* Nothing to do here. */ | |
2638 | break; | |
2639 | ||
2640 | case BFD_RELOC_VTABLE_INHERIT: | |
2641 | case BFD_RELOC_VTABLE_ENTRY: | |
2642 | fixP->fx_done = 0; | |
49309057 ILT |
2643 | #ifdef BFD_ASSEMBLER |
2644 | return 0; | |
2645 | #else | |
252b5132 | 2646 | return; |
49309057 | 2647 | #endif |
252b5132 RH |
2648 | |
2649 | default: | |
2650 | abort (); | |
2651 | } | |
2652 | ||
2653 | if (shift != 0) | |
2654 | { | |
2655 | if ((val & ((1 << shift) - 1)) != 0) | |
2656 | as_bad_where (fixP->fx_file, fixP->fx_line, _("misaligned offset")); | |
2657 | if (val >= 0) | |
2658 | val >>= shift; | |
2659 | else | |
2660 | val = ((val >> shift) | |
2661 | | ((long) -1 & ~ ((long) -1 >> shift))); | |
2662 | } | |
2663 | if (max != 0 && (val < min || val > max)) | |
2664 | as_bad_where (fixP->fx_file, fixP->fx_line, _("offset out of range")); | |
2665 | ||
2666 | #ifdef BFD_ASSEMBLER | |
2667 | return 0; | |
2668 | #endif | |
2669 | } | |
2670 | ||
2671 | /* Called just before address relaxation. Return the length | |
2672 | by which a fragment must grow to reach it's destination. */ | |
2673 | ||
2674 | int | |
2675 | md_estimate_size_before_relax (fragP, segment_type) | |
2676 | register fragS *fragP; | |
2677 | register segT segment_type; | |
2678 | { | |
2679 | switch (fragP->fr_subtype) | |
2680 | { | |
2681 | case C (UNCOND_JUMP, UNDEF_DISP): | |
2682 | /* used to be a branch to somewhere which was unknown */ | |
2683 | if (!fragP->fr_symbol) | |
2684 | { | |
2685 | fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12); | |
2686 | fragP->fr_var = md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length; | |
2687 | } | |
2688 | else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type) | |
2689 | { | |
2690 | fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12); | |
2691 | fragP->fr_var = md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length; | |
2692 | } | |
2693 | else | |
2694 | { | |
2695 | fragP->fr_subtype = C (UNCOND_JUMP, UNDEF_WORD_DISP); | |
2696 | fragP->fr_var = md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length; | |
2697 | return md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length; | |
2698 | } | |
2699 | break; | |
2700 | ||
2701 | default: | |
2702 | abort (); | |
2703 | case C (COND_JUMP, UNDEF_DISP): | |
2704 | case C (COND_JUMP_DELAY, UNDEF_DISP): | |
2705 | /* used to be a branch to somewhere which was unknown */ | |
2706 | if (fragP->fr_symbol | |
2707 | && S_GET_SEGMENT (fragP->fr_symbol) == segment_type) | |
2708 | { | |
2709 | int what = GET_WHAT (fragP->fr_subtype); | |
2710 | /* Got a symbol and it's defined in this segment, become byte | |
2711 | sized - maybe it will fix up */ | |
2712 | fragP->fr_subtype = C (what, COND8); | |
2713 | fragP->fr_var = md_relax_table[C (what, COND8)].rlx_length; | |
2714 | } | |
2715 | else if (fragP->fr_symbol) | |
2716 | { | |
2717 | int what = GET_WHAT (fragP->fr_subtype); | |
2718 | /* Its got a segment, but its not ours, so it will always be long */ | |
2719 | fragP->fr_subtype = C (what, UNDEF_WORD_DISP); | |
2720 | fragP->fr_var = md_relax_table[C (what, COND32)].rlx_length; | |
2721 | return md_relax_table[C (what, COND32)].rlx_length; | |
2722 | } | |
2723 | else | |
2724 | { | |
2725 | int what = GET_WHAT (fragP->fr_subtype); | |
2726 | /* We know the abs value */ | |
2727 | fragP->fr_subtype = C (what, COND8); | |
2728 | fragP->fr_var = md_relax_table[C (what, COND8)].rlx_length; | |
2729 | } | |
2730 | ||
2731 | break; | |
2732 | } | |
2733 | return fragP->fr_var; | |
2734 | } | |
2735 | ||
2736 | /* Put number into target byte order */ | |
2737 | ||
2738 | void | |
2739 | md_number_to_chars (ptr, use, nbytes) | |
2740 | char *ptr; | |
2741 | valueT use; | |
2742 | int nbytes; | |
2743 | { | |
2744 | if (! target_big_endian) | |
2745 | number_to_chars_littleendian (ptr, use, nbytes); | |
2746 | else | |
2747 | number_to_chars_bigendian (ptr, use, nbytes); | |
2748 | } | |
2749 | ||
2750 | long | |
2751 | md_pcrel_from (fixP) | |
2752 | fixS *fixP; | |
2753 | { | |
2754 | return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address + 2; | |
2755 | } | |
2756 | ||
2757 | #ifdef OBJ_COFF | |
2758 | ||
2759 | int | |
2760 | tc_coff_sizemachdep (frag) | |
2761 | fragS *frag; | |
2762 | { | |
2763 | return md_relax_table[frag->fr_subtype].rlx_length; | |
2764 | } | |
2765 | ||
2766 | #endif /* OBJ_COFF */ | |
2767 | ||
2768 | /* When we align the .text section, insert the correct NOP pattern. */ | |
2769 | ||
2770 | int | |
2771 | sh_do_align (n, fill, len, max) | |
2772 | int n; | |
2773 | const char *fill; | |
2774 | int len; | |
2775 | int max; | |
2776 | { | |
2777 | if (fill == NULL | |
b9e57a38 | 2778 | && subseg_text_p (now_seg) |
252b5132 RH |
2779 | && n > 1) |
2780 | { | |
2781 | static const unsigned char big_nop_pattern[] = { 0x00, 0x09 }; | |
2782 | static const unsigned char little_nop_pattern[] = { 0x09, 0x00 }; | |
2783 | ||
2784 | /* First align to a 2 byte boundary, in case there is an odd | |
2785 | .byte. */ | |
2786 | frag_align (1, 0, 0); | |
2787 | if (target_big_endian) | |
2788 | frag_align_pattern (n, big_nop_pattern, sizeof big_nop_pattern, max); | |
2789 | else | |
2790 | frag_align_pattern (n, little_nop_pattern, sizeof little_nop_pattern, | |
2791 | max); | |
2792 | return 1; | |
2793 | } | |
2794 | ||
2795 | return 0; | |
2796 | } | |
2797 | ||
2798 | #ifndef BFD_ASSEMBLER | |
2799 | #ifdef OBJ_COFF | |
2800 | ||
2801 | /* Map BFD relocs to SH COFF relocs. */ | |
2802 | ||
2803 | struct reloc_map | |
2804 | { | |
2805 | bfd_reloc_code_real_type bfd_reloc; | |
2806 | int sh_reloc; | |
2807 | }; | |
2808 | ||
2809 | static const struct reloc_map coff_reloc_map[] = | |
2810 | { | |
2811 | { BFD_RELOC_32, R_SH_IMM32 }, | |
2812 | { BFD_RELOC_16, R_SH_IMM16 }, | |
2813 | { BFD_RELOC_8, R_SH_IMM8 }, | |
2814 | { BFD_RELOC_SH_PCDISP8BY2, R_SH_PCDISP8BY2 }, | |
2815 | { BFD_RELOC_SH_PCDISP12BY2, R_SH_PCDISP }, | |
2816 | { BFD_RELOC_SH_IMM4, R_SH_IMM4 }, | |
2817 | { BFD_RELOC_SH_IMM4BY2, R_SH_IMM4BY2 }, | |
2818 | { BFD_RELOC_SH_IMM4BY4, R_SH_IMM4BY4 }, | |
2819 | { BFD_RELOC_SH_IMM8, R_SH_IMM8 }, | |
2820 | { BFD_RELOC_SH_IMM8BY2, R_SH_IMM8BY2 }, | |
2821 | { BFD_RELOC_SH_IMM8BY4, R_SH_IMM8BY4 }, | |
2822 | { BFD_RELOC_SH_PCRELIMM8BY2, R_SH_PCRELIMM8BY2 }, | |
2823 | { BFD_RELOC_SH_PCRELIMM8BY4, R_SH_PCRELIMM8BY4 }, | |
2824 | { BFD_RELOC_8_PCREL, R_SH_SWITCH8 }, | |
2825 | { BFD_RELOC_SH_SWITCH16, R_SH_SWITCH16 }, | |
2826 | { BFD_RELOC_SH_SWITCH32, R_SH_SWITCH32 }, | |
2827 | { BFD_RELOC_SH_USES, R_SH_USES }, | |
2828 | { BFD_RELOC_SH_COUNT, R_SH_COUNT }, | |
2829 | { BFD_RELOC_SH_ALIGN, R_SH_ALIGN }, | |
2830 | { BFD_RELOC_SH_CODE, R_SH_CODE }, | |
2831 | { BFD_RELOC_SH_DATA, R_SH_DATA }, | |
2832 | { BFD_RELOC_SH_LABEL, R_SH_LABEL }, | |
2833 | { BFD_RELOC_UNUSED, 0 } | |
2834 | }; | |
2835 | ||
2836 | /* Adjust a reloc for the SH. This is similar to the generic code, | |
2837 | but does some minor tweaking. */ | |
2838 | ||
2839 | void | |
2840 | sh_coff_reloc_mangle (seg, fix, intr, paddr) | |
2841 | segment_info_type *seg; | |
2842 | fixS *fix; | |
2843 | struct internal_reloc *intr; | |
2844 | unsigned int paddr; | |
2845 | { | |
2846 | symbolS *symbol_ptr = fix->fx_addsy; | |
2847 | symbolS *dot; | |
2848 | ||
2849 | intr->r_vaddr = paddr + fix->fx_frag->fr_address + fix->fx_where; | |
2850 | ||
2851 | if (! SWITCH_TABLE (fix)) | |
2852 | { | |
2853 | const struct reloc_map *rm; | |
2854 | ||
2855 | for (rm = coff_reloc_map; rm->bfd_reloc != BFD_RELOC_UNUSED; rm++) | |
2856 | if (rm->bfd_reloc == (bfd_reloc_code_real_type) fix->fx_r_type) | |
2857 | break; | |
2858 | if (rm->bfd_reloc == BFD_RELOC_UNUSED) | |
2859 | as_bad_where (fix->fx_file, fix->fx_line, | |
2860 | _("Can not represent %s relocation in this object file format"), | |
2861 | bfd_get_reloc_code_name (fix->fx_r_type)); | |
2862 | intr->r_type = rm->sh_reloc; | |
2863 | intr->r_offset = 0; | |
2864 | } | |
2865 | else | |
2866 | { | |
2867 | know (sh_relax); | |
2868 | ||
2869 | if (fix->fx_r_type == BFD_RELOC_16) | |
2870 | intr->r_type = R_SH_SWITCH16; | |
2871 | else if (fix->fx_r_type == BFD_RELOC_8) | |
2872 | intr->r_type = R_SH_SWITCH8; | |
2873 | else if (fix->fx_r_type == BFD_RELOC_32) | |
2874 | intr->r_type = R_SH_SWITCH32; | |
2875 | else | |
2876 | abort (); | |
2877 | ||
2878 | /* For a switch reloc, we set r_offset to the difference between | |
2879 | the reloc address and the subtrahend. When the linker is | |
2880 | doing relaxing, it can use the determine the starting and | |
2881 | ending points of the switch difference expression. */ | |
2882 | intr->r_offset = intr->r_vaddr - S_GET_VALUE (fix->fx_subsy); | |
2883 | } | |
2884 | ||
2885 | /* PC relative relocs are always against the current section. */ | |
2886 | if (symbol_ptr == NULL) | |
2887 | { | |
2888 | switch (fix->fx_r_type) | |
2889 | { | |
2890 | case BFD_RELOC_SH_PCRELIMM8BY2: | |
2891 | case BFD_RELOC_SH_PCRELIMM8BY4: | |
2892 | case BFD_RELOC_SH_PCDISP8BY2: | |
2893 | case BFD_RELOC_SH_PCDISP12BY2: | |
2894 | case BFD_RELOC_SH_USES: | |
2895 | symbol_ptr = seg->dot; | |
2896 | break; | |
2897 | default: | |
2898 | break; | |
2899 | } | |
2900 | } | |
2901 | ||
2902 | if (fix->fx_r_type == BFD_RELOC_SH_USES) | |
2903 | { | |
2904 | /* We can't store the offset in the object file, since this | |
2905 | reloc does not take up any space, so we store it in r_offset. | |
2906 | The fx_addnumber field was set in md_apply_fix. */ | |
2907 | intr->r_offset = fix->fx_addnumber; | |
2908 | } | |
2909 | else if (fix->fx_r_type == BFD_RELOC_SH_COUNT) | |
2910 | { | |
2911 | /* We can't store the count in the object file, since this reloc | |
2912 | does not take up any space, so we store it in r_offset. The | |
2913 | fx_offset field was set when the fixup was created in | |
2914 | sh_coff_frob_file. */ | |
2915 | intr->r_offset = fix->fx_offset; | |
2916 | /* This reloc is always absolute. */ | |
2917 | symbol_ptr = NULL; | |
2918 | } | |
2919 | else if (fix->fx_r_type == BFD_RELOC_SH_ALIGN) | |
2920 | { | |
2921 | /* Store the alignment in the r_offset field. */ | |
2922 | intr->r_offset = fix->fx_offset; | |
2923 | /* This reloc is always absolute. */ | |
2924 | symbol_ptr = NULL; | |
2925 | } | |
2926 | else if (fix->fx_r_type == BFD_RELOC_SH_CODE | |
2927 | || fix->fx_r_type == BFD_RELOC_SH_DATA | |
2928 | || fix->fx_r_type == BFD_RELOC_SH_LABEL) | |
2929 | { | |
2930 | /* These relocs are always absolute. */ | |
2931 | symbol_ptr = NULL; | |
2932 | } | |
2933 | ||
2934 | /* Turn the segment of the symbol into an offset. */ | |
2935 | if (symbol_ptr != NULL) | |
2936 | { | |
2937 | dot = segment_info[S_GET_SEGMENT (symbol_ptr)].dot; | |
2938 | if (dot != NULL) | |
2939 | intr->r_symndx = dot->sy_number; | |
2940 | else | |
2941 | intr->r_symndx = symbol_ptr->sy_number; | |
2942 | } | |
2943 | else | |
2944 | intr->r_symndx = -1; | |
2945 | } | |
2946 | ||
2947 | #endif /* OBJ_COFF */ | |
2948 | #endif /* ! BFD_ASSEMBLER */ | |
2949 | ||
2950 | #ifdef BFD_ASSEMBLER | |
2951 | ||
2952 | /* Create a reloc. */ | |
2953 | ||
2954 | arelent * | |
2955 | tc_gen_reloc (section, fixp) | |
2956 | asection *section; | |
2957 | fixS *fixp; | |
2958 | { | |
2959 | arelent *rel; | |
2960 | bfd_reloc_code_real_type r_type; | |
2961 | ||
2962 | rel = (arelent *) xmalloc (sizeof (arelent)); | |
49309057 ILT |
2963 | rel->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); |
2964 | *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); | |
252b5132 RH |
2965 | rel->address = fixp->fx_frag->fr_address + fixp->fx_where; |
2966 | ||
2967 | r_type = fixp->fx_r_type; | |
2968 | ||
2969 | if (SWITCH_TABLE (fixp)) | |
2970 | { | |
2971 | rel->addend = rel->address - S_GET_VALUE (fixp->fx_subsy); | |
2972 | if (r_type == BFD_RELOC_16) | |
2973 | r_type = BFD_RELOC_SH_SWITCH16; | |
2974 | else if (r_type == BFD_RELOC_8) | |
2975 | r_type = BFD_RELOC_8_PCREL; | |
2976 | else if (r_type == BFD_RELOC_32) | |
2977 | r_type = BFD_RELOC_SH_SWITCH32; | |
2978 | else | |
2979 | abort (); | |
2980 | } | |
2981 | else if (r_type == BFD_RELOC_SH_USES) | |
2982 | rel->addend = fixp->fx_addnumber; | |
2983 | else if (r_type == BFD_RELOC_SH_COUNT) | |
2984 | rel->addend = fixp->fx_offset; | |
2985 | else if (r_type == BFD_RELOC_SH_ALIGN) | |
2986 | rel->addend = fixp->fx_offset; | |
2987 | else if (r_type == BFD_RELOC_VTABLE_INHERIT | |
2988 | || r_type == BFD_RELOC_VTABLE_ENTRY) | |
2989 | rel->addend = fixp->fx_offset; | |
2990 | else if (fixp->fx_pcrel) | |
2991 | rel->addend = fixp->fx_addnumber; | |
2992 | else | |
2993 | rel->addend = 0; | |
2994 | ||
2995 | rel->howto = bfd_reloc_type_lookup (stdoutput, r_type); | |
2996 | if (rel->howto == NULL) | |
2997 | { | |
2998 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
2999 | _("Cannot represent relocation type %s"), | |
3000 | bfd_get_reloc_code_name (r_type)); | |
3001 | /* Set howto to a garbage value so that we can keep going. */ | |
3002 | rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32); | |
3003 | assert (rel->howto != NULL); | |
3004 | } | |
3005 | ||
3006 | return rel; | |
3007 | } | |
3008 | ||
3009 | #endif /* BFD_ASSEMBLER */ |