* elf32-sh.c (sh_elf_optimized_tls_reloc, sh_elf_mkobject,
[deliverable/binutils-gdb.git] / gas / config / tc-sh.c
CommitLineData
252b5132 1/* tc-sh.c -- Assemble code for the Hitachi Super-H
aae6ddf9 2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002
f7e42eb4 3 Free Software Foundation, Inc.
252b5132
RH
4
5 This file is part of GAS, the GNU Assembler.
6
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
6b31947e 22/* Written By Steve Chamberlain <sac@cygnus.com> */
252b5132
RH
23
24#include <stdio.h>
25#include "as.h"
26#include "bfd.h"
27#include "subsegs.h"
28#define DEFINE_TABLE
29#include "opcodes/sh-opc.h"
3882b010 30#include "safe-ctype.h"
43841e91 31#include "struc-symbol.h"
d4845d57
JR
32
33#ifdef OBJ_ELF
34#include "elf/sh.h"
35#endif
36
0d10e182 37#include "dwarf2dbg.h"
0d10e182 38
e08ae979
HPN
39typedef struct
40 {
41 sh_arg_type type;
42 int reg;
43 expressionS immediate;
44 }
45sh_operand_info;
46
252b5132
RH
47const char comment_chars[] = "!";
48const char line_separator_chars[] = ";";
49const char line_comment_chars[] = "!#";
50
51static void s_uses PARAMS ((int));
52
53static void sh_count_relocs PARAMS ((bfd *, segT, PTR));
54static void sh_frob_section PARAMS ((bfd *, segT, PTR));
55
252b5132 56static void s_uacons PARAMS ((int));
d4845d57 57static sh_opcode_info *find_cooked_opcode PARAMS ((char **));
0d10e182 58static unsigned int assemble_ppi PARAMS ((char *, sh_opcode_info *));
e08ae979 59static void little PARAMS ((int));
05982cac 60static void big PARAMS ((int));
e08ae979 61static int parse_reg PARAMS ((char *, int *, int *));
e08ae979
HPN
62static char *parse_exp PARAMS ((char *, sh_operand_info *));
63static char *parse_at PARAMS ((char *, sh_operand_info *));
64static void get_operand PARAMS ((char **, sh_operand_info *));
65static char *get_operands
66 PARAMS ((sh_opcode_info *, char *, sh_operand_info *));
67static sh_opcode_info *get_specific
68 PARAMS ((sh_opcode_info *, sh_operand_info *));
69static void insert PARAMS ((char *, int, int, sh_operand_info *));
70static void build_relax PARAMS ((sh_opcode_info *, sh_operand_info *));
71static char *insert_loop_bounds PARAMS ((char *, sh_operand_info *));
72static unsigned int build_Mytes
73 PARAMS ((sh_opcode_info *, sh_operand_info *));
28602ebf 74static boolean sh_local_pcrel PARAMS ((fixS *fix));
252b5132 75
a1cc9221
AO
76#ifdef OBJ_ELF
77static void sh_elf_cons PARAMS ((int));
78
538cd60f
AO
79inline static int sh_PIC_related_p PARAMS ((symbolS *));
80static int sh_check_fixup PARAMS ((expressionS *, bfd_reloc_code_real_type *));
81inline static char *sh_end_of_match PARAMS ((char *, char *));
82
a1cc9221
AO
83symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
84#endif
85
05982cac
HPN
86static void
87big (ignore)
88 int ignore ATTRIBUTE_UNUSED;
89{
90 if (! target_big_endian)
91 as_bad (_("directive .big encountered when option -big required"));
92
93 /* Stop further messages. */
94 target_big_endian = 1;
95}
252b5132
RH
96
97static void
98little (ignore)
43841e91 99 int ignore ATTRIBUTE_UNUSED;
252b5132 100{
05982cac
HPN
101 if (target_big_endian)
102 as_bad (_("directive .little encountered when option -little required"));
103
104 /* Stop further messages. */
252b5132
RH
105 target_big_endian = 0;
106}
107
d4845d57
JR
108/* This table describes all the machine specific pseudo-ops the assembler
109 has to support. The fields are:
110 pseudo-op name without dot
111 function to call to execute this pseudo-op
6b31947e 112 Integer arg to pass to the function. */
d4845d57 113
252b5132
RH
114const pseudo_typeS md_pseudo_table[] =
115{
a1cc9221
AO
116#ifdef OBJ_ELF
117 {"long", sh_elf_cons, 4},
118 {"int", sh_elf_cons, 4},
119 {"word", sh_elf_cons, 2},
120 {"short", sh_elf_cons, 2},
121#else
252b5132
RH
122 {"int", cons, 4},
123 {"word", cons, 2},
a1cc9221 124#endif /* OBJ_ELF */
05982cac 125 {"big", big, 0},
252b5132
RH
126 {"form", listing_psize, 0},
127 {"little", little, 0},
128 {"heading", listing_title, 0},
129 {"import", s_ignore, 0},
130 {"page", listing_eject, 0},
131 {"program", s_ignore, 0},
132 {"uses", s_uses, 0},
133 {"uaword", s_uacons, 2},
134 {"ualong", s_uacons, 4},
de68de20
AO
135 {"uaquad", s_uacons, 8},
136 {"2byte", s_uacons, 2},
137 {"4byte", s_uacons, 4},
138 {"8byte", s_uacons, 8},
2bc0a128 139#ifdef BFD_ASSEMBLER
9f1838ed 140 {"file", (void (*) PARAMS ((int))) dwarf2_directive_file, 0 },
de68de20 141 {"loc", dwarf2_directive_loc, 0 },
2bc0a128 142#endif
324bfcf3
AO
143#ifdef HAVE_SH64
144 {"mode", s_sh64_mode, 0 },
145
146 /* Have the old name too. */
147 {"isa", s_sh64_mode, 0 },
148
149 /* Assert that the right ABI is used. */
150 {"abi", s_sh64_abi, 0 },
151
152 { "vtable_inherit", sh64_vtable_inherit, 0 },
153 { "vtable_entry", sh64_vtable_entry, 0 },
154#endif /* HAVE_SH64 */
252b5132
RH
155 {0, 0, 0}
156};
157
158/*int md_reloc_size; */
159
160int sh_relax; /* set if -relax seen */
161
162/* Whether -small was seen. */
163
164int sh_small;
165
d4845d57
JR
166/* Whether -dsp was seen. */
167
168static int sh_dsp;
169
170/* The bit mask of architectures that could
171 accomodate the insns seen so far. */
172static int valid_arch;
173
252b5132
RH
174const char EXP_CHARS[] = "eE";
175
6b31947e 176/* Chars that mean this number is a floating point constant. */
252b5132
RH
177/* As in 0f12.456 */
178/* or 0d1.2345e12 */
179const char FLT_CHARS[] = "rRsSfFdDxXpP";
180
181#define C(a,b) ENCODE_RELAX(a,b)
182
252b5132
RH
183#define ENCODE_RELAX(what,length) (((what) << 4) + (length))
184#define GET_WHAT(x) ((x>>4))
185
6b31947e 186/* These are the three types of relaxable instrction. */
324bfcf3
AO
187/* These are the types of relaxable instructions; except for END which is
188 a marker. */
252b5132
RH
189#define COND_JUMP 1
190#define COND_JUMP_DELAY 2
191#define UNCOND_JUMP 3
324bfcf3
AO
192
193#ifdef HAVE_SH64
194
195/* A 16-bit (times four) pc-relative operand, at most expanded to 32 bits. */
196#define SH64PCREL16_32 4
197/* A 16-bit (times four) pc-relative operand, at most expanded to 64 bits. */
198#define SH64PCREL16_64 5
199
200/* Variants of the above for adjusting the insn to PTA or PTB according to
201 the label. */
202#define SH64PCREL16PT_32 6
203#define SH64PCREL16PT_64 7
204
205/* A MOVI expansion, expanding to at most 32 or 64 bits. */
206#define MOVI_IMM_32 8
207#define MOVI_IMM_32_PCREL 9
208#define MOVI_IMM_64 10
209#define MOVI_IMM_64_PCREL 11
210#define END 12
211
212#else /* HAVE_SH64 */
213
252b5132
RH
214#define END 4
215
324bfcf3
AO
216#endif /* HAVE_SH64 */
217
252b5132
RH
218#define UNDEF_DISP 0
219#define COND8 1
220#define COND12 2
221#define COND32 3
252b5132
RH
222#define UNDEF_WORD_DISP 4
223
224#define UNCOND12 1
225#define UNCOND32 2
226
324bfcf3
AO
227#ifdef HAVE_SH64
228#define UNDEF_SH64PCREL 0
229#define SH64PCREL16 1
230#define SH64PCREL32 2
231#define SH64PCREL48 3
232#define SH64PCREL64 4
233#define SH64PCRELPLT 5
234
235#define UNDEF_MOVI 0
236#define MOVI_16 1
237#define MOVI_32 2
238#define MOVI_48 3
239#define MOVI_64 4
240#define MOVI_PLT 5
241#define MOVI_GOTOFF 6
242#define MOVI_GOTPC 7
243#endif /* HAVE_SH64 */
244
252b5132
RH
245/* Branch displacements are from the address of the branch plus
246 four, thus all minimum and maximum values have 4 added to them. */
247#define COND8_F 258
248#define COND8_M -252
249#define COND8_LENGTH 2
250
251/* There is one extra instruction before the branch, so we must add
252 two more bytes to account for it. */
253#define COND12_F 4100
254#define COND12_M -4090
255#define COND12_LENGTH 6
256
257#define COND12_DELAY_LENGTH 4
258
259/* ??? The minimum and maximum values are wrong, but this does not matter
260 since this relocation type is not supported yet. */
261#define COND32_F (1<<30)
262#define COND32_M -(1<<30)
263#define COND32_LENGTH 14
264
265#define UNCOND12_F 4098
266#define UNCOND12_M -4092
267#define UNCOND12_LENGTH 2
268
269/* ??? The minimum and maximum values are wrong, but this does not matter
270 since this relocation type is not supported yet. */
271#define UNCOND32_F (1<<30)
272#define UNCOND32_M -(1<<30)
273#define UNCOND32_LENGTH 14
274
324bfcf3
AO
275#ifdef HAVE_SH64
276/* The trivial expansion of a SH64PCREL16 relaxation is just a "PT label,
277 TRd" as is the current insn, so no extra length. Note that the "reach"
278 is calculated from the address *after* that insn, but the offset in the
279 insn is calculated from the beginning of the insn. We also need to
280 take into account the implicit 1 coded as the "A" in PTA when counting
281 forward. If PTB reaches an odd address, we trap that as an error
282 elsewhere, so we don't have to have different relaxation entries. We
283 don't add a one to the negative range, since PTB would then have the
284 farthest backward-reaching value skipped, not generated at relaxation. */
285#define SH64PCREL16_F (32767 * 4 - 4 + 1)
286#define SH64PCREL16_M (-32768 * 4 - 4)
287#define SH64PCREL16_LENGTH 0
288
289/* The next step is to change that PT insn into
290 MOVI ((label - datalabel Ln) >> 16) & 65535, R25
291 SHORI (label - datalabel Ln) & 65535, R25
292 Ln:
293 PTREL R25,TRd
294 which means two extra insns, 8 extra bytes. This is the limit for the
295 32-bit ABI.
296
297 The expressions look a bit bad since we have to adjust this to avoid overflow on a
298 32-bit host. */
299#define SH64PCREL32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4)
300#define SH64PCREL32_LENGTH (2 * 4)
301
302/* Similarly, we just change the MOVI and add a SHORI for the 48-bit
303 expansion. */
304#if BFD_HOST_64BIT_LONG
305/* The "reach" type is long, so we can only do this for a 64-bit-long
306 host. */
307#define SH64PCREL32_M (((long) -1 << 30) * 2 - 4)
308#define SH64PCREL48_F ((((long) 1 << 47) - 1) - 4)
309#define SH64PCREL48_M (((long) -1 << 47) - 4)
310#define SH64PCREL48_LENGTH (3 * 4)
311#else
312/* If the host does not have 64-bit longs, just make this state identical
313 in reach to the 32-bit state. Note that we have a slightly incorrect
314 reach, but the correct one above will overflow a 32-bit number. */
315#define SH64PCREL32_M (((long) -1 << 30) * 2)
316#define SH64PCREL48_F SH64PCREL32_F
317#define SH64PCREL48_M SH64PCREL32_M
318#define SH64PCREL48_LENGTH (3 * 4)
319#endif /* BFD_HOST_64BIT_LONG */
320
321/* And similarly for the 64-bit expansion; a MOVI + SHORI + SHORI + SHORI
322 + PTREL sequence. */
323#define SH64PCREL64_LENGTH (4 * 4)
324
325/* For MOVI, we make the MOVI + SHORI... expansion you can see in the
326 SH64PCREL expansions. The PCREL one is similar, but the other has no
327 pc-relative reach; it must be fully expanded in
328 shmedia_md_estimate_size_before_relax. */
329#define MOVI_16_LENGTH 0
330#define MOVI_16_F (32767 - 4)
331#define MOVI_16_M (-32768 - 4)
332#define MOVI_32_LENGTH 4
333#define MOVI_32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4)
334#define MOVI_48_LENGTH 8
335
336#if BFD_HOST_64BIT_LONG
337/* The "reach" type is long, so we can only do this for a 64-bit-long
338 host. */
339#define MOVI_32_M (((long) -1 << 30) * 2 - 4)
340#define MOVI_48_F ((((long) 1 << 47) - 1) - 4)
341#define MOVI_48_M (((long) -1 << 47) - 4)
342#else
343/* If the host does not have 64-bit longs, just make this state identical
344 in reach to the 32-bit state. Note that we have a slightly incorrect
345 reach, but the correct one above will overflow a 32-bit number. */
346#define MOVI_32_M (((long) -1 << 30) * 2)
347#define MOVI_48_F MOVI_32_F
348#define MOVI_48_M MOVI_32_M
349#endif /* BFD_HOST_64BIT_LONG */
350
351#define MOVI_64_LENGTH 12
352#endif /* HAVE_SH64 */
353
43841e91
NC
354#define EMPTY { 0, 0, 0, 0 }
355
252b5132 356const relax_typeS md_relax_table[C (END, 0)] = {
43841e91
NC
357 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
358 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
252b5132 359
43841e91 360 EMPTY,
252b5132
RH
361 /* C (COND_JUMP, COND8) */
362 { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP, COND12) },
363 /* C (COND_JUMP, COND12) */
364 { COND12_F, COND12_M, COND12_LENGTH, C (COND_JUMP, COND32), },
365 /* C (COND_JUMP, COND32) */
366 { COND32_F, COND32_M, COND32_LENGTH, 0, },
e66457fb
AM
367 /* C (COND_JUMP, UNDEF_WORD_DISP) */
368 { 0, 0, COND32_LENGTH, 0, },
369 EMPTY, EMPTY, EMPTY,
43841e91 370 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
252b5132 371
43841e91 372 EMPTY,
252b5132
RH
373 /* C (COND_JUMP_DELAY, COND8) */
374 { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP_DELAY, COND12) },
375 /* C (COND_JUMP_DELAY, COND12) */
376 { COND12_F, COND12_M, COND12_DELAY_LENGTH, C (COND_JUMP_DELAY, COND32), },
377 /* C (COND_JUMP_DELAY, COND32) */
378 { COND32_F, COND32_M, COND32_LENGTH, 0, },
e66457fb
AM
379 /* C (COND_JUMP_DELAY, UNDEF_WORD_DISP) */
380 { 0, 0, COND32_LENGTH, 0, },
381 EMPTY, EMPTY, EMPTY,
43841e91 382 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
252b5132 383
43841e91 384 EMPTY,
252b5132
RH
385 /* C (UNCOND_JUMP, UNCOND12) */
386 { UNCOND12_F, UNCOND12_M, UNCOND12_LENGTH, C (UNCOND_JUMP, UNCOND32), },
387 /* C (UNCOND_JUMP, UNCOND32) */
388 { UNCOND32_F, UNCOND32_M, UNCOND32_LENGTH, 0, },
e66457fb
AM
389 EMPTY,
390 /* C (UNCOND_JUMP, UNDEF_WORD_DISP) */
391 { 0, 0, UNCOND32_LENGTH, 0, },
392 EMPTY, EMPTY, EMPTY,
43841e91 393 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
324bfcf3
AO
394
395#ifdef HAVE_SH64
396 /* C (SH64PCREL16_32, SH64PCREL16) */
397 EMPTY,
398 { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16_32, SH64PCREL32) },
399 /* C (SH64PCREL16_32, SH64PCREL32) */
400 { 0, 0, SH64PCREL32_LENGTH, 0 },
401 EMPTY, EMPTY,
402 /* C (SH64PCREL16_32, SH64PCRELPLT) */
403 { 0, 0, SH64PCREL32_LENGTH, 0 },
404 EMPTY, EMPTY,
405 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
406
407 /* C (SH64PCREL16_64, SH64PCREL16) */
408 EMPTY,
409 { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16_64, SH64PCREL32) },
410 /* C (SH64PCREL16_64, SH64PCREL32) */
411 { SH64PCREL32_F, SH64PCREL32_M, SH64PCREL32_LENGTH, C (SH64PCREL16_64, SH64PCREL48) },
412 /* C (SH64PCREL16_64, SH64PCREL48) */
413 { SH64PCREL48_F, SH64PCREL48_M, SH64PCREL48_LENGTH, C (SH64PCREL16_64, SH64PCREL64) },
414 /* C (SH64PCREL16_64, SH64PCREL64) */
415 { 0, 0, SH64PCREL64_LENGTH, 0 },
416 /* C (SH64PCREL16_64, SH64PCRELPLT) */
417 { 0, 0, SH64PCREL64_LENGTH, 0 },
418 EMPTY, EMPTY,
419 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
420
421 /* C (SH64PCREL16PT_32, SH64PCREL16) */
422 EMPTY,
423 { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16PT_32, SH64PCREL32) },
424 /* C (SH64PCREL16PT_32, SH64PCREL32) */
425 { 0, 0, SH64PCREL32_LENGTH, 0 },
426 EMPTY, EMPTY,
427 /* C (SH64PCREL16PT_32, SH64PCRELPLT) */
428 { 0, 0, SH64PCREL32_LENGTH, 0 },
429 EMPTY, EMPTY,
430 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
431
432 /* C (SH64PCREL16PT_64, SH64PCREL16) */
433 EMPTY,
434 { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16PT_64, SH64PCREL32) },
435 /* C (SH64PCREL16PT_64, SH64PCREL32) */
436 { SH64PCREL32_F,
5d6255fe 437 SH64PCREL32_M,
324bfcf3
AO
438 SH64PCREL32_LENGTH,
439 C (SH64PCREL16PT_64, SH64PCREL48) },
440 /* C (SH64PCREL16PT_64, SH64PCREL48) */
441 { SH64PCREL48_F, SH64PCREL48_M, SH64PCREL48_LENGTH, C (SH64PCREL16PT_64, SH64PCREL64) },
442 /* C (SH64PCREL16PT_64, SH64PCREL64) */
443 { 0, 0, SH64PCREL64_LENGTH, 0 },
444 /* C (SH64PCREL16PT_64, SH64PCRELPLT) */
445 { 0, 0, SH64PCREL64_LENGTH, 0},
446 EMPTY, EMPTY,
447 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
448
449 /* C (MOVI_IMM_32, UNDEF_MOVI) */
450 { 0, 0, MOVI_32_LENGTH, 0 },
451 /* C (MOVI_IMM_32, MOVI_16) */
452 { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_32, MOVI_32) },
453 /* C (MOVI_IMM_32, MOVI_32) */
454 { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, 0 },
455 EMPTY, EMPTY, EMPTY,
456 /* C (MOVI_IMM_32, MOVI_GOTOFF) */
457 { 0, 0, MOVI_32_LENGTH, 0 },
458 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
459
460 /* C (MOVI_IMM_32_PCREL, MOVI_16) */
461 EMPTY,
462 { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_32_PCREL, MOVI_32) },
463 /* C (MOVI_IMM_32_PCREL, MOVI_32) */
464 { 0, 0, MOVI_32_LENGTH, 0 },
465 EMPTY, EMPTY,
466 /* C (MOVI_IMM_32_PCREL, MOVI_PLT) */
467 { 0, 0, MOVI_32_LENGTH, 0 },
468 EMPTY,
469 /* C (MOVI_IMM_32_PCREL, MOVI_GOTPC) */
470 { 0, 0, MOVI_32_LENGTH, 0 },
471 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
472
473 /* C (MOVI_IMM_64, UNDEF_MOVI) */
474 { 0, 0, MOVI_64_LENGTH, 0 },
475 /* C (MOVI_IMM_64, MOVI_16) */
476 { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_64, MOVI_32) },
477 /* C (MOVI_IMM_64, MOVI_32) */
478 { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, C (MOVI_IMM_64, MOVI_48) },
479 /* C (MOVI_IMM_64, MOVI_48) */
480 { MOVI_48_F, MOVI_48_M, MOVI_48_LENGTH, C (MOVI_IMM_64, MOVI_64) },
481 /* C (MOVI_IMM_64, MOVI_64) */
482 { 0, 0, MOVI_64_LENGTH, 0 },
483 EMPTY,
484 /* C (MOVI_IMM_64, MOVI_GOTOFF) */
485 { 0, 0, MOVI_64_LENGTH, 0 },
486 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
487
488 /* C (MOVI_IMM_64_PCREL, MOVI_16) */
489 EMPTY,
490 { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_32) },
491 /* C (MOVI_IMM_64_PCREL, MOVI_32) */
492 { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_48) },
493 /* C (MOVI_IMM_64_PCREL, MOVI_48) */
494 { MOVI_48_F, MOVI_48_M, MOVI_48_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_64) },
495 /* C (MOVI_IMM_64_PCREL, MOVI_64) */
496 { 0, 0, MOVI_64_LENGTH, 0 },
497 /* C (MOVI_IMM_64_PCREL, MOVI_PLT) */
498 { 0, 0, MOVI_64_LENGTH, 0 },
499 EMPTY,
500 /* C (MOVI_IMM_64_PCREL, MOVI_GOTPC) */
501 { 0, 0, MOVI_64_LENGTH, 0 },
502 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
503
504#endif /* HAVE_SH64 */
505
252b5132
RH
506};
507
43841e91
NC
508#undef EMPTY
509
252b5132
RH
510static struct hash_control *opcode_hash_control; /* Opcode mnemonics */
511
a1cc9221
AO
512\f
513#ifdef OBJ_ELF
538cd60f
AO
514/* Determinet whether the symbol needs any kind of PIC relocation. */
515
516inline static int
517sh_PIC_related_p (sym)
518 symbolS *sym;
a1cc9221 519{
538cd60f 520 expressionS *exp;
a1cc9221 521
538cd60f
AO
522 if (! sym)
523 return 0;
524
525 if (sym == GOT_symbol)
526 return 1;
527
324bfcf3
AO
528#ifdef HAVE_SH64
529 if (sh_PIC_related_p (*symbol_get_tc (sym)))
530 return 1;
531#endif
532
538cd60f
AO
533 exp = symbol_get_value_expression (sym);
534
535 return (exp->X_op == O_PIC_reloc
536 || sh_PIC_related_p (exp->X_add_symbol)
537 || sh_PIC_related_p (exp->X_op_symbol));
538}
539
540/* Determine the relocation type to be used to represent the
541 expression, that may be rearranged. */
542
543static int
544sh_check_fixup (main_exp, r_type_p)
545 expressionS *main_exp;
546 bfd_reloc_code_real_type *r_type_p;
547{
548 expressionS *exp = main_exp;
549
550 /* This is here for backward-compatibility only. GCC used to generated:
551
552 f@PLT + . - (.LPCS# + 2)
553
554 but we'd rather be able to handle this as a PIC-related reference
555 plus/minus a symbol. However, gas' parser gives us:
556
557 O_subtract (O_add (f@PLT, .), .LPCS#+2)
5d6255fe 558
538cd60f
AO
559 so we attempt to transform this into:
560
561 O_subtract (f@PLT, O_subtract (.LPCS#+2, .))
562
5d6255fe 563 which we can handle simply below. */
538cd60f
AO
564 if (exp->X_op == O_subtract)
565 {
566 if (sh_PIC_related_p (exp->X_op_symbol))
567 return 1;
568
569 exp = symbol_get_value_expression (exp->X_add_symbol);
570
571 if (exp && sh_PIC_related_p (exp->X_op_symbol))
572 return 1;
573
574 if (exp && exp->X_op == O_add
575 && sh_PIC_related_p (exp->X_add_symbol))
576 {
577 symbolS *sym = exp->X_add_symbol;
578
579 exp->X_op = O_subtract;
580 exp->X_add_symbol = main_exp->X_op_symbol;
581
582 main_exp->X_op_symbol = main_exp->X_add_symbol;
583 main_exp->X_add_symbol = sym;
584
585 main_exp->X_add_number += exp->X_add_number;
586 exp->X_add_number = 0;
587 }
588
589 exp = main_exp;
590 }
591 else if (exp->X_op == O_add && sh_PIC_related_p (exp->X_op_symbol))
592 return 1;
593
594 if (exp->X_op == O_symbol || exp->X_op == O_add || exp->X_op == O_subtract)
595 {
324bfcf3
AO
596#ifdef HAVE_SH64
597 if (exp->X_add_symbol
598 && (exp->X_add_symbol == GOT_symbol
599 || (GOT_symbol
600 && *symbol_get_tc (exp->X_add_symbol) == GOT_symbol)))
601 {
602 switch (*r_type_p)
603 {
604 case BFD_RELOC_SH_IMM_LOW16:
605 *r_type_p = BFD_RELOC_SH_GOTPC_LOW16;
606 break;
607
608 case BFD_RELOC_SH_IMM_MEDLOW16:
609 *r_type_p = BFD_RELOC_SH_GOTPC_MEDLOW16;
610 break;
611
612 case BFD_RELOC_SH_IMM_MEDHI16:
613 *r_type_p = BFD_RELOC_SH_GOTPC_MEDHI16;
614 break;
615
616 case BFD_RELOC_SH_IMM_HI16:
617 *r_type_p = BFD_RELOC_SH_GOTPC_HI16;
618 break;
619
620 case BFD_RELOC_NONE:
621 case BFD_RELOC_UNUSED:
622 *r_type_p = BFD_RELOC_SH_GOTPC;
623 break;
5d6255fe 624
324bfcf3
AO
625 default:
626 abort ();
627 }
628 return 0;
629 }
630#else
538cd60f
AO
631 if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol)
632 {
633 *r_type_p = BFD_RELOC_SH_GOTPC;
634 return 0;
635 }
324bfcf3 636#endif
538cd60f
AO
637 exp = symbol_get_value_expression (exp->X_add_symbol);
638 if (! exp)
639 return 0;
640 }
641
642 if (exp->X_op == O_PIC_reloc)
643 {
324bfcf3
AO
644#ifdef HAVE_SH64
645 switch (*r_type_p)
646 {
647 case BFD_RELOC_NONE:
648 case BFD_RELOC_UNUSED:
649 *r_type_p = exp->X_md;
650 break;
651
652 case BFD_RELOC_SH_IMM_LOW16:
653 switch (exp->X_md)
654 {
655 case BFD_RELOC_32_GOTOFF:
656 *r_type_p = BFD_RELOC_SH_GOTOFF_LOW16;
657 break;
5d6255fe 658
324bfcf3
AO
659 case BFD_RELOC_SH_GOTPLT32:
660 *r_type_p = BFD_RELOC_SH_GOTPLT_LOW16;
661 break;
5d6255fe 662
324bfcf3
AO
663 case BFD_RELOC_32_GOT_PCREL:
664 *r_type_p = BFD_RELOC_SH_GOT_LOW16;
665 break;
5d6255fe 666
324bfcf3
AO
667 case BFD_RELOC_32_PLT_PCREL:
668 *r_type_p = BFD_RELOC_SH_PLT_LOW16;
669 break;
670
671 default:
672 abort ();
673 }
674 break;
675
676 case BFD_RELOC_SH_IMM_MEDLOW16:
677 switch (exp->X_md)
678 {
679 case BFD_RELOC_32_GOTOFF:
680 *r_type_p = BFD_RELOC_SH_GOTOFF_MEDLOW16;
681 break;
5d6255fe 682
324bfcf3
AO
683 case BFD_RELOC_SH_GOTPLT32:
684 *r_type_p = BFD_RELOC_SH_GOTPLT_MEDLOW16;
685 break;
5d6255fe 686
324bfcf3
AO
687 case BFD_RELOC_32_GOT_PCREL:
688 *r_type_p = BFD_RELOC_SH_GOT_MEDLOW16;
689 break;
5d6255fe 690
324bfcf3
AO
691 case BFD_RELOC_32_PLT_PCREL:
692 *r_type_p = BFD_RELOC_SH_PLT_MEDLOW16;
693 break;
694
695 default:
696 abort ();
697 }
698 break;
699
700 case BFD_RELOC_SH_IMM_MEDHI16:
701 switch (exp->X_md)
702 {
703 case BFD_RELOC_32_GOTOFF:
704 *r_type_p = BFD_RELOC_SH_GOTOFF_MEDHI16;
705 break;
5d6255fe 706
324bfcf3
AO
707 case BFD_RELOC_SH_GOTPLT32:
708 *r_type_p = BFD_RELOC_SH_GOTPLT_MEDHI16;
709 break;
5d6255fe 710
324bfcf3
AO
711 case BFD_RELOC_32_GOT_PCREL:
712 *r_type_p = BFD_RELOC_SH_GOT_MEDHI16;
713 break;
5d6255fe 714
324bfcf3
AO
715 case BFD_RELOC_32_PLT_PCREL:
716 *r_type_p = BFD_RELOC_SH_PLT_MEDHI16;
717 break;
718
719 default:
720 abort ();
721 }
722 break;
723
724 case BFD_RELOC_SH_IMM_HI16:
725 switch (exp->X_md)
726 {
727 case BFD_RELOC_32_GOTOFF:
728 *r_type_p = BFD_RELOC_SH_GOTOFF_HI16;
729 break;
5d6255fe 730
324bfcf3
AO
731 case BFD_RELOC_SH_GOTPLT32:
732 *r_type_p = BFD_RELOC_SH_GOTPLT_HI16;
733 break;
5d6255fe 734
324bfcf3
AO
735 case BFD_RELOC_32_GOT_PCREL:
736 *r_type_p = BFD_RELOC_SH_GOT_HI16;
737 break;
5d6255fe 738
324bfcf3
AO
739 case BFD_RELOC_32_PLT_PCREL:
740 *r_type_p = BFD_RELOC_SH_PLT_HI16;
741 break;
742
743 default:
744 abort ();
745 }
746 break;
747
748 default:
749 abort ();
750 }
751#else
538cd60f 752 *r_type_p = exp->X_md;
324bfcf3 753#endif
538cd60f
AO
754 if (exp == main_exp)
755 exp->X_op = O_symbol;
756 else
757 {
758 main_exp->X_add_symbol = exp->X_add_symbol;
759 main_exp->X_add_number += exp->X_add_number;
760 }
761 }
762 else
763 return (sh_PIC_related_p (exp->X_add_symbol)
764 || sh_PIC_related_p (exp->X_op_symbol));
765
766 return 0;
767}
768
769/* Add expression EXP of SIZE bytes to offset OFF of fragment FRAG. */
770
771void
772sh_cons_fix_new (frag, off, size, exp)
773 fragS *frag;
774 int off, size;
775 expressionS *exp;
776{
777 bfd_reloc_code_real_type r_type = BFD_RELOC_UNUSED;
778
779 if (sh_check_fixup (exp, &r_type))
780 as_bad (_("Invalid PIC expression."));
781
782 if (r_type == BFD_RELOC_UNUSED)
783 switch (size)
a1cc9221 784 {
538cd60f
AO
785 case 1:
786 r_type = BFD_RELOC_8;
787 break;
a1cc9221 788
538cd60f
AO
789 case 2:
790 r_type = BFD_RELOC_16;
791 break;
792
793 case 4:
794 r_type = BFD_RELOC_32;
795 break;
a1cc9221 796
324bfcf3
AO
797#ifdef HAVE_SH64
798 case 8:
799 r_type = BFD_RELOC_64;
800 break;
801#endif
802
538cd60f
AO
803 default:
804 goto error;
805 }
806 else if (size != 4)
807 {
808 error:
809 as_bad (_("unsupported BFD relocation size %u"), size);
810 r_type = BFD_RELOC_UNUSED;
811 }
5d6255fe 812
538cd60f 813 fix_new_exp (frag, off, size, exp, 0, r_type);
a1cc9221
AO
814}
815
816/* The regular cons() function, that reads constants, doesn't support
817 suffixes such as @GOT, @GOTOFF and @PLT, that generate
818 machine-specific relocation types. So we must define it here. */
819/* Clobbers input_line_pointer, checks end-of-line. */
820static void
821sh_elf_cons (nbytes)
822 register int nbytes; /* 1=.byte, 2=.word, 4=.long */
823{
538cd60f 824 expressionS exp;
a1cc9221 825
324bfcf3
AO
826#ifdef HAVE_SH64
827
828 /* Update existing range to include a previous insn, if there was one. */
829 sh64_update_contents_mark (true);
830
831 /* We need to make sure the contents type is set to data. */
832 sh64_flag_output ();
833
834#endif /* HAVE_SH64 */
835
a1cc9221
AO
836 if (is_it_end_of_statement ())
837 {
838 demand_empty_rest_of_line ();
839 return;
840 }
841
842 do
843 {
844 expression (&exp);
538cd60f 845 emit_expr (&exp, (unsigned int) nbytes);
a1cc9221
AO
846 }
847 while (*input_line_pointer++ == ',');
848
81d4177b 849 input_line_pointer--; /* Put terminator back into stream. */
a1cc9221
AO
850 if (*input_line_pointer == '#' || *input_line_pointer == '!')
851 {
dda5ecfc 852 while (! is_end_of_line[(unsigned char) *input_line_pointer++]);
a1cc9221
AO
853 }
854 else
855 demand_empty_rest_of_line ();
856}
857#endif /* OBJ_ELF */
858
859\f
6b31947e
NC
860/* This function is called once, at assembler startup time. This should
861 set up all the tables, etc that the MD part of the assembler needs. */
252b5132
RH
862
863void
864md_begin ()
865{
866 sh_opcode_info *opcode;
867 char *prev_name = "";
d4845d57 868 int target_arch;
252b5132 869
d4845d57
JR
870 target_arch = arch_sh1_up & ~(sh_dsp ? arch_sh3e_up : arch_sh_dsp_up);
871 valid_arch = target_arch;
872
324bfcf3
AO
873#ifdef HAVE_SH64
874 shmedia_md_begin ();
875#endif
876
252b5132
RH
877 opcode_hash_control = hash_new ();
878
6b31947e 879 /* Insert unique names into hash table. */
252b5132
RH
880 for (opcode = sh_table; opcode->name; opcode++)
881 {
a37c8f88 882 if (strcmp (prev_name, opcode->name))
252b5132 883 {
a37c8f88
JR
884 if (! (opcode->arch & target_arch))
885 continue;
252b5132
RH
886 prev_name = opcode->name;
887 hash_insert (opcode_hash_control, opcode->name, (char *) opcode);
888 }
889 else
890 {
891 /* Make all the opcodes with the same name point to the same
6b31947e 892 string. */
252b5132
RH
893 opcode->name = prev_name;
894 }
895 }
896}
897
898static int reg_m;
899static int reg_n;
d4845d57
JR
900static int reg_x, reg_y;
901static int reg_efg;
252b5132
RH
902static int reg_b;
903
3882b010 904#define IDENT_CHAR(c) (ISALNUM (c) || (c) == '_')
dead1419 905
6b31947e
NC
906/* Try to parse a reg name. Return the number of chars consumed. */
907
252b5132
RH
908static int
909parse_reg (src, mode, reg)
910 char *src;
911 int *mode;
912 int *reg;
913{
3882b010
L
914 char l0 = TOLOWER (src[0]);
915 char l1 = l0 ? TOLOWER (src[1]) : 0;
e46fee70 916
dead1419 917 /* We use ! IDENT_CHAR for the next character after the register name, to
252b5132 918 make sure that we won't accidentally recognize a symbol name such as
dead1419 919 'sram' or sr_ram as being a reference to the register 'sr'. */
252b5132 920
e46fee70 921 if (l0 == 'r')
252b5132 922 {
e46fee70 923 if (l1 == '1')
d4845d57
JR
924 {
925 if (src[2] >= '0' && src[2] <= '5'
dead1419 926 && ! IDENT_CHAR ((unsigned char) src[3]))
d4845d57
JR
927 {
928 *mode = A_REG_N;
929 *reg = 10 + src[2] - '0';
930 return 3;
931 }
932 }
e46fee70 933 if (l1 >= '0' && l1 <= '9'
dead1419 934 && ! IDENT_CHAR ((unsigned char) src[2]))
d4845d57
JR
935 {
936 *mode = A_REG_N;
e46fee70 937 *reg = (l1 - '0');
d4845d57
JR
938 return 2;
939 }
e46fee70 940 if (l1 >= '0' && l1 <= '7' && strncasecmp (&src[2], "_bank", 5) == 0
dead1419
JR
941 && ! IDENT_CHAR ((unsigned char) src[7]))
942 {
943 *mode = A_REG_B;
e46fee70 944 *reg = (l1 - '0');
dead1419
JR
945 return 7;
946 }
d4845d57 947
e46fee70 948 if (l1 == 'e' && ! IDENT_CHAR ((unsigned char) src[2]))
d4845d57
JR
949 {
950 *mode = A_RE;
951 return 2;
952 }
e46fee70 953 if (l1 == 's' && ! IDENT_CHAR ((unsigned char) src[2]))
d4845d57
JR
954 {
955 *mode = A_RS;
956 return 2;
957 }
252b5132
RH
958 }
959
e46fee70 960 if (l0 == 'a')
252b5132 961 {
e46fee70 962 if (l1 == '0')
d4845d57 963 {
dead1419 964 if (! IDENT_CHAR ((unsigned char) src[2]))
d4845d57
JR
965 {
966 *mode = DSP_REG_N;
967 *reg = A_A0_NUM;
968 return 2;
969 }
3882b010 970 if (TOLOWER (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3]))
d4845d57
JR
971 {
972 *mode = DSP_REG_N;
973 *reg = A_A0G_NUM;
974 return 3;
975 }
976 }
e46fee70 977 if (l1 == '1')
252b5132 978 {
dead1419 979 if (! IDENT_CHAR ((unsigned char) src[2]))
252b5132 980 {
d4845d57
JR
981 *mode = DSP_REG_N;
982 *reg = A_A1_NUM;
983 return 2;
984 }
3882b010 985 if (TOLOWER (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3]))
d4845d57
JR
986 {
987 *mode = DSP_REG_N;
988 *reg = A_A1G_NUM;
252b5132
RH
989 return 3;
990 }
991 }
d4845d57 992
e46fee70 993 if (l1 == 'x' && src[2] >= '0' && src[2] <= '1'
dead1419 994 && ! IDENT_CHAR ((unsigned char) src[3]))
252b5132
RH
995 {
996 *mode = A_REG_N;
e46fee70 997 *reg = 4 + (l1 - '0');
d4845d57
JR
998 return 3;
999 }
e46fee70 1000 if (l1 == 'y' && src[2] >= '0' && src[2] <= '1'
dead1419 1001 && ! IDENT_CHAR ((unsigned char) src[3]))
d4845d57
JR
1002 {
1003 *mode = A_REG_N;
e46fee70 1004 *reg = 6 + (l1 - '0');
d4845d57
JR
1005 return 3;
1006 }
e46fee70 1007 if (l1 == 's' && src[2] >= '0' && src[2] <= '3'
dead1419 1008 && ! IDENT_CHAR ((unsigned char) src[3]))
d4845d57 1009 {
e46fee70 1010 int n = l1 - '0';
d4845d57
JR
1011
1012 *mode = A_REG_N;
1013 *reg = n | ((~n & 2) << 1);
1014 return 3;
1015 }
1016 }
1017
912a07db 1018 if (l0 == 'i' && l1 && ! IDENT_CHAR ((unsigned char) src[2]))
d4845d57 1019 {
e46fee70 1020 if (l1 == 's')
d4845d57
JR
1021 {
1022 *mode = A_REG_N;
1023 *reg = 8;
252b5132
RH
1024 return 2;
1025 }
e46fee70 1026 if (l1 == 'x')
d4845d57
JR
1027 {
1028 *mode = A_REG_N;
1029 *reg = 8;
1030 return 2;
1031 }
e46fee70 1032 if (l1 == 'y')
d4845d57
JR
1033 {
1034 *mode = A_REG_N;
1035 *reg = 9;
1036 return 2;
1037 }
1038 }
1039
e46fee70 1040 if (l0 == 'x' && l1 >= '0' && l1 <= '1'
dead1419 1041 && ! IDENT_CHAR ((unsigned char) src[2]))
d4845d57
JR
1042 {
1043 *mode = DSP_REG_N;
e46fee70 1044 *reg = A_X0_NUM + l1 - '0';
d4845d57
JR
1045 return 2;
1046 }
1047
e46fee70 1048 if (l0 == 'y' && l1 >= '0' && l1 <= '1'
dead1419 1049 && ! IDENT_CHAR ((unsigned char) src[2]))
d4845d57
JR
1050 {
1051 *mode = DSP_REG_N;
e46fee70 1052 *reg = A_Y0_NUM + l1 - '0';
d4845d57
JR
1053 return 2;
1054 }
1055
e46fee70 1056 if (l0 == 'm' && l1 >= '0' && l1 <= '1'
dead1419 1057 && ! IDENT_CHAR ((unsigned char) src[2]))
d4845d57
JR
1058 {
1059 *mode = DSP_REG_N;
e46fee70 1060 *reg = l1 == '0' ? A_M0_NUM : A_M1_NUM;
d4845d57 1061 return 2;
252b5132
RH
1062 }
1063
e46fee70
HPN
1064 if (l0 == 's'
1065 && l1 == 's'
3882b010 1066 && TOLOWER (src[2]) == 'r' && ! IDENT_CHAR ((unsigned char) src[3]))
252b5132
RH
1067 {
1068 *mode = A_SSR;
1069 return 3;
1070 }
1071
3882b010 1072 if (l0 == 's' && l1 == 'p' && TOLOWER (src[2]) == 'c'
dead1419 1073 && ! IDENT_CHAR ((unsigned char) src[3]))
252b5132
RH
1074 {
1075 *mode = A_SPC;
1076 return 3;
1077 }
1078
3882b010 1079 if (l0 == 's' && l1 == 'g' && TOLOWER (src[2]) == 'r'
dead1419 1080 && ! IDENT_CHAR ((unsigned char) src[3]))
252b5132
RH
1081 {
1082 *mode = A_SGR;
1083 return 3;
1084 }
1085
3882b010 1086 if (l0 == 'd' && l1 == 's' && TOLOWER (src[2]) == 'r'
dead1419 1087 && ! IDENT_CHAR ((unsigned char) src[3]))
d4845d57
JR
1088 {
1089 *mode = A_DSR;
1090 return 3;
1091 }
1092
3882b010 1093 if (l0 == 'd' && l1 == 'b' && TOLOWER (src[2]) == 'r'
dead1419 1094 && ! IDENT_CHAR ((unsigned char) src[3]))
252b5132
RH
1095 {
1096 *mode = A_DBR;
1097 return 3;
1098 }
1099
e46fee70 1100 if (l0 == 's' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2]))
252b5132
RH
1101 {
1102 *mode = A_SR;
1103 return 2;
1104 }
1105
e46fee70 1106 if (l0 == 's' && l1 == 'p' && ! IDENT_CHAR ((unsigned char) src[2]))
252b5132
RH
1107 {
1108 *mode = A_REG_N;
1109 *reg = 15;
1110 return 2;
1111 }
1112
e46fee70 1113 if (l0 == 'p' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2]))
252b5132
RH
1114 {
1115 *mode = A_PR;
1116 return 2;
1117 }
e46fee70 1118 if (l0 == 'p' && l1 == 'c' && ! IDENT_CHAR ((unsigned char) src[2]))
252b5132 1119 {
015551fc
JR
1120 /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0'
1121 and use an uninitialized immediate. */
1122 *mode = A_PC;
252b5132
RH
1123 return 2;
1124 }
3882b010 1125 if (l0 == 'g' && l1 == 'b' && TOLOWER (src[2]) == 'r'
dead1419 1126 && ! IDENT_CHAR ((unsigned char) src[3]))
252b5132
RH
1127 {
1128 *mode = A_GBR;
1129 return 3;
1130 }
3882b010 1131 if (l0 == 'v' && l1 == 'b' && TOLOWER (src[2]) == 'r'
dead1419 1132 && ! IDENT_CHAR ((unsigned char) src[3]))
252b5132
RH
1133 {
1134 *mode = A_VBR;
1135 return 3;
1136 }
1137
3882b010 1138 if (l0 == 'm' && l1 == 'a' && TOLOWER (src[2]) == 'c'
dead1419 1139 && ! IDENT_CHAR ((unsigned char) src[4]))
252b5132 1140 {
3882b010 1141 if (TOLOWER (src[3]) == 'l')
252b5132
RH
1142 {
1143 *mode = A_MACL;
1144 return 4;
1145 }
3882b010 1146 if (TOLOWER (src[3]) == 'h')
252b5132
RH
1147 {
1148 *mode = A_MACH;
1149 return 4;
1150 }
1151 }
3882b010 1152 if (l0 == 'm' && l1 == 'o' && TOLOWER (src[2]) == 'd'
912a07db 1153 && ! IDENT_CHAR ((unsigned char) src[3]))
d4845d57
JR
1154 {
1155 *mode = A_MOD;
1156 return 3;
1157 }
e46fee70 1158 if (l0 == 'f' && l1 == 'r')
252b5132
RH
1159 {
1160 if (src[2] == '1')
1161 {
1162 if (src[3] >= '0' && src[3] <= '5'
dead1419 1163 && ! IDENT_CHAR ((unsigned char) src[4]))
252b5132
RH
1164 {
1165 *mode = F_REG_N;
1166 *reg = 10 + src[3] - '0';
1167 return 4;
1168 }
1169 }
1170 if (src[2] >= '0' && src[2] <= '9'
dead1419 1171 && ! IDENT_CHAR ((unsigned char) src[3]))
252b5132
RH
1172 {
1173 *mode = F_REG_N;
1174 *reg = (src[2] - '0');
1175 return 3;
1176 }
1177 }
e46fee70 1178 if (l0 == 'd' && l1 == 'r')
252b5132
RH
1179 {
1180 if (src[2] == '1')
1181 {
1182 if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1)
dead1419 1183 && ! IDENT_CHAR ((unsigned char) src[4]))
252b5132
RH
1184 {
1185 *mode = D_REG_N;
1186 *reg = 10 + src[3] - '0';
1187 return 4;
1188 }
1189 }
1190 if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1)
dead1419 1191 && ! IDENT_CHAR ((unsigned char) src[3]))
252b5132
RH
1192 {
1193 *mode = D_REG_N;
1194 *reg = (src[2] - '0');
1195 return 3;
1196 }
1197 }
e46fee70 1198 if (l0 == 'x' && l1 == 'd')
252b5132
RH
1199 {
1200 if (src[2] == '1')
1201 {
1202 if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1)
dead1419 1203 && ! IDENT_CHAR ((unsigned char) src[4]))
252b5132
RH
1204 {
1205 *mode = X_REG_N;
1206 *reg = 11 + src[3] - '0';
1207 return 4;
1208 }
1209 }
1210 if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1)
dead1419 1211 && ! IDENT_CHAR ((unsigned char) src[3]))
252b5132
RH
1212 {
1213 *mode = X_REG_N;
1214 *reg = (src[2] - '0') + 1;
1215 return 3;
1216 }
1217 }
e46fee70 1218 if (l0 == 'f' && l1 == 'v')
252b5132 1219 {
dead1419 1220 if (src[2] == '1'&& src[3] == '2' && ! IDENT_CHAR ((unsigned char) src[4]))
252b5132
RH
1221 {
1222 *mode = V_REG_N;
1223 *reg = 12;
1224 return 4;
1225 }
1226 if ((src[2] == '0' || src[2] == '4' || src[2] == '8')
dead1419 1227 && ! IDENT_CHAR ((unsigned char) src[3]))
252b5132
RH
1228 {
1229 *mode = V_REG_N;
1230 *reg = (src[2] - '0');
1231 return 3;
1232 }
1233 }
3882b010
L
1234 if (l0 == 'f' && l1 == 'p' && TOLOWER (src[2]) == 'u'
1235 && TOLOWER (src[3]) == 'l'
dead1419 1236 && ! IDENT_CHAR ((unsigned char) src[4]))
252b5132
RH
1237 {
1238 *mode = FPUL_N;
1239 return 4;
1240 }
1241
3882b010
L
1242 if (l0 == 'f' && l1 == 'p' && TOLOWER (src[2]) == 's'
1243 && TOLOWER (src[3]) == 'c'
1244 && TOLOWER (src[4]) == 'r' && ! IDENT_CHAR ((unsigned char) src[5]))
252b5132
RH
1245 {
1246 *mode = FPSCR_N;
1247 return 5;
1248 }
1249
3882b010
L
1250 if (l0 == 'x' && l1 == 'm' && TOLOWER (src[2]) == 't'
1251 && TOLOWER (src[3]) == 'r'
1252 && TOLOWER (src[4]) == 'x' && ! IDENT_CHAR ((unsigned char) src[5]))
252b5132
RH
1253 {
1254 *mode = XMTRX_M4;
1255 return 5;
1256 }
1257
1258 return 0;
1259}
1260
c4aa876b 1261static char *
015551fc 1262parse_exp (s, op)
252b5132 1263 char *s;
015551fc 1264 sh_operand_info *op;
252b5132
RH
1265{
1266 char *save;
1267 char *new;
1268
1269 save = input_line_pointer;
1270 input_line_pointer = s;
015551fc
JR
1271 expression (&op->immediate);
1272 if (op->immediate.X_op == O_absent)
252b5132 1273 as_bad (_("missing operand"));
538cd60f
AO
1274#ifdef OBJ_ELF
1275 else if (op->immediate.X_op == O_PIC_reloc
1276 || sh_PIC_related_p (op->immediate.X_add_symbol)
1277 || sh_PIC_related_p (op->immediate.X_op_symbol))
1278 as_bad (_("misplaced PIC operand"));
1279#endif
252b5132
RH
1280 new = input_line_pointer;
1281 input_line_pointer = save;
1282 return new;
1283}
1284
252b5132
RH
1285/* The many forms of operand:
1286
1287 Rn Register direct
1288 @Rn Register indirect
1289 @Rn+ Autoincrement
1290 @-Rn Autodecrement
1291 @(disp:4,Rn)
1292 @(disp:8,GBR)
1293 @(disp:8,PC)
1294
1295 @(R0,Rn)
1296 @(R0,GBR)
1297
1298 disp:8
1299 disp:12
1300 #imm8
1301 pr, gbr, vbr, macl, mach
252b5132
RH
1302 */
1303
c4aa876b 1304static char *
252b5132
RH
1305parse_at (src, op)
1306 char *src;
1307 sh_operand_info *op;
1308{
1309 int len;
1310 int mode;
1311 src++;
1312 if (src[0] == '-')
1313 {
6b31947e 1314 /* Must be predecrement. */
252b5132
RH
1315 src++;
1316
1317 len = parse_reg (src, &mode, &(op->reg));
1318 if (mode != A_REG_N)
1319 as_bad (_("illegal register after @-"));
1320
1321 op->type = A_DEC_N;
1322 src += len;
1323 }
1324 else if (src[0] == '(')
1325 {
1326 /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or
8d4d84c2 1327 @(r0, rn). */
252b5132
RH
1328 src++;
1329 len = parse_reg (src, &mode, &(op->reg));
1330 if (len && mode == A_REG_N)
1331 {
1332 src += len;
1333 if (op->reg != 0)
1334 {
1335 as_bad (_("must be @(r0,...)"));
1336 }
1337 if (src[0] == ',')
252b5132 1338 {
8d4d84c2
AO
1339 src++;
1340 /* Now can be rn or gbr. */
1341 len = parse_reg (src, &mode, &(op->reg));
1342 }
1343 else
1344 {
1345 len = 0;
252b5132 1346 }
8d4d84c2 1347 if (len)
252b5132 1348 {
8d4d84c2
AO
1349 if (mode == A_GBR)
1350 {
1351 op->type = A_R0_GBR;
1352 }
1353 else if (mode == A_REG_N)
1354 {
1355 op->type = A_IND_R0_REG_N;
1356 }
1357 else
1358 {
1359 as_bad (_("syntax error in @(r0,...)"));
1360 }
252b5132
RH
1361 }
1362 else
1363 {
8d4d84c2 1364 as_bad (_("syntax error in @(r0...)"));
252b5132
RH
1365 }
1366 }
1367 else
1368 {
8d4d84c2 1369 /* Must be an @(disp,.. thing). */
015551fc 1370 src = parse_exp (src, op);
252b5132
RH
1371 if (src[0] == ',')
1372 src++;
8d4d84c2 1373 /* Now can be rn, gbr or pc. */
252b5132
RH
1374 len = parse_reg (src, &mode, &op->reg);
1375 if (len)
1376 {
1377 if (mode == A_REG_N)
1378 {
1379 op->type = A_DISP_REG_N;
1380 }
1381 else if (mode == A_GBR)
1382 {
1383 op->type = A_DISP_GBR;
1384 }
015551fc 1385 else if (mode == A_PC)
252b5132 1386 {
dbb4348d
JR
1387 /* We want @(expr, pc) to uniformly address . + expr,
1388 no matter if expr is a constant, or a more complex
1389 expression, e.g. sym-. or sym1-sym2.
1390 However, we also used to accept @(sym,pc)
1391 as adressing sym, i.e. meaning the same as plain sym.
1392 Some existing code does use the @(sym,pc) syntax, so
1393 we give it the old semantics for now, but warn about
1394 its use, so that users have some time to fix their code.
1395
1396 Note that due to this backward compatibility hack,
1397 we'll get unexpected results when @(offset, pc) is used,
1398 and offset is a symbol that is set later to an an address
1399 difference, or an external symbol that is set to an
1400 address difference in another source file, so we want to
1401 eventually remove it. */
9691d64f
JR
1402 if (op->immediate.X_op == O_symbol)
1403 {
1404 op->type = A_DISP_PC;
1405 as_warn (_("Deprecated syntax."));
1406 }
1407 else
1408 {
1409 op->type = A_DISP_PC_ABS;
1410 /* Such operands don't get corrected for PC==.+4, so
1411 make the correction here. */
1412 op->immediate.X_add_number -= 4;
1413 }
252b5132
RH
1414 }
1415 else
1416 {
1417 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
1418 }
1419 }
1420 else
1421 {
1422 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
1423 }
1424 }
1425 src += len;
1426 if (src[0] != ')')
1427 as_bad (_("expecting )"));
1428 else
1429 src++;
1430 }
1431 else
1432 {
1433 src += parse_reg (src, &mode, &(op->reg));
1434 if (mode != A_REG_N)
006299d3
NC
1435 as_bad (_("illegal register after @"));
1436
252b5132
RH
1437 if (src[0] == '+')
1438 {
1000a02a
NC
1439 char l0, l1;
1440
252b5132 1441 src++;
1000a02a
NC
1442 l0 = TOLOWER (src[0]);
1443 l1 = TOLOWER (src[1]);
1444
1445 if ((l0 == 'r' && l1 == '8')
1446 || (l0 == 'i' && (l1 == 'x' || l1 == 's')))
d4845d57
JR
1447 {
1448 src += 2;
1449 op->type = A_PMOD_N;
1450 }
006299d3
NC
1451 else if ( (l0 == 'r' && l1 == '9')
1452 || (l0 == 'i' && l1 == 'y'))
d4845d57
JR
1453 {
1454 src += 2;
1455 op->type = A_PMODY_N;
1456 }
1457 else
1458 op->type = A_INC_N;
252b5132
RH
1459 }
1460 else
006299d3 1461 op->type = A_IND_N;
252b5132
RH
1462 }
1463 return src;
1464}
1465
1466static void
1467get_operand (ptr, op)
1468 char **ptr;
1469 sh_operand_info *op;
1470{
1471 char *src = *ptr;
1472 int mode = -1;
1473 unsigned int len;
1474
1475 if (src[0] == '#')
1476 {
1477 src++;
015551fc 1478 *ptr = parse_exp (src, op);
252b5132
RH
1479 op->type = A_IMM;
1480 return;
1481 }
1482
1483 else if (src[0] == '@')
1484 {
1485 *ptr = parse_at (src, op);
1486 return;
1487 }
1488 len = parse_reg (src, &mode, &(op->reg));
1489 if (len)
1490 {
1491 *ptr = src + len;
1492 op->type = mode;
1493 return;
1494 }
1495 else
1496 {
6b31947e 1497 /* Not a reg, the only thing left is a displacement. */
015551fc 1498 *ptr = parse_exp (src, op);
252b5132
RH
1499 op->type = A_DISP_PC;
1500 return;
1501 }
1502}
1503
c4aa876b 1504static char *
252b5132
RH
1505get_operands (info, args, operand)
1506 sh_opcode_info *info;
1507 char *args;
1508 sh_operand_info *operand;
252b5132
RH
1509{
1510 char *ptr = args;
1511 if (info->arg[0])
1512 {
d4845d57
JR
1513 /* The pre-processor will eliminate whitespace in front of '@'
1514 after the first argument; we may be called multiple times
1515 from assemble_ppi, so don't insist on finding whitespace here. */
1516 if (*ptr == ' ')
1517 ptr++;
252b5132
RH
1518
1519 get_operand (&ptr, operand + 0);
1520 if (info->arg[1])
1521 {
1522 if (*ptr == ',')
1523 {
1524 ptr++;
1525 }
1526 get_operand (&ptr, operand + 1);
52ccafd0
JR
1527 /* ??? Hack: psha/pshl have a varying operand number depending on
1528 the type of the first operand. We handle this by having the
1529 three-operand version first and reducing the number of operands
1530 parsed to two if we see that the first operand is an immediate.
1531 This works because no insn with three operands has an immediate
1532 as first operand. */
1533 if (info->arg[2] && operand[0].type != A_IMM)
252b5132
RH
1534 {
1535 if (*ptr == ',')
1536 {
1537 ptr++;
1538 }
1539 get_operand (&ptr, operand + 2);
1540 }
1541 else
1542 {
1543 operand[2].type = 0;
1544 }
1545 }
1546 else
1547 {
1548 operand[1].type = 0;
1549 operand[2].type = 0;
1550 }
1551 }
1552 else
1553 {
1554 operand[0].type = 0;
1555 operand[1].type = 0;
1556 operand[2].type = 0;
1557 }
1558 return ptr;
1559}
1560
1561/* Passed a pointer to a list of opcodes which use different
1562 addressing modes, return the opcode which matches the opcodes
6b31947e 1563 provided. */
252b5132 1564
c4aa876b 1565static sh_opcode_info *
252b5132
RH
1566get_specific (opcode, operands)
1567 sh_opcode_info *opcode;
1568 sh_operand_info *operands;
1569{
1570 sh_opcode_info *this_try = opcode;
1571 char *name = opcode->name;
1572 int n = 0;
c4aa876b 1573
252b5132
RH
1574 while (opcode->name)
1575 {
1576 this_try = opcode++;
1577 if (this_try->name != name)
1578 {
1579 /* We've looked so far down the table that we've run out of
6b31947e 1580 opcodes with the same name. */
252b5132
RH
1581 return 0;
1582 }
c4aa876b 1583
6b31947e 1584 /* Look at both operands needed by the opcodes and provided by
252b5132
RH
1585 the user - since an arg test will often fail on the same arg
1586 again and again, we'll try and test the last failing arg the
6b31947e 1587 first on each opcode try. */
252b5132
RH
1588 for (n = 0; this_try->arg[n]; n++)
1589 {
1590 sh_operand_info *user = operands + n;
1591 sh_arg_type arg = this_try->arg[n];
c4aa876b 1592
252b5132
RH
1593 switch (arg)
1594 {
7679ead9
AO
1595 case A_DISP_PC:
1596 if (user->type == A_DISP_PC_ABS)
1597 break;
1598 /* Fall through. */
252b5132
RH
1599 case A_IMM:
1600 case A_BDISP12:
1601 case A_BDISP8:
1602 case A_DISP_GBR:
252b5132
RH
1603 case A_MACH:
1604 case A_PR:
1605 case A_MACL:
1606 if (user->type != arg)
1607 goto fail;
1608 break;
1609 case A_R0:
1610 /* opcode needs r0 */
1611 if (user->type != A_REG_N || user->reg != 0)
1612 goto fail;
1613 break;
1614 case A_R0_GBR:
1615 if (user->type != A_R0_GBR || user->reg != 0)
1616 goto fail;
1617 break;
1618 case F_FR0:
1619 if (user->type != F_REG_N || user->reg != 0)
1620 goto fail;
1621 break;
1622
1623 case A_REG_N:
1624 case A_INC_N:
1625 case A_DEC_N:
1626 case A_IND_N:
1627 case A_IND_R0_REG_N:
1628 case A_DISP_REG_N:
1629 case F_REG_N:
1630 case D_REG_N:
1631 case X_REG_N:
1632 case V_REG_N:
1633 case FPUL_N:
1634 case FPSCR_N:
d4845d57
JR
1635 case A_PMOD_N:
1636 case A_PMODY_N:
1637 case DSP_REG_N:
252b5132
RH
1638 /* Opcode needs rn */
1639 if (user->type != arg)
1640 goto fail;
1641 reg_n = user->reg;
1642 break;
252b5132
RH
1643 case DX_REG_N:
1644 if (user->type != D_REG_N && user->type != X_REG_N)
1645 goto fail;
1646 reg_n = user->reg;
1647 break;
1648 case A_GBR:
1649 case A_SR:
1650 case A_VBR:
d4845d57
JR
1651 case A_DSR:
1652 case A_MOD:
1653 case A_RE:
1654 case A_RS:
252b5132
RH
1655 case A_SSR:
1656 case A_SPC:
1657 case A_SGR:
1658 case A_DBR:
1659 if (user->type != arg)
1660 goto fail;
1661 break;
1662
c4aa876b 1663 case A_REG_B:
252b5132
RH
1664 if (user->type != arg)
1665 goto fail;
1666 reg_b = user->reg;
1667 break;
1668
1669 case A_REG_M:
1670 case A_INC_M:
1671 case A_DEC_M:
1672 case A_IND_M:
1673 case A_IND_R0_REG_M:
1674 case A_DISP_REG_M:
d4845d57 1675 case DSP_REG_M:
252b5132
RH
1676 /* Opcode needs rn */
1677 if (user->type != arg - A_REG_M + A_REG_N)
1678 goto fail;
1679 reg_m = user->reg;
1680 break;
1681
d4845d57
JR
1682 case DSP_REG_X:
1683 if (user->type != DSP_REG_N)
1684 goto fail;
1685 switch (user->reg)
1686 {
1687 case A_X0_NUM:
1688 reg_x = 0;
1689 break;
1690 case A_X1_NUM:
1691 reg_x = 1;
1692 break;
1693 case A_A0_NUM:
1694 reg_x = 2;
1695 break;
1696 case A_A1_NUM:
1697 reg_x = 3;
1698 break;
1699 default:
1700 goto fail;
1701 }
1702 break;
1703
1704 case DSP_REG_Y:
1705 if (user->type != DSP_REG_N)
1706 goto fail;
1707 switch (user->reg)
1708 {
1709 case A_Y0_NUM:
1710 reg_y = 0;
1711 break;
1712 case A_Y1_NUM:
1713 reg_y = 1;
1714 break;
1715 case A_M0_NUM:
1716 reg_y = 2;
1717 break;
1718 case A_M1_NUM:
1719 reg_y = 3;
1720 break;
1721 default:
1722 goto fail;
1723 }
1724 break;
1725
1726 case DSP_REG_E:
1727 if (user->type != DSP_REG_N)
1728 goto fail;
1729 switch (user->reg)
1730 {
1731 case A_X0_NUM:
1732 reg_efg = 0 << 10;
1733 break;
1734 case A_X1_NUM:
1735 reg_efg = 1 << 10;
1736 break;
1737 case A_Y0_NUM:
1738 reg_efg = 2 << 10;
1739 break;
1740 case A_A1_NUM:
1741 reg_efg = 3 << 10;
1742 break;
1743 default:
1744 goto fail;
1745 }
1746 break;
1747
1748 case DSP_REG_F:
1749 if (user->type != DSP_REG_N)
1750 goto fail;
1751 switch (user->reg)
1752 {
1753 case A_Y0_NUM:
1754 reg_efg |= 0 << 8;
1755 break;
1756 case A_Y1_NUM:
1757 reg_efg |= 1 << 8;
1758 break;
1759 case A_X0_NUM:
1760 reg_efg |= 2 << 8;
1761 break;
1762 case A_A1_NUM:
1763 reg_efg |= 3 << 8;
1764 break;
1765 default:
1766 goto fail;
1767 }
1768 break;
1769
1770 case DSP_REG_G:
1771 if (user->type != DSP_REG_N)
1772 goto fail;
1773 switch (user->reg)
1774 {
1775 case A_M0_NUM:
1776 reg_efg |= 0 << 2;
1777 break;
1778 case A_M1_NUM:
1779 reg_efg |= 1 << 2;
1780 break;
1781 case A_A0_NUM:
1782 reg_efg |= 2 << 2;
1783 break;
1784 case A_A1_NUM:
1785 reg_efg |= 3 << 2;
1786 break;
1787 default:
1788 goto fail;
1789 }
1790 break;
1791
1792 case A_A0:
1793 if (user->type != DSP_REG_N || user->reg != A_A0_NUM)
1794 goto fail;
1795 break;
1796 case A_X0:
1797 if (user->type != DSP_REG_N || user->reg != A_X0_NUM)
1798 goto fail;
1799 break;
1800 case A_X1:
1801 if (user->type != DSP_REG_N || user->reg != A_X1_NUM)
1802 goto fail;
1803 break;
1804 case A_Y0:
1805 if (user->type != DSP_REG_N || user->reg != A_Y0_NUM)
1806 goto fail;
1807 break;
1808 case A_Y1:
1809 if (user->type != DSP_REG_N || user->reg != A_Y1_NUM)
1810 goto fail;
1811 break;
1812
252b5132
RH
1813 case F_REG_M:
1814 case D_REG_M:
1815 case X_REG_M:
1816 case V_REG_M:
1817 case FPUL_M:
1818 case FPSCR_M:
1819 /* Opcode needs rn */
1820 if (user->type != arg - F_REG_M + F_REG_N)
1821 goto fail;
1822 reg_m = user->reg;
1823 break;
1824 case DX_REG_M:
1825 if (user->type != D_REG_N && user->type != X_REG_N)
1826 goto fail;
1827 reg_m = user->reg;
1828 break;
1829 case XMTRX_M4:
1830 if (user->type != XMTRX_M4)
1831 goto fail;
1832 reg_m = 4;
1833 break;
c4aa876b 1834
252b5132
RH
1835 default:
1836 printf (_("unhandled %d\n"), arg);
1837 goto fail;
1838 }
1839 }
a37c8f88
JR
1840 if ( !(valid_arch & this_try->arch))
1841 goto fail;
d4845d57 1842 valid_arch &= this_try->arch;
252b5132 1843 return this_try;
c4aa876b
NC
1844 fail:
1845 ;
252b5132
RH
1846 }
1847
1848 return 0;
1849}
1850
252b5132 1851static void
015551fc 1852insert (where, how, pcrel, op)
252b5132
RH
1853 char *where;
1854 int how;
1855 int pcrel;
015551fc 1856 sh_operand_info *op;
252b5132
RH
1857{
1858 fix_new_exp (frag_now,
1859 where - frag_now->fr_literal,
1860 2,
015551fc 1861 &op->immediate,
252b5132
RH
1862 pcrel,
1863 how);
1864}
1865
1866static void
015551fc 1867build_relax (opcode, op)
252b5132 1868 sh_opcode_info *opcode;
015551fc 1869 sh_operand_info *op;
252b5132
RH
1870{
1871 int high_byte = target_big_endian ? 0 : 1;
1872 char *p;
1873
1874 if (opcode->arg[0] == A_BDISP8)
1875 {
1876 int what = (opcode->nibbles[1] & 4) ? COND_JUMP_DELAY : COND_JUMP;
1877 p = frag_var (rs_machine_dependent,
1878 md_relax_table[C (what, COND32)].rlx_length,
1879 md_relax_table[C (what, COND8)].rlx_length,
1880 C (what, 0),
015551fc
JR
1881 op->immediate.X_add_symbol,
1882 op->immediate.X_add_number,
252b5132
RH
1883 0);
1884 p[high_byte] = (opcode->nibbles[0] << 4) | (opcode->nibbles[1]);
1885 }
1886 else if (opcode->arg[0] == A_BDISP12)
1887 {
1888 p = frag_var (rs_machine_dependent,
1889 md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length,
1890 md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length,
1891 C (UNCOND_JUMP, 0),
015551fc
JR
1892 op->immediate.X_add_symbol,
1893 op->immediate.X_add_number,
252b5132
RH
1894 0);
1895 p[high_byte] = (opcode->nibbles[0] << 4);
1896 }
1897
1898}
1899
6b31947e 1900/* Insert ldrs & ldre with fancy relocations that relaxation can recognize. */
d67b5d6d 1901
015551fc
JR
1902static char *
1903insert_loop_bounds (output, operand)
1904 char *output;
1905 sh_operand_info *operand;
1906{
1907 char *name;
1908 symbolS *end_sym;
1909
1910 /* Since the low byte of the opcode will be overwritten by the reloc, we
1911 can just stash the high byte into both bytes and ignore endianness. */
1912 output[0] = 0x8c;
1913 output[1] = 0x8c;
1914 insert (output, BFD_RELOC_SH_LOOP_START, 1, operand);
1915 insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1);
1916
1917 if (sh_relax)
1918 {
1919 static int count = 0;
1920
1921 /* If the last loop insn is a two-byte-insn, it is in danger of being
1922 swapped with the insn after it. To prevent this, create a new
1923 symbol - complete with SH_LABEL reloc - after the last loop insn.
1924 If the last loop insn is four bytes long, the symbol will be
1925 right in the middle, but four byte insns are not swapped anyways. */
1926 /* A REPEAT takes 6 bytes. The SH has a 32 bit address space.
1927 Hence a 9 digit number should be enough to count all REPEATs. */
1928 name = alloca (11);
1929 sprintf (name, "_R%x", count++ & 0x3fffffff);
c4aa876b 1930 end_sym = symbol_new (name, undefined_section, 0, &zero_address_frag);
015551fc
JR
1931 /* Make this a local symbol. */
1932#ifdef OBJ_COFF
1933 SF_SET_LOCAL (end_sym);
1934#endif /* OBJ_COFF */
1935 symbol_table_insert (end_sym);
1936 end_sym->sy_value = operand[1].immediate;
1937 end_sym->sy_value.X_add_number += 2;
1938 fix_new (frag_now, frag_now_fix (), 2, end_sym, 0, 1, BFD_RELOC_SH_LABEL);
1939 }
1940
1941 output = frag_more (2);
1942 output[0] = 0x8e;
1943 output[1] = 0x8e;
1944 insert (output, BFD_RELOC_SH_LOOP_START, 1, operand);
1945 insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1);
1946
1947 return frag_more (2);
1948}
1949
d67b5d6d 1950/* Now we know what sort of opcodes it is, let's build the bytes. */
6b31947e 1951
0d10e182 1952static unsigned int
252b5132
RH
1953build_Mytes (opcode, operand)
1954 sh_opcode_info *opcode;
1955 sh_operand_info *operand;
252b5132
RH
1956{
1957 int index;
1958 char nbuf[4];
1959 char *output = frag_more (2);
0d10e182 1960 unsigned int size = 2;
252b5132
RH
1961 int low_byte = target_big_endian ? 1 : 0;
1962 nbuf[0] = 0;
1963 nbuf[1] = 0;
1964 nbuf[2] = 0;
1965 nbuf[3] = 0;
1966
1967 for (index = 0; index < 4; index++)
1968 {
1969 sh_nibble_type i = opcode->nibbles[index];
1970 if (i < 16)
1971 {
1972 nbuf[index] = i;
1973 }
1974 else
1975 {
1976 switch (i)
1977 {
1978 case REG_N:
1979 nbuf[index] = reg_n;
1980 break;
1981 case REG_M:
1982 nbuf[index] = reg_m;
1983 break;
d4845d57
JR
1984 case SDT_REG_N:
1985 if (reg_n < 2 || reg_n > 5)
1986 as_bad (_("Invalid register: 'r%d'"), reg_n);
1987 nbuf[index] = (reg_n & 3) | 4;
1988 break;
252b5132
RH
1989 case REG_NM:
1990 nbuf[index] = reg_n | (reg_m >> 2);
1991 break;
c4aa876b 1992 case REG_B:
252b5132
RH
1993 nbuf[index] = reg_b | 0x08;
1994 break;
015551fc
JR
1995 case IMM0_4BY4:
1996 insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand);
1997 break;
1998 case IMM0_4BY2:
1999 insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand);
2000 break;
2001 case IMM0_4:
2002 insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand);
2003 break;
2004 case IMM1_4BY4:
2005 insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand + 1);
2006 break;
2007 case IMM1_4BY2:
2008 insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand + 1);
252b5132 2009 break;
015551fc
JR
2010 case IMM1_4:
2011 insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand + 1);
252b5132 2012 break;
015551fc
JR
2013 case IMM0_8BY4:
2014 insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand);
252b5132 2015 break;
015551fc
JR
2016 case IMM0_8BY2:
2017 insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand);
252b5132 2018 break;
015551fc
JR
2019 case IMM0_8:
2020 insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand);
252b5132 2021 break;
015551fc
JR
2022 case IMM1_8BY4:
2023 insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand + 1);
252b5132 2024 break;
015551fc
JR
2025 case IMM1_8BY2:
2026 insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand + 1);
2027 break;
2028 case IMM1_8:
2029 insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand + 1);
252b5132
RH
2030 break;
2031 case PCRELIMM_8BY4:
7679ead9
AO
2032 insert (output, BFD_RELOC_SH_PCRELIMM8BY4,
2033 operand->type != A_DISP_PC_ABS, operand);
252b5132
RH
2034 break;
2035 case PCRELIMM_8BY2:
7679ead9
AO
2036 insert (output, BFD_RELOC_SH_PCRELIMM8BY2,
2037 operand->type != A_DISP_PC_ABS, operand);
015551fc
JR
2038 break;
2039 case REPEAT:
2040 output = insert_loop_bounds (output, operand);
2041 nbuf[index] = opcode->nibbles[3];
2042 operand += 2;
252b5132
RH
2043 break;
2044 default:
2045 printf (_("failed for %d\n"), i);
2046 }
2047 }
2048 }
c4aa876b
NC
2049 if (!target_big_endian)
2050 {
2051 output[1] = (nbuf[0] << 4) | (nbuf[1]);
2052 output[0] = (nbuf[2] << 4) | (nbuf[3]);
2053 }
2054 else
2055 {
2056 output[0] = (nbuf[0] << 4) | (nbuf[1]);
2057 output[1] = (nbuf[2] << 4) | (nbuf[3]);
2058 }
0d10e182 2059 return size;
252b5132
RH
2060}
2061
d4845d57
JR
2062/* Find an opcode at the start of *STR_P in the hash table, and set
2063 *STR_P to the first character after the last one read. */
252b5132 2064
d4845d57
JR
2065static sh_opcode_info *
2066find_cooked_opcode (str_p)
2067 char **str_p;
252b5132 2068{
d4845d57 2069 char *str = *str_p;
252b5132
RH
2070 unsigned char *op_start;
2071 unsigned char *op_end;
252b5132
RH
2072 char name[20];
2073 int nlen = 0;
c4aa876b 2074
6b31947e 2075 /* Drop leading whitespace. */
252b5132
RH
2076 while (*str == ' ')
2077 str++;
2078
d4845d57
JR
2079 /* Find the op code end.
2080 The pre-processor will eliminate whitespace in front of
2081 any '@' after the first argument; we may be called from
2082 assemble_ppi, so the opcode might be terminated by an '@'. */
252b5132
RH
2083 for (op_start = op_end = (unsigned char *) (str);
2084 *op_end
2085 && nlen < 20
d4845d57 2086 && !is_end_of_line[*op_end] && *op_end != ' ' && *op_end != '@';
252b5132
RH
2087 op_end++)
2088 {
2089 unsigned char c = op_start[nlen];
2090
2091 /* The machine independent code will convert CMP/EQ into cmp/EQ
d4845d57
JR
2092 because it thinks the '/' is the end of the symbol. Moreover,
2093 all but the first sub-insn is a parallel processing insn won't
3882b010 2094 be capitalized. Instead of hacking up the machine independent
d4845d57 2095 code, we just deal with it here. */
3882b010 2096 c = TOLOWER (c);
252b5132
RH
2097 name[nlen] = c;
2098 nlen++;
2099 }
c4aa876b 2100
252b5132 2101 name[nlen] = 0;
d4845d57 2102 *str_p = op_end;
252b5132
RH
2103
2104 if (nlen == 0)
6b31947e 2105 as_bad (_("can't find opcode "));
252b5132 2106
d4845d57
JR
2107 return (sh_opcode_info *) hash_find (opcode_hash_control, name);
2108}
2109
2110/* Assemble a parallel processing insn. */
2111#define DDT_BASE 0xf000 /* Base value for double data transfer insns */
6b31947e 2112
0d10e182 2113static unsigned int
d4845d57
JR
2114assemble_ppi (op_end, opcode)
2115 char *op_end;
2116 sh_opcode_info *opcode;
2117{
2118 int movx = 0;
2119 int movy = 0;
2120 int cond = 0;
2121 int field_b = 0;
2122 char *output;
2123 int move_code;
0d10e182 2124 unsigned int size;
d4845d57 2125
d4845d57
JR
2126 for (;;)
2127 {
2128 sh_operand_info operand[3];
2129
ac62e7a3
JR
2130 /* Some insn ignore one or more register fields, e.g. psts machl,a0.
2131 Make sure we encode a defined insn pattern. */
2132 reg_x = 0;
2133 reg_y = 0;
2134 reg_n = 0;
2135
d4845d57
JR
2136 if (opcode->arg[0] != A_END)
2137 op_end = get_operands (opcode, op_end, operand);
2138 opcode = get_specific (opcode, operand);
2139 if (opcode == 0)
2140 {
6b31947e 2141 /* Couldn't find an opcode which matched the operands. */
d4845d57 2142 char *where = frag_more (2);
0d10e182 2143 size = 2;
d4845d57
JR
2144
2145 where[0] = 0x0;
2146 where[1] = 0x0;
2147 as_bad (_("invalid operands for opcode"));
0d10e182 2148 return size;
d4845d57 2149 }
c4aa876b 2150
d4845d57
JR
2151 if (opcode->nibbles[0] != PPI)
2152 as_bad (_("insn can't be combined with parallel processing insn"));
2153
2154 switch (opcode->nibbles[1])
2155 {
2156
2157 case NOPX:
2158 if (movx)
2159 as_bad (_("multiple movx specifications"));
2160 movx = DDT_BASE;
2161 break;
2162 case NOPY:
2163 if (movy)
2164 as_bad (_("multiple movy specifications"));
2165 movy = DDT_BASE;
2166 break;
2167
2168 case MOVX:
2169 if (movx)
2170 as_bad (_("multiple movx specifications"));
2171 if (reg_n < 4 || reg_n > 5)
2172 as_bad (_("invalid movx address register"));
2173 if (opcode->nibbles[2] & 8)
2174 {
2175 if (reg_m == A_A1_NUM)
2176 movx = 1 << 7;
2177 else if (reg_m != A_A0_NUM)
2178 as_bad (_("invalid movx dsp register"));
2179 }
2180 else
2181 {
2182 if (reg_x > 1)
2183 as_bad (_("invalid movx dsp register"));
2184 movx = reg_x << 7;
2185 }
2186 movx += ((reg_n - 4) << 9) + (opcode->nibbles[2] << 2) + DDT_BASE;
2187 break;
2188
2189 case MOVY:
2190 if (movy)
2191 as_bad (_("multiple movy specifications"));
2192 if (opcode->nibbles[2] & 8)
2193 {
2194 /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode,
2195 so add 8 more. */
2196 movy = 8;
2197 if (reg_m == A_A1_NUM)
2198 movy += 1 << 6;
2199 else if (reg_m != A_A0_NUM)
2200 as_bad (_("invalid movy dsp register"));
2201 }
2202 else
2203 {
2204 if (reg_y > 1)
2205 as_bad (_("invalid movy dsp register"));
2206 movy = reg_y << 6;
2207 }
2208 if (reg_n < 6 || reg_n > 7)
2209 as_bad (_("invalid movy address register"));
2210 movy += ((reg_n - 6) << 8) + opcode->nibbles[2] + DDT_BASE;
2211 break;
2212
2213 case PSH:
015551fc 2214 if (operand[0].immediate.X_op != O_constant)
d4845d57
JR
2215 as_bad (_("dsp immediate shift value not constant"));
2216 field_b = ((opcode->nibbles[2] << 12)
015551fc 2217 | (operand[0].immediate.X_add_number & 127) << 4
d4845d57
JR
2218 | reg_n);
2219 break;
2220 case PPI3:
2221 if (field_b)
2222 as_bad (_("multiple parallel processing specifications"));
2223 field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8)
2224 + (reg_x << 6) + (reg_y << 4) + reg_n);
2225 break;
2226 case PDC:
2227 if (cond)
2228 as_bad (_("multiple condition specifications"));
2229 cond = opcode->nibbles[2] << 8;
2230 if (*op_end)
2231 goto skip_cond_check;
2232 break;
2233 case PPIC:
2234 if (field_b)
2235 as_bad (_("multiple parallel processing specifications"));
2236 field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8)
2237 + cond + (reg_x << 6) + (reg_y << 4) + reg_n);
2238 cond = 0;
2239 break;
2240 case PMUL:
2241 if (field_b)
2242 {
2243 if ((field_b & 0xef00) != 0xa100)
2244 as_bad (_("insn cannot be combined with pmuls"));
2245 field_b -= 0x8100;
2246 switch (field_b & 0xf)
2247 {
2248 case A_X0_NUM:
2249 field_b += 0 - A_X0_NUM;
2250 break;
2251 case A_Y0_NUM:
2252 field_b += 1 - A_Y0_NUM;
2253 break;
2254 case A_A0_NUM:
2255 field_b += 2 - A_A0_NUM;
2256 break;
2257 case A_A1_NUM:
2258 field_b += 3 - A_A1_NUM;
2259 break;
2260 default:
2261 as_bad (_("bad padd / psub pmuls output operand"));
2262 }
7dd04abd
JR
2263 /* Generate warning if the destination register for padd / psub
2264 and pmuls is the same ( only for A0 or A1 ).
2265 If the last nibble is 1010 then A0 is used in both
2266 padd / psub and pmuls. If it is 1111 then A1 is used
2267 as destination register in both padd / psub and pmuls. */
5db33d76
JR
2268
2269 if ((((field_b | reg_efg) & 0x000F) == 0x000A)
2270 || (((field_b | reg_efg) & 0x000F) == 0x000F))
2271 as_warn (_("destination register is same for parallel insns"));
d4845d57
JR
2272 }
2273 field_b += 0x4000 + reg_efg;
2274 break;
2275 default:
2276 abort ();
2277 }
2278 if (cond)
2279 {
2280 as_bad (_("condition not followed by conditionalizable insn"));
2281 cond = 0;
2282 }
2283 if (! *op_end)
2284 break;
2285 skip_cond_check:
2286 opcode = find_cooked_opcode (&op_end);
2287 if (opcode == NULL)
2288 {
2289 (as_bad
2290 (_("unrecognized characters at end of parallel processing insn")));
2291 break;
2292 }
2293 }
2294
2295 move_code = movx | movy;
2296 if (field_b)
2297 {
2298 /* Parallel processing insn. */
2299 unsigned long ppi_code = (movx | movy | 0xf800) << 16 | field_b;
2300
2301 output = frag_more (4);
0d10e182 2302 size = 4;
d4845d57
JR
2303 if (! target_big_endian)
2304 {
2305 output[3] = ppi_code >> 8;
2306 output[2] = ppi_code;
2307 }
2308 else
2309 {
2310 output[2] = ppi_code >> 8;
2311 output[3] = ppi_code;
2312 }
2313 move_code |= 0xf800;
2314 }
2315 else
0d10e182
JL
2316 {
2317 /* Just a double data transfer. */
2318 output = frag_more (2);
2319 size = 2;
2320 }
d4845d57
JR
2321 if (! target_big_endian)
2322 {
2323 output[1] = move_code >> 8;
2324 output[0] = move_code;
2325 }
2326 else
2327 {
2328 output[0] = move_code >> 8;
2329 output[1] = move_code;
2330 }
0d10e182 2331 return size;
d4845d57
JR
2332}
2333
2334/* This is the guts of the machine-dependent assembler. STR points to a
2335 machine dependent instruction. This function is supposed to emit
6b31947e 2336 the frags/bytes it assembles to. */
d4845d57
JR
2337
2338void
2339md_assemble (str)
2340 char *str;
2341{
2342 unsigned char *op_end;
2343 sh_operand_info operand[3];
2344 sh_opcode_info *opcode;
dda5ecfc 2345 unsigned int size = 0;
d4845d57 2346
324bfcf3
AO
2347#ifdef HAVE_SH64
2348 if (sh64_isa_mode == sh64_isa_shmedia)
2349 {
2350 shmedia_md_assemble (str);
2351 return;
2352 }
2353 else
2354 {
2355 /* If we've seen pseudo-directives, make sure any emitted data or
2356 frags are marked as data. */
2357 if (seen_insn == false)
2358 {
2359 sh64_update_contents_mark (true);
2360 sh64_set_contents_type (CRT_SH5_ISA16);
2361 }
2362
2363 seen_insn = true;
2364 }
2365#endif /* HAVE_SH64 */
2366
d4845d57
JR
2367 opcode = find_cooked_opcode (&str);
2368 op_end = str;
252b5132
RH
2369
2370 if (opcode == NULL)
2371 {
2372 as_bad (_("unknown opcode"));
2373 return;
2374 }
2375
2376 if (sh_relax
2377 && ! seg_info (now_seg)->tc_segment_info_data.in_code)
2378 {
2379 /* Output a CODE reloc to tell the linker that the following
2380 bytes are instructions, not data. */
2381 fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0,
2382 BFD_RELOC_SH_CODE);
2383 seg_info (now_seg)->tc_segment_info_data.in_code = 1;
2384 }
2385
d4845d57
JR
2386 if (opcode->nibbles[0] == PPI)
2387 {
0d10e182 2388 size = assemble_ppi (op_end, opcode);
252b5132
RH
2389 }
2390 else
2391 {
0d10e182
JL
2392 if (opcode->arg[0] == A_BDISP12
2393 || opcode->arg[0] == A_BDISP8)
252b5132 2394 {
0d10e182
JL
2395 parse_exp (op_end + 1, &operand[0]);
2396 build_relax (opcode, &operand[0]);
5fc44b2d
JR
2397 }
2398 else
2399 {
0d10e182
JL
2400 if (opcode->arg[0] == A_END)
2401 {
2402 /* Ignore trailing whitespace. If there is any, it has already
2403 been compressed to a single space. */
2404 if (*op_end == ' ')
2405 op_end++;
2406 }
2407 else
2408 {
2409 op_end = get_operands (opcode, op_end, operand);
2410 }
2411 opcode = get_specific (opcode, operand);
252b5132 2412
0d10e182
JL
2413 if (opcode == 0)
2414 {
2415 /* Couldn't find an opcode which matched the operands. */
2416 char *where = frag_more (2);
2417 size = 2;
252b5132 2418
0d10e182
JL
2419 where[0] = 0x0;
2420 where[1] = 0x0;
2421 as_bad (_("invalid operands for opcode"));
2422 }
2423 else
2424 {
2425 if (*op_end)
2426 as_bad (_("excess operands: '%s'"), op_end);
2427
2428 size = build_Mytes (opcode, operand);
2429 }
252b5132 2430 }
0d10e182 2431 }
252b5132 2432
2bc0a128 2433#ifdef BFD_ASSEMBLER
4dc7ead9 2434 dwarf2_emit_insn (size);
2bc0a128 2435#endif
252b5132
RH
2436}
2437
2438/* This routine is called each time a label definition is seen. It
2439 emits a BFD_RELOC_SH_LABEL reloc if necessary. */
2440
2441void
2442sh_frob_label ()
2443{
2444 static fragS *last_label_frag;
2445 static int last_label_offset;
2446
2447 if (sh_relax
2448 && seg_info (now_seg)->tc_segment_info_data.in_code)
2449 {
2450 int offset;
2451
2452 offset = frag_now_fix ();
2453 if (frag_now != last_label_frag
2454 || offset != last_label_offset)
c4aa876b 2455 {
252b5132
RH
2456 fix_new (frag_now, offset, 2, &abs_symbol, 0, 0, BFD_RELOC_SH_LABEL);
2457 last_label_frag = frag_now;
2458 last_label_offset = offset;
2459 }
2460 }
2461}
2462
2463/* This routine is called when the assembler is about to output some
2464 data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */
2465
2466void
2467sh_flush_pending_output ()
2468{
2469 if (sh_relax
2470 && seg_info (now_seg)->tc_segment_info_data.in_code)
2471 {
2472 fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0,
2473 BFD_RELOC_SH_DATA);
2474 seg_info (now_seg)->tc_segment_info_data.in_code = 0;
2475 }
2476}
2477
2478symbolS *
c0fecd35 2479md_undefined_symbol (name)
538cd60f 2480 char *name ATTRIBUTE_UNUSED;
252b5132
RH
2481{
2482 return 0;
2483}
2484
2485#ifdef OBJ_COFF
056350c6 2486#ifndef BFD_ASSEMBLER
252b5132
RH
2487
2488void
c0fecd35 2489tc_crawl_symbol_chain (headers)
cce5a618 2490 object_headers *headers ATTRIBUTE_UNUSED;
252b5132
RH
2491{
2492 printf (_("call to tc_crawl_symbol_chain \n"));
2493}
2494
2495void
c0fecd35 2496tc_headers_hook (headers)
cce5a618 2497 object_headers *headers ATTRIBUTE_UNUSED;
252b5132
RH
2498{
2499 printf (_("call to tc_headers_hook \n"));
2500}
2501
056350c6 2502#endif
252b5132
RH
2503#endif
2504
6b31947e
NC
2505/* Various routines to kill one day. */
2506/* Equal to MAX_PRECISION in atof-ieee.c. */
252b5132
RH
2507#define MAX_LITTLENUMS 6
2508
6b31947e
NC
2509/* Turn a string in input_line_pointer into a floating point constant
2510 of type TYPE, and store the appropriate bytes in *LITP. The number
2511 of LITTLENUMS emitted is stored in *SIZEP . An error message is
2512 returned, or NULL on OK. */
2513
252b5132
RH
2514char *
2515md_atof (type, litP, sizeP)
2516 int type;
2517 char *litP;
2518 int *sizeP;
2519{
2520 int prec;
2521 LITTLENUM_TYPE words[4];
2522 char *t;
2523 int i;
2524
2525 switch (type)
2526 {
2527 case 'f':
2528 prec = 2;
2529 break;
2530
2531 case 'd':
2532 prec = 4;
2533 break;
2534
2535 default:
2536 *sizeP = 0;
2537 return _("bad call to md_atof");
2538 }
2539
2540 t = atof_ieee (input_line_pointer, type, words);
2541 if (t)
2542 input_line_pointer = t;
2543
2544 *sizeP = prec * 2;
2545
2546 if (! target_big_endian)
2547 {
2548 for (i = prec - 1; i >= 0; i--)
2549 {
2550 md_number_to_chars (litP, (valueT) words[i], 2);
2551 litP += 2;
2552 }
2553 }
2554 else
2555 {
2556 for (i = 0; i < prec; i++)
2557 {
2558 md_number_to_chars (litP, (valueT) words[i], 2);
2559 litP += 2;
2560 }
2561 }
c4aa876b 2562
252b5132
RH
2563 return NULL;
2564}
2565
2566/* Handle the .uses pseudo-op. This pseudo-op is used just before a
2567 call instruction. It refers to a label of the instruction which
2568 loads the register which the call uses. We use it to generate a
2569 special reloc for the linker. */
2570
2571static void
2572s_uses (ignore)
43841e91 2573 int ignore ATTRIBUTE_UNUSED;
252b5132
RH
2574{
2575 expressionS ex;
2576
2577 if (! sh_relax)
2578 as_warn (_(".uses pseudo-op seen when not relaxing"));
2579
2580 expression (&ex);
2581
2582 if (ex.X_op != O_symbol || ex.X_add_number != 0)
2583 {
2584 as_bad (_("bad .uses format"));
2585 ignore_rest_of_line ();
2586 return;
2587 }
2588
2589 fix_new_exp (frag_now, frag_now_fix (), 2, &ex, 1, BFD_RELOC_SH_USES);
2590
2591 demand_empty_rest_of_line ();
2592}
2593\f
5a38dc70 2594const char *md_shortopts = "";
6b31947e
NC
2595struct option md_longopts[] =
2596{
252b5132 2597#define OPTION_RELAX (OPTION_MD_BASE)
05982cac
HPN
2598#define OPTION_BIG (OPTION_MD_BASE + 1)
2599#define OPTION_LITTLE (OPTION_BIG + 1)
252b5132 2600#define OPTION_SMALL (OPTION_LITTLE + 1)
d4845d57 2601#define OPTION_DSP (OPTION_SMALL + 1)
252b5132
RH
2602
2603 {"relax", no_argument, NULL, OPTION_RELAX},
05982cac 2604 {"big", no_argument, NULL, OPTION_BIG},
252b5132
RH
2605 {"little", no_argument, NULL, OPTION_LITTLE},
2606 {"small", no_argument, NULL, OPTION_SMALL},
d4845d57 2607 {"dsp", no_argument, NULL, OPTION_DSP},
324bfcf3
AO
2608#ifdef HAVE_SH64
2609#define OPTION_ISA (OPTION_DSP + 1)
2610#define OPTION_ABI (OPTION_ISA + 1)
2611#define OPTION_NO_MIX (OPTION_ABI + 1)
2612#define OPTION_SHCOMPACT_CONST_CRANGE (OPTION_NO_MIX + 1)
2613#define OPTION_NO_EXPAND (OPTION_SHCOMPACT_CONST_CRANGE + 1)
2614#define OPTION_PT32 (OPTION_NO_EXPAND + 1)
2615 {"isa", required_argument, NULL, OPTION_ISA},
2616 {"abi", required_argument, NULL, OPTION_ABI},
2617 {"no-mix", no_argument, NULL, OPTION_NO_MIX},
2618 {"shcompact-const-crange", no_argument, NULL, OPTION_SHCOMPACT_CONST_CRANGE},
2619 {"no-expand", no_argument, NULL, OPTION_NO_EXPAND},
2620 {"expand-pt32", no_argument, NULL, OPTION_PT32},
2621#endif /* HAVE_SH64 */
2622
252b5132
RH
2623 {NULL, no_argument, NULL, 0}
2624};
c4aa876b 2625size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH
2626
2627int
2628md_parse_option (c, arg)
2629 int c;
43841e91 2630 char *arg ATTRIBUTE_UNUSED;
252b5132
RH
2631{
2632 switch (c)
2633 {
2634 case OPTION_RELAX:
2635 sh_relax = 1;
2636 break;
2637
05982cac
HPN
2638 case OPTION_BIG:
2639 target_big_endian = 1;
2640 break;
2641
252b5132 2642 case OPTION_LITTLE:
252b5132
RH
2643 target_big_endian = 0;
2644 break;
2645
2646 case OPTION_SMALL:
2647 sh_small = 1;
2648 break;
2649
d4845d57
JR
2650 case OPTION_DSP:
2651 sh_dsp = 1;
2652 break;
2653
324bfcf3
AO
2654#ifdef HAVE_SH64
2655 case OPTION_ISA:
2656 if (strcasecmp (arg, "shmedia") == 0)
2657 {
2658 if (sh64_isa_mode == sh64_isa_shcompact)
2659 as_bad (_("Invalid combination: --isa=SHcompact with --isa=SHmedia"));
2660 sh64_isa_mode = sh64_isa_shmedia;
2661 }
2662 else if (strcasecmp (arg, "shcompact") == 0)
2663 {
2664 if (sh64_isa_mode == sh64_isa_shmedia)
2665 as_bad (_("Invalid combination: --isa=SHmedia with --isa=SHcompact"));
2666 if (sh64_abi == sh64_abi_64)
2667 as_bad (_("Invalid combination: --abi=64 with --isa=SHcompact"));
2668 sh64_isa_mode = sh64_isa_shcompact;
2669 }
2670 else
2671 as_bad ("Invalid argument to --isa option: %s", arg);
2672 break;
2673
2674 case OPTION_ABI:
2675 if (strcmp (arg, "32") == 0)
2676 {
2677 if (sh64_abi == sh64_abi_64)
2678 as_bad (_("Invalid combination: --abi=32 with --abi=64"));
2679 sh64_abi = sh64_abi_32;
2680 }
2681 else if (strcmp (arg, "64") == 0)
2682 {
2683 if (sh64_abi == sh64_abi_32)
2684 as_bad (_("Invalid combination: --abi=64 with --abi=32"));
2685 if (sh64_isa_mode == sh64_isa_shcompact)
2686 as_bad (_("Invalid combination: --isa=SHcompact with --abi=64"));
2687 sh64_abi = sh64_abi_64;
2688 }
2689 else
2690 as_bad ("Invalid argument to --abi option: %s", arg);
2691 break;
2692
2693 case OPTION_NO_MIX:
2694 sh64_mix = false;
2695 break;
2696
2697 case OPTION_SHCOMPACT_CONST_CRANGE:
2698 sh64_shcompact_const_crange = true;
2699 break;
2700
2701 case OPTION_NO_EXPAND:
2702 sh64_expand = false;
2703 break;
2704
2705 case OPTION_PT32:
2706 sh64_pt32 = true;
2707 break;
2708#endif /* HAVE_SH64 */
2709
252b5132
RH
2710 default:
2711 return 0;
2712 }
2713
2714 return 1;
2715}
2716
2717void
2718md_show_usage (stream)
2719 FILE *stream;
2720{
c4aa876b 2721 fprintf (stream, _("\
252b5132
RH
2722SH options:\n\
2723-little generate little endian code\n\
05982cac 2724-big generate big endian code\n\
252b5132 2725-relax alter jump instructions for long displacements\n\
5b8274e3 2726-small align sections to 4 byte boundaries, not 16\n\
182e89d3 2727-dsp enable sh-dsp insns, and disable sh3e / sh4 insns.\n"));
324bfcf3
AO
2728#ifdef HAVE_SH64
2729 fprintf (stream, _("\
2730-isa=[shmedia set default instruction set for SH64\n\
2731 | SHmedia\n\
2732 | shcompact\n\
2733 | SHcompact]\n\
2734-abi=[32|64] set size of expanded SHmedia operands and object\n\
2735 file type\n\
2736-shcompact-const-crange emit code-range descriptors for constants in\n\
2737 SHcompact code sections\n\
2738-no-mix disallow SHmedia code in the same section as\n\
2739 constants and SHcompact code\n\
2740-no-expand do not expand MOVI, PT, PTA or PTB instructions\n\
2741-expand-pt32 with -abi=64, expand PT, PTA and PTB instructions\n\
2742 to 32 bits only"));
2743#endif /* HAVE_SH64 */
252b5132
RH
2744}
2745\f
252b5132
RH
2746/* This struct is used to pass arguments to sh_count_relocs through
2747 bfd_map_over_sections. */
2748
2749struct sh_count_relocs
2750{
2751 /* Symbol we are looking for. */
2752 symbolS *sym;
2753 /* Count of relocs found. */
2754 int count;
2755};
2756
2757/* Count the number of fixups in a section which refer to a particular
2758 symbol. When using BFD_ASSEMBLER, this is called via
2759 bfd_map_over_sections. */
2760
252b5132
RH
2761static void
2762sh_count_relocs (abfd, sec, data)
43841e91 2763 bfd *abfd ATTRIBUTE_UNUSED;
252b5132
RH
2764 segT sec;
2765 PTR data;
2766{
2767 struct sh_count_relocs *info = (struct sh_count_relocs *) data;
2768 segment_info_type *seginfo;
2769 symbolS *sym;
2770 fixS *fix;
2771
2772 seginfo = seg_info (sec);
2773 if (seginfo == NULL)
2774 return;
2775
2776 sym = info->sym;
2777 for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next)
2778 {
2779 if (fix->fx_addsy == sym)
2780 {
2781 ++info->count;
2782 fix->fx_tcbit = 1;
2783 }
2784 }
2785}
2786
2787/* Handle the count relocs for a particular section. When using
2788 BFD_ASSEMBLER, this is called via bfd_map_over_sections. */
2789
252b5132
RH
2790static void
2791sh_frob_section (abfd, sec, ignore)
43841e91 2792 bfd *abfd ATTRIBUTE_UNUSED;
252b5132 2793 segT sec;
43841e91 2794 PTR ignore ATTRIBUTE_UNUSED;
252b5132
RH
2795{
2796 segment_info_type *seginfo;
2797 fixS *fix;
2798
2799 seginfo = seg_info (sec);
2800 if (seginfo == NULL)
2801 return;
2802
2803 for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next)
2804 {
2805 symbolS *sym;
2806 bfd_vma val;
2807 fixS *fscan;
2808 struct sh_count_relocs info;
2809
2810 if (fix->fx_r_type != BFD_RELOC_SH_USES)
2811 continue;
2812
2813 /* The BFD_RELOC_SH_USES reloc should refer to a defined local
2814 symbol in the same section. */
2815 sym = fix->fx_addsy;
2816 if (sym == NULL
2817 || fix->fx_subsy != NULL
2818 || fix->fx_addnumber != 0
2819 || S_GET_SEGMENT (sym) != sec
2820#if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF)
2821 || S_GET_STORAGE_CLASS (sym) == C_EXT
2822#endif
2823 || S_IS_EXTERNAL (sym))
2824 {
2825 as_warn_where (fix->fx_file, fix->fx_line,
2826 _(".uses does not refer to a local symbol in the same section"));
2827 continue;
2828 }
2829
2830 /* Look through the fixups again, this time looking for one
2831 at the same location as sym. */
2832 val = S_GET_VALUE (sym);
2833 for (fscan = seginfo->fix_root;
2834 fscan != NULL;
2835 fscan = fscan->fx_next)
2836 if (val == fscan->fx_frag->fr_address + fscan->fx_where
2837 && fscan->fx_r_type != BFD_RELOC_SH_ALIGN
2838 && fscan->fx_r_type != BFD_RELOC_SH_CODE
2839 && fscan->fx_r_type != BFD_RELOC_SH_DATA
2840 && fscan->fx_r_type != BFD_RELOC_SH_LABEL)
2841 break;
2842 if (fscan == NULL)
2843 {
2844 as_warn_where (fix->fx_file, fix->fx_line,
2845 _("can't find fixup pointed to by .uses"));
2846 continue;
2847 }
2848
2849 if (fscan->fx_tcbit)
2850 {
2851 /* We've already done this one. */
2852 continue;
2853 }
2854
6b31947e
NC
2855 /* The variable fscan should also be a fixup to a local symbol
2856 in the same section. */
252b5132
RH
2857 sym = fscan->fx_addsy;
2858 if (sym == NULL
2859 || fscan->fx_subsy != NULL
2860 || fscan->fx_addnumber != 0
2861 || S_GET_SEGMENT (sym) != sec
2862#if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF)
2863 || S_GET_STORAGE_CLASS (sym) == C_EXT
2864#endif
2865 || S_IS_EXTERNAL (sym))
2866 {
2867 as_warn_where (fix->fx_file, fix->fx_line,
2868 _(".uses target does not refer to a local symbol in the same section"));
2869 continue;
2870 }
2871
2872 /* Now we look through all the fixups of all the sections,
2873 counting the number of times we find a reference to sym. */
2874 info.sym = sym;
2875 info.count = 0;
2876#ifdef BFD_ASSEMBLER
2877 bfd_map_over_sections (stdoutput, sh_count_relocs, (PTR) &info);
2878#else
2879 {
2880 int iscan;
2881
2882 for (iscan = SEG_E0; iscan < SEG_UNKNOWN; iscan++)
2883 sh_count_relocs ((bfd *) NULL, iscan, (PTR) &info);
2884 }
2885#endif
2886
2887 if (info.count < 1)
2888 abort ();
2889
2890 /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym.
2891 We have already adjusted the value of sym to include the
2892 fragment address, so we undo that adjustment here. */
2893 subseg_change (sec, 0);
7bcad3e5
NC
2894 fix_new (fscan->fx_frag,
2895 S_GET_VALUE (sym) - fscan->fx_frag->fr_address,
252b5132
RH
2896 4, &abs_symbol, info.count, 0, BFD_RELOC_SH_COUNT);
2897 }
2898}
2899
2900/* This function is called after the symbol table has been completed,
2901 but before the relocs or section contents have been written out.
2902 If we have seen any .uses pseudo-ops, they point to an instruction
2903 which loads a register with the address of a function. We look
2904 through the fixups to find where the function address is being
2905 loaded from. We then generate a COUNT reloc giving the number of
2906 times that function address is referred to. The linker uses this
2907 information when doing relaxing, to decide when it can eliminate
2908 the stored function address entirely. */
2909
2910void
2911sh_frob_file ()
2912{
324bfcf3
AO
2913#ifdef HAVE_SH64
2914 shmedia_frob_file_before_adjust ();
2915#endif
2916
252b5132
RH
2917 if (! sh_relax)
2918 return;
2919
2920#ifdef BFD_ASSEMBLER
2921 bfd_map_over_sections (stdoutput, sh_frob_section, (PTR) NULL);
2922#else
2923 {
2924 int iseg;
2925
2926 for (iseg = SEG_E0; iseg < SEG_UNKNOWN; iseg++)
2927 sh_frob_section ((bfd *) NULL, iseg, (PTR) NULL);
2928 }
2929#endif
2930}
2931
2932/* Called after relaxing. Set the correct sizes of the fragments, and
94f592af 2933 create relocs so that md_apply_fix3 will fill in the correct values. */
252b5132
RH
2934
2935void
2936md_convert_frag (headers, seg, fragP)
2937#ifdef BFD_ASSEMBLER
43841e91 2938 bfd *headers ATTRIBUTE_UNUSED;
252b5132 2939#else
cce5a618 2940 object_headers *headers ATTRIBUTE_UNUSED;
252b5132
RH
2941#endif
2942 segT seg;
2943 fragS *fragP;
2944{
2945 int donerelax = 0;
2946
2947 switch (fragP->fr_subtype)
2948 {
2949 case C (COND_JUMP, COND8):
2950 case C (COND_JUMP_DELAY, COND8):
2951 subseg_change (seg, 0);
2952 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset,
2953 1, BFD_RELOC_SH_PCDISP8BY2);
2954 fragP->fr_fix += 2;
2955 fragP->fr_var = 0;
2956 break;
2957
2958 case C (UNCOND_JUMP, UNCOND12):
2959 subseg_change (seg, 0);
2960 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset,
2961 1, BFD_RELOC_SH_PCDISP12BY2);
2962 fragP->fr_fix += 2;
2963 fragP->fr_var = 0;
2964 break;
2965
2966 case C (UNCOND_JUMP, UNCOND32):
2967 case C (UNCOND_JUMP, UNDEF_WORD_DISP):
2968 if (fragP->fr_symbol == NULL)
99b222b4
HPN
2969 as_bad_where (fragP->fr_file, fragP->fr_line,
2970 _("displacement overflows 12-bit field"));
252b5132 2971 else if (S_IS_DEFINED (fragP->fr_symbol))
99b222b4
HPN
2972 as_bad_where (fragP->fr_file, fragP->fr_line,
2973 _("displacement to defined symbol %s overflows 12-bit field"),
2974 S_GET_NAME (fragP->fr_symbol));
252b5132 2975 else
99b222b4
HPN
2976 as_bad_where (fragP->fr_file, fragP->fr_line,
2977 _("displacement to undefined symbol %s overflows 12-bit field"),
2978 S_GET_NAME (fragP->fr_symbol));
2979 /* Stabilize this frag, so we don't trip an assert. */
2980 fragP->fr_fix += fragP->fr_var;
2981 fragP->fr_var = 0;
252b5132
RH
2982 break;
2983
2984 case C (COND_JUMP, COND12):
2985 case C (COND_JUMP_DELAY, COND12):
6b31947e 2986 /* A bcond won't fit, so turn it into a b!cond; bra disp; nop. */
252b5132
RH
2987 /* I found that a relax failure for gcc.c-torture/execute/930628-1.c
2988 was due to gas incorrectly relaxing an out-of-range conditional
2989 branch with delay slot. It turned:
2990 bf.s L6 (slot mov.l r12,@(44,r0))
2991 into:
c4aa876b 2992
252b5132
RH
29932c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6)
299430: 00 09 nop
299532: 10 cb mov.l r12,@(44,r0)
2996 Therefore, branches with delay slots have to be handled
2997 differently from ones without delay slots. */
2998 {
2999 unsigned char *buffer =
3000 (unsigned char *) (fragP->fr_fix + fragP->fr_literal);
3001 int highbyte = target_big_endian ? 0 : 1;
3002 int lowbyte = target_big_endian ? 1 : 0;
3003 int delay = fragP->fr_subtype == C (COND_JUMP_DELAY, COND12);
3004
3005 /* Toggle the true/false bit of the bcond. */
3006 buffer[highbyte] ^= 0x2;
3007
d3ecfc59 3008 /* If this is a delayed branch, we may not put the bra in the
252b5132
RH
3009 slot. So we change it to a non-delayed branch, like that:
3010 b! cond slot_label; bra disp; slot_label: slot_insn
3011 ??? We should try if swapping the conditional branch and
3012 its delay-slot insn already makes the branch reach. */
3013
3014 /* Build a relocation to six / four bytes farther on. */
3015 subseg_change (seg, 0);
3016 fix_new (fragP, fragP->fr_fix, 2,
3017#ifdef BFD_ASSEMBLER
3018 section_symbol (seg),
3019#else
3020 seg_info (seg)->dot,
3021#endif
3022 fragP->fr_address + fragP->fr_fix + (delay ? 4 : 6),
3023 1, BFD_RELOC_SH_PCDISP8BY2);
3024
3025 /* Set up a jump instruction. */
3026 buffer[highbyte + 2] = 0xa0;
3027 buffer[lowbyte + 2] = 0;
3028 fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol,
3029 fragP->fr_offset, 1, BFD_RELOC_SH_PCDISP12BY2);
3030
3031 if (delay)
3032 {
3033 buffer[highbyte] &= ~0x4; /* Removes delay slot from branch. */
3034 fragP->fr_fix += 4;
3035 }
3036 else
3037 {
3038 /* Fill in a NOP instruction. */
3039 buffer[highbyte + 4] = 0x0;
3040 buffer[lowbyte + 4] = 0x9;
3041
3042 fragP->fr_fix += 6;
3043 }
3044 fragP->fr_var = 0;
3045 donerelax = 1;
3046 }
3047 break;
3048
3049 case C (COND_JUMP, COND32):
3050 case C (COND_JUMP_DELAY, COND32):
3051 case C (COND_JUMP, UNDEF_WORD_DISP):
3052 case C (COND_JUMP_DELAY, UNDEF_WORD_DISP):
3053 if (fragP->fr_symbol == NULL)
99b222b4
HPN
3054 as_bad_where (fragP->fr_file, fragP->fr_line,
3055 _("displacement overflows 8-bit field"));
252b5132 3056 else if (S_IS_DEFINED (fragP->fr_symbol))
99b222b4
HPN
3057 as_bad_where (fragP->fr_file, fragP->fr_line,
3058 _("displacement to defined symbol %s overflows 8-bit field"),
3059 S_GET_NAME (fragP->fr_symbol));
252b5132 3060 else
99b222b4
HPN
3061 as_bad_where (fragP->fr_file, fragP->fr_line,
3062 _("displacement to undefined symbol %s overflows 8-bit field "),
3063 S_GET_NAME (fragP->fr_symbol));
3064 /* Stabilize this frag, so we don't trip an assert. */
3065 fragP->fr_fix += fragP->fr_var;
3066 fragP->fr_var = 0;
252b5132
RH
3067 break;
3068
3069 default:
324bfcf3
AO
3070#ifdef HAVE_SH64
3071 shmedia_md_convert_frag (headers, seg, fragP, true);
3072#else
252b5132 3073 abort ();
324bfcf3 3074#endif
252b5132
RH
3075 }
3076
3077 if (donerelax && !sh_relax)
3078 as_warn_where (fragP->fr_file, fragP->fr_line,
3079 _("overflow in branch to %s; converted into longer instruction sequence"),
3080 (fragP->fr_symbol != NULL
3081 ? S_GET_NAME (fragP->fr_symbol)
3082 : ""));
3083}
3084
3085valueT
c0fecd35 3086md_section_align (seg, size)
dda5ecfc 3087 segT seg ATTRIBUTE_UNUSED;
c0fecd35 3088 valueT size;
252b5132
RH
3089{
3090#ifdef BFD_ASSEMBLER
3091#ifdef OBJ_ELF
3092 return size;
3093#else /* ! OBJ_ELF */
3094 return ((size + (1 << bfd_get_section_alignment (stdoutput, seg)) - 1)
3095 & (-1 << bfd_get_section_alignment (stdoutput, seg)));
3096#endif /* ! OBJ_ELF */
3097#else /* ! BFD_ASSEMBLER */
3098 return ((size + (1 << section_alignment[(int) seg]) - 1)
3099 & (-1 << section_alignment[(int) seg]));
3100#endif /* ! BFD_ASSEMBLER */
3101}
3102
3103/* This static variable is set by s_uacons to tell sh_cons_align that
3104 the expession does not need to be aligned. */
3105
3106static int sh_no_align_cons = 0;
3107
3108/* This handles the unaligned space allocation pseudo-ops, such as
3109 .uaword. .uaword is just like .word, but the value does not need
3110 to be aligned. */
3111
3112static void
3113s_uacons (bytes)
3114 int bytes;
3115{
3116 /* Tell sh_cons_align not to align this value. */
3117 sh_no_align_cons = 1;
3118 cons (bytes);
3119}
3120
3121/* If a .word, et. al., pseud-op is seen, warn if the value is not
3122 aligned correctly. Note that this can cause warnings to be issued
3123 when assembling initialized structured which were declared with the
3124 packed attribute. FIXME: Perhaps we should require an option to
3125 enable this warning? */
3126
3127void
3128sh_cons_align (nbytes)
3129 int nbytes;
3130{
3131 int nalign;
3132 char *p;
3133
3134 if (sh_no_align_cons)
3135 {
3136 /* This is an unaligned pseudo-op. */
3137 sh_no_align_cons = 0;
3138 return;
3139 }
3140
3141 nalign = 0;
3142 while ((nbytes & 1) == 0)
3143 {
3144 ++nalign;
3145 nbytes >>= 1;
3146 }
3147
3148 if (nalign == 0)
3149 return;
3150
3151 if (now_seg == absolute_section)
3152 {
3153 if ((abs_section_offset & ((1 << nalign) - 1)) != 0)
3154 as_warn (_("misaligned data"));
3155 return;
3156 }
3157
0a9ef439 3158 p = frag_var (rs_align_test, 1, 1, (relax_substateT) 0,
252b5132
RH
3159 (symbolS *) NULL, (offsetT) nalign, (char *) NULL);
3160
3161 record_alignment (now_seg, nalign);
3162}
3163
3164/* When relaxing, we need to output a reloc for any .align directive
3165 that requests alignment to a four byte boundary or larger. This is
3166 also where we check for misaligned data. */
3167
3168void
3169sh_handle_align (frag)
3170 fragS *frag;
3171{
0a9ef439
RH
3172 int bytes = frag->fr_next->fr_address - frag->fr_address - frag->fr_fix;
3173
3174 if (frag->fr_type == rs_align_code)
3175 {
3176 static const unsigned char big_nop_pattern[] = { 0x00, 0x09 };
3177 static const unsigned char little_nop_pattern[] = { 0x09, 0x00 };
3178
3179 char *p = frag->fr_literal + frag->fr_fix;
3180
3181 if (bytes & 1)
3182 {
3183 *p++ = 0;
3184 bytes--;
3185 frag->fr_fix += 1;
3186 }
3187
3188 if (target_big_endian)
3189 {
3190 memcpy (p, big_nop_pattern, sizeof big_nop_pattern);
3191 frag->fr_var = sizeof big_nop_pattern;
3192 }
3193 else
3194 {
3195 memcpy (p, little_nop_pattern, sizeof little_nop_pattern);
3196 frag->fr_var = sizeof little_nop_pattern;
3197 }
3198 }
3199 else if (frag->fr_type == rs_align_test)
3200 {
3201 if (bytes != 0)
3202 as_warn_where (frag->fr_file, frag->fr_line, _("misaligned data"));
3203 }
3204
252b5132 3205 if (sh_relax
0a9ef439
RH
3206 && (frag->fr_type == rs_align
3207 || frag->fr_type == rs_align_code)
252b5132
RH
3208 && frag->fr_address + frag->fr_fix > 0
3209 && frag->fr_offset > 1
3210 && now_seg != bss_section)
3211 fix_new (frag, frag->fr_fix, 2, &abs_symbol, frag->fr_offset, 0,
3212 BFD_RELOC_SH_ALIGN);
252b5132
RH
3213}
3214
28602ebf
KK
3215/* See whether the relocation should be resolved locally. */
3216
3217static boolean
3218sh_local_pcrel (fix)
3219 fixS *fix;
3220{
3221 return (! sh_relax &&
3222 (fix->fx_r_type == BFD_RELOC_SH_PCDISP8BY2
3223 || fix->fx_r_type == BFD_RELOC_SH_PCDISP12BY2
3224 || fix->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY2
3225 || fix->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY4
3226 || fix->fx_r_type == BFD_RELOC_8_PCREL
3227 || fix->fx_r_type == BFD_RELOC_SH_SWITCH16
3228 || fix->fx_r_type == BFD_RELOC_SH_SWITCH32));
3229}
3230
252b5132
RH
3231/* See whether we need to force a relocation into the output file.
3232 This is used to force out switch and PC relative relocations when
3233 relaxing. */
3234
3235int
3236sh_force_relocation (fix)
3237 fixS *fix;
3238{
8ba4dac0
DJ
3239 /* These relocations can't make it into a DSO, so no use forcing
3240 them for global symbols. */
28602ebf 3241 if (sh_local_pcrel (fix))
8ba4dac0
DJ
3242 return 0;
3243
252b5132 3244 if (fix->fx_r_type == BFD_RELOC_VTABLE_INHERIT
015551fc
JR
3245 || fix->fx_r_type == BFD_RELOC_VTABLE_ENTRY
3246 || fix->fx_r_type == BFD_RELOC_SH_LOOP_START
a161fe53
AM
3247 || fix->fx_r_type == BFD_RELOC_SH_LOOP_END
3248 || S_FORCE_RELOC (fix->fx_addsy))
252b5132
RH
3249 return 1;
3250
3251 if (! sh_relax)
3252 return 0;
3253
3254 return (fix->fx_pcrel
3255 || SWITCH_TABLE (fix)
3256 || fix->fx_r_type == BFD_RELOC_SH_COUNT
3257 || fix->fx_r_type == BFD_RELOC_SH_ALIGN
3258 || fix->fx_r_type == BFD_RELOC_SH_CODE
3259 || fix->fx_r_type == BFD_RELOC_SH_DATA
324bfcf3
AO
3260#ifdef HAVE_SH64
3261 || fix->fx_r_type == BFD_RELOC_SH_SHMEDIA_CODE
3262#endif
252b5132
RH
3263 || fix->fx_r_type == BFD_RELOC_SH_LABEL);
3264}
3265
3266#ifdef OBJ_ELF
3267boolean
3268sh_fix_adjustable (fixP)
3269 fixS *fixP;
3270{
a161fe53
AM
3271 if (fixP->fx_r_type == BFD_RELOC_32_PLT_PCREL
3272 || fixP->fx_r_type == BFD_RELOC_32_GOT_PCREL
3273 || fixP->fx_r_type == BFD_RELOC_SH_GOTPC
a1cc9221
AO
3274 || fixP->fx_r_type == BFD_RELOC_RVA)
3275 return 0;
3276
252b5132
RH
3277 /* We need the symbol name for the VTABLE entries */
3278 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
3279 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
3280 return 0;
3281
3282 return 1;
3283}
d4845d57 3284
6b31947e
NC
3285void
3286sh_elf_final_processing ()
d4845d57
JR
3287{
3288 int val;
3289
3290 /* Set file-specific flags to indicate if this code needs
3291 a processor with the sh-dsp / sh3e ISA to execute. */
324bfcf3
AO
3292#ifdef HAVE_SH64
3293 /* SH5 and above don't know about the valid_arch arch_sh* bits defined
3294 in sh-opc.h, so check SH64 mode before checking valid_arch. */
3295 if (sh64_isa_mode != sh64_isa_unspecified)
3296 val = EF_SH5;
3297 else
3298#endif /* HAVE_SH64 */
d4845d57
JR
3299 if (valid_arch & arch_sh1)
3300 val = EF_SH1;
3301 else if (valid_arch & arch_sh2)
3302 val = EF_SH2;
3303 else if (valid_arch & arch_sh_dsp)
3304 val = EF_SH_DSP;
3305 else if (valid_arch & arch_sh3)
3306 val = EF_SH3;
3307 else if (valid_arch & arch_sh3_dsp)
3308 val = EF_SH_DSP;
3309 else if (valid_arch & arch_sh3e)
3310 val = EF_SH3E;
3311 else if (valid_arch & arch_sh4)
3312 val = EF_SH4;
3313 else
3314 abort ();
3315
3316 elf_elfheader (stdoutput)->e_flags &= ~EF_SH_MACH_MASK;
3317 elf_elfheader (stdoutput)->e_flags |= val;
3318}
252b5132
RH
3319#endif
3320
3321/* Apply a fixup to the object file. */
3322
252b5132 3323void
94f592af
NC
3324md_apply_fix3 (fixP, valP, seg)
3325 fixS * fixP;
3326 valueT * valP;
3327 segT seg ATTRIBUTE_UNUSED;
252b5132
RH
3328{
3329 char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
3330 int lowbyte = target_big_endian ? 1 : 0;
3331 int highbyte = target_big_endian ? 0 : 1;
2ed5f585 3332 long val = (long) *valP;
252b5132
RH
3333 long max, min;
3334 int shift;
3335
3336#ifdef BFD_ASSEMBLER
a1cc9221
AO
3337 /* A difference between two symbols, the second of which is in the
3338 current section, is transformed in a PC-relative relocation to
3339 the other symbol. We have to adjust the relocation type here. */
3340 if (fixP->fx_pcrel)
3341 {
3342 switch (fixP->fx_r_type)
3343 {
3344 default:
3345 break;
3346
3347 case BFD_RELOC_32:
3348 fixP->fx_r_type = BFD_RELOC_32_PCREL;
3349 break;
3350
3351 /* Currently, we only support 32-bit PCREL relocations.
3352 We'd need a new reloc type to handle 16_PCREL, and
3353 8_PCREL is already taken for R_SH_SWITCH8, which
3354 apparently does something completely different than what
3355 we need. FIXME. */
3356 case BFD_RELOC_16:
3357 bfd_set_error (bfd_error_bad_value);
94f592af 3358 return;
81d4177b 3359
a1cc9221
AO
3360 case BFD_RELOC_8:
3361 bfd_set_error (bfd_error_bad_value);
94f592af 3362 return;
a1cc9221
AO
3363 }
3364 }
3365
6b31947e
NC
3366 /* The function adjust_reloc_syms won't convert a reloc against a weak
3367 symbol into a reloc against a section, but bfd_install_relocation
3368 will screw up if the symbol is defined, so we have to adjust val here
1308f14c
HPN
3369 to avoid the screw up later.
3370
3371 For ordinary relocs, this does not happen for ELF, since for ELF,
3372 bfd_install_relocation uses the "special function" field of the
3373 howto, and does not execute the code that needs to be undone, as long
3374 as the special function does not return bfd_reloc_continue.
3375 It can happen for GOT- and PLT-type relocs the way they are
3376 described in elf32-sh.c as they use bfd_elf_generic_reloc, but it
3377 doesn't matter here since those relocs don't use VAL; see below. */
3378 if (OUTPUT_FLAVOR != bfd_target_elf_flavour
3379 && fixP->fx_addsy != NULL
252b5132
RH
3380 && S_IS_WEAK (fixP->fx_addsy))
3381 val -= S_GET_VALUE (fixP->fx_addsy);
3382#endif
3383
3384#ifndef BFD_ASSEMBLER
3385 if (fixP->fx_r_type == 0)
3386 {
3387 if (fixP->fx_size == 2)
3388 fixP->fx_r_type = BFD_RELOC_16;
3389 else if (fixP->fx_size == 4)
3390 fixP->fx_r_type = BFD_RELOC_32;
3391 else if (fixP->fx_size == 1)
3392 fixP->fx_r_type = BFD_RELOC_8;
3393 else
3394 abort ();
3395 }
3396#endif
3397
3398 max = min = 0;
3399 shift = 0;
3400 switch (fixP->fx_r_type)
3401 {
3402 case BFD_RELOC_SH_IMM4:
3403 max = 0xf;
3404 *buf = (*buf & 0xf0) | (val & 0xf);
3405 break;
3406
3407 case BFD_RELOC_SH_IMM4BY2:
3408 max = 0xf;
3409 shift = 1;
3410 *buf = (*buf & 0xf0) | ((val >> 1) & 0xf);
3411 break;
3412
3413 case BFD_RELOC_SH_IMM4BY4:
3414 max = 0xf;
3415 shift = 2;
3416 *buf = (*buf & 0xf0) | ((val >> 2) & 0xf);
3417 break;
3418
3419 case BFD_RELOC_SH_IMM8BY2:
3420 max = 0xff;
3421 shift = 1;
3422 *buf = val >> 1;
3423 break;
3424
3425 case BFD_RELOC_SH_IMM8BY4:
3426 max = 0xff;
3427 shift = 2;
3428 *buf = val >> 2;
3429 break;
3430
3431 case BFD_RELOC_8:
3432 case BFD_RELOC_SH_IMM8:
3433 /* Sometimes the 8 bit value is sign extended (e.g., add) and
3434 sometimes it is not (e.g., and). We permit any 8 bit value.
3435 Note that adding further restrictions may invalidate
3436 reasonable looking assembly code, such as ``and -0x1,r0''. */
3437 max = 0xff;
c4aa876b 3438 min = -0xff;
252b5132
RH
3439 *buf++ = val;
3440 break;
3441
3442 case BFD_RELOC_SH_PCRELIMM8BY4:
3443 /* The lower two bits of the PC are cleared before the
3444 displacement is added in. We can assume that the destination
3445 is on a 4 byte bounday. If this instruction is also on a 4
3446 byte boundary, then we want
3447 (target - here) / 4
3448 and target - here is a multiple of 4.
3449 Otherwise, we are on a 2 byte boundary, and we want
3450 (target - (here - 2)) / 4
3451 and target - here is not a multiple of 4. Computing
3452 (target - (here - 2)) / 4 == (target - here + 2) / 4
3453 works for both cases, since in the first case the addition of
3454 2 will be removed by the division. target - here is in the
3455 variable val. */
3456 val = (val + 2) / 4;
3457 if (val & ~0xff)
3458 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far"));
3459 buf[lowbyte] = val;
3460 break;
3461
3462 case BFD_RELOC_SH_PCRELIMM8BY2:
3463 val /= 2;
3464 if (val & ~0xff)
3465 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far"));
3466 buf[lowbyte] = val;
3467 break;
3468
3469 case BFD_RELOC_SH_PCDISP8BY2:
3470 val /= 2;
3471 if (val < -0x80 || val > 0x7f)
3472 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far"));
3473 buf[lowbyte] = val;
3474 break;
3475
3476 case BFD_RELOC_SH_PCDISP12BY2:
3477 val /= 2;
8637c045 3478 if (val < -0x800 || val > 0x7ff)
252b5132
RH
3479 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far"));
3480 buf[lowbyte] = val & 0xff;
3481 buf[highbyte] |= (val >> 8) & 0xf;
3482 break;
3483
3484 case BFD_RELOC_32:
a1cc9221 3485 case BFD_RELOC_32_PCREL:
1db77c8e 3486 md_number_to_chars (buf, val, 4);
252b5132
RH
3487 break;
3488
3489 case BFD_RELOC_16:
1db77c8e 3490 md_number_to_chars (buf, val, 2);
252b5132
RH
3491 break;
3492
3493 case BFD_RELOC_SH_USES:
3494 /* Pass the value into sh_coff_reloc_mangle. */
3495 fixP->fx_addnumber = val;
3496 break;
3497
3498 case BFD_RELOC_SH_COUNT:
3499 case BFD_RELOC_SH_ALIGN:
3500 case BFD_RELOC_SH_CODE:
3501 case BFD_RELOC_SH_DATA:
3502 case BFD_RELOC_SH_LABEL:
3503 /* Nothing to do here. */
3504 break;
3505
015551fc
JR
3506 case BFD_RELOC_SH_LOOP_START:
3507 case BFD_RELOC_SH_LOOP_END:
3508
252b5132
RH
3509 case BFD_RELOC_VTABLE_INHERIT:
3510 case BFD_RELOC_VTABLE_ENTRY:
3511 fixP->fx_done = 0;
3512 return;
3513
a1cc9221
AO
3514#ifdef OBJ_ELF
3515 case BFD_RELOC_32_PLT_PCREL:
3516 /* Make the jump instruction point to the address of the operand. At
81d4177b 3517 runtime we merely add the offset to the actual PLT entry. */
94f592af 3518 * valP = 0xfffffffc;
a161fe53 3519 val = 0;
ac3f04d7
AO
3520 if (fixP->fx_subsy)
3521 val -= S_GET_VALUE (fixP->fx_subsy);
a161fe53 3522 fixP->fx_addnumber = val;
538cd60f 3523 md_number_to_chars (buf, val, 4);
a1cc9221
AO
3524 break;
3525
3526 case BFD_RELOC_SH_GOTPC:
3527 /* This is tough to explain. We end up with this one if we have
3528 operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]".
3529 The goal here is to obtain the absolute address of the GOT,
3530 and it is strongly preferable from a performance point of
3531 view to avoid using a runtime relocation for this. There are
3532 cases where you have something like:
81d4177b 3533
a1cc9221 3534 .long _GLOBAL_OFFSET_TABLE_+[.-.L66]
81d4177b 3535
a1cc9221
AO
3536 and here no correction would be required. Internally in the
3537 assembler we treat operands of this form as not being pcrel
3538 since the '.' is explicitly mentioned, and I wonder whether
3539 it would simplify matters to do it this way. Who knows. In
3540 earlier versions of the PIC patches, the pcrel_adjust field
3541 was used to store the correction, but since the expression is
3542 not pcrel, I felt it would be confusing to do it this way. */
94f592af 3543 * valP -= 1;
a1cc9221
AO
3544 md_number_to_chars (buf, val, 4);
3545 break;
3546
3547 case BFD_RELOC_32_GOT_PCREL:
324bfcf3 3548 case BFD_RELOC_SH_GOTPLT32:
94f592af 3549 * valP = 0; /* Fully resolved at runtime. No addend. */
a1cc9221
AO
3550 md_number_to_chars (buf, 0, 4);
3551 break;
3552
3553 case BFD_RELOC_32_GOTOFF:
538cd60f 3554 md_number_to_chars (buf, val, 4);
a1cc9221
AO
3555 break;
3556#endif
3557
252b5132 3558 default:
324bfcf3
AO
3559#ifdef HAVE_SH64
3560 shmedia_md_apply_fix3 (fixP, valP);
3561 return;
3562#else
252b5132 3563 abort ();
324bfcf3 3564#endif
252b5132
RH
3565 }
3566
3567 if (shift != 0)
3568 {
3569 if ((val & ((1 << shift) - 1)) != 0)
3570 as_bad_where (fixP->fx_file, fixP->fx_line, _("misaligned offset"));
3571 if (val >= 0)
3572 val >>= shift;
3573 else
3574 val = ((val >> shift)
3575 | ((long) -1 & ~ ((long) -1 >> shift)));
3576 }
3577 if (max != 0 && (val < min || val > max))
3578 as_bad_where (fixP->fx_file, fixP->fx_line, _("offset out of range"));
3579
94f592af
NC
3580 if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0)
3581 fixP->fx_done = 1;
252b5132
RH
3582}
3583
3584/* Called just before address relaxation. Return the length
3585 by which a fragment must grow to reach it's destination. */
3586
3587int
3588md_estimate_size_before_relax (fragP, segment_type)
3589 register fragS *fragP;
3590 register segT segment_type;
3591{
e66457fb
AM
3592 int what;
3593
252b5132
RH
3594 switch (fragP->fr_subtype)
3595 {
93c2a809 3596 default:
324bfcf3
AO
3597#ifdef HAVE_SH64
3598 return shmedia_md_estimate_size_before_relax (fragP, segment_type);
3599#else
93c2a809 3600 abort ();
324bfcf3
AO
3601#endif
3602
93c2a809 3603
252b5132 3604 case C (UNCOND_JUMP, UNDEF_DISP):
6b31947e 3605 /* Used to be a branch to somewhere which was unknown. */
252b5132
RH
3606 if (!fragP->fr_symbol)
3607 {
3608 fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12);
252b5132
RH
3609 }
3610 else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type)
3611 {
3612 fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12);
252b5132
RH
3613 }
3614 else
3615 {
3616 fragP->fr_subtype = C (UNCOND_JUMP, UNDEF_WORD_DISP);
252b5132
RH
3617 }
3618 break;
3619
252b5132
RH
3620 case C (COND_JUMP, UNDEF_DISP):
3621 case C (COND_JUMP_DELAY, UNDEF_DISP):
e66457fb 3622 what = GET_WHAT (fragP->fr_subtype);
6b31947e 3623 /* Used to be a branch to somewhere which was unknown. */
252b5132
RH
3624 if (fragP->fr_symbol
3625 && S_GET_SEGMENT (fragP->fr_symbol) == segment_type)
3626 {
252b5132 3627 /* Got a symbol and it's defined in this segment, become byte
6b31947e 3628 sized - maybe it will fix up. */
252b5132 3629 fragP->fr_subtype = C (what, COND8);
252b5132
RH
3630 }
3631 else if (fragP->fr_symbol)
3632 {
6b31947e 3633 /* Its got a segment, but its not ours, so it will always be long. */
252b5132 3634 fragP->fr_subtype = C (what, UNDEF_WORD_DISP);
252b5132
RH
3635 }
3636 else
3637 {
6b31947e 3638 /* We know the abs value. */
252b5132 3639 fragP->fr_subtype = C (what, COND8);
252b5132 3640 }
93c2a809 3641 break;
252b5132 3642
93c2a809 3643 case C (UNCOND_JUMP, UNCOND12):
e66457fb 3644 case C (UNCOND_JUMP, UNCOND32):
93c2a809
AM
3645 case C (UNCOND_JUMP, UNDEF_WORD_DISP):
3646 case C (COND_JUMP, COND8):
e66457fb
AM
3647 case C (COND_JUMP, COND12):
3648 case C (COND_JUMP, COND32):
93c2a809
AM
3649 case C (COND_JUMP, UNDEF_WORD_DISP):
3650 case C (COND_JUMP_DELAY, COND8):
e66457fb
AM
3651 case C (COND_JUMP_DELAY, COND12):
3652 case C (COND_JUMP_DELAY, COND32):
93c2a809
AM
3653 case C (COND_JUMP_DELAY, UNDEF_WORD_DISP):
3654 /* When relaxing a section for the second time, we don't need to
e66457fb 3655 do anything besides return the current size. */
252b5132
RH
3656 break;
3657 }
e66457fb
AM
3658
3659 fragP->fr_var = md_relax_table[fragP->fr_subtype].rlx_length;
252b5132
RH
3660 return fragP->fr_var;
3661}
3662
6b31947e 3663/* Put number into target byte order. */
252b5132
RH
3664
3665void
3666md_number_to_chars (ptr, use, nbytes)
3667 char *ptr;
3668 valueT use;
3669 int nbytes;
3670{
324bfcf3
AO
3671#ifdef HAVE_SH64
3672 /* We might need to set the contents type to data. */
3673 sh64_flag_output ();
3674#endif
3675
252b5132
RH
3676 if (! target_big_endian)
3677 number_to_chars_littleendian (ptr, use, nbytes);
3678 else
3679 number_to_chars_bigendian (ptr, use, nbytes);
3680}
3681
cce5a618
NC
3682/* This version is used in obj-coff.c when not using BFD_ASSEMBLER.
3683 eg for the sh-hms target. */
3684
3685long
3686md_pcrel_from (fixP)
3687 fixS *fixP;
3688{
3689 return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address + 2;
3690}
3691
252b5132 3692long
ef17112f 3693md_pcrel_from_section (fixP, sec)
252b5132 3694 fixS *fixP;
ef17112f 3695 segT sec;
252b5132 3696{
28602ebf
KK
3697 if (! sh_local_pcrel (fixP)
3698 && fixP->fx_addsy != (symbolS *) NULL
3699 && (S_FORCE_RELOC (fixP->fx_addsy)
ef17112f
HPN
3700 || S_GET_SEGMENT (fixP->fx_addsy) != sec))
3701 {
3702 /* The symbol is undefined (or is defined but not in this section,
3703 or we're not sure about it being the final definition). Let the
3704 linker figure it out. We need to adjust the subtraction of a
3705 symbol to the position of the relocated data, though. */
3706 return fixP->fx_subsy ? fixP->fx_where + fixP->fx_frag->fr_address : 0;
3707 }
3708
cce5a618 3709 return md_pcrel_from (fixP);
252b5132
RH
3710}
3711
3712#ifdef OBJ_COFF
3713
3714int
3715tc_coff_sizemachdep (frag)
3716 fragS *frag;
3717{
3718 return md_relax_table[frag->fr_subtype].rlx_length;
3719}
3720
3721#endif /* OBJ_COFF */
3722
252b5132
RH
3723#ifndef BFD_ASSEMBLER
3724#ifdef OBJ_COFF
3725
3726/* Map BFD relocs to SH COFF relocs. */
3727
3728struct reloc_map
3729{
3730 bfd_reloc_code_real_type bfd_reloc;
3731 int sh_reloc;
3732};
3733
3734static const struct reloc_map coff_reloc_map[] =
3735{
3736 { BFD_RELOC_32, R_SH_IMM32 },
3737 { BFD_RELOC_16, R_SH_IMM16 },
3738 { BFD_RELOC_8, R_SH_IMM8 },
3739 { BFD_RELOC_SH_PCDISP8BY2, R_SH_PCDISP8BY2 },
3740 { BFD_RELOC_SH_PCDISP12BY2, R_SH_PCDISP },
3741 { BFD_RELOC_SH_IMM4, R_SH_IMM4 },
3742 { BFD_RELOC_SH_IMM4BY2, R_SH_IMM4BY2 },
3743 { BFD_RELOC_SH_IMM4BY4, R_SH_IMM4BY4 },
3744 { BFD_RELOC_SH_IMM8, R_SH_IMM8 },
3745 { BFD_RELOC_SH_IMM8BY2, R_SH_IMM8BY2 },
3746 { BFD_RELOC_SH_IMM8BY4, R_SH_IMM8BY4 },
3747 { BFD_RELOC_SH_PCRELIMM8BY2, R_SH_PCRELIMM8BY2 },
3748 { BFD_RELOC_SH_PCRELIMM8BY4, R_SH_PCRELIMM8BY4 },
3749 { BFD_RELOC_8_PCREL, R_SH_SWITCH8 },
3750 { BFD_RELOC_SH_SWITCH16, R_SH_SWITCH16 },
3751 { BFD_RELOC_SH_SWITCH32, R_SH_SWITCH32 },
3752 { BFD_RELOC_SH_USES, R_SH_USES },
3753 { BFD_RELOC_SH_COUNT, R_SH_COUNT },
3754 { BFD_RELOC_SH_ALIGN, R_SH_ALIGN },
3755 { BFD_RELOC_SH_CODE, R_SH_CODE },
3756 { BFD_RELOC_SH_DATA, R_SH_DATA },
3757 { BFD_RELOC_SH_LABEL, R_SH_LABEL },
3758 { BFD_RELOC_UNUSED, 0 }
3759};
3760
3761/* Adjust a reloc for the SH. This is similar to the generic code,
3762 but does some minor tweaking. */
3763
3764void
3765sh_coff_reloc_mangle (seg, fix, intr, paddr)
3766 segment_info_type *seg;
3767 fixS *fix;
3768 struct internal_reloc *intr;
3769 unsigned int paddr;
3770{
3771 symbolS *symbol_ptr = fix->fx_addsy;
3772 symbolS *dot;
3773
3774 intr->r_vaddr = paddr + fix->fx_frag->fr_address + fix->fx_where;
3775
3776 if (! SWITCH_TABLE (fix))
3777 {
3778 const struct reloc_map *rm;
3779
3780 for (rm = coff_reloc_map; rm->bfd_reloc != BFD_RELOC_UNUSED; rm++)
3781 if (rm->bfd_reloc == (bfd_reloc_code_real_type) fix->fx_r_type)
3782 break;
3783 if (rm->bfd_reloc == BFD_RELOC_UNUSED)
3784 as_bad_where (fix->fx_file, fix->fx_line,
3785 _("Can not represent %s relocation in this object file format"),
3786 bfd_get_reloc_code_name (fix->fx_r_type));
3787 intr->r_type = rm->sh_reloc;
3788 intr->r_offset = 0;
3789 }
3790 else
3791 {
3792 know (sh_relax);
3793
3794 if (fix->fx_r_type == BFD_RELOC_16)
3795 intr->r_type = R_SH_SWITCH16;
3796 else if (fix->fx_r_type == BFD_RELOC_8)
3797 intr->r_type = R_SH_SWITCH8;
3798 else if (fix->fx_r_type == BFD_RELOC_32)
3799 intr->r_type = R_SH_SWITCH32;
3800 else
3801 abort ();
3802
3803 /* For a switch reloc, we set r_offset to the difference between
3804 the reloc address and the subtrahend. When the linker is
3805 doing relaxing, it can use the determine the starting and
3806 ending points of the switch difference expression. */
3807 intr->r_offset = intr->r_vaddr - S_GET_VALUE (fix->fx_subsy);
3808 }
3809
3810 /* PC relative relocs are always against the current section. */
3811 if (symbol_ptr == NULL)
3812 {
3813 switch (fix->fx_r_type)
3814 {
3815 case BFD_RELOC_SH_PCRELIMM8BY2:
3816 case BFD_RELOC_SH_PCRELIMM8BY4:
3817 case BFD_RELOC_SH_PCDISP8BY2:
3818 case BFD_RELOC_SH_PCDISP12BY2:
3819 case BFD_RELOC_SH_USES:
3820 symbol_ptr = seg->dot;
3821 break;
3822 default:
3823 break;
3824 }
3825 }
3826
3827 if (fix->fx_r_type == BFD_RELOC_SH_USES)
3828 {
3829 /* We can't store the offset in the object file, since this
3830 reloc does not take up any space, so we store it in r_offset.
94f592af 3831 The fx_addnumber field was set in md_apply_fix3. */
252b5132
RH
3832 intr->r_offset = fix->fx_addnumber;
3833 }
3834 else if (fix->fx_r_type == BFD_RELOC_SH_COUNT)
3835 {
3836 /* We can't store the count in the object file, since this reloc
3837 does not take up any space, so we store it in r_offset. The
3838 fx_offset field was set when the fixup was created in
3839 sh_coff_frob_file. */
3840 intr->r_offset = fix->fx_offset;
3841 /* This reloc is always absolute. */
3842 symbol_ptr = NULL;
3843 }
3844 else if (fix->fx_r_type == BFD_RELOC_SH_ALIGN)
3845 {
3846 /* Store the alignment in the r_offset field. */
3847 intr->r_offset = fix->fx_offset;
3848 /* This reloc is always absolute. */
3849 symbol_ptr = NULL;
3850 }
3851 else if (fix->fx_r_type == BFD_RELOC_SH_CODE
3852 || fix->fx_r_type == BFD_RELOC_SH_DATA
3853 || fix->fx_r_type == BFD_RELOC_SH_LABEL)
3854 {
3855 /* These relocs are always absolute. */
3856 symbol_ptr = NULL;
3857 }
3858
3859 /* Turn the segment of the symbol into an offset. */
3860 if (symbol_ptr != NULL)
3861 {
3862 dot = segment_info[S_GET_SEGMENT (symbol_ptr)].dot;
3863 if (dot != NULL)
3864 intr->r_symndx = dot->sy_number;
3865 else
3866 intr->r_symndx = symbol_ptr->sy_number;
3867 }
3868 else
3869 intr->r_symndx = -1;
3870}
3871
3872#endif /* OBJ_COFF */
3873#endif /* ! BFD_ASSEMBLER */
3874
3875#ifdef BFD_ASSEMBLER
3876
3877/* Create a reloc. */
3878
3879arelent *
3880tc_gen_reloc (section, fixp)
43841e91 3881 asection *section ATTRIBUTE_UNUSED;
252b5132
RH
3882 fixS *fixp;
3883{
3884 arelent *rel;
3885 bfd_reloc_code_real_type r_type;
3886
3887 rel = (arelent *) xmalloc (sizeof (arelent));
49309057
ILT
3888 rel->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
3889 *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH
3890 rel->address = fixp->fx_frag->fr_address + fixp->fx_where;
3891
3892 r_type = fixp->fx_r_type;
3893
3894 if (SWITCH_TABLE (fixp))
3895 {
3896 rel->addend = rel->address - S_GET_VALUE (fixp->fx_subsy);
3897 if (r_type == BFD_RELOC_16)
3898 r_type = BFD_RELOC_SH_SWITCH16;
3899 else if (r_type == BFD_RELOC_8)
3900 r_type = BFD_RELOC_8_PCREL;
3901 else if (r_type == BFD_RELOC_32)
3902 r_type = BFD_RELOC_SH_SWITCH32;
3903 else
3904 abort ();
3905 }
3906 else if (r_type == BFD_RELOC_SH_USES)
3907 rel->addend = fixp->fx_addnumber;
3908 else if (r_type == BFD_RELOC_SH_COUNT)
3909 rel->addend = fixp->fx_offset;
3910 else if (r_type == BFD_RELOC_SH_ALIGN)
3911 rel->addend = fixp->fx_offset;
3912 else if (r_type == BFD_RELOC_VTABLE_INHERIT
3913 || r_type == BFD_RELOC_VTABLE_ENTRY)
3914 rel->addend = fixp->fx_offset;
015551fc
JR
3915 else if (r_type == BFD_RELOC_SH_LOOP_START
3916 || r_type == BFD_RELOC_SH_LOOP_END)
3917 rel->addend = fixp->fx_offset;
3918 else if (r_type == BFD_RELOC_SH_LABEL && fixp->fx_pcrel)
3919 {
3920 rel->addend = 0;
3921 rel->address = rel->addend = fixp->fx_offset;
3922 }
324bfcf3
AO
3923#ifdef HAVE_SH64
3924 else if (shmedia_init_reloc (rel, fixp))
3925 ;
3926#endif
252b5132
RH
3927 else if (fixp->fx_pcrel)
3928 rel->addend = fixp->fx_addnumber;
a1cc9221
AO
3929 else if (r_type == BFD_RELOC_32 || r_type == BFD_RELOC_32_GOTOFF)
3930 rel->addend = fixp->fx_addnumber;
252b5132
RH
3931 else
3932 rel->addend = 0;
3933
3934 rel->howto = bfd_reloc_type_lookup (stdoutput, r_type);
a161fe53 3935 if (rel->howto == NULL)
252b5132
RH
3936 {
3937 as_bad_where (fixp->fx_file, fixp->fx_line,
3938 _("Cannot represent relocation type %s"),
3939 bfd_get_reloc_code_name (r_type));
3940 /* Set howto to a garbage value so that we can keep going. */
3941 rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32);
3942 assert (rel->howto != NULL);
3943 }
3944
3945 return rel;
3946}
3947
538cd60f
AO
3948#ifdef OBJ_ELF
3949inline static char *
3950sh_end_of_match (cont, what)
3951 char *cont, *what;
3952{
3953 int len = strlen (what);
3954
3955 if (strncasecmp (cont, what, strlen (what)) == 0
3956 && ! is_part_of_name (cont[len]))
3957 return cont + len;
3958
3959 return NULL;
5d6255fe 3960}
538cd60f
AO
3961
3962int
3963sh_parse_name (name, exprP, nextcharP)
3964 char const *name;
3965 expressionS *exprP;
3966 char *nextcharP;
3967{
3968 char *next = input_line_pointer;
3969 char *next_end;
3970 int reloc_type;
3971 segT segment;
3972
3973 exprP->X_op_symbol = NULL;
3974
3975 if (strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0)
3976 {
3977 if (! GOT_symbol)
3978 GOT_symbol = symbol_find_or_make (name);
3979
3980 exprP->X_add_symbol = GOT_symbol;
3981 no_suffix:
3982 /* If we have an absolute symbol or a reg, then we know its
3983 value now. */
3984 segment = S_GET_SEGMENT (exprP->X_add_symbol);
3985 if (segment == absolute_section)
3986 {
3987 exprP->X_op = O_constant;
3988 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol);
3989 exprP->X_add_symbol = NULL;
3990 }
3991 else if (segment == reg_section)
3992 {
3993 exprP->X_op = O_register;
3994 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol);
3995 exprP->X_add_symbol = NULL;
3996 }
3997 else
3998 {
3999 exprP->X_op = O_symbol;
4000 exprP->X_add_number = 0;
4001 }
4002
4003 return 1;
4004 }
4005
4006 exprP->X_add_symbol = symbol_find_or_make (name);
5d6255fe 4007
538cd60f
AO
4008 if (*nextcharP != '@')
4009 goto no_suffix;
4010 else if ((next_end = sh_end_of_match (next + 1, "GOTOFF")))
4011 reloc_type = BFD_RELOC_32_GOTOFF;
324bfcf3
AO
4012 else if ((next_end = sh_end_of_match (next + 1, "GOTPLT")))
4013 reloc_type = BFD_RELOC_SH_GOTPLT32;
538cd60f
AO
4014 else if ((next_end = sh_end_of_match (next + 1, "GOT")))
4015 reloc_type = BFD_RELOC_32_GOT_PCREL;
4016 else if ((next_end = sh_end_of_match (next + 1, "PLT")))
4017 reloc_type = BFD_RELOC_32_PLT_PCREL;
4018 else
4019 goto no_suffix;
4020
4021 *input_line_pointer = *nextcharP;
4022 input_line_pointer = next_end;
4023 *nextcharP = *input_line_pointer;
4024 *input_line_pointer = '\0';
4025
4026 exprP->X_op = O_PIC_reloc;
4027 exprP->X_add_number = 0;
4028 exprP->X_md = reloc_type;
4029
4030 return 1;
4031}
4032#endif
252b5132 4033#endif /* BFD_ASSEMBLER */
This page took 0.368447 seconds and 4 git commands to generate.