Commit | Line | Data |
---|---|---|
252b5132 | 1 | /* tc-sh.c -- Assemble code for the Hitachi Super-H |
aae6ddf9 | 2 | Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002 |
f7e42eb4 | 3 | Free Software Foundation, Inc. |
252b5132 RH |
4 | |
5 | This file is part of GAS, the GNU Assembler. | |
6 | ||
7 | GAS is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GAS is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GAS; see the file COPYING. If not, write to | |
19 | the Free Software Foundation, 59 Temple Place - Suite 330, | |
20 | Boston, MA 02111-1307, USA. */ | |
21 | ||
6b31947e | 22 | /* Written By Steve Chamberlain <sac@cygnus.com> */ |
252b5132 RH |
23 | |
24 | #include <stdio.h> | |
25 | #include "as.h" | |
26 | #include "bfd.h" | |
27 | #include "subsegs.h" | |
28 | #define DEFINE_TABLE | |
29 | #include "opcodes/sh-opc.h" | |
3882b010 | 30 | #include "safe-ctype.h" |
43841e91 | 31 | #include "struc-symbol.h" |
d4845d57 JR |
32 | |
33 | #ifdef OBJ_ELF | |
34 | #include "elf/sh.h" | |
35 | #endif | |
36 | ||
0d10e182 | 37 | #include "dwarf2dbg.h" |
0d10e182 | 38 | |
e08ae979 HPN |
39 | typedef struct |
40 | { | |
41 | sh_arg_type type; | |
42 | int reg; | |
43 | expressionS immediate; | |
44 | } | |
45 | sh_operand_info; | |
46 | ||
252b5132 RH |
47 | const char comment_chars[] = "!"; |
48 | const char line_separator_chars[] = ";"; | |
49 | const char line_comment_chars[] = "!#"; | |
50 | ||
51 | static void s_uses PARAMS ((int)); | |
52 | ||
53 | static void sh_count_relocs PARAMS ((bfd *, segT, PTR)); | |
54 | static void sh_frob_section PARAMS ((bfd *, segT, PTR)); | |
55 | ||
252b5132 | 56 | static void s_uacons PARAMS ((int)); |
d4845d57 | 57 | static sh_opcode_info *find_cooked_opcode PARAMS ((char **)); |
0d10e182 | 58 | static unsigned int assemble_ppi PARAMS ((char *, sh_opcode_info *)); |
e08ae979 | 59 | static void little PARAMS ((int)); |
05982cac | 60 | static void big PARAMS ((int)); |
e08ae979 HPN |
61 | static int parse_reg PARAMS ((char *, int *, int *)); |
62 | static symbolS *dot PARAMS ((void)); | |
63 | static char *parse_exp PARAMS ((char *, sh_operand_info *)); | |
64 | static char *parse_at PARAMS ((char *, sh_operand_info *)); | |
65 | static void get_operand PARAMS ((char **, sh_operand_info *)); | |
66 | static char *get_operands | |
67 | PARAMS ((sh_opcode_info *, char *, sh_operand_info *)); | |
68 | static sh_opcode_info *get_specific | |
69 | PARAMS ((sh_opcode_info *, sh_operand_info *)); | |
70 | static void insert PARAMS ((char *, int, int, sh_operand_info *)); | |
71 | static void build_relax PARAMS ((sh_opcode_info *, sh_operand_info *)); | |
72 | static char *insert_loop_bounds PARAMS ((char *, sh_operand_info *)); | |
73 | static unsigned int build_Mytes | |
74 | PARAMS ((sh_opcode_info *, sh_operand_info *)); | |
252b5132 | 75 | |
a1cc9221 AO |
76 | #ifdef OBJ_ELF |
77 | static void sh_elf_cons PARAMS ((int)); | |
78 | ||
538cd60f AO |
79 | inline static int sh_PIC_related_p PARAMS ((symbolS *)); |
80 | static int sh_check_fixup PARAMS ((expressionS *, bfd_reloc_code_real_type *)); | |
81 | inline static char *sh_end_of_match PARAMS ((char *, char *)); | |
82 | ||
a1cc9221 AO |
83 | symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */ |
84 | #endif | |
85 | ||
05982cac HPN |
86 | static void |
87 | big (ignore) | |
88 | int ignore ATTRIBUTE_UNUSED; | |
89 | { | |
90 | if (! target_big_endian) | |
91 | as_bad (_("directive .big encountered when option -big required")); | |
92 | ||
93 | /* Stop further messages. */ | |
94 | target_big_endian = 1; | |
95 | } | |
252b5132 RH |
96 | |
97 | static void | |
98 | little (ignore) | |
43841e91 | 99 | int ignore ATTRIBUTE_UNUSED; |
252b5132 | 100 | { |
05982cac HPN |
101 | if (target_big_endian) |
102 | as_bad (_("directive .little encountered when option -little required")); | |
103 | ||
104 | /* Stop further messages. */ | |
252b5132 RH |
105 | target_big_endian = 0; |
106 | } | |
107 | ||
d4845d57 JR |
108 | /* This table describes all the machine specific pseudo-ops the assembler |
109 | has to support. The fields are: | |
110 | pseudo-op name without dot | |
111 | function to call to execute this pseudo-op | |
6b31947e | 112 | Integer arg to pass to the function. */ |
d4845d57 | 113 | |
252b5132 RH |
114 | const pseudo_typeS md_pseudo_table[] = |
115 | { | |
a1cc9221 AO |
116 | #ifdef OBJ_ELF |
117 | {"long", sh_elf_cons, 4}, | |
118 | {"int", sh_elf_cons, 4}, | |
119 | {"word", sh_elf_cons, 2}, | |
120 | {"short", sh_elf_cons, 2}, | |
121 | #else | |
252b5132 RH |
122 | {"int", cons, 4}, |
123 | {"word", cons, 2}, | |
a1cc9221 | 124 | #endif /* OBJ_ELF */ |
05982cac | 125 | {"big", big, 0}, |
252b5132 RH |
126 | {"form", listing_psize, 0}, |
127 | {"little", little, 0}, | |
128 | {"heading", listing_title, 0}, | |
129 | {"import", s_ignore, 0}, | |
130 | {"page", listing_eject, 0}, | |
131 | {"program", s_ignore, 0}, | |
132 | {"uses", s_uses, 0}, | |
133 | {"uaword", s_uacons, 2}, | |
134 | {"ualong", s_uacons, 4}, | |
de68de20 AO |
135 | {"uaquad", s_uacons, 8}, |
136 | {"2byte", s_uacons, 2}, | |
137 | {"4byte", s_uacons, 4}, | |
138 | {"8byte", s_uacons, 8}, | |
2bc0a128 | 139 | #ifdef BFD_ASSEMBLER |
de68de20 AO |
140 | {"file", dwarf2_directive_file, 0 }, |
141 | {"loc", dwarf2_directive_loc, 0 }, | |
2bc0a128 | 142 | #endif |
252b5132 RH |
143 | {0, 0, 0} |
144 | }; | |
145 | ||
146 | /*int md_reloc_size; */ | |
147 | ||
148 | int sh_relax; /* set if -relax seen */ | |
149 | ||
150 | /* Whether -small was seen. */ | |
151 | ||
152 | int sh_small; | |
153 | ||
d4845d57 JR |
154 | /* Whether -dsp was seen. */ |
155 | ||
156 | static int sh_dsp; | |
157 | ||
158 | /* The bit mask of architectures that could | |
159 | accomodate the insns seen so far. */ | |
160 | static int valid_arch; | |
161 | ||
252b5132 RH |
162 | const char EXP_CHARS[] = "eE"; |
163 | ||
6b31947e | 164 | /* Chars that mean this number is a floating point constant. */ |
252b5132 RH |
165 | /* As in 0f12.456 */ |
166 | /* or 0d1.2345e12 */ | |
167 | const char FLT_CHARS[] = "rRsSfFdDxXpP"; | |
168 | ||
169 | #define C(a,b) ENCODE_RELAX(a,b) | |
170 | ||
252b5132 RH |
171 | #define ENCODE_RELAX(what,length) (((what) << 4) + (length)) |
172 | #define GET_WHAT(x) ((x>>4)) | |
173 | ||
6b31947e | 174 | /* These are the three types of relaxable instrction. */ |
252b5132 RH |
175 | #define COND_JUMP 1 |
176 | #define COND_JUMP_DELAY 2 | |
177 | #define UNCOND_JUMP 3 | |
178 | #define END 4 | |
179 | ||
180 | #define UNDEF_DISP 0 | |
181 | #define COND8 1 | |
182 | #define COND12 2 | |
183 | #define COND32 3 | |
252b5132 RH |
184 | #define UNDEF_WORD_DISP 4 |
185 | ||
186 | #define UNCOND12 1 | |
187 | #define UNCOND32 2 | |
188 | ||
189 | /* Branch displacements are from the address of the branch plus | |
190 | four, thus all minimum and maximum values have 4 added to them. */ | |
191 | #define COND8_F 258 | |
192 | #define COND8_M -252 | |
193 | #define COND8_LENGTH 2 | |
194 | ||
195 | /* There is one extra instruction before the branch, so we must add | |
196 | two more bytes to account for it. */ | |
197 | #define COND12_F 4100 | |
198 | #define COND12_M -4090 | |
199 | #define COND12_LENGTH 6 | |
200 | ||
201 | #define COND12_DELAY_LENGTH 4 | |
202 | ||
203 | /* ??? The minimum and maximum values are wrong, but this does not matter | |
204 | since this relocation type is not supported yet. */ | |
205 | #define COND32_F (1<<30) | |
206 | #define COND32_M -(1<<30) | |
207 | #define COND32_LENGTH 14 | |
208 | ||
209 | #define UNCOND12_F 4098 | |
210 | #define UNCOND12_M -4092 | |
211 | #define UNCOND12_LENGTH 2 | |
212 | ||
213 | /* ??? The minimum and maximum values are wrong, but this does not matter | |
214 | since this relocation type is not supported yet. */ | |
215 | #define UNCOND32_F (1<<30) | |
216 | #define UNCOND32_M -(1<<30) | |
217 | #define UNCOND32_LENGTH 14 | |
218 | ||
43841e91 NC |
219 | #define EMPTY { 0, 0, 0, 0 } |
220 | ||
252b5132 | 221 | const relax_typeS md_relax_table[C (END, 0)] = { |
43841e91 NC |
222 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
223 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
252b5132 | 224 | |
43841e91 | 225 | EMPTY, |
252b5132 RH |
226 | /* C (COND_JUMP, COND8) */ |
227 | { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP, COND12) }, | |
228 | /* C (COND_JUMP, COND12) */ | |
229 | { COND12_F, COND12_M, COND12_LENGTH, C (COND_JUMP, COND32), }, | |
230 | /* C (COND_JUMP, COND32) */ | |
231 | { COND32_F, COND32_M, COND32_LENGTH, 0, }, | |
e66457fb AM |
232 | /* C (COND_JUMP, UNDEF_WORD_DISP) */ |
233 | { 0, 0, COND32_LENGTH, 0, }, | |
234 | EMPTY, EMPTY, EMPTY, | |
43841e91 | 235 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
252b5132 | 236 | |
43841e91 | 237 | EMPTY, |
252b5132 RH |
238 | /* C (COND_JUMP_DELAY, COND8) */ |
239 | { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP_DELAY, COND12) }, | |
240 | /* C (COND_JUMP_DELAY, COND12) */ | |
241 | { COND12_F, COND12_M, COND12_DELAY_LENGTH, C (COND_JUMP_DELAY, COND32), }, | |
242 | /* C (COND_JUMP_DELAY, COND32) */ | |
243 | { COND32_F, COND32_M, COND32_LENGTH, 0, }, | |
e66457fb AM |
244 | /* C (COND_JUMP_DELAY, UNDEF_WORD_DISP) */ |
245 | { 0, 0, COND32_LENGTH, 0, }, | |
246 | EMPTY, EMPTY, EMPTY, | |
43841e91 | 247 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
252b5132 | 248 | |
43841e91 | 249 | EMPTY, |
252b5132 RH |
250 | /* C (UNCOND_JUMP, UNCOND12) */ |
251 | { UNCOND12_F, UNCOND12_M, UNCOND12_LENGTH, C (UNCOND_JUMP, UNCOND32), }, | |
252 | /* C (UNCOND_JUMP, UNCOND32) */ | |
253 | { UNCOND32_F, UNCOND32_M, UNCOND32_LENGTH, 0, }, | |
e66457fb AM |
254 | EMPTY, |
255 | /* C (UNCOND_JUMP, UNDEF_WORD_DISP) */ | |
256 | { 0, 0, UNCOND32_LENGTH, 0, }, | |
257 | EMPTY, EMPTY, EMPTY, | |
43841e91 | 258 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
252b5132 RH |
259 | }; |
260 | ||
43841e91 NC |
261 | #undef EMPTY |
262 | ||
252b5132 RH |
263 | static struct hash_control *opcode_hash_control; /* Opcode mnemonics */ |
264 | ||
a1cc9221 AO |
265 | \f |
266 | #ifdef OBJ_ELF | |
538cd60f AO |
267 | /* Determinet whether the symbol needs any kind of PIC relocation. */ |
268 | ||
269 | inline static int | |
270 | sh_PIC_related_p (sym) | |
271 | symbolS *sym; | |
a1cc9221 | 272 | { |
538cd60f | 273 | expressionS *exp; |
a1cc9221 | 274 | |
538cd60f AO |
275 | if (! sym) |
276 | return 0; | |
277 | ||
278 | if (sym == GOT_symbol) | |
279 | return 1; | |
280 | ||
281 | exp = symbol_get_value_expression (sym); | |
282 | ||
283 | return (exp->X_op == O_PIC_reloc | |
284 | || sh_PIC_related_p (exp->X_add_symbol) | |
285 | || sh_PIC_related_p (exp->X_op_symbol)); | |
286 | } | |
287 | ||
288 | /* Determine the relocation type to be used to represent the | |
289 | expression, that may be rearranged. */ | |
290 | ||
291 | static int | |
292 | sh_check_fixup (main_exp, r_type_p) | |
293 | expressionS *main_exp; | |
294 | bfd_reloc_code_real_type *r_type_p; | |
295 | { | |
296 | expressionS *exp = main_exp; | |
297 | ||
298 | /* This is here for backward-compatibility only. GCC used to generated: | |
299 | ||
300 | f@PLT + . - (.LPCS# + 2) | |
301 | ||
302 | but we'd rather be able to handle this as a PIC-related reference | |
303 | plus/minus a symbol. However, gas' parser gives us: | |
304 | ||
305 | O_subtract (O_add (f@PLT, .), .LPCS#+2) | |
306 | ||
307 | so we attempt to transform this into: | |
308 | ||
309 | O_subtract (f@PLT, O_subtract (.LPCS#+2, .)) | |
310 | ||
311 | which we can handle simply below. */ | |
312 | if (exp->X_op == O_subtract) | |
313 | { | |
314 | if (sh_PIC_related_p (exp->X_op_symbol)) | |
315 | return 1; | |
316 | ||
317 | exp = symbol_get_value_expression (exp->X_add_symbol); | |
318 | ||
319 | if (exp && sh_PIC_related_p (exp->X_op_symbol)) | |
320 | return 1; | |
321 | ||
322 | if (exp && exp->X_op == O_add | |
323 | && sh_PIC_related_p (exp->X_add_symbol)) | |
324 | { | |
325 | symbolS *sym = exp->X_add_symbol; | |
326 | ||
327 | exp->X_op = O_subtract; | |
328 | exp->X_add_symbol = main_exp->X_op_symbol; | |
329 | ||
330 | main_exp->X_op_symbol = main_exp->X_add_symbol; | |
331 | main_exp->X_add_symbol = sym; | |
332 | ||
333 | main_exp->X_add_number += exp->X_add_number; | |
334 | exp->X_add_number = 0; | |
335 | } | |
336 | ||
337 | exp = main_exp; | |
338 | } | |
339 | else if (exp->X_op == O_add && sh_PIC_related_p (exp->X_op_symbol)) | |
340 | return 1; | |
341 | ||
342 | if (exp->X_op == O_symbol || exp->X_op == O_add || exp->X_op == O_subtract) | |
343 | { | |
344 | if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol) | |
345 | { | |
346 | *r_type_p = BFD_RELOC_SH_GOTPC; | |
347 | return 0; | |
348 | } | |
349 | exp = symbol_get_value_expression (exp->X_add_symbol); | |
350 | if (! exp) | |
351 | return 0; | |
352 | } | |
353 | ||
354 | if (exp->X_op == O_PIC_reloc) | |
355 | { | |
356 | *r_type_p = exp->X_md; | |
357 | if (exp == main_exp) | |
358 | exp->X_op = O_symbol; | |
359 | else | |
360 | { | |
361 | main_exp->X_add_symbol = exp->X_add_symbol; | |
362 | main_exp->X_add_number += exp->X_add_number; | |
363 | } | |
364 | } | |
365 | else | |
366 | return (sh_PIC_related_p (exp->X_add_symbol) | |
367 | || sh_PIC_related_p (exp->X_op_symbol)); | |
368 | ||
369 | return 0; | |
370 | } | |
371 | ||
372 | /* Add expression EXP of SIZE bytes to offset OFF of fragment FRAG. */ | |
373 | ||
374 | void | |
375 | sh_cons_fix_new (frag, off, size, exp) | |
376 | fragS *frag; | |
377 | int off, size; | |
378 | expressionS *exp; | |
379 | { | |
380 | bfd_reloc_code_real_type r_type = BFD_RELOC_UNUSED; | |
381 | ||
382 | if (sh_check_fixup (exp, &r_type)) | |
383 | as_bad (_("Invalid PIC expression.")); | |
384 | ||
385 | if (r_type == BFD_RELOC_UNUSED) | |
386 | switch (size) | |
a1cc9221 | 387 | { |
538cd60f AO |
388 | case 1: |
389 | r_type = BFD_RELOC_8; | |
390 | break; | |
a1cc9221 | 391 | |
538cd60f AO |
392 | case 2: |
393 | r_type = BFD_RELOC_16; | |
394 | break; | |
395 | ||
396 | case 4: | |
397 | r_type = BFD_RELOC_32; | |
398 | break; | |
a1cc9221 | 399 | |
538cd60f AO |
400 | default: |
401 | goto error; | |
402 | } | |
403 | else if (size != 4) | |
404 | { | |
405 | error: | |
406 | as_bad (_("unsupported BFD relocation size %u"), size); | |
407 | r_type = BFD_RELOC_UNUSED; | |
408 | } | |
409 | ||
410 | fix_new_exp (frag, off, size, exp, 0, r_type); | |
a1cc9221 AO |
411 | } |
412 | ||
413 | /* The regular cons() function, that reads constants, doesn't support | |
414 | suffixes such as @GOT, @GOTOFF and @PLT, that generate | |
415 | machine-specific relocation types. So we must define it here. */ | |
416 | /* Clobbers input_line_pointer, checks end-of-line. */ | |
417 | static void | |
418 | sh_elf_cons (nbytes) | |
419 | register int nbytes; /* 1=.byte, 2=.word, 4=.long */ | |
420 | { | |
538cd60f | 421 | expressionS exp; |
a1cc9221 AO |
422 | |
423 | if (is_it_end_of_statement ()) | |
424 | { | |
425 | demand_empty_rest_of_line (); | |
426 | return; | |
427 | } | |
428 | ||
429 | do | |
430 | { | |
431 | expression (&exp); | |
538cd60f | 432 | emit_expr (&exp, (unsigned int) nbytes); |
a1cc9221 AO |
433 | } |
434 | while (*input_line_pointer++ == ','); | |
435 | ||
81d4177b | 436 | input_line_pointer--; /* Put terminator back into stream. */ |
a1cc9221 AO |
437 | if (*input_line_pointer == '#' || *input_line_pointer == '!') |
438 | { | |
dda5ecfc | 439 | while (! is_end_of_line[(unsigned char) *input_line_pointer++]); |
a1cc9221 AO |
440 | } |
441 | else | |
442 | demand_empty_rest_of_line (); | |
443 | } | |
444 | #endif /* OBJ_ELF */ | |
445 | ||
446 | \f | |
6b31947e NC |
447 | /* This function is called once, at assembler startup time. This should |
448 | set up all the tables, etc that the MD part of the assembler needs. */ | |
252b5132 RH |
449 | |
450 | void | |
451 | md_begin () | |
452 | { | |
453 | sh_opcode_info *opcode; | |
454 | char *prev_name = ""; | |
d4845d57 | 455 | int target_arch; |
252b5132 | 456 | |
d4845d57 JR |
457 | target_arch = arch_sh1_up & ~(sh_dsp ? arch_sh3e_up : arch_sh_dsp_up); |
458 | valid_arch = target_arch; | |
459 | ||
252b5132 RH |
460 | opcode_hash_control = hash_new (); |
461 | ||
6b31947e | 462 | /* Insert unique names into hash table. */ |
252b5132 RH |
463 | for (opcode = sh_table; opcode->name; opcode++) |
464 | { | |
a37c8f88 | 465 | if (strcmp (prev_name, opcode->name)) |
252b5132 | 466 | { |
a37c8f88 JR |
467 | if (! (opcode->arch & target_arch)) |
468 | continue; | |
252b5132 RH |
469 | prev_name = opcode->name; |
470 | hash_insert (opcode_hash_control, opcode->name, (char *) opcode); | |
471 | } | |
472 | else | |
473 | { | |
474 | /* Make all the opcodes with the same name point to the same | |
6b31947e | 475 | string. */ |
252b5132 RH |
476 | opcode->name = prev_name; |
477 | } | |
478 | } | |
479 | } | |
480 | ||
481 | static int reg_m; | |
482 | static int reg_n; | |
d4845d57 JR |
483 | static int reg_x, reg_y; |
484 | static int reg_efg; | |
252b5132 RH |
485 | static int reg_b; |
486 | ||
3882b010 | 487 | #define IDENT_CHAR(c) (ISALNUM (c) || (c) == '_') |
dead1419 | 488 | |
6b31947e NC |
489 | /* Try to parse a reg name. Return the number of chars consumed. */ |
490 | ||
252b5132 RH |
491 | static int |
492 | parse_reg (src, mode, reg) | |
493 | char *src; | |
494 | int *mode; | |
495 | int *reg; | |
496 | { | |
3882b010 L |
497 | char l0 = TOLOWER (src[0]); |
498 | char l1 = l0 ? TOLOWER (src[1]) : 0; | |
e46fee70 | 499 | |
dead1419 | 500 | /* We use ! IDENT_CHAR for the next character after the register name, to |
252b5132 | 501 | make sure that we won't accidentally recognize a symbol name such as |
dead1419 | 502 | 'sram' or sr_ram as being a reference to the register 'sr'. */ |
252b5132 | 503 | |
e46fee70 | 504 | if (l0 == 'r') |
252b5132 | 505 | { |
e46fee70 | 506 | if (l1 == '1') |
d4845d57 JR |
507 | { |
508 | if (src[2] >= '0' && src[2] <= '5' | |
dead1419 | 509 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
510 | { |
511 | *mode = A_REG_N; | |
512 | *reg = 10 + src[2] - '0'; | |
513 | return 3; | |
514 | } | |
515 | } | |
e46fee70 | 516 | if (l1 >= '0' && l1 <= '9' |
dead1419 | 517 | && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
518 | { |
519 | *mode = A_REG_N; | |
e46fee70 | 520 | *reg = (l1 - '0'); |
d4845d57 JR |
521 | return 2; |
522 | } | |
e46fee70 | 523 | if (l1 >= '0' && l1 <= '7' && strncasecmp (&src[2], "_bank", 5) == 0 |
dead1419 JR |
524 | && ! IDENT_CHAR ((unsigned char) src[7])) |
525 | { | |
526 | *mode = A_REG_B; | |
e46fee70 | 527 | *reg = (l1 - '0'); |
dead1419 JR |
528 | return 7; |
529 | } | |
d4845d57 | 530 | |
e46fee70 | 531 | if (l1 == 'e' && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
532 | { |
533 | *mode = A_RE; | |
534 | return 2; | |
535 | } | |
e46fee70 | 536 | if (l1 == 's' && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
537 | { |
538 | *mode = A_RS; | |
539 | return 2; | |
540 | } | |
252b5132 RH |
541 | } |
542 | ||
e46fee70 | 543 | if (l0 == 'a') |
252b5132 | 544 | { |
e46fee70 | 545 | if (l1 == '0') |
d4845d57 | 546 | { |
dead1419 | 547 | if (! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
548 | { |
549 | *mode = DSP_REG_N; | |
550 | *reg = A_A0_NUM; | |
551 | return 2; | |
552 | } | |
3882b010 | 553 | if (TOLOWER (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
554 | { |
555 | *mode = DSP_REG_N; | |
556 | *reg = A_A0G_NUM; | |
557 | return 3; | |
558 | } | |
559 | } | |
e46fee70 | 560 | if (l1 == '1') |
252b5132 | 561 | { |
dead1419 | 562 | if (! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 | 563 | { |
d4845d57 JR |
564 | *mode = DSP_REG_N; |
565 | *reg = A_A1_NUM; | |
566 | return 2; | |
567 | } | |
3882b010 | 568 | if (TOLOWER (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
569 | { |
570 | *mode = DSP_REG_N; | |
571 | *reg = A_A1G_NUM; | |
252b5132 RH |
572 | return 3; |
573 | } | |
574 | } | |
d4845d57 | 575 | |
e46fee70 | 576 | if (l1 == 'x' && src[2] >= '0' && src[2] <= '1' |
dead1419 | 577 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
578 | { |
579 | *mode = A_REG_N; | |
e46fee70 | 580 | *reg = 4 + (l1 - '0'); |
d4845d57 JR |
581 | return 3; |
582 | } | |
e46fee70 | 583 | if (l1 == 'y' && src[2] >= '0' && src[2] <= '1' |
dead1419 | 584 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
585 | { |
586 | *mode = A_REG_N; | |
e46fee70 | 587 | *reg = 6 + (l1 - '0'); |
d4845d57 JR |
588 | return 3; |
589 | } | |
e46fee70 | 590 | if (l1 == 's' && src[2] >= '0' && src[2] <= '3' |
dead1419 | 591 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 | 592 | { |
e46fee70 | 593 | int n = l1 - '0'; |
d4845d57 JR |
594 | |
595 | *mode = A_REG_N; | |
596 | *reg = n | ((~n & 2) << 1); | |
597 | return 3; | |
598 | } | |
599 | } | |
600 | ||
912a07db | 601 | if (l0 == 'i' && l1 && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 | 602 | { |
e46fee70 | 603 | if (l1 == 's') |
d4845d57 JR |
604 | { |
605 | *mode = A_REG_N; | |
606 | *reg = 8; | |
252b5132 RH |
607 | return 2; |
608 | } | |
e46fee70 | 609 | if (l1 == 'x') |
d4845d57 JR |
610 | { |
611 | *mode = A_REG_N; | |
612 | *reg = 8; | |
613 | return 2; | |
614 | } | |
e46fee70 | 615 | if (l1 == 'y') |
d4845d57 JR |
616 | { |
617 | *mode = A_REG_N; | |
618 | *reg = 9; | |
619 | return 2; | |
620 | } | |
621 | } | |
622 | ||
e46fee70 | 623 | if (l0 == 'x' && l1 >= '0' && l1 <= '1' |
dead1419 | 624 | && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
625 | { |
626 | *mode = DSP_REG_N; | |
e46fee70 | 627 | *reg = A_X0_NUM + l1 - '0'; |
d4845d57 JR |
628 | return 2; |
629 | } | |
630 | ||
e46fee70 | 631 | if (l0 == 'y' && l1 >= '0' && l1 <= '1' |
dead1419 | 632 | && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
633 | { |
634 | *mode = DSP_REG_N; | |
e46fee70 | 635 | *reg = A_Y0_NUM + l1 - '0'; |
d4845d57 JR |
636 | return 2; |
637 | } | |
638 | ||
e46fee70 | 639 | if (l0 == 'm' && l1 >= '0' && l1 <= '1' |
dead1419 | 640 | && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
641 | { |
642 | *mode = DSP_REG_N; | |
e46fee70 | 643 | *reg = l1 == '0' ? A_M0_NUM : A_M1_NUM; |
d4845d57 | 644 | return 2; |
252b5132 RH |
645 | } |
646 | ||
e46fee70 HPN |
647 | if (l0 == 's' |
648 | && l1 == 's' | |
3882b010 | 649 | && TOLOWER (src[2]) == 'r' && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
650 | { |
651 | *mode = A_SSR; | |
652 | return 3; | |
653 | } | |
654 | ||
3882b010 | 655 | if (l0 == 's' && l1 == 'p' && TOLOWER (src[2]) == 'c' |
dead1419 | 656 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
657 | { |
658 | *mode = A_SPC; | |
659 | return 3; | |
660 | } | |
661 | ||
3882b010 | 662 | if (l0 == 's' && l1 == 'g' && TOLOWER (src[2]) == 'r' |
dead1419 | 663 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
664 | { |
665 | *mode = A_SGR; | |
666 | return 3; | |
667 | } | |
668 | ||
3882b010 | 669 | if (l0 == 'd' && l1 == 's' && TOLOWER (src[2]) == 'r' |
dead1419 | 670 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
671 | { |
672 | *mode = A_DSR; | |
673 | return 3; | |
674 | } | |
675 | ||
3882b010 | 676 | if (l0 == 'd' && l1 == 'b' && TOLOWER (src[2]) == 'r' |
dead1419 | 677 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
678 | { |
679 | *mode = A_DBR; | |
680 | return 3; | |
681 | } | |
682 | ||
e46fee70 | 683 | if (l0 == 's' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 RH |
684 | { |
685 | *mode = A_SR; | |
686 | return 2; | |
687 | } | |
688 | ||
e46fee70 | 689 | if (l0 == 's' && l1 == 'p' && ! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 RH |
690 | { |
691 | *mode = A_REG_N; | |
692 | *reg = 15; | |
693 | return 2; | |
694 | } | |
695 | ||
e46fee70 | 696 | if (l0 == 'p' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 RH |
697 | { |
698 | *mode = A_PR; | |
699 | return 2; | |
700 | } | |
e46fee70 | 701 | if (l0 == 'p' && l1 == 'c' && ! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 | 702 | { |
015551fc JR |
703 | /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0' |
704 | and use an uninitialized immediate. */ | |
705 | *mode = A_PC; | |
252b5132 RH |
706 | return 2; |
707 | } | |
3882b010 | 708 | if (l0 == 'g' && l1 == 'b' && TOLOWER (src[2]) == 'r' |
dead1419 | 709 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
710 | { |
711 | *mode = A_GBR; | |
712 | return 3; | |
713 | } | |
3882b010 | 714 | if (l0 == 'v' && l1 == 'b' && TOLOWER (src[2]) == 'r' |
dead1419 | 715 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
716 | { |
717 | *mode = A_VBR; | |
718 | return 3; | |
719 | } | |
720 | ||
3882b010 | 721 | if (l0 == 'm' && l1 == 'a' && TOLOWER (src[2]) == 'c' |
dead1419 | 722 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 | 723 | { |
3882b010 | 724 | if (TOLOWER (src[3]) == 'l') |
252b5132 RH |
725 | { |
726 | *mode = A_MACL; | |
727 | return 4; | |
728 | } | |
3882b010 | 729 | if (TOLOWER (src[3]) == 'h') |
252b5132 RH |
730 | { |
731 | *mode = A_MACH; | |
732 | return 4; | |
733 | } | |
734 | } | |
3882b010 | 735 | if (l0 == 'm' && l1 == 'o' && TOLOWER (src[2]) == 'd' |
912a07db | 736 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
737 | { |
738 | *mode = A_MOD; | |
739 | return 3; | |
740 | } | |
e46fee70 | 741 | if (l0 == 'f' && l1 == 'r') |
252b5132 RH |
742 | { |
743 | if (src[2] == '1') | |
744 | { | |
745 | if (src[3] >= '0' && src[3] <= '5' | |
dead1419 | 746 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
747 | { |
748 | *mode = F_REG_N; | |
749 | *reg = 10 + src[3] - '0'; | |
750 | return 4; | |
751 | } | |
752 | } | |
753 | if (src[2] >= '0' && src[2] <= '9' | |
dead1419 | 754 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
755 | { |
756 | *mode = F_REG_N; | |
757 | *reg = (src[2] - '0'); | |
758 | return 3; | |
759 | } | |
760 | } | |
e46fee70 | 761 | if (l0 == 'd' && l1 == 'r') |
252b5132 RH |
762 | { |
763 | if (src[2] == '1') | |
764 | { | |
765 | if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1) | |
dead1419 | 766 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
767 | { |
768 | *mode = D_REG_N; | |
769 | *reg = 10 + src[3] - '0'; | |
770 | return 4; | |
771 | } | |
772 | } | |
773 | if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1) | |
dead1419 | 774 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
775 | { |
776 | *mode = D_REG_N; | |
777 | *reg = (src[2] - '0'); | |
778 | return 3; | |
779 | } | |
780 | } | |
e46fee70 | 781 | if (l0 == 'x' && l1 == 'd') |
252b5132 RH |
782 | { |
783 | if (src[2] == '1') | |
784 | { | |
785 | if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1) | |
dead1419 | 786 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
787 | { |
788 | *mode = X_REG_N; | |
789 | *reg = 11 + src[3] - '0'; | |
790 | return 4; | |
791 | } | |
792 | } | |
793 | if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1) | |
dead1419 | 794 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
795 | { |
796 | *mode = X_REG_N; | |
797 | *reg = (src[2] - '0') + 1; | |
798 | return 3; | |
799 | } | |
800 | } | |
e46fee70 | 801 | if (l0 == 'f' && l1 == 'v') |
252b5132 | 802 | { |
dead1419 | 803 | if (src[2] == '1'&& src[3] == '2' && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
804 | { |
805 | *mode = V_REG_N; | |
806 | *reg = 12; | |
807 | return 4; | |
808 | } | |
809 | if ((src[2] == '0' || src[2] == '4' || src[2] == '8') | |
dead1419 | 810 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
811 | { |
812 | *mode = V_REG_N; | |
813 | *reg = (src[2] - '0'); | |
814 | return 3; | |
815 | } | |
816 | } | |
3882b010 L |
817 | if (l0 == 'f' && l1 == 'p' && TOLOWER (src[2]) == 'u' |
818 | && TOLOWER (src[3]) == 'l' | |
dead1419 | 819 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
820 | { |
821 | *mode = FPUL_N; | |
822 | return 4; | |
823 | } | |
824 | ||
3882b010 L |
825 | if (l0 == 'f' && l1 == 'p' && TOLOWER (src[2]) == 's' |
826 | && TOLOWER (src[3]) == 'c' | |
827 | && TOLOWER (src[4]) == 'r' && ! IDENT_CHAR ((unsigned char) src[5])) | |
252b5132 RH |
828 | { |
829 | *mode = FPSCR_N; | |
830 | return 5; | |
831 | } | |
832 | ||
3882b010 L |
833 | if (l0 == 'x' && l1 == 'm' && TOLOWER (src[2]) == 't' |
834 | && TOLOWER (src[3]) == 'r' | |
835 | && TOLOWER (src[4]) == 'x' && ! IDENT_CHAR ((unsigned char) src[5])) | |
252b5132 RH |
836 | { |
837 | *mode = XMTRX_M4; | |
838 | return 5; | |
839 | } | |
840 | ||
841 | return 0; | |
842 | } | |
843 | ||
c4aa876b NC |
844 | static symbolS * |
845 | dot () | |
252b5132 RH |
846 | { |
847 | const char *fake; | |
848 | ||
849 | /* JF: '.' is pseudo symbol with value of current location | |
850 | in current segment. */ | |
851 | fake = FAKE_LABEL_NAME; | |
852 | return symbol_new (fake, | |
853 | now_seg, | |
854 | (valueT) frag_now_fix (), | |
855 | frag_now); | |
252b5132 RH |
856 | } |
857 | ||
c4aa876b | 858 | static char * |
015551fc | 859 | parse_exp (s, op) |
252b5132 | 860 | char *s; |
015551fc | 861 | sh_operand_info *op; |
252b5132 RH |
862 | { |
863 | char *save; | |
864 | char *new; | |
865 | ||
866 | save = input_line_pointer; | |
867 | input_line_pointer = s; | |
015551fc JR |
868 | expression (&op->immediate); |
869 | if (op->immediate.X_op == O_absent) | |
252b5132 | 870 | as_bad (_("missing operand")); |
538cd60f AO |
871 | #ifdef OBJ_ELF |
872 | else if (op->immediate.X_op == O_PIC_reloc | |
873 | || sh_PIC_related_p (op->immediate.X_add_symbol) | |
874 | || sh_PIC_related_p (op->immediate.X_op_symbol)) | |
875 | as_bad (_("misplaced PIC operand")); | |
876 | #endif | |
252b5132 RH |
877 | new = input_line_pointer; |
878 | input_line_pointer = save; | |
879 | return new; | |
880 | } | |
881 | ||
252b5132 RH |
882 | /* The many forms of operand: |
883 | ||
884 | Rn Register direct | |
885 | @Rn Register indirect | |
886 | @Rn+ Autoincrement | |
887 | @-Rn Autodecrement | |
888 | @(disp:4,Rn) | |
889 | @(disp:8,GBR) | |
890 | @(disp:8,PC) | |
891 | ||
892 | @(R0,Rn) | |
893 | @(R0,GBR) | |
894 | ||
895 | disp:8 | |
896 | disp:12 | |
897 | #imm8 | |
898 | pr, gbr, vbr, macl, mach | |
252b5132 RH |
899 | */ |
900 | ||
c4aa876b | 901 | static char * |
252b5132 RH |
902 | parse_at (src, op) |
903 | char *src; | |
904 | sh_operand_info *op; | |
905 | { | |
906 | int len; | |
907 | int mode; | |
908 | src++; | |
909 | if (src[0] == '-') | |
910 | { | |
6b31947e | 911 | /* Must be predecrement. */ |
252b5132 RH |
912 | src++; |
913 | ||
914 | len = parse_reg (src, &mode, &(op->reg)); | |
915 | if (mode != A_REG_N) | |
916 | as_bad (_("illegal register after @-")); | |
917 | ||
918 | op->type = A_DEC_N; | |
919 | src += len; | |
920 | } | |
921 | else if (src[0] == '(') | |
922 | { | |
923 | /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or | |
8d4d84c2 | 924 | @(r0, rn). */ |
252b5132 RH |
925 | src++; |
926 | len = parse_reg (src, &mode, &(op->reg)); | |
927 | if (len && mode == A_REG_N) | |
928 | { | |
929 | src += len; | |
930 | if (op->reg != 0) | |
931 | { | |
932 | as_bad (_("must be @(r0,...)")); | |
933 | } | |
934 | if (src[0] == ',') | |
252b5132 | 935 | { |
8d4d84c2 AO |
936 | src++; |
937 | /* Now can be rn or gbr. */ | |
938 | len = parse_reg (src, &mode, &(op->reg)); | |
939 | } | |
940 | else | |
941 | { | |
942 | len = 0; | |
252b5132 | 943 | } |
8d4d84c2 | 944 | if (len) |
252b5132 | 945 | { |
8d4d84c2 AO |
946 | if (mode == A_GBR) |
947 | { | |
948 | op->type = A_R0_GBR; | |
949 | } | |
950 | else if (mode == A_REG_N) | |
951 | { | |
952 | op->type = A_IND_R0_REG_N; | |
953 | } | |
954 | else | |
955 | { | |
956 | as_bad (_("syntax error in @(r0,...)")); | |
957 | } | |
252b5132 RH |
958 | } |
959 | else | |
960 | { | |
8d4d84c2 | 961 | as_bad (_("syntax error in @(r0...)")); |
252b5132 RH |
962 | } |
963 | } | |
964 | else | |
965 | { | |
8d4d84c2 | 966 | /* Must be an @(disp,.. thing). */ |
015551fc | 967 | src = parse_exp (src, op); |
252b5132 RH |
968 | if (src[0] == ',') |
969 | src++; | |
8d4d84c2 | 970 | /* Now can be rn, gbr or pc. */ |
252b5132 RH |
971 | len = parse_reg (src, &mode, &op->reg); |
972 | if (len) | |
973 | { | |
974 | if (mode == A_REG_N) | |
975 | { | |
976 | op->type = A_DISP_REG_N; | |
977 | } | |
978 | else if (mode == A_GBR) | |
979 | { | |
980 | op->type = A_DISP_GBR; | |
981 | } | |
015551fc | 982 | else if (mode == A_PC) |
252b5132 | 983 | { |
c4aa876b NC |
984 | /* Turn a plain @(4,pc) into @(.+4,pc). */ |
985 | if (op->immediate.X_op == O_constant) | |
986 | { | |
7679ead9 | 987 | op->immediate.X_add_symbol = dot (); |
c4aa876b | 988 | op->immediate.X_op = O_symbol; |
7679ead9 | 989 | op->type = A_DISP_PC; |
c4aa876b | 990 | } |
7679ead9 AO |
991 | else |
992 | op->type = A_DISP_PC_ABS; | |
252b5132 RH |
993 | } |
994 | else | |
995 | { | |
996 | as_bad (_("syntax error in @(disp,[Rn, gbr, pc])")); | |
997 | } | |
998 | } | |
999 | else | |
1000 | { | |
1001 | as_bad (_("syntax error in @(disp,[Rn, gbr, pc])")); | |
1002 | } | |
1003 | } | |
1004 | src += len; | |
1005 | if (src[0] != ')') | |
1006 | as_bad (_("expecting )")); | |
1007 | else | |
1008 | src++; | |
1009 | } | |
1010 | else | |
1011 | { | |
1012 | src += parse_reg (src, &mode, &(op->reg)); | |
1013 | if (mode != A_REG_N) | |
006299d3 NC |
1014 | as_bad (_("illegal register after @")); |
1015 | ||
252b5132 RH |
1016 | if (src[0] == '+') |
1017 | { | |
1000a02a NC |
1018 | char l0, l1; |
1019 | ||
252b5132 | 1020 | src++; |
1000a02a NC |
1021 | l0 = TOLOWER (src[0]); |
1022 | l1 = TOLOWER (src[1]); | |
1023 | ||
1024 | if ((l0 == 'r' && l1 == '8') | |
1025 | || (l0 == 'i' && (l1 == 'x' || l1 == 's'))) | |
d4845d57 JR |
1026 | { |
1027 | src += 2; | |
1028 | op->type = A_PMOD_N; | |
1029 | } | |
006299d3 NC |
1030 | else if ( (l0 == 'r' && l1 == '9') |
1031 | || (l0 == 'i' && l1 == 'y')) | |
d4845d57 JR |
1032 | { |
1033 | src += 2; | |
1034 | op->type = A_PMODY_N; | |
1035 | } | |
1036 | else | |
1037 | op->type = A_INC_N; | |
252b5132 RH |
1038 | } |
1039 | else | |
006299d3 | 1040 | op->type = A_IND_N; |
252b5132 RH |
1041 | } |
1042 | return src; | |
1043 | } | |
1044 | ||
1045 | static void | |
1046 | get_operand (ptr, op) | |
1047 | char **ptr; | |
1048 | sh_operand_info *op; | |
1049 | { | |
1050 | char *src = *ptr; | |
1051 | int mode = -1; | |
1052 | unsigned int len; | |
1053 | ||
1054 | if (src[0] == '#') | |
1055 | { | |
1056 | src++; | |
015551fc | 1057 | *ptr = parse_exp (src, op); |
252b5132 RH |
1058 | op->type = A_IMM; |
1059 | return; | |
1060 | } | |
1061 | ||
1062 | else if (src[0] == '@') | |
1063 | { | |
1064 | *ptr = parse_at (src, op); | |
1065 | return; | |
1066 | } | |
1067 | len = parse_reg (src, &mode, &(op->reg)); | |
1068 | if (len) | |
1069 | { | |
1070 | *ptr = src + len; | |
1071 | op->type = mode; | |
1072 | return; | |
1073 | } | |
1074 | else | |
1075 | { | |
6b31947e | 1076 | /* Not a reg, the only thing left is a displacement. */ |
015551fc | 1077 | *ptr = parse_exp (src, op); |
252b5132 RH |
1078 | op->type = A_DISP_PC; |
1079 | return; | |
1080 | } | |
1081 | } | |
1082 | ||
c4aa876b | 1083 | static char * |
252b5132 RH |
1084 | get_operands (info, args, operand) |
1085 | sh_opcode_info *info; | |
1086 | char *args; | |
1087 | sh_operand_info *operand; | |
252b5132 RH |
1088 | { |
1089 | char *ptr = args; | |
1090 | if (info->arg[0]) | |
1091 | { | |
d4845d57 JR |
1092 | /* The pre-processor will eliminate whitespace in front of '@' |
1093 | after the first argument; we may be called multiple times | |
1094 | from assemble_ppi, so don't insist on finding whitespace here. */ | |
1095 | if (*ptr == ' ') | |
1096 | ptr++; | |
252b5132 RH |
1097 | |
1098 | get_operand (&ptr, operand + 0); | |
1099 | if (info->arg[1]) | |
1100 | { | |
1101 | if (*ptr == ',') | |
1102 | { | |
1103 | ptr++; | |
1104 | } | |
1105 | get_operand (&ptr, operand + 1); | |
52ccafd0 JR |
1106 | /* ??? Hack: psha/pshl have a varying operand number depending on |
1107 | the type of the first operand. We handle this by having the | |
1108 | three-operand version first and reducing the number of operands | |
1109 | parsed to two if we see that the first operand is an immediate. | |
1110 | This works because no insn with three operands has an immediate | |
1111 | as first operand. */ | |
1112 | if (info->arg[2] && operand[0].type != A_IMM) | |
252b5132 RH |
1113 | { |
1114 | if (*ptr == ',') | |
1115 | { | |
1116 | ptr++; | |
1117 | } | |
1118 | get_operand (&ptr, operand + 2); | |
1119 | } | |
1120 | else | |
1121 | { | |
1122 | operand[2].type = 0; | |
1123 | } | |
1124 | } | |
1125 | else | |
1126 | { | |
1127 | operand[1].type = 0; | |
1128 | operand[2].type = 0; | |
1129 | } | |
1130 | } | |
1131 | else | |
1132 | { | |
1133 | operand[0].type = 0; | |
1134 | operand[1].type = 0; | |
1135 | operand[2].type = 0; | |
1136 | } | |
1137 | return ptr; | |
1138 | } | |
1139 | ||
1140 | /* Passed a pointer to a list of opcodes which use different | |
1141 | addressing modes, return the opcode which matches the opcodes | |
6b31947e | 1142 | provided. */ |
252b5132 | 1143 | |
c4aa876b | 1144 | static sh_opcode_info * |
252b5132 RH |
1145 | get_specific (opcode, operands) |
1146 | sh_opcode_info *opcode; | |
1147 | sh_operand_info *operands; | |
1148 | { | |
1149 | sh_opcode_info *this_try = opcode; | |
1150 | char *name = opcode->name; | |
1151 | int n = 0; | |
c4aa876b | 1152 | |
252b5132 RH |
1153 | while (opcode->name) |
1154 | { | |
1155 | this_try = opcode++; | |
1156 | if (this_try->name != name) | |
1157 | { | |
1158 | /* We've looked so far down the table that we've run out of | |
6b31947e | 1159 | opcodes with the same name. */ |
252b5132 RH |
1160 | return 0; |
1161 | } | |
c4aa876b | 1162 | |
6b31947e | 1163 | /* Look at both operands needed by the opcodes and provided by |
252b5132 RH |
1164 | the user - since an arg test will often fail on the same arg |
1165 | again and again, we'll try and test the last failing arg the | |
6b31947e | 1166 | first on each opcode try. */ |
252b5132 RH |
1167 | for (n = 0; this_try->arg[n]; n++) |
1168 | { | |
1169 | sh_operand_info *user = operands + n; | |
1170 | sh_arg_type arg = this_try->arg[n]; | |
c4aa876b | 1171 | |
252b5132 RH |
1172 | switch (arg) |
1173 | { | |
7679ead9 AO |
1174 | case A_DISP_PC: |
1175 | if (user->type == A_DISP_PC_ABS) | |
1176 | break; | |
1177 | /* Fall through. */ | |
252b5132 RH |
1178 | case A_IMM: |
1179 | case A_BDISP12: | |
1180 | case A_BDISP8: | |
1181 | case A_DISP_GBR: | |
252b5132 RH |
1182 | case A_MACH: |
1183 | case A_PR: | |
1184 | case A_MACL: | |
1185 | if (user->type != arg) | |
1186 | goto fail; | |
1187 | break; | |
1188 | case A_R0: | |
1189 | /* opcode needs r0 */ | |
1190 | if (user->type != A_REG_N || user->reg != 0) | |
1191 | goto fail; | |
1192 | break; | |
1193 | case A_R0_GBR: | |
1194 | if (user->type != A_R0_GBR || user->reg != 0) | |
1195 | goto fail; | |
1196 | break; | |
1197 | case F_FR0: | |
1198 | if (user->type != F_REG_N || user->reg != 0) | |
1199 | goto fail; | |
1200 | break; | |
1201 | ||
1202 | case A_REG_N: | |
1203 | case A_INC_N: | |
1204 | case A_DEC_N: | |
1205 | case A_IND_N: | |
1206 | case A_IND_R0_REG_N: | |
1207 | case A_DISP_REG_N: | |
1208 | case F_REG_N: | |
1209 | case D_REG_N: | |
1210 | case X_REG_N: | |
1211 | case V_REG_N: | |
1212 | case FPUL_N: | |
1213 | case FPSCR_N: | |
d4845d57 JR |
1214 | case A_PMOD_N: |
1215 | case A_PMODY_N: | |
1216 | case DSP_REG_N: | |
252b5132 RH |
1217 | /* Opcode needs rn */ |
1218 | if (user->type != arg) | |
1219 | goto fail; | |
1220 | reg_n = user->reg; | |
1221 | break; | |
252b5132 RH |
1222 | case DX_REG_N: |
1223 | if (user->type != D_REG_N && user->type != X_REG_N) | |
1224 | goto fail; | |
1225 | reg_n = user->reg; | |
1226 | break; | |
1227 | case A_GBR: | |
1228 | case A_SR: | |
1229 | case A_VBR: | |
d4845d57 JR |
1230 | case A_DSR: |
1231 | case A_MOD: | |
1232 | case A_RE: | |
1233 | case A_RS: | |
252b5132 RH |
1234 | case A_SSR: |
1235 | case A_SPC: | |
1236 | case A_SGR: | |
1237 | case A_DBR: | |
1238 | if (user->type != arg) | |
1239 | goto fail; | |
1240 | break; | |
1241 | ||
c4aa876b | 1242 | case A_REG_B: |
252b5132 RH |
1243 | if (user->type != arg) |
1244 | goto fail; | |
1245 | reg_b = user->reg; | |
1246 | break; | |
1247 | ||
1248 | case A_REG_M: | |
1249 | case A_INC_M: | |
1250 | case A_DEC_M: | |
1251 | case A_IND_M: | |
1252 | case A_IND_R0_REG_M: | |
1253 | case A_DISP_REG_M: | |
d4845d57 | 1254 | case DSP_REG_M: |
252b5132 RH |
1255 | /* Opcode needs rn */ |
1256 | if (user->type != arg - A_REG_M + A_REG_N) | |
1257 | goto fail; | |
1258 | reg_m = user->reg; | |
1259 | break; | |
1260 | ||
d4845d57 JR |
1261 | case DSP_REG_X: |
1262 | if (user->type != DSP_REG_N) | |
1263 | goto fail; | |
1264 | switch (user->reg) | |
1265 | { | |
1266 | case A_X0_NUM: | |
1267 | reg_x = 0; | |
1268 | break; | |
1269 | case A_X1_NUM: | |
1270 | reg_x = 1; | |
1271 | break; | |
1272 | case A_A0_NUM: | |
1273 | reg_x = 2; | |
1274 | break; | |
1275 | case A_A1_NUM: | |
1276 | reg_x = 3; | |
1277 | break; | |
1278 | default: | |
1279 | goto fail; | |
1280 | } | |
1281 | break; | |
1282 | ||
1283 | case DSP_REG_Y: | |
1284 | if (user->type != DSP_REG_N) | |
1285 | goto fail; | |
1286 | switch (user->reg) | |
1287 | { | |
1288 | case A_Y0_NUM: | |
1289 | reg_y = 0; | |
1290 | break; | |
1291 | case A_Y1_NUM: | |
1292 | reg_y = 1; | |
1293 | break; | |
1294 | case A_M0_NUM: | |
1295 | reg_y = 2; | |
1296 | break; | |
1297 | case A_M1_NUM: | |
1298 | reg_y = 3; | |
1299 | break; | |
1300 | default: | |
1301 | goto fail; | |
1302 | } | |
1303 | break; | |
1304 | ||
1305 | case DSP_REG_E: | |
1306 | if (user->type != DSP_REG_N) | |
1307 | goto fail; | |
1308 | switch (user->reg) | |
1309 | { | |
1310 | case A_X0_NUM: | |
1311 | reg_efg = 0 << 10; | |
1312 | break; | |
1313 | case A_X1_NUM: | |
1314 | reg_efg = 1 << 10; | |
1315 | break; | |
1316 | case A_Y0_NUM: | |
1317 | reg_efg = 2 << 10; | |
1318 | break; | |
1319 | case A_A1_NUM: | |
1320 | reg_efg = 3 << 10; | |
1321 | break; | |
1322 | default: | |
1323 | goto fail; | |
1324 | } | |
1325 | break; | |
1326 | ||
1327 | case DSP_REG_F: | |
1328 | if (user->type != DSP_REG_N) | |
1329 | goto fail; | |
1330 | switch (user->reg) | |
1331 | { | |
1332 | case A_Y0_NUM: | |
1333 | reg_efg |= 0 << 8; | |
1334 | break; | |
1335 | case A_Y1_NUM: | |
1336 | reg_efg |= 1 << 8; | |
1337 | break; | |
1338 | case A_X0_NUM: | |
1339 | reg_efg |= 2 << 8; | |
1340 | break; | |
1341 | case A_A1_NUM: | |
1342 | reg_efg |= 3 << 8; | |
1343 | break; | |
1344 | default: | |
1345 | goto fail; | |
1346 | } | |
1347 | break; | |
1348 | ||
1349 | case DSP_REG_G: | |
1350 | if (user->type != DSP_REG_N) | |
1351 | goto fail; | |
1352 | switch (user->reg) | |
1353 | { | |
1354 | case A_M0_NUM: | |
1355 | reg_efg |= 0 << 2; | |
1356 | break; | |
1357 | case A_M1_NUM: | |
1358 | reg_efg |= 1 << 2; | |
1359 | break; | |
1360 | case A_A0_NUM: | |
1361 | reg_efg |= 2 << 2; | |
1362 | break; | |
1363 | case A_A1_NUM: | |
1364 | reg_efg |= 3 << 2; | |
1365 | break; | |
1366 | default: | |
1367 | goto fail; | |
1368 | } | |
1369 | break; | |
1370 | ||
1371 | case A_A0: | |
1372 | if (user->type != DSP_REG_N || user->reg != A_A0_NUM) | |
1373 | goto fail; | |
1374 | break; | |
1375 | case A_X0: | |
1376 | if (user->type != DSP_REG_N || user->reg != A_X0_NUM) | |
1377 | goto fail; | |
1378 | break; | |
1379 | case A_X1: | |
1380 | if (user->type != DSP_REG_N || user->reg != A_X1_NUM) | |
1381 | goto fail; | |
1382 | break; | |
1383 | case A_Y0: | |
1384 | if (user->type != DSP_REG_N || user->reg != A_Y0_NUM) | |
1385 | goto fail; | |
1386 | break; | |
1387 | case A_Y1: | |
1388 | if (user->type != DSP_REG_N || user->reg != A_Y1_NUM) | |
1389 | goto fail; | |
1390 | break; | |
1391 | ||
252b5132 RH |
1392 | case F_REG_M: |
1393 | case D_REG_M: | |
1394 | case X_REG_M: | |
1395 | case V_REG_M: | |
1396 | case FPUL_M: | |
1397 | case FPSCR_M: | |
1398 | /* Opcode needs rn */ | |
1399 | if (user->type != arg - F_REG_M + F_REG_N) | |
1400 | goto fail; | |
1401 | reg_m = user->reg; | |
1402 | break; | |
1403 | case DX_REG_M: | |
1404 | if (user->type != D_REG_N && user->type != X_REG_N) | |
1405 | goto fail; | |
1406 | reg_m = user->reg; | |
1407 | break; | |
1408 | case XMTRX_M4: | |
1409 | if (user->type != XMTRX_M4) | |
1410 | goto fail; | |
1411 | reg_m = 4; | |
1412 | break; | |
c4aa876b | 1413 | |
252b5132 RH |
1414 | default: |
1415 | printf (_("unhandled %d\n"), arg); | |
1416 | goto fail; | |
1417 | } | |
1418 | } | |
a37c8f88 JR |
1419 | if ( !(valid_arch & this_try->arch)) |
1420 | goto fail; | |
d4845d57 | 1421 | valid_arch &= this_try->arch; |
252b5132 | 1422 | return this_try; |
c4aa876b NC |
1423 | fail: |
1424 | ; | |
252b5132 RH |
1425 | } |
1426 | ||
1427 | return 0; | |
1428 | } | |
1429 | ||
252b5132 | 1430 | static void |
015551fc | 1431 | insert (where, how, pcrel, op) |
252b5132 RH |
1432 | char *where; |
1433 | int how; | |
1434 | int pcrel; | |
015551fc | 1435 | sh_operand_info *op; |
252b5132 RH |
1436 | { |
1437 | fix_new_exp (frag_now, | |
1438 | where - frag_now->fr_literal, | |
1439 | 2, | |
015551fc | 1440 | &op->immediate, |
252b5132 RH |
1441 | pcrel, |
1442 | how); | |
1443 | } | |
1444 | ||
1445 | static void | |
015551fc | 1446 | build_relax (opcode, op) |
252b5132 | 1447 | sh_opcode_info *opcode; |
015551fc | 1448 | sh_operand_info *op; |
252b5132 RH |
1449 | { |
1450 | int high_byte = target_big_endian ? 0 : 1; | |
1451 | char *p; | |
1452 | ||
1453 | if (opcode->arg[0] == A_BDISP8) | |
1454 | { | |
1455 | int what = (opcode->nibbles[1] & 4) ? COND_JUMP_DELAY : COND_JUMP; | |
1456 | p = frag_var (rs_machine_dependent, | |
1457 | md_relax_table[C (what, COND32)].rlx_length, | |
1458 | md_relax_table[C (what, COND8)].rlx_length, | |
1459 | C (what, 0), | |
015551fc JR |
1460 | op->immediate.X_add_symbol, |
1461 | op->immediate.X_add_number, | |
252b5132 RH |
1462 | 0); |
1463 | p[high_byte] = (opcode->nibbles[0] << 4) | (opcode->nibbles[1]); | |
1464 | } | |
1465 | else if (opcode->arg[0] == A_BDISP12) | |
1466 | { | |
1467 | p = frag_var (rs_machine_dependent, | |
1468 | md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length, | |
1469 | md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length, | |
1470 | C (UNCOND_JUMP, 0), | |
015551fc JR |
1471 | op->immediate.X_add_symbol, |
1472 | op->immediate.X_add_number, | |
252b5132 RH |
1473 | 0); |
1474 | p[high_byte] = (opcode->nibbles[0] << 4); | |
1475 | } | |
1476 | ||
1477 | } | |
1478 | ||
6b31947e | 1479 | /* Insert ldrs & ldre with fancy relocations that relaxation can recognize. */ |
d67b5d6d | 1480 | |
015551fc JR |
1481 | static char * |
1482 | insert_loop_bounds (output, operand) | |
1483 | char *output; | |
1484 | sh_operand_info *operand; | |
1485 | { | |
1486 | char *name; | |
1487 | symbolS *end_sym; | |
1488 | ||
1489 | /* Since the low byte of the opcode will be overwritten by the reloc, we | |
1490 | can just stash the high byte into both bytes and ignore endianness. */ | |
1491 | output[0] = 0x8c; | |
1492 | output[1] = 0x8c; | |
1493 | insert (output, BFD_RELOC_SH_LOOP_START, 1, operand); | |
1494 | insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1); | |
1495 | ||
1496 | if (sh_relax) | |
1497 | { | |
1498 | static int count = 0; | |
1499 | ||
1500 | /* If the last loop insn is a two-byte-insn, it is in danger of being | |
1501 | swapped with the insn after it. To prevent this, create a new | |
1502 | symbol - complete with SH_LABEL reloc - after the last loop insn. | |
1503 | If the last loop insn is four bytes long, the symbol will be | |
1504 | right in the middle, but four byte insns are not swapped anyways. */ | |
1505 | /* A REPEAT takes 6 bytes. The SH has a 32 bit address space. | |
1506 | Hence a 9 digit number should be enough to count all REPEATs. */ | |
1507 | name = alloca (11); | |
1508 | sprintf (name, "_R%x", count++ & 0x3fffffff); | |
c4aa876b | 1509 | end_sym = symbol_new (name, undefined_section, 0, &zero_address_frag); |
015551fc JR |
1510 | /* Make this a local symbol. */ |
1511 | #ifdef OBJ_COFF | |
1512 | SF_SET_LOCAL (end_sym); | |
1513 | #endif /* OBJ_COFF */ | |
1514 | symbol_table_insert (end_sym); | |
1515 | end_sym->sy_value = operand[1].immediate; | |
1516 | end_sym->sy_value.X_add_number += 2; | |
1517 | fix_new (frag_now, frag_now_fix (), 2, end_sym, 0, 1, BFD_RELOC_SH_LABEL); | |
1518 | } | |
1519 | ||
1520 | output = frag_more (2); | |
1521 | output[0] = 0x8e; | |
1522 | output[1] = 0x8e; | |
1523 | insert (output, BFD_RELOC_SH_LOOP_START, 1, operand); | |
1524 | insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1); | |
1525 | ||
1526 | return frag_more (2); | |
1527 | } | |
1528 | ||
d67b5d6d | 1529 | /* Now we know what sort of opcodes it is, let's build the bytes. */ |
6b31947e | 1530 | |
0d10e182 | 1531 | static unsigned int |
252b5132 RH |
1532 | build_Mytes (opcode, operand) |
1533 | sh_opcode_info *opcode; | |
1534 | sh_operand_info *operand; | |
252b5132 RH |
1535 | { |
1536 | int index; | |
1537 | char nbuf[4]; | |
1538 | char *output = frag_more (2); | |
0d10e182 | 1539 | unsigned int size = 2; |
252b5132 RH |
1540 | int low_byte = target_big_endian ? 1 : 0; |
1541 | nbuf[0] = 0; | |
1542 | nbuf[1] = 0; | |
1543 | nbuf[2] = 0; | |
1544 | nbuf[3] = 0; | |
1545 | ||
1546 | for (index = 0; index < 4; index++) | |
1547 | { | |
1548 | sh_nibble_type i = opcode->nibbles[index]; | |
1549 | if (i < 16) | |
1550 | { | |
1551 | nbuf[index] = i; | |
1552 | } | |
1553 | else | |
1554 | { | |
1555 | switch (i) | |
1556 | { | |
1557 | case REG_N: | |
1558 | nbuf[index] = reg_n; | |
1559 | break; | |
1560 | case REG_M: | |
1561 | nbuf[index] = reg_m; | |
1562 | break; | |
d4845d57 JR |
1563 | case SDT_REG_N: |
1564 | if (reg_n < 2 || reg_n > 5) | |
1565 | as_bad (_("Invalid register: 'r%d'"), reg_n); | |
1566 | nbuf[index] = (reg_n & 3) | 4; | |
1567 | break; | |
252b5132 RH |
1568 | case REG_NM: |
1569 | nbuf[index] = reg_n | (reg_m >> 2); | |
1570 | break; | |
c4aa876b | 1571 | case REG_B: |
252b5132 RH |
1572 | nbuf[index] = reg_b | 0x08; |
1573 | break; | |
015551fc JR |
1574 | case IMM0_4BY4: |
1575 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand); | |
1576 | break; | |
1577 | case IMM0_4BY2: | |
1578 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand); | |
1579 | break; | |
1580 | case IMM0_4: | |
1581 | insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand); | |
1582 | break; | |
1583 | case IMM1_4BY4: | |
1584 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand + 1); | |
1585 | break; | |
1586 | case IMM1_4BY2: | |
1587 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand + 1); | |
252b5132 | 1588 | break; |
015551fc JR |
1589 | case IMM1_4: |
1590 | insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand + 1); | |
252b5132 | 1591 | break; |
015551fc JR |
1592 | case IMM0_8BY4: |
1593 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand); | |
252b5132 | 1594 | break; |
015551fc JR |
1595 | case IMM0_8BY2: |
1596 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand); | |
252b5132 | 1597 | break; |
015551fc JR |
1598 | case IMM0_8: |
1599 | insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand); | |
252b5132 | 1600 | break; |
015551fc JR |
1601 | case IMM1_8BY4: |
1602 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand + 1); | |
252b5132 | 1603 | break; |
015551fc JR |
1604 | case IMM1_8BY2: |
1605 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand + 1); | |
1606 | break; | |
1607 | case IMM1_8: | |
1608 | insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand + 1); | |
252b5132 RH |
1609 | break; |
1610 | case PCRELIMM_8BY4: | |
7679ead9 AO |
1611 | insert (output, BFD_RELOC_SH_PCRELIMM8BY4, |
1612 | operand->type != A_DISP_PC_ABS, operand); | |
252b5132 RH |
1613 | break; |
1614 | case PCRELIMM_8BY2: | |
7679ead9 AO |
1615 | insert (output, BFD_RELOC_SH_PCRELIMM8BY2, |
1616 | operand->type != A_DISP_PC_ABS, operand); | |
015551fc JR |
1617 | break; |
1618 | case REPEAT: | |
1619 | output = insert_loop_bounds (output, operand); | |
1620 | nbuf[index] = opcode->nibbles[3]; | |
1621 | operand += 2; | |
252b5132 RH |
1622 | break; |
1623 | default: | |
1624 | printf (_("failed for %d\n"), i); | |
1625 | } | |
1626 | } | |
1627 | } | |
c4aa876b NC |
1628 | if (!target_big_endian) |
1629 | { | |
1630 | output[1] = (nbuf[0] << 4) | (nbuf[1]); | |
1631 | output[0] = (nbuf[2] << 4) | (nbuf[3]); | |
1632 | } | |
1633 | else | |
1634 | { | |
1635 | output[0] = (nbuf[0] << 4) | (nbuf[1]); | |
1636 | output[1] = (nbuf[2] << 4) | (nbuf[3]); | |
1637 | } | |
0d10e182 | 1638 | return size; |
252b5132 RH |
1639 | } |
1640 | ||
d4845d57 JR |
1641 | /* Find an opcode at the start of *STR_P in the hash table, and set |
1642 | *STR_P to the first character after the last one read. */ | |
252b5132 | 1643 | |
d4845d57 JR |
1644 | static sh_opcode_info * |
1645 | find_cooked_opcode (str_p) | |
1646 | char **str_p; | |
252b5132 | 1647 | { |
d4845d57 | 1648 | char *str = *str_p; |
252b5132 RH |
1649 | unsigned char *op_start; |
1650 | unsigned char *op_end; | |
252b5132 RH |
1651 | char name[20]; |
1652 | int nlen = 0; | |
c4aa876b | 1653 | |
6b31947e | 1654 | /* Drop leading whitespace. */ |
252b5132 RH |
1655 | while (*str == ' ') |
1656 | str++; | |
1657 | ||
d4845d57 JR |
1658 | /* Find the op code end. |
1659 | The pre-processor will eliminate whitespace in front of | |
1660 | any '@' after the first argument; we may be called from | |
1661 | assemble_ppi, so the opcode might be terminated by an '@'. */ | |
252b5132 RH |
1662 | for (op_start = op_end = (unsigned char *) (str); |
1663 | *op_end | |
1664 | && nlen < 20 | |
d4845d57 | 1665 | && !is_end_of_line[*op_end] && *op_end != ' ' && *op_end != '@'; |
252b5132 RH |
1666 | op_end++) |
1667 | { | |
1668 | unsigned char c = op_start[nlen]; | |
1669 | ||
1670 | /* The machine independent code will convert CMP/EQ into cmp/EQ | |
d4845d57 JR |
1671 | because it thinks the '/' is the end of the symbol. Moreover, |
1672 | all but the first sub-insn is a parallel processing insn won't | |
3882b010 | 1673 | be capitalized. Instead of hacking up the machine independent |
d4845d57 | 1674 | code, we just deal with it here. */ |
3882b010 | 1675 | c = TOLOWER (c); |
252b5132 RH |
1676 | name[nlen] = c; |
1677 | nlen++; | |
1678 | } | |
c4aa876b | 1679 | |
252b5132 | 1680 | name[nlen] = 0; |
d4845d57 | 1681 | *str_p = op_end; |
252b5132 RH |
1682 | |
1683 | if (nlen == 0) | |
6b31947e | 1684 | as_bad (_("can't find opcode ")); |
252b5132 | 1685 | |
d4845d57 JR |
1686 | return (sh_opcode_info *) hash_find (opcode_hash_control, name); |
1687 | } | |
1688 | ||
1689 | /* Assemble a parallel processing insn. */ | |
1690 | #define DDT_BASE 0xf000 /* Base value for double data transfer insns */ | |
6b31947e | 1691 | |
0d10e182 | 1692 | static unsigned int |
d4845d57 JR |
1693 | assemble_ppi (op_end, opcode) |
1694 | char *op_end; | |
1695 | sh_opcode_info *opcode; | |
1696 | { | |
1697 | int movx = 0; | |
1698 | int movy = 0; | |
1699 | int cond = 0; | |
1700 | int field_b = 0; | |
1701 | char *output; | |
1702 | int move_code; | |
0d10e182 | 1703 | unsigned int size; |
d4845d57 JR |
1704 | |
1705 | /* Some insn ignore one or more register fields, e.g. psts machl,a0. | |
1706 | Make sure we encode a defined insn pattern. */ | |
1707 | reg_x = 0; | |
1708 | reg_y = 0; | |
1709 | ||
1710 | for (;;) | |
1711 | { | |
1712 | sh_operand_info operand[3]; | |
1713 | ||
1714 | if (opcode->arg[0] != A_END) | |
1715 | op_end = get_operands (opcode, op_end, operand); | |
1716 | opcode = get_specific (opcode, operand); | |
1717 | if (opcode == 0) | |
1718 | { | |
6b31947e | 1719 | /* Couldn't find an opcode which matched the operands. */ |
d4845d57 | 1720 | char *where = frag_more (2); |
0d10e182 | 1721 | size = 2; |
d4845d57 JR |
1722 | |
1723 | where[0] = 0x0; | |
1724 | where[1] = 0x0; | |
1725 | as_bad (_("invalid operands for opcode")); | |
0d10e182 | 1726 | return size; |
d4845d57 | 1727 | } |
c4aa876b | 1728 | |
d4845d57 JR |
1729 | if (opcode->nibbles[0] != PPI) |
1730 | as_bad (_("insn can't be combined with parallel processing insn")); | |
1731 | ||
1732 | switch (opcode->nibbles[1]) | |
1733 | { | |
1734 | ||
1735 | case NOPX: | |
1736 | if (movx) | |
1737 | as_bad (_("multiple movx specifications")); | |
1738 | movx = DDT_BASE; | |
1739 | break; | |
1740 | case NOPY: | |
1741 | if (movy) | |
1742 | as_bad (_("multiple movy specifications")); | |
1743 | movy = DDT_BASE; | |
1744 | break; | |
1745 | ||
1746 | case MOVX: | |
1747 | if (movx) | |
1748 | as_bad (_("multiple movx specifications")); | |
1749 | if (reg_n < 4 || reg_n > 5) | |
1750 | as_bad (_("invalid movx address register")); | |
1751 | if (opcode->nibbles[2] & 8) | |
1752 | { | |
1753 | if (reg_m == A_A1_NUM) | |
1754 | movx = 1 << 7; | |
1755 | else if (reg_m != A_A0_NUM) | |
1756 | as_bad (_("invalid movx dsp register")); | |
1757 | } | |
1758 | else | |
1759 | { | |
1760 | if (reg_x > 1) | |
1761 | as_bad (_("invalid movx dsp register")); | |
1762 | movx = reg_x << 7; | |
1763 | } | |
1764 | movx += ((reg_n - 4) << 9) + (opcode->nibbles[2] << 2) + DDT_BASE; | |
1765 | break; | |
1766 | ||
1767 | case MOVY: | |
1768 | if (movy) | |
1769 | as_bad (_("multiple movy specifications")); | |
1770 | if (opcode->nibbles[2] & 8) | |
1771 | { | |
1772 | /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode, | |
1773 | so add 8 more. */ | |
1774 | movy = 8; | |
1775 | if (reg_m == A_A1_NUM) | |
1776 | movy += 1 << 6; | |
1777 | else if (reg_m != A_A0_NUM) | |
1778 | as_bad (_("invalid movy dsp register")); | |
1779 | } | |
1780 | else | |
1781 | { | |
1782 | if (reg_y > 1) | |
1783 | as_bad (_("invalid movy dsp register")); | |
1784 | movy = reg_y << 6; | |
1785 | } | |
1786 | if (reg_n < 6 || reg_n > 7) | |
1787 | as_bad (_("invalid movy address register")); | |
1788 | movy += ((reg_n - 6) << 8) + opcode->nibbles[2] + DDT_BASE; | |
1789 | break; | |
1790 | ||
1791 | case PSH: | |
015551fc | 1792 | if (operand[0].immediate.X_op != O_constant) |
d4845d57 JR |
1793 | as_bad (_("dsp immediate shift value not constant")); |
1794 | field_b = ((opcode->nibbles[2] << 12) | |
015551fc | 1795 | | (operand[0].immediate.X_add_number & 127) << 4 |
d4845d57 JR |
1796 | | reg_n); |
1797 | break; | |
1798 | case PPI3: | |
1799 | if (field_b) | |
1800 | as_bad (_("multiple parallel processing specifications")); | |
1801 | field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8) | |
1802 | + (reg_x << 6) + (reg_y << 4) + reg_n); | |
1803 | break; | |
1804 | case PDC: | |
1805 | if (cond) | |
1806 | as_bad (_("multiple condition specifications")); | |
1807 | cond = opcode->nibbles[2] << 8; | |
1808 | if (*op_end) | |
1809 | goto skip_cond_check; | |
1810 | break; | |
1811 | case PPIC: | |
1812 | if (field_b) | |
1813 | as_bad (_("multiple parallel processing specifications")); | |
1814 | field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8) | |
1815 | + cond + (reg_x << 6) + (reg_y << 4) + reg_n); | |
1816 | cond = 0; | |
1817 | break; | |
1818 | case PMUL: | |
1819 | if (field_b) | |
1820 | { | |
1821 | if ((field_b & 0xef00) != 0xa100) | |
1822 | as_bad (_("insn cannot be combined with pmuls")); | |
1823 | field_b -= 0x8100; | |
1824 | switch (field_b & 0xf) | |
1825 | { | |
1826 | case A_X0_NUM: | |
1827 | field_b += 0 - A_X0_NUM; | |
1828 | break; | |
1829 | case A_Y0_NUM: | |
1830 | field_b += 1 - A_Y0_NUM; | |
1831 | break; | |
1832 | case A_A0_NUM: | |
1833 | field_b += 2 - A_A0_NUM; | |
1834 | break; | |
1835 | case A_A1_NUM: | |
1836 | field_b += 3 - A_A1_NUM; | |
1837 | break; | |
1838 | default: | |
1839 | as_bad (_("bad padd / psub pmuls output operand")); | |
1840 | } | |
1841 | } | |
1842 | field_b += 0x4000 + reg_efg; | |
1843 | break; | |
1844 | default: | |
1845 | abort (); | |
1846 | } | |
1847 | if (cond) | |
1848 | { | |
1849 | as_bad (_("condition not followed by conditionalizable insn")); | |
1850 | cond = 0; | |
1851 | } | |
1852 | if (! *op_end) | |
1853 | break; | |
1854 | skip_cond_check: | |
1855 | opcode = find_cooked_opcode (&op_end); | |
1856 | if (opcode == NULL) | |
1857 | { | |
1858 | (as_bad | |
1859 | (_("unrecognized characters at end of parallel processing insn"))); | |
1860 | break; | |
1861 | } | |
1862 | } | |
1863 | ||
1864 | move_code = movx | movy; | |
1865 | if (field_b) | |
1866 | { | |
1867 | /* Parallel processing insn. */ | |
1868 | unsigned long ppi_code = (movx | movy | 0xf800) << 16 | field_b; | |
1869 | ||
1870 | output = frag_more (4); | |
0d10e182 | 1871 | size = 4; |
d4845d57 JR |
1872 | if (! target_big_endian) |
1873 | { | |
1874 | output[3] = ppi_code >> 8; | |
1875 | output[2] = ppi_code; | |
1876 | } | |
1877 | else | |
1878 | { | |
1879 | output[2] = ppi_code >> 8; | |
1880 | output[3] = ppi_code; | |
1881 | } | |
1882 | move_code |= 0xf800; | |
1883 | } | |
1884 | else | |
0d10e182 JL |
1885 | { |
1886 | /* Just a double data transfer. */ | |
1887 | output = frag_more (2); | |
1888 | size = 2; | |
1889 | } | |
d4845d57 JR |
1890 | if (! target_big_endian) |
1891 | { | |
1892 | output[1] = move_code >> 8; | |
1893 | output[0] = move_code; | |
1894 | } | |
1895 | else | |
1896 | { | |
1897 | output[0] = move_code >> 8; | |
1898 | output[1] = move_code; | |
1899 | } | |
0d10e182 | 1900 | return size; |
d4845d57 JR |
1901 | } |
1902 | ||
1903 | /* This is the guts of the machine-dependent assembler. STR points to a | |
1904 | machine dependent instruction. This function is supposed to emit | |
6b31947e | 1905 | the frags/bytes it assembles to. */ |
d4845d57 JR |
1906 | |
1907 | void | |
1908 | md_assemble (str) | |
1909 | char *str; | |
1910 | { | |
1911 | unsigned char *op_end; | |
1912 | sh_operand_info operand[3]; | |
1913 | sh_opcode_info *opcode; | |
dda5ecfc | 1914 | unsigned int size = 0; |
d4845d57 JR |
1915 | |
1916 | opcode = find_cooked_opcode (&str); | |
1917 | op_end = str; | |
252b5132 RH |
1918 | |
1919 | if (opcode == NULL) | |
1920 | { | |
1921 | as_bad (_("unknown opcode")); | |
1922 | return; | |
1923 | } | |
1924 | ||
1925 | if (sh_relax | |
1926 | && ! seg_info (now_seg)->tc_segment_info_data.in_code) | |
1927 | { | |
1928 | /* Output a CODE reloc to tell the linker that the following | |
1929 | bytes are instructions, not data. */ | |
1930 | fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, | |
1931 | BFD_RELOC_SH_CODE); | |
1932 | seg_info (now_seg)->tc_segment_info_data.in_code = 1; | |
1933 | } | |
1934 | ||
d4845d57 JR |
1935 | if (opcode->nibbles[0] == PPI) |
1936 | { | |
0d10e182 | 1937 | size = assemble_ppi (op_end, opcode); |
252b5132 RH |
1938 | } |
1939 | else | |
1940 | { | |
0d10e182 JL |
1941 | if (opcode->arg[0] == A_BDISP12 |
1942 | || opcode->arg[0] == A_BDISP8) | |
252b5132 | 1943 | { |
0d10e182 JL |
1944 | parse_exp (op_end + 1, &operand[0]); |
1945 | build_relax (opcode, &operand[0]); | |
5fc44b2d JR |
1946 | } |
1947 | else | |
1948 | { | |
0d10e182 JL |
1949 | if (opcode->arg[0] == A_END) |
1950 | { | |
1951 | /* Ignore trailing whitespace. If there is any, it has already | |
1952 | been compressed to a single space. */ | |
1953 | if (*op_end == ' ') | |
1954 | op_end++; | |
1955 | } | |
1956 | else | |
1957 | { | |
1958 | op_end = get_operands (opcode, op_end, operand); | |
1959 | } | |
1960 | opcode = get_specific (opcode, operand); | |
252b5132 | 1961 | |
0d10e182 JL |
1962 | if (opcode == 0) |
1963 | { | |
1964 | /* Couldn't find an opcode which matched the operands. */ | |
1965 | char *where = frag_more (2); | |
1966 | size = 2; | |
252b5132 | 1967 | |
0d10e182 JL |
1968 | where[0] = 0x0; |
1969 | where[1] = 0x0; | |
1970 | as_bad (_("invalid operands for opcode")); | |
1971 | } | |
1972 | else | |
1973 | { | |
1974 | if (*op_end) | |
1975 | as_bad (_("excess operands: '%s'"), op_end); | |
1976 | ||
1977 | size = build_Mytes (opcode, operand); | |
1978 | } | |
252b5132 | 1979 | } |
0d10e182 | 1980 | } |
252b5132 | 1981 | |
2bc0a128 | 1982 | #ifdef BFD_ASSEMBLER |
4dc7ead9 | 1983 | dwarf2_emit_insn (size); |
2bc0a128 | 1984 | #endif |
252b5132 RH |
1985 | } |
1986 | ||
1987 | /* This routine is called each time a label definition is seen. It | |
1988 | emits a BFD_RELOC_SH_LABEL reloc if necessary. */ | |
1989 | ||
1990 | void | |
1991 | sh_frob_label () | |
1992 | { | |
1993 | static fragS *last_label_frag; | |
1994 | static int last_label_offset; | |
1995 | ||
1996 | if (sh_relax | |
1997 | && seg_info (now_seg)->tc_segment_info_data.in_code) | |
1998 | { | |
1999 | int offset; | |
2000 | ||
2001 | offset = frag_now_fix (); | |
2002 | if (frag_now != last_label_frag | |
2003 | || offset != last_label_offset) | |
c4aa876b | 2004 | { |
252b5132 RH |
2005 | fix_new (frag_now, offset, 2, &abs_symbol, 0, 0, BFD_RELOC_SH_LABEL); |
2006 | last_label_frag = frag_now; | |
2007 | last_label_offset = offset; | |
2008 | } | |
2009 | } | |
2010 | } | |
2011 | ||
2012 | /* This routine is called when the assembler is about to output some | |
2013 | data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */ | |
2014 | ||
2015 | void | |
2016 | sh_flush_pending_output () | |
2017 | { | |
2018 | if (sh_relax | |
2019 | && seg_info (now_seg)->tc_segment_info_data.in_code) | |
2020 | { | |
2021 | fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, | |
2022 | BFD_RELOC_SH_DATA); | |
2023 | seg_info (now_seg)->tc_segment_info_data.in_code = 0; | |
2024 | } | |
2025 | } | |
2026 | ||
2027 | symbolS * | |
c0fecd35 | 2028 | md_undefined_symbol (name) |
538cd60f | 2029 | char *name ATTRIBUTE_UNUSED; |
252b5132 RH |
2030 | { |
2031 | return 0; | |
2032 | } | |
2033 | ||
2034 | #ifdef OBJ_COFF | |
056350c6 | 2035 | #ifndef BFD_ASSEMBLER |
252b5132 RH |
2036 | |
2037 | void | |
c0fecd35 AM |
2038 | tc_crawl_symbol_chain (headers) |
2039 | object_headers *headers; | |
252b5132 RH |
2040 | { |
2041 | printf (_("call to tc_crawl_symbol_chain \n")); | |
2042 | } | |
2043 | ||
2044 | void | |
c0fecd35 AM |
2045 | tc_headers_hook (headers) |
2046 | object_headers *headers; | |
252b5132 RH |
2047 | { |
2048 | printf (_("call to tc_headers_hook \n")); | |
2049 | } | |
2050 | ||
056350c6 | 2051 | #endif |
252b5132 RH |
2052 | #endif |
2053 | ||
6b31947e NC |
2054 | /* Various routines to kill one day. */ |
2055 | /* Equal to MAX_PRECISION in atof-ieee.c. */ | |
252b5132 RH |
2056 | #define MAX_LITTLENUMS 6 |
2057 | ||
6b31947e NC |
2058 | /* Turn a string in input_line_pointer into a floating point constant |
2059 | of type TYPE, and store the appropriate bytes in *LITP. The number | |
2060 | of LITTLENUMS emitted is stored in *SIZEP . An error message is | |
2061 | returned, or NULL on OK. */ | |
2062 | ||
252b5132 RH |
2063 | char * |
2064 | md_atof (type, litP, sizeP) | |
2065 | int type; | |
2066 | char *litP; | |
2067 | int *sizeP; | |
2068 | { | |
2069 | int prec; | |
2070 | LITTLENUM_TYPE words[4]; | |
2071 | char *t; | |
2072 | int i; | |
2073 | ||
2074 | switch (type) | |
2075 | { | |
2076 | case 'f': | |
2077 | prec = 2; | |
2078 | break; | |
2079 | ||
2080 | case 'd': | |
2081 | prec = 4; | |
2082 | break; | |
2083 | ||
2084 | default: | |
2085 | *sizeP = 0; | |
2086 | return _("bad call to md_atof"); | |
2087 | } | |
2088 | ||
2089 | t = atof_ieee (input_line_pointer, type, words); | |
2090 | if (t) | |
2091 | input_line_pointer = t; | |
2092 | ||
2093 | *sizeP = prec * 2; | |
2094 | ||
2095 | if (! target_big_endian) | |
2096 | { | |
2097 | for (i = prec - 1; i >= 0; i--) | |
2098 | { | |
2099 | md_number_to_chars (litP, (valueT) words[i], 2); | |
2100 | litP += 2; | |
2101 | } | |
2102 | } | |
2103 | else | |
2104 | { | |
2105 | for (i = 0; i < prec; i++) | |
2106 | { | |
2107 | md_number_to_chars (litP, (valueT) words[i], 2); | |
2108 | litP += 2; | |
2109 | } | |
2110 | } | |
c4aa876b | 2111 | |
252b5132 RH |
2112 | return NULL; |
2113 | } | |
2114 | ||
2115 | /* Handle the .uses pseudo-op. This pseudo-op is used just before a | |
2116 | call instruction. It refers to a label of the instruction which | |
2117 | loads the register which the call uses. We use it to generate a | |
2118 | special reloc for the linker. */ | |
2119 | ||
2120 | static void | |
2121 | s_uses (ignore) | |
43841e91 | 2122 | int ignore ATTRIBUTE_UNUSED; |
252b5132 RH |
2123 | { |
2124 | expressionS ex; | |
2125 | ||
2126 | if (! sh_relax) | |
2127 | as_warn (_(".uses pseudo-op seen when not relaxing")); | |
2128 | ||
2129 | expression (&ex); | |
2130 | ||
2131 | if (ex.X_op != O_symbol || ex.X_add_number != 0) | |
2132 | { | |
2133 | as_bad (_("bad .uses format")); | |
2134 | ignore_rest_of_line (); | |
2135 | return; | |
2136 | } | |
2137 | ||
2138 | fix_new_exp (frag_now, frag_now_fix (), 2, &ex, 1, BFD_RELOC_SH_USES); | |
2139 | ||
2140 | demand_empty_rest_of_line (); | |
2141 | } | |
2142 | \f | |
2143 | CONST char *md_shortopts = ""; | |
6b31947e NC |
2144 | struct option md_longopts[] = |
2145 | { | |
252b5132 | 2146 | #define OPTION_RELAX (OPTION_MD_BASE) |
05982cac HPN |
2147 | #define OPTION_BIG (OPTION_MD_BASE + 1) |
2148 | #define OPTION_LITTLE (OPTION_BIG + 1) | |
252b5132 | 2149 | #define OPTION_SMALL (OPTION_LITTLE + 1) |
d4845d57 | 2150 | #define OPTION_DSP (OPTION_SMALL + 1) |
252b5132 RH |
2151 | |
2152 | {"relax", no_argument, NULL, OPTION_RELAX}, | |
05982cac | 2153 | {"big", no_argument, NULL, OPTION_BIG}, |
252b5132 RH |
2154 | {"little", no_argument, NULL, OPTION_LITTLE}, |
2155 | {"small", no_argument, NULL, OPTION_SMALL}, | |
d4845d57 | 2156 | {"dsp", no_argument, NULL, OPTION_DSP}, |
252b5132 RH |
2157 | {NULL, no_argument, NULL, 0} |
2158 | }; | |
c4aa876b | 2159 | size_t md_longopts_size = sizeof (md_longopts); |
252b5132 RH |
2160 | |
2161 | int | |
2162 | md_parse_option (c, arg) | |
2163 | int c; | |
43841e91 | 2164 | char *arg ATTRIBUTE_UNUSED; |
252b5132 RH |
2165 | { |
2166 | switch (c) | |
2167 | { | |
2168 | case OPTION_RELAX: | |
2169 | sh_relax = 1; | |
2170 | break; | |
2171 | ||
05982cac HPN |
2172 | case OPTION_BIG: |
2173 | target_big_endian = 1; | |
2174 | break; | |
2175 | ||
252b5132 | 2176 | case OPTION_LITTLE: |
252b5132 RH |
2177 | target_big_endian = 0; |
2178 | break; | |
2179 | ||
2180 | case OPTION_SMALL: | |
2181 | sh_small = 1; | |
2182 | break; | |
2183 | ||
d4845d57 JR |
2184 | case OPTION_DSP: |
2185 | sh_dsp = 1; | |
2186 | break; | |
2187 | ||
252b5132 RH |
2188 | default: |
2189 | return 0; | |
2190 | } | |
2191 | ||
2192 | return 1; | |
2193 | } | |
2194 | ||
2195 | void | |
2196 | md_show_usage (stream) | |
2197 | FILE *stream; | |
2198 | { | |
c4aa876b | 2199 | fprintf (stream, _("\ |
252b5132 RH |
2200 | SH options:\n\ |
2201 | -little generate little endian code\n\ | |
05982cac | 2202 | -big generate big endian code\n\ |
252b5132 | 2203 | -relax alter jump instructions for long displacements\n\ |
5b8274e3 | 2204 | -small align sections to 4 byte boundaries, not 16\n\ |
182e89d3 | 2205 | -dsp enable sh-dsp insns, and disable sh3e / sh4 insns.\n")); |
252b5132 RH |
2206 | } |
2207 | \f | |
252b5132 RH |
2208 | /* This struct is used to pass arguments to sh_count_relocs through |
2209 | bfd_map_over_sections. */ | |
2210 | ||
2211 | struct sh_count_relocs | |
2212 | { | |
2213 | /* Symbol we are looking for. */ | |
2214 | symbolS *sym; | |
2215 | /* Count of relocs found. */ | |
2216 | int count; | |
2217 | }; | |
2218 | ||
2219 | /* Count the number of fixups in a section which refer to a particular | |
2220 | symbol. When using BFD_ASSEMBLER, this is called via | |
2221 | bfd_map_over_sections. */ | |
2222 | ||
252b5132 RH |
2223 | static void |
2224 | sh_count_relocs (abfd, sec, data) | |
43841e91 | 2225 | bfd *abfd ATTRIBUTE_UNUSED; |
252b5132 RH |
2226 | segT sec; |
2227 | PTR data; | |
2228 | { | |
2229 | struct sh_count_relocs *info = (struct sh_count_relocs *) data; | |
2230 | segment_info_type *seginfo; | |
2231 | symbolS *sym; | |
2232 | fixS *fix; | |
2233 | ||
2234 | seginfo = seg_info (sec); | |
2235 | if (seginfo == NULL) | |
2236 | return; | |
2237 | ||
2238 | sym = info->sym; | |
2239 | for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) | |
2240 | { | |
2241 | if (fix->fx_addsy == sym) | |
2242 | { | |
2243 | ++info->count; | |
2244 | fix->fx_tcbit = 1; | |
2245 | } | |
2246 | } | |
2247 | } | |
2248 | ||
2249 | /* Handle the count relocs for a particular section. When using | |
2250 | BFD_ASSEMBLER, this is called via bfd_map_over_sections. */ | |
2251 | ||
252b5132 RH |
2252 | static void |
2253 | sh_frob_section (abfd, sec, ignore) | |
43841e91 | 2254 | bfd *abfd ATTRIBUTE_UNUSED; |
252b5132 | 2255 | segT sec; |
43841e91 | 2256 | PTR ignore ATTRIBUTE_UNUSED; |
252b5132 RH |
2257 | { |
2258 | segment_info_type *seginfo; | |
2259 | fixS *fix; | |
2260 | ||
2261 | seginfo = seg_info (sec); | |
2262 | if (seginfo == NULL) | |
2263 | return; | |
2264 | ||
2265 | for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) | |
2266 | { | |
2267 | symbolS *sym; | |
2268 | bfd_vma val; | |
2269 | fixS *fscan; | |
2270 | struct sh_count_relocs info; | |
2271 | ||
2272 | if (fix->fx_r_type != BFD_RELOC_SH_USES) | |
2273 | continue; | |
2274 | ||
2275 | /* The BFD_RELOC_SH_USES reloc should refer to a defined local | |
2276 | symbol in the same section. */ | |
2277 | sym = fix->fx_addsy; | |
2278 | if (sym == NULL | |
2279 | || fix->fx_subsy != NULL | |
2280 | || fix->fx_addnumber != 0 | |
2281 | || S_GET_SEGMENT (sym) != sec | |
2282 | #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF) | |
2283 | || S_GET_STORAGE_CLASS (sym) == C_EXT | |
2284 | #endif | |
2285 | || S_IS_EXTERNAL (sym)) | |
2286 | { | |
2287 | as_warn_where (fix->fx_file, fix->fx_line, | |
2288 | _(".uses does not refer to a local symbol in the same section")); | |
2289 | continue; | |
2290 | } | |
2291 | ||
2292 | /* Look through the fixups again, this time looking for one | |
2293 | at the same location as sym. */ | |
2294 | val = S_GET_VALUE (sym); | |
2295 | for (fscan = seginfo->fix_root; | |
2296 | fscan != NULL; | |
2297 | fscan = fscan->fx_next) | |
2298 | if (val == fscan->fx_frag->fr_address + fscan->fx_where | |
2299 | && fscan->fx_r_type != BFD_RELOC_SH_ALIGN | |
2300 | && fscan->fx_r_type != BFD_RELOC_SH_CODE | |
2301 | && fscan->fx_r_type != BFD_RELOC_SH_DATA | |
2302 | && fscan->fx_r_type != BFD_RELOC_SH_LABEL) | |
2303 | break; | |
2304 | if (fscan == NULL) | |
2305 | { | |
2306 | as_warn_where (fix->fx_file, fix->fx_line, | |
2307 | _("can't find fixup pointed to by .uses")); | |
2308 | continue; | |
2309 | } | |
2310 | ||
2311 | if (fscan->fx_tcbit) | |
2312 | { | |
2313 | /* We've already done this one. */ | |
2314 | continue; | |
2315 | } | |
2316 | ||
6b31947e NC |
2317 | /* The variable fscan should also be a fixup to a local symbol |
2318 | in the same section. */ | |
252b5132 RH |
2319 | sym = fscan->fx_addsy; |
2320 | if (sym == NULL | |
2321 | || fscan->fx_subsy != NULL | |
2322 | || fscan->fx_addnumber != 0 | |
2323 | || S_GET_SEGMENT (sym) != sec | |
2324 | #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF) | |
2325 | || S_GET_STORAGE_CLASS (sym) == C_EXT | |
2326 | #endif | |
2327 | || S_IS_EXTERNAL (sym)) | |
2328 | { | |
2329 | as_warn_where (fix->fx_file, fix->fx_line, | |
2330 | _(".uses target does not refer to a local symbol in the same section")); | |
2331 | continue; | |
2332 | } | |
2333 | ||
2334 | /* Now we look through all the fixups of all the sections, | |
2335 | counting the number of times we find a reference to sym. */ | |
2336 | info.sym = sym; | |
2337 | info.count = 0; | |
2338 | #ifdef BFD_ASSEMBLER | |
2339 | bfd_map_over_sections (stdoutput, sh_count_relocs, (PTR) &info); | |
2340 | #else | |
2341 | { | |
2342 | int iscan; | |
2343 | ||
2344 | for (iscan = SEG_E0; iscan < SEG_UNKNOWN; iscan++) | |
2345 | sh_count_relocs ((bfd *) NULL, iscan, (PTR) &info); | |
2346 | } | |
2347 | #endif | |
2348 | ||
2349 | if (info.count < 1) | |
2350 | abort (); | |
2351 | ||
2352 | /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym. | |
2353 | We have already adjusted the value of sym to include the | |
2354 | fragment address, so we undo that adjustment here. */ | |
2355 | subseg_change (sec, 0); | |
7bcad3e5 NC |
2356 | fix_new (fscan->fx_frag, |
2357 | S_GET_VALUE (sym) - fscan->fx_frag->fr_address, | |
252b5132 RH |
2358 | 4, &abs_symbol, info.count, 0, BFD_RELOC_SH_COUNT); |
2359 | } | |
2360 | } | |
2361 | ||
2362 | /* This function is called after the symbol table has been completed, | |
2363 | but before the relocs or section contents have been written out. | |
2364 | If we have seen any .uses pseudo-ops, they point to an instruction | |
2365 | which loads a register with the address of a function. We look | |
2366 | through the fixups to find where the function address is being | |
2367 | loaded from. We then generate a COUNT reloc giving the number of | |
2368 | times that function address is referred to. The linker uses this | |
2369 | information when doing relaxing, to decide when it can eliminate | |
2370 | the stored function address entirely. */ | |
2371 | ||
2372 | void | |
2373 | sh_frob_file () | |
2374 | { | |
2375 | if (! sh_relax) | |
2376 | return; | |
2377 | ||
2378 | #ifdef BFD_ASSEMBLER | |
2379 | bfd_map_over_sections (stdoutput, sh_frob_section, (PTR) NULL); | |
2380 | #else | |
2381 | { | |
2382 | int iseg; | |
2383 | ||
2384 | for (iseg = SEG_E0; iseg < SEG_UNKNOWN; iseg++) | |
2385 | sh_frob_section ((bfd *) NULL, iseg, (PTR) NULL); | |
2386 | } | |
2387 | #endif | |
2388 | } | |
2389 | ||
2390 | /* Called after relaxing. Set the correct sizes of the fragments, and | |
94f592af | 2391 | create relocs so that md_apply_fix3 will fill in the correct values. */ |
252b5132 RH |
2392 | |
2393 | void | |
2394 | md_convert_frag (headers, seg, fragP) | |
2395 | #ifdef BFD_ASSEMBLER | |
43841e91 | 2396 | bfd *headers ATTRIBUTE_UNUSED; |
252b5132 RH |
2397 | #else |
2398 | object_headers *headers; | |
2399 | #endif | |
2400 | segT seg; | |
2401 | fragS *fragP; | |
2402 | { | |
2403 | int donerelax = 0; | |
2404 | ||
2405 | switch (fragP->fr_subtype) | |
2406 | { | |
2407 | case C (COND_JUMP, COND8): | |
2408 | case C (COND_JUMP_DELAY, COND8): | |
2409 | subseg_change (seg, 0); | |
2410 | fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset, | |
2411 | 1, BFD_RELOC_SH_PCDISP8BY2); | |
2412 | fragP->fr_fix += 2; | |
2413 | fragP->fr_var = 0; | |
2414 | break; | |
2415 | ||
2416 | case C (UNCOND_JUMP, UNCOND12): | |
2417 | subseg_change (seg, 0); | |
2418 | fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset, | |
2419 | 1, BFD_RELOC_SH_PCDISP12BY2); | |
2420 | fragP->fr_fix += 2; | |
2421 | fragP->fr_var = 0; | |
2422 | break; | |
2423 | ||
2424 | case C (UNCOND_JUMP, UNCOND32): | |
2425 | case C (UNCOND_JUMP, UNDEF_WORD_DISP): | |
2426 | if (fragP->fr_symbol == NULL) | |
99b222b4 HPN |
2427 | as_bad_where (fragP->fr_file, fragP->fr_line, |
2428 | _("displacement overflows 12-bit field")); | |
252b5132 | 2429 | else if (S_IS_DEFINED (fragP->fr_symbol)) |
99b222b4 HPN |
2430 | as_bad_where (fragP->fr_file, fragP->fr_line, |
2431 | _("displacement to defined symbol %s overflows 12-bit field"), | |
2432 | S_GET_NAME (fragP->fr_symbol)); | |
252b5132 | 2433 | else |
99b222b4 HPN |
2434 | as_bad_where (fragP->fr_file, fragP->fr_line, |
2435 | _("displacement to undefined symbol %s overflows 12-bit field"), | |
2436 | S_GET_NAME (fragP->fr_symbol)); | |
2437 | /* Stabilize this frag, so we don't trip an assert. */ | |
2438 | fragP->fr_fix += fragP->fr_var; | |
2439 | fragP->fr_var = 0; | |
252b5132 RH |
2440 | break; |
2441 | ||
2442 | case C (COND_JUMP, COND12): | |
2443 | case C (COND_JUMP_DELAY, COND12): | |
6b31947e | 2444 | /* A bcond won't fit, so turn it into a b!cond; bra disp; nop. */ |
252b5132 RH |
2445 | /* I found that a relax failure for gcc.c-torture/execute/930628-1.c |
2446 | was due to gas incorrectly relaxing an out-of-range conditional | |
2447 | branch with delay slot. It turned: | |
2448 | bf.s L6 (slot mov.l r12,@(44,r0)) | |
2449 | into: | |
c4aa876b | 2450 | |
252b5132 RH |
2451 | 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6) |
2452 | 30: 00 09 nop | |
2453 | 32: 10 cb mov.l r12,@(44,r0) | |
2454 | Therefore, branches with delay slots have to be handled | |
2455 | differently from ones without delay slots. */ | |
2456 | { | |
2457 | unsigned char *buffer = | |
2458 | (unsigned char *) (fragP->fr_fix + fragP->fr_literal); | |
2459 | int highbyte = target_big_endian ? 0 : 1; | |
2460 | int lowbyte = target_big_endian ? 1 : 0; | |
2461 | int delay = fragP->fr_subtype == C (COND_JUMP_DELAY, COND12); | |
2462 | ||
2463 | /* Toggle the true/false bit of the bcond. */ | |
2464 | buffer[highbyte] ^= 0x2; | |
2465 | ||
d3ecfc59 | 2466 | /* If this is a delayed branch, we may not put the bra in the |
252b5132 RH |
2467 | slot. So we change it to a non-delayed branch, like that: |
2468 | b! cond slot_label; bra disp; slot_label: slot_insn | |
2469 | ??? We should try if swapping the conditional branch and | |
2470 | its delay-slot insn already makes the branch reach. */ | |
2471 | ||
2472 | /* Build a relocation to six / four bytes farther on. */ | |
2473 | subseg_change (seg, 0); | |
2474 | fix_new (fragP, fragP->fr_fix, 2, | |
2475 | #ifdef BFD_ASSEMBLER | |
2476 | section_symbol (seg), | |
2477 | #else | |
2478 | seg_info (seg)->dot, | |
2479 | #endif | |
2480 | fragP->fr_address + fragP->fr_fix + (delay ? 4 : 6), | |
2481 | 1, BFD_RELOC_SH_PCDISP8BY2); | |
2482 | ||
2483 | /* Set up a jump instruction. */ | |
2484 | buffer[highbyte + 2] = 0xa0; | |
2485 | buffer[lowbyte + 2] = 0; | |
2486 | fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol, | |
2487 | fragP->fr_offset, 1, BFD_RELOC_SH_PCDISP12BY2); | |
2488 | ||
2489 | if (delay) | |
2490 | { | |
2491 | buffer[highbyte] &= ~0x4; /* Removes delay slot from branch. */ | |
2492 | fragP->fr_fix += 4; | |
2493 | } | |
2494 | else | |
2495 | { | |
2496 | /* Fill in a NOP instruction. */ | |
2497 | buffer[highbyte + 4] = 0x0; | |
2498 | buffer[lowbyte + 4] = 0x9; | |
2499 | ||
2500 | fragP->fr_fix += 6; | |
2501 | } | |
2502 | fragP->fr_var = 0; | |
2503 | donerelax = 1; | |
2504 | } | |
2505 | break; | |
2506 | ||
2507 | case C (COND_JUMP, COND32): | |
2508 | case C (COND_JUMP_DELAY, COND32): | |
2509 | case C (COND_JUMP, UNDEF_WORD_DISP): | |
2510 | case C (COND_JUMP_DELAY, UNDEF_WORD_DISP): | |
2511 | if (fragP->fr_symbol == NULL) | |
99b222b4 HPN |
2512 | as_bad_where (fragP->fr_file, fragP->fr_line, |
2513 | _("displacement overflows 8-bit field")); | |
252b5132 | 2514 | else if (S_IS_DEFINED (fragP->fr_symbol)) |
99b222b4 HPN |
2515 | as_bad_where (fragP->fr_file, fragP->fr_line, |
2516 | _("displacement to defined symbol %s overflows 8-bit field"), | |
2517 | S_GET_NAME (fragP->fr_symbol)); | |
252b5132 | 2518 | else |
99b222b4 HPN |
2519 | as_bad_where (fragP->fr_file, fragP->fr_line, |
2520 | _("displacement to undefined symbol %s overflows 8-bit field "), | |
2521 | S_GET_NAME (fragP->fr_symbol)); | |
2522 | /* Stabilize this frag, so we don't trip an assert. */ | |
2523 | fragP->fr_fix += fragP->fr_var; | |
2524 | fragP->fr_var = 0; | |
252b5132 RH |
2525 | break; |
2526 | ||
2527 | default: | |
2528 | abort (); | |
2529 | } | |
2530 | ||
2531 | if (donerelax && !sh_relax) | |
2532 | as_warn_where (fragP->fr_file, fragP->fr_line, | |
2533 | _("overflow in branch to %s; converted into longer instruction sequence"), | |
2534 | (fragP->fr_symbol != NULL | |
2535 | ? S_GET_NAME (fragP->fr_symbol) | |
2536 | : "")); | |
2537 | } | |
2538 | ||
2539 | valueT | |
c0fecd35 | 2540 | md_section_align (seg, size) |
dda5ecfc | 2541 | segT seg ATTRIBUTE_UNUSED; |
c0fecd35 | 2542 | valueT size; |
252b5132 RH |
2543 | { |
2544 | #ifdef BFD_ASSEMBLER | |
2545 | #ifdef OBJ_ELF | |
2546 | return size; | |
2547 | #else /* ! OBJ_ELF */ | |
2548 | return ((size + (1 << bfd_get_section_alignment (stdoutput, seg)) - 1) | |
2549 | & (-1 << bfd_get_section_alignment (stdoutput, seg))); | |
2550 | #endif /* ! OBJ_ELF */ | |
2551 | #else /* ! BFD_ASSEMBLER */ | |
2552 | return ((size + (1 << section_alignment[(int) seg]) - 1) | |
2553 | & (-1 << section_alignment[(int) seg])); | |
2554 | #endif /* ! BFD_ASSEMBLER */ | |
2555 | } | |
2556 | ||
2557 | /* This static variable is set by s_uacons to tell sh_cons_align that | |
2558 | the expession does not need to be aligned. */ | |
2559 | ||
2560 | static int sh_no_align_cons = 0; | |
2561 | ||
2562 | /* This handles the unaligned space allocation pseudo-ops, such as | |
2563 | .uaword. .uaword is just like .word, but the value does not need | |
2564 | to be aligned. */ | |
2565 | ||
2566 | static void | |
2567 | s_uacons (bytes) | |
2568 | int bytes; | |
2569 | { | |
2570 | /* Tell sh_cons_align not to align this value. */ | |
2571 | sh_no_align_cons = 1; | |
2572 | cons (bytes); | |
2573 | } | |
2574 | ||
2575 | /* If a .word, et. al., pseud-op is seen, warn if the value is not | |
2576 | aligned correctly. Note that this can cause warnings to be issued | |
2577 | when assembling initialized structured which were declared with the | |
2578 | packed attribute. FIXME: Perhaps we should require an option to | |
2579 | enable this warning? */ | |
2580 | ||
2581 | void | |
2582 | sh_cons_align (nbytes) | |
2583 | int nbytes; | |
2584 | { | |
2585 | int nalign; | |
2586 | char *p; | |
2587 | ||
2588 | if (sh_no_align_cons) | |
2589 | { | |
2590 | /* This is an unaligned pseudo-op. */ | |
2591 | sh_no_align_cons = 0; | |
2592 | return; | |
2593 | } | |
2594 | ||
2595 | nalign = 0; | |
2596 | while ((nbytes & 1) == 0) | |
2597 | { | |
2598 | ++nalign; | |
2599 | nbytes >>= 1; | |
2600 | } | |
2601 | ||
2602 | if (nalign == 0) | |
2603 | return; | |
2604 | ||
2605 | if (now_seg == absolute_section) | |
2606 | { | |
2607 | if ((abs_section_offset & ((1 << nalign) - 1)) != 0) | |
2608 | as_warn (_("misaligned data")); | |
2609 | return; | |
2610 | } | |
2611 | ||
0a9ef439 | 2612 | p = frag_var (rs_align_test, 1, 1, (relax_substateT) 0, |
252b5132 RH |
2613 | (symbolS *) NULL, (offsetT) nalign, (char *) NULL); |
2614 | ||
2615 | record_alignment (now_seg, nalign); | |
2616 | } | |
2617 | ||
2618 | /* When relaxing, we need to output a reloc for any .align directive | |
2619 | that requests alignment to a four byte boundary or larger. This is | |
2620 | also where we check for misaligned data. */ | |
2621 | ||
2622 | void | |
2623 | sh_handle_align (frag) | |
2624 | fragS *frag; | |
2625 | { | |
0a9ef439 RH |
2626 | int bytes = frag->fr_next->fr_address - frag->fr_address - frag->fr_fix; |
2627 | ||
2628 | if (frag->fr_type == rs_align_code) | |
2629 | { | |
2630 | static const unsigned char big_nop_pattern[] = { 0x00, 0x09 }; | |
2631 | static const unsigned char little_nop_pattern[] = { 0x09, 0x00 }; | |
2632 | ||
2633 | char *p = frag->fr_literal + frag->fr_fix; | |
2634 | ||
2635 | if (bytes & 1) | |
2636 | { | |
2637 | *p++ = 0; | |
2638 | bytes--; | |
2639 | frag->fr_fix += 1; | |
2640 | } | |
2641 | ||
2642 | if (target_big_endian) | |
2643 | { | |
2644 | memcpy (p, big_nop_pattern, sizeof big_nop_pattern); | |
2645 | frag->fr_var = sizeof big_nop_pattern; | |
2646 | } | |
2647 | else | |
2648 | { | |
2649 | memcpy (p, little_nop_pattern, sizeof little_nop_pattern); | |
2650 | frag->fr_var = sizeof little_nop_pattern; | |
2651 | } | |
2652 | } | |
2653 | else if (frag->fr_type == rs_align_test) | |
2654 | { | |
2655 | if (bytes != 0) | |
2656 | as_warn_where (frag->fr_file, frag->fr_line, _("misaligned data")); | |
2657 | } | |
2658 | ||
252b5132 | 2659 | if (sh_relax |
0a9ef439 RH |
2660 | && (frag->fr_type == rs_align |
2661 | || frag->fr_type == rs_align_code) | |
252b5132 RH |
2662 | && frag->fr_address + frag->fr_fix > 0 |
2663 | && frag->fr_offset > 1 | |
2664 | && now_seg != bss_section) | |
2665 | fix_new (frag, frag->fr_fix, 2, &abs_symbol, frag->fr_offset, 0, | |
2666 | BFD_RELOC_SH_ALIGN); | |
252b5132 RH |
2667 | } |
2668 | ||
2669 | /* This macro decides whether a particular reloc is an entry in a | |
2670 | switch table. It is used when relaxing, because the linker needs | |
2671 | to know about all such entries so that it can adjust them if | |
2672 | necessary. */ | |
2673 | ||
2674 | #ifdef BFD_ASSEMBLER | |
2675 | #define SWITCH_TABLE_CONS(fix) (0) | |
2676 | #else | |
2677 | #define SWITCH_TABLE_CONS(fix) \ | |
2678 | ((fix)->fx_r_type == 0 \ | |
2679 | && ((fix)->fx_size == 2 \ | |
2680 | || (fix)->fx_size == 1 \ | |
2681 | || (fix)->fx_size == 4)) | |
2682 | #endif | |
2683 | ||
2684 | #define SWITCH_TABLE(fix) \ | |
2685 | ((fix)->fx_addsy != NULL \ | |
2686 | && (fix)->fx_subsy != NULL \ | |
2687 | && S_GET_SEGMENT ((fix)->fx_addsy) == text_section \ | |
2688 | && S_GET_SEGMENT ((fix)->fx_subsy) == text_section \ | |
2689 | && ((fix)->fx_r_type == BFD_RELOC_32 \ | |
2690 | || (fix)->fx_r_type == BFD_RELOC_16 \ | |
2691 | || (fix)->fx_r_type == BFD_RELOC_8 \ | |
2692 | || SWITCH_TABLE_CONS (fix))) | |
2693 | ||
2694 | /* See whether we need to force a relocation into the output file. | |
2695 | This is used to force out switch and PC relative relocations when | |
2696 | relaxing. */ | |
2697 | ||
2698 | int | |
2699 | sh_force_relocation (fix) | |
2700 | fixS *fix; | |
2701 | { | |
2702 | ||
2703 | if (fix->fx_r_type == BFD_RELOC_VTABLE_INHERIT | |
015551fc JR |
2704 | || fix->fx_r_type == BFD_RELOC_VTABLE_ENTRY |
2705 | || fix->fx_r_type == BFD_RELOC_SH_LOOP_START | |
2706 | || fix->fx_r_type == BFD_RELOC_SH_LOOP_END) | |
252b5132 RH |
2707 | return 1; |
2708 | ||
2709 | if (! sh_relax) | |
2710 | return 0; | |
2711 | ||
2712 | return (fix->fx_pcrel | |
2713 | || SWITCH_TABLE (fix) | |
2714 | || fix->fx_r_type == BFD_RELOC_SH_COUNT | |
2715 | || fix->fx_r_type == BFD_RELOC_SH_ALIGN | |
2716 | || fix->fx_r_type == BFD_RELOC_SH_CODE | |
2717 | || fix->fx_r_type == BFD_RELOC_SH_DATA | |
2718 | || fix->fx_r_type == BFD_RELOC_SH_LABEL); | |
2719 | } | |
2720 | ||
2721 | #ifdef OBJ_ELF | |
2722 | boolean | |
2723 | sh_fix_adjustable (fixP) | |
2724 | fixS *fixP; | |
2725 | { | |
2726 | ||
2727 | if (fixP->fx_addsy == NULL) | |
2728 | return 1; | |
c4aa876b | 2729 | |
a1cc9221 AO |
2730 | if (fixP->fx_r_type == BFD_RELOC_SH_PCDISP8BY2 |
2731 | || fixP->fx_r_type == BFD_RELOC_SH_PCDISP12BY2 | |
2732 | || fixP->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY2 | |
2733 | || fixP->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY4 | |
2734 | || fixP->fx_r_type == BFD_RELOC_8_PCREL | |
2735 | || fixP->fx_r_type == BFD_RELOC_SH_SWITCH16 | |
2736 | || fixP->fx_r_type == BFD_RELOC_SH_SWITCH32) | |
2737 | return 1; | |
2738 | ||
2739 | if (! TC_RELOC_RTSYM_LOC_FIXUP (fixP) | |
a1cc9221 AO |
2740 | || fixP->fx_r_type == BFD_RELOC_RVA) |
2741 | return 0; | |
2742 | ||
252b5132 RH |
2743 | /* We need the symbol name for the VTABLE entries */ |
2744 | if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT | |
2745 | || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY) | |
2746 | return 0; | |
2747 | ||
2748 | return 1; | |
2749 | } | |
d4845d57 | 2750 | |
6b31947e NC |
2751 | void |
2752 | sh_elf_final_processing () | |
d4845d57 JR |
2753 | { |
2754 | int val; | |
2755 | ||
2756 | /* Set file-specific flags to indicate if this code needs | |
2757 | a processor with the sh-dsp / sh3e ISA to execute. */ | |
2758 | if (valid_arch & arch_sh1) | |
2759 | val = EF_SH1; | |
2760 | else if (valid_arch & arch_sh2) | |
2761 | val = EF_SH2; | |
2762 | else if (valid_arch & arch_sh_dsp) | |
2763 | val = EF_SH_DSP; | |
2764 | else if (valid_arch & arch_sh3) | |
2765 | val = EF_SH3; | |
2766 | else if (valid_arch & arch_sh3_dsp) | |
2767 | val = EF_SH_DSP; | |
2768 | else if (valid_arch & arch_sh3e) | |
2769 | val = EF_SH3E; | |
2770 | else if (valid_arch & arch_sh4) | |
2771 | val = EF_SH4; | |
2772 | else | |
2773 | abort (); | |
2774 | ||
2775 | elf_elfheader (stdoutput)->e_flags &= ~EF_SH_MACH_MASK; | |
2776 | elf_elfheader (stdoutput)->e_flags |= val; | |
2777 | } | |
252b5132 RH |
2778 | #endif |
2779 | ||
2780 | /* Apply a fixup to the object file. */ | |
2781 | ||
252b5132 | 2782 | void |
94f592af NC |
2783 | md_apply_fix3 (fixP, valP, seg) |
2784 | fixS * fixP; | |
2785 | valueT * valP; | |
2786 | segT seg ATTRIBUTE_UNUSED; | |
252b5132 RH |
2787 | { |
2788 | char *buf = fixP->fx_where + fixP->fx_frag->fr_literal; | |
2789 | int lowbyte = target_big_endian ? 1 : 0; | |
2790 | int highbyte = target_big_endian ? 0 : 1; | |
94f592af | 2791 | long val = * (long *) valP; |
252b5132 RH |
2792 | long max, min; |
2793 | int shift; | |
2794 | ||
2795 | #ifdef BFD_ASSEMBLER | |
a1cc9221 AO |
2796 | /* A difference between two symbols, the second of which is in the |
2797 | current section, is transformed in a PC-relative relocation to | |
2798 | the other symbol. We have to adjust the relocation type here. */ | |
2799 | if (fixP->fx_pcrel) | |
2800 | { | |
2801 | switch (fixP->fx_r_type) | |
2802 | { | |
2803 | default: | |
2804 | break; | |
2805 | ||
2806 | case BFD_RELOC_32: | |
2807 | fixP->fx_r_type = BFD_RELOC_32_PCREL; | |
2808 | break; | |
2809 | ||
2810 | /* Currently, we only support 32-bit PCREL relocations. | |
2811 | We'd need a new reloc type to handle 16_PCREL, and | |
2812 | 8_PCREL is already taken for R_SH_SWITCH8, which | |
2813 | apparently does something completely different than what | |
2814 | we need. FIXME. */ | |
2815 | case BFD_RELOC_16: | |
2816 | bfd_set_error (bfd_error_bad_value); | |
94f592af | 2817 | return; |
81d4177b | 2818 | |
a1cc9221 AO |
2819 | case BFD_RELOC_8: |
2820 | bfd_set_error (bfd_error_bad_value); | |
94f592af | 2821 | return; |
a1cc9221 AO |
2822 | } |
2823 | } | |
2824 | ||
6b31947e NC |
2825 | /* The function adjust_reloc_syms won't convert a reloc against a weak |
2826 | symbol into a reloc against a section, but bfd_install_relocation | |
2827 | will screw up if the symbol is defined, so we have to adjust val here | |
1308f14c HPN |
2828 | to avoid the screw up later. |
2829 | ||
2830 | For ordinary relocs, this does not happen for ELF, since for ELF, | |
2831 | bfd_install_relocation uses the "special function" field of the | |
2832 | howto, and does not execute the code that needs to be undone, as long | |
2833 | as the special function does not return bfd_reloc_continue. | |
2834 | It can happen for GOT- and PLT-type relocs the way they are | |
2835 | described in elf32-sh.c as they use bfd_elf_generic_reloc, but it | |
2836 | doesn't matter here since those relocs don't use VAL; see below. */ | |
2837 | if (OUTPUT_FLAVOR != bfd_target_elf_flavour | |
2838 | && fixP->fx_addsy != NULL | |
252b5132 RH |
2839 | && S_IS_WEAK (fixP->fx_addsy)) |
2840 | val -= S_GET_VALUE (fixP->fx_addsy); | |
2841 | #endif | |
2842 | ||
2843 | #ifndef BFD_ASSEMBLER | |
2844 | if (fixP->fx_r_type == 0) | |
2845 | { | |
2846 | if (fixP->fx_size == 2) | |
2847 | fixP->fx_r_type = BFD_RELOC_16; | |
2848 | else if (fixP->fx_size == 4) | |
2849 | fixP->fx_r_type = BFD_RELOC_32; | |
2850 | else if (fixP->fx_size == 1) | |
2851 | fixP->fx_r_type = BFD_RELOC_8; | |
2852 | else | |
2853 | abort (); | |
2854 | } | |
2855 | #endif | |
2856 | ||
2857 | max = min = 0; | |
2858 | shift = 0; | |
2859 | switch (fixP->fx_r_type) | |
2860 | { | |
2861 | case BFD_RELOC_SH_IMM4: | |
2862 | max = 0xf; | |
2863 | *buf = (*buf & 0xf0) | (val & 0xf); | |
2864 | break; | |
2865 | ||
2866 | case BFD_RELOC_SH_IMM4BY2: | |
2867 | max = 0xf; | |
2868 | shift = 1; | |
2869 | *buf = (*buf & 0xf0) | ((val >> 1) & 0xf); | |
2870 | break; | |
2871 | ||
2872 | case BFD_RELOC_SH_IMM4BY4: | |
2873 | max = 0xf; | |
2874 | shift = 2; | |
2875 | *buf = (*buf & 0xf0) | ((val >> 2) & 0xf); | |
2876 | break; | |
2877 | ||
2878 | case BFD_RELOC_SH_IMM8BY2: | |
2879 | max = 0xff; | |
2880 | shift = 1; | |
2881 | *buf = val >> 1; | |
2882 | break; | |
2883 | ||
2884 | case BFD_RELOC_SH_IMM8BY4: | |
2885 | max = 0xff; | |
2886 | shift = 2; | |
2887 | *buf = val >> 2; | |
2888 | break; | |
2889 | ||
2890 | case BFD_RELOC_8: | |
2891 | case BFD_RELOC_SH_IMM8: | |
2892 | /* Sometimes the 8 bit value is sign extended (e.g., add) and | |
2893 | sometimes it is not (e.g., and). We permit any 8 bit value. | |
2894 | Note that adding further restrictions may invalidate | |
2895 | reasonable looking assembly code, such as ``and -0x1,r0''. */ | |
2896 | max = 0xff; | |
c4aa876b | 2897 | min = -0xff; |
252b5132 RH |
2898 | *buf++ = val; |
2899 | break; | |
2900 | ||
2901 | case BFD_RELOC_SH_PCRELIMM8BY4: | |
2902 | /* The lower two bits of the PC are cleared before the | |
2903 | displacement is added in. We can assume that the destination | |
2904 | is on a 4 byte bounday. If this instruction is also on a 4 | |
2905 | byte boundary, then we want | |
2906 | (target - here) / 4 | |
2907 | and target - here is a multiple of 4. | |
2908 | Otherwise, we are on a 2 byte boundary, and we want | |
2909 | (target - (here - 2)) / 4 | |
2910 | and target - here is not a multiple of 4. Computing | |
2911 | (target - (here - 2)) / 4 == (target - here + 2) / 4 | |
2912 | works for both cases, since in the first case the addition of | |
2913 | 2 will be removed by the division. target - here is in the | |
2914 | variable val. */ | |
2915 | val = (val + 2) / 4; | |
2916 | if (val & ~0xff) | |
2917 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); | |
2918 | buf[lowbyte] = val; | |
2919 | break; | |
2920 | ||
2921 | case BFD_RELOC_SH_PCRELIMM8BY2: | |
2922 | val /= 2; | |
2923 | if (val & ~0xff) | |
2924 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); | |
2925 | buf[lowbyte] = val; | |
2926 | break; | |
2927 | ||
2928 | case BFD_RELOC_SH_PCDISP8BY2: | |
2929 | val /= 2; | |
2930 | if (val < -0x80 || val > 0x7f) | |
2931 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); | |
2932 | buf[lowbyte] = val; | |
2933 | break; | |
2934 | ||
2935 | case BFD_RELOC_SH_PCDISP12BY2: | |
2936 | val /= 2; | |
8637c045 | 2937 | if (val < -0x800 || val > 0x7ff) |
252b5132 RH |
2938 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); |
2939 | buf[lowbyte] = val & 0xff; | |
2940 | buf[highbyte] |= (val >> 8) & 0xf; | |
2941 | break; | |
2942 | ||
2943 | case BFD_RELOC_32: | |
a1cc9221 | 2944 | case BFD_RELOC_32_PCREL: |
1db77c8e | 2945 | md_number_to_chars (buf, val, 4); |
252b5132 RH |
2946 | break; |
2947 | ||
2948 | case BFD_RELOC_16: | |
1db77c8e | 2949 | md_number_to_chars (buf, val, 2); |
252b5132 RH |
2950 | break; |
2951 | ||
2952 | case BFD_RELOC_SH_USES: | |
2953 | /* Pass the value into sh_coff_reloc_mangle. */ | |
2954 | fixP->fx_addnumber = val; | |
2955 | break; | |
2956 | ||
2957 | case BFD_RELOC_SH_COUNT: | |
2958 | case BFD_RELOC_SH_ALIGN: | |
2959 | case BFD_RELOC_SH_CODE: | |
2960 | case BFD_RELOC_SH_DATA: | |
2961 | case BFD_RELOC_SH_LABEL: | |
2962 | /* Nothing to do here. */ | |
2963 | break; | |
2964 | ||
015551fc JR |
2965 | case BFD_RELOC_SH_LOOP_START: |
2966 | case BFD_RELOC_SH_LOOP_END: | |
2967 | ||
252b5132 RH |
2968 | case BFD_RELOC_VTABLE_INHERIT: |
2969 | case BFD_RELOC_VTABLE_ENTRY: | |
2970 | fixP->fx_done = 0; | |
2971 | return; | |
2972 | ||
a1cc9221 AO |
2973 | #ifdef OBJ_ELF |
2974 | case BFD_RELOC_32_PLT_PCREL: | |
2975 | /* Make the jump instruction point to the address of the operand. At | |
81d4177b | 2976 | runtime we merely add the offset to the actual PLT entry. */ |
94f592af | 2977 | * valP = 0xfffffffc; |
538cd60f AO |
2978 | val = fixP->fx_addnumber - S_GET_VALUE (fixP->fx_subsy); |
2979 | md_number_to_chars (buf, val, 4); | |
a1cc9221 AO |
2980 | break; |
2981 | ||
2982 | case BFD_RELOC_SH_GOTPC: | |
2983 | /* This is tough to explain. We end up with this one if we have | |
2984 | operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]". | |
2985 | The goal here is to obtain the absolute address of the GOT, | |
2986 | and it is strongly preferable from a performance point of | |
2987 | view to avoid using a runtime relocation for this. There are | |
2988 | cases where you have something like: | |
81d4177b | 2989 | |
a1cc9221 | 2990 | .long _GLOBAL_OFFSET_TABLE_+[.-.L66] |
81d4177b | 2991 | |
a1cc9221 AO |
2992 | and here no correction would be required. Internally in the |
2993 | assembler we treat operands of this form as not being pcrel | |
2994 | since the '.' is explicitly mentioned, and I wonder whether | |
2995 | it would simplify matters to do it this way. Who knows. In | |
2996 | earlier versions of the PIC patches, the pcrel_adjust field | |
2997 | was used to store the correction, but since the expression is | |
2998 | not pcrel, I felt it would be confusing to do it this way. */ | |
94f592af | 2999 | * valP -= 1; |
a1cc9221 AO |
3000 | md_number_to_chars (buf, val, 4); |
3001 | break; | |
3002 | ||
3003 | case BFD_RELOC_32_GOT_PCREL: | |
94f592af | 3004 | * valP = 0; /* Fully resolved at runtime. No addend. */ |
a1cc9221 AO |
3005 | md_number_to_chars (buf, 0, 4); |
3006 | break; | |
3007 | ||
3008 | case BFD_RELOC_32_GOTOFF: | |
538cd60f | 3009 | md_number_to_chars (buf, val, 4); |
a1cc9221 AO |
3010 | break; |
3011 | #endif | |
3012 | ||
252b5132 RH |
3013 | default: |
3014 | abort (); | |
3015 | } | |
3016 | ||
3017 | if (shift != 0) | |
3018 | { | |
3019 | if ((val & ((1 << shift) - 1)) != 0) | |
3020 | as_bad_where (fixP->fx_file, fixP->fx_line, _("misaligned offset")); | |
3021 | if (val >= 0) | |
3022 | val >>= shift; | |
3023 | else | |
3024 | val = ((val >> shift) | |
3025 | | ((long) -1 & ~ ((long) -1 >> shift))); | |
3026 | } | |
3027 | if (max != 0 && (val < min || val > max)) | |
3028 | as_bad_where (fixP->fx_file, fixP->fx_line, _("offset out of range")); | |
3029 | ||
94f592af NC |
3030 | if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0) |
3031 | fixP->fx_done = 1; | |
252b5132 RH |
3032 | } |
3033 | ||
3034 | /* Called just before address relaxation. Return the length | |
3035 | by which a fragment must grow to reach it's destination. */ | |
3036 | ||
3037 | int | |
3038 | md_estimate_size_before_relax (fragP, segment_type) | |
3039 | register fragS *fragP; | |
3040 | register segT segment_type; | |
3041 | { | |
e66457fb AM |
3042 | int what; |
3043 | ||
252b5132 RH |
3044 | switch (fragP->fr_subtype) |
3045 | { | |
93c2a809 AM |
3046 | default: |
3047 | abort (); | |
3048 | ||
252b5132 | 3049 | case C (UNCOND_JUMP, UNDEF_DISP): |
6b31947e | 3050 | /* Used to be a branch to somewhere which was unknown. */ |
252b5132 RH |
3051 | if (!fragP->fr_symbol) |
3052 | { | |
3053 | fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12); | |
252b5132 RH |
3054 | } |
3055 | else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type) | |
3056 | { | |
3057 | fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12); | |
252b5132 RH |
3058 | } |
3059 | else | |
3060 | { | |
3061 | fragP->fr_subtype = C (UNCOND_JUMP, UNDEF_WORD_DISP); | |
252b5132 RH |
3062 | } |
3063 | break; | |
3064 | ||
252b5132 RH |
3065 | case C (COND_JUMP, UNDEF_DISP): |
3066 | case C (COND_JUMP_DELAY, UNDEF_DISP): | |
e66457fb | 3067 | what = GET_WHAT (fragP->fr_subtype); |
6b31947e | 3068 | /* Used to be a branch to somewhere which was unknown. */ |
252b5132 RH |
3069 | if (fragP->fr_symbol |
3070 | && S_GET_SEGMENT (fragP->fr_symbol) == segment_type) | |
3071 | { | |
252b5132 | 3072 | /* Got a symbol and it's defined in this segment, become byte |
6b31947e | 3073 | sized - maybe it will fix up. */ |
252b5132 | 3074 | fragP->fr_subtype = C (what, COND8); |
252b5132 RH |
3075 | } |
3076 | else if (fragP->fr_symbol) | |
3077 | { | |
6b31947e | 3078 | /* Its got a segment, but its not ours, so it will always be long. */ |
252b5132 | 3079 | fragP->fr_subtype = C (what, UNDEF_WORD_DISP); |
252b5132 RH |
3080 | } |
3081 | else | |
3082 | { | |
6b31947e | 3083 | /* We know the abs value. */ |
252b5132 | 3084 | fragP->fr_subtype = C (what, COND8); |
252b5132 | 3085 | } |
93c2a809 | 3086 | break; |
252b5132 | 3087 | |
93c2a809 | 3088 | case C (UNCOND_JUMP, UNCOND12): |
e66457fb | 3089 | case C (UNCOND_JUMP, UNCOND32): |
93c2a809 AM |
3090 | case C (UNCOND_JUMP, UNDEF_WORD_DISP): |
3091 | case C (COND_JUMP, COND8): | |
e66457fb AM |
3092 | case C (COND_JUMP, COND12): |
3093 | case C (COND_JUMP, COND32): | |
93c2a809 AM |
3094 | case C (COND_JUMP, UNDEF_WORD_DISP): |
3095 | case C (COND_JUMP_DELAY, COND8): | |
e66457fb AM |
3096 | case C (COND_JUMP_DELAY, COND12): |
3097 | case C (COND_JUMP_DELAY, COND32): | |
93c2a809 AM |
3098 | case C (COND_JUMP_DELAY, UNDEF_WORD_DISP): |
3099 | /* When relaxing a section for the second time, we don't need to | |
e66457fb | 3100 | do anything besides return the current size. */ |
252b5132 RH |
3101 | break; |
3102 | } | |
e66457fb AM |
3103 | |
3104 | fragP->fr_var = md_relax_table[fragP->fr_subtype].rlx_length; | |
252b5132 RH |
3105 | return fragP->fr_var; |
3106 | } | |
3107 | ||
6b31947e | 3108 | /* Put number into target byte order. */ |
252b5132 RH |
3109 | |
3110 | void | |
3111 | md_number_to_chars (ptr, use, nbytes) | |
3112 | char *ptr; | |
3113 | valueT use; | |
3114 | int nbytes; | |
3115 | { | |
3116 | if (! target_big_endian) | |
3117 | number_to_chars_littleendian (ptr, use, nbytes); | |
3118 | else | |
3119 | number_to_chars_bigendian (ptr, use, nbytes); | |
3120 | } | |
3121 | ||
3122 | long | |
ef17112f | 3123 | md_pcrel_from_section (fixP, sec) |
252b5132 | 3124 | fixS *fixP; |
ef17112f | 3125 | segT sec; |
252b5132 | 3126 | { |
ef17112f HPN |
3127 | if (fixP->fx_addsy != (symbolS *) NULL |
3128 | && (! S_IS_DEFINED (fixP->fx_addsy) | |
3129 | || S_IS_EXTERN (fixP->fx_addsy) | |
3130 | || S_IS_WEAK (fixP->fx_addsy) | |
3131 | || S_GET_SEGMENT (fixP->fx_addsy) != sec)) | |
3132 | { | |
3133 | /* The symbol is undefined (or is defined but not in this section, | |
3134 | or we're not sure about it being the final definition). Let the | |
3135 | linker figure it out. We need to adjust the subtraction of a | |
3136 | symbol to the position of the relocated data, though. */ | |
3137 | return fixP->fx_subsy ? fixP->fx_where + fixP->fx_frag->fr_address : 0; | |
3138 | } | |
3139 | ||
252b5132 RH |
3140 | return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address + 2; |
3141 | } | |
3142 | ||
3143 | #ifdef OBJ_COFF | |
3144 | ||
3145 | int | |
3146 | tc_coff_sizemachdep (frag) | |
3147 | fragS *frag; | |
3148 | { | |
3149 | return md_relax_table[frag->fr_subtype].rlx_length; | |
3150 | } | |
3151 | ||
3152 | #endif /* OBJ_COFF */ | |
3153 | ||
252b5132 RH |
3154 | #ifndef BFD_ASSEMBLER |
3155 | #ifdef OBJ_COFF | |
3156 | ||
3157 | /* Map BFD relocs to SH COFF relocs. */ | |
3158 | ||
3159 | struct reloc_map | |
3160 | { | |
3161 | bfd_reloc_code_real_type bfd_reloc; | |
3162 | int sh_reloc; | |
3163 | }; | |
3164 | ||
3165 | static const struct reloc_map coff_reloc_map[] = | |
3166 | { | |
3167 | { BFD_RELOC_32, R_SH_IMM32 }, | |
3168 | { BFD_RELOC_16, R_SH_IMM16 }, | |
3169 | { BFD_RELOC_8, R_SH_IMM8 }, | |
3170 | { BFD_RELOC_SH_PCDISP8BY2, R_SH_PCDISP8BY2 }, | |
3171 | { BFD_RELOC_SH_PCDISP12BY2, R_SH_PCDISP }, | |
3172 | { BFD_RELOC_SH_IMM4, R_SH_IMM4 }, | |
3173 | { BFD_RELOC_SH_IMM4BY2, R_SH_IMM4BY2 }, | |
3174 | { BFD_RELOC_SH_IMM4BY4, R_SH_IMM4BY4 }, | |
3175 | { BFD_RELOC_SH_IMM8, R_SH_IMM8 }, | |
3176 | { BFD_RELOC_SH_IMM8BY2, R_SH_IMM8BY2 }, | |
3177 | { BFD_RELOC_SH_IMM8BY4, R_SH_IMM8BY4 }, | |
3178 | { BFD_RELOC_SH_PCRELIMM8BY2, R_SH_PCRELIMM8BY2 }, | |
3179 | { BFD_RELOC_SH_PCRELIMM8BY4, R_SH_PCRELIMM8BY4 }, | |
3180 | { BFD_RELOC_8_PCREL, R_SH_SWITCH8 }, | |
3181 | { BFD_RELOC_SH_SWITCH16, R_SH_SWITCH16 }, | |
3182 | { BFD_RELOC_SH_SWITCH32, R_SH_SWITCH32 }, | |
3183 | { BFD_RELOC_SH_USES, R_SH_USES }, | |
3184 | { BFD_RELOC_SH_COUNT, R_SH_COUNT }, | |
3185 | { BFD_RELOC_SH_ALIGN, R_SH_ALIGN }, | |
3186 | { BFD_RELOC_SH_CODE, R_SH_CODE }, | |
3187 | { BFD_RELOC_SH_DATA, R_SH_DATA }, | |
3188 | { BFD_RELOC_SH_LABEL, R_SH_LABEL }, | |
3189 | { BFD_RELOC_UNUSED, 0 } | |
3190 | }; | |
3191 | ||
3192 | /* Adjust a reloc for the SH. This is similar to the generic code, | |
3193 | but does some minor tweaking. */ | |
3194 | ||
3195 | void | |
3196 | sh_coff_reloc_mangle (seg, fix, intr, paddr) | |
3197 | segment_info_type *seg; | |
3198 | fixS *fix; | |
3199 | struct internal_reloc *intr; | |
3200 | unsigned int paddr; | |
3201 | { | |
3202 | symbolS *symbol_ptr = fix->fx_addsy; | |
3203 | symbolS *dot; | |
3204 | ||
3205 | intr->r_vaddr = paddr + fix->fx_frag->fr_address + fix->fx_where; | |
3206 | ||
3207 | if (! SWITCH_TABLE (fix)) | |
3208 | { | |
3209 | const struct reloc_map *rm; | |
3210 | ||
3211 | for (rm = coff_reloc_map; rm->bfd_reloc != BFD_RELOC_UNUSED; rm++) | |
3212 | if (rm->bfd_reloc == (bfd_reloc_code_real_type) fix->fx_r_type) | |
3213 | break; | |
3214 | if (rm->bfd_reloc == BFD_RELOC_UNUSED) | |
3215 | as_bad_where (fix->fx_file, fix->fx_line, | |
3216 | _("Can not represent %s relocation in this object file format"), | |
3217 | bfd_get_reloc_code_name (fix->fx_r_type)); | |
3218 | intr->r_type = rm->sh_reloc; | |
3219 | intr->r_offset = 0; | |
3220 | } | |
3221 | else | |
3222 | { | |
3223 | know (sh_relax); | |
3224 | ||
3225 | if (fix->fx_r_type == BFD_RELOC_16) | |
3226 | intr->r_type = R_SH_SWITCH16; | |
3227 | else if (fix->fx_r_type == BFD_RELOC_8) | |
3228 | intr->r_type = R_SH_SWITCH8; | |
3229 | else if (fix->fx_r_type == BFD_RELOC_32) | |
3230 | intr->r_type = R_SH_SWITCH32; | |
3231 | else | |
3232 | abort (); | |
3233 | ||
3234 | /* For a switch reloc, we set r_offset to the difference between | |
3235 | the reloc address and the subtrahend. When the linker is | |
3236 | doing relaxing, it can use the determine the starting and | |
3237 | ending points of the switch difference expression. */ | |
3238 | intr->r_offset = intr->r_vaddr - S_GET_VALUE (fix->fx_subsy); | |
3239 | } | |
3240 | ||
3241 | /* PC relative relocs are always against the current section. */ | |
3242 | if (symbol_ptr == NULL) | |
3243 | { | |
3244 | switch (fix->fx_r_type) | |
3245 | { | |
3246 | case BFD_RELOC_SH_PCRELIMM8BY2: | |
3247 | case BFD_RELOC_SH_PCRELIMM8BY4: | |
3248 | case BFD_RELOC_SH_PCDISP8BY2: | |
3249 | case BFD_RELOC_SH_PCDISP12BY2: | |
3250 | case BFD_RELOC_SH_USES: | |
3251 | symbol_ptr = seg->dot; | |
3252 | break; | |
3253 | default: | |
3254 | break; | |
3255 | } | |
3256 | } | |
3257 | ||
3258 | if (fix->fx_r_type == BFD_RELOC_SH_USES) | |
3259 | { | |
3260 | /* We can't store the offset in the object file, since this | |
3261 | reloc does not take up any space, so we store it in r_offset. | |
94f592af | 3262 | The fx_addnumber field was set in md_apply_fix3. */ |
252b5132 RH |
3263 | intr->r_offset = fix->fx_addnumber; |
3264 | } | |
3265 | else if (fix->fx_r_type == BFD_RELOC_SH_COUNT) | |
3266 | { | |
3267 | /* We can't store the count in the object file, since this reloc | |
3268 | does not take up any space, so we store it in r_offset. The | |
3269 | fx_offset field was set when the fixup was created in | |
3270 | sh_coff_frob_file. */ | |
3271 | intr->r_offset = fix->fx_offset; | |
3272 | /* This reloc is always absolute. */ | |
3273 | symbol_ptr = NULL; | |
3274 | } | |
3275 | else if (fix->fx_r_type == BFD_RELOC_SH_ALIGN) | |
3276 | { | |
3277 | /* Store the alignment in the r_offset field. */ | |
3278 | intr->r_offset = fix->fx_offset; | |
3279 | /* This reloc is always absolute. */ | |
3280 | symbol_ptr = NULL; | |
3281 | } | |
3282 | else if (fix->fx_r_type == BFD_RELOC_SH_CODE | |
3283 | || fix->fx_r_type == BFD_RELOC_SH_DATA | |
3284 | || fix->fx_r_type == BFD_RELOC_SH_LABEL) | |
3285 | { | |
3286 | /* These relocs are always absolute. */ | |
3287 | symbol_ptr = NULL; | |
3288 | } | |
3289 | ||
3290 | /* Turn the segment of the symbol into an offset. */ | |
3291 | if (symbol_ptr != NULL) | |
3292 | { | |
3293 | dot = segment_info[S_GET_SEGMENT (symbol_ptr)].dot; | |
3294 | if (dot != NULL) | |
3295 | intr->r_symndx = dot->sy_number; | |
3296 | else | |
3297 | intr->r_symndx = symbol_ptr->sy_number; | |
3298 | } | |
3299 | else | |
3300 | intr->r_symndx = -1; | |
3301 | } | |
3302 | ||
3303 | #endif /* OBJ_COFF */ | |
3304 | #endif /* ! BFD_ASSEMBLER */ | |
3305 | ||
3306 | #ifdef BFD_ASSEMBLER | |
3307 | ||
3308 | /* Create a reloc. */ | |
3309 | ||
3310 | arelent * | |
3311 | tc_gen_reloc (section, fixp) | |
43841e91 | 3312 | asection *section ATTRIBUTE_UNUSED; |
252b5132 RH |
3313 | fixS *fixp; |
3314 | { | |
3315 | arelent *rel; | |
3316 | bfd_reloc_code_real_type r_type; | |
3317 | ||
3318 | rel = (arelent *) xmalloc (sizeof (arelent)); | |
49309057 ILT |
3319 | rel->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); |
3320 | *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); | |
252b5132 RH |
3321 | rel->address = fixp->fx_frag->fr_address + fixp->fx_where; |
3322 | ||
538cd60f AO |
3323 | if (fixp->fx_subsy |
3324 | && S_GET_SEGMENT (fixp->fx_subsy) == absolute_section) | |
3325 | { | |
3326 | fixp->fx_addnumber -= S_GET_VALUE (fixp->fx_subsy); | |
3327 | fixp->fx_subsy = 0; | |
3328 | } | |
3329 | ||
252b5132 RH |
3330 | r_type = fixp->fx_r_type; |
3331 | ||
3332 | if (SWITCH_TABLE (fixp)) | |
3333 | { | |
3334 | rel->addend = rel->address - S_GET_VALUE (fixp->fx_subsy); | |
3335 | if (r_type == BFD_RELOC_16) | |
3336 | r_type = BFD_RELOC_SH_SWITCH16; | |
3337 | else if (r_type == BFD_RELOC_8) | |
3338 | r_type = BFD_RELOC_8_PCREL; | |
3339 | else if (r_type == BFD_RELOC_32) | |
3340 | r_type = BFD_RELOC_SH_SWITCH32; | |
3341 | else | |
3342 | abort (); | |
3343 | } | |
3344 | else if (r_type == BFD_RELOC_SH_USES) | |
3345 | rel->addend = fixp->fx_addnumber; | |
3346 | else if (r_type == BFD_RELOC_SH_COUNT) | |
3347 | rel->addend = fixp->fx_offset; | |
3348 | else if (r_type == BFD_RELOC_SH_ALIGN) | |
3349 | rel->addend = fixp->fx_offset; | |
3350 | else if (r_type == BFD_RELOC_VTABLE_INHERIT | |
3351 | || r_type == BFD_RELOC_VTABLE_ENTRY) | |
3352 | rel->addend = fixp->fx_offset; | |
015551fc JR |
3353 | else if (r_type == BFD_RELOC_SH_LOOP_START |
3354 | || r_type == BFD_RELOC_SH_LOOP_END) | |
3355 | rel->addend = fixp->fx_offset; | |
3356 | else if (r_type == BFD_RELOC_SH_LABEL && fixp->fx_pcrel) | |
3357 | { | |
3358 | rel->addend = 0; | |
3359 | rel->address = rel->addend = fixp->fx_offset; | |
3360 | } | |
252b5132 RH |
3361 | else if (fixp->fx_pcrel) |
3362 | rel->addend = fixp->fx_addnumber; | |
a1cc9221 AO |
3363 | else if (r_type == BFD_RELOC_32 || r_type == BFD_RELOC_32_GOTOFF) |
3364 | rel->addend = fixp->fx_addnumber; | |
252b5132 RH |
3365 | else |
3366 | rel->addend = 0; | |
3367 | ||
3368 | rel->howto = bfd_reloc_type_lookup (stdoutput, r_type); | |
538cd60f | 3369 | if (rel->howto == NULL || fixp->fx_subsy) |
252b5132 RH |
3370 | { |
3371 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
3372 | _("Cannot represent relocation type %s"), | |
3373 | bfd_get_reloc_code_name (r_type)); | |
3374 | /* Set howto to a garbage value so that we can keep going. */ | |
3375 | rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32); | |
3376 | assert (rel->howto != NULL); | |
3377 | } | |
3378 | ||
3379 | return rel; | |
3380 | } | |
3381 | ||
538cd60f AO |
3382 | #ifdef OBJ_ELF |
3383 | inline static char * | |
3384 | sh_end_of_match (cont, what) | |
3385 | char *cont, *what; | |
3386 | { | |
3387 | int len = strlen (what); | |
3388 | ||
3389 | if (strncasecmp (cont, what, strlen (what)) == 0 | |
3390 | && ! is_part_of_name (cont[len])) | |
3391 | return cont + len; | |
3392 | ||
3393 | return NULL; | |
3394 | } | |
3395 | ||
3396 | int | |
3397 | sh_parse_name (name, exprP, nextcharP) | |
3398 | char const *name; | |
3399 | expressionS *exprP; | |
3400 | char *nextcharP; | |
3401 | { | |
3402 | char *next = input_line_pointer; | |
3403 | char *next_end; | |
3404 | int reloc_type; | |
3405 | segT segment; | |
3406 | ||
3407 | exprP->X_op_symbol = NULL; | |
3408 | ||
3409 | if (strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0) | |
3410 | { | |
3411 | if (! GOT_symbol) | |
3412 | GOT_symbol = symbol_find_or_make (name); | |
3413 | ||
3414 | exprP->X_add_symbol = GOT_symbol; | |
3415 | no_suffix: | |
3416 | /* If we have an absolute symbol or a reg, then we know its | |
3417 | value now. */ | |
3418 | segment = S_GET_SEGMENT (exprP->X_add_symbol); | |
3419 | if (segment == absolute_section) | |
3420 | { | |
3421 | exprP->X_op = O_constant; | |
3422 | exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol); | |
3423 | exprP->X_add_symbol = NULL; | |
3424 | } | |
3425 | else if (segment == reg_section) | |
3426 | { | |
3427 | exprP->X_op = O_register; | |
3428 | exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol); | |
3429 | exprP->X_add_symbol = NULL; | |
3430 | } | |
3431 | else | |
3432 | { | |
3433 | exprP->X_op = O_symbol; | |
3434 | exprP->X_add_number = 0; | |
3435 | } | |
3436 | ||
3437 | return 1; | |
3438 | } | |
3439 | ||
3440 | exprP->X_add_symbol = symbol_find_or_make (name); | |
3441 | ||
3442 | if (*nextcharP != '@') | |
3443 | goto no_suffix; | |
3444 | else if ((next_end = sh_end_of_match (next + 1, "GOTOFF"))) | |
3445 | reloc_type = BFD_RELOC_32_GOTOFF; | |
3446 | else if ((next_end = sh_end_of_match (next + 1, "GOT"))) | |
3447 | reloc_type = BFD_RELOC_32_GOT_PCREL; | |
3448 | else if ((next_end = sh_end_of_match (next + 1, "PLT"))) | |
3449 | reloc_type = BFD_RELOC_32_PLT_PCREL; | |
3450 | else | |
3451 | goto no_suffix; | |
3452 | ||
3453 | *input_line_pointer = *nextcharP; | |
3454 | input_line_pointer = next_end; | |
3455 | *nextcharP = *input_line_pointer; | |
3456 | *input_line_pointer = '\0'; | |
3457 | ||
3458 | exprP->X_op = O_PIC_reloc; | |
3459 | exprP->X_add_number = 0; | |
3460 | exprP->X_md = reloc_type; | |
3461 | ||
3462 | return 1; | |
3463 | } | |
3464 | #endif | |
252b5132 | 3465 | #endif /* BFD_ASSEMBLER */ |