Commit | Line | Data |
---|---|---|
ef230218 | 1 | /* tc-sh.c -- Assemble code for the Renesas / SuperH SH |
ae6063d4 | 2 | Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 |
f7e42eb4 | 3 | Free Software Foundation, Inc. |
252b5132 RH |
4 | |
5 | This file is part of GAS, the GNU Assembler. | |
6 | ||
7 | GAS is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GAS is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GAS; see the file COPYING. If not, write to | |
19 | the Free Software Foundation, 59 Temple Place - Suite 330, | |
20 | Boston, MA 02111-1307, USA. */ | |
21 | ||
6b31947e | 22 | /* Written By Steve Chamberlain <sac@cygnus.com> */ |
252b5132 RH |
23 | |
24 | #include <stdio.h> | |
25 | #include "as.h" | |
26 | #include "bfd.h" | |
27 | #include "subsegs.h" | |
28 | #define DEFINE_TABLE | |
29 | #include "opcodes/sh-opc.h" | |
3882b010 | 30 | #include "safe-ctype.h" |
43841e91 | 31 | #include "struc-symbol.h" |
d4845d57 JR |
32 | |
33 | #ifdef OBJ_ELF | |
34 | #include "elf/sh.h" | |
35 | #endif | |
36 | ||
0d10e182 | 37 | #include "dwarf2dbg.h" |
0d10e182 | 38 | |
e08ae979 HPN |
39 | typedef struct |
40 | { | |
41 | sh_arg_type type; | |
42 | int reg; | |
43 | expressionS immediate; | |
44 | } | |
45 | sh_operand_info; | |
46 | ||
252b5132 RH |
47 | const char comment_chars[] = "!"; |
48 | const char line_separator_chars[] = ";"; | |
49 | const char line_comment_chars[] = "!#"; | |
50 | ||
8edc77b9 KK |
51 | static void s_uses (int); |
52 | static void s_uacons (int); | |
252b5132 | 53 | |
a1cc9221 | 54 | #ifdef OBJ_ELF |
8edc77b9 | 55 | static void sh_elf_cons (int); |
538cd60f | 56 | |
a1cc9221 AO |
57 | symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */ |
58 | #endif | |
59 | ||
05982cac | 60 | static void |
8edc77b9 | 61 | big (int ignore ATTRIBUTE_UNUSED) |
05982cac HPN |
62 | { |
63 | if (! target_big_endian) | |
64 | as_bad (_("directive .big encountered when option -big required")); | |
65 | ||
66 | /* Stop further messages. */ | |
67 | target_big_endian = 1; | |
68 | } | |
252b5132 RH |
69 | |
70 | static void | |
8edc77b9 | 71 | little (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 72 | { |
05982cac HPN |
73 | if (target_big_endian) |
74 | as_bad (_("directive .little encountered when option -little required")); | |
75 | ||
76 | /* Stop further messages. */ | |
252b5132 RH |
77 | target_big_endian = 0; |
78 | } | |
79 | ||
d4845d57 JR |
80 | /* This table describes all the machine specific pseudo-ops the assembler |
81 | has to support. The fields are: | |
82 | pseudo-op name without dot | |
83 | function to call to execute this pseudo-op | |
6b31947e | 84 | Integer arg to pass to the function. */ |
d4845d57 | 85 | |
252b5132 RH |
86 | const pseudo_typeS md_pseudo_table[] = |
87 | { | |
a1cc9221 AO |
88 | #ifdef OBJ_ELF |
89 | {"long", sh_elf_cons, 4}, | |
90 | {"int", sh_elf_cons, 4}, | |
91 | {"word", sh_elf_cons, 2}, | |
92 | {"short", sh_elf_cons, 2}, | |
93 | #else | |
252b5132 RH |
94 | {"int", cons, 4}, |
95 | {"word", cons, 2}, | |
a1cc9221 | 96 | #endif /* OBJ_ELF */ |
05982cac | 97 | {"big", big, 0}, |
252b5132 RH |
98 | {"form", listing_psize, 0}, |
99 | {"little", little, 0}, | |
100 | {"heading", listing_title, 0}, | |
101 | {"import", s_ignore, 0}, | |
102 | {"page", listing_eject, 0}, | |
103 | {"program", s_ignore, 0}, | |
104 | {"uses", s_uses, 0}, | |
105 | {"uaword", s_uacons, 2}, | |
106 | {"ualong", s_uacons, 4}, | |
de68de20 AO |
107 | {"uaquad", s_uacons, 8}, |
108 | {"2byte", s_uacons, 2}, | |
109 | {"4byte", s_uacons, 4}, | |
110 | {"8byte", s_uacons, 8}, | |
324bfcf3 AO |
111 | #ifdef HAVE_SH64 |
112 | {"mode", s_sh64_mode, 0 }, | |
113 | ||
114 | /* Have the old name too. */ | |
115 | {"isa", s_sh64_mode, 0 }, | |
116 | ||
117 | /* Assert that the right ABI is used. */ | |
118 | {"abi", s_sh64_abi, 0 }, | |
119 | ||
120 | { "vtable_inherit", sh64_vtable_inherit, 0 }, | |
121 | { "vtable_entry", sh64_vtable_entry, 0 }, | |
122 | #endif /* HAVE_SH64 */ | |
252b5132 RH |
123 | {0, 0, 0} |
124 | }; | |
125 | ||
126 | /*int md_reloc_size; */ | |
127 | ||
128 | int sh_relax; /* set if -relax seen */ | |
129 | ||
130 | /* Whether -small was seen. */ | |
131 | ||
132 | int sh_small; | |
133 | ||
bdfaef52 | 134 | /* preset architecture set, if given; zero otherwise. */ |
d4845d57 | 135 | |
bdfaef52 | 136 | static int preset_target_arch; |
d4845d57 JR |
137 | |
138 | /* The bit mask of architectures that could | |
139 | accomodate the insns seen so far. */ | |
140 | static int valid_arch; | |
141 | ||
252b5132 RH |
142 | const char EXP_CHARS[] = "eE"; |
143 | ||
6b31947e | 144 | /* Chars that mean this number is a floating point constant. */ |
252b5132 RH |
145 | /* As in 0f12.456 */ |
146 | /* or 0d1.2345e12 */ | |
147 | const char FLT_CHARS[] = "rRsSfFdDxXpP"; | |
148 | ||
149 | #define C(a,b) ENCODE_RELAX(a,b) | |
150 | ||
252b5132 RH |
151 | #define ENCODE_RELAX(what,length) (((what) << 4) + (length)) |
152 | #define GET_WHAT(x) ((x>>4)) | |
153 | ||
6b31947e | 154 | /* These are the three types of relaxable instrction. */ |
324bfcf3 AO |
155 | /* These are the types of relaxable instructions; except for END which is |
156 | a marker. */ | |
252b5132 RH |
157 | #define COND_JUMP 1 |
158 | #define COND_JUMP_DELAY 2 | |
159 | #define UNCOND_JUMP 3 | |
324bfcf3 AO |
160 | |
161 | #ifdef HAVE_SH64 | |
162 | ||
163 | /* A 16-bit (times four) pc-relative operand, at most expanded to 32 bits. */ | |
164 | #define SH64PCREL16_32 4 | |
165 | /* A 16-bit (times four) pc-relative operand, at most expanded to 64 bits. */ | |
166 | #define SH64PCREL16_64 5 | |
167 | ||
168 | /* Variants of the above for adjusting the insn to PTA or PTB according to | |
169 | the label. */ | |
170 | #define SH64PCREL16PT_32 6 | |
171 | #define SH64PCREL16PT_64 7 | |
172 | ||
173 | /* A MOVI expansion, expanding to at most 32 or 64 bits. */ | |
174 | #define MOVI_IMM_32 8 | |
175 | #define MOVI_IMM_32_PCREL 9 | |
176 | #define MOVI_IMM_64 10 | |
177 | #define MOVI_IMM_64_PCREL 11 | |
178 | #define END 12 | |
179 | ||
180 | #else /* HAVE_SH64 */ | |
181 | ||
252b5132 RH |
182 | #define END 4 |
183 | ||
324bfcf3 AO |
184 | #endif /* HAVE_SH64 */ |
185 | ||
252b5132 RH |
186 | #define UNDEF_DISP 0 |
187 | #define COND8 1 | |
188 | #define COND12 2 | |
189 | #define COND32 3 | |
252b5132 RH |
190 | #define UNDEF_WORD_DISP 4 |
191 | ||
192 | #define UNCOND12 1 | |
193 | #define UNCOND32 2 | |
194 | ||
324bfcf3 AO |
195 | #ifdef HAVE_SH64 |
196 | #define UNDEF_SH64PCREL 0 | |
197 | #define SH64PCREL16 1 | |
198 | #define SH64PCREL32 2 | |
199 | #define SH64PCREL48 3 | |
200 | #define SH64PCREL64 4 | |
201 | #define SH64PCRELPLT 5 | |
202 | ||
203 | #define UNDEF_MOVI 0 | |
204 | #define MOVI_16 1 | |
205 | #define MOVI_32 2 | |
206 | #define MOVI_48 3 | |
207 | #define MOVI_64 4 | |
208 | #define MOVI_PLT 5 | |
209 | #define MOVI_GOTOFF 6 | |
210 | #define MOVI_GOTPC 7 | |
211 | #endif /* HAVE_SH64 */ | |
212 | ||
252b5132 RH |
213 | /* Branch displacements are from the address of the branch plus |
214 | four, thus all minimum and maximum values have 4 added to them. */ | |
215 | #define COND8_F 258 | |
216 | #define COND8_M -252 | |
217 | #define COND8_LENGTH 2 | |
218 | ||
219 | /* There is one extra instruction before the branch, so we must add | |
220 | two more bytes to account for it. */ | |
221 | #define COND12_F 4100 | |
222 | #define COND12_M -4090 | |
223 | #define COND12_LENGTH 6 | |
224 | ||
225 | #define COND12_DELAY_LENGTH 4 | |
226 | ||
227 | /* ??? The minimum and maximum values are wrong, but this does not matter | |
228 | since this relocation type is not supported yet. */ | |
229 | #define COND32_F (1<<30) | |
230 | #define COND32_M -(1<<30) | |
231 | #define COND32_LENGTH 14 | |
232 | ||
233 | #define UNCOND12_F 4098 | |
234 | #define UNCOND12_M -4092 | |
235 | #define UNCOND12_LENGTH 2 | |
236 | ||
237 | /* ??? The minimum and maximum values are wrong, but this does not matter | |
238 | since this relocation type is not supported yet. */ | |
239 | #define UNCOND32_F (1<<30) | |
240 | #define UNCOND32_M -(1<<30) | |
241 | #define UNCOND32_LENGTH 14 | |
242 | ||
324bfcf3 AO |
243 | #ifdef HAVE_SH64 |
244 | /* The trivial expansion of a SH64PCREL16 relaxation is just a "PT label, | |
245 | TRd" as is the current insn, so no extra length. Note that the "reach" | |
246 | is calculated from the address *after* that insn, but the offset in the | |
247 | insn is calculated from the beginning of the insn. We also need to | |
248 | take into account the implicit 1 coded as the "A" in PTA when counting | |
249 | forward. If PTB reaches an odd address, we trap that as an error | |
250 | elsewhere, so we don't have to have different relaxation entries. We | |
251 | don't add a one to the negative range, since PTB would then have the | |
252 | farthest backward-reaching value skipped, not generated at relaxation. */ | |
253 | #define SH64PCREL16_F (32767 * 4 - 4 + 1) | |
254 | #define SH64PCREL16_M (-32768 * 4 - 4) | |
255 | #define SH64PCREL16_LENGTH 0 | |
256 | ||
257 | /* The next step is to change that PT insn into | |
258 | MOVI ((label - datalabel Ln) >> 16) & 65535, R25 | |
259 | SHORI (label - datalabel Ln) & 65535, R25 | |
260 | Ln: | |
261 | PTREL R25,TRd | |
262 | which means two extra insns, 8 extra bytes. This is the limit for the | |
263 | 32-bit ABI. | |
264 | ||
265 | The expressions look a bit bad since we have to adjust this to avoid overflow on a | |
266 | 32-bit host. */ | |
267 | #define SH64PCREL32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4) | |
268 | #define SH64PCREL32_LENGTH (2 * 4) | |
269 | ||
270 | /* Similarly, we just change the MOVI and add a SHORI for the 48-bit | |
271 | expansion. */ | |
272 | #if BFD_HOST_64BIT_LONG | |
273 | /* The "reach" type is long, so we can only do this for a 64-bit-long | |
274 | host. */ | |
275 | #define SH64PCREL32_M (((long) -1 << 30) * 2 - 4) | |
276 | #define SH64PCREL48_F ((((long) 1 << 47) - 1) - 4) | |
277 | #define SH64PCREL48_M (((long) -1 << 47) - 4) | |
278 | #define SH64PCREL48_LENGTH (3 * 4) | |
279 | #else | |
280 | /* If the host does not have 64-bit longs, just make this state identical | |
281 | in reach to the 32-bit state. Note that we have a slightly incorrect | |
282 | reach, but the correct one above will overflow a 32-bit number. */ | |
283 | #define SH64PCREL32_M (((long) -1 << 30) * 2) | |
284 | #define SH64PCREL48_F SH64PCREL32_F | |
285 | #define SH64PCREL48_M SH64PCREL32_M | |
286 | #define SH64PCREL48_LENGTH (3 * 4) | |
287 | #endif /* BFD_HOST_64BIT_LONG */ | |
288 | ||
289 | /* And similarly for the 64-bit expansion; a MOVI + SHORI + SHORI + SHORI | |
290 | + PTREL sequence. */ | |
291 | #define SH64PCREL64_LENGTH (4 * 4) | |
292 | ||
293 | /* For MOVI, we make the MOVI + SHORI... expansion you can see in the | |
294 | SH64PCREL expansions. The PCREL one is similar, but the other has no | |
295 | pc-relative reach; it must be fully expanded in | |
296 | shmedia_md_estimate_size_before_relax. */ | |
297 | #define MOVI_16_LENGTH 0 | |
298 | #define MOVI_16_F (32767 - 4) | |
299 | #define MOVI_16_M (-32768 - 4) | |
300 | #define MOVI_32_LENGTH 4 | |
301 | #define MOVI_32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4) | |
302 | #define MOVI_48_LENGTH 8 | |
303 | ||
304 | #if BFD_HOST_64BIT_LONG | |
305 | /* The "reach" type is long, so we can only do this for a 64-bit-long | |
306 | host. */ | |
307 | #define MOVI_32_M (((long) -1 << 30) * 2 - 4) | |
308 | #define MOVI_48_F ((((long) 1 << 47) - 1) - 4) | |
309 | #define MOVI_48_M (((long) -1 << 47) - 4) | |
310 | #else | |
311 | /* If the host does not have 64-bit longs, just make this state identical | |
312 | in reach to the 32-bit state. Note that we have a slightly incorrect | |
313 | reach, but the correct one above will overflow a 32-bit number. */ | |
314 | #define MOVI_32_M (((long) -1 << 30) * 2) | |
315 | #define MOVI_48_F MOVI_32_F | |
316 | #define MOVI_48_M MOVI_32_M | |
317 | #endif /* BFD_HOST_64BIT_LONG */ | |
318 | ||
319 | #define MOVI_64_LENGTH 12 | |
320 | #endif /* HAVE_SH64 */ | |
321 | ||
43841e91 NC |
322 | #define EMPTY { 0, 0, 0, 0 } |
323 | ||
252b5132 | 324 | const relax_typeS md_relax_table[C (END, 0)] = { |
43841e91 NC |
325 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
326 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
252b5132 | 327 | |
43841e91 | 328 | EMPTY, |
252b5132 RH |
329 | /* C (COND_JUMP, COND8) */ |
330 | { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP, COND12) }, | |
331 | /* C (COND_JUMP, COND12) */ | |
332 | { COND12_F, COND12_M, COND12_LENGTH, C (COND_JUMP, COND32), }, | |
333 | /* C (COND_JUMP, COND32) */ | |
334 | { COND32_F, COND32_M, COND32_LENGTH, 0, }, | |
e66457fb AM |
335 | /* C (COND_JUMP, UNDEF_WORD_DISP) */ |
336 | { 0, 0, COND32_LENGTH, 0, }, | |
337 | EMPTY, EMPTY, EMPTY, | |
43841e91 | 338 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
252b5132 | 339 | |
43841e91 | 340 | EMPTY, |
252b5132 RH |
341 | /* C (COND_JUMP_DELAY, COND8) */ |
342 | { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP_DELAY, COND12) }, | |
343 | /* C (COND_JUMP_DELAY, COND12) */ | |
344 | { COND12_F, COND12_M, COND12_DELAY_LENGTH, C (COND_JUMP_DELAY, COND32), }, | |
345 | /* C (COND_JUMP_DELAY, COND32) */ | |
346 | { COND32_F, COND32_M, COND32_LENGTH, 0, }, | |
e66457fb AM |
347 | /* C (COND_JUMP_DELAY, UNDEF_WORD_DISP) */ |
348 | { 0, 0, COND32_LENGTH, 0, }, | |
349 | EMPTY, EMPTY, EMPTY, | |
43841e91 | 350 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
252b5132 | 351 | |
43841e91 | 352 | EMPTY, |
252b5132 RH |
353 | /* C (UNCOND_JUMP, UNCOND12) */ |
354 | { UNCOND12_F, UNCOND12_M, UNCOND12_LENGTH, C (UNCOND_JUMP, UNCOND32), }, | |
355 | /* C (UNCOND_JUMP, UNCOND32) */ | |
356 | { UNCOND32_F, UNCOND32_M, UNCOND32_LENGTH, 0, }, | |
e66457fb AM |
357 | EMPTY, |
358 | /* C (UNCOND_JUMP, UNDEF_WORD_DISP) */ | |
359 | { 0, 0, UNCOND32_LENGTH, 0, }, | |
360 | EMPTY, EMPTY, EMPTY, | |
43841e91 | 361 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
324bfcf3 AO |
362 | |
363 | #ifdef HAVE_SH64 | |
364 | /* C (SH64PCREL16_32, SH64PCREL16) */ | |
365 | EMPTY, | |
366 | { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16_32, SH64PCREL32) }, | |
367 | /* C (SH64PCREL16_32, SH64PCREL32) */ | |
368 | { 0, 0, SH64PCREL32_LENGTH, 0 }, | |
369 | EMPTY, EMPTY, | |
370 | /* C (SH64PCREL16_32, SH64PCRELPLT) */ | |
371 | { 0, 0, SH64PCREL32_LENGTH, 0 }, | |
372 | EMPTY, EMPTY, | |
373 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
374 | ||
375 | /* C (SH64PCREL16_64, SH64PCREL16) */ | |
376 | EMPTY, | |
377 | { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16_64, SH64PCREL32) }, | |
378 | /* C (SH64PCREL16_64, SH64PCREL32) */ | |
379 | { SH64PCREL32_F, SH64PCREL32_M, SH64PCREL32_LENGTH, C (SH64PCREL16_64, SH64PCREL48) }, | |
380 | /* C (SH64PCREL16_64, SH64PCREL48) */ | |
381 | { SH64PCREL48_F, SH64PCREL48_M, SH64PCREL48_LENGTH, C (SH64PCREL16_64, SH64PCREL64) }, | |
382 | /* C (SH64PCREL16_64, SH64PCREL64) */ | |
383 | { 0, 0, SH64PCREL64_LENGTH, 0 }, | |
384 | /* C (SH64PCREL16_64, SH64PCRELPLT) */ | |
385 | { 0, 0, SH64PCREL64_LENGTH, 0 }, | |
386 | EMPTY, EMPTY, | |
387 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
388 | ||
389 | /* C (SH64PCREL16PT_32, SH64PCREL16) */ | |
390 | EMPTY, | |
391 | { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16PT_32, SH64PCREL32) }, | |
392 | /* C (SH64PCREL16PT_32, SH64PCREL32) */ | |
393 | { 0, 0, SH64PCREL32_LENGTH, 0 }, | |
394 | EMPTY, EMPTY, | |
395 | /* C (SH64PCREL16PT_32, SH64PCRELPLT) */ | |
396 | { 0, 0, SH64PCREL32_LENGTH, 0 }, | |
397 | EMPTY, EMPTY, | |
398 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
399 | ||
400 | /* C (SH64PCREL16PT_64, SH64PCREL16) */ | |
401 | EMPTY, | |
402 | { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16PT_64, SH64PCREL32) }, | |
403 | /* C (SH64PCREL16PT_64, SH64PCREL32) */ | |
404 | { SH64PCREL32_F, | |
5d6255fe | 405 | SH64PCREL32_M, |
324bfcf3 AO |
406 | SH64PCREL32_LENGTH, |
407 | C (SH64PCREL16PT_64, SH64PCREL48) }, | |
408 | /* C (SH64PCREL16PT_64, SH64PCREL48) */ | |
409 | { SH64PCREL48_F, SH64PCREL48_M, SH64PCREL48_LENGTH, C (SH64PCREL16PT_64, SH64PCREL64) }, | |
410 | /* C (SH64PCREL16PT_64, SH64PCREL64) */ | |
411 | { 0, 0, SH64PCREL64_LENGTH, 0 }, | |
412 | /* C (SH64PCREL16PT_64, SH64PCRELPLT) */ | |
413 | { 0, 0, SH64PCREL64_LENGTH, 0}, | |
414 | EMPTY, EMPTY, | |
415 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
416 | ||
417 | /* C (MOVI_IMM_32, UNDEF_MOVI) */ | |
418 | { 0, 0, MOVI_32_LENGTH, 0 }, | |
419 | /* C (MOVI_IMM_32, MOVI_16) */ | |
420 | { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_32, MOVI_32) }, | |
421 | /* C (MOVI_IMM_32, MOVI_32) */ | |
422 | { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, 0 }, | |
423 | EMPTY, EMPTY, EMPTY, | |
424 | /* C (MOVI_IMM_32, MOVI_GOTOFF) */ | |
425 | { 0, 0, MOVI_32_LENGTH, 0 }, | |
426 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
427 | ||
428 | /* C (MOVI_IMM_32_PCREL, MOVI_16) */ | |
429 | EMPTY, | |
430 | { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_32_PCREL, MOVI_32) }, | |
431 | /* C (MOVI_IMM_32_PCREL, MOVI_32) */ | |
432 | { 0, 0, MOVI_32_LENGTH, 0 }, | |
433 | EMPTY, EMPTY, | |
434 | /* C (MOVI_IMM_32_PCREL, MOVI_PLT) */ | |
435 | { 0, 0, MOVI_32_LENGTH, 0 }, | |
436 | EMPTY, | |
437 | /* C (MOVI_IMM_32_PCREL, MOVI_GOTPC) */ | |
438 | { 0, 0, MOVI_32_LENGTH, 0 }, | |
439 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
440 | ||
441 | /* C (MOVI_IMM_64, UNDEF_MOVI) */ | |
442 | { 0, 0, MOVI_64_LENGTH, 0 }, | |
443 | /* C (MOVI_IMM_64, MOVI_16) */ | |
444 | { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_64, MOVI_32) }, | |
445 | /* C (MOVI_IMM_64, MOVI_32) */ | |
446 | { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, C (MOVI_IMM_64, MOVI_48) }, | |
447 | /* C (MOVI_IMM_64, MOVI_48) */ | |
448 | { MOVI_48_F, MOVI_48_M, MOVI_48_LENGTH, C (MOVI_IMM_64, MOVI_64) }, | |
449 | /* C (MOVI_IMM_64, MOVI_64) */ | |
450 | { 0, 0, MOVI_64_LENGTH, 0 }, | |
451 | EMPTY, | |
452 | /* C (MOVI_IMM_64, MOVI_GOTOFF) */ | |
453 | { 0, 0, MOVI_64_LENGTH, 0 }, | |
454 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
455 | ||
456 | /* C (MOVI_IMM_64_PCREL, MOVI_16) */ | |
457 | EMPTY, | |
458 | { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_32) }, | |
459 | /* C (MOVI_IMM_64_PCREL, MOVI_32) */ | |
460 | { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_48) }, | |
461 | /* C (MOVI_IMM_64_PCREL, MOVI_48) */ | |
462 | { MOVI_48_F, MOVI_48_M, MOVI_48_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_64) }, | |
463 | /* C (MOVI_IMM_64_PCREL, MOVI_64) */ | |
464 | { 0, 0, MOVI_64_LENGTH, 0 }, | |
465 | /* C (MOVI_IMM_64_PCREL, MOVI_PLT) */ | |
466 | { 0, 0, MOVI_64_LENGTH, 0 }, | |
467 | EMPTY, | |
468 | /* C (MOVI_IMM_64_PCREL, MOVI_GOTPC) */ | |
469 | { 0, 0, MOVI_64_LENGTH, 0 }, | |
470 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
471 | ||
472 | #endif /* HAVE_SH64 */ | |
473 | ||
252b5132 RH |
474 | }; |
475 | ||
43841e91 NC |
476 | #undef EMPTY |
477 | ||
252b5132 RH |
478 | static struct hash_control *opcode_hash_control; /* Opcode mnemonics */ |
479 | ||
a1cc9221 AO |
480 | \f |
481 | #ifdef OBJ_ELF | |
538cd60f AO |
482 | /* Determinet whether the symbol needs any kind of PIC relocation. */ |
483 | ||
484 | inline static int | |
8edc77b9 | 485 | sh_PIC_related_p (symbolS *sym) |
a1cc9221 | 486 | { |
538cd60f | 487 | expressionS *exp; |
a1cc9221 | 488 | |
538cd60f AO |
489 | if (! sym) |
490 | return 0; | |
491 | ||
492 | if (sym == GOT_symbol) | |
493 | return 1; | |
494 | ||
324bfcf3 AO |
495 | #ifdef HAVE_SH64 |
496 | if (sh_PIC_related_p (*symbol_get_tc (sym))) | |
497 | return 1; | |
498 | #endif | |
499 | ||
538cd60f AO |
500 | exp = symbol_get_value_expression (sym); |
501 | ||
502 | return (exp->X_op == O_PIC_reloc | |
503 | || sh_PIC_related_p (exp->X_add_symbol) | |
504 | || sh_PIC_related_p (exp->X_op_symbol)); | |
505 | } | |
506 | ||
507 | /* Determine the relocation type to be used to represent the | |
508 | expression, that may be rearranged. */ | |
509 | ||
510 | static int | |
8edc77b9 | 511 | sh_check_fixup (expressionS *main_exp, bfd_reloc_code_real_type *r_type_p) |
538cd60f AO |
512 | { |
513 | expressionS *exp = main_exp; | |
514 | ||
515 | /* This is here for backward-compatibility only. GCC used to generated: | |
516 | ||
517 | f@PLT + . - (.LPCS# + 2) | |
518 | ||
519 | but we'd rather be able to handle this as a PIC-related reference | |
520 | plus/minus a symbol. However, gas' parser gives us: | |
521 | ||
522 | O_subtract (O_add (f@PLT, .), .LPCS#+2) | |
5d6255fe | 523 | |
538cd60f AO |
524 | so we attempt to transform this into: |
525 | ||
526 | O_subtract (f@PLT, O_subtract (.LPCS#+2, .)) | |
527 | ||
5d6255fe | 528 | which we can handle simply below. */ |
538cd60f AO |
529 | if (exp->X_op == O_subtract) |
530 | { | |
531 | if (sh_PIC_related_p (exp->X_op_symbol)) | |
532 | return 1; | |
533 | ||
534 | exp = symbol_get_value_expression (exp->X_add_symbol); | |
535 | ||
536 | if (exp && sh_PIC_related_p (exp->X_op_symbol)) | |
537 | return 1; | |
538 | ||
539 | if (exp && exp->X_op == O_add | |
540 | && sh_PIC_related_p (exp->X_add_symbol)) | |
541 | { | |
542 | symbolS *sym = exp->X_add_symbol; | |
543 | ||
544 | exp->X_op = O_subtract; | |
545 | exp->X_add_symbol = main_exp->X_op_symbol; | |
546 | ||
547 | main_exp->X_op_symbol = main_exp->X_add_symbol; | |
548 | main_exp->X_add_symbol = sym; | |
549 | ||
550 | main_exp->X_add_number += exp->X_add_number; | |
551 | exp->X_add_number = 0; | |
552 | } | |
553 | ||
554 | exp = main_exp; | |
555 | } | |
556 | else if (exp->X_op == O_add && sh_PIC_related_p (exp->X_op_symbol)) | |
557 | return 1; | |
558 | ||
559 | if (exp->X_op == O_symbol || exp->X_op == O_add || exp->X_op == O_subtract) | |
560 | { | |
324bfcf3 AO |
561 | #ifdef HAVE_SH64 |
562 | if (exp->X_add_symbol | |
563 | && (exp->X_add_symbol == GOT_symbol | |
564 | || (GOT_symbol | |
565 | && *symbol_get_tc (exp->X_add_symbol) == GOT_symbol))) | |
566 | { | |
567 | switch (*r_type_p) | |
568 | { | |
569 | case BFD_RELOC_SH_IMM_LOW16: | |
570 | *r_type_p = BFD_RELOC_SH_GOTPC_LOW16; | |
571 | break; | |
572 | ||
573 | case BFD_RELOC_SH_IMM_MEDLOW16: | |
574 | *r_type_p = BFD_RELOC_SH_GOTPC_MEDLOW16; | |
575 | break; | |
576 | ||
577 | case BFD_RELOC_SH_IMM_MEDHI16: | |
578 | *r_type_p = BFD_RELOC_SH_GOTPC_MEDHI16; | |
579 | break; | |
580 | ||
581 | case BFD_RELOC_SH_IMM_HI16: | |
582 | *r_type_p = BFD_RELOC_SH_GOTPC_HI16; | |
583 | break; | |
584 | ||
585 | case BFD_RELOC_NONE: | |
586 | case BFD_RELOC_UNUSED: | |
587 | *r_type_p = BFD_RELOC_SH_GOTPC; | |
588 | break; | |
5d6255fe | 589 | |
324bfcf3 AO |
590 | default: |
591 | abort (); | |
592 | } | |
593 | return 0; | |
594 | } | |
595 | #else | |
538cd60f AO |
596 | if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol) |
597 | { | |
598 | *r_type_p = BFD_RELOC_SH_GOTPC; | |
599 | return 0; | |
600 | } | |
324bfcf3 | 601 | #endif |
538cd60f AO |
602 | exp = symbol_get_value_expression (exp->X_add_symbol); |
603 | if (! exp) | |
604 | return 0; | |
605 | } | |
606 | ||
607 | if (exp->X_op == O_PIC_reloc) | |
608 | { | |
324bfcf3 AO |
609 | #ifdef HAVE_SH64 |
610 | switch (*r_type_p) | |
611 | { | |
612 | case BFD_RELOC_NONE: | |
613 | case BFD_RELOC_UNUSED: | |
614 | *r_type_p = exp->X_md; | |
615 | break; | |
616 | ||
617 | case BFD_RELOC_SH_IMM_LOW16: | |
618 | switch (exp->X_md) | |
619 | { | |
620 | case BFD_RELOC_32_GOTOFF: | |
621 | *r_type_p = BFD_RELOC_SH_GOTOFF_LOW16; | |
622 | break; | |
5d6255fe | 623 | |
324bfcf3 AO |
624 | case BFD_RELOC_SH_GOTPLT32: |
625 | *r_type_p = BFD_RELOC_SH_GOTPLT_LOW16; | |
626 | break; | |
5d6255fe | 627 | |
324bfcf3 AO |
628 | case BFD_RELOC_32_GOT_PCREL: |
629 | *r_type_p = BFD_RELOC_SH_GOT_LOW16; | |
630 | break; | |
5d6255fe | 631 | |
324bfcf3 AO |
632 | case BFD_RELOC_32_PLT_PCREL: |
633 | *r_type_p = BFD_RELOC_SH_PLT_LOW16; | |
634 | break; | |
635 | ||
636 | default: | |
637 | abort (); | |
638 | } | |
639 | break; | |
640 | ||
641 | case BFD_RELOC_SH_IMM_MEDLOW16: | |
642 | switch (exp->X_md) | |
643 | { | |
644 | case BFD_RELOC_32_GOTOFF: | |
645 | *r_type_p = BFD_RELOC_SH_GOTOFF_MEDLOW16; | |
646 | break; | |
5d6255fe | 647 | |
324bfcf3 AO |
648 | case BFD_RELOC_SH_GOTPLT32: |
649 | *r_type_p = BFD_RELOC_SH_GOTPLT_MEDLOW16; | |
650 | break; | |
5d6255fe | 651 | |
324bfcf3 AO |
652 | case BFD_RELOC_32_GOT_PCREL: |
653 | *r_type_p = BFD_RELOC_SH_GOT_MEDLOW16; | |
654 | break; | |
5d6255fe | 655 | |
324bfcf3 AO |
656 | case BFD_RELOC_32_PLT_PCREL: |
657 | *r_type_p = BFD_RELOC_SH_PLT_MEDLOW16; | |
658 | break; | |
659 | ||
660 | default: | |
661 | abort (); | |
662 | } | |
663 | break; | |
664 | ||
665 | case BFD_RELOC_SH_IMM_MEDHI16: | |
666 | switch (exp->X_md) | |
667 | { | |
668 | case BFD_RELOC_32_GOTOFF: | |
669 | *r_type_p = BFD_RELOC_SH_GOTOFF_MEDHI16; | |
670 | break; | |
5d6255fe | 671 | |
324bfcf3 AO |
672 | case BFD_RELOC_SH_GOTPLT32: |
673 | *r_type_p = BFD_RELOC_SH_GOTPLT_MEDHI16; | |
674 | break; | |
5d6255fe | 675 | |
324bfcf3 AO |
676 | case BFD_RELOC_32_GOT_PCREL: |
677 | *r_type_p = BFD_RELOC_SH_GOT_MEDHI16; | |
678 | break; | |
5d6255fe | 679 | |
324bfcf3 AO |
680 | case BFD_RELOC_32_PLT_PCREL: |
681 | *r_type_p = BFD_RELOC_SH_PLT_MEDHI16; | |
682 | break; | |
683 | ||
684 | default: | |
685 | abort (); | |
686 | } | |
687 | break; | |
688 | ||
689 | case BFD_RELOC_SH_IMM_HI16: | |
690 | switch (exp->X_md) | |
691 | { | |
692 | case BFD_RELOC_32_GOTOFF: | |
693 | *r_type_p = BFD_RELOC_SH_GOTOFF_HI16; | |
694 | break; | |
5d6255fe | 695 | |
324bfcf3 AO |
696 | case BFD_RELOC_SH_GOTPLT32: |
697 | *r_type_p = BFD_RELOC_SH_GOTPLT_HI16; | |
698 | break; | |
5d6255fe | 699 | |
324bfcf3 AO |
700 | case BFD_RELOC_32_GOT_PCREL: |
701 | *r_type_p = BFD_RELOC_SH_GOT_HI16; | |
702 | break; | |
5d6255fe | 703 | |
324bfcf3 AO |
704 | case BFD_RELOC_32_PLT_PCREL: |
705 | *r_type_p = BFD_RELOC_SH_PLT_HI16; | |
706 | break; | |
707 | ||
708 | default: | |
709 | abort (); | |
710 | } | |
711 | break; | |
712 | ||
713 | default: | |
714 | abort (); | |
715 | } | |
716 | #else | |
538cd60f | 717 | *r_type_p = exp->X_md; |
324bfcf3 | 718 | #endif |
538cd60f AO |
719 | if (exp == main_exp) |
720 | exp->X_op = O_symbol; | |
721 | else | |
722 | { | |
723 | main_exp->X_add_symbol = exp->X_add_symbol; | |
724 | main_exp->X_add_number += exp->X_add_number; | |
725 | } | |
726 | } | |
727 | else | |
728 | return (sh_PIC_related_p (exp->X_add_symbol) | |
729 | || sh_PIC_related_p (exp->X_op_symbol)); | |
730 | ||
731 | return 0; | |
732 | } | |
733 | ||
734 | /* Add expression EXP of SIZE bytes to offset OFF of fragment FRAG. */ | |
735 | ||
736 | void | |
8edc77b9 | 737 | sh_cons_fix_new (fragS *frag, int off, int size, expressionS *exp) |
538cd60f AO |
738 | { |
739 | bfd_reloc_code_real_type r_type = BFD_RELOC_UNUSED; | |
740 | ||
741 | if (sh_check_fixup (exp, &r_type)) | |
742 | as_bad (_("Invalid PIC expression.")); | |
743 | ||
744 | if (r_type == BFD_RELOC_UNUSED) | |
745 | switch (size) | |
a1cc9221 | 746 | { |
538cd60f AO |
747 | case 1: |
748 | r_type = BFD_RELOC_8; | |
749 | break; | |
a1cc9221 | 750 | |
538cd60f AO |
751 | case 2: |
752 | r_type = BFD_RELOC_16; | |
753 | break; | |
754 | ||
755 | case 4: | |
756 | r_type = BFD_RELOC_32; | |
757 | break; | |
a1cc9221 | 758 | |
324bfcf3 AO |
759 | #ifdef HAVE_SH64 |
760 | case 8: | |
761 | r_type = BFD_RELOC_64; | |
762 | break; | |
763 | #endif | |
764 | ||
538cd60f AO |
765 | default: |
766 | goto error; | |
767 | } | |
768 | else if (size != 4) | |
769 | { | |
770 | error: | |
771 | as_bad (_("unsupported BFD relocation size %u"), size); | |
772 | r_type = BFD_RELOC_UNUSED; | |
773 | } | |
5d6255fe | 774 | |
538cd60f | 775 | fix_new_exp (frag, off, size, exp, 0, r_type); |
a1cc9221 AO |
776 | } |
777 | ||
778 | /* The regular cons() function, that reads constants, doesn't support | |
779 | suffixes such as @GOT, @GOTOFF and @PLT, that generate | |
780 | machine-specific relocation types. So we must define it here. */ | |
781 | /* Clobbers input_line_pointer, checks end-of-line. */ | |
8edc77b9 | 782 | /* NBYTES 1=.byte, 2=.word, 4=.long */ |
a1cc9221 | 783 | static void |
8edc77b9 | 784 | sh_elf_cons (register int nbytes) |
a1cc9221 | 785 | { |
538cd60f | 786 | expressionS exp; |
a1cc9221 | 787 | |
324bfcf3 AO |
788 | #ifdef HAVE_SH64 |
789 | ||
790 | /* Update existing range to include a previous insn, if there was one. */ | |
b34976b6 | 791 | sh64_update_contents_mark (TRUE); |
324bfcf3 AO |
792 | |
793 | /* We need to make sure the contents type is set to data. */ | |
794 | sh64_flag_output (); | |
795 | ||
796 | #endif /* HAVE_SH64 */ | |
797 | ||
a1cc9221 AO |
798 | if (is_it_end_of_statement ()) |
799 | { | |
800 | demand_empty_rest_of_line (); | |
801 | return; | |
802 | } | |
803 | ||
804 | do | |
805 | { | |
806 | expression (&exp); | |
538cd60f | 807 | emit_expr (&exp, (unsigned int) nbytes); |
a1cc9221 AO |
808 | } |
809 | while (*input_line_pointer++ == ','); | |
810 | ||
81d4177b | 811 | input_line_pointer--; /* Put terminator back into stream. */ |
a1cc9221 AO |
812 | if (*input_line_pointer == '#' || *input_line_pointer == '!') |
813 | { | |
dda5ecfc | 814 | while (! is_end_of_line[(unsigned char) *input_line_pointer++]); |
a1cc9221 AO |
815 | } |
816 | else | |
817 | demand_empty_rest_of_line (); | |
818 | } | |
819 | #endif /* OBJ_ELF */ | |
820 | ||
821 | \f | |
6b31947e NC |
822 | /* This function is called once, at assembler startup time. This should |
823 | set up all the tables, etc that the MD part of the assembler needs. */ | |
252b5132 RH |
824 | |
825 | void | |
8edc77b9 | 826 | md_begin (void) |
252b5132 | 827 | { |
5ff37431 | 828 | const sh_opcode_info *opcode; |
252b5132 | 829 | char *prev_name = ""; |
d4845d57 | 830 | int target_arch; |
252b5132 | 831 | |
bdfaef52 JR |
832 | target_arch |
833 | = preset_target_arch ? preset_target_arch : arch_sh1_up & ~arch_sh_dsp_up; | |
d4845d57 JR |
834 | valid_arch = target_arch; |
835 | ||
324bfcf3 AO |
836 | #ifdef HAVE_SH64 |
837 | shmedia_md_begin (); | |
838 | #endif | |
839 | ||
252b5132 RH |
840 | opcode_hash_control = hash_new (); |
841 | ||
6b31947e | 842 | /* Insert unique names into hash table. */ |
252b5132 RH |
843 | for (opcode = sh_table; opcode->name; opcode++) |
844 | { | |
5ff37431 | 845 | if (strcmp (prev_name, opcode->name) != 0) |
252b5132 | 846 | { |
a37c8f88 JR |
847 | if (! (opcode->arch & target_arch)) |
848 | continue; | |
252b5132 RH |
849 | prev_name = opcode->name; |
850 | hash_insert (opcode_hash_control, opcode->name, (char *) opcode); | |
851 | } | |
252b5132 RH |
852 | } |
853 | } | |
854 | ||
855 | static int reg_m; | |
856 | static int reg_n; | |
d4845d57 JR |
857 | static int reg_x, reg_y; |
858 | static int reg_efg; | |
252b5132 RH |
859 | static int reg_b; |
860 | ||
3882b010 | 861 | #define IDENT_CHAR(c) (ISALNUM (c) || (c) == '_') |
dead1419 | 862 | |
6b31947e NC |
863 | /* Try to parse a reg name. Return the number of chars consumed. */ |
864 | ||
252b5132 | 865 | static int |
8edc77b9 | 866 | parse_reg (char *src, int *mode, int *reg) |
252b5132 | 867 | { |
3882b010 L |
868 | char l0 = TOLOWER (src[0]); |
869 | char l1 = l0 ? TOLOWER (src[1]) : 0; | |
e46fee70 | 870 | |
dead1419 | 871 | /* We use ! IDENT_CHAR for the next character after the register name, to |
252b5132 | 872 | make sure that we won't accidentally recognize a symbol name such as |
dead1419 | 873 | 'sram' or sr_ram as being a reference to the register 'sr'. */ |
252b5132 | 874 | |
e46fee70 | 875 | if (l0 == 'r') |
252b5132 | 876 | { |
e46fee70 | 877 | if (l1 == '1') |
d4845d57 JR |
878 | { |
879 | if (src[2] >= '0' && src[2] <= '5' | |
dead1419 | 880 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
881 | { |
882 | *mode = A_REG_N; | |
883 | *reg = 10 + src[2] - '0'; | |
884 | return 3; | |
885 | } | |
886 | } | |
e46fee70 | 887 | if (l1 >= '0' && l1 <= '9' |
dead1419 | 888 | && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
889 | { |
890 | *mode = A_REG_N; | |
e46fee70 | 891 | *reg = (l1 - '0'); |
d4845d57 JR |
892 | return 2; |
893 | } | |
e46fee70 | 894 | if (l1 >= '0' && l1 <= '7' && strncasecmp (&src[2], "_bank", 5) == 0 |
dead1419 JR |
895 | && ! IDENT_CHAR ((unsigned char) src[7])) |
896 | { | |
897 | *mode = A_REG_B; | |
e46fee70 | 898 | *reg = (l1 - '0'); |
dead1419 JR |
899 | return 7; |
900 | } | |
d4845d57 | 901 | |
e46fee70 | 902 | if (l1 == 'e' && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
903 | { |
904 | *mode = A_RE; | |
905 | return 2; | |
906 | } | |
e46fee70 | 907 | if (l1 == 's' && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
908 | { |
909 | *mode = A_RS; | |
910 | return 2; | |
911 | } | |
252b5132 RH |
912 | } |
913 | ||
e46fee70 | 914 | if (l0 == 'a') |
252b5132 | 915 | { |
e46fee70 | 916 | if (l1 == '0') |
d4845d57 | 917 | { |
dead1419 | 918 | if (! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
919 | { |
920 | *mode = DSP_REG_N; | |
921 | *reg = A_A0_NUM; | |
922 | return 2; | |
923 | } | |
3882b010 | 924 | if (TOLOWER (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
925 | { |
926 | *mode = DSP_REG_N; | |
927 | *reg = A_A0G_NUM; | |
928 | return 3; | |
929 | } | |
930 | } | |
e46fee70 | 931 | if (l1 == '1') |
252b5132 | 932 | { |
dead1419 | 933 | if (! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 | 934 | { |
d4845d57 JR |
935 | *mode = DSP_REG_N; |
936 | *reg = A_A1_NUM; | |
937 | return 2; | |
938 | } | |
3882b010 | 939 | if (TOLOWER (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
940 | { |
941 | *mode = DSP_REG_N; | |
942 | *reg = A_A1G_NUM; | |
252b5132 RH |
943 | return 3; |
944 | } | |
945 | } | |
d4845d57 | 946 | |
e46fee70 | 947 | if (l1 == 'x' && src[2] >= '0' && src[2] <= '1' |
dead1419 | 948 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
949 | { |
950 | *mode = A_REG_N; | |
e46fee70 | 951 | *reg = 4 + (l1 - '0'); |
d4845d57 JR |
952 | return 3; |
953 | } | |
e46fee70 | 954 | if (l1 == 'y' && src[2] >= '0' && src[2] <= '1' |
dead1419 | 955 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
956 | { |
957 | *mode = A_REG_N; | |
e46fee70 | 958 | *reg = 6 + (l1 - '0'); |
d4845d57 JR |
959 | return 3; |
960 | } | |
e46fee70 | 961 | if (l1 == 's' && src[2] >= '0' && src[2] <= '3' |
dead1419 | 962 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 | 963 | { |
e46fee70 | 964 | int n = l1 - '0'; |
d4845d57 JR |
965 | |
966 | *mode = A_REG_N; | |
967 | *reg = n | ((~n & 2) << 1); | |
968 | return 3; | |
969 | } | |
970 | } | |
971 | ||
912a07db | 972 | if (l0 == 'i' && l1 && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 | 973 | { |
e46fee70 | 974 | if (l1 == 's') |
d4845d57 JR |
975 | { |
976 | *mode = A_REG_N; | |
977 | *reg = 8; | |
252b5132 RH |
978 | return 2; |
979 | } | |
e46fee70 | 980 | if (l1 == 'x') |
d4845d57 JR |
981 | { |
982 | *mode = A_REG_N; | |
983 | *reg = 8; | |
984 | return 2; | |
985 | } | |
e46fee70 | 986 | if (l1 == 'y') |
d4845d57 JR |
987 | { |
988 | *mode = A_REG_N; | |
989 | *reg = 9; | |
990 | return 2; | |
991 | } | |
992 | } | |
993 | ||
e46fee70 | 994 | if (l0 == 'x' && l1 >= '0' && l1 <= '1' |
dead1419 | 995 | && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
996 | { |
997 | *mode = DSP_REG_N; | |
e46fee70 | 998 | *reg = A_X0_NUM + l1 - '0'; |
d4845d57 JR |
999 | return 2; |
1000 | } | |
1001 | ||
e46fee70 | 1002 | if (l0 == 'y' && l1 >= '0' && l1 <= '1' |
dead1419 | 1003 | && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
1004 | { |
1005 | *mode = DSP_REG_N; | |
e46fee70 | 1006 | *reg = A_Y0_NUM + l1 - '0'; |
d4845d57 JR |
1007 | return 2; |
1008 | } | |
1009 | ||
e46fee70 | 1010 | if (l0 == 'm' && l1 >= '0' && l1 <= '1' |
dead1419 | 1011 | && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
1012 | { |
1013 | *mode = DSP_REG_N; | |
e46fee70 | 1014 | *reg = l1 == '0' ? A_M0_NUM : A_M1_NUM; |
d4845d57 | 1015 | return 2; |
252b5132 RH |
1016 | } |
1017 | ||
e46fee70 HPN |
1018 | if (l0 == 's' |
1019 | && l1 == 's' | |
3882b010 | 1020 | && TOLOWER (src[2]) == 'r' && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1021 | { |
1022 | *mode = A_SSR; | |
1023 | return 3; | |
1024 | } | |
1025 | ||
3882b010 | 1026 | if (l0 == 's' && l1 == 'p' && TOLOWER (src[2]) == 'c' |
dead1419 | 1027 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1028 | { |
1029 | *mode = A_SPC; | |
1030 | return 3; | |
1031 | } | |
1032 | ||
3882b010 | 1033 | if (l0 == 's' && l1 == 'g' && TOLOWER (src[2]) == 'r' |
dead1419 | 1034 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1035 | { |
1036 | *mode = A_SGR; | |
1037 | return 3; | |
1038 | } | |
1039 | ||
3882b010 | 1040 | if (l0 == 'd' && l1 == 's' && TOLOWER (src[2]) == 'r' |
dead1419 | 1041 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
1042 | { |
1043 | *mode = A_DSR; | |
1044 | return 3; | |
1045 | } | |
1046 | ||
3882b010 | 1047 | if (l0 == 'd' && l1 == 'b' && TOLOWER (src[2]) == 'r' |
dead1419 | 1048 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1049 | { |
1050 | *mode = A_DBR; | |
1051 | return 3; | |
1052 | } | |
1053 | ||
e46fee70 | 1054 | if (l0 == 's' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 RH |
1055 | { |
1056 | *mode = A_SR; | |
1057 | return 2; | |
1058 | } | |
1059 | ||
e46fee70 | 1060 | if (l0 == 's' && l1 == 'p' && ! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 RH |
1061 | { |
1062 | *mode = A_REG_N; | |
1063 | *reg = 15; | |
1064 | return 2; | |
1065 | } | |
1066 | ||
e46fee70 | 1067 | if (l0 == 'p' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 RH |
1068 | { |
1069 | *mode = A_PR; | |
1070 | return 2; | |
1071 | } | |
e46fee70 | 1072 | if (l0 == 'p' && l1 == 'c' && ! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 | 1073 | { |
015551fc JR |
1074 | /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0' |
1075 | and use an uninitialized immediate. */ | |
1076 | *mode = A_PC; | |
252b5132 RH |
1077 | return 2; |
1078 | } | |
3882b010 | 1079 | if (l0 == 'g' && l1 == 'b' && TOLOWER (src[2]) == 'r' |
dead1419 | 1080 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1081 | { |
1082 | *mode = A_GBR; | |
1083 | return 3; | |
1084 | } | |
3882b010 | 1085 | if (l0 == 'v' && l1 == 'b' && TOLOWER (src[2]) == 'r' |
dead1419 | 1086 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1087 | { |
1088 | *mode = A_VBR; | |
1089 | return 3; | |
1090 | } | |
1091 | ||
3882b010 | 1092 | if (l0 == 'm' && l1 == 'a' && TOLOWER (src[2]) == 'c' |
dead1419 | 1093 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 | 1094 | { |
3882b010 | 1095 | if (TOLOWER (src[3]) == 'l') |
252b5132 RH |
1096 | { |
1097 | *mode = A_MACL; | |
1098 | return 4; | |
1099 | } | |
3882b010 | 1100 | if (TOLOWER (src[3]) == 'h') |
252b5132 RH |
1101 | { |
1102 | *mode = A_MACH; | |
1103 | return 4; | |
1104 | } | |
1105 | } | |
3882b010 | 1106 | if (l0 == 'm' && l1 == 'o' && TOLOWER (src[2]) == 'd' |
912a07db | 1107 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
1108 | { |
1109 | *mode = A_MOD; | |
1110 | return 3; | |
1111 | } | |
e46fee70 | 1112 | if (l0 == 'f' && l1 == 'r') |
252b5132 RH |
1113 | { |
1114 | if (src[2] == '1') | |
1115 | { | |
1116 | if (src[3] >= '0' && src[3] <= '5' | |
dead1419 | 1117 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
1118 | { |
1119 | *mode = F_REG_N; | |
1120 | *reg = 10 + src[3] - '0'; | |
1121 | return 4; | |
1122 | } | |
1123 | } | |
1124 | if (src[2] >= '0' && src[2] <= '9' | |
dead1419 | 1125 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1126 | { |
1127 | *mode = F_REG_N; | |
1128 | *reg = (src[2] - '0'); | |
1129 | return 3; | |
1130 | } | |
1131 | } | |
e46fee70 | 1132 | if (l0 == 'd' && l1 == 'r') |
252b5132 RH |
1133 | { |
1134 | if (src[2] == '1') | |
1135 | { | |
1136 | if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1) | |
dead1419 | 1137 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
1138 | { |
1139 | *mode = D_REG_N; | |
1140 | *reg = 10 + src[3] - '0'; | |
1141 | return 4; | |
1142 | } | |
1143 | } | |
1144 | if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1) | |
dead1419 | 1145 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1146 | { |
1147 | *mode = D_REG_N; | |
1148 | *reg = (src[2] - '0'); | |
1149 | return 3; | |
1150 | } | |
1151 | } | |
e46fee70 | 1152 | if (l0 == 'x' && l1 == 'd') |
252b5132 RH |
1153 | { |
1154 | if (src[2] == '1') | |
1155 | { | |
1156 | if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1) | |
dead1419 | 1157 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
1158 | { |
1159 | *mode = X_REG_N; | |
1160 | *reg = 11 + src[3] - '0'; | |
1161 | return 4; | |
1162 | } | |
1163 | } | |
1164 | if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1) | |
dead1419 | 1165 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1166 | { |
1167 | *mode = X_REG_N; | |
1168 | *reg = (src[2] - '0') + 1; | |
1169 | return 3; | |
1170 | } | |
1171 | } | |
e46fee70 | 1172 | if (l0 == 'f' && l1 == 'v') |
252b5132 | 1173 | { |
dead1419 | 1174 | if (src[2] == '1'&& src[3] == '2' && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
1175 | { |
1176 | *mode = V_REG_N; | |
1177 | *reg = 12; | |
1178 | return 4; | |
1179 | } | |
1180 | if ((src[2] == '0' || src[2] == '4' || src[2] == '8') | |
dead1419 | 1181 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1182 | { |
1183 | *mode = V_REG_N; | |
1184 | *reg = (src[2] - '0'); | |
1185 | return 3; | |
1186 | } | |
1187 | } | |
3882b010 L |
1188 | if (l0 == 'f' && l1 == 'p' && TOLOWER (src[2]) == 'u' |
1189 | && TOLOWER (src[3]) == 'l' | |
dead1419 | 1190 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
1191 | { |
1192 | *mode = FPUL_N; | |
1193 | return 4; | |
1194 | } | |
1195 | ||
3882b010 L |
1196 | if (l0 == 'f' && l1 == 'p' && TOLOWER (src[2]) == 's' |
1197 | && TOLOWER (src[3]) == 'c' | |
1198 | && TOLOWER (src[4]) == 'r' && ! IDENT_CHAR ((unsigned char) src[5])) | |
252b5132 RH |
1199 | { |
1200 | *mode = FPSCR_N; | |
1201 | return 5; | |
1202 | } | |
1203 | ||
3882b010 L |
1204 | if (l0 == 'x' && l1 == 'm' && TOLOWER (src[2]) == 't' |
1205 | && TOLOWER (src[3]) == 'r' | |
1206 | && TOLOWER (src[4]) == 'x' && ! IDENT_CHAR ((unsigned char) src[5])) | |
252b5132 RH |
1207 | { |
1208 | *mode = XMTRX_M4; | |
1209 | return 5; | |
1210 | } | |
1211 | ||
1212 | return 0; | |
1213 | } | |
1214 | ||
c4aa876b | 1215 | static char * |
8edc77b9 | 1216 | parse_exp (char *s, sh_operand_info *op) |
252b5132 RH |
1217 | { |
1218 | char *save; | |
1219 | char *new; | |
1220 | ||
1221 | save = input_line_pointer; | |
1222 | input_line_pointer = s; | |
015551fc JR |
1223 | expression (&op->immediate); |
1224 | if (op->immediate.X_op == O_absent) | |
252b5132 | 1225 | as_bad (_("missing operand")); |
538cd60f AO |
1226 | #ifdef OBJ_ELF |
1227 | else if (op->immediate.X_op == O_PIC_reloc | |
1228 | || sh_PIC_related_p (op->immediate.X_add_symbol) | |
1229 | || sh_PIC_related_p (op->immediate.X_op_symbol)) | |
1230 | as_bad (_("misplaced PIC operand")); | |
1231 | #endif | |
252b5132 RH |
1232 | new = input_line_pointer; |
1233 | input_line_pointer = save; | |
1234 | return new; | |
1235 | } | |
1236 | ||
252b5132 RH |
1237 | /* The many forms of operand: |
1238 | ||
1239 | Rn Register direct | |
1240 | @Rn Register indirect | |
1241 | @Rn+ Autoincrement | |
1242 | @-Rn Autodecrement | |
1243 | @(disp:4,Rn) | |
1244 | @(disp:8,GBR) | |
1245 | @(disp:8,PC) | |
1246 | ||
1247 | @(R0,Rn) | |
1248 | @(R0,GBR) | |
1249 | ||
1250 | disp:8 | |
1251 | disp:12 | |
1252 | #imm8 | |
1253 | pr, gbr, vbr, macl, mach | |
252b5132 RH |
1254 | */ |
1255 | ||
c4aa876b | 1256 | static char * |
8edc77b9 | 1257 | parse_at (char *src, sh_operand_info *op) |
252b5132 RH |
1258 | { |
1259 | int len; | |
1260 | int mode; | |
1261 | src++; | |
1262 | if (src[0] == '-') | |
1263 | { | |
6b31947e | 1264 | /* Must be predecrement. */ |
252b5132 RH |
1265 | src++; |
1266 | ||
1267 | len = parse_reg (src, &mode, &(op->reg)); | |
1268 | if (mode != A_REG_N) | |
1269 | as_bad (_("illegal register after @-")); | |
1270 | ||
1271 | op->type = A_DEC_N; | |
1272 | src += len; | |
1273 | } | |
1274 | else if (src[0] == '(') | |
1275 | { | |
1276 | /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or | |
8d4d84c2 | 1277 | @(r0, rn). */ |
252b5132 RH |
1278 | src++; |
1279 | len = parse_reg (src, &mode, &(op->reg)); | |
1280 | if (len && mode == A_REG_N) | |
1281 | { | |
1282 | src += len; | |
1283 | if (op->reg != 0) | |
1284 | { | |
1285 | as_bad (_("must be @(r0,...)")); | |
1286 | } | |
1287 | if (src[0] == ',') | |
252b5132 | 1288 | { |
8d4d84c2 AO |
1289 | src++; |
1290 | /* Now can be rn or gbr. */ | |
1291 | len = parse_reg (src, &mode, &(op->reg)); | |
1292 | } | |
1293 | else | |
1294 | { | |
1295 | len = 0; | |
252b5132 | 1296 | } |
8d4d84c2 | 1297 | if (len) |
252b5132 | 1298 | { |
8d4d84c2 AO |
1299 | if (mode == A_GBR) |
1300 | { | |
1301 | op->type = A_R0_GBR; | |
1302 | } | |
1303 | else if (mode == A_REG_N) | |
1304 | { | |
1305 | op->type = A_IND_R0_REG_N; | |
1306 | } | |
1307 | else | |
1308 | { | |
1309 | as_bad (_("syntax error in @(r0,...)")); | |
1310 | } | |
252b5132 RH |
1311 | } |
1312 | else | |
1313 | { | |
8d4d84c2 | 1314 | as_bad (_("syntax error in @(r0...)")); |
252b5132 RH |
1315 | } |
1316 | } | |
1317 | else | |
1318 | { | |
8d4d84c2 | 1319 | /* Must be an @(disp,.. thing). */ |
015551fc | 1320 | src = parse_exp (src, op); |
252b5132 RH |
1321 | if (src[0] == ',') |
1322 | src++; | |
8d4d84c2 | 1323 | /* Now can be rn, gbr or pc. */ |
252b5132 RH |
1324 | len = parse_reg (src, &mode, &op->reg); |
1325 | if (len) | |
1326 | { | |
1327 | if (mode == A_REG_N) | |
1328 | { | |
1329 | op->type = A_DISP_REG_N; | |
1330 | } | |
1331 | else if (mode == A_GBR) | |
1332 | { | |
1333 | op->type = A_DISP_GBR; | |
1334 | } | |
015551fc | 1335 | else if (mode == A_PC) |
252b5132 | 1336 | { |
dbb4348d JR |
1337 | /* We want @(expr, pc) to uniformly address . + expr, |
1338 | no matter if expr is a constant, or a more complex | |
1339 | expression, e.g. sym-. or sym1-sym2. | |
1340 | However, we also used to accept @(sym,pc) | |
1341 | as adressing sym, i.e. meaning the same as plain sym. | |
1342 | Some existing code does use the @(sym,pc) syntax, so | |
1343 | we give it the old semantics for now, but warn about | |
1344 | its use, so that users have some time to fix their code. | |
1345 | ||
1346 | Note that due to this backward compatibility hack, | |
1347 | we'll get unexpected results when @(offset, pc) is used, | |
1348 | and offset is a symbol that is set later to an an address | |
1349 | difference, or an external symbol that is set to an | |
1350 | address difference in another source file, so we want to | |
1351 | eventually remove it. */ | |
9691d64f JR |
1352 | if (op->immediate.X_op == O_symbol) |
1353 | { | |
1354 | op->type = A_DISP_PC; | |
1355 | as_warn (_("Deprecated syntax.")); | |
1356 | } | |
1357 | else | |
1358 | { | |
1359 | op->type = A_DISP_PC_ABS; | |
1360 | /* Such operands don't get corrected for PC==.+4, so | |
1361 | make the correction here. */ | |
1362 | op->immediate.X_add_number -= 4; | |
1363 | } | |
252b5132 RH |
1364 | } |
1365 | else | |
1366 | { | |
1367 | as_bad (_("syntax error in @(disp,[Rn, gbr, pc])")); | |
1368 | } | |
1369 | } | |
1370 | else | |
1371 | { | |
1372 | as_bad (_("syntax error in @(disp,[Rn, gbr, pc])")); | |
1373 | } | |
1374 | } | |
1375 | src += len; | |
1376 | if (src[0] != ')') | |
1377 | as_bad (_("expecting )")); | |
1378 | else | |
1379 | src++; | |
1380 | } | |
1381 | else | |
1382 | { | |
1383 | src += parse_reg (src, &mode, &(op->reg)); | |
1384 | if (mode != A_REG_N) | |
006299d3 NC |
1385 | as_bad (_("illegal register after @")); |
1386 | ||
252b5132 RH |
1387 | if (src[0] == '+') |
1388 | { | |
1000a02a NC |
1389 | char l0, l1; |
1390 | ||
252b5132 | 1391 | src++; |
1000a02a NC |
1392 | l0 = TOLOWER (src[0]); |
1393 | l1 = TOLOWER (src[1]); | |
1394 | ||
1395 | if ((l0 == 'r' && l1 == '8') | |
1396 | || (l0 == 'i' && (l1 == 'x' || l1 == 's'))) | |
d4845d57 JR |
1397 | { |
1398 | src += 2; | |
1399 | op->type = A_PMOD_N; | |
1400 | } | |
006299d3 NC |
1401 | else if ( (l0 == 'r' && l1 == '9') |
1402 | || (l0 == 'i' && l1 == 'y')) | |
d4845d57 JR |
1403 | { |
1404 | src += 2; | |
1405 | op->type = A_PMODY_N; | |
1406 | } | |
1407 | else | |
1408 | op->type = A_INC_N; | |
252b5132 RH |
1409 | } |
1410 | else | |
006299d3 | 1411 | op->type = A_IND_N; |
252b5132 RH |
1412 | } |
1413 | return src; | |
1414 | } | |
1415 | ||
1416 | static void | |
8edc77b9 | 1417 | get_operand (char **ptr, sh_operand_info *op) |
252b5132 RH |
1418 | { |
1419 | char *src = *ptr; | |
1420 | int mode = -1; | |
1421 | unsigned int len; | |
1422 | ||
1423 | if (src[0] == '#') | |
1424 | { | |
1425 | src++; | |
015551fc | 1426 | *ptr = parse_exp (src, op); |
252b5132 RH |
1427 | op->type = A_IMM; |
1428 | return; | |
1429 | } | |
1430 | ||
1431 | else if (src[0] == '@') | |
1432 | { | |
1433 | *ptr = parse_at (src, op); | |
1434 | return; | |
1435 | } | |
1436 | len = parse_reg (src, &mode, &(op->reg)); | |
1437 | if (len) | |
1438 | { | |
1439 | *ptr = src + len; | |
1440 | op->type = mode; | |
1441 | return; | |
1442 | } | |
1443 | else | |
1444 | { | |
6b31947e | 1445 | /* Not a reg, the only thing left is a displacement. */ |
015551fc | 1446 | *ptr = parse_exp (src, op); |
252b5132 RH |
1447 | op->type = A_DISP_PC; |
1448 | return; | |
1449 | } | |
1450 | } | |
1451 | ||
c4aa876b | 1452 | static char * |
8edc77b9 | 1453 | get_operands (sh_opcode_info *info, char *args, sh_operand_info *operand) |
252b5132 RH |
1454 | { |
1455 | char *ptr = args; | |
1456 | if (info->arg[0]) | |
1457 | { | |
d4845d57 JR |
1458 | /* The pre-processor will eliminate whitespace in front of '@' |
1459 | after the first argument; we may be called multiple times | |
1460 | from assemble_ppi, so don't insist on finding whitespace here. */ | |
1461 | if (*ptr == ' ') | |
1462 | ptr++; | |
252b5132 RH |
1463 | |
1464 | get_operand (&ptr, operand + 0); | |
1465 | if (info->arg[1]) | |
1466 | { | |
1467 | if (*ptr == ',') | |
1468 | { | |
1469 | ptr++; | |
1470 | } | |
1471 | get_operand (&ptr, operand + 1); | |
52ccafd0 JR |
1472 | /* ??? Hack: psha/pshl have a varying operand number depending on |
1473 | the type of the first operand. We handle this by having the | |
1474 | three-operand version first and reducing the number of operands | |
1475 | parsed to two if we see that the first operand is an immediate. | |
1476 | This works because no insn with three operands has an immediate | |
1477 | as first operand. */ | |
1478 | if (info->arg[2] && operand[0].type != A_IMM) | |
252b5132 RH |
1479 | { |
1480 | if (*ptr == ',') | |
1481 | { | |
1482 | ptr++; | |
1483 | } | |
1484 | get_operand (&ptr, operand + 2); | |
1485 | } | |
1486 | else | |
1487 | { | |
1488 | operand[2].type = 0; | |
1489 | } | |
1490 | } | |
1491 | else | |
1492 | { | |
1493 | operand[1].type = 0; | |
1494 | operand[2].type = 0; | |
1495 | } | |
1496 | } | |
1497 | else | |
1498 | { | |
1499 | operand[0].type = 0; | |
1500 | operand[1].type = 0; | |
1501 | operand[2].type = 0; | |
1502 | } | |
1503 | return ptr; | |
1504 | } | |
1505 | ||
1506 | /* Passed a pointer to a list of opcodes which use different | |
1507 | addressing modes, return the opcode which matches the opcodes | |
6b31947e | 1508 | provided. */ |
252b5132 | 1509 | |
c4aa876b | 1510 | static sh_opcode_info * |
8edc77b9 | 1511 | get_specific (sh_opcode_info *opcode, sh_operand_info *operands) |
252b5132 RH |
1512 | { |
1513 | sh_opcode_info *this_try = opcode; | |
1514 | char *name = opcode->name; | |
1515 | int n = 0; | |
c4aa876b | 1516 | |
252b5132 RH |
1517 | while (opcode->name) |
1518 | { | |
1519 | this_try = opcode++; | |
5ff37431 | 1520 | if ((this_try->name != name) && (strcmp (this_try->name, name) != 0)) |
252b5132 RH |
1521 | { |
1522 | /* We've looked so far down the table that we've run out of | |
6b31947e | 1523 | opcodes with the same name. */ |
252b5132 RH |
1524 | return 0; |
1525 | } | |
c4aa876b | 1526 | |
6b31947e | 1527 | /* Look at both operands needed by the opcodes and provided by |
252b5132 RH |
1528 | the user - since an arg test will often fail on the same arg |
1529 | again and again, we'll try and test the last failing arg the | |
6b31947e | 1530 | first on each opcode try. */ |
252b5132 RH |
1531 | for (n = 0; this_try->arg[n]; n++) |
1532 | { | |
1533 | sh_operand_info *user = operands + n; | |
1534 | sh_arg_type arg = this_try->arg[n]; | |
c4aa876b | 1535 | |
252b5132 RH |
1536 | switch (arg) |
1537 | { | |
7679ead9 AO |
1538 | case A_DISP_PC: |
1539 | if (user->type == A_DISP_PC_ABS) | |
1540 | break; | |
1541 | /* Fall through. */ | |
252b5132 RH |
1542 | case A_IMM: |
1543 | case A_BDISP12: | |
1544 | case A_BDISP8: | |
1545 | case A_DISP_GBR: | |
252b5132 RH |
1546 | case A_MACH: |
1547 | case A_PR: | |
1548 | case A_MACL: | |
1549 | if (user->type != arg) | |
1550 | goto fail; | |
1551 | break; | |
1552 | case A_R0: | |
1553 | /* opcode needs r0 */ | |
1554 | if (user->type != A_REG_N || user->reg != 0) | |
1555 | goto fail; | |
1556 | break; | |
1557 | case A_R0_GBR: | |
1558 | if (user->type != A_R0_GBR || user->reg != 0) | |
1559 | goto fail; | |
1560 | break; | |
1561 | case F_FR0: | |
1562 | if (user->type != F_REG_N || user->reg != 0) | |
1563 | goto fail; | |
1564 | break; | |
1565 | ||
1566 | case A_REG_N: | |
1567 | case A_INC_N: | |
1568 | case A_DEC_N: | |
1569 | case A_IND_N: | |
1570 | case A_IND_R0_REG_N: | |
1571 | case A_DISP_REG_N: | |
1572 | case F_REG_N: | |
1573 | case D_REG_N: | |
1574 | case X_REG_N: | |
1575 | case V_REG_N: | |
1576 | case FPUL_N: | |
1577 | case FPSCR_N: | |
d4845d57 JR |
1578 | case A_PMOD_N: |
1579 | case A_PMODY_N: | |
1580 | case DSP_REG_N: | |
252b5132 RH |
1581 | /* Opcode needs rn */ |
1582 | if (user->type != arg) | |
1583 | goto fail; | |
1584 | reg_n = user->reg; | |
1585 | break; | |
252b5132 RH |
1586 | case DX_REG_N: |
1587 | if (user->type != D_REG_N && user->type != X_REG_N) | |
1588 | goto fail; | |
1589 | reg_n = user->reg; | |
1590 | break; | |
1591 | case A_GBR: | |
1592 | case A_SR: | |
1593 | case A_VBR: | |
d4845d57 JR |
1594 | case A_DSR: |
1595 | case A_MOD: | |
1596 | case A_RE: | |
1597 | case A_RS: | |
252b5132 RH |
1598 | case A_SSR: |
1599 | case A_SPC: | |
1600 | case A_SGR: | |
1601 | case A_DBR: | |
1602 | if (user->type != arg) | |
1603 | goto fail; | |
1604 | break; | |
1605 | ||
c4aa876b | 1606 | case A_REG_B: |
252b5132 RH |
1607 | if (user->type != arg) |
1608 | goto fail; | |
1609 | reg_b = user->reg; | |
1610 | break; | |
1611 | ||
1612 | case A_REG_M: | |
1613 | case A_INC_M: | |
1614 | case A_DEC_M: | |
1615 | case A_IND_M: | |
1616 | case A_IND_R0_REG_M: | |
1617 | case A_DISP_REG_M: | |
d4845d57 | 1618 | case DSP_REG_M: |
252b5132 RH |
1619 | /* Opcode needs rn */ |
1620 | if (user->type != arg - A_REG_M + A_REG_N) | |
1621 | goto fail; | |
1622 | reg_m = user->reg; | |
1623 | break; | |
1624 | ||
d4845d57 JR |
1625 | case DSP_REG_X: |
1626 | if (user->type != DSP_REG_N) | |
1627 | goto fail; | |
1628 | switch (user->reg) | |
1629 | { | |
1630 | case A_X0_NUM: | |
1631 | reg_x = 0; | |
1632 | break; | |
1633 | case A_X1_NUM: | |
1634 | reg_x = 1; | |
1635 | break; | |
1636 | case A_A0_NUM: | |
1637 | reg_x = 2; | |
1638 | break; | |
1639 | case A_A1_NUM: | |
1640 | reg_x = 3; | |
1641 | break; | |
1642 | default: | |
1643 | goto fail; | |
1644 | } | |
1645 | break; | |
1646 | ||
1647 | case DSP_REG_Y: | |
1648 | if (user->type != DSP_REG_N) | |
1649 | goto fail; | |
1650 | switch (user->reg) | |
1651 | { | |
1652 | case A_Y0_NUM: | |
1653 | reg_y = 0; | |
1654 | break; | |
1655 | case A_Y1_NUM: | |
1656 | reg_y = 1; | |
1657 | break; | |
1658 | case A_M0_NUM: | |
1659 | reg_y = 2; | |
1660 | break; | |
1661 | case A_M1_NUM: | |
1662 | reg_y = 3; | |
1663 | break; | |
1664 | default: | |
1665 | goto fail; | |
1666 | } | |
1667 | break; | |
1668 | ||
1669 | case DSP_REG_E: | |
1670 | if (user->type != DSP_REG_N) | |
1671 | goto fail; | |
1672 | switch (user->reg) | |
1673 | { | |
1674 | case A_X0_NUM: | |
1675 | reg_efg = 0 << 10; | |
1676 | break; | |
1677 | case A_X1_NUM: | |
1678 | reg_efg = 1 << 10; | |
1679 | break; | |
1680 | case A_Y0_NUM: | |
1681 | reg_efg = 2 << 10; | |
1682 | break; | |
1683 | case A_A1_NUM: | |
1684 | reg_efg = 3 << 10; | |
1685 | break; | |
1686 | default: | |
1687 | goto fail; | |
1688 | } | |
1689 | break; | |
1690 | ||
1691 | case DSP_REG_F: | |
1692 | if (user->type != DSP_REG_N) | |
1693 | goto fail; | |
1694 | switch (user->reg) | |
1695 | { | |
1696 | case A_Y0_NUM: | |
1697 | reg_efg |= 0 << 8; | |
1698 | break; | |
1699 | case A_Y1_NUM: | |
1700 | reg_efg |= 1 << 8; | |
1701 | break; | |
1702 | case A_X0_NUM: | |
1703 | reg_efg |= 2 << 8; | |
1704 | break; | |
1705 | case A_A1_NUM: | |
1706 | reg_efg |= 3 << 8; | |
1707 | break; | |
1708 | default: | |
1709 | goto fail; | |
1710 | } | |
1711 | break; | |
1712 | ||
1713 | case DSP_REG_G: | |
1714 | if (user->type != DSP_REG_N) | |
1715 | goto fail; | |
1716 | switch (user->reg) | |
1717 | { | |
1718 | case A_M0_NUM: | |
1719 | reg_efg |= 0 << 2; | |
1720 | break; | |
1721 | case A_M1_NUM: | |
1722 | reg_efg |= 1 << 2; | |
1723 | break; | |
1724 | case A_A0_NUM: | |
1725 | reg_efg |= 2 << 2; | |
1726 | break; | |
1727 | case A_A1_NUM: | |
1728 | reg_efg |= 3 << 2; | |
1729 | break; | |
1730 | default: | |
1731 | goto fail; | |
1732 | } | |
1733 | break; | |
1734 | ||
1735 | case A_A0: | |
1736 | if (user->type != DSP_REG_N || user->reg != A_A0_NUM) | |
1737 | goto fail; | |
1738 | break; | |
1739 | case A_X0: | |
1740 | if (user->type != DSP_REG_N || user->reg != A_X0_NUM) | |
1741 | goto fail; | |
1742 | break; | |
1743 | case A_X1: | |
1744 | if (user->type != DSP_REG_N || user->reg != A_X1_NUM) | |
1745 | goto fail; | |
1746 | break; | |
1747 | case A_Y0: | |
1748 | if (user->type != DSP_REG_N || user->reg != A_Y0_NUM) | |
1749 | goto fail; | |
1750 | break; | |
1751 | case A_Y1: | |
1752 | if (user->type != DSP_REG_N || user->reg != A_Y1_NUM) | |
1753 | goto fail; | |
1754 | break; | |
1755 | ||
252b5132 RH |
1756 | case F_REG_M: |
1757 | case D_REG_M: | |
1758 | case X_REG_M: | |
1759 | case V_REG_M: | |
1760 | case FPUL_M: | |
1761 | case FPSCR_M: | |
1762 | /* Opcode needs rn */ | |
1763 | if (user->type != arg - F_REG_M + F_REG_N) | |
1764 | goto fail; | |
1765 | reg_m = user->reg; | |
1766 | break; | |
1767 | case DX_REG_M: | |
1768 | if (user->type != D_REG_N && user->type != X_REG_N) | |
1769 | goto fail; | |
1770 | reg_m = user->reg; | |
1771 | break; | |
1772 | case XMTRX_M4: | |
1773 | if (user->type != XMTRX_M4) | |
1774 | goto fail; | |
1775 | reg_m = 4; | |
1776 | break; | |
c4aa876b | 1777 | |
252b5132 RH |
1778 | default: |
1779 | printf (_("unhandled %d\n"), arg); | |
1780 | goto fail; | |
1781 | } | |
1782 | } | |
a37c8f88 JR |
1783 | if ( !(valid_arch & this_try->arch)) |
1784 | goto fail; | |
d4845d57 | 1785 | valid_arch &= this_try->arch; |
252b5132 | 1786 | return this_try; |
c4aa876b NC |
1787 | fail: |
1788 | ; | |
252b5132 RH |
1789 | } |
1790 | ||
1791 | return 0; | |
1792 | } | |
1793 | ||
252b5132 | 1794 | static void |
8edc77b9 | 1795 | insert (char *where, int how, int pcrel, sh_operand_info *op) |
252b5132 RH |
1796 | { |
1797 | fix_new_exp (frag_now, | |
1798 | where - frag_now->fr_literal, | |
1799 | 2, | |
015551fc | 1800 | &op->immediate, |
252b5132 RH |
1801 | pcrel, |
1802 | how); | |
1803 | } | |
1804 | ||
1805 | static void | |
8edc77b9 | 1806 | build_relax (sh_opcode_info *opcode, sh_operand_info *op) |
252b5132 RH |
1807 | { |
1808 | int high_byte = target_big_endian ? 0 : 1; | |
1809 | char *p; | |
1810 | ||
1811 | if (opcode->arg[0] == A_BDISP8) | |
1812 | { | |
1813 | int what = (opcode->nibbles[1] & 4) ? COND_JUMP_DELAY : COND_JUMP; | |
1814 | p = frag_var (rs_machine_dependent, | |
1815 | md_relax_table[C (what, COND32)].rlx_length, | |
1816 | md_relax_table[C (what, COND8)].rlx_length, | |
1817 | C (what, 0), | |
015551fc JR |
1818 | op->immediate.X_add_symbol, |
1819 | op->immediate.X_add_number, | |
252b5132 RH |
1820 | 0); |
1821 | p[high_byte] = (opcode->nibbles[0] << 4) | (opcode->nibbles[1]); | |
1822 | } | |
1823 | else if (opcode->arg[0] == A_BDISP12) | |
1824 | { | |
1825 | p = frag_var (rs_machine_dependent, | |
1826 | md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length, | |
1827 | md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length, | |
1828 | C (UNCOND_JUMP, 0), | |
015551fc JR |
1829 | op->immediate.X_add_symbol, |
1830 | op->immediate.X_add_number, | |
252b5132 RH |
1831 | 0); |
1832 | p[high_byte] = (opcode->nibbles[0] << 4); | |
1833 | } | |
1834 | ||
1835 | } | |
1836 | ||
6b31947e | 1837 | /* Insert ldrs & ldre with fancy relocations that relaxation can recognize. */ |
d67b5d6d | 1838 | |
015551fc | 1839 | static char * |
8edc77b9 | 1840 | insert_loop_bounds (char *output, sh_operand_info *operand) |
015551fc JR |
1841 | { |
1842 | char *name; | |
1843 | symbolS *end_sym; | |
1844 | ||
1845 | /* Since the low byte of the opcode will be overwritten by the reloc, we | |
1846 | can just stash the high byte into both bytes and ignore endianness. */ | |
1847 | output[0] = 0x8c; | |
1848 | output[1] = 0x8c; | |
1849 | insert (output, BFD_RELOC_SH_LOOP_START, 1, operand); | |
1850 | insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1); | |
1851 | ||
1852 | if (sh_relax) | |
1853 | { | |
1854 | static int count = 0; | |
1855 | ||
1856 | /* If the last loop insn is a two-byte-insn, it is in danger of being | |
1857 | swapped with the insn after it. To prevent this, create a new | |
1858 | symbol - complete with SH_LABEL reloc - after the last loop insn. | |
1859 | If the last loop insn is four bytes long, the symbol will be | |
1860 | right in the middle, but four byte insns are not swapped anyways. */ | |
1861 | /* A REPEAT takes 6 bytes. The SH has a 32 bit address space. | |
1862 | Hence a 9 digit number should be enough to count all REPEATs. */ | |
1863 | name = alloca (11); | |
1864 | sprintf (name, "_R%x", count++ & 0x3fffffff); | |
c4aa876b | 1865 | end_sym = symbol_new (name, undefined_section, 0, &zero_address_frag); |
015551fc JR |
1866 | /* Make this a local symbol. */ |
1867 | #ifdef OBJ_COFF | |
1868 | SF_SET_LOCAL (end_sym); | |
1869 | #endif /* OBJ_COFF */ | |
1870 | symbol_table_insert (end_sym); | |
1871 | end_sym->sy_value = operand[1].immediate; | |
1872 | end_sym->sy_value.X_add_number += 2; | |
1873 | fix_new (frag_now, frag_now_fix (), 2, end_sym, 0, 1, BFD_RELOC_SH_LABEL); | |
1874 | } | |
1875 | ||
1876 | output = frag_more (2); | |
1877 | output[0] = 0x8e; | |
1878 | output[1] = 0x8e; | |
1879 | insert (output, BFD_RELOC_SH_LOOP_START, 1, operand); | |
1880 | insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1); | |
1881 | ||
1882 | return frag_more (2); | |
1883 | } | |
1884 | ||
d67b5d6d | 1885 | /* Now we know what sort of opcodes it is, let's build the bytes. */ |
6b31947e | 1886 | |
0d10e182 | 1887 | static unsigned int |
8edc77b9 | 1888 | build_Mytes (sh_opcode_info *opcode, sh_operand_info *operand) |
252b5132 RH |
1889 | { |
1890 | int index; | |
1891 | char nbuf[4]; | |
1892 | char *output = frag_more (2); | |
0d10e182 | 1893 | unsigned int size = 2; |
252b5132 RH |
1894 | int low_byte = target_big_endian ? 1 : 0; |
1895 | nbuf[0] = 0; | |
1896 | nbuf[1] = 0; | |
1897 | nbuf[2] = 0; | |
1898 | nbuf[3] = 0; | |
1899 | ||
1900 | for (index = 0; index < 4; index++) | |
1901 | { | |
1902 | sh_nibble_type i = opcode->nibbles[index]; | |
1903 | if (i < 16) | |
1904 | { | |
1905 | nbuf[index] = i; | |
1906 | } | |
1907 | else | |
1908 | { | |
1909 | switch (i) | |
1910 | { | |
1911 | case REG_N: | |
1912 | nbuf[index] = reg_n; | |
1913 | break; | |
1914 | case REG_M: | |
1915 | nbuf[index] = reg_m; | |
1916 | break; | |
d4845d57 JR |
1917 | case SDT_REG_N: |
1918 | if (reg_n < 2 || reg_n > 5) | |
1919 | as_bad (_("Invalid register: 'r%d'"), reg_n); | |
1920 | nbuf[index] = (reg_n & 3) | 4; | |
1921 | break; | |
252b5132 RH |
1922 | case REG_NM: |
1923 | nbuf[index] = reg_n | (reg_m >> 2); | |
1924 | break; | |
c4aa876b | 1925 | case REG_B: |
252b5132 RH |
1926 | nbuf[index] = reg_b | 0x08; |
1927 | break; | |
015551fc JR |
1928 | case IMM0_4BY4: |
1929 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand); | |
1930 | break; | |
1931 | case IMM0_4BY2: | |
1932 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand); | |
1933 | break; | |
1934 | case IMM0_4: | |
1935 | insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand); | |
1936 | break; | |
1937 | case IMM1_4BY4: | |
1938 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand + 1); | |
1939 | break; | |
1940 | case IMM1_4BY2: | |
1941 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand + 1); | |
252b5132 | 1942 | break; |
015551fc JR |
1943 | case IMM1_4: |
1944 | insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand + 1); | |
252b5132 | 1945 | break; |
015551fc JR |
1946 | case IMM0_8BY4: |
1947 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand); | |
252b5132 | 1948 | break; |
015551fc JR |
1949 | case IMM0_8BY2: |
1950 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand); | |
252b5132 | 1951 | break; |
015551fc JR |
1952 | case IMM0_8: |
1953 | insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand); | |
252b5132 | 1954 | break; |
015551fc JR |
1955 | case IMM1_8BY4: |
1956 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand + 1); | |
252b5132 | 1957 | break; |
015551fc JR |
1958 | case IMM1_8BY2: |
1959 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand + 1); | |
1960 | break; | |
1961 | case IMM1_8: | |
1962 | insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand + 1); | |
252b5132 RH |
1963 | break; |
1964 | case PCRELIMM_8BY4: | |
7679ead9 AO |
1965 | insert (output, BFD_RELOC_SH_PCRELIMM8BY4, |
1966 | operand->type != A_DISP_PC_ABS, operand); | |
252b5132 RH |
1967 | break; |
1968 | case PCRELIMM_8BY2: | |
7679ead9 AO |
1969 | insert (output, BFD_RELOC_SH_PCRELIMM8BY2, |
1970 | operand->type != A_DISP_PC_ABS, operand); | |
015551fc JR |
1971 | break; |
1972 | case REPEAT: | |
1973 | output = insert_loop_bounds (output, operand); | |
1974 | nbuf[index] = opcode->nibbles[3]; | |
1975 | operand += 2; | |
252b5132 RH |
1976 | break; |
1977 | default: | |
1978 | printf (_("failed for %d\n"), i); | |
1979 | } | |
1980 | } | |
1981 | } | |
c4aa876b NC |
1982 | if (!target_big_endian) |
1983 | { | |
1984 | output[1] = (nbuf[0] << 4) | (nbuf[1]); | |
1985 | output[0] = (nbuf[2] << 4) | (nbuf[3]); | |
1986 | } | |
1987 | else | |
1988 | { | |
1989 | output[0] = (nbuf[0] << 4) | (nbuf[1]); | |
1990 | output[1] = (nbuf[2] << 4) | (nbuf[3]); | |
1991 | } | |
0d10e182 | 1992 | return size; |
252b5132 RH |
1993 | } |
1994 | ||
d4845d57 JR |
1995 | /* Find an opcode at the start of *STR_P in the hash table, and set |
1996 | *STR_P to the first character after the last one read. */ | |
252b5132 | 1997 | |
d4845d57 | 1998 | static sh_opcode_info * |
8edc77b9 | 1999 | find_cooked_opcode (char **str_p) |
252b5132 | 2000 | { |
d4845d57 | 2001 | char *str = *str_p; |
252b5132 RH |
2002 | unsigned char *op_start; |
2003 | unsigned char *op_end; | |
252b5132 RH |
2004 | char name[20]; |
2005 | int nlen = 0; | |
c4aa876b | 2006 | |
6b31947e | 2007 | /* Drop leading whitespace. */ |
252b5132 RH |
2008 | while (*str == ' ') |
2009 | str++; | |
2010 | ||
d4845d57 JR |
2011 | /* Find the op code end. |
2012 | The pre-processor will eliminate whitespace in front of | |
2013 | any '@' after the first argument; we may be called from | |
2014 | assemble_ppi, so the opcode might be terminated by an '@'. */ | |
252b5132 RH |
2015 | for (op_start = op_end = (unsigned char *) (str); |
2016 | *op_end | |
2017 | && nlen < 20 | |
d4845d57 | 2018 | && !is_end_of_line[*op_end] && *op_end != ' ' && *op_end != '@'; |
252b5132 RH |
2019 | op_end++) |
2020 | { | |
2021 | unsigned char c = op_start[nlen]; | |
2022 | ||
2023 | /* The machine independent code will convert CMP/EQ into cmp/EQ | |
d4845d57 JR |
2024 | because it thinks the '/' is the end of the symbol. Moreover, |
2025 | all but the first sub-insn is a parallel processing insn won't | |
3882b010 | 2026 | be capitalized. Instead of hacking up the machine independent |
d4845d57 | 2027 | code, we just deal with it here. */ |
3882b010 | 2028 | c = TOLOWER (c); |
252b5132 RH |
2029 | name[nlen] = c; |
2030 | nlen++; | |
2031 | } | |
c4aa876b | 2032 | |
252b5132 | 2033 | name[nlen] = 0; |
d4845d57 | 2034 | *str_p = op_end; |
252b5132 RH |
2035 | |
2036 | if (nlen == 0) | |
6b31947e | 2037 | as_bad (_("can't find opcode ")); |
252b5132 | 2038 | |
d4845d57 JR |
2039 | return (sh_opcode_info *) hash_find (opcode_hash_control, name); |
2040 | } | |
2041 | ||
2042 | /* Assemble a parallel processing insn. */ | |
2043 | #define DDT_BASE 0xf000 /* Base value for double data transfer insns */ | |
6b31947e | 2044 | |
0d10e182 | 2045 | static unsigned int |
8edc77b9 | 2046 | assemble_ppi (char *op_end, sh_opcode_info *opcode) |
d4845d57 JR |
2047 | { |
2048 | int movx = 0; | |
2049 | int movy = 0; | |
2050 | int cond = 0; | |
2051 | int field_b = 0; | |
2052 | char *output; | |
2053 | int move_code; | |
0d10e182 | 2054 | unsigned int size; |
d4845d57 | 2055 | |
d4845d57 JR |
2056 | for (;;) |
2057 | { | |
2058 | sh_operand_info operand[3]; | |
2059 | ||
ac62e7a3 JR |
2060 | /* Some insn ignore one or more register fields, e.g. psts machl,a0. |
2061 | Make sure we encode a defined insn pattern. */ | |
2062 | reg_x = 0; | |
2063 | reg_y = 0; | |
2064 | reg_n = 0; | |
2065 | ||
d4845d57 JR |
2066 | if (opcode->arg[0] != A_END) |
2067 | op_end = get_operands (opcode, op_end, operand); | |
2068 | opcode = get_specific (opcode, operand); | |
2069 | if (opcode == 0) | |
2070 | { | |
6b31947e | 2071 | /* Couldn't find an opcode which matched the operands. */ |
d4845d57 | 2072 | char *where = frag_more (2); |
0d10e182 | 2073 | size = 2; |
d4845d57 JR |
2074 | |
2075 | where[0] = 0x0; | |
2076 | where[1] = 0x0; | |
2077 | as_bad (_("invalid operands for opcode")); | |
0d10e182 | 2078 | return size; |
d4845d57 | 2079 | } |
c4aa876b | 2080 | |
d4845d57 JR |
2081 | if (opcode->nibbles[0] != PPI) |
2082 | as_bad (_("insn can't be combined with parallel processing insn")); | |
2083 | ||
2084 | switch (opcode->nibbles[1]) | |
2085 | { | |
2086 | ||
2087 | case NOPX: | |
2088 | if (movx) | |
2089 | as_bad (_("multiple movx specifications")); | |
2090 | movx = DDT_BASE; | |
2091 | break; | |
2092 | case NOPY: | |
2093 | if (movy) | |
2094 | as_bad (_("multiple movy specifications")); | |
2095 | movy = DDT_BASE; | |
2096 | break; | |
2097 | ||
2098 | case MOVX: | |
2099 | if (movx) | |
2100 | as_bad (_("multiple movx specifications")); | |
2101 | if (reg_n < 4 || reg_n > 5) | |
2102 | as_bad (_("invalid movx address register")); | |
2103 | if (opcode->nibbles[2] & 8) | |
2104 | { | |
2105 | if (reg_m == A_A1_NUM) | |
2106 | movx = 1 << 7; | |
2107 | else if (reg_m != A_A0_NUM) | |
2108 | as_bad (_("invalid movx dsp register")); | |
2109 | } | |
2110 | else | |
2111 | { | |
2112 | if (reg_x > 1) | |
2113 | as_bad (_("invalid movx dsp register")); | |
2114 | movx = reg_x << 7; | |
2115 | } | |
2116 | movx += ((reg_n - 4) << 9) + (opcode->nibbles[2] << 2) + DDT_BASE; | |
2117 | break; | |
2118 | ||
2119 | case MOVY: | |
2120 | if (movy) | |
2121 | as_bad (_("multiple movy specifications")); | |
2122 | if (opcode->nibbles[2] & 8) | |
2123 | { | |
2124 | /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode, | |
2125 | so add 8 more. */ | |
2126 | movy = 8; | |
2127 | if (reg_m == A_A1_NUM) | |
2128 | movy += 1 << 6; | |
2129 | else if (reg_m != A_A0_NUM) | |
2130 | as_bad (_("invalid movy dsp register")); | |
2131 | } | |
2132 | else | |
2133 | { | |
2134 | if (reg_y > 1) | |
2135 | as_bad (_("invalid movy dsp register")); | |
2136 | movy = reg_y << 6; | |
2137 | } | |
2138 | if (reg_n < 6 || reg_n > 7) | |
2139 | as_bad (_("invalid movy address register")); | |
2140 | movy += ((reg_n - 6) << 8) + opcode->nibbles[2] + DDT_BASE; | |
2141 | break; | |
2142 | ||
2143 | case PSH: | |
015551fc | 2144 | if (operand[0].immediate.X_op != O_constant) |
d4845d57 JR |
2145 | as_bad (_("dsp immediate shift value not constant")); |
2146 | field_b = ((opcode->nibbles[2] << 12) | |
015551fc | 2147 | | (operand[0].immediate.X_add_number & 127) << 4 |
d4845d57 JR |
2148 | | reg_n); |
2149 | break; | |
2150 | case PPI3: | |
2151 | if (field_b) | |
2152 | as_bad (_("multiple parallel processing specifications")); | |
2153 | field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8) | |
2154 | + (reg_x << 6) + (reg_y << 4) + reg_n); | |
2155 | break; | |
2156 | case PDC: | |
2157 | if (cond) | |
2158 | as_bad (_("multiple condition specifications")); | |
2159 | cond = opcode->nibbles[2] << 8; | |
2160 | if (*op_end) | |
2161 | goto skip_cond_check; | |
2162 | break; | |
2163 | case PPIC: | |
2164 | if (field_b) | |
2165 | as_bad (_("multiple parallel processing specifications")); | |
2166 | field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8) | |
2167 | + cond + (reg_x << 6) + (reg_y << 4) + reg_n); | |
2168 | cond = 0; | |
2169 | break; | |
2170 | case PMUL: | |
2171 | if (field_b) | |
2172 | { | |
2173 | if ((field_b & 0xef00) != 0xa100) | |
2174 | as_bad (_("insn cannot be combined with pmuls")); | |
2175 | field_b -= 0x8100; | |
2176 | switch (field_b & 0xf) | |
2177 | { | |
2178 | case A_X0_NUM: | |
2179 | field_b += 0 - A_X0_NUM; | |
2180 | break; | |
2181 | case A_Y0_NUM: | |
2182 | field_b += 1 - A_Y0_NUM; | |
2183 | break; | |
2184 | case A_A0_NUM: | |
2185 | field_b += 2 - A_A0_NUM; | |
2186 | break; | |
2187 | case A_A1_NUM: | |
2188 | field_b += 3 - A_A1_NUM; | |
2189 | break; | |
2190 | default: | |
2191 | as_bad (_("bad padd / psub pmuls output operand")); | |
2192 | } | |
7dd04abd JR |
2193 | /* Generate warning if the destination register for padd / psub |
2194 | and pmuls is the same ( only for A0 or A1 ). | |
2195 | If the last nibble is 1010 then A0 is used in both | |
2196 | padd / psub and pmuls. If it is 1111 then A1 is used | |
2197 | as destination register in both padd / psub and pmuls. */ | |
5db33d76 JR |
2198 | |
2199 | if ((((field_b | reg_efg) & 0x000F) == 0x000A) | |
2200 | || (((field_b | reg_efg) & 0x000F) == 0x000F)) | |
2201 | as_warn (_("destination register is same for parallel insns")); | |
d4845d57 JR |
2202 | } |
2203 | field_b += 0x4000 + reg_efg; | |
2204 | break; | |
2205 | default: | |
2206 | abort (); | |
2207 | } | |
2208 | if (cond) | |
2209 | { | |
2210 | as_bad (_("condition not followed by conditionalizable insn")); | |
2211 | cond = 0; | |
2212 | } | |
2213 | if (! *op_end) | |
2214 | break; | |
2215 | skip_cond_check: | |
2216 | opcode = find_cooked_opcode (&op_end); | |
2217 | if (opcode == NULL) | |
2218 | { | |
2219 | (as_bad | |
2220 | (_("unrecognized characters at end of parallel processing insn"))); | |
2221 | break; | |
2222 | } | |
2223 | } | |
2224 | ||
2225 | move_code = movx | movy; | |
2226 | if (field_b) | |
2227 | { | |
2228 | /* Parallel processing insn. */ | |
2229 | unsigned long ppi_code = (movx | movy | 0xf800) << 16 | field_b; | |
2230 | ||
2231 | output = frag_more (4); | |
0d10e182 | 2232 | size = 4; |
d4845d57 JR |
2233 | if (! target_big_endian) |
2234 | { | |
2235 | output[3] = ppi_code >> 8; | |
2236 | output[2] = ppi_code; | |
2237 | } | |
2238 | else | |
2239 | { | |
2240 | output[2] = ppi_code >> 8; | |
2241 | output[3] = ppi_code; | |
2242 | } | |
2243 | move_code |= 0xf800; | |
2244 | } | |
2245 | else | |
0d10e182 JL |
2246 | { |
2247 | /* Just a double data transfer. */ | |
2248 | output = frag_more (2); | |
2249 | size = 2; | |
2250 | } | |
d4845d57 JR |
2251 | if (! target_big_endian) |
2252 | { | |
2253 | output[1] = move_code >> 8; | |
2254 | output[0] = move_code; | |
2255 | } | |
2256 | else | |
2257 | { | |
2258 | output[0] = move_code >> 8; | |
2259 | output[1] = move_code; | |
2260 | } | |
0d10e182 | 2261 | return size; |
d4845d57 JR |
2262 | } |
2263 | ||
2264 | /* This is the guts of the machine-dependent assembler. STR points to a | |
2265 | machine dependent instruction. This function is supposed to emit | |
6b31947e | 2266 | the frags/bytes it assembles to. */ |
d4845d57 JR |
2267 | |
2268 | void | |
8edc77b9 | 2269 | md_assemble (char *str) |
d4845d57 JR |
2270 | { |
2271 | unsigned char *op_end; | |
2272 | sh_operand_info operand[3]; | |
2273 | sh_opcode_info *opcode; | |
dda5ecfc | 2274 | unsigned int size = 0; |
d4845d57 | 2275 | |
324bfcf3 AO |
2276 | #ifdef HAVE_SH64 |
2277 | if (sh64_isa_mode == sh64_isa_shmedia) | |
2278 | { | |
2279 | shmedia_md_assemble (str); | |
2280 | return; | |
2281 | } | |
2282 | else | |
2283 | { | |
2284 | /* If we've seen pseudo-directives, make sure any emitted data or | |
2285 | frags are marked as data. */ | |
b34976b6 | 2286 | if (!seen_insn) |
324bfcf3 | 2287 | { |
b34976b6 | 2288 | sh64_update_contents_mark (TRUE); |
324bfcf3 AO |
2289 | sh64_set_contents_type (CRT_SH5_ISA16); |
2290 | } | |
2291 | ||
b34976b6 | 2292 | seen_insn = TRUE; |
324bfcf3 AO |
2293 | } |
2294 | #endif /* HAVE_SH64 */ | |
2295 | ||
d4845d57 JR |
2296 | opcode = find_cooked_opcode (&str); |
2297 | op_end = str; | |
252b5132 RH |
2298 | |
2299 | if (opcode == NULL) | |
2300 | { | |
2301 | as_bad (_("unknown opcode")); | |
2302 | return; | |
2303 | } | |
2304 | ||
2305 | if (sh_relax | |
2306 | && ! seg_info (now_seg)->tc_segment_info_data.in_code) | |
2307 | { | |
2308 | /* Output a CODE reloc to tell the linker that the following | |
2309 | bytes are instructions, not data. */ | |
2310 | fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, | |
2311 | BFD_RELOC_SH_CODE); | |
2312 | seg_info (now_seg)->tc_segment_info_data.in_code = 1; | |
2313 | } | |
2314 | ||
d4845d57 JR |
2315 | if (opcode->nibbles[0] == PPI) |
2316 | { | |
0d10e182 | 2317 | size = assemble_ppi (op_end, opcode); |
252b5132 RH |
2318 | } |
2319 | else | |
2320 | { | |
0d10e182 JL |
2321 | if (opcode->arg[0] == A_BDISP12 |
2322 | || opcode->arg[0] == A_BDISP8) | |
252b5132 | 2323 | { |
26c9b704 JR |
2324 | /* Since we skip get_specific here, we have to check & update |
2325 | valid_arch now. */ | |
2326 | if (valid_arch & opcode->arch) | |
2327 | valid_arch &= opcode->arch; | |
2328 | else | |
2329 | as_bad (_("Delayed branches not available on SH1")); | |
0d10e182 JL |
2330 | parse_exp (op_end + 1, &operand[0]); |
2331 | build_relax (opcode, &operand[0]); | |
5fc44b2d JR |
2332 | } |
2333 | else | |
2334 | { | |
0d10e182 JL |
2335 | if (opcode->arg[0] == A_END) |
2336 | { | |
2337 | /* Ignore trailing whitespace. If there is any, it has already | |
2338 | been compressed to a single space. */ | |
2339 | if (*op_end == ' ') | |
2340 | op_end++; | |
2341 | } | |
2342 | else | |
2343 | { | |
2344 | op_end = get_operands (opcode, op_end, operand); | |
2345 | } | |
2346 | opcode = get_specific (opcode, operand); | |
252b5132 | 2347 | |
0d10e182 JL |
2348 | if (opcode == 0) |
2349 | { | |
2350 | /* Couldn't find an opcode which matched the operands. */ | |
2351 | char *where = frag_more (2); | |
2352 | size = 2; | |
252b5132 | 2353 | |
0d10e182 JL |
2354 | where[0] = 0x0; |
2355 | where[1] = 0x0; | |
2356 | as_bad (_("invalid operands for opcode")); | |
2357 | } | |
2358 | else | |
2359 | { | |
2360 | if (*op_end) | |
2361 | as_bad (_("excess operands: '%s'"), op_end); | |
2362 | ||
2363 | size = build_Mytes (opcode, operand); | |
2364 | } | |
252b5132 | 2365 | } |
0d10e182 | 2366 | } |
252b5132 | 2367 | |
2bc0a128 | 2368 | #ifdef BFD_ASSEMBLER |
4dc7ead9 | 2369 | dwarf2_emit_insn (size); |
2bc0a128 | 2370 | #endif |
252b5132 RH |
2371 | } |
2372 | ||
2373 | /* This routine is called each time a label definition is seen. It | |
2374 | emits a BFD_RELOC_SH_LABEL reloc if necessary. */ | |
2375 | ||
2376 | void | |
8edc77b9 | 2377 | sh_frob_label (void) |
252b5132 RH |
2378 | { |
2379 | static fragS *last_label_frag; | |
2380 | static int last_label_offset; | |
2381 | ||
2382 | if (sh_relax | |
2383 | && seg_info (now_seg)->tc_segment_info_data.in_code) | |
2384 | { | |
2385 | int offset; | |
2386 | ||
2387 | offset = frag_now_fix (); | |
2388 | if (frag_now != last_label_frag | |
2389 | || offset != last_label_offset) | |
c4aa876b | 2390 | { |
252b5132 RH |
2391 | fix_new (frag_now, offset, 2, &abs_symbol, 0, 0, BFD_RELOC_SH_LABEL); |
2392 | last_label_frag = frag_now; | |
2393 | last_label_offset = offset; | |
2394 | } | |
2395 | } | |
2396 | } | |
2397 | ||
2398 | /* This routine is called when the assembler is about to output some | |
2399 | data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */ | |
2400 | ||
2401 | void | |
8edc77b9 | 2402 | sh_flush_pending_output (void) |
252b5132 RH |
2403 | { |
2404 | if (sh_relax | |
2405 | && seg_info (now_seg)->tc_segment_info_data.in_code) | |
2406 | { | |
2407 | fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, | |
2408 | BFD_RELOC_SH_DATA); | |
2409 | seg_info (now_seg)->tc_segment_info_data.in_code = 0; | |
2410 | } | |
2411 | } | |
2412 | ||
2413 | symbolS * | |
8edc77b9 | 2414 | md_undefined_symbol (char *name ATTRIBUTE_UNUSED) |
252b5132 RH |
2415 | { |
2416 | return 0; | |
2417 | } | |
2418 | ||
2419 | #ifdef OBJ_COFF | |
056350c6 | 2420 | #ifndef BFD_ASSEMBLER |
252b5132 RH |
2421 | |
2422 | void | |
8edc77b9 | 2423 | tc_crawl_symbol_chain (object_headers *headers ATTRIBUTE_UNUSED) |
252b5132 RH |
2424 | { |
2425 | printf (_("call to tc_crawl_symbol_chain \n")); | |
2426 | } | |
2427 | ||
2428 | void | |
8edc77b9 | 2429 | tc_headers_hook (object_headers *headers ATTRIBUTE_UNUSED) |
252b5132 RH |
2430 | { |
2431 | printf (_("call to tc_headers_hook \n")); | |
2432 | } | |
2433 | ||
056350c6 | 2434 | #endif |
252b5132 RH |
2435 | #endif |
2436 | ||
6b31947e NC |
2437 | /* Various routines to kill one day. */ |
2438 | /* Equal to MAX_PRECISION in atof-ieee.c. */ | |
252b5132 RH |
2439 | #define MAX_LITTLENUMS 6 |
2440 | ||
6b31947e NC |
2441 | /* Turn a string in input_line_pointer into a floating point constant |
2442 | of type TYPE, and store the appropriate bytes in *LITP. The number | |
2443 | of LITTLENUMS emitted is stored in *SIZEP . An error message is | |
2444 | returned, or NULL on OK. */ | |
2445 | ||
252b5132 | 2446 | char * |
8edc77b9 | 2447 | md_atof (int type, char *litP, int *sizeP) |
252b5132 RH |
2448 | { |
2449 | int prec; | |
2450 | LITTLENUM_TYPE words[4]; | |
2451 | char *t; | |
2452 | int i; | |
2453 | ||
2454 | switch (type) | |
2455 | { | |
2456 | case 'f': | |
2457 | prec = 2; | |
2458 | break; | |
2459 | ||
2460 | case 'd': | |
2461 | prec = 4; | |
2462 | break; | |
2463 | ||
2464 | default: | |
2465 | *sizeP = 0; | |
2466 | return _("bad call to md_atof"); | |
2467 | } | |
2468 | ||
2469 | t = atof_ieee (input_line_pointer, type, words); | |
2470 | if (t) | |
2471 | input_line_pointer = t; | |
2472 | ||
2473 | *sizeP = prec * 2; | |
2474 | ||
2475 | if (! target_big_endian) | |
2476 | { | |
2477 | for (i = prec - 1; i >= 0; i--) | |
2478 | { | |
2479 | md_number_to_chars (litP, (valueT) words[i], 2); | |
2480 | litP += 2; | |
2481 | } | |
2482 | } | |
2483 | else | |
2484 | { | |
2485 | for (i = 0; i < prec; i++) | |
2486 | { | |
2487 | md_number_to_chars (litP, (valueT) words[i], 2); | |
2488 | litP += 2; | |
2489 | } | |
2490 | } | |
c4aa876b | 2491 | |
252b5132 RH |
2492 | return NULL; |
2493 | } | |
2494 | ||
2495 | /* Handle the .uses pseudo-op. This pseudo-op is used just before a | |
2496 | call instruction. It refers to a label of the instruction which | |
2497 | loads the register which the call uses. We use it to generate a | |
2498 | special reloc for the linker. */ | |
2499 | ||
2500 | static void | |
8edc77b9 | 2501 | s_uses (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
2502 | { |
2503 | expressionS ex; | |
2504 | ||
2505 | if (! sh_relax) | |
2506 | as_warn (_(".uses pseudo-op seen when not relaxing")); | |
2507 | ||
2508 | expression (&ex); | |
2509 | ||
2510 | if (ex.X_op != O_symbol || ex.X_add_number != 0) | |
2511 | { | |
2512 | as_bad (_("bad .uses format")); | |
2513 | ignore_rest_of_line (); | |
2514 | return; | |
2515 | } | |
2516 | ||
2517 | fix_new_exp (frag_now, frag_now_fix (), 2, &ex, 1, BFD_RELOC_SH_USES); | |
2518 | ||
2519 | demand_empty_rest_of_line (); | |
2520 | } | |
2521 | \f | |
5a38dc70 | 2522 | const char *md_shortopts = ""; |
6b31947e NC |
2523 | struct option md_longopts[] = |
2524 | { | |
252b5132 | 2525 | #define OPTION_RELAX (OPTION_MD_BASE) |
05982cac HPN |
2526 | #define OPTION_BIG (OPTION_MD_BASE + 1) |
2527 | #define OPTION_LITTLE (OPTION_BIG + 1) | |
252b5132 | 2528 | #define OPTION_SMALL (OPTION_LITTLE + 1) |
d4845d57 | 2529 | #define OPTION_DSP (OPTION_SMALL + 1) |
bdfaef52 | 2530 | #define OPTION_ISA (OPTION_DSP + 1) |
252b5132 RH |
2531 | |
2532 | {"relax", no_argument, NULL, OPTION_RELAX}, | |
05982cac | 2533 | {"big", no_argument, NULL, OPTION_BIG}, |
252b5132 RH |
2534 | {"little", no_argument, NULL, OPTION_LITTLE}, |
2535 | {"small", no_argument, NULL, OPTION_SMALL}, | |
d4845d57 | 2536 | {"dsp", no_argument, NULL, OPTION_DSP}, |
bdfaef52 | 2537 | {"isa", required_argument, NULL, OPTION_ISA}, |
324bfcf3 | 2538 | #ifdef HAVE_SH64 |
324bfcf3 AO |
2539 | #define OPTION_ABI (OPTION_ISA + 1) |
2540 | #define OPTION_NO_MIX (OPTION_ABI + 1) | |
2541 | #define OPTION_SHCOMPACT_CONST_CRANGE (OPTION_NO_MIX + 1) | |
2542 | #define OPTION_NO_EXPAND (OPTION_SHCOMPACT_CONST_CRANGE + 1) | |
2543 | #define OPTION_PT32 (OPTION_NO_EXPAND + 1) | |
324bfcf3 AO |
2544 | {"abi", required_argument, NULL, OPTION_ABI}, |
2545 | {"no-mix", no_argument, NULL, OPTION_NO_MIX}, | |
2546 | {"shcompact-const-crange", no_argument, NULL, OPTION_SHCOMPACT_CONST_CRANGE}, | |
2547 | {"no-expand", no_argument, NULL, OPTION_NO_EXPAND}, | |
2548 | {"expand-pt32", no_argument, NULL, OPTION_PT32}, | |
2549 | #endif /* HAVE_SH64 */ | |
2550 | ||
252b5132 RH |
2551 | {NULL, no_argument, NULL, 0} |
2552 | }; | |
c4aa876b | 2553 | size_t md_longopts_size = sizeof (md_longopts); |
252b5132 RH |
2554 | |
2555 | int | |
8edc77b9 | 2556 | md_parse_option (int c, char *arg ATTRIBUTE_UNUSED) |
252b5132 RH |
2557 | { |
2558 | switch (c) | |
2559 | { | |
2560 | case OPTION_RELAX: | |
2561 | sh_relax = 1; | |
2562 | break; | |
2563 | ||
05982cac HPN |
2564 | case OPTION_BIG: |
2565 | target_big_endian = 1; | |
2566 | break; | |
2567 | ||
252b5132 | 2568 | case OPTION_LITTLE: |
252b5132 RH |
2569 | target_big_endian = 0; |
2570 | break; | |
2571 | ||
2572 | case OPTION_SMALL: | |
2573 | sh_small = 1; | |
2574 | break; | |
2575 | ||
d4845d57 | 2576 | case OPTION_DSP: |
bdfaef52 | 2577 | preset_target_arch = arch_sh1_up & ~arch_sh3e_up; |
d4845d57 JR |
2578 | break; |
2579 | ||
324bfcf3 | 2580 | case OPTION_ISA: |
bdfaef52 JR |
2581 | if (strcasecmp (arg, "sh4") == 0) |
2582 | preset_target_arch = arch_sh4; | |
2583 | else if (strcasecmp (arg, "any") == 0) | |
2584 | preset_target_arch = arch_sh1_up; | |
2585 | #ifdef HAVE_SH64 | |
2586 | else if (strcasecmp (arg, "shmedia") == 0) | |
324bfcf3 AO |
2587 | { |
2588 | if (sh64_isa_mode == sh64_isa_shcompact) | |
2589 | as_bad (_("Invalid combination: --isa=SHcompact with --isa=SHmedia")); | |
2590 | sh64_isa_mode = sh64_isa_shmedia; | |
2591 | } | |
2592 | else if (strcasecmp (arg, "shcompact") == 0) | |
2593 | { | |
2594 | if (sh64_isa_mode == sh64_isa_shmedia) | |
2595 | as_bad (_("Invalid combination: --isa=SHmedia with --isa=SHcompact")); | |
2596 | if (sh64_abi == sh64_abi_64) | |
2597 | as_bad (_("Invalid combination: --abi=64 with --isa=SHcompact")); | |
2598 | sh64_isa_mode = sh64_isa_shcompact; | |
2599 | } | |
bdfaef52 | 2600 | #endif /* HAVE_SH64 */ |
324bfcf3 AO |
2601 | else |
2602 | as_bad ("Invalid argument to --isa option: %s", arg); | |
2603 | break; | |
2604 | ||
bdfaef52 | 2605 | #ifdef HAVE_SH64 |
324bfcf3 AO |
2606 | case OPTION_ABI: |
2607 | if (strcmp (arg, "32") == 0) | |
2608 | { | |
2609 | if (sh64_abi == sh64_abi_64) | |
2610 | as_bad (_("Invalid combination: --abi=32 with --abi=64")); | |
2611 | sh64_abi = sh64_abi_32; | |
2612 | } | |
2613 | else if (strcmp (arg, "64") == 0) | |
2614 | { | |
2615 | if (sh64_abi == sh64_abi_32) | |
2616 | as_bad (_("Invalid combination: --abi=64 with --abi=32")); | |
2617 | if (sh64_isa_mode == sh64_isa_shcompact) | |
2618 | as_bad (_("Invalid combination: --isa=SHcompact with --abi=64")); | |
2619 | sh64_abi = sh64_abi_64; | |
2620 | } | |
2621 | else | |
2622 | as_bad ("Invalid argument to --abi option: %s", arg); | |
2623 | break; | |
2624 | ||
2625 | case OPTION_NO_MIX: | |
b34976b6 | 2626 | sh64_mix = FALSE; |
324bfcf3 AO |
2627 | break; |
2628 | ||
2629 | case OPTION_SHCOMPACT_CONST_CRANGE: | |
b34976b6 | 2630 | sh64_shcompact_const_crange = TRUE; |
324bfcf3 AO |
2631 | break; |
2632 | ||
2633 | case OPTION_NO_EXPAND: | |
b34976b6 | 2634 | sh64_expand = FALSE; |
324bfcf3 AO |
2635 | break; |
2636 | ||
2637 | case OPTION_PT32: | |
b34976b6 | 2638 | sh64_pt32 = TRUE; |
324bfcf3 AO |
2639 | break; |
2640 | #endif /* HAVE_SH64 */ | |
2641 | ||
252b5132 RH |
2642 | default: |
2643 | return 0; | |
2644 | } | |
2645 | ||
2646 | return 1; | |
2647 | } | |
2648 | ||
2649 | void | |
8edc77b9 | 2650 | md_show_usage (FILE *stream) |
252b5132 | 2651 | { |
c4aa876b | 2652 | fprintf (stream, _("\ |
252b5132 RH |
2653 | SH options:\n\ |
2654 | -little generate little endian code\n\ | |
05982cac | 2655 | -big generate big endian code\n\ |
252b5132 | 2656 | -relax alter jump instructions for long displacements\n\ |
5b8274e3 | 2657 | -small align sections to 4 byte boundaries, not 16\n\ |
5177500f | 2658 | -dsp enable sh-dsp insns, and disable sh2e/sh3e/sh4 insns.\n")); |
324bfcf3 AO |
2659 | #ifdef HAVE_SH64 |
2660 | fprintf (stream, _("\ | |
2661 | -isa=[shmedia set default instruction set for SH64\n\ | |
2662 | | SHmedia\n\ | |
2663 | | shcompact\n\ | |
2664 | | SHcompact]\n\ | |
2665 | -abi=[32|64] set size of expanded SHmedia operands and object\n\ | |
2666 | file type\n\ | |
2667 | -shcompact-const-crange emit code-range descriptors for constants in\n\ | |
2668 | SHcompact code sections\n\ | |
2669 | -no-mix disallow SHmedia code in the same section as\n\ | |
2670 | constants and SHcompact code\n\ | |
2671 | -no-expand do not expand MOVI, PT, PTA or PTB instructions\n\ | |
2672 | -expand-pt32 with -abi=64, expand PT, PTA and PTB instructions\n\ | |
2673 | to 32 bits only")); | |
2674 | #endif /* HAVE_SH64 */ | |
252b5132 RH |
2675 | } |
2676 | \f | |
252b5132 RH |
2677 | /* This struct is used to pass arguments to sh_count_relocs through |
2678 | bfd_map_over_sections. */ | |
2679 | ||
2680 | struct sh_count_relocs | |
2681 | { | |
2682 | /* Symbol we are looking for. */ | |
2683 | symbolS *sym; | |
2684 | /* Count of relocs found. */ | |
2685 | int count; | |
2686 | }; | |
2687 | ||
2688 | /* Count the number of fixups in a section which refer to a particular | |
2689 | symbol. When using BFD_ASSEMBLER, this is called via | |
2690 | bfd_map_over_sections. */ | |
2691 | ||
252b5132 | 2692 | static void |
8edc77b9 | 2693 | sh_count_relocs (bfd *abfd ATTRIBUTE_UNUSED, segT sec, void *data) |
252b5132 RH |
2694 | { |
2695 | struct sh_count_relocs *info = (struct sh_count_relocs *) data; | |
2696 | segment_info_type *seginfo; | |
2697 | symbolS *sym; | |
2698 | fixS *fix; | |
2699 | ||
2700 | seginfo = seg_info (sec); | |
2701 | if (seginfo == NULL) | |
2702 | return; | |
2703 | ||
2704 | sym = info->sym; | |
2705 | for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) | |
2706 | { | |
2707 | if (fix->fx_addsy == sym) | |
2708 | { | |
2709 | ++info->count; | |
2710 | fix->fx_tcbit = 1; | |
2711 | } | |
2712 | } | |
2713 | } | |
2714 | ||
2715 | /* Handle the count relocs for a particular section. When using | |
2716 | BFD_ASSEMBLER, this is called via bfd_map_over_sections. */ | |
2717 | ||
252b5132 | 2718 | static void |
8edc77b9 KK |
2719 | sh_frob_section (bfd *abfd ATTRIBUTE_UNUSED, segT sec, |
2720 | void *ignore ATTRIBUTE_UNUSED) | |
252b5132 RH |
2721 | { |
2722 | segment_info_type *seginfo; | |
2723 | fixS *fix; | |
2724 | ||
2725 | seginfo = seg_info (sec); | |
2726 | if (seginfo == NULL) | |
2727 | return; | |
2728 | ||
2729 | for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) | |
2730 | { | |
2731 | symbolS *sym; | |
2732 | bfd_vma val; | |
2733 | fixS *fscan; | |
2734 | struct sh_count_relocs info; | |
2735 | ||
2736 | if (fix->fx_r_type != BFD_RELOC_SH_USES) | |
2737 | continue; | |
2738 | ||
2739 | /* The BFD_RELOC_SH_USES reloc should refer to a defined local | |
2740 | symbol in the same section. */ | |
2741 | sym = fix->fx_addsy; | |
2742 | if (sym == NULL | |
2743 | || fix->fx_subsy != NULL | |
2744 | || fix->fx_addnumber != 0 | |
2745 | || S_GET_SEGMENT (sym) != sec | |
2746 | #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF) | |
2747 | || S_GET_STORAGE_CLASS (sym) == C_EXT | |
2748 | #endif | |
2749 | || S_IS_EXTERNAL (sym)) | |
2750 | { | |
2751 | as_warn_where (fix->fx_file, fix->fx_line, | |
2752 | _(".uses does not refer to a local symbol in the same section")); | |
2753 | continue; | |
2754 | } | |
2755 | ||
2756 | /* Look through the fixups again, this time looking for one | |
2757 | at the same location as sym. */ | |
2758 | val = S_GET_VALUE (sym); | |
2759 | for (fscan = seginfo->fix_root; | |
2760 | fscan != NULL; | |
2761 | fscan = fscan->fx_next) | |
2762 | if (val == fscan->fx_frag->fr_address + fscan->fx_where | |
2763 | && fscan->fx_r_type != BFD_RELOC_SH_ALIGN | |
2764 | && fscan->fx_r_type != BFD_RELOC_SH_CODE | |
2765 | && fscan->fx_r_type != BFD_RELOC_SH_DATA | |
2766 | && fscan->fx_r_type != BFD_RELOC_SH_LABEL) | |
2767 | break; | |
2768 | if (fscan == NULL) | |
2769 | { | |
2770 | as_warn_where (fix->fx_file, fix->fx_line, | |
2771 | _("can't find fixup pointed to by .uses")); | |
2772 | continue; | |
2773 | } | |
2774 | ||
2775 | if (fscan->fx_tcbit) | |
2776 | { | |
2777 | /* We've already done this one. */ | |
2778 | continue; | |
2779 | } | |
2780 | ||
6b31947e NC |
2781 | /* The variable fscan should also be a fixup to a local symbol |
2782 | in the same section. */ | |
252b5132 RH |
2783 | sym = fscan->fx_addsy; |
2784 | if (sym == NULL | |
2785 | || fscan->fx_subsy != NULL | |
2786 | || fscan->fx_addnumber != 0 | |
2787 | || S_GET_SEGMENT (sym) != sec | |
2788 | #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF) | |
2789 | || S_GET_STORAGE_CLASS (sym) == C_EXT | |
2790 | #endif | |
2791 | || S_IS_EXTERNAL (sym)) | |
2792 | { | |
2793 | as_warn_where (fix->fx_file, fix->fx_line, | |
2794 | _(".uses target does not refer to a local symbol in the same section")); | |
2795 | continue; | |
2796 | } | |
2797 | ||
2798 | /* Now we look through all the fixups of all the sections, | |
2799 | counting the number of times we find a reference to sym. */ | |
2800 | info.sym = sym; | |
2801 | info.count = 0; | |
2802 | #ifdef BFD_ASSEMBLER | |
8edc77b9 | 2803 | bfd_map_over_sections (stdoutput, sh_count_relocs, &info); |
252b5132 RH |
2804 | #else |
2805 | { | |
2806 | int iscan; | |
2807 | ||
2808 | for (iscan = SEG_E0; iscan < SEG_UNKNOWN; iscan++) | |
8edc77b9 | 2809 | sh_count_relocs ((bfd *) NULL, iscan, &info); |
252b5132 RH |
2810 | } |
2811 | #endif | |
2812 | ||
2813 | if (info.count < 1) | |
2814 | abort (); | |
2815 | ||
2816 | /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym. | |
2817 | We have already adjusted the value of sym to include the | |
2818 | fragment address, so we undo that adjustment here. */ | |
2819 | subseg_change (sec, 0); | |
7bcad3e5 NC |
2820 | fix_new (fscan->fx_frag, |
2821 | S_GET_VALUE (sym) - fscan->fx_frag->fr_address, | |
252b5132 RH |
2822 | 4, &abs_symbol, info.count, 0, BFD_RELOC_SH_COUNT); |
2823 | } | |
2824 | } | |
2825 | ||
2826 | /* This function is called after the symbol table has been completed, | |
2827 | but before the relocs or section contents have been written out. | |
2828 | If we have seen any .uses pseudo-ops, they point to an instruction | |
2829 | which loads a register with the address of a function. We look | |
2830 | through the fixups to find where the function address is being | |
2831 | loaded from. We then generate a COUNT reloc giving the number of | |
2832 | times that function address is referred to. The linker uses this | |
2833 | information when doing relaxing, to decide when it can eliminate | |
2834 | the stored function address entirely. */ | |
2835 | ||
2836 | void | |
8edc77b9 | 2837 | sh_frob_file (void) |
252b5132 | 2838 | { |
324bfcf3 AO |
2839 | #ifdef HAVE_SH64 |
2840 | shmedia_frob_file_before_adjust (); | |
2841 | #endif | |
2842 | ||
252b5132 RH |
2843 | if (! sh_relax) |
2844 | return; | |
2845 | ||
2846 | #ifdef BFD_ASSEMBLER | |
8edc77b9 | 2847 | bfd_map_over_sections (stdoutput, sh_frob_section, NULL); |
252b5132 RH |
2848 | #else |
2849 | { | |
2850 | int iseg; | |
2851 | ||
2852 | for (iseg = SEG_E0; iseg < SEG_UNKNOWN; iseg++) | |
8edc77b9 | 2853 | sh_frob_section ((bfd *) NULL, iseg, NULL); |
252b5132 RH |
2854 | } |
2855 | #endif | |
2856 | } | |
2857 | ||
2858 | /* Called after relaxing. Set the correct sizes of the fragments, and | |
94f592af | 2859 | create relocs so that md_apply_fix3 will fill in the correct values. */ |
252b5132 RH |
2860 | |
2861 | void | |
252b5132 | 2862 | #ifdef BFD_ASSEMBLER |
8edc77b9 | 2863 | md_convert_frag (bfd *headers ATTRIBUTE_UNUSED, segT seg, fragS *fragP) |
252b5132 | 2864 | #else |
8edc77b9 KK |
2865 | md_convert_frag (object_headers *headers ATTRIBUTE_UNUSED, segT seg, |
2866 | fragS *fragP) | |
252b5132 | 2867 | #endif |
252b5132 RH |
2868 | { |
2869 | int donerelax = 0; | |
2870 | ||
2871 | switch (fragP->fr_subtype) | |
2872 | { | |
2873 | case C (COND_JUMP, COND8): | |
2874 | case C (COND_JUMP_DELAY, COND8): | |
2875 | subseg_change (seg, 0); | |
2876 | fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset, | |
2877 | 1, BFD_RELOC_SH_PCDISP8BY2); | |
2878 | fragP->fr_fix += 2; | |
2879 | fragP->fr_var = 0; | |
2880 | break; | |
2881 | ||
2882 | case C (UNCOND_JUMP, UNCOND12): | |
2883 | subseg_change (seg, 0); | |
2884 | fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset, | |
2885 | 1, BFD_RELOC_SH_PCDISP12BY2); | |
2886 | fragP->fr_fix += 2; | |
2887 | fragP->fr_var = 0; | |
2888 | break; | |
2889 | ||
2890 | case C (UNCOND_JUMP, UNCOND32): | |
2891 | case C (UNCOND_JUMP, UNDEF_WORD_DISP): | |
2892 | if (fragP->fr_symbol == NULL) | |
99b222b4 HPN |
2893 | as_bad_where (fragP->fr_file, fragP->fr_line, |
2894 | _("displacement overflows 12-bit field")); | |
252b5132 | 2895 | else if (S_IS_DEFINED (fragP->fr_symbol)) |
99b222b4 HPN |
2896 | as_bad_where (fragP->fr_file, fragP->fr_line, |
2897 | _("displacement to defined symbol %s overflows 12-bit field"), | |
2898 | S_GET_NAME (fragP->fr_symbol)); | |
252b5132 | 2899 | else |
99b222b4 HPN |
2900 | as_bad_where (fragP->fr_file, fragP->fr_line, |
2901 | _("displacement to undefined symbol %s overflows 12-bit field"), | |
2902 | S_GET_NAME (fragP->fr_symbol)); | |
2903 | /* Stabilize this frag, so we don't trip an assert. */ | |
2904 | fragP->fr_fix += fragP->fr_var; | |
2905 | fragP->fr_var = 0; | |
252b5132 RH |
2906 | break; |
2907 | ||
2908 | case C (COND_JUMP, COND12): | |
2909 | case C (COND_JUMP_DELAY, COND12): | |
6b31947e | 2910 | /* A bcond won't fit, so turn it into a b!cond; bra disp; nop. */ |
252b5132 RH |
2911 | /* I found that a relax failure for gcc.c-torture/execute/930628-1.c |
2912 | was due to gas incorrectly relaxing an out-of-range conditional | |
2913 | branch with delay slot. It turned: | |
2914 | bf.s L6 (slot mov.l r12,@(44,r0)) | |
2915 | into: | |
c4aa876b | 2916 | |
252b5132 RH |
2917 | 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6) |
2918 | 30: 00 09 nop | |
2919 | 32: 10 cb mov.l r12,@(44,r0) | |
2920 | Therefore, branches with delay slots have to be handled | |
2921 | differently from ones without delay slots. */ | |
2922 | { | |
2923 | unsigned char *buffer = | |
2924 | (unsigned char *) (fragP->fr_fix + fragP->fr_literal); | |
2925 | int highbyte = target_big_endian ? 0 : 1; | |
2926 | int lowbyte = target_big_endian ? 1 : 0; | |
2927 | int delay = fragP->fr_subtype == C (COND_JUMP_DELAY, COND12); | |
2928 | ||
2929 | /* Toggle the true/false bit of the bcond. */ | |
2930 | buffer[highbyte] ^= 0x2; | |
2931 | ||
d3ecfc59 | 2932 | /* If this is a delayed branch, we may not put the bra in the |
252b5132 RH |
2933 | slot. So we change it to a non-delayed branch, like that: |
2934 | b! cond slot_label; bra disp; slot_label: slot_insn | |
2935 | ??? We should try if swapping the conditional branch and | |
2936 | its delay-slot insn already makes the branch reach. */ | |
2937 | ||
2938 | /* Build a relocation to six / four bytes farther on. */ | |
2939 | subseg_change (seg, 0); | |
2940 | fix_new (fragP, fragP->fr_fix, 2, | |
2941 | #ifdef BFD_ASSEMBLER | |
2942 | section_symbol (seg), | |
2943 | #else | |
2944 | seg_info (seg)->dot, | |
2945 | #endif | |
2946 | fragP->fr_address + fragP->fr_fix + (delay ? 4 : 6), | |
2947 | 1, BFD_RELOC_SH_PCDISP8BY2); | |
2948 | ||
2949 | /* Set up a jump instruction. */ | |
2950 | buffer[highbyte + 2] = 0xa0; | |
2951 | buffer[lowbyte + 2] = 0; | |
2952 | fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol, | |
2953 | fragP->fr_offset, 1, BFD_RELOC_SH_PCDISP12BY2); | |
2954 | ||
2955 | if (delay) | |
2956 | { | |
2957 | buffer[highbyte] &= ~0x4; /* Removes delay slot from branch. */ | |
2958 | fragP->fr_fix += 4; | |
2959 | } | |
2960 | else | |
2961 | { | |
2962 | /* Fill in a NOP instruction. */ | |
2963 | buffer[highbyte + 4] = 0x0; | |
2964 | buffer[lowbyte + 4] = 0x9; | |
2965 | ||
2966 | fragP->fr_fix += 6; | |
2967 | } | |
2968 | fragP->fr_var = 0; | |
2969 | donerelax = 1; | |
2970 | } | |
2971 | break; | |
2972 | ||
2973 | case C (COND_JUMP, COND32): | |
2974 | case C (COND_JUMP_DELAY, COND32): | |
2975 | case C (COND_JUMP, UNDEF_WORD_DISP): | |
2976 | case C (COND_JUMP_DELAY, UNDEF_WORD_DISP): | |
2977 | if (fragP->fr_symbol == NULL) | |
99b222b4 HPN |
2978 | as_bad_where (fragP->fr_file, fragP->fr_line, |
2979 | _("displacement overflows 8-bit field")); | |
252b5132 | 2980 | else if (S_IS_DEFINED (fragP->fr_symbol)) |
99b222b4 HPN |
2981 | as_bad_where (fragP->fr_file, fragP->fr_line, |
2982 | _("displacement to defined symbol %s overflows 8-bit field"), | |
2983 | S_GET_NAME (fragP->fr_symbol)); | |
252b5132 | 2984 | else |
99b222b4 HPN |
2985 | as_bad_where (fragP->fr_file, fragP->fr_line, |
2986 | _("displacement to undefined symbol %s overflows 8-bit field "), | |
2987 | S_GET_NAME (fragP->fr_symbol)); | |
2988 | /* Stabilize this frag, so we don't trip an assert. */ | |
2989 | fragP->fr_fix += fragP->fr_var; | |
2990 | fragP->fr_var = 0; | |
252b5132 RH |
2991 | break; |
2992 | ||
2993 | default: | |
324bfcf3 | 2994 | #ifdef HAVE_SH64 |
b34976b6 | 2995 | shmedia_md_convert_frag (headers, seg, fragP, TRUE); |
324bfcf3 | 2996 | #else |
252b5132 | 2997 | abort (); |
324bfcf3 | 2998 | #endif |
252b5132 RH |
2999 | } |
3000 | ||
3001 | if (donerelax && !sh_relax) | |
3002 | as_warn_where (fragP->fr_file, fragP->fr_line, | |
3003 | _("overflow in branch to %s; converted into longer instruction sequence"), | |
3004 | (fragP->fr_symbol != NULL | |
3005 | ? S_GET_NAME (fragP->fr_symbol) | |
3006 | : "")); | |
3007 | } | |
3008 | ||
3009 | valueT | |
8edc77b9 | 3010 | md_section_align (segT seg ATTRIBUTE_UNUSED, valueT size) |
252b5132 RH |
3011 | { |
3012 | #ifdef BFD_ASSEMBLER | |
3013 | #ifdef OBJ_ELF | |
3014 | return size; | |
3015 | #else /* ! OBJ_ELF */ | |
3016 | return ((size + (1 << bfd_get_section_alignment (stdoutput, seg)) - 1) | |
3017 | & (-1 << bfd_get_section_alignment (stdoutput, seg))); | |
3018 | #endif /* ! OBJ_ELF */ | |
3019 | #else /* ! BFD_ASSEMBLER */ | |
3020 | return ((size + (1 << section_alignment[(int) seg]) - 1) | |
3021 | & (-1 << section_alignment[(int) seg])); | |
3022 | #endif /* ! BFD_ASSEMBLER */ | |
3023 | } | |
3024 | ||
3025 | /* This static variable is set by s_uacons to tell sh_cons_align that | |
3026 | the expession does not need to be aligned. */ | |
3027 | ||
3028 | static int sh_no_align_cons = 0; | |
3029 | ||
3030 | /* This handles the unaligned space allocation pseudo-ops, such as | |
3031 | .uaword. .uaword is just like .word, but the value does not need | |
3032 | to be aligned. */ | |
3033 | ||
3034 | static void | |
8edc77b9 | 3035 | s_uacons (int bytes) |
252b5132 RH |
3036 | { |
3037 | /* Tell sh_cons_align not to align this value. */ | |
3038 | sh_no_align_cons = 1; | |
3039 | cons (bytes); | |
3040 | } | |
3041 | ||
3042 | /* If a .word, et. al., pseud-op is seen, warn if the value is not | |
3043 | aligned correctly. Note that this can cause warnings to be issued | |
3044 | when assembling initialized structured which were declared with the | |
3045 | packed attribute. FIXME: Perhaps we should require an option to | |
3046 | enable this warning? */ | |
3047 | ||
3048 | void | |
8edc77b9 | 3049 | sh_cons_align (int nbytes) |
252b5132 RH |
3050 | { |
3051 | int nalign; | |
3052 | char *p; | |
3053 | ||
3054 | if (sh_no_align_cons) | |
3055 | { | |
3056 | /* This is an unaligned pseudo-op. */ | |
3057 | sh_no_align_cons = 0; | |
3058 | return; | |
3059 | } | |
3060 | ||
3061 | nalign = 0; | |
3062 | while ((nbytes & 1) == 0) | |
3063 | { | |
3064 | ++nalign; | |
3065 | nbytes >>= 1; | |
3066 | } | |
3067 | ||
3068 | if (nalign == 0) | |
3069 | return; | |
3070 | ||
3071 | if (now_seg == absolute_section) | |
3072 | { | |
3073 | if ((abs_section_offset & ((1 << nalign) - 1)) != 0) | |
3074 | as_warn (_("misaligned data")); | |
3075 | return; | |
3076 | } | |
3077 | ||
0a9ef439 | 3078 | p = frag_var (rs_align_test, 1, 1, (relax_substateT) 0, |
252b5132 RH |
3079 | (symbolS *) NULL, (offsetT) nalign, (char *) NULL); |
3080 | ||
3081 | record_alignment (now_seg, nalign); | |
3082 | } | |
3083 | ||
3084 | /* When relaxing, we need to output a reloc for any .align directive | |
3085 | that requests alignment to a four byte boundary or larger. This is | |
3086 | also where we check for misaligned data. */ | |
3087 | ||
3088 | void | |
8edc77b9 | 3089 | sh_handle_align (fragS *frag) |
252b5132 | 3090 | { |
0a9ef439 RH |
3091 | int bytes = frag->fr_next->fr_address - frag->fr_address - frag->fr_fix; |
3092 | ||
3093 | if (frag->fr_type == rs_align_code) | |
3094 | { | |
3095 | static const unsigned char big_nop_pattern[] = { 0x00, 0x09 }; | |
3096 | static const unsigned char little_nop_pattern[] = { 0x09, 0x00 }; | |
3097 | ||
3098 | char *p = frag->fr_literal + frag->fr_fix; | |
3099 | ||
3100 | if (bytes & 1) | |
3101 | { | |
3102 | *p++ = 0; | |
3103 | bytes--; | |
3104 | frag->fr_fix += 1; | |
3105 | } | |
3106 | ||
3107 | if (target_big_endian) | |
3108 | { | |
3109 | memcpy (p, big_nop_pattern, sizeof big_nop_pattern); | |
3110 | frag->fr_var = sizeof big_nop_pattern; | |
3111 | } | |
3112 | else | |
3113 | { | |
3114 | memcpy (p, little_nop_pattern, sizeof little_nop_pattern); | |
3115 | frag->fr_var = sizeof little_nop_pattern; | |
3116 | } | |
3117 | } | |
3118 | else if (frag->fr_type == rs_align_test) | |
3119 | { | |
3120 | if (bytes != 0) | |
3121 | as_warn_where (frag->fr_file, frag->fr_line, _("misaligned data")); | |
3122 | } | |
3123 | ||
252b5132 | 3124 | if (sh_relax |
0a9ef439 RH |
3125 | && (frag->fr_type == rs_align |
3126 | || frag->fr_type == rs_align_code) | |
252b5132 RH |
3127 | && frag->fr_address + frag->fr_fix > 0 |
3128 | && frag->fr_offset > 1 | |
3129 | && now_seg != bss_section) | |
3130 | fix_new (frag, frag->fr_fix, 2, &abs_symbol, frag->fr_offset, 0, | |
3131 | BFD_RELOC_SH_ALIGN); | |
252b5132 RH |
3132 | } |
3133 | ||
28602ebf KK |
3134 | /* See whether the relocation should be resolved locally. */ |
3135 | ||
b34976b6 | 3136 | static bfd_boolean |
8edc77b9 | 3137 | sh_local_pcrel (fixS *fix) |
28602ebf | 3138 | { |
b34976b6 AM |
3139 | return (! sh_relax |
3140 | && (fix->fx_r_type == BFD_RELOC_SH_PCDISP8BY2 | |
3141 | || fix->fx_r_type == BFD_RELOC_SH_PCDISP12BY2 | |
3142 | || fix->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY2 | |
3143 | || fix->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY4 | |
3144 | || fix->fx_r_type == BFD_RELOC_8_PCREL | |
3145 | || fix->fx_r_type == BFD_RELOC_SH_SWITCH16 | |
3146 | || fix->fx_r_type == BFD_RELOC_SH_SWITCH32)); | |
28602ebf KK |
3147 | } |
3148 | ||
252b5132 RH |
3149 | /* See whether we need to force a relocation into the output file. |
3150 | This is used to force out switch and PC relative relocations when | |
3151 | relaxing. */ | |
3152 | ||
3153 | int | |
8edc77b9 | 3154 | sh_force_relocation (fixS *fix) |
252b5132 | 3155 | { |
8ba4dac0 DJ |
3156 | /* These relocations can't make it into a DSO, so no use forcing |
3157 | them for global symbols. */ | |
28602ebf | 3158 | if (sh_local_pcrel (fix)) |
8ba4dac0 DJ |
3159 | return 0; |
3160 | ||
9efb3b7b | 3161 | /* Make sure some relocations get emitted. */ |
ae6063d4 | 3162 | if (fix->fx_r_type == BFD_RELOC_SH_LOOP_START |
a161fe53 | 3163 | || fix->fx_r_type == BFD_RELOC_SH_LOOP_END |
9efb3b7b KK |
3164 | || fix->fx_r_type == BFD_RELOC_SH_TLS_GD_32 |
3165 | || fix->fx_r_type == BFD_RELOC_SH_TLS_LD_32 | |
3166 | || fix->fx_r_type == BFD_RELOC_SH_TLS_IE_32 | |
3167 | || fix->fx_r_type == BFD_RELOC_SH_TLS_LDO_32 | |
3168 | || fix->fx_r_type == BFD_RELOC_SH_TLS_LE_32 | |
ae6063d4 | 3169 | || generic_force_reloc (fix)) |
252b5132 RH |
3170 | return 1; |
3171 | ||
3172 | if (! sh_relax) | |
3173 | return 0; | |
3174 | ||
3175 | return (fix->fx_pcrel | |
3176 | || SWITCH_TABLE (fix) | |
3177 | || fix->fx_r_type == BFD_RELOC_SH_COUNT | |
3178 | || fix->fx_r_type == BFD_RELOC_SH_ALIGN | |
3179 | || fix->fx_r_type == BFD_RELOC_SH_CODE | |
3180 | || fix->fx_r_type == BFD_RELOC_SH_DATA | |
324bfcf3 AO |
3181 | #ifdef HAVE_SH64 |
3182 | || fix->fx_r_type == BFD_RELOC_SH_SHMEDIA_CODE | |
3183 | #endif | |
252b5132 RH |
3184 | || fix->fx_r_type == BFD_RELOC_SH_LABEL); |
3185 | } | |
3186 | ||
3187 | #ifdef OBJ_ELF | |
b34976b6 | 3188 | bfd_boolean |
8edc77b9 | 3189 | sh_fix_adjustable (fixS *fixP) |
252b5132 | 3190 | { |
a161fe53 AM |
3191 | if (fixP->fx_r_type == BFD_RELOC_32_PLT_PCREL |
3192 | || fixP->fx_r_type == BFD_RELOC_32_GOT_PCREL | |
3193 | || fixP->fx_r_type == BFD_RELOC_SH_GOTPC | |
a1cc9221 AO |
3194 | || fixP->fx_r_type == BFD_RELOC_RVA) |
3195 | return 0; | |
3196 | ||
252b5132 RH |
3197 | /* We need the symbol name for the VTABLE entries */ |
3198 | if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT | |
3199 | || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY) | |
3200 | return 0; | |
3201 | ||
3202 | return 1; | |
3203 | } | |
d4845d57 | 3204 | |
6b31947e | 3205 | void |
8edc77b9 | 3206 | sh_elf_final_processing (void) |
d4845d57 JR |
3207 | { |
3208 | int val; | |
3209 | ||
3210 | /* Set file-specific flags to indicate if this code needs | |
3211 | a processor with the sh-dsp / sh3e ISA to execute. */ | |
324bfcf3 AO |
3212 | #ifdef HAVE_SH64 |
3213 | /* SH5 and above don't know about the valid_arch arch_sh* bits defined | |
3214 | in sh-opc.h, so check SH64 mode before checking valid_arch. */ | |
3215 | if (sh64_isa_mode != sh64_isa_unspecified) | |
3216 | val = EF_SH5; | |
3217 | else | |
3218 | #endif /* HAVE_SH64 */ | |
d4845d57 JR |
3219 | if (valid_arch & arch_sh1) |
3220 | val = EF_SH1; | |
3221 | else if (valid_arch & arch_sh2) | |
3222 | val = EF_SH2; | |
5177500f NC |
3223 | else if (valid_arch & arch_sh2e) |
3224 | val = EF_SH2E; | |
d4845d57 JR |
3225 | else if (valid_arch & arch_sh_dsp) |
3226 | val = EF_SH_DSP; | |
3227 | else if (valid_arch & arch_sh3) | |
3228 | val = EF_SH3; | |
3229 | else if (valid_arch & arch_sh3_dsp) | |
3230 | val = EF_SH_DSP; | |
3231 | else if (valid_arch & arch_sh3e) | |
3232 | val = EF_SH3E; | |
3233 | else if (valid_arch & arch_sh4) | |
3234 | val = EF_SH4; | |
3235 | else | |
3236 | abort (); | |
3237 | ||
3238 | elf_elfheader (stdoutput)->e_flags &= ~EF_SH_MACH_MASK; | |
3239 | elf_elfheader (stdoutput)->e_flags |= val; | |
3240 | } | |
252b5132 RH |
3241 | #endif |
3242 | ||
3243 | /* Apply a fixup to the object file. */ | |
3244 | ||
252b5132 | 3245 | void |
8edc77b9 | 3246 | md_apply_fix3 (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) |
252b5132 RH |
3247 | { |
3248 | char *buf = fixP->fx_where + fixP->fx_frag->fr_literal; | |
3249 | int lowbyte = target_big_endian ? 1 : 0; | |
3250 | int highbyte = target_big_endian ? 0 : 1; | |
2ed5f585 | 3251 | long val = (long) *valP; |
252b5132 RH |
3252 | long max, min; |
3253 | int shift; | |
3254 | ||
3255 | #ifdef BFD_ASSEMBLER | |
a1cc9221 AO |
3256 | /* A difference between two symbols, the second of which is in the |
3257 | current section, is transformed in a PC-relative relocation to | |
3258 | the other symbol. We have to adjust the relocation type here. */ | |
3259 | if (fixP->fx_pcrel) | |
3260 | { | |
3261 | switch (fixP->fx_r_type) | |
3262 | { | |
3263 | default: | |
3264 | break; | |
3265 | ||
3266 | case BFD_RELOC_32: | |
3267 | fixP->fx_r_type = BFD_RELOC_32_PCREL; | |
3268 | break; | |
3269 | ||
3270 | /* Currently, we only support 32-bit PCREL relocations. | |
3271 | We'd need a new reloc type to handle 16_PCREL, and | |
3272 | 8_PCREL is already taken for R_SH_SWITCH8, which | |
3273 | apparently does something completely different than what | |
3274 | we need. FIXME. */ | |
3275 | case BFD_RELOC_16: | |
3276 | bfd_set_error (bfd_error_bad_value); | |
94f592af | 3277 | return; |
81d4177b | 3278 | |
a1cc9221 AO |
3279 | case BFD_RELOC_8: |
3280 | bfd_set_error (bfd_error_bad_value); | |
94f592af | 3281 | return; |
a1cc9221 AO |
3282 | } |
3283 | } | |
3284 | ||
6b31947e NC |
3285 | /* The function adjust_reloc_syms won't convert a reloc against a weak |
3286 | symbol into a reloc against a section, but bfd_install_relocation | |
3287 | will screw up if the symbol is defined, so we have to adjust val here | |
1308f14c HPN |
3288 | to avoid the screw up later. |
3289 | ||
3290 | For ordinary relocs, this does not happen for ELF, since for ELF, | |
3291 | bfd_install_relocation uses the "special function" field of the | |
3292 | howto, and does not execute the code that needs to be undone, as long | |
3293 | as the special function does not return bfd_reloc_continue. | |
3294 | It can happen for GOT- and PLT-type relocs the way they are | |
3295 | described in elf32-sh.c as they use bfd_elf_generic_reloc, but it | |
3296 | doesn't matter here since those relocs don't use VAL; see below. */ | |
3297 | if (OUTPUT_FLAVOR != bfd_target_elf_flavour | |
3298 | && fixP->fx_addsy != NULL | |
252b5132 RH |
3299 | && S_IS_WEAK (fixP->fx_addsy)) |
3300 | val -= S_GET_VALUE (fixP->fx_addsy); | |
3301 | #endif | |
3302 | ||
bdfaef52 JR |
3303 | #ifdef BFD_ASSEMBLER |
3304 | if (SWITCH_TABLE (fixP)) | |
3305 | val -= S_GET_VALUE (fixP->fx_subsy); | |
3306 | #else | |
252b5132 RH |
3307 | if (fixP->fx_r_type == 0) |
3308 | { | |
3309 | if (fixP->fx_size == 2) | |
3310 | fixP->fx_r_type = BFD_RELOC_16; | |
3311 | else if (fixP->fx_size == 4) | |
3312 | fixP->fx_r_type = BFD_RELOC_32; | |
3313 | else if (fixP->fx_size == 1) | |
3314 | fixP->fx_r_type = BFD_RELOC_8; | |
3315 | else | |
3316 | abort (); | |
3317 | } | |
3318 | #endif | |
3319 | ||
3320 | max = min = 0; | |
3321 | shift = 0; | |
3322 | switch (fixP->fx_r_type) | |
3323 | { | |
3324 | case BFD_RELOC_SH_IMM4: | |
3325 | max = 0xf; | |
3326 | *buf = (*buf & 0xf0) | (val & 0xf); | |
3327 | break; | |
3328 | ||
3329 | case BFD_RELOC_SH_IMM4BY2: | |
3330 | max = 0xf; | |
3331 | shift = 1; | |
3332 | *buf = (*buf & 0xf0) | ((val >> 1) & 0xf); | |
3333 | break; | |
3334 | ||
3335 | case BFD_RELOC_SH_IMM4BY4: | |
3336 | max = 0xf; | |
3337 | shift = 2; | |
3338 | *buf = (*buf & 0xf0) | ((val >> 2) & 0xf); | |
3339 | break; | |
3340 | ||
3341 | case BFD_RELOC_SH_IMM8BY2: | |
3342 | max = 0xff; | |
3343 | shift = 1; | |
3344 | *buf = val >> 1; | |
3345 | break; | |
3346 | ||
3347 | case BFD_RELOC_SH_IMM8BY4: | |
3348 | max = 0xff; | |
3349 | shift = 2; | |
3350 | *buf = val >> 2; | |
3351 | break; | |
3352 | ||
3353 | case BFD_RELOC_8: | |
3354 | case BFD_RELOC_SH_IMM8: | |
3355 | /* Sometimes the 8 bit value is sign extended (e.g., add) and | |
3356 | sometimes it is not (e.g., and). We permit any 8 bit value. | |
3357 | Note that adding further restrictions may invalidate | |
3358 | reasonable looking assembly code, such as ``and -0x1,r0''. */ | |
3359 | max = 0xff; | |
c4aa876b | 3360 | min = -0xff; |
252b5132 RH |
3361 | *buf++ = val; |
3362 | break; | |
3363 | ||
3364 | case BFD_RELOC_SH_PCRELIMM8BY4: | |
3365 | /* The lower two bits of the PC are cleared before the | |
3366 | displacement is added in. We can assume that the destination | |
3367 | is on a 4 byte bounday. If this instruction is also on a 4 | |
3368 | byte boundary, then we want | |
3369 | (target - here) / 4 | |
3370 | and target - here is a multiple of 4. | |
3371 | Otherwise, we are on a 2 byte boundary, and we want | |
3372 | (target - (here - 2)) / 4 | |
3373 | and target - here is not a multiple of 4. Computing | |
3374 | (target - (here - 2)) / 4 == (target - here + 2) / 4 | |
3375 | works for both cases, since in the first case the addition of | |
3376 | 2 will be removed by the division. target - here is in the | |
3377 | variable val. */ | |
3378 | val = (val + 2) / 4; | |
3379 | if (val & ~0xff) | |
3380 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); | |
3381 | buf[lowbyte] = val; | |
3382 | break; | |
3383 | ||
3384 | case BFD_RELOC_SH_PCRELIMM8BY2: | |
3385 | val /= 2; | |
3386 | if (val & ~0xff) | |
3387 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); | |
3388 | buf[lowbyte] = val; | |
3389 | break; | |
3390 | ||
3391 | case BFD_RELOC_SH_PCDISP8BY2: | |
3392 | val /= 2; | |
3393 | if (val < -0x80 || val > 0x7f) | |
3394 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); | |
3395 | buf[lowbyte] = val; | |
3396 | break; | |
3397 | ||
3398 | case BFD_RELOC_SH_PCDISP12BY2: | |
3399 | val /= 2; | |
8637c045 | 3400 | if (val < -0x800 || val > 0x7ff) |
252b5132 RH |
3401 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); |
3402 | buf[lowbyte] = val & 0xff; | |
3403 | buf[highbyte] |= (val >> 8) & 0xf; | |
3404 | break; | |
3405 | ||
3406 | case BFD_RELOC_32: | |
a1cc9221 | 3407 | case BFD_RELOC_32_PCREL: |
1db77c8e | 3408 | md_number_to_chars (buf, val, 4); |
252b5132 RH |
3409 | break; |
3410 | ||
3411 | case BFD_RELOC_16: | |
1db77c8e | 3412 | md_number_to_chars (buf, val, 2); |
252b5132 RH |
3413 | break; |
3414 | ||
3415 | case BFD_RELOC_SH_USES: | |
3416 | /* Pass the value into sh_coff_reloc_mangle. */ | |
3417 | fixP->fx_addnumber = val; | |
3418 | break; | |
3419 | ||
3420 | case BFD_RELOC_SH_COUNT: | |
3421 | case BFD_RELOC_SH_ALIGN: | |
3422 | case BFD_RELOC_SH_CODE: | |
3423 | case BFD_RELOC_SH_DATA: | |
3424 | case BFD_RELOC_SH_LABEL: | |
3425 | /* Nothing to do here. */ | |
3426 | break; | |
3427 | ||
015551fc JR |
3428 | case BFD_RELOC_SH_LOOP_START: |
3429 | case BFD_RELOC_SH_LOOP_END: | |
3430 | ||
252b5132 RH |
3431 | case BFD_RELOC_VTABLE_INHERIT: |
3432 | case BFD_RELOC_VTABLE_ENTRY: | |
3433 | fixP->fx_done = 0; | |
3434 | return; | |
3435 | ||
a1cc9221 AO |
3436 | #ifdef OBJ_ELF |
3437 | case BFD_RELOC_32_PLT_PCREL: | |
3438 | /* Make the jump instruction point to the address of the operand. At | |
81d4177b | 3439 | runtime we merely add the offset to the actual PLT entry. */ |
94f592af | 3440 | * valP = 0xfffffffc; |
0174e383 | 3441 | val = fixP->fx_offset; |
ac3f04d7 AO |
3442 | if (fixP->fx_subsy) |
3443 | val -= S_GET_VALUE (fixP->fx_subsy); | |
a161fe53 | 3444 | fixP->fx_addnumber = val; |
538cd60f | 3445 | md_number_to_chars (buf, val, 4); |
a1cc9221 AO |
3446 | break; |
3447 | ||
3448 | case BFD_RELOC_SH_GOTPC: | |
3449 | /* This is tough to explain. We end up with this one if we have | |
3450 | operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]". | |
3451 | The goal here is to obtain the absolute address of the GOT, | |
3452 | and it is strongly preferable from a performance point of | |
3453 | view to avoid using a runtime relocation for this. There are | |
3454 | cases where you have something like: | |
81d4177b | 3455 | |
a1cc9221 | 3456 | .long _GLOBAL_OFFSET_TABLE_+[.-.L66] |
81d4177b | 3457 | |
a1cc9221 AO |
3458 | and here no correction would be required. Internally in the |
3459 | assembler we treat operands of this form as not being pcrel | |
3460 | since the '.' is explicitly mentioned, and I wonder whether | |
3461 | it would simplify matters to do it this way. Who knows. In | |
3462 | earlier versions of the PIC patches, the pcrel_adjust field | |
3463 | was used to store the correction, but since the expression is | |
3464 | not pcrel, I felt it would be confusing to do it this way. */ | |
94f592af | 3465 | * valP -= 1; |
a1cc9221 AO |
3466 | md_number_to_chars (buf, val, 4); |
3467 | break; | |
3468 | ||
9efb3b7b KK |
3469 | case BFD_RELOC_SH_TLS_GD_32: |
3470 | case BFD_RELOC_SH_TLS_LD_32: | |
3471 | case BFD_RELOC_SH_TLS_IE_32: | |
2bba4140 KK |
3472 | S_SET_THREAD_LOCAL (fixP->fx_addsy); |
3473 | /* Fallthrough */ | |
3474 | case BFD_RELOC_32_GOT_PCREL: | |
3475 | case BFD_RELOC_SH_GOTPLT32: | |
94f592af | 3476 | * valP = 0; /* Fully resolved at runtime. No addend. */ |
a1cc9221 AO |
3477 | md_number_to_chars (buf, 0, 4); |
3478 | break; | |
3479 | ||
9efb3b7b KK |
3480 | case BFD_RELOC_SH_TLS_LDO_32: |
3481 | case BFD_RELOC_SH_TLS_LE_32: | |
2bba4140 KK |
3482 | S_SET_THREAD_LOCAL (fixP->fx_addsy); |
3483 | /* Fallthrough */ | |
3484 | case BFD_RELOC_32_GOTOFF: | |
538cd60f | 3485 | md_number_to_chars (buf, val, 4); |
a1cc9221 AO |
3486 | break; |
3487 | #endif | |
3488 | ||
252b5132 | 3489 | default: |
324bfcf3 AO |
3490 | #ifdef HAVE_SH64 |
3491 | shmedia_md_apply_fix3 (fixP, valP); | |
3492 | return; | |
3493 | #else | |
252b5132 | 3494 | abort (); |
324bfcf3 | 3495 | #endif |
252b5132 RH |
3496 | } |
3497 | ||
3498 | if (shift != 0) | |
3499 | { | |
3500 | if ((val & ((1 << shift) - 1)) != 0) | |
3501 | as_bad_where (fixP->fx_file, fixP->fx_line, _("misaligned offset")); | |
3502 | if (val >= 0) | |
3503 | val >>= shift; | |
3504 | else | |
3505 | val = ((val >> shift) | |
3506 | | ((long) -1 & ~ ((long) -1 >> shift))); | |
3507 | } | |
3508 | if (max != 0 && (val < min || val > max)) | |
3509 | as_bad_where (fixP->fx_file, fixP->fx_line, _("offset out of range")); | |
3510 | ||
94f592af NC |
3511 | if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0) |
3512 | fixP->fx_done = 1; | |
252b5132 RH |
3513 | } |
3514 | ||
3515 | /* Called just before address relaxation. Return the length | |
3516 | by which a fragment must grow to reach it's destination. */ | |
3517 | ||
3518 | int | |
8edc77b9 | 3519 | md_estimate_size_before_relax (fragS *fragP, segT segment_type) |
252b5132 | 3520 | { |
e66457fb AM |
3521 | int what; |
3522 | ||
252b5132 RH |
3523 | switch (fragP->fr_subtype) |
3524 | { | |
93c2a809 | 3525 | default: |
324bfcf3 AO |
3526 | #ifdef HAVE_SH64 |
3527 | return shmedia_md_estimate_size_before_relax (fragP, segment_type); | |
3528 | #else | |
93c2a809 | 3529 | abort (); |
324bfcf3 AO |
3530 | #endif |
3531 | ||
93c2a809 | 3532 | |
252b5132 | 3533 | case C (UNCOND_JUMP, UNDEF_DISP): |
6b31947e | 3534 | /* Used to be a branch to somewhere which was unknown. */ |
252b5132 RH |
3535 | if (!fragP->fr_symbol) |
3536 | { | |
3537 | fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12); | |
252b5132 RH |
3538 | } |
3539 | else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type) | |
3540 | { | |
3541 | fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12); | |
252b5132 RH |
3542 | } |
3543 | else | |
3544 | { | |
3545 | fragP->fr_subtype = C (UNCOND_JUMP, UNDEF_WORD_DISP); | |
252b5132 RH |
3546 | } |
3547 | break; | |
3548 | ||
252b5132 RH |
3549 | case C (COND_JUMP, UNDEF_DISP): |
3550 | case C (COND_JUMP_DELAY, UNDEF_DISP): | |
e66457fb | 3551 | what = GET_WHAT (fragP->fr_subtype); |
6b31947e | 3552 | /* Used to be a branch to somewhere which was unknown. */ |
252b5132 RH |
3553 | if (fragP->fr_symbol |
3554 | && S_GET_SEGMENT (fragP->fr_symbol) == segment_type) | |
3555 | { | |
252b5132 | 3556 | /* Got a symbol and it's defined in this segment, become byte |
6b31947e | 3557 | sized - maybe it will fix up. */ |
252b5132 | 3558 | fragP->fr_subtype = C (what, COND8); |
252b5132 RH |
3559 | } |
3560 | else if (fragP->fr_symbol) | |
3561 | { | |
6b31947e | 3562 | /* Its got a segment, but its not ours, so it will always be long. */ |
252b5132 | 3563 | fragP->fr_subtype = C (what, UNDEF_WORD_DISP); |
252b5132 RH |
3564 | } |
3565 | else | |
3566 | { | |
6b31947e | 3567 | /* We know the abs value. */ |
252b5132 | 3568 | fragP->fr_subtype = C (what, COND8); |
252b5132 | 3569 | } |
93c2a809 | 3570 | break; |
252b5132 | 3571 | |
93c2a809 | 3572 | case C (UNCOND_JUMP, UNCOND12): |
e66457fb | 3573 | case C (UNCOND_JUMP, UNCOND32): |
93c2a809 AM |
3574 | case C (UNCOND_JUMP, UNDEF_WORD_DISP): |
3575 | case C (COND_JUMP, COND8): | |
e66457fb AM |
3576 | case C (COND_JUMP, COND12): |
3577 | case C (COND_JUMP, COND32): | |
93c2a809 AM |
3578 | case C (COND_JUMP, UNDEF_WORD_DISP): |
3579 | case C (COND_JUMP_DELAY, COND8): | |
e66457fb AM |
3580 | case C (COND_JUMP_DELAY, COND12): |
3581 | case C (COND_JUMP_DELAY, COND32): | |
93c2a809 AM |
3582 | case C (COND_JUMP_DELAY, UNDEF_WORD_DISP): |
3583 | /* When relaxing a section for the second time, we don't need to | |
e66457fb | 3584 | do anything besides return the current size. */ |
252b5132 RH |
3585 | break; |
3586 | } | |
e66457fb AM |
3587 | |
3588 | fragP->fr_var = md_relax_table[fragP->fr_subtype].rlx_length; | |
252b5132 RH |
3589 | return fragP->fr_var; |
3590 | } | |
3591 | ||
6b31947e | 3592 | /* Put number into target byte order. */ |
252b5132 RH |
3593 | |
3594 | void | |
8edc77b9 | 3595 | md_number_to_chars (char *ptr, valueT use, int nbytes) |
252b5132 | 3596 | { |
324bfcf3 AO |
3597 | #ifdef HAVE_SH64 |
3598 | /* We might need to set the contents type to data. */ | |
3599 | sh64_flag_output (); | |
3600 | #endif | |
3601 | ||
252b5132 RH |
3602 | if (! target_big_endian) |
3603 | number_to_chars_littleendian (ptr, use, nbytes); | |
3604 | else | |
3605 | number_to_chars_bigendian (ptr, use, nbytes); | |
3606 | } | |
3607 | ||
cce5a618 NC |
3608 | /* This version is used in obj-coff.c when not using BFD_ASSEMBLER. |
3609 | eg for the sh-hms target. */ | |
3610 | ||
3611 | long | |
8edc77b9 | 3612 | md_pcrel_from (fixS *fixP) |
cce5a618 NC |
3613 | { |
3614 | return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address + 2; | |
3615 | } | |
3616 | ||
252b5132 | 3617 | long |
8edc77b9 | 3618 | md_pcrel_from_section (fixS *fixP, segT sec) |
252b5132 | 3619 | { |
28602ebf KK |
3620 | if (! sh_local_pcrel (fixP) |
3621 | && fixP->fx_addsy != (symbolS *) NULL | |
ae6063d4 | 3622 | && (generic_force_reloc (fixP) |
ef17112f HPN |
3623 | || S_GET_SEGMENT (fixP->fx_addsy) != sec)) |
3624 | { | |
3625 | /* The symbol is undefined (or is defined but not in this section, | |
3626 | or we're not sure about it being the final definition). Let the | |
3627 | linker figure it out. We need to adjust the subtraction of a | |
3628 | symbol to the position of the relocated data, though. */ | |
3629 | return fixP->fx_subsy ? fixP->fx_where + fixP->fx_frag->fr_address : 0; | |
3630 | } | |
3631 | ||
cce5a618 | 3632 | return md_pcrel_from (fixP); |
252b5132 RH |
3633 | } |
3634 | ||
3635 | #ifdef OBJ_COFF | |
3636 | ||
3637 | int | |
8edc77b9 | 3638 | tc_coff_sizemachdep (fragS *frag) |
252b5132 RH |
3639 | { |
3640 | return md_relax_table[frag->fr_subtype].rlx_length; | |
3641 | } | |
3642 | ||
3643 | #endif /* OBJ_COFF */ | |
3644 | ||
252b5132 RH |
3645 | #ifndef BFD_ASSEMBLER |
3646 | #ifdef OBJ_COFF | |
3647 | ||
3648 | /* Map BFD relocs to SH COFF relocs. */ | |
3649 | ||
3650 | struct reloc_map | |
3651 | { | |
3652 | bfd_reloc_code_real_type bfd_reloc; | |
3653 | int sh_reloc; | |
3654 | }; | |
3655 | ||
3656 | static const struct reloc_map coff_reloc_map[] = | |
3657 | { | |
3658 | { BFD_RELOC_32, R_SH_IMM32 }, | |
3659 | { BFD_RELOC_16, R_SH_IMM16 }, | |
3660 | { BFD_RELOC_8, R_SH_IMM8 }, | |
3661 | { BFD_RELOC_SH_PCDISP8BY2, R_SH_PCDISP8BY2 }, | |
3662 | { BFD_RELOC_SH_PCDISP12BY2, R_SH_PCDISP }, | |
3663 | { BFD_RELOC_SH_IMM4, R_SH_IMM4 }, | |
3664 | { BFD_RELOC_SH_IMM4BY2, R_SH_IMM4BY2 }, | |
3665 | { BFD_RELOC_SH_IMM4BY4, R_SH_IMM4BY4 }, | |
3666 | { BFD_RELOC_SH_IMM8, R_SH_IMM8 }, | |
3667 | { BFD_RELOC_SH_IMM8BY2, R_SH_IMM8BY2 }, | |
3668 | { BFD_RELOC_SH_IMM8BY4, R_SH_IMM8BY4 }, | |
3669 | { BFD_RELOC_SH_PCRELIMM8BY2, R_SH_PCRELIMM8BY2 }, | |
3670 | { BFD_RELOC_SH_PCRELIMM8BY4, R_SH_PCRELIMM8BY4 }, | |
3671 | { BFD_RELOC_8_PCREL, R_SH_SWITCH8 }, | |
3672 | { BFD_RELOC_SH_SWITCH16, R_SH_SWITCH16 }, | |
3673 | { BFD_RELOC_SH_SWITCH32, R_SH_SWITCH32 }, | |
3674 | { BFD_RELOC_SH_USES, R_SH_USES }, | |
3675 | { BFD_RELOC_SH_COUNT, R_SH_COUNT }, | |
3676 | { BFD_RELOC_SH_ALIGN, R_SH_ALIGN }, | |
3677 | { BFD_RELOC_SH_CODE, R_SH_CODE }, | |
3678 | { BFD_RELOC_SH_DATA, R_SH_DATA }, | |
3679 | { BFD_RELOC_SH_LABEL, R_SH_LABEL }, | |
3680 | { BFD_RELOC_UNUSED, 0 } | |
3681 | }; | |
3682 | ||
3683 | /* Adjust a reloc for the SH. This is similar to the generic code, | |
3684 | but does some minor tweaking. */ | |
3685 | ||
3686 | void | |
8edc77b9 KK |
3687 | sh_coff_reloc_mangle (segment_info_type *seg, fixS *fix, |
3688 | struct internal_reloc *intr, unsigned int paddr) | |
252b5132 RH |
3689 | { |
3690 | symbolS *symbol_ptr = fix->fx_addsy; | |
3691 | symbolS *dot; | |
3692 | ||
3693 | intr->r_vaddr = paddr + fix->fx_frag->fr_address + fix->fx_where; | |
3694 | ||
3695 | if (! SWITCH_TABLE (fix)) | |
3696 | { | |
3697 | const struct reloc_map *rm; | |
3698 | ||
3699 | for (rm = coff_reloc_map; rm->bfd_reloc != BFD_RELOC_UNUSED; rm++) | |
3700 | if (rm->bfd_reloc == (bfd_reloc_code_real_type) fix->fx_r_type) | |
3701 | break; | |
3702 | if (rm->bfd_reloc == BFD_RELOC_UNUSED) | |
3703 | as_bad_where (fix->fx_file, fix->fx_line, | |
3704 | _("Can not represent %s relocation in this object file format"), | |
3705 | bfd_get_reloc_code_name (fix->fx_r_type)); | |
3706 | intr->r_type = rm->sh_reloc; | |
3707 | intr->r_offset = 0; | |
3708 | } | |
3709 | else | |
3710 | { | |
3711 | know (sh_relax); | |
3712 | ||
3713 | if (fix->fx_r_type == BFD_RELOC_16) | |
3714 | intr->r_type = R_SH_SWITCH16; | |
3715 | else if (fix->fx_r_type == BFD_RELOC_8) | |
3716 | intr->r_type = R_SH_SWITCH8; | |
3717 | else if (fix->fx_r_type == BFD_RELOC_32) | |
3718 | intr->r_type = R_SH_SWITCH32; | |
3719 | else | |
3720 | abort (); | |
3721 | ||
3722 | /* For a switch reloc, we set r_offset to the difference between | |
3723 | the reloc address and the subtrahend. When the linker is | |
3724 | doing relaxing, it can use the determine the starting and | |
3725 | ending points of the switch difference expression. */ | |
3726 | intr->r_offset = intr->r_vaddr - S_GET_VALUE (fix->fx_subsy); | |
3727 | } | |
3728 | ||
3729 | /* PC relative relocs are always against the current section. */ | |
3730 | if (symbol_ptr == NULL) | |
3731 | { | |
3732 | switch (fix->fx_r_type) | |
3733 | { | |
3734 | case BFD_RELOC_SH_PCRELIMM8BY2: | |
3735 | case BFD_RELOC_SH_PCRELIMM8BY4: | |
3736 | case BFD_RELOC_SH_PCDISP8BY2: | |
3737 | case BFD_RELOC_SH_PCDISP12BY2: | |
3738 | case BFD_RELOC_SH_USES: | |
3739 | symbol_ptr = seg->dot; | |
3740 | break; | |
3741 | default: | |
3742 | break; | |
3743 | } | |
3744 | } | |
3745 | ||
3746 | if (fix->fx_r_type == BFD_RELOC_SH_USES) | |
3747 | { | |
3748 | /* We can't store the offset in the object file, since this | |
3749 | reloc does not take up any space, so we store it in r_offset. | |
94f592af | 3750 | The fx_addnumber field was set in md_apply_fix3. */ |
252b5132 RH |
3751 | intr->r_offset = fix->fx_addnumber; |
3752 | } | |
3753 | else if (fix->fx_r_type == BFD_RELOC_SH_COUNT) | |
3754 | { | |
3755 | /* We can't store the count in the object file, since this reloc | |
3756 | does not take up any space, so we store it in r_offset. The | |
3757 | fx_offset field was set when the fixup was created in | |
3758 | sh_coff_frob_file. */ | |
3759 | intr->r_offset = fix->fx_offset; | |
3760 | /* This reloc is always absolute. */ | |
3761 | symbol_ptr = NULL; | |
3762 | } | |
3763 | else if (fix->fx_r_type == BFD_RELOC_SH_ALIGN) | |
3764 | { | |
3765 | /* Store the alignment in the r_offset field. */ | |
3766 | intr->r_offset = fix->fx_offset; | |
3767 | /* This reloc is always absolute. */ | |
3768 | symbol_ptr = NULL; | |
3769 | } | |
3770 | else if (fix->fx_r_type == BFD_RELOC_SH_CODE | |
3771 | || fix->fx_r_type == BFD_RELOC_SH_DATA | |
3772 | || fix->fx_r_type == BFD_RELOC_SH_LABEL) | |
3773 | { | |
3774 | /* These relocs are always absolute. */ | |
3775 | symbol_ptr = NULL; | |
3776 | } | |
3777 | ||
3778 | /* Turn the segment of the symbol into an offset. */ | |
3779 | if (symbol_ptr != NULL) | |
3780 | { | |
3781 | dot = segment_info[S_GET_SEGMENT (symbol_ptr)].dot; | |
3782 | if (dot != NULL) | |
3783 | intr->r_symndx = dot->sy_number; | |
3784 | else | |
3785 | intr->r_symndx = symbol_ptr->sy_number; | |
3786 | } | |
3787 | else | |
3788 | intr->r_symndx = -1; | |
3789 | } | |
3790 | ||
3791 | #endif /* OBJ_COFF */ | |
3792 | #endif /* ! BFD_ASSEMBLER */ | |
3793 | ||
3794 | #ifdef BFD_ASSEMBLER | |
3795 | ||
3796 | /* Create a reloc. */ | |
3797 | ||
3798 | arelent * | |
8edc77b9 | 3799 | tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp) |
252b5132 RH |
3800 | { |
3801 | arelent *rel; | |
3802 | bfd_reloc_code_real_type r_type; | |
3803 | ||
3804 | rel = (arelent *) xmalloc (sizeof (arelent)); | |
49309057 ILT |
3805 | rel->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); |
3806 | *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); | |
252b5132 RH |
3807 | rel->address = fixp->fx_frag->fr_address + fixp->fx_where; |
3808 | ||
3809 | r_type = fixp->fx_r_type; | |
3810 | ||
3811 | if (SWITCH_TABLE (fixp)) | |
3812 | { | |
bdfaef52 JR |
3813 | *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_subsy); |
3814 | rel->addend = 0; | |
252b5132 RH |
3815 | if (r_type == BFD_RELOC_16) |
3816 | r_type = BFD_RELOC_SH_SWITCH16; | |
3817 | else if (r_type == BFD_RELOC_8) | |
3818 | r_type = BFD_RELOC_8_PCREL; | |
3819 | else if (r_type == BFD_RELOC_32) | |
3820 | r_type = BFD_RELOC_SH_SWITCH32; | |
3821 | else | |
3822 | abort (); | |
3823 | } | |
3824 | else if (r_type == BFD_RELOC_SH_USES) | |
3825 | rel->addend = fixp->fx_addnumber; | |
3826 | else if (r_type == BFD_RELOC_SH_COUNT) | |
3827 | rel->addend = fixp->fx_offset; | |
3828 | else if (r_type == BFD_RELOC_SH_ALIGN) | |
3829 | rel->addend = fixp->fx_offset; | |
3830 | else if (r_type == BFD_RELOC_VTABLE_INHERIT | |
3831 | || r_type == BFD_RELOC_VTABLE_ENTRY) | |
3832 | rel->addend = fixp->fx_offset; | |
015551fc JR |
3833 | else if (r_type == BFD_RELOC_SH_LOOP_START |
3834 | || r_type == BFD_RELOC_SH_LOOP_END) | |
3835 | rel->addend = fixp->fx_offset; | |
3836 | else if (r_type == BFD_RELOC_SH_LABEL && fixp->fx_pcrel) | |
3837 | { | |
3838 | rel->addend = 0; | |
3839 | rel->address = rel->addend = fixp->fx_offset; | |
3840 | } | |
324bfcf3 AO |
3841 | #ifdef HAVE_SH64 |
3842 | else if (shmedia_init_reloc (rel, fixp)) | |
3843 | ; | |
3844 | #endif | |
252b5132 RH |
3845 | else if (fixp->fx_pcrel) |
3846 | rel->addend = fixp->fx_addnumber; | |
a1cc9221 AO |
3847 | else if (r_type == BFD_RELOC_32 || r_type == BFD_RELOC_32_GOTOFF) |
3848 | rel->addend = fixp->fx_addnumber; | |
252b5132 RH |
3849 | else |
3850 | rel->addend = 0; | |
3851 | ||
3852 | rel->howto = bfd_reloc_type_lookup (stdoutput, r_type); | |
c861c80c | 3853 | #ifdef OBJ_ELF |
bdfaef52 JR |
3854 | if (rel->howto->type == R_SH_IND12W) |
3855 | rel->addend += fixp->fx_offset - 4; | |
c861c80c | 3856 | #endif |
a161fe53 | 3857 | if (rel->howto == NULL) |
252b5132 RH |
3858 | { |
3859 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
3860 | _("Cannot represent relocation type %s"), | |
3861 | bfd_get_reloc_code_name (r_type)); | |
3862 | /* Set howto to a garbage value so that we can keep going. */ | |
3863 | rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32); | |
3864 | assert (rel->howto != NULL); | |
3865 | } | |
3866 | ||
3867 | return rel; | |
3868 | } | |
3869 | ||
538cd60f AO |
3870 | #ifdef OBJ_ELF |
3871 | inline static char * | |
8edc77b9 | 3872 | sh_end_of_match (char *cont, char *what) |
538cd60f AO |
3873 | { |
3874 | int len = strlen (what); | |
3875 | ||
3876 | if (strncasecmp (cont, what, strlen (what)) == 0 | |
3877 | && ! is_part_of_name (cont[len])) | |
3878 | return cont + len; | |
3879 | ||
3880 | return NULL; | |
5d6255fe | 3881 | } |
538cd60f AO |
3882 | |
3883 | int | |
8edc77b9 | 3884 | sh_parse_name (char const *name, expressionS *exprP, char *nextcharP) |
538cd60f AO |
3885 | { |
3886 | char *next = input_line_pointer; | |
3887 | char *next_end; | |
3888 | int reloc_type; | |
3889 | segT segment; | |
3890 | ||
3891 | exprP->X_op_symbol = NULL; | |
3892 | ||
3893 | if (strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0) | |
3894 | { | |
3895 | if (! GOT_symbol) | |
3896 | GOT_symbol = symbol_find_or_make (name); | |
3897 | ||
3898 | exprP->X_add_symbol = GOT_symbol; | |
3899 | no_suffix: | |
3900 | /* If we have an absolute symbol or a reg, then we know its | |
3901 | value now. */ | |
3902 | segment = S_GET_SEGMENT (exprP->X_add_symbol); | |
3903 | if (segment == absolute_section) | |
3904 | { | |
3905 | exprP->X_op = O_constant; | |
3906 | exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol); | |
3907 | exprP->X_add_symbol = NULL; | |
3908 | } | |
3909 | else if (segment == reg_section) | |
3910 | { | |
3911 | exprP->X_op = O_register; | |
3912 | exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol); | |
3913 | exprP->X_add_symbol = NULL; | |
3914 | } | |
3915 | else | |
3916 | { | |
3917 | exprP->X_op = O_symbol; | |
3918 | exprP->X_add_number = 0; | |
3919 | } | |
3920 | ||
3921 | return 1; | |
3922 | } | |
3923 | ||
3924 | exprP->X_add_symbol = symbol_find_or_make (name); | |
5d6255fe | 3925 | |
538cd60f AO |
3926 | if (*nextcharP != '@') |
3927 | goto no_suffix; | |
3928 | else if ((next_end = sh_end_of_match (next + 1, "GOTOFF"))) | |
3929 | reloc_type = BFD_RELOC_32_GOTOFF; | |
324bfcf3 AO |
3930 | else if ((next_end = sh_end_of_match (next + 1, "GOTPLT"))) |
3931 | reloc_type = BFD_RELOC_SH_GOTPLT32; | |
538cd60f AO |
3932 | else if ((next_end = sh_end_of_match (next + 1, "GOT"))) |
3933 | reloc_type = BFD_RELOC_32_GOT_PCREL; | |
3934 | else if ((next_end = sh_end_of_match (next + 1, "PLT"))) | |
3935 | reloc_type = BFD_RELOC_32_PLT_PCREL; | |
9efb3b7b KK |
3936 | else if ((next_end = sh_end_of_match (next + 1, "TLSGD"))) |
3937 | reloc_type = BFD_RELOC_SH_TLS_GD_32; | |
3938 | else if ((next_end = sh_end_of_match (next + 1, "TLSLDM"))) | |
3939 | reloc_type = BFD_RELOC_SH_TLS_LD_32; | |
3940 | else if ((next_end = sh_end_of_match (next + 1, "GOTTPOFF"))) | |
3941 | reloc_type = BFD_RELOC_SH_TLS_IE_32; | |
3942 | else if ((next_end = sh_end_of_match (next + 1, "TPOFF"))) | |
3943 | reloc_type = BFD_RELOC_SH_TLS_LE_32; | |
3944 | else if ((next_end = sh_end_of_match (next + 1, "DTPOFF"))) | |
3945 | reloc_type = BFD_RELOC_SH_TLS_LDO_32; | |
538cd60f AO |
3946 | else |
3947 | goto no_suffix; | |
3948 | ||
3949 | *input_line_pointer = *nextcharP; | |
3950 | input_line_pointer = next_end; | |
3951 | *nextcharP = *input_line_pointer; | |
3952 | *input_line_pointer = '\0'; | |
3953 | ||
3954 | exprP->X_op = O_PIC_reloc; | |
3955 | exprP->X_add_number = 0; | |
3956 | exprP->X_md = reloc_type; | |
3957 | ||
3958 | return 1; | |
3959 | } | |
3960 | #endif | |
252b5132 | 3961 | #endif /* BFD_ASSEMBLER */ |