Commit | Line | Data |
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252b5132 | 1 | /* tc-sh.c -- Assemble code for the Hitachi Super-H |
5b8274e3 | 2 | Copyright (C) 1993, 94, 95, 96, 97, 98, 99, 2000 Free Software Foundation. |
252b5132 RH |
3 | |
4 | This file is part of GAS, the GNU Assembler. | |
5 | ||
6 | GAS is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2, or (at your option) | |
9 | any later version. | |
10 | ||
11 | GAS is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GAS; see the file COPYING. If not, write to | |
18 | the Free Software Foundation, 59 Temple Place - Suite 330, | |
19 | Boston, MA 02111-1307, USA. */ | |
20 | ||
6b31947e | 21 | /* Written By Steve Chamberlain <sac@cygnus.com> */ |
252b5132 RH |
22 | |
23 | #include <stdio.h> | |
24 | #include "as.h" | |
25 | #include "bfd.h" | |
26 | #include "subsegs.h" | |
27 | #define DEFINE_TABLE | |
28 | #include "opcodes/sh-opc.h" | |
29 | #include <ctype.h> | |
43841e91 | 30 | #include "struc-symbol.h" |
d4845d57 JR |
31 | |
32 | #ifdef OBJ_ELF | |
33 | #include "elf/sh.h" | |
34 | #endif | |
35 | ||
252b5132 RH |
36 | const char comment_chars[] = "!"; |
37 | const char line_separator_chars[] = ";"; | |
38 | const char line_comment_chars[] = "!#"; | |
39 | ||
40 | static void s_uses PARAMS ((int)); | |
41 | ||
42 | static void sh_count_relocs PARAMS ((bfd *, segT, PTR)); | |
43 | static void sh_frob_section PARAMS ((bfd *, segT, PTR)); | |
44 | ||
252b5132 RH |
45 | void cons (); |
46 | void s_align_bytes (); | |
47 | static void s_uacons PARAMS ((int)); | |
d4845d57 JR |
48 | static sh_opcode_info *find_cooked_opcode PARAMS ((char **)); |
49 | static void assemble_ppi PARAMS ((char *, sh_opcode_info *)); | |
252b5132 RH |
50 | |
51 | int shl = 0; | |
52 | ||
53 | static void | |
54 | little (ignore) | |
43841e91 | 55 | int ignore ATTRIBUTE_UNUSED; |
252b5132 RH |
56 | { |
57 | shl = 1; | |
58 | target_big_endian = 0; | |
59 | } | |
60 | ||
d4845d57 JR |
61 | /* This table describes all the machine specific pseudo-ops the assembler |
62 | has to support. The fields are: | |
63 | pseudo-op name without dot | |
64 | function to call to execute this pseudo-op | |
6b31947e | 65 | Integer arg to pass to the function. */ |
d4845d57 | 66 | |
252b5132 RH |
67 | const pseudo_typeS md_pseudo_table[] = |
68 | { | |
69 | {"int", cons, 4}, | |
70 | {"word", cons, 2}, | |
71 | {"form", listing_psize, 0}, | |
72 | {"little", little, 0}, | |
73 | {"heading", listing_title, 0}, | |
74 | {"import", s_ignore, 0}, | |
75 | {"page", listing_eject, 0}, | |
76 | {"program", s_ignore, 0}, | |
77 | {"uses", s_uses, 0}, | |
78 | {"uaword", s_uacons, 2}, | |
79 | {"ualong", s_uacons, 4}, | |
80 | {0, 0, 0} | |
81 | }; | |
82 | ||
83 | /*int md_reloc_size; */ | |
84 | ||
85 | int sh_relax; /* set if -relax seen */ | |
86 | ||
87 | /* Whether -small was seen. */ | |
88 | ||
89 | int sh_small; | |
90 | ||
d4845d57 JR |
91 | /* Whether -dsp was seen. */ |
92 | ||
93 | static int sh_dsp; | |
94 | ||
95 | /* The bit mask of architectures that could | |
96 | accomodate the insns seen so far. */ | |
97 | static int valid_arch; | |
98 | ||
252b5132 RH |
99 | const char EXP_CHARS[] = "eE"; |
100 | ||
6b31947e | 101 | /* Chars that mean this number is a floating point constant. */ |
252b5132 RH |
102 | /* As in 0f12.456 */ |
103 | /* or 0d1.2345e12 */ | |
104 | const char FLT_CHARS[] = "rRsSfFdDxXpP"; | |
105 | ||
106 | #define C(a,b) ENCODE_RELAX(a,b) | |
107 | ||
108 | #define JREG 14 /* Register used as a temp when relaxing */ | |
109 | #define ENCODE_RELAX(what,length) (((what) << 4) + (length)) | |
110 | #define GET_WHAT(x) ((x>>4)) | |
111 | ||
6b31947e | 112 | /* These are the three types of relaxable instrction. */ |
252b5132 RH |
113 | #define COND_JUMP 1 |
114 | #define COND_JUMP_DELAY 2 | |
115 | #define UNCOND_JUMP 3 | |
116 | #define END 4 | |
117 | ||
118 | #define UNDEF_DISP 0 | |
119 | #define COND8 1 | |
120 | #define COND12 2 | |
121 | #define COND32 3 | |
122 | #define UNCOND12 1 | |
123 | #define UNCOND32 2 | |
124 | #define UNDEF_WORD_DISP 4 | |
125 | ||
126 | #define UNCOND12 1 | |
127 | #define UNCOND32 2 | |
128 | ||
129 | /* Branch displacements are from the address of the branch plus | |
130 | four, thus all minimum and maximum values have 4 added to them. */ | |
131 | #define COND8_F 258 | |
132 | #define COND8_M -252 | |
133 | #define COND8_LENGTH 2 | |
134 | ||
135 | /* There is one extra instruction before the branch, so we must add | |
136 | two more bytes to account for it. */ | |
137 | #define COND12_F 4100 | |
138 | #define COND12_M -4090 | |
139 | #define COND12_LENGTH 6 | |
140 | ||
141 | #define COND12_DELAY_LENGTH 4 | |
142 | ||
143 | /* ??? The minimum and maximum values are wrong, but this does not matter | |
144 | since this relocation type is not supported yet. */ | |
145 | #define COND32_F (1<<30) | |
146 | #define COND32_M -(1<<30) | |
147 | #define COND32_LENGTH 14 | |
148 | ||
149 | #define UNCOND12_F 4098 | |
150 | #define UNCOND12_M -4092 | |
151 | #define UNCOND12_LENGTH 2 | |
152 | ||
153 | /* ??? The minimum and maximum values are wrong, but this does not matter | |
154 | since this relocation type is not supported yet. */ | |
155 | #define UNCOND32_F (1<<30) | |
156 | #define UNCOND32_M -(1<<30) | |
157 | #define UNCOND32_LENGTH 14 | |
158 | ||
43841e91 NC |
159 | #define EMPTY { 0, 0, 0, 0 } |
160 | ||
252b5132 | 161 | const relax_typeS md_relax_table[C (END, 0)] = { |
43841e91 NC |
162 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
163 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
252b5132 | 164 | |
43841e91 | 165 | EMPTY, |
252b5132 RH |
166 | /* C (COND_JUMP, COND8) */ |
167 | { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP, COND12) }, | |
168 | /* C (COND_JUMP, COND12) */ | |
169 | { COND12_F, COND12_M, COND12_LENGTH, C (COND_JUMP, COND32), }, | |
170 | /* C (COND_JUMP, COND32) */ | |
171 | { COND32_F, COND32_M, COND32_LENGTH, 0, }, | |
43841e91 NC |
172 | EMPTY, EMPTY, EMPTY, EMPTY, |
173 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
252b5132 | 174 | |
43841e91 | 175 | EMPTY, |
252b5132 RH |
176 | /* C (COND_JUMP_DELAY, COND8) */ |
177 | { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP_DELAY, COND12) }, | |
178 | /* C (COND_JUMP_DELAY, COND12) */ | |
179 | { COND12_F, COND12_M, COND12_DELAY_LENGTH, C (COND_JUMP_DELAY, COND32), }, | |
180 | /* C (COND_JUMP_DELAY, COND32) */ | |
181 | { COND32_F, COND32_M, COND32_LENGTH, 0, }, | |
43841e91 NC |
182 | EMPTY, EMPTY, EMPTY, EMPTY, |
183 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
252b5132 | 184 | |
43841e91 | 185 | EMPTY, |
252b5132 RH |
186 | /* C (UNCOND_JUMP, UNCOND12) */ |
187 | { UNCOND12_F, UNCOND12_M, UNCOND12_LENGTH, C (UNCOND_JUMP, UNCOND32), }, | |
188 | /* C (UNCOND_JUMP, UNCOND32) */ | |
189 | { UNCOND32_F, UNCOND32_M, UNCOND32_LENGTH, 0, }, | |
43841e91 NC |
190 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
191 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
252b5132 RH |
192 | }; |
193 | ||
43841e91 NC |
194 | #undef EMPTY |
195 | ||
252b5132 RH |
196 | static struct hash_control *opcode_hash_control; /* Opcode mnemonics */ |
197 | ||
6b31947e NC |
198 | /* This function is called once, at assembler startup time. This should |
199 | set up all the tables, etc that the MD part of the assembler needs. */ | |
252b5132 RH |
200 | |
201 | void | |
202 | md_begin () | |
203 | { | |
204 | sh_opcode_info *opcode; | |
205 | char *prev_name = ""; | |
d4845d57 | 206 | int target_arch; |
252b5132 | 207 | |
056350c6 NC |
208 | #ifdef TE_PE |
209 | /* The WinCE OS only supports little endian executables. */ | |
210 | target_big_endian = 0; | |
211 | #else | |
252b5132 RH |
212 | if (! shl) |
213 | target_big_endian = 1; | |
056350c6 | 214 | #endif |
252b5132 | 215 | |
d4845d57 JR |
216 | target_arch = arch_sh1_up & ~(sh_dsp ? arch_sh3e_up : arch_sh_dsp_up); |
217 | valid_arch = target_arch; | |
218 | ||
252b5132 RH |
219 | opcode_hash_control = hash_new (); |
220 | ||
6b31947e | 221 | /* Insert unique names into hash table. */ |
252b5132 RH |
222 | for (opcode = sh_table; opcode->name; opcode++) |
223 | { | |
a37c8f88 | 224 | if (strcmp (prev_name, opcode->name)) |
252b5132 | 225 | { |
a37c8f88 JR |
226 | if (! (opcode->arch & target_arch)) |
227 | continue; | |
252b5132 RH |
228 | prev_name = opcode->name; |
229 | hash_insert (opcode_hash_control, opcode->name, (char *) opcode); | |
230 | } | |
231 | else | |
232 | { | |
233 | /* Make all the opcodes with the same name point to the same | |
6b31947e | 234 | string. */ |
252b5132 RH |
235 | opcode->name = prev_name; |
236 | } | |
237 | } | |
238 | } | |
239 | ||
240 | static int reg_m; | |
241 | static int reg_n; | |
d4845d57 JR |
242 | static int reg_x, reg_y; |
243 | static int reg_efg; | |
252b5132 RH |
244 | static int reg_b; |
245 | ||
252b5132 RH |
246 | typedef struct |
247 | { | |
248 | sh_arg_type type; | |
249 | int reg; | |
015551fc | 250 | expressionS immediate; |
252b5132 | 251 | } |
252b5132 RH |
252 | sh_operand_info; |
253 | ||
dead1419 JR |
254 | #define IDENT_CHAR(c) (isalnum (c) || (c) == '_') |
255 | ||
6b31947e NC |
256 | /* Try to parse a reg name. Return the number of chars consumed. */ |
257 | ||
252b5132 RH |
258 | static int |
259 | parse_reg (src, mode, reg) | |
260 | char *src; | |
261 | int *mode; | |
262 | int *reg; | |
263 | { | |
dead1419 | 264 | /* We use ! IDENT_CHAR for the next character after the register name, to |
252b5132 | 265 | make sure that we won't accidentally recognize a symbol name such as |
dead1419 | 266 | 'sram' or sr_ram as being a reference to the register 'sr'. */ |
252b5132 RH |
267 | |
268 | if (src[0] == 'r') | |
269 | { | |
d4845d57 JR |
270 | if (src[1] == '1') |
271 | { | |
272 | if (src[2] >= '0' && src[2] <= '5' | |
dead1419 | 273 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
274 | { |
275 | *mode = A_REG_N; | |
276 | *reg = 10 + src[2] - '0'; | |
277 | return 3; | |
278 | } | |
279 | } | |
280 | if (src[1] >= '0' && src[1] <= '9' | |
dead1419 | 281 | && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
282 | { |
283 | *mode = A_REG_N; | |
284 | *reg = (src[1] - '0'); | |
285 | return 2; | |
286 | } | |
dead1419 JR |
287 | if (src[1] >= '0' && src[1] <= '7' && strncmp (&src[2], "_bank", 5) == 0 |
288 | && ! IDENT_CHAR ((unsigned char) src[7])) | |
289 | { | |
290 | *mode = A_REG_B; | |
291 | *reg = (src[1] - '0'); | |
292 | return 7; | |
293 | } | |
d4845d57 | 294 | |
dead1419 | 295 | if (src[1] == 'e' && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
296 | { |
297 | *mode = A_RE; | |
298 | return 2; | |
299 | } | |
dead1419 | 300 | if (src[1] == 's' && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
301 | { |
302 | *mode = A_RS; | |
303 | return 2; | |
304 | } | |
252b5132 RH |
305 | } |
306 | ||
d4845d57 | 307 | if (src[0] == 'a') |
252b5132 | 308 | { |
d4845d57 JR |
309 | if (src[1] == '0') |
310 | { | |
dead1419 | 311 | if (! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
312 | { |
313 | *mode = DSP_REG_N; | |
314 | *reg = A_A0_NUM; | |
315 | return 2; | |
316 | } | |
dead1419 | 317 | if (src[2] == 'g' && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
318 | { |
319 | *mode = DSP_REG_N; | |
320 | *reg = A_A0G_NUM; | |
321 | return 3; | |
322 | } | |
323 | } | |
252b5132 RH |
324 | if (src[1] == '1') |
325 | { | |
dead1419 | 326 | if (! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 | 327 | { |
d4845d57 JR |
328 | *mode = DSP_REG_N; |
329 | *reg = A_A1_NUM; | |
330 | return 2; | |
331 | } | |
dead1419 | 332 | if (src[2] == 'g' && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
333 | { |
334 | *mode = DSP_REG_N; | |
335 | *reg = A_A1G_NUM; | |
252b5132 RH |
336 | return 3; |
337 | } | |
338 | } | |
d4845d57 JR |
339 | |
340 | if (src[1] == 'x' && src[2] >= '0' && src[2] <= '1' | |
dead1419 | 341 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
342 | { |
343 | *mode = A_REG_N; | |
d4845d57 JR |
344 | *reg = 4 + (src[1] - '0'); |
345 | return 3; | |
346 | } | |
347 | if (src[1] == 'y' && src[2] >= '0' && src[2] <= '1' | |
dead1419 | 348 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
349 | { |
350 | *mode = A_REG_N; | |
351 | *reg = 6 + (src[1] - '0'); | |
352 | return 3; | |
353 | } | |
354 | if (src[1] == 's' && src[2] >= '0' && src[2] <= '3' | |
dead1419 | 355 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
356 | { |
357 | int n = src[1] - '0'; | |
358 | ||
359 | *mode = A_REG_N; | |
360 | *reg = n | ((~n & 2) << 1); | |
361 | return 3; | |
362 | } | |
363 | } | |
364 | ||
dead1419 | 365 | if (src[0] == 'i' && src[1] && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
366 | { |
367 | if (src[1] == 's') | |
368 | { | |
369 | *mode = A_REG_N; | |
370 | *reg = 8; | |
252b5132 RH |
371 | return 2; |
372 | } | |
d4845d57 JR |
373 | if (src[1] == 'x') |
374 | { | |
375 | *mode = A_REG_N; | |
376 | *reg = 8; | |
377 | return 2; | |
378 | } | |
379 | if (src[1] == 'y') | |
380 | { | |
381 | *mode = A_REG_N; | |
382 | *reg = 9; | |
383 | return 2; | |
384 | } | |
385 | } | |
386 | ||
387 | if (src[0] == 'x' && src[1] >= '0' && src[1] <= '1' | |
dead1419 | 388 | && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
389 | { |
390 | *mode = DSP_REG_N; | |
391 | *reg = A_X0_NUM + src[1] - '0'; | |
392 | return 2; | |
393 | } | |
394 | ||
395 | if (src[0] == 'y' && src[1] >= '0' && src[1] <= '1' | |
dead1419 | 396 | && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
397 | { |
398 | *mode = DSP_REG_N; | |
399 | *reg = A_Y0_NUM + src[1] - '0'; | |
400 | return 2; | |
401 | } | |
402 | ||
403 | if (src[0] == 'm' && src[1] >= '0' && src[1] <= '1' | |
dead1419 | 404 | && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
405 | { |
406 | *mode = DSP_REG_N; | |
407 | *reg = src[1] == '0' ? A_M0_NUM : A_M1_NUM; | |
408 | return 2; | |
252b5132 RH |
409 | } |
410 | ||
411 | if (src[0] == 's' | |
412 | && src[1] == 's' | |
dead1419 | 413 | && src[2] == 'r' && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
414 | { |
415 | *mode = A_SSR; | |
416 | return 3; | |
417 | } | |
418 | ||
419 | if (src[0] == 's' && src[1] == 'p' && src[2] == 'c' | |
dead1419 | 420 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
421 | { |
422 | *mode = A_SPC; | |
423 | return 3; | |
424 | } | |
425 | ||
426 | if (src[0] == 's' && src[1] == 'g' && src[2] == 'r' | |
dead1419 | 427 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
428 | { |
429 | *mode = A_SGR; | |
430 | return 3; | |
431 | } | |
432 | ||
d4845d57 | 433 | if (src[0] == 'd' && src[1] == 's' && src[2] == 'r' |
dead1419 | 434 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
435 | { |
436 | *mode = A_DSR; | |
437 | return 3; | |
438 | } | |
439 | ||
252b5132 | 440 | if (src[0] == 'd' && src[1] == 'b' && src[2] == 'r' |
dead1419 | 441 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
442 | { |
443 | *mode = A_DBR; | |
444 | return 3; | |
445 | } | |
446 | ||
dead1419 | 447 | if (src[0] == 's' && src[1] == 'r' && ! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 RH |
448 | { |
449 | *mode = A_SR; | |
450 | return 2; | |
451 | } | |
452 | ||
dead1419 | 453 | if (src[0] == 's' && src[1] == 'p' && ! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 RH |
454 | { |
455 | *mode = A_REG_N; | |
456 | *reg = 15; | |
457 | return 2; | |
458 | } | |
459 | ||
dead1419 | 460 | if (src[0] == 'p' && src[1] == 'r' && ! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 RH |
461 | { |
462 | *mode = A_PR; | |
463 | return 2; | |
464 | } | |
dead1419 | 465 | if (src[0] == 'p' && src[1] == 'c' && ! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 | 466 | { |
015551fc JR |
467 | /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0' |
468 | and use an uninitialized immediate. */ | |
469 | *mode = A_PC; | |
252b5132 RH |
470 | return 2; |
471 | } | |
472 | if (src[0] == 'g' && src[1] == 'b' && src[2] == 'r' | |
dead1419 | 473 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
474 | { |
475 | *mode = A_GBR; | |
476 | return 3; | |
477 | } | |
478 | if (src[0] == 'v' && src[1] == 'b' && src[2] == 'r' | |
dead1419 | 479 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
480 | { |
481 | *mode = A_VBR; | |
482 | return 3; | |
483 | } | |
484 | ||
485 | if (src[0] == 'm' && src[1] == 'a' && src[2] == 'c' | |
dead1419 | 486 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
487 | { |
488 | if (src[3] == 'l') | |
489 | { | |
490 | *mode = A_MACL; | |
491 | return 4; | |
492 | } | |
493 | if (src[3] == 'h') | |
494 | { | |
495 | *mode = A_MACH; | |
496 | return 4; | |
497 | } | |
498 | } | |
d4845d57 | 499 | if (src[0] == 'm' && src[1] == 'o' && src[2] == 'd' |
dead1419 | 500 | && ! IDENT_CHAR ((unsigned char) src[4])) |
d4845d57 JR |
501 | { |
502 | *mode = A_MOD; | |
503 | return 3; | |
504 | } | |
252b5132 RH |
505 | if (src[0] == 'f' && src[1] == 'r') |
506 | { | |
507 | if (src[2] == '1') | |
508 | { | |
509 | if (src[3] >= '0' && src[3] <= '5' | |
dead1419 | 510 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
511 | { |
512 | *mode = F_REG_N; | |
513 | *reg = 10 + src[3] - '0'; | |
514 | return 4; | |
515 | } | |
516 | } | |
517 | if (src[2] >= '0' && src[2] <= '9' | |
dead1419 | 518 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
519 | { |
520 | *mode = F_REG_N; | |
521 | *reg = (src[2] - '0'); | |
522 | return 3; | |
523 | } | |
524 | } | |
525 | if (src[0] == 'd' && src[1] == 'r') | |
526 | { | |
527 | if (src[2] == '1') | |
528 | { | |
529 | if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1) | |
dead1419 | 530 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
531 | { |
532 | *mode = D_REG_N; | |
533 | *reg = 10 + src[3] - '0'; | |
534 | return 4; | |
535 | } | |
536 | } | |
537 | if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1) | |
dead1419 | 538 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
539 | { |
540 | *mode = D_REG_N; | |
541 | *reg = (src[2] - '0'); | |
542 | return 3; | |
543 | } | |
544 | } | |
545 | if (src[0] == 'x' && src[1] == 'd') | |
546 | { | |
547 | if (src[2] == '1') | |
548 | { | |
549 | if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1) | |
dead1419 | 550 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
551 | { |
552 | *mode = X_REG_N; | |
553 | *reg = 11 + src[3] - '0'; | |
554 | return 4; | |
555 | } | |
556 | } | |
557 | if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1) | |
dead1419 | 558 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
559 | { |
560 | *mode = X_REG_N; | |
561 | *reg = (src[2] - '0') + 1; | |
562 | return 3; | |
563 | } | |
564 | } | |
565 | if (src[0] == 'f' && src[1] == 'v') | |
566 | { | |
dead1419 | 567 | if (src[2] == '1'&& src[3] == '2' && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
568 | { |
569 | *mode = V_REG_N; | |
570 | *reg = 12; | |
571 | return 4; | |
572 | } | |
573 | if ((src[2] == '0' || src[2] == '4' || src[2] == '8') | |
dead1419 | 574 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
575 | { |
576 | *mode = V_REG_N; | |
577 | *reg = (src[2] - '0'); | |
578 | return 3; | |
579 | } | |
580 | } | |
581 | if (src[0] == 'f' && src[1] == 'p' && src[2] == 'u' && src[3] == 'l' | |
dead1419 | 582 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
583 | { |
584 | *mode = FPUL_N; | |
585 | return 4; | |
586 | } | |
587 | ||
588 | if (src[0] == 'f' && src[1] == 'p' && src[2] == 's' && src[3] == 'c' | |
dead1419 | 589 | && src[4] == 'r' && ! IDENT_CHAR ((unsigned char) src[5])) |
252b5132 RH |
590 | { |
591 | *mode = FPSCR_N; | |
592 | return 5; | |
593 | } | |
594 | ||
595 | if (src[0] == 'x' && src[1] == 'm' && src[2] == 't' && src[3] == 'r' | |
dead1419 | 596 | && src[4] == 'x' && ! IDENT_CHAR ((unsigned char) src[5])) |
252b5132 RH |
597 | { |
598 | *mode = XMTRX_M4; | |
599 | return 5; | |
600 | } | |
601 | ||
602 | return 0; | |
603 | } | |
604 | ||
605 | static symbolS *dot() | |
606 | { | |
607 | const char *fake; | |
608 | ||
609 | /* JF: '.' is pseudo symbol with value of current location | |
610 | in current segment. */ | |
611 | fake = FAKE_LABEL_NAME; | |
612 | return symbol_new (fake, | |
613 | now_seg, | |
614 | (valueT) frag_now_fix (), | |
615 | frag_now); | |
616 | ||
617 | } | |
618 | ||
619 | ||
620 | static | |
621 | char * | |
015551fc | 622 | parse_exp (s, op) |
252b5132 | 623 | char *s; |
015551fc | 624 | sh_operand_info *op; |
252b5132 RH |
625 | { |
626 | char *save; | |
627 | char *new; | |
628 | ||
629 | save = input_line_pointer; | |
630 | input_line_pointer = s; | |
015551fc JR |
631 | expression (&op->immediate); |
632 | if (op->immediate.X_op == O_absent) | |
252b5132 RH |
633 | as_bad (_("missing operand")); |
634 | new = input_line_pointer; | |
635 | input_line_pointer = save; | |
636 | return new; | |
637 | } | |
638 | ||
639 | ||
640 | /* The many forms of operand: | |
641 | ||
642 | Rn Register direct | |
643 | @Rn Register indirect | |
644 | @Rn+ Autoincrement | |
645 | @-Rn Autodecrement | |
646 | @(disp:4,Rn) | |
647 | @(disp:8,GBR) | |
648 | @(disp:8,PC) | |
649 | ||
650 | @(R0,Rn) | |
651 | @(R0,GBR) | |
652 | ||
653 | disp:8 | |
654 | disp:12 | |
655 | #imm8 | |
656 | pr, gbr, vbr, macl, mach | |
657 | ||
658 | */ | |
659 | ||
660 | static | |
661 | char * | |
662 | parse_at (src, op) | |
663 | char *src; | |
664 | sh_operand_info *op; | |
665 | { | |
666 | int len; | |
667 | int mode; | |
668 | src++; | |
669 | if (src[0] == '-') | |
670 | { | |
6b31947e | 671 | /* Must be predecrement. */ |
252b5132 RH |
672 | src++; |
673 | ||
674 | len = parse_reg (src, &mode, &(op->reg)); | |
675 | if (mode != A_REG_N) | |
676 | as_bad (_("illegal register after @-")); | |
677 | ||
678 | op->type = A_DEC_N; | |
679 | src += len; | |
680 | } | |
681 | else if (src[0] == '(') | |
682 | { | |
683 | /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or | |
684 | @(r0, rn) */ | |
685 | src++; | |
686 | len = parse_reg (src, &mode, &(op->reg)); | |
687 | if (len && mode == A_REG_N) | |
688 | { | |
689 | src += len; | |
690 | if (op->reg != 0) | |
691 | { | |
692 | as_bad (_("must be @(r0,...)")); | |
693 | } | |
694 | if (src[0] == ',') | |
695 | src++; | |
696 | /* Now can be rn or gbr */ | |
697 | len = parse_reg (src, &mode, &(op->reg)); | |
698 | if (mode == A_GBR) | |
699 | { | |
700 | op->type = A_R0_GBR; | |
701 | } | |
702 | else if (mode == A_REG_N) | |
703 | { | |
704 | op->type = A_IND_R0_REG_N; | |
705 | } | |
706 | else | |
707 | { | |
708 | as_bad (_("syntax error in @(r0,...)")); | |
709 | } | |
710 | } | |
711 | else | |
712 | { | |
713 | /* Must be an @(disp,.. thing) */ | |
015551fc | 714 | src = parse_exp (src, op); |
252b5132 RH |
715 | if (src[0] == ',') |
716 | src++; | |
717 | /* Now can be rn, gbr or pc */ | |
718 | len = parse_reg (src, &mode, &op->reg); | |
719 | if (len) | |
720 | { | |
721 | if (mode == A_REG_N) | |
722 | { | |
723 | op->type = A_DISP_REG_N; | |
724 | } | |
725 | else if (mode == A_GBR) | |
726 | { | |
727 | op->type = A_DISP_GBR; | |
728 | } | |
015551fc | 729 | else if (mode == A_PC) |
252b5132 RH |
730 | { |
731 | /* Turn a plain @(4,pc) into @(.+4,pc) */ | |
015551fc JR |
732 | if (op->immediate.X_op == O_constant) { |
733 | op->immediate.X_add_symbol = dot(); | |
734 | op->immediate.X_op = O_symbol; | |
252b5132 RH |
735 | } |
736 | op->type = A_DISP_PC; | |
737 | } | |
738 | else | |
739 | { | |
740 | as_bad (_("syntax error in @(disp,[Rn, gbr, pc])")); | |
741 | } | |
742 | } | |
743 | else | |
744 | { | |
745 | as_bad (_("syntax error in @(disp,[Rn, gbr, pc])")); | |
746 | } | |
747 | } | |
748 | src += len; | |
749 | if (src[0] != ')') | |
750 | as_bad (_("expecting )")); | |
751 | else | |
752 | src++; | |
753 | } | |
754 | else | |
755 | { | |
756 | src += parse_reg (src, &mode, &(op->reg)); | |
757 | if (mode != A_REG_N) | |
758 | { | |
759 | as_bad (_("illegal register after @")); | |
760 | } | |
761 | if (src[0] == '+') | |
762 | { | |
252b5132 | 763 | src++; |
d4845d57 JR |
764 | if ((src[0] == 'r' && src[1] == '8') |
765 | || (src[0] == 'i' && (src[1] == 'x' || src[1] == 's'))) | |
766 | { | |
767 | src += 2; | |
768 | op->type = A_PMOD_N; | |
769 | } | |
770 | if ((src[0] == 'r' && src[1] == '9') | |
771 | || (src[0] == 'i' && src[1] == 'y')) | |
772 | { | |
773 | src += 2; | |
774 | op->type = A_PMODY_N; | |
775 | } | |
776 | else | |
777 | op->type = A_INC_N; | |
252b5132 RH |
778 | } |
779 | else | |
780 | { | |
781 | op->type = A_IND_N; | |
782 | } | |
783 | } | |
784 | return src; | |
785 | } | |
786 | ||
787 | static void | |
788 | get_operand (ptr, op) | |
789 | char **ptr; | |
790 | sh_operand_info *op; | |
791 | { | |
792 | char *src = *ptr; | |
793 | int mode = -1; | |
794 | unsigned int len; | |
795 | ||
796 | if (src[0] == '#') | |
797 | { | |
798 | src++; | |
015551fc | 799 | *ptr = parse_exp (src, op); |
252b5132 RH |
800 | op->type = A_IMM; |
801 | return; | |
802 | } | |
803 | ||
804 | else if (src[0] == '@') | |
805 | { | |
806 | *ptr = parse_at (src, op); | |
807 | return; | |
808 | } | |
809 | len = parse_reg (src, &mode, &(op->reg)); | |
810 | if (len) | |
811 | { | |
812 | *ptr = src + len; | |
813 | op->type = mode; | |
814 | return; | |
815 | } | |
816 | else | |
817 | { | |
6b31947e | 818 | /* Not a reg, the only thing left is a displacement. */ |
015551fc | 819 | *ptr = parse_exp (src, op); |
252b5132 RH |
820 | op->type = A_DISP_PC; |
821 | return; | |
822 | } | |
823 | } | |
824 | ||
825 | static | |
826 | char * | |
827 | get_operands (info, args, operand) | |
828 | sh_opcode_info *info; | |
829 | char *args; | |
830 | sh_operand_info *operand; | |
252b5132 RH |
831 | { |
832 | char *ptr = args; | |
833 | if (info->arg[0]) | |
834 | { | |
d4845d57 JR |
835 | /* The pre-processor will eliminate whitespace in front of '@' |
836 | after the first argument; we may be called multiple times | |
837 | from assemble_ppi, so don't insist on finding whitespace here. */ | |
838 | if (*ptr == ' ') | |
839 | ptr++; | |
252b5132 RH |
840 | |
841 | get_operand (&ptr, operand + 0); | |
842 | if (info->arg[1]) | |
843 | { | |
844 | if (*ptr == ',') | |
845 | { | |
846 | ptr++; | |
847 | } | |
848 | get_operand (&ptr, operand + 1); | |
52ccafd0 JR |
849 | /* ??? Hack: psha/pshl have a varying operand number depending on |
850 | the type of the first operand. We handle this by having the | |
851 | three-operand version first and reducing the number of operands | |
852 | parsed to two if we see that the first operand is an immediate. | |
853 | This works because no insn with three operands has an immediate | |
854 | as first operand. */ | |
855 | if (info->arg[2] && operand[0].type != A_IMM) | |
252b5132 RH |
856 | { |
857 | if (*ptr == ',') | |
858 | { | |
859 | ptr++; | |
860 | } | |
861 | get_operand (&ptr, operand + 2); | |
862 | } | |
863 | else | |
864 | { | |
865 | operand[2].type = 0; | |
866 | } | |
867 | } | |
868 | else | |
869 | { | |
870 | operand[1].type = 0; | |
871 | operand[2].type = 0; | |
872 | } | |
873 | } | |
874 | else | |
875 | { | |
876 | operand[0].type = 0; | |
877 | operand[1].type = 0; | |
878 | operand[2].type = 0; | |
879 | } | |
880 | return ptr; | |
881 | } | |
882 | ||
883 | /* Passed a pointer to a list of opcodes which use different | |
884 | addressing modes, return the opcode which matches the opcodes | |
6b31947e | 885 | provided. */ |
252b5132 RH |
886 | |
887 | static | |
888 | sh_opcode_info * | |
889 | get_specific (opcode, operands) | |
890 | sh_opcode_info *opcode; | |
891 | sh_operand_info *operands; | |
892 | { | |
893 | sh_opcode_info *this_try = opcode; | |
894 | char *name = opcode->name; | |
895 | int n = 0; | |
896 | while (opcode->name) | |
897 | { | |
898 | this_try = opcode++; | |
899 | if (this_try->name != name) | |
900 | { | |
901 | /* We've looked so far down the table that we've run out of | |
6b31947e | 902 | opcodes with the same name. */ |
252b5132 RH |
903 | return 0; |
904 | } | |
6b31947e NC |
905 | |
906 | /* Look at both operands needed by the opcodes and provided by | |
252b5132 RH |
907 | the user - since an arg test will often fail on the same arg |
908 | again and again, we'll try and test the last failing arg the | |
6b31947e | 909 | first on each opcode try. */ |
252b5132 RH |
910 | for (n = 0; this_try->arg[n]; n++) |
911 | { | |
912 | sh_operand_info *user = operands + n; | |
913 | sh_arg_type arg = this_try->arg[n]; | |
6b31947e | 914 | |
252b5132 RH |
915 | switch (arg) |
916 | { | |
917 | case A_IMM: | |
918 | case A_BDISP12: | |
919 | case A_BDISP8: | |
920 | case A_DISP_GBR: | |
921 | case A_DISP_PC: | |
922 | case A_MACH: | |
923 | case A_PR: | |
924 | case A_MACL: | |
925 | if (user->type != arg) | |
926 | goto fail; | |
927 | break; | |
928 | case A_R0: | |
929 | /* opcode needs r0 */ | |
930 | if (user->type != A_REG_N || user->reg != 0) | |
931 | goto fail; | |
932 | break; | |
933 | case A_R0_GBR: | |
934 | if (user->type != A_R0_GBR || user->reg != 0) | |
935 | goto fail; | |
936 | break; | |
937 | case F_FR0: | |
938 | if (user->type != F_REG_N || user->reg != 0) | |
939 | goto fail; | |
940 | break; | |
941 | ||
942 | case A_REG_N: | |
943 | case A_INC_N: | |
944 | case A_DEC_N: | |
945 | case A_IND_N: | |
946 | case A_IND_R0_REG_N: | |
947 | case A_DISP_REG_N: | |
948 | case F_REG_N: | |
949 | case D_REG_N: | |
950 | case X_REG_N: | |
951 | case V_REG_N: | |
952 | case FPUL_N: | |
953 | case FPSCR_N: | |
d4845d57 JR |
954 | case A_PMOD_N: |
955 | case A_PMODY_N: | |
956 | case DSP_REG_N: | |
252b5132 RH |
957 | /* Opcode needs rn */ |
958 | if (user->type != arg) | |
959 | goto fail; | |
960 | reg_n = user->reg; | |
961 | break; | |
252b5132 RH |
962 | case DX_REG_N: |
963 | if (user->type != D_REG_N && user->type != X_REG_N) | |
964 | goto fail; | |
965 | reg_n = user->reg; | |
966 | break; | |
967 | case A_GBR: | |
968 | case A_SR: | |
969 | case A_VBR: | |
d4845d57 JR |
970 | case A_DSR: |
971 | case A_MOD: | |
972 | case A_RE: | |
973 | case A_RS: | |
252b5132 RH |
974 | case A_SSR: |
975 | case A_SPC: | |
976 | case A_SGR: | |
977 | case A_DBR: | |
978 | if (user->type != arg) | |
979 | goto fail; | |
980 | break; | |
981 | ||
982 | case A_REG_B: | |
983 | if (user->type != arg) | |
984 | goto fail; | |
985 | reg_b = user->reg; | |
986 | break; | |
987 | ||
988 | case A_REG_M: | |
989 | case A_INC_M: | |
990 | case A_DEC_M: | |
991 | case A_IND_M: | |
992 | case A_IND_R0_REG_M: | |
993 | case A_DISP_REG_M: | |
d4845d57 | 994 | case DSP_REG_M: |
252b5132 RH |
995 | /* Opcode needs rn */ |
996 | if (user->type != arg - A_REG_M + A_REG_N) | |
997 | goto fail; | |
998 | reg_m = user->reg; | |
999 | break; | |
1000 | ||
d4845d57 JR |
1001 | case DSP_REG_X: |
1002 | if (user->type != DSP_REG_N) | |
1003 | goto fail; | |
1004 | switch (user->reg) | |
1005 | { | |
1006 | case A_X0_NUM: | |
1007 | reg_x = 0; | |
1008 | break; | |
1009 | case A_X1_NUM: | |
1010 | reg_x = 1; | |
1011 | break; | |
1012 | case A_A0_NUM: | |
1013 | reg_x = 2; | |
1014 | break; | |
1015 | case A_A1_NUM: | |
1016 | reg_x = 3; | |
1017 | break; | |
1018 | default: | |
1019 | goto fail; | |
1020 | } | |
1021 | break; | |
1022 | ||
1023 | case DSP_REG_Y: | |
1024 | if (user->type != DSP_REG_N) | |
1025 | goto fail; | |
1026 | switch (user->reg) | |
1027 | { | |
1028 | case A_Y0_NUM: | |
1029 | reg_y = 0; | |
1030 | break; | |
1031 | case A_Y1_NUM: | |
1032 | reg_y = 1; | |
1033 | break; | |
1034 | case A_M0_NUM: | |
1035 | reg_y = 2; | |
1036 | break; | |
1037 | case A_M1_NUM: | |
1038 | reg_y = 3; | |
1039 | break; | |
1040 | default: | |
1041 | goto fail; | |
1042 | } | |
1043 | break; | |
1044 | ||
1045 | case DSP_REG_E: | |
1046 | if (user->type != DSP_REG_N) | |
1047 | goto fail; | |
1048 | switch (user->reg) | |
1049 | { | |
1050 | case A_X0_NUM: | |
1051 | reg_efg = 0 << 10; | |
1052 | break; | |
1053 | case A_X1_NUM: | |
1054 | reg_efg = 1 << 10; | |
1055 | break; | |
1056 | case A_Y0_NUM: | |
1057 | reg_efg = 2 << 10; | |
1058 | break; | |
1059 | case A_A1_NUM: | |
1060 | reg_efg = 3 << 10; | |
1061 | break; | |
1062 | default: | |
1063 | goto fail; | |
1064 | } | |
1065 | break; | |
1066 | ||
1067 | case DSP_REG_F: | |
1068 | if (user->type != DSP_REG_N) | |
1069 | goto fail; | |
1070 | switch (user->reg) | |
1071 | { | |
1072 | case A_Y0_NUM: | |
1073 | reg_efg |= 0 << 8; | |
1074 | break; | |
1075 | case A_Y1_NUM: | |
1076 | reg_efg |= 1 << 8; | |
1077 | break; | |
1078 | case A_X0_NUM: | |
1079 | reg_efg |= 2 << 8; | |
1080 | break; | |
1081 | case A_A1_NUM: | |
1082 | reg_efg |= 3 << 8; | |
1083 | break; | |
1084 | default: | |
1085 | goto fail; | |
1086 | } | |
1087 | break; | |
1088 | ||
1089 | case DSP_REG_G: | |
1090 | if (user->type != DSP_REG_N) | |
1091 | goto fail; | |
1092 | switch (user->reg) | |
1093 | { | |
1094 | case A_M0_NUM: | |
1095 | reg_efg |= 0 << 2; | |
1096 | break; | |
1097 | case A_M1_NUM: | |
1098 | reg_efg |= 1 << 2; | |
1099 | break; | |
1100 | case A_A0_NUM: | |
1101 | reg_efg |= 2 << 2; | |
1102 | break; | |
1103 | case A_A1_NUM: | |
1104 | reg_efg |= 3 << 2; | |
1105 | break; | |
1106 | default: | |
1107 | goto fail; | |
1108 | } | |
1109 | break; | |
1110 | ||
1111 | case A_A0: | |
1112 | if (user->type != DSP_REG_N || user->reg != A_A0_NUM) | |
1113 | goto fail; | |
1114 | break; | |
1115 | case A_X0: | |
1116 | if (user->type != DSP_REG_N || user->reg != A_X0_NUM) | |
1117 | goto fail; | |
1118 | break; | |
1119 | case A_X1: | |
1120 | if (user->type != DSP_REG_N || user->reg != A_X1_NUM) | |
1121 | goto fail; | |
1122 | break; | |
1123 | case A_Y0: | |
1124 | if (user->type != DSP_REG_N || user->reg != A_Y0_NUM) | |
1125 | goto fail; | |
1126 | break; | |
1127 | case A_Y1: | |
1128 | if (user->type != DSP_REG_N || user->reg != A_Y1_NUM) | |
1129 | goto fail; | |
1130 | break; | |
1131 | ||
252b5132 RH |
1132 | case F_REG_M: |
1133 | case D_REG_M: | |
1134 | case X_REG_M: | |
1135 | case V_REG_M: | |
1136 | case FPUL_M: | |
1137 | case FPSCR_M: | |
1138 | /* Opcode needs rn */ | |
1139 | if (user->type != arg - F_REG_M + F_REG_N) | |
1140 | goto fail; | |
1141 | reg_m = user->reg; | |
1142 | break; | |
1143 | case DX_REG_M: | |
1144 | if (user->type != D_REG_N && user->type != X_REG_N) | |
1145 | goto fail; | |
1146 | reg_m = user->reg; | |
1147 | break; | |
1148 | case XMTRX_M4: | |
1149 | if (user->type != XMTRX_M4) | |
1150 | goto fail; | |
1151 | reg_m = 4; | |
1152 | break; | |
1153 | ||
1154 | default: | |
1155 | printf (_("unhandled %d\n"), arg); | |
1156 | goto fail; | |
1157 | } | |
1158 | } | |
a37c8f88 JR |
1159 | if ( !(valid_arch & this_try->arch)) |
1160 | goto fail; | |
d4845d57 | 1161 | valid_arch &= this_try->arch; |
252b5132 RH |
1162 | return this_try; |
1163 | fail:; | |
1164 | } | |
1165 | ||
1166 | return 0; | |
1167 | } | |
1168 | ||
1169 | int | |
1170 | check (operand, low, high) | |
1171 | expressionS *operand; | |
1172 | int low; | |
1173 | int high; | |
1174 | { | |
1175 | if (operand->X_op != O_constant | |
1176 | || operand->X_add_number < low | |
1177 | || operand->X_add_number > high) | |
1178 | { | |
1179 | as_bad (_("operand must be absolute in range %d..%d"), low, high); | |
1180 | } | |
1181 | return operand->X_add_number; | |
1182 | } | |
1183 | ||
1184 | ||
1185 | static void | |
015551fc | 1186 | insert (where, how, pcrel, op) |
252b5132 RH |
1187 | char *where; |
1188 | int how; | |
1189 | int pcrel; | |
015551fc | 1190 | sh_operand_info *op; |
252b5132 RH |
1191 | { |
1192 | fix_new_exp (frag_now, | |
1193 | where - frag_now->fr_literal, | |
1194 | 2, | |
015551fc | 1195 | &op->immediate, |
252b5132 RH |
1196 | pcrel, |
1197 | how); | |
1198 | } | |
1199 | ||
1200 | static void | |
015551fc | 1201 | build_relax (opcode, op) |
252b5132 | 1202 | sh_opcode_info *opcode; |
015551fc | 1203 | sh_operand_info *op; |
252b5132 RH |
1204 | { |
1205 | int high_byte = target_big_endian ? 0 : 1; | |
1206 | char *p; | |
1207 | ||
1208 | if (opcode->arg[0] == A_BDISP8) | |
1209 | { | |
1210 | int what = (opcode->nibbles[1] & 4) ? COND_JUMP_DELAY : COND_JUMP; | |
1211 | p = frag_var (rs_machine_dependent, | |
1212 | md_relax_table[C (what, COND32)].rlx_length, | |
1213 | md_relax_table[C (what, COND8)].rlx_length, | |
1214 | C (what, 0), | |
015551fc JR |
1215 | op->immediate.X_add_symbol, |
1216 | op->immediate.X_add_number, | |
252b5132 RH |
1217 | 0); |
1218 | p[high_byte] = (opcode->nibbles[0] << 4) | (opcode->nibbles[1]); | |
1219 | } | |
1220 | else if (opcode->arg[0] == A_BDISP12) | |
1221 | { | |
1222 | p = frag_var (rs_machine_dependent, | |
1223 | md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length, | |
1224 | md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length, | |
1225 | C (UNCOND_JUMP, 0), | |
015551fc JR |
1226 | op->immediate.X_add_symbol, |
1227 | op->immediate.X_add_number, | |
252b5132 RH |
1228 | 0); |
1229 | p[high_byte] = (opcode->nibbles[0] << 4); | |
1230 | } | |
1231 | ||
1232 | } | |
1233 | ||
6b31947e | 1234 | /* Insert ldrs & ldre with fancy relocations that relaxation can recognize. */ |
015551fc JR |
1235 | static char * |
1236 | insert_loop_bounds (output, operand) | |
1237 | char *output; | |
1238 | sh_operand_info *operand; | |
1239 | { | |
1240 | char *name; | |
1241 | symbolS *end_sym; | |
1242 | ||
1243 | /* Since the low byte of the opcode will be overwritten by the reloc, we | |
1244 | can just stash the high byte into both bytes and ignore endianness. */ | |
1245 | output[0] = 0x8c; | |
1246 | output[1] = 0x8c; | |
1247 | insert (output, BFD_RELOC_SH_LOOP_START, 1, operand); | |
1248 | insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1); | |
1249 | ||
1250 | if (sh_relax) | |
1251 | { | |
1252 | static int count = 0; | |
1253 | ||
1254 | /* If the last loop insn is a two-byte-insn, it is in danger of being | |
1255 | swapped with the insn after it. To prevent this, create a new | |
1256 | symbol - complete with SH_LABEL reloc - after the last loop insn. | |
1257 | If the last loop insn is four bytes long, the symbol will be | |
1258 | right in the middle, but four byte insns are not swapped anyways. */ | |
1259 | /* A REPEAT takes 6 bytes. The SH has a 32 bit address space. | |
1260 | Hence a 9 digit number should be enough to count all REPEATs. */ | |
1261 | name = alloca (11); | |
1262 | sprintf (name, "_R%x", count++ & 0x3fffffff); | |
1263 | end_sym = symbol_new (name, undefined_section, 0, &zero_address_frag); | |
1264 | /* Make this a local symbol. */ | |
1265 | #ifdef OBJ_COFF | |
1266 | SF_SET_LOCAL (end_sym); | |
1267 | #endif /* OBJ_COFF */ | |
1268 | symbol_table_insert (end_sym); | |
1269 | end_sym->sy_value = operand[1].immediate; | |
1270 | end_sym->sy_value.X_add_number += 2; | |
1271 | fix_new (frag_now, frag_now_fix (), 2, end_sym, 0, 1, BFD_RELOC_SH_LABEL); | |
1272 | } | |
1273 | ||
1274 | output = frag_more (2); | |
1275 | output[0] = 0x8e; | |
1276 | output[1] = 0x8e; | |
1277 | insert (output, BFD_RELOC_SH_LOOP_START, 1, operand); | |
1278 | insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1); | |
1279 | ||
1280 | return frag_more (2); | |
1281 | } | |
1282 | ||
1994a7c7 | 1283 | /* Now we know what sort of opcodes it is, lets build the bytes. */ |
6b31947e | 1284 | |
252b5132 RH |
1285 | static void |
1286 | build_Mytes (opcode, operand) | |
1287 | sh_opcode_info *opcode; | |
1288 | sh_operand_info *operand; | |
1289 | ||
1290 | { | |
1291 | int index; | |
1292 | char nbuf[4]; | |
1293 | char *output = frag_more (2); | |
1294 | int low_byte = target_big_endian ? 1 : 0; | |
1295 | nbuf[0] = 0; | |
1296 | nbuf[1] = 0; | |
1297 | nbuf[2] = 0; | |
1298 | nbuf[3] = 0; | |
1299 | ||
1300 | for (index = 0; index < 4; index++) | |
1301 | { | |
1302 | sh_nibble_type i = opcode->nibbles[index]; | |
1303 | if (i < 16) | |
1304 | { | |
1305 | nbuf[index] = i; | |
1306 | } | |
1307 | else | |
1308 | { | |
1309 | switch (i) | |
1310 | { | |
1311 | case REG_N: | |
1312 | nbuf[index] = reg_n; | |
1313 | break; | |
1314 | case REG_M: | |
1315 | nbuf[index] = reg_m; | |
1316 | break; | |
d4845d57 JR |
1317 | case SDT_REG_N: |
1318 | if (reg_n < 2 || reg_n > 5) | |
1319 | as_bad (_("Invalid register: 'r%d'"), reg_n); | |
1320 | nbuf[index] = (reg_n & 3) | 4; | |
1321 | break; | |
252b5132 RH |
1322 | case REG_NM: |
1323 | nbuf[index] = reg_n | (reg_m >> 2); | |
1324 | break; | |
1325 | case REG_B: | |
1326 | nbuf[index] = reg_b | 0x08; | |
1327 | break; | |
015551fc JR |
1328 | case IMM0_4BY4: |
1329 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand); | |
1330 | break; | |
1331 | case IMM0_4BY2: | |
1332 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand); | |
1333 | break; | |
1334 | case IMM0_4: | |
1335 | insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand); | |
1336 | break; | |
1337 | case IMM1_4BY4: | |
1338 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand + 1); | |
1339 | break; | |
1340 | case IMM1_4BY2: | |
1341 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand + 1); | |
252b5132 | 1342 | break; |
015551fc JR |
1343 | case IMM1_4: |
1344 | insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand + 1); | |
252b5132 | 1345 | break; |
015551fc JR |
1346 | case IMM0_8BY4: |
1347 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand); | |
252b5132 | 1348 | break; |
015551fc JR |
1349 | case IMM0_8BY2: |
1350 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand); | |
252b5132 | 1351 | break; |
015551fc JR |
1352 | case IMM0_8: |
1353 | insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand); | |
252b5132 | 1354 | break; |
015551fc JR |
1355 | case IMM1_8BY4: |
1356 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand + 1); | |
252b5132 | 1357 | break; |
015551fc JR |
1358 | case IMM1_8BY2: |
1359 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand + 1); | |
1360 | break; | |
1361 | case IMM1_8: | |
1362 | insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand + 1); | |
252b5132 RH |
1363 | break; |
1364 | case PCRELIMM_8BY4: | |
015551fc | 1365 | insert (output, BFD_RELOC_SH_PCRELIMM8BY4, 1, operand); |
252b5132 RH |
1366 | break; |
1367 | case PCRELIMM_8BY2: | |
015551fc JR |
1368 | insert (output, BFD_RELOC_SH_PCRELIMM8BY2, 1, operand); |
1369 | break; | |
1370 | case REPEAT: | |
1371 | output = insert_loop_bounds (output, operand); | |
1372 | nbuf[index] = opcode->nibbles[3]; | |
1373 | operand += 2; | |
252b5132 RH |
1374 | break; |
1375 | default: | |
1376 | printf (_("failed for %d\n"), i); | |
1377 | } | |
1378 | } | |
1379 | } | |
1380 | if (! target_big_endian) { | |
1381 | output[1] = (nbuf[0] << 4) | (nbuf[1]); | |
1382 | output[0] = (nbuf[2] << 4) | (nbuf[3]); | |
1383 | } | |
1384 | else { | |
1385 | output[0] = (nbuf[0] << 4) | (nbuf[1]); | |
1386 | output[1] = (nbuf[2] << 4) | (nbuf[3]); | |
1387 | } | |
1388 | } | |
1389 | ||
d4845d57 JR |
1390 | /* Find an opcode at the start of *STR_P in the hash table, and set |
1391 | *STR_P to the first character after the last one read. */ | |
252b5132 | 1392 | |
d4845d57 JR |
1393 | static sh_opcode_info * |
1394 | find_cooked_opcode (str_p) | |
1395 | char **str_p; | |
252b5132 | 1396 | { |
d4845d57 | 1397 | char *str = *str_p; |
252b5132 RH |
1398 | unsigned char *op_start; |
1399 | unsigned char *op_end; | |
252b5132 RH |
1400 | char name[20]; |
1401 | int nlen = 0; | |
6b31947e NC |
1402 | |
1403 | /* Drop leading whitespace. */ | |
252b5132 RH |
1404 | while (*str == ' ') |
1405 | str++; | |
1406 | ||
d4845d57 JR |
1407 | /* Find the op code end. |
1408 | The pre-processor will eliminate whitespace in front of | |
1409 | any '@' after the first argument; we may be called from | |
1410 | assemble_ppi, so the opcode might be terminated by an '@'. */ | |
252b5132 RH |
1411 | for (op_start = op_end = (unsigned char *) (str); |
1412 | *op_end | |
1413 | && nlen < 20 | |
d4845d57 | 1414 | && !is_end_of_line[*op_end] && *op_end != ' ' && *op_end != '@'; |
252b5132 RH |
1415 | op_end++) |
1416 | { | |
1417 | unsigned char c = op_start[nlen]; | |
1418 | ||
1419 | /* The machine independent code will convert CMP/EQ into cmp/EQ | |
d4845d57 JR |
1420 | because it thinks the '/' is the end of the symbol. Moreover, |
1421 | all but the first sub-insn is a parallel processing insn won't | |
1422 | be capitailzed. Instead of hacking up the machine independent | |
1423 | code, we just deal with it here. */ | |
252b5132 RH |
1424 | c = isupper (c) ? tolower (c) : c; |
1425 | name[nlen] = c; | |
1426 | nlen++; | |
1427 | } | |
6b31947e | 1428 | |
252b5132 | 1429 | name[nlen] = 0; |
d4845d57 | 1430 | *str_p = op_end; |
252b5132 RH |
1431 | |
1432 | if (nlen == 0) | |
6b31947e | 1433 | as_bad (_("can't find opcode ")); |
252b5132 | 1434 | |
d4845d57 JR |
1435 | return (sh_opcode_info *) hash_find (opcode_hash_control, name); |
1436 | } | |
1437 | ||
1438 | /* Assemble a parallel processing insn. */ | |
1439 | #define DDT_BASE 0xf000 /* Base value for double data transfer insns */ | |
6b31947e | 1440 | |
d4845d57 JR |
1441 | static void |
1442 | assemble_ppi (op_end, opcode) | |
1443 | char *op_end; | |
1444 | sh_opcode_info *opcode; | |
1445 | { | |
1446 | int movx = 0; | |
1447 | int movy = 0; | |
1448 | int cond = 0; | |
1449 | int field_b = 0; | |
1450 | char *output; | |
1451 | int move_code; | |
1452 | ||
1453 | /* Some insn ignore one or more register fields, e.g. psts machl,a0. | |
1454 | Make sure we encode a defined insn pattern. */ | |
1455 | reg_x = 0; | |
1456 | reg_y = 0; | |
1457 | ||
1458 | for (;;) | |
1459 | { | |
1460 | sh_operand_info operand[3]; | |
1461 | ||
1462 | if (opcode->arg[0] != A_END) | |
1463 | op_end = get_operands (opcode, op_end, operand); | |
1464 | opcode = get_specific (opcode, operand); | |
1465 | if (opcode == 0) | |
1466 | { | |
6b31947e | 1467 | /* Couldn't find an opcode which matched the operands. */ |
d4845d57 JR |
1468 | char *where = frag_more (2); |
1469 | ||
1470 | where[0] = 0x0; | |
1471 | where[1] = 0x0; | |
1472 | as_bad (_("invalid operands for opcode")); | |
1473 | return; | |
1474 | } | |
6b31947e | 1475 | |
d4845d57 JR |
1476 | if (opcode->nibbles[0] != PPI) |
1477 | as_bad (_("insn can't be combined with parallel processing insn")); | |
1478 | ||
1479 | switch (opcode->nibbles[1]) | |
1480 | { | |
1481 | ||
1482 | case NOPX: | |
1483 | if (movx) | |
1484 | as_bad (_("multiple movx specifications")); | |
1485 | movx = DDT_BASE; | |
1486 | break; | |
1487 | case NOPY: | |
1488 | if (movy) | |
1489 | as_bad (_("multiple movy specifications")); | |
1490 | movy = DDT_BASE; | |
1491 | break; | |
1492 | ||
1493 | case MOVX: | |
1494 | if (movx) | |
1495 | as_bad (_("multiple movx specifications")); | |
1496 | if (reg_n < 4 || reg_n > 5) | |
1497 | as_bad (_("invalid movx address register")); | |
1498 | if (opcode->nibbles[2] & 8) | |
1499 | { | |
1500 | if (reg_m == A_A1_NUM) | |
1501 | movx = 1 << 7; | |
1502 | else if (reg_m != A_A0_NUM) | |
1503 | as_bad (_("invalid movx dsp register")); | |
1504 | } | |
1505 | else | |
1506 | { | |
1507 | if (reg_x > 1) | |
1508 | as_bad (_("invalid movx dsp register")); | |
1509 | movx = reg_x << 7; | |
1510 | } | |
1511 | movx += ((reg_n - 4) << 9) + (opcode->nibbles[2] << 2) + DDT_BASE; | |
1512 | break; | |
1513 | ||
1514 | case MOVY: | |
1515 | if (movy) | |
1516 | as_bad (_("multiple movy specifications")); | |
1517 | if (opcode->nibbles[2] & 8) | |
1518 | { | |
1519 | /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode, | |
1520 | so add 8 more. */ | |
1521 | movy = 8; | |
1522 | if (reg_m == A_A1_NUM) | |
1523 | movy += 1 << 6; | |
1524 | else if (reg_m != A_A0_NUM) | |
1525 | as_bad (_("invalid movy dsp register")); | |
1526 | } | |
1527 | else | |
1528 | { | |
1529 | if (reg_y > 1) | |
1530 | as_bad (_("invalid movy dsp register")); | |
1531 | movy = reg_y << 6; | |
1532 | } | |
1533 | if (reg_n < 6 || reg_n > 7) | |
1534 | as_bad (_("invalid movy address register")); | |
1535 | movy += ((reg_n - 6) << 8) + opcode->nibbles[2] + DDT_BASE; | |
1536 | break; | |
1537 | ||
1538 | case PSH: | |
015551fc | 1539 | if (operand[0].immediate.X_op != O_constant) |
d4845d57 JR |
1540 | as_bad (_("dsp immediate shift value not constant")); |
1541 | field_b = ((opcode->nibbles[2] << 12) | |
015551fc | 1542 | | (operand[0].immediate.X_add_number & 127) << 4 |
d4845d57 JR |
1543 | | reg_n); |
1544 | break; | |
1545 | case PPI3: | |
1546 | if (field_b) | |
1547 | as_bad (_("multiple parallel processing specifications")); | |
1548 | field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8) | |
1549 | + (reg_x << 6) + (reg_y << 4) + reg_n); | |
1550 | break; | |
1551 | case PDC: | |
1552 | if (cond) | |
1553 | as_bad (_("multiple condition specifications")); | |
1554 | cond = opcode->nibbles[2] << 8; | |
1555 | if (*op_end) | |
1556 | goto skip_cond_check; | |
1557 | break; | |
1558 | case PPIC: | |
1559 | if (field_b) | |
1560 | as_bad (_("multiple parallel processing specifications")); | |
1561 | field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8) | |
1562 | + cond + (reg_x << 6) + (reg_y << 4) + reg_n); | |
1563 | cond = 0; | |
1564 | break; | |
1565 | case PMUL: | |
1566 | if (field_b) | |
1567 | { | |
1568 | if ((field_b & 0xef00) != 0xa100) | |
1569 | as_bad (_("insn cannot be combined with pmuls")); | |
1570 | field_b -= 0x8100; | |
1571 | switch (field_b & 0xf) | |
1572 | { | |
1573 | case A_X0_NUM: | |
1574 | field_b += 0 - A_X0_NUM; | |
1575 | break; | |
1576 | case A_Y0_NUM: | |
1577 | field_b += 1 - A_Y0_NUM; | |
1578 | break; | |
1579 | case A_A0_NUM: | |
1580 | field_b += 2 - A_A0_NUM; | |
1581 | break; | |
1582 | case A_A1_NUM: | |
1583 | field_b += 3 - A_A1_NUM; | |
1584 | break; | |
1585 | default: | |
1586 | as_bad (_("bad padd / psub pmuls output operand")); | |
1587 | } | |
1588 | } | |
1589 | field_b += 0x4000 + reg_efg; | |
1590 | break; | |
1591 | default: | |
1592 | abort (); | |
1593 | } | |
1594 | if (cond) | |
1595 | { | |
1596 | as_bad (_("condition not followed by conditionalizable insn")); | |
1597 | cond = 0; | |
1598 | } | |
1599 | if (! *op_end) | |
1600 | break; | |
1601 | skip_cond_check: | |
1602 | opcode = find_cooked_opcode (&op_end); | |
1603 | if (opcode == NULL) | |
1604 | { | |
1605 | (as_bad | |
1606 | (_("unrecognized characters at end of parallel processing insn"))); | |
1607 | break; | |
1608 | } | |
1609 | } | |
1610 | ||
1611 | move_code = movx | movy; | |
1612 | if (field_b) | |
1613 | { | |
1614 | /* Parallel processing insn. */ | |
1615 | unsigned long ppi_code = (movx | movy | 0xf800) << 16 | field_b; | |
1616 | ||
1617 | output = frag_more (4); | |
1618 | if (! target_big_endian) | |
1619 | { | |
1620 | output[3] = ppi_code >> 8; | |
1621 | output[2] = ppi_code; | |
1622 | } | |
1623 | else | |
1624 | { | |
1625 | output[2] = ppi_code >> 8; | |
1626 | output[3] = ppi_code; | |
1627 | } | |
1628 | move_code |= 0xf800; | |
1629 | } | |
1630 | else | |
1631 | /* Just a double data transfer. */ | |
1632 | output = frag_more (2); | |
1633 | if (! target_big_endian) | |
1634 | { | |
1635 | output[1] = move_code >> 8; | |
1636 | output[0] = move_code; | |
1637 | } | |
1638 | else | |
1639 | { | |
1640 | output[0] = move_code >> 8; | |
1641 | output[1] = move_code; | |
1642 | } | |
1643 | } | |
1644 | ||
1645 | /* This is the guts of the machine-dependent assembler. STR points to a | |
1646 | machine dependent instruction. This function is supposed to emit | |
6b31947e | 1647 | the frags/bytes it assembles to. */ |
d4845d57 JR |
1648 | |
1649 | void | |
1650 | md_assemble (str) | |
1651 | char *str; | |
1652 | { | |
1653 | unsigned char *op_end; | |
1654 | sh_operand_info operand[3]; | |
1655 | sh_opcode_info *opcode; | |
1656 | ||
1657 | opcode = find_cooked_opcode (&str); | |
1658 | op_end = str; | |
252b5132 RH |
1659 | |
1660 | if (opcode == NULL) | |
1661 | { | |
1662 | as_bad (_("unknown opcode")); | |
1663 | return; | |
1664 | } | |
1665 | ||
1666 | if (sh_relax | |
1667 | && ! seg_info (now_seg)->tc_segment_info_data.in_code) | |
1668 | { | |
1669 | /* Output a CODE reloc to tell the linker that the following | |
1670 | bytes are instructions, not data. */ | |
1671 | fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, | |
1672 | BFD_RELOC_SH_CODE); | |
1673 | seg_info (now_seg)->tc_segment_info_data.in_code = 1; | |
1674 | } | |
1675 | ||
d4845d57 JR |
1676 | if (opcode->nibbles[0] == PPI) |
1677 | { | |
1678 | assemble_ppi (op_end, opcode); | |
1679 | return; | |
1680 | } | |
1681 | ||
252b5132 RH |
1682 | if (opcode->arg[0] == A_BDISP12 |
1683 | || opcode->arg[0] == A_BDISP8) | |
1684 | { | |
015551fc JR |
1685 | parse_exp (op_end + 1, &operand[0]); |
1686 | build_relax (opcode, &operand[0]); | |
252b5132 RH |
1687 | } |
1688 | else | |
1689 | { | |
5fc44b2d | 1690 | if (opcode->arg[0] == A_END) |
252b5132 | 1691 | { |
5fc44b2d JR |
1692 | /* Ignore trailing whitespace. If there is any, it has already |
1693 | been compressed to a single space. */ | |
1694 | if (*op_end == ' ') | |
1695 | op_end++; | |
1696 | } | |
1697 | else | |
1698 | { | |
1699 | op_end = get_operands (opcode, op_end, operand); | |
252b5132 RH |
1700 | } |
1701 | opcode = get_specific (opcode, operand); | |
1702 | ||
1703 | if (opcode == 0) | |
1704 | { | |
6b31947e | 1705 | /* Couldn't find an opcode which matched the operands. */ |
252b5132 RH |
1706 | char *where = frag_more (2); |
1707 | ||
1708 | where[0] = 0x0; | |
1709 | where[1] = 0x0; | |
1710 | as_bad (_("invalid operands for opcode")); | |
1711 | return; | |
1712 | } | |
1713 | ||
5fc44b2d JR |
1714 | if (*op_end) |
1715 | as_bad (_("excess operands: '%s'"), op_end); | |
1716 | ||
252b5132 RH |
1717 | build_Mytes (opcode, operand); |
1718 | } | |
1719 | ||
1720 | } | |
1721 | ||
1722 | /* This routine is called each time a label definition is seen. It | |
1723 | emits a BFD_RELOC_SH_LABEL reloc if necessary. */ | |
1724 | ||
1725 | void | |
1726 | sh_frob_label () | |
1727 | { | |
1728 | static fragS *last_label_frag; | |
1729 | static int last_label_offset; | |
1730 | ||
1731 | if (sh_relax | |
1732 | && seg_info (now_seg)->tc_segment_info_data.in_code) | |
1733 | { | |
1734 | int offset; | |
1735 | ||
1736 | offset = frag_now_fix (); | |
1737 | if (frag_now != last_label_frag | |
1738 | || offset != last_label_offset) | |
1739 | { | |
1740 | fix_new (frag_now, offset, 2, &abs_symbol, 0, 0, BFD_RELOC_SH_LABEL); | |
1741 | last_label_frag = frag_now; | |
1742 | last_label_offset = offset; | |
1743 | } | |
1744 | } | |
1745 | } | |
1746 | ||
1747 | /* This routine is called when the assembler is about to output some | |
1748 | data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */ | |
1749 | ||
1750 | void | |
1751 | sh_flush_pending_output () | |
1752 | { | |
1753 | if (sh_relax | |
1754 | && seg_info (now_seg)->tc_segment_info_data.in_code) | |
1755 | { | |
1756 | fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, | |
1757 | BFD_RELOC_SH_DATA); | |
1758 | seg_info (now_seg)->tc_segment_info_data.in_code = 0; | |
1759 | } | |
1760 | } | |
1761 | ||
1762 | symbolS * | |
c0fecd35 AM |
1763 | md_undefined_symbol (name) |
1764 | char *name; | |
252b5132 RH |
1765 | { |
1766 | return 0; | |
1767 | } | |
1768 | ||
1769 | #ifdef OBJ_COFF | |
056350c6 | 1770 | #ifndef BFD_ASSEMBLER |
252b5132 RH |
1771 | |
1772 | void | |
c0fecd35 AM |
1773 | tc_crawl_symbol_chain (headers) |
1774 | object_headers *headers; | |
252b5132 RH |
1775 | { |
1776 | printf (_("call to tc_crawl_symbol_chain \n")); | |
1777 | } | |
1778 | ||
1779 | void | |
c0fecd35 AM |
1780 | tc_headers_hook (headers) |
1781 | object_headers *headers; | |
252b5132 RH |
1782 | { |
1783 | printf (_("call to tc_headers_hook \n")); | |
1784 | } | |
1785 | ||
056350c6 | 1786 | #endif |
252b5132 RH |
1787 | #endif |
1788 | ||
6b31947e NC |
1789 | /* Various routines to kill one day. */ |
1790 | /* Equal to MAX_PRECISION in atof-ieee.c. */ | |
252b5132 RH |
1791 | #define MAX_LITTLENUMS 6 |
1792 | ||
6b31947e NC |
1793 | /* Turn a string in input_line_pointer into a floating point constant |
1794 | of type TYPE, and store the appropriate bytes in *LITP. The number | |
1795 | of LITTLENUMS emitted is stored in *SIZEP . An error message is | |
1796 | returned, or NULL on OK. */ | |
1797 | ||
252b5132 RH |
1798 | char * |
1799 | md_atof (type, litP, sizeP) | |
1800 | int type; | |
1801 | char *litP; | |
1802 | int *sizeP; | |
1803 | { | |
1804 | int prec; | |
1805 | LITTLENUM_TYPE words[4]; | |
1806 | char *t; | |
1807 | int i; | |
1808 | ||
1809 | switch (type) | |
1810 | { | |
1811 | case 'f': | |
1812 | prec = 2; | |
1813 | break; | |
1814 | ||
1815 | case 'd': | |
1816 | prec = 4; | |
1817 | break; | |
1818 | ||
1819 | default: | |
1820 | *sizeP = 0; | |
1821 | return _("bad call to md_atof"); | |
1822 | } | |
1823 | ||
1824 | t = atof_ieee (input_line_pointer, type, words); | |
1825 | if (t) | |
1826 | input_line_pointer = t; | |
1827 | ||
1828 | *sizeP = prec * 2; | |
1829 | ||
1830 | if (! target_big_endian) | |
1831 | { | |
1832 | for (i = prec - 1; i >= 0; i--) | |
1833 | { | |
1834 | md_number_to_chars (litP, (valueT) words[i], 2); | |
1835 | litP += 2; | |
1836 | } | |
1837 | } | |
1838 | else | |
1839 | { | |
1840 | for (i = 0; i < prec; i++) | |
1841 | { | |
1842 | md_number_to_chars (litP, (valueT) words[i], 2); | |
1843 | litP += 2; | |
1844 | } | |
1845 | } | |
1846 | ||
1847 | return NULL; | |
1848 | } | |
1849 | ||
1850 | /* Handle the .uses pseudo-op. This pseudo-op is used just before a | |
1851 | call instruction. It refers to a label of the instruction which | |
1852 | loads the register which the call uses. We use it to generate a | |
1853 | special reloc for the linker. */ | |
1854 | ||
1855 | static void | |
1856 | s_uses (ignore) | |
43841e91 | 1857 | int ignore ATTRIBUTE_UNUSED; |
252b5132 RH |
1858 | { |
1859 | expressionS ex; | |
1860 | ||
1861 | if (! sh_relax) | |
1862 | as_warn (_(".uses pseudo-op seen when not relaxing")); | |
1863 | ||
1864 | expression (&ex); | |
1865 | ||
1866 | if (ex.X_op != O_symbol || ex.X_add_number != 0) | |
1867 | { | |
1868 | as_bad (_("bad .uses format")); | |
1869 | ignore_rest_of_line (); | |
1870 | return; | |
1871 | } | |
1872 | ||
1873 | fix_new_exp (frag_now, frag_now_fix (), 2, &ex, 1, BFD_RELOC_SH_USES); | |
1874 | ||
1875 | demand_empty_rest_of_line (); | |
1876 | } | |
1877 | \f | |
1878 | CONST char *md_shortopts = ""; | |
6b31947e NC |
1879 | struct option md_longopts[] = |
1880 | { | |
252b5132 RH |
1881 | #define OPTION_RELAX (OPTION_MD_BASE) |
1882 | #define OPTION_LITTLE (OPTION_MD_BASE + 1) | |
1883 | #define OPTION_SMALL (OPTION_LITTLE + 1) | |
d4845d57 | 1884 | #define OPTION_DSP (OPTION_SMALL + 1) |
252b5132 RH |
1885 | |
1886 | {"relax", no_argument, NULL, OPTION_RELAX}, | |
1887 | {"little", no_argument, NULL, OPTION_LITTLE}, | |
1888 | {"small", no_argument, NULL, OPTION_SMALL}, | |
d4845d57 | 1889 | {"dsp", no_argument, NULL, OPTION_DSP}, |
252b5132 RH |
1890 | {NULL, no_argument, NULL, 0} |
1891 | }; | |
1892 | size_t md_longopts_size = sizeof(md_longopts); | |
1893 | ||
1894 | int | |
1895 | md_parse_option (c, arg) | |
1896 | int c; | |
43841e91 | 1897 | char *arg ATTRIBUTE_UNUSED; |
252b5132 RH |
1898 | { |
1899 | switch (c) | |
1900 | { | |
1901 | case OPTION_RELAX: | |
1902 | sh_relax = 1; | |
1903 | break; | |
1904 | ||
1905 | case OPTION_LITTLE: | |
1906 | shl = 1; | |
1907 | target_big_endian = 0; | |
1908 | break; | |
1909 | ||
1910 | case OPTION_SMALL: | |
1911 | sh_small = 1; | |
1912 | break; | |
1913 | ||
d4845d57 JR |
1914 | case OPTION_DSP: |
1915 | sh_dsp = 1; | |
1916 | break; | |
1917 | ||
252b5132 RH |
1918 | default: |
1919 | return 0; | |
1920 | } | |
1921 | ||
1922 | return 1; | |
1923 | } | |
1924 | ||
1925 | void | |
1926 | md_show_usage (stream) | |
1927 | FILE *stream; | |
1928 | { | |
1929 | fprintf(stream, _("\ | |
1930 | SH options:\n\ | |
1931 | -little generate little endian code\n\ | |
1932 | -relax alter jump instructions for long displacements\n\ | |
5b8274e3 | 1933 | -small align sections to 4 byte boundaries, not 16\n\ |
182e89d3 | 1934 | -dsp enable sh-dsp insns, and disable sh3e / sh4 insns.\n")); |
252b5132 RH |
1935 | } |
1936 | \f | |
1937 | void | |
1938 | tc_Nout_fix_to_chars () | |
1939 | { | |
1940 | printf (_("call to tc_Nout_fix_to_chars \n")); | |
1941 | abort (); | |
1942 | } | |
1943 | ||
1944 | /* This struct is used to pass arguments to sh_count_relocs through | |
1945 | bfd_map_over_sections. */ | |
1946 | ||
1947 | struct sh_count_relocs | |
1948 | { | |
1949 | /* Symbol we are looking for. */ | |
1950 | symbolS *sym; | |
1951 | /* Count of relocs found. */ | |
1952 | int count; | |
1953 | }; | |
1954 | ||
1955 | /* Count the number of fixups in a section which refer to a particular | |
1956 | symbol. When using BFD_ASSEMBLER, this is called via | |
1957 | bfd_map_over_sections. */ | |
1958 | ||
1959 | /*ARGSUSED*/ | |
1960 | static void | |
1961 | sh_count_relocs (abfd, sec, data) | |
43841e91 | 1962 | bfd *abfd ATTRIBUTE_UNUSED; |
252b5132 RH |
1963 | segT sec; |
1964 | PTR data; | |
1965 | { | |
1966 | struct sh_count_relocs *info = (struct sh_count_relocs *) data; | |
1967 | segment_info_type *seginfo; | |
1968 | symbolS *sym; | |
1969 | fixS *fix; | |
1970 | ||
1971 | seginfo = seg_info (sec); | |
1972 | if (seginfo == NULL) | |
1973 | return; | |
1974 | ||
1975 | sym = info->sym; | |
1976 | for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) | |
1977 | { | |
1978 | if (fix->fx_addsy == sym) | |
1979 | { | |
1980 | ++info->count; | |
1981 | fix->fx_tcbit = 1; | |
1982 | } | |
1983 | } | |
1984 | } | |
1985 | ||
1986 | /* Handle the count relocs for a particular section. When using | |
1987 | BFD_ASSEMBLER, this is called via bfd_map_over_sections. */ | |
1988 | ||
1989 | /*ARGSUSED*/ | |
1990 | static void | |
1991 | sh_frob_section (abfd, sec, ignore) | |
43841e91 | 1992 | bfd *abfd ATTRIBUTE_UNUSED; |
252b5132 | 1993 | segT sec; |
43841e91 | 1994 | PTR ignore ATTRIBUTE_UNUSED; |
252b5132 RH |
1995 | { |
1996 | segment_info_type *seginfo; | |
1997 | fixS *fix; | |
1998 | ||
1999 | seginfo = seg_info (sec); | |
2000 | if (seginfo == NULL) | |
2001 | return; | |
2002 | ||
2003 | for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) | |
2004 | { | |
2005 | symbolS *sym; | |
2006 | bfd_vma val; | |
2007 | fixS *fscan; | |
2008 | struct sh_count_relocs info; | |
2009 | ||
2010 | if (fix->fx_r_type != BFD_RELOC_SH_USES) | |
2011 | continue; | |
2012 | ||
2013 | /* The BFD_RELOC_SH_USES reloc should refer to a defined local | |
2014 | symbol in the same section. */ | |
2015 | sym = fix->fx_addsy; | |
2016 | if (sym == NULL | |
2017 | || fix->fx_subsy != NULL | |
2018 | || fix->fx_addnumber != 0 | |
2019 | || S_GET_SEGMENT (sym) != sec | |
2020 | #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF) | |
2021 | || S_GET_STORAGE_CLASS (sym) == C_EXT | |
2022 | #endif | |
2023 | || S_IS_EXTERNAL (sym)) | |
2024 | { | |
2025 | as_warn_where (fix->fx_file, fix->fx_line, | |
2026 | _(".uses does not refer to a local symbol in the same section")); | |
2027 | continue; | |
2028 | } | |
2029 | ||
2030 | /* Look through the fixups again, this time looking for one | |
2031 | at the same location as sym. */ | |
2032 | val = S_GET_VALUE (sym); | |
2033 | for (fscan = seginfo->fix_root; | |
2034 | fscan != NULL; | |
2035 | fscan = fscan->fx_next) | |
2036 | if (val == fscan->fx_frag->fr_address + fscan->fx_where | |
2037 | && fscan->fx_r_type != BFD_RELOC_SH_ALIGN | |
2038 | && fscan->fx_r_type != BFD_RELOC_SH_CODE | |
2039 | && fscan->fx_r_type != BFD_RELOC_SH_DATA | |
2040 | && fscan->fx_r_type != BFD_RELOC_SH_LABEL) | |
2041 | break; | |
2042 | if (fscan == NULL) | |
2043 | { | |
2044 | as_warn_where (fix->fx_file, fix->fx_line, | |
2045 | _("can't find fixup pointed to by .uses")); | |
2046 | continue; | |
2047 | } | |
2048 | ||
2049 | if (fscan->fx_tcbit) | |
2050 | { | |
2051 | /* We've already done this one. */ | |
2052 | continue; | |
2053 | } | |
2054 | ||
6b31947e NC |
2055 | /* The variable fscan should also be a fixup to a local symbol |
2056 | in the same section. */ | |
252b5132 RH |
2057 | sym = fscan->fx_addsy; |
2058 | if (sym == NULL | |
2059 | || fscan->fx_subsy != NULL | |
2060 | || fscan->fx_addnumber != 0 | |
2061 | || S_GET_SEGMENT (sym) != sec | |
2062 | #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF) | |
2063 | || S_GET_STORAGE_CLASS (sym) == C_EXT | |
2064 | #endif | |
2065 | || S_IS_EXTERNAL (sym)) | |
2066 | { | |
2067 | as_warn_where (fix->fx_file, fix->fx_line, | |
2068 | _(".uses target does not refer to a local symbol in the same section")); | |
2069 | continue; | |
2070 | } | |
2071 | ||
2072 | /* Now we look through all the fixups of all the sections, | |
2073 | counting the number of times we find a reference to sym. */ | |
2074 | info.sym = sym; | |
2075 | info.count = 0; | |
2076 | #ifdef BFD_ASSEMBLER | |
2077 | bfd_map_over_sections (stdoutput, sh_count_relocs, (PTR) &info); | |
2078 | #else | |
2079 | { | |
2080 | int iscan; | |
2081 | ||
2082 | for (iscan = SEG_E0; iscan < SEG_UNKNOWN; iscan++) | |
2083 | sh_count_relocs ((bfd *) NULL, iscan, (PTR) &info); | |
2084 | } | |
2085 | #endif | |
2086 | ||
2087 | if (info.count < 1) | |
2088 | abort (); | |
2089 | ||
2090 | /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym. | |
2091 | We have already adjusted the value of sym to include the | |
2092 | fragment address, so we undo that adjustment here. */ | |
2093 | subseg_change (sec, 0); | |
49309057 ILT |
2094 | fix_new (symbol_get_frag (sym), |
2095 | S_GET_VALUE (sym) - symbol_get_frag (sym)->fr_address, | |
252b5132 RH |
2096 | 4, &abs_symbol, info.count, 0, BFD_RELOC_SH_COUNT); |
2097 | } | |
2098 | } | |
2099 | ||
2100 | /* This function is called after the symbol table has been completed, | |
2101 | but before the relocs or section contents have been written out. | |
2102 | If we have seen any .uses pseudo-ops, they point to an instruction | |
2103 | which loads a register with the address of a function. We look | |
2104 | through the fixups to find where the function address is being | |
2105 | loaded from. We then generate a COUNT reloc giving the number of | |
2106 | times that function address is referred to. The linker uses this | |
2107 | information when doing relaxing, to decide when it can eliminate | |
2108 | the stored function address entirely. */ | |
2109 | ||
2110 | void | |
2111 | sh_frob_file () | |
2112 | { | |
2113 | if (! sh_relax) | |
2114 | return; | |
2115 | ||
2116 | #ifdef BFD_ASSEMBLER | |
2117 | bfd_map_over_sections (stdoutput, sh_frob_section, (PTR) NULL); | |
2118 | #else | |
2119 | { | |
2120 | int iseg; | |
2121 | ||
2122 | for (iseg = SEG_E0; iseg < SEG_UNKNOWN; iseg++) | |
2123 | sh_frob_section ((bfd *) NULL, iseg, (PTR) NULL); | |
2124 | } | |
2125 | #endif | |
2126 | } | |
2127 | ||
2128 | /* Called after relaxing. Set the correct sizes of the fragments, and | |
2129 | create relocs so that md_apply_fix will fill in the correct values. */ | |
2130 | ||
2131 | void | |
2132 | md_convert_frag (headers, seg, fragP) | |
2133 | #ifdef BFD_ASSEMBLER | |
43841e91 | 2134 | bfd *headers ATTRIBUTE_UNUSED; |
252b5132 RH |
2135 | #else |
2136 | object_headers *headers; | |
2137 | #endif | |
2138 | segT seg; | |
2139 | fragS *fragP; | |
2140 | { | |
2141 | int donerelax = 0; | |
2142 | ||
2143 | switch (fragP->fr_subtype) | |
2144 | { | |
2145 | case C (COND_JUMP, COND8): | |
2146 | case C (COND_JUMP_DELAY, COND8): | |
2147 | subseg_change (seg, 0); | |
2148 | fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset, | |
2149 | 1, BFD_RELOC_SH_PCDISP8BY2); | |
2150 | fragP->fr_fix += 2; | |
2151 | fragP->fr_var = 0; | |
2152 | break; | |
2153 | ||
2154 | case C (UNCOND_JUMP, UNCOND12): | |
2155 | subseg_change (seg, 0); | |
2156 | fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset, | |
2157 | 1, BFD_RELOC_SH_PCDISP12BY2); | |
2158 | fragP->fr_fix += 2; | |
2159 | fragP->fr_var = 0; | |
2160 | break; | |
2161 | ||
2162 | case C (UNCOND_JUMP, UNCOND32): | |
2163 | case C (UNCOND_JUMP, UNDEF_WORD_DISP): | |
2164 | if (fragP->fr_symbol == NULL) | |
2165 | as_bad (_("at 0x%lx, displacement overflows 12-bit field"), | |
2166 | (unsigned long) fragP->fr_address); | |
2167 | else if (S_IS_DEFINED (fragP->fr_symbol)) | |
2168 | as_bad (_("at 0x%lx, displacement to defined symbol %s overflows 12-bit field"), | |
2169 | (unsigned long) fragP->fr_address, | |
2170 | S_GET_NAME (fragP->fr_symbol)); | |
2171 | else | |
2172 | as_bad (_("at 0x%lx, displacement to undefined symbol %s overflows 12-bit field"), | |
2173 | (unsigned long) fragP->fr_address, | |
2174 | S_GET_NAME (fragP->fr_symbol)); | |
2175 | ||
6b31947e NC |
2176 | #if 0 /* This code works, but generates poor code and the compiler |
2177 | should never produce a sequence that requires it to be used. */ | |
252b5132 RH |
2178 | |
2179 | /* A jump wont fit in 12 bits, make code which looks like | |
2180 | bra foo | |
2181 | mov.w @(0, PC), r14 | |
2182 | .long disp | |
2183 | foo: bra @r14 | |
2184 | */ | |
2185 | int t = buffer[0] & 0x10; | |
2186 | ||
2187 | buffer[highbyte] = 0xa0; /* branch over move and disp */ | |
2188 | buffer[lowbyte] = 3; | |
2189 | buffer[highbyte+2] = 0xd0 | JREG; /* Build mov insn */ | |
2190 | buffer[lowbyte+2] = 0x00; | |
2191 | ||
2192 | buffer[highbyte+4] = 0; /* space for 32 bit jump disp */ | |
2193 | buffer[lowbyte+4] = 0; | |
2194 | buffer[highbyte+6] = 0; | |
2195 | buffer[lowbyte+6] = 0; | |
2196 | ||
2197 | buffer[highbyte+8] = 0x40 | JREG; /* Build jmp @JREG */ | |
2198 | buffer[lowbyte+8] = t ? 0xb : 0x2b; | |
2199 | ||
2200 | buffer[highbyte+10] = 0x20; /* build nop */ | |
2201 | buffer[lowbyte+10] = 0x0b; | |
2202 | ||
6b31947e | 2203 | /* Make reloc for the long disp. */ |
252b5132 RH |
2204 | fix_new (fragP, |
2205 | fragP->fr_fix + 4, | |
2206 | 4, | |
2207 | fragP->fr_symbol, | |
2208 | fragP->fr_offset, | |
2209 | 0, | |
2210 | BFD_RELOC_32); | |
2211 | fragP->fr_fix += UNCOND32_LENGTH; | |
2212 | fragP->fr_var = 0; | |
2213 | donerelax = 1; | |
2214 | #endif | |
2215 | ||
2216 | break; | |
2217 | ||
2218 | case C (COND_JUMP, COND12): | |
2219 | case C (COND_JUMP_DELAY, COND12): | |
6b31947e | 2220 | /* A bcond won't fit, so turn it into a b!cond; bra disp; nop. */ |
252b5132 RH |
2221 | /* I found that a relax failure for gcc.c-torture/execute/930628-1.c |
2222 | was due to gas incorrectly relaxing an out-of-range conditional | |
2223 | branch with delay slot. It turned: | |
2224 | bf.s L6 (slot mov.l r12,@(44,r0)) | |
2225 | into: | |
2226 | ||
2227 | 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6) | |
2228 | 30: 00 09 nop | |
2229 | 32: 10 cb mov.l r12,@(44,r0) | |
2230 | Therefore, branches with delay slots have to be handled | |
2231 | differently from ones without delay slots. */ | |
2232 | { | |
2233 | unsigned char *buffer = | |
2234 | (unsigned char *) (fragP->fr_fix + fragP->fr_literal); | |
2235 | int highbyte = target_big_endian ? 0 : 1; | |
2236 | int lowbyte = target_big_endian ? 1 : 0; | |
2237 | int delay = fragP->fr_subtype == C (COND_JUMP_DELAY, COND12); | |
2238 | ||
2239 | /* Toggle the true/false bit of the bcond. */ | |
2240 | buffer[highbyte] ^= 0x2; | |
2241 | ||
2242 | /* If this is a dalayed branch, we may not put the the bra in the | |
2243 | slot. So we change it to a non-delayed branch, like that: | |
2244 | b! cond slot_label; bra disp; slot_label: slot_insn | |
2245 | ??? We should try if swapping the conditional branch and | |
2246 | its delay-slot insn already makes the branch reach. */ | |
2247 | ||
2248 | /* Build a relocation to six / four bytes farther on. */ | |
2249 | subseg_change (seg, 0); | |
2250 | fix_new (fragP, fragP->fr_fix, 2, | |
2251 | #ifdef BFD_ASSEMBLER | |
2252 | section_symbol (seg), | |
2253 | #else | |
2254 | seg_info (seg)->dot, | |
2255 | #endif | |
2256 | fragP->fr_address + fragP->fr_fix + (delay ? 4 : 6), | |
2257 | 1, BFD_RELOC_SH_PCDISP8BY2); | |
2258 | ||
2259 | /* Set up a jump instruction. */ | |
2260 | buffer[highbyte + 2] = 0xa0; | |
2261 | buffer[lowbyte + 2] = 0; | |
2262 | fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol, | |
2263 | fragP->fr_offset, 1, BFD_RELOC_SH_PCDISP12BY2); | |
2264 | ||
2265 | if (delay) | |
2266 | { | |
2267 | buffer[highbyte] &= ~0x4; /* Removes delay slot from branch. */ | |
2268 | fragP->fr_fix += 4; | |
2269 | } | |
2270 | else | |
2271 | { | |
2272 | /* Fill in a NOP instruction. */ | |
2273 | buffer[highbyte + 4] = 0x0; | |
2274 | buffer[lowbyte + 4] = 0x9; | |
2275 | ||
2276 | fragP->fr_fix += 6; | |
2277 | } | |
2278 | fragP->fr_var = 0; | |
2279 | donerelax = 1; | |
2280 | } | |
2281 | break; | |
2282 | ||
2283 | case C (COND_JUMP, COND32): | |
2284 | case C (COND_JUMP_DELAY, COND32): | |
2285 | case C (COND_JUMP, UNDEF_WORD_DISP): | |
2286 | case C (COND_JUMP_DELAY, UNDEF_WORD_DISP): | |
2287 | if (fragP->fr_symbol == NULL) | |
2288 | as_bad (_("at 0x%lx, displacement overflows 8-bit field"), | |
2289 | (unsigned long) fragP->fr_address); | |
2290 | else if (S_IS_DEFINED (fragP->fr_symbol)) | |
2291 | as_bad (_("at 0x%lx, displacement to defined symbol %s overflows 8-bit field "), | |
2292 | (unsigned long) fragP->fr_address, | |
2293 | S_GET_NAME (fragP->fr_symbol)); | |
2294 | else | |
2295 | as_bad (_("at 0x%lx, displacement to undefined symbol %s overflows 8-bit field "), | |
2296 | (unsigned long) fragP->fr_address, | |
2297 | S_GET_NAME (fragP->fr_symbol)); | |
2298 | ||
6b31947e NC |
2299 | #if 0 /* This code works, but generates poor code, and the compiler |
2300 | should never produce a sequence that requires it to be used. */ | |
252b5132 RH |
2301 | |
2302 | /* A bcond won't fit and it won't go into a 12 bit | |
2303 | displacement either, the code sequence looks like: | |
2304 | b!cond foop | |
2305 | mov.w @(n, PC), r14 | |
2306 | jmp @r14 | |
2307 | nop | |
2308 | .long where | |
2309 | foop: | |
2310 | */ | |
2311 | ||
2312 | buffer[0] ^= 0x2; /* Toggle T/F bit */ | |
2313 | #define JREG 14 | |
2314 | buffer[1] = 5; /* branch over mov, jump, nop and ptr */ | |
2315 | buffer[2] = 0xd0 | JREG; /* Build mov insn */ | |
2316 | buffer[3] = 0x2; | |
2317 | buffer[4] = 0x40 | JREG; /* Build jmp @JREG */ | |
2318 | buffer[5] = 0x0b; | |
2319 | buffer[6] = 0x20; /* build nop */ | |
2320 | buffer[7] = 0x0b; | |
2321 | buffer[8] = 0; /* space for 32 bit jump disp */ | |
2322 | buffer[9] = 0; | |
2323 | buffer[10] = 0; | |
2324 | buffer[11] = 0; | |
2325 | buffer[12] = 0; | |
2326 | buffer[13] = 0; | |
2327 | /* Make reloc for the long disp */ | |
2328 | fix_new (fragP, | |
2329 | fragP->fr_fix + 8, | |
2330 | 4, | |
2331 | fragP->fr_symbol, | |
2332 | fragP->fr_offset, | |
2333 | 0, | |
2334 | BFD_RELOC_32); | |
2335 | fragP->fr_fix += COND32_LENGTH; | |
2336 | fragP->fr_var = 0; | |
2337 | donerelax = 1; | |
2338 | #endif | |
2339 | ||
2340 | break; | |
2341 | ||
2342 | default: | |
2343 | abort (); | |
2344 | } | |
2345 | ||
2346 | if (donerelax && !sh_relax) | |
2347 | as_warn_where (fragP->fr_file, fragP->fr_line, | |
2348 | _("overflow in branch to %s; converted into longer instruction sequence"), | |
2349 | (fragP->fr_symbol != NULL | |
2350 | ? S_GET_NAME (fragP->fr_symbol) | |
2351 | : "")); | |
2352 | } | |
2353 | ||
2354 | valueT | |
c0fecd35 AM |
2355 | md_section_align (seg, size) |
2356 | segT seg; | |
2357 | valueT size; | |
252b5132 RH |
2358 | { |
2359 | #ifdef BFD_ASSEMBLER | |
2360 | #ifdef OBJ_ELF | |
2361 | return size; | |
2362 | #else /* ! OBJ_ELF */ | |
2363 | return ((size + (1 << bfd_get_section_alignment (stdoutput, seg)) - 1) | |
2364 | & (-1 << bfd_get_section_alignment (stdoutput, seg))); | |
2365 | #endif /* ! OBJ_ELF */ | |
2366 | #else /* ! BFD_ASSEMBLER */ | |
2367 | return ((size + (1 << section_alignment[(int) seg]) - 1) | |
2368 | & (-1 << section_alignment[(int) seg])); | |
2369 | #endif /* ! BFD_ASSEMBLER */ | |
2370 | } | |
2371 | ||
2372 | /* This static variable is set by s_uacons to tell sh_cons_align that | |
2373 | the expession does not need to be aligned. */ | |
2374 | ||
2375 | static int sh_no_align_cons = 0; | |
2376 | ||
2377 | /* This handles the unaligned space allocation pseudo-ops, such as | |
2378 | .uaword. .uaword is just like .word, but the value does not need | |
2379 | to be aligned. */ | |
2380 | ||
2381 | static void | |
2382 | s_uacons (bytes) | |
2383 | int bytes; | |
2384 | { | |
2385 | /* Tell sh_cons_align not to align this value. */ | |
2386 | sh_no_align_cons = 1; | |
2387 | cons (bytes); | |
2388 | } | |
2389 | ||
2390 | /* If a .word, et. al., pseud-op is seen, warn if the value is not | |
2391 | aligned correctly. Note that this can cause warnings to be issued | |
2392 | when assembling initialized structured which were declared with the | |
2393 | packed attribute. FIXME: Perhaps we should require an option to | |
2394 | enable this warning? */ | |
2395 | ||
2396 | void | |
2397 | sh_cons_align (nbytes) | |
2398 | int nbytes; | |
2399 | { | |
2400 | int nalign; | |
2401 | char *p; | |
2402 | ||
2403 | if (sh_no_align_cons) | |
2404 | { | |
2405 | /* This is an unaligned pseudo-op. */ | |
2406 | sh_no_align_cons = 0; | |
2407 | return; | |
2408 | } | |
2409 | ||
2410 | nalign = 0; | |
2411 | while ((nbytes & 1) == 0) | |
2412 | { | |
2413 | ++nalign; | |
2414 | nbytes >>= 1; | |
2415 | } | |
2416 | ||
2417 | if (nalign == 0) | |
2418 | return; | |
2419 | ||
2420 | if (now_seg == absolute_section) | |
2421 | { | |
2422 | if ((abs_section_offset & ((1 << nalign) - 1)) != 0) | |
2423 | as_warn (_("misaligned data")); | |
2424 | return; | |
2425 | } | |
2426 | ||
2427 | p = frag_var (rs_align_code, 1, 1, (relax_substateT) 0, | |
2428 | (symbolS *) NULL, (offsetT) nalign, (char *) NULL); | |
2429 | ||
2430 | record_alignment (now_seg, nalign); | |
2431 | } | |
2432 | ||
2433 | /* When relaxing, we need to output a reloc for any .align directive | |
2434 | that requests alignment to a four byte boundary or larger. This is | |
2435 | also where we check for misaligned data. */ | |
2436 | ||
2437 | void | |
2438 | sh_handle_align (frag) | |
2439 | fragS *frag; | |
2440 | { | |
2441 | if (sh_relax | |
2442 | && frag->fr_type == rs_align | |
2443 | && frag->fr_address + frag->fr_fix > 0 | |
2444 | && frag->fr_offset > 1 | |
2445 | && now_seg != bss_section) | |
2446 | fix_new (frag, frag->fr_fix, 2, &abs_symbol, frag->fr_offset, 0, | |
2447 | BFD_RELOC_SH_ALIGN); | |
2448 | ||
2449 | if (frag->fr_type == rs_align_code | |
2450 | && frag->fr_next->fr_address - frag->fr_address - frag->fr_fix != 0) | |
2451 | as_warn_where (frag->fr_file, frag->fr_line, _("misaligned data")); | |
2452 | } | |
2453 | ||
2454 | /* This macro decides whether a particular reloc is an entry in a | |
2455 | switch table. It is used when relaxing, because the linker needs | |
2456 | to know about all such entries so that it can adjust them if | |
2457 | necessary. */ | |
2458 | ||
2459 | #ifdef BFD_ASSEMBLER | |
2460 | #define SWITCH_TABLE_CONS(fix) (0) | |
2461 | #else | |
2462 | #define SWITCH_TABLE_CONS(fix) \ | |
2463 | ((fix)->fx_r_type == 0 \ | |
2464 | && ((fix)->fx_size == 2 \ | |
2465 | || (fix)->fx_size == 1 \ | |
2466 | || (fix)->fx_size == 4)) | |
2467 | #endif | |
2468 | ||
2469 | #define SWITCH_TABLE(fix) \ | |
2470 | ((fix)->fx_addsy != NULL \ | |
2471 | && (fix)->fx_subsy != NULL \ | |
2472 | && S_GET_SEGMENT ((fix)->fx_addsy) == text_section \ | |
2473 | && S_GET_SEGMENT ((fix)->fx_subsy) == text_section \ | |
2474 | && ((fix)->fx_r_type == BFD_RELOC_32 \ | |
2475 | || (fix)->fx_r_type == BFD_RELOC_16 \ | |
2476 | || (fix)->fx_r_type == BFD_RELOC_8 \ | |
2477 | || SWITCH_TABLE_CONS (fix))) | |
2478 | ||
2479 | /* See whether we need to force a relocation into the output file. | |
2480 | This is used to force out switch and PC relative relocations when | |
2481 | relaxing. */ | |
2482 | ||
2483 | int | |
2484 | sh_force_relocation (fix) | |
2485 | fixS *fix; | |
2486 | { | |
2487 | ||
2488 | if (fix->fx_r_type == BFD_RELOC_VTABLE_INHERIT | |
015551fc JR |
2489 | || fix->fx_r_type == BFD_RELOC_VTABLE_ENTRY |
2490 | || fix->fx_r_type == BFD_RELOC_SH_LOOP_START | |
2491 | || fix->fx_r_type == BFD_RELOC_SH_LOOP_END) | |
252b5132 RH |
2492 | return 1; |
2493 | ||
2494 | if (! sh_relax) | |
2495 | return 0; | |
2496 | ||
2497 | return (fix->fx_pcrel | |
2498 | || SWITCH_TABLE (fix) | |
2499 | || fix->fx_r_type == BFD_RELOC_SH_COUNT | |
2500 | || fix->fx_r_type == BFD_RELOC_SH_ALIGN | |
2501 | || fix->fx_r_type == BFD_RELOC_SH_CODE | |
2502 | || fix->fx_r_type == BFD_RELOC_SH_DATA | |
2503 | || fix->fx_r_type == BFD_RELOC_SH_LABEL); | |
2504 | } | |
2505 | ||
2506 | #ifdef OBJ_ELF | |
2507 | boolean | |
2508 | sh_fix_adjustable (fixP) | |
2509 | fixS *fixP; | |
2510 | { | |
2511 | ||
2512 | if (fixP->fx_addsy == NULL) | |
2513 | return 1; | |
2514 | ||
2515 | /* We need the symbol name for the VTABLE entries */ | |
2516 | if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT | |
2517 | || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY) | |
2518 | return 0; | |
2519 | ||
2520 | return 1; | |
2521 | } | |
d4845d57 | 2522 | |
6b31947e NC |
2523 | void |
2524 | sh_elf_final_processing () | |
d4845d57 JR |
2525 | { |
2526 | int val; | |
2527 | ||
2528 | /* Set file-specific flags to indicate if this code needs | |
2529 | a processor with the sh-dsp / sh3e ISA to execute. */ | |
2530 | if (valid_arch & arch_sh1) | |
2531 | val = EF_SH1; | |
2532 | else if (valid_arch & arch_sh2) | |
2533 | val = EF_SH2; | |
2534 | else if (valid_arch & arch_sh_dsp) | |
2535 | val = EF_SH_DSP; | |
2536 | else if (valid_arch & arch_sh3) | |
2537 | val = EF_SH3; | |
2538 | else if (valid_arch & arch_sh3_dsp) | |
2539 | val = EF_SH_DSP; | |
2540 | else if (valid_arch & arch_sh3e) | |
2541 | val = EF_SH3E; | |
2542 | else if (valid_arch & arch_sh4) | |
2543 | val = EF_SH4; | |
2544 | else | |
2545 | abort (); | |
2546 | ||
2547 | elf_elfheader (stdoutput)->e_flags &= ~EF_SH_MACH_MASK; | |
2548 | elf_elfheader (stdoutput)->e_flags |= val; | |
2549 | } | |
252b5132 RH |
2550 | #endif |
2551 | ||
2552 | /* Apply a fixup to the object file. */ | |
2553 | ||
2554 | #ifdef BFD_ASSEMBLER | |
2555 | int | |
2556 | md_apply_fix (fixP, valp) | |
2557 | fixS *fixP; | |
2558 | valueT *valp; | |
2559 | #else | |
2560 | void | |
2561 | md_apply_fix (fixP, val) | |
2562 | fixS *fixP; | |
2563 | long val; | |
2564 | #endif | |
2565 | { | |
2566 | char *buf = fixP->fx_where + fixP->fx_frag->fr_literal; | |
2567 | int lowbyte = target_big_endian ? 1 : 0; | |
2568 | int highbyte = target_big_endian ? 0 : 1; | |
2569 | #ifdef BFD_ASSEMBLER | |
2570 | long val = *valp; | |
2571 | #endif | |
2572 | long max, min; | |
2573 | int shift; | |
2574 | ||
2575 | #ifdef BFD_ASSEMBLER | |
6b31947e NC |
2576 | /* The function adjust_reloc_syms won't convert a reloc against a weak |
2577 | symbol into a reloc against a section, but bfd_install_relocation | |
2578 | will screw up if the symbol is defined, so we have to adjust val here | |
252b5132 RH |
2579 | to avoid the screw up later. */ |
2580 | if (fixP->fx_addsy != NULL | |
2581 | && S_IS_WEAK (fixP->fx_addsy)) | |
2582 | val -= S_GET_VALUE (fixP->fx_addsy); | |
2583 | #endif | |
2584 | ||
2585 | #ifndef BFD_ASSEMBLER | |
2586 | if (fixP->fx_r_type == 0) | |
2587 | { | |
2588 | if (fixP->fx_size == 2) | |
2589 | fixP->fx_r_type = BFD_RELOC_16; | |
2590 | else if (fixP->fx_size == 4) | |
2591 | fixP->fx_r_type = BFD_RELOC_32; | |
2592 | else if (fixP->fx_size == 1) | |
2593 | fixP->fx_r_type = BFD_RELOC_8; | |
2594 | else | |
2595 | abort (); | |
2596 | } | |
2597 | #endif | |
2598 | ||
2599 | max = min = 0; | |
2600 | shift = 0; | |
2601 | switch (fixP->fx_r_type) | |
2602 | { | |
2603 | case BFD_RELOC_SH_IMM4: | |
2604 | max = 0xf; | |
2605 | *buf = (*buf & 0xf0) | (val & 0xf); | |
2606 | break; | |
2607 | ||
2608 | case BFD_RELOC_SH_IMM4BY2: | |
2609 | max = 0xf; | |
2610 | shift = 1; | |
2611 | *buf = (*buf & 0xf0) | ((val >> 1) & 0xf); | |
2612 | break; | |
2613 | ||
2614 | case BFD_RELOC_SH_IMM4BY4: | |
2615 | max = 0xf; | |
2616 | shift = 2; | |
2617 | *buf = (*buf & 0xf0) | ((val >> 2) & 0xf); | |
2618 | break; | |
2619 | ||
2620 | case BFD_RELOC_SH_IMM8BY2: | |
2621 | max = 0xff; | |
2622 | shift = 1; | |
2623 | *buf = val >> 1; | |
2624 | break; | |
2625 | ||
2626 | case BFD_RELOC_SH_IMM8BY4: | |
2627 | max = 0xff; | |
2628 | shift = 2; | |
2629 | *buf = val >> 2; | |
2630 | break; | |
2631 | ||
2632 | case BFD_RELOC_8: | |
2633 | case BFD_RELOC_SH_IMM8: | |
2634 | /* Sometimes the 8 bit value is sign extended (e.g., add) and | |
2635 | sometimes it is not (e.g., and). We permit any 8 bit value. | |
2636 | Note that adding further restrictions may invalidate | |
2637 | reasonable looking assembly code, such as ``and -0x1,r0''. */ | |
2638 | max = 0xff; | |
2639 | min = - 0xff; | |
2640 | *buf++ = val; | |
2641 | break; | |
2642 | ||
2643 | case BFD_RELOC_SH_PCRELIMM8BY4: | |
2644 | /* The lower two bits of the PC are cleared before the | |
2645 | displacement is added in. We can assume that the destination | |
2646 | is on a 4 byte bounday. If this instruction is also on a 4 | |
2647 | byte boundary, then we want | |
2648 | (target - here) / 4 | |
2649 | and target - here is a multiple of 4. | |
2650 | Otherwise, we are on a 2 byte boundary, and we want | |
2651 | (target - (here - 2)) / 4 | |
2652 | and target - here is not a multiple of 4. Computing | |
2653 | (target - (here - 2)) / 4 == (target - here + 2) / 4 | |
2654 | works for both cases, since in the first case the addition of | |
2655 | 2 will be removed by the division. target - here is in the | |
2656 | variable val. */ | |
2657 | val = (val + 2) / 4; | |
2658 | if (val & ~0xff) | |
2659 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); | |
2660 | buf[lowbyte] = val; | |
2661 | break; | |
2662 | ||
2663 | case BFD_RELOC_SH_PCRELIMM8BY2: | |
2664 | val /= 2; | |
2665 | if (val & ~0xff) | |
2666 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); | |
2667 | buf[lowbyte] = val; | |
2668 | break; | |
2669 | ||
2670 | case BFD_RELOC_SH_PCDISP8BY2: | |
2671 | val /= 2; | |
2672 | if (val < -0x80 || val > 0x7f) | |
2673 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); | |
2674 | buf[lowbyte] = val; | |
2675 | break; | |
2676 | ||
2677 | case BFD_RELOC_SH_PCDISP12BY2: | |
2678 | val /= 2; | |
2679 | if (val < -0x800 || val >= 0x7ff) | |
2680 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); | |
2681 | buf[lowbyte] = val & 0xff; | |
2682 | buf[highbyte] |= (val >> 8) & 0xf; | |
2683 | break; | |
2684 | ||
2685 | case BFD_RELOC_32: | |
2686 | if (! target_big_endian) | |
2687 | { | |
2688 | *buf++ = val >> 0; | |
2689 | *buf++ = val >> 8; | |
2690 | *buf++ = val >> 16; | |
2691 | *buf++ = val >> 24; | |
2692 | } | |
2693 | else | |
2694 | { | |
2695 | *buf++ = val >> 24; | |
2696 | *buf++ = val >> 16; | |
2697 | *buf++ = val >> 8; | |
2698 | *buf++ = val >> 0; | |
2699 | } | |
2700 | break; | |
2701 | ||
2702 | case BFD_RELOC_16: | |
2703 | if (! target_big_endian) | |
2704 | { | |
2705 | *buf++ = val >> 0; | |
2706 | *buf++ = val >> 8; | |
2707 | } | |
2708 | else | |
2709 | { | |
2710 | *buf++ = val >> 8; | |
2711 | *buf++ = val >> 0; | |
2712 | } | |
2713 | break; | |
2714 | ||
2715 | case BFD_RELOC_SH_USES: | |
2716 | /* Pass the value into sh_coff_reloc_mangle. */ | |
2717 | fixP->fx_addnumber = val; | |
2718 | break; | |
2719 | ||
2720 | case BFD_RELOC_SH_COUNT: | |
2721 | case BFD_RELOC_SH_ALIGN: | |
2722 | case BFD_RELOC_SH_CODE: | |
2723 | case BFD_RELOC_SH_DATA: | |
2724 | case BFD_RELOC_SH_LABEL: | |
2725 | /* Nothing to do here. */ | |
2726 | break; | |
2727 | ||
015551fc JR |
2728 | case BFD_RELOC_SH_LOOP_START: |
2729 | case BFD_RELOC_SH_LOOP_END: | |
2730 | ||
252b5132 RH |
2731 | case BFD_RELOC_VTABLE_INHERIT: |
2732 | case BFD_RELOC_VTABLE_ENTRY: | |
2733 | fixP->fx_done = 0; | |
49309057 ILT |
2734 | #ifdef BFD_ASSEMBLER |
2735 | return 0; | |
2736 | #else | |
252b5132 | 2737 | return; |
49309057 | 2738 | #endif |
252b5132 RH |
2739 | |
2740 | default: | |
2741 | abort (); | |
2742 | } | |
2743 | ||
2744 | if (shift != 0) | |
2745 | { | |
2746 | if ((val & ((1 << shift) - 1)) != 0) | |
2747 | as_bad_where (fixP->fx_file, fixP->fx_line, _("misaligned offset")); | |
2748 | if (val >= 0) | |
2749 | val >>= shift; | |
2750 | else | |
2751 | val = ((val >> shift) | |
2752 | | ((long) -1 & ~ ((long) -1 >> shift))); | |
2753 | } | |
2754 | if (max != 0 && (val < min || val > max)) | |
2755 | as_bad_where (fixP->fx_file, fixP->fx_line, _("offset out of range")); | |
2756 | ||
2757 | #ifdef BFD_ASSEMBLER | |
2758 | return 0; | |
2759 | #endif | |
2760 | } | |
2761 | ||
2762 | /* Called just before address relaxation. Return the length | |
2763 | by which a fragment must grow to reach it's destination. */ | |
2764 | ||
2765 | int | |
2766 | md_estimate_size_before_relax (fragP, segment_type) | |
2767 | register fragS *fragP; | |
2768 | register segT segment_type; | |
2769 | { | |
2770 | switch (fragP->fr_subtype) | |
2771 | { | |
2772 | case C (UNCOND_JUMP, UNDEF_DISP): | |
6b31947e | 2773 | /* Used to be a branch to somewhere which was unknown. */ |
252b5132 RH |
2774 | if (!fragP->fr_symbol) |
2775 | { | |
2776 | fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12); | |
2777 | fragP->fr_var = md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length; | |
2778 | } | |
2779 | else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type) | |
2780 | { | |
2781 | fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12); | |
2782 | fragP->fr_var = md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length; | |
2783 | } | |
2784 | else | |
2785 | { | |
2786 | fragP->fr_subtype = C (UNCOND_JUMP, UNDEF_WORD_DISP); | |
2787 | fragP->fr_var = md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length; | |
2788 | return md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length; | |
2789 | } | |
2790 | break; | |
2791 | ||
2792 | default: | |
2793 | abort (); | |
2794 | case C (COND_JUMP, UNDEF_DISP): | |
2795 | case C (COND_JUMP_DELAY, UNDEF_DISP): | |
6b31947e | 2796 | /* Used to be a branch to somewhere which was unknown. */ |
252b5132 RH |
2797 | if (fragP->fr_symbol |
2798 | && S_GET_SEGMENT (fragP->fr_symbol) == segment_type) | |
2799 | { | |
2800 | int what = GET_WHAT (fragP->fr_subtype); | |
2801 | /* Got a symbol and it's defined in this segment, become byte | |
6b31947e | 2802 | sized - maybe it will fix up. */ |
252b5132 RH |
2803 | fragP->fr_subtype = C (what, COND8); |
2804 | fragP->fr_var = md_relax_table[C (what, COND8)].rlx_length; | |
2805 | } | |
2806 | else if (fragP->fr_symbol) | |
2807 | { | |
2808 | int what = GET_WHAT (fragP->fr_subtype); | |
6b31947e | 2809 | /* Its got a segment, but its not ours, so it will always be long. */ |
252b5132 RH |
2810 | fragP->fr_subtype = C (what, UNDEF_WORD_DISP); |
2811 | fragP->fr_var = md_relax_table[C (what, COND32)].rlx_length; | |
2812 | return md_relax_table[C (what, COND32)].rlx_length; | |
2813 | } | |
2814 | else | |
2815 | { | |
2816 | int what = GET_WHAT (fragP->fr_subtype); | |
6b31947e | 2817 | /* We know the abs value. */ |
252b5132 RH |
2818 | fragP->fr_subtype = C (what, COND8); |
2819 | fragP->fr_var = md_relax_table[C (what, COND8)].rlx_length; | |
2820 | } | |
2821 | ||
2822 | break; | |
2823 | } | |
2824 | return fragP->fr_var; | |
2825 | } | |
2826 | ||
6b31947e | 2827 | /* Put number into target byte order. */ |
252b5132 RH |
2828 | |
2829 | void | |
2830 | md_number_to_chars (ptr, use, nbytes) | |
2831 | char *ptr; | |
2832 | valueT use; | |
2833 | int nbytes; | |
2834 | { | |
2835 | if (! target_big_endian) | |
2836 | number_to_chars_littleendian (ptr, use, nbytes); | |
2837 | else | |
2838 | number_to_chars_bigendian (ptr, use, nbytes); | |
2839 | } | |
2840 | ||
2841 | long | |
2842 | md_pcrel_from (fixP) | |
2843 | fixS *fixP; | |
2844 | { | |
2845 | return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address + 2; | |
2846 | } | |
2847 | ||
2848 | #ifdef OBJ_COFF | |
2849 | ||
2850 | int | |
2851 | tc_coff_sizemachdep (frag) | |
2852 | fragS *frag; | |
2853 | { | |
2854 | return md_relax_table[frag->fr_subtype].rlx_length; | |
2855 | } | |
2856 | ||
2857 | #endif /* OBJ_COFF */ | |
2858 | ||
2859 | /* When we align the .text section, insert the correct NOP pattern. */ | |
2860 | ||
2861 | int | |
2862 | sh_do_align (n, fill, len, max) | |
2863 | int n; | |
2864 | const char *fill; | |
43841e91 | 2865 | int len ATTRIBUTE_UNUSED; |
252b5132 RH |
2866 | int max; |
2867 | { | |
2868 | if (fill == NULL | |
b9e57a38 | 2869 | && subseg_text_p (now_seg) |
252b5132 RH |
2870 | && n > 1) |
2871 | { | |
2872 | static const unsigned char big_nop_pattern[] = { 0x00, 0x09 }; | |
2873 | static const unsigned char little_nop_pattern[] = { 0x09, 0x00 }; | |
2874 | ||
2875 | /* First align to a 2 byte boundary, in case there is an odd | |
2876 | .byte. */ | |
2877 | frag_align (1, 0, 0); | |
2878 | if (target_big_endian) | |
2879 | frag_align_pattern (n, big_nop_pattern, sizeof big_nop_pattern, max); | |
2880 | else | |
2881 | frag_align_pattern (n, little_nop_pattern, sizeof little_nop_pattern, | |
2882 | max); | |
2883 | return 1; | |
2884 | } | |
2885 | ||
2886 | return 0; | |
2887 | } | |
2888 | ||
2889 | #ifndef BFD_ASSEMBLER | |
2890 | #ifdef OBJ_COFF | |
2891 | ||
2892 | /* Map BFD relocs to SH COFF relocs. */ | |
2893 | ||
2894 | struct reloc_map | |
2895 | { | |
2896 | bfd_reloc_code_real_type bfd_reloc; | |
2897 | int sh_reloc; | |
2898 | }; | |
2899 | ||
2900 | static const struct reloc_map coff_reloc_map[] = | |
2901 | { | |
2902 | { BFD_RELOC_32, R_SH_IMM32 }, | |
2903 | { BFD_RELOC_16, R_SH_IMM16 }, | |
2904 | { BFD_RELOC_8, R_SH_IMM8 }, | |
2905 | { BFD_RELOC_SH_PCDISP8BY2, R_SH_PCDISP8BY2 }, | |
2906 | { BFD_RELOC_SH_PCDISP12BY2, R_SH_PCDISP }, | |
2907 | { BFD_RELOC_SH_IMM4, R_SH_IMM4 }, | |
2908 | { BFD_RELOC_SH_IMM4BY2, R_SH_IMM4BY2 }, | |
2909 | { BFD_RELOC_SH_IMM4BY4, R_SH_IMM4BY4 }, | |
2910 | { BFD_RELOC_SH_IMM8, R_SH_IMM8 }, | |
2911 | { BFD_RELOC_SH_IMM8BY2, R_SH_IMM8BY2 }, | |
2912 | { BFD_RELOC_SH_IMM8BY4, R_SH_IMM8BY4 }, | |
2913 | { BFD_RELOC_SH_PCRELIMM8BY2, R_SH_PCRELIMM8BY2 }, | |
2914 | { BFD_RELOC_SH_PCRELIMM8BY4, R_SH_PCRELIMM8BY4 }, | |
2915 | { BFD_RELOC_8_PCREL, R_SH_SWITCH8 }, | |
2916 | { BFD_RELOC_SH_SWITCH16, R_SH_SWITCH16 }, | |
2917 | { BFD_RELOC_SH_SWITCH32, R_SH_SWITCH32 }, | |
2918 | { BFD_RELOC_SH_USES, R_SH_USES }, | |
2919 | { BFD_RELOC_SH_COUNT, R_SH_COUNT }, | |
2920 | { BFD_RELOC_SH_ALIGN, R_SH_ALIGN }, | |
2921 | { BFD_RELOC_SH_CODE, R_SH_CODE }, | |
2922 | { BFD_RELOC_SH_DATA, R_SH_DATA }, | |
2923 | { BFD_RELOC_SH_LABEL, R_SH_LABEL }, | |
2924 | { BFD_RELOC_UNUSED, 0 } | |
2925 | }; | |
2926 | ||
2927 | /* Adjust a reloc for the SH. This is similar to the generic code, | |
2928 | but does some minor tweaking. */ | |
2929 | ||
2930 | void | |
2931 | sh_coff_reloc_mangle (seg, fix, intr, paddr) | |
2932 | segment_info_type *seg; | |
2933 | fixS *fix; | |
2934 | struct internal_reloc *intr; | |
2935 | unsigned int paddr; | |
2936 | { | |
2937 | symbolS *symbol_ptr = fix->fx_addsy; | |
2938 | symbolS *dot; | |
2939 | ||
2940 | intr->r_vaddr = paddr + fix->fx_frag->fr_address + fix->fx_where; | |
2941 | ||
2942 | if (! SWITCH_TABLE (fix)) | |
2943 | { | |
2944 | const struct reloc_map *rm; | |
2945 | ||
2946 | for (rm = coff_reloc_map; rm->bfd_reloc != BFD_RELOC_UNUSED; rm++) | |
2947 | if (rm->bfd_reloc == (bfd_reloc_code_real_type) fix->fx_r_type) | |
2948 | break; | |
2949 | if (rm->bfd_reloc == BFD_RELOC_UNUSED) | |
2950 | as_bad_where (fix->fx_file, fix->fx_line, | |
2951 | _("Can not represent %s relocation in this object file format"), | |
2952 | bfd_get_reloc_code_name (fix->fx_r_type)); | |
2953 | intr->r_type = rm->sh_reloc; | |
2954 | intr->r_offset = 0; | |
2955 | } | |
2956 | else | |
2957 | { | |
2958 | know (sh_relax); | |
2959 | ||
2960 | if (fix->fx_r_type == BFD_RELOC_16) | |
2961 | intr->r_type = R_SH_SWITCH16; | |
2962 | else if (fix->fx_r_type == BFD_RELOC_8) | |
2963 | intr->r_type = R_SH_SWITCH8; | |
2964 | else if (fix->fx_r_type == BFD_RELOC_32) | |
2965 | intr->r_type = R_SH_SWITCH32; | |
2966 | else | |
2967 | abort (); | |
2968 | ||
2969 | /* For a switch reloc, we set r_offset to the difference between | |
2970 | the reloc address and the subtrahend. When the linker is | |
2971 | doing relaxing, it can use the determine the starting and | |
2972 | ending points of the switch difference expression. */ | |
2973 | intr->r_offset = intr->r_vaddr - S_GET_VALUE (fix->fx_subsy); | |
2974 | } | |
2975 | ||
2976 | /* PC relative relocs are always against the current section. */ | |
2977 | if (symbol_ptr == NULL) | |
2978 | { | |
2979 | switch (fix->fx_r_type) | |
2980 | { | |
2981 | case BFD_RELOC_SH_PCRELIMM8BY2: | |
2982 | case BFD_RELOC_SH_PCRELIMM8BY4: | |
2983 | case BFD_RELOC_SH_PCDISP8BY2: | |
2984 | case BFD_RELOC_SH_PCDISP12BY2: | |
2985 | case BFD_RELOC_SH_USES: | |
2986 | symbol_ptr = seg->dot; | |
2987 | break; | |
2988 | default: | |
2989 | break; | |
2990 | } | |
2991 | } | |
2992 | ||
2993 | if (fix->fx_r_type == BFD_RELOC_SH_USES) | |
2994 | { | |
2995 | /* We can't store the offset in the object file, since this | |
2996 | reloc does not take up any space, so we store it in r_offset. | |
2997 | The fx_addnumber field was set in md_apply_fix. */ | |
2998 | intr->r_offset = fix->fx_addnumber; | |
2999 | } | |
3000 | else if (fix->fx_r_type == BFD_RELOC_SH_COUNT) | |
3001 | { | |
3002 | /* We can't store the count in the object file, since this reloc | |
3003 | does not take up any space, so we store it in r_offset. The | |
3004 | fx_offset field was set when the fixup was created in | |
3005 | sh_coff_frob_file. */ | |
3006 | intr->r_offset = fix->fx_offset; | |
3007 | /* This reloc is always absolute. */ | |
3008 | symbol_ptr = NULL; | |
3009 | } | |
3010 | else if (fix->fx_r_type == BFD_RELOC_SH_ALIGN) | |
3011 | { | |
3012 | /* Store the alignment in the r_offset field. */ | |
3013 | intr->r_offset = fix->fx_offset; | |
3014 | /* This reloc is always absolute. */ | |
3015 | symbol_ptr = NULL; | |
3016 | } | |
3017 | else if (fix->fx_r_type == BFD_RELOC_SH_CODE | |
3018 | || fix->fx_r_type == BFD_RELOC_SH_DATA | |
3019 | || fix->fx_r_type == BFD_RELOC_SH_LABEL) | |
3020 | { | |
3021 | /* These relocs are always absolute. */ | |
3022 | symbol_ptr = NULL; | |
3023 | } | |
3024 | ||
3025 | /* Turn the segment of the symbol into an offset. */ | |
3026 | if (symbol_ptr != NULL) | |
3027 | { | |
3028 | dot = segment_info[S_GET_SEGMENT (symbol_ptr)].dot; | |
3029 | if (dot != NULL) | |
3030 | intr->r_symndx = dot->sy_number; | |
3031 | else | |
3032 | intr->r_symndx = symbol_ptr->sy_number; | |
3033 | } | |
3034 | else | |
3035 | intr->r_symndx = -1; | |
3036 | } | |
3037 | ||
3038 | #endif /* OBJ_COFF */ | |
3039 | #endif /* ! BFD_ASSEMBLER */ | |
3040 | ||
3041 | #ifdef BFD_ASSEMBLER | |
3042 | ||
3043 | /* Create a reloc. */ | |
3044 | ||
3045 | arelent * | |
3046 | tc_gen_reloc (section, fixp) | |
43841e91 | 3047 | asection *section ATTRIBUTE_UNUSED; |
252b5132 RH |
3048 | fixS *fixp; |
3049 | { | |
3050 | arelent *rel; | |
3051 | bfd_reloc_code_real_type r_type; | |
3052 | ||
3053 | rel = (arelent *) xmalloc (sizeof (arelent)); | |
49309057 ILT |
3054 | rel->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); |
3055 | *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); | |
252b5132 RH |
3056 | rel->address = fixp->fx_frag->fr_address + fixp->fx_where; |
3057 | ||
3058 | r_type = fixp->fx_r_type; | |
3059 | ||
3060 | if (SWITCH_TABLE (fixp)) | |
3061 | { | |
3062 | rel->addend = rel->address - S_GET_VALUE (fixp->fx_subsy); | |
3063 | if (r_type == BFD_RELOC_16) | |
3064 | r_type = BFD_RELOC_SH_SWITCH16; | |
3065 | else if (r_type == BFD_RELOC_8) | |
3066 | r_type = BFD_RELOC_8_PCREL; | |
3067 | else if (r_type == BFD_RELOC_32) | |
3068 | r_type = BFD_RELOC_SH_SWITCH32; | |
3069 | else | |
3070 | abort (); | |
3071 | } | |
3072 | else if (r_type == BFD_RELOC_SH_USES) | |
3073 | rel->addend = fixp->fx_addnumber; | |
3074 | else if (r_type == BFD_RELOC_SH_COUNT) | |
3075 | rel->addend = fixp->fx_offset; | |
3076 | else if (r_type == BFD_RELOC_SH_ALIGN) | |
3077 | rel->addend = fixp->fx_offset; | |
3078 | else if (r_type == BFD_RELOC_VTABLE_INHERIT | |
3079 | || r_type == BFD_RELOC_VTABLE_ENTRY) | |
3080 | rel->addend = fixp->fx_offset; | |
015551fc JR |
3081 | else if (r_type == BFD_RELOC_SH_LOOP_START |
3082 | || r_type == BFD_RELOC_SH_LOOP_END) | |
3083 | rel->addend = fixp->fx_offset; | |
3084 | else if (r_type == BFD_RELOC_SH_LABEL && fixp->fx_pcrel) | |
3085 | { | |
3086 | rel->addend = 0; | |
3087 | rel->address = rel->addend = fixp->fx_offset; | |
3088 | } | |
252b5132 RH |
3089 | else if (fixp->fx_pcrel) |
3090 | rel->addend = fixp->fx_addnumber; | |
3091 | else | |
3092 | rel->addend = 0; | |
3093 | ||
3094 | rel->howto = bfd_reloc_type_lookup (stdoutput, r_type); | |
3095 | if (rel->howto == NULL) | |
3096 | { | |
3097 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
3098 | _("Cannot represent relocation type %s"), | |
3099 | bfd_get_reloc_code_name (r_type)); | |
3100 | /* Set howto to a garbage value so that we can keep going. */ | |
3101 | rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32); | |
3102 | assert (rel->howto != NULL); | |
3103 | } | |
3104 | ||
3105 | return rel; | |
3106 | } | |
3107 | ||
3108 | #endif /* BFD_ASSEMBLER */ |