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252b5132 | 1 | /* tc-sparc.c -- Assemble for the SPARC |
49309057 | 2 | Copyright (C) 1989, 90-96, 97, 98, 1999 Free Software Foundation, Inc. |
252b5132 RH |
3 | This file is part of GAS, the GNU Assembler. |
4 | ||
5 | GAS is free software; you can redistribute it and/or modify | |
6 | it under the terms of the GNU General Public License as published by | |
7 | the Free Software Foundation; either version 2, or (at your option) | |
8 | any later version. | |
9 | ||
10 | GAS is distributed in the hope that it will be useful, | |
11 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | GNU General Public License for more details. | |
14 | ||
15 | You should have received a copy of the GNU General Public | |
16 | License along with GAS; see the file COPYING. If not, write | |
17 | to the Free Software Foundation, 59 Temple Place - Suite 330, | |
18 | Boston, MA 02111-1307, USA. */ | |
19 | ||
20 | #include <stdio.h> | |
21 | #include <ctype.h> | |
22 | ||
23 | #include "as.h" | |
24 | #include "subsegs.h" | |
25 | ||
26 | #include "opcode/sparc.h" | |
27 | ||
28 | #ifdef OBJ_ELF | |
29 | #include "elf/sparc.h" | |
30 | #endif | |
31 | ||
32 | static struct sparc_arch *lookup_arch PARAMS ((char *)); | |
33 | static void init_default_arch PARAMS ((void)); | |
34 | static void sparc_ip PARAMS ((char *, const struct sparc_opcode **)); | |
35 | static int in_signed_range PARAMS ((bfd_signed_vma, bfd_signed_vma)); | |
36 | static int in_unsigned_range PARAMS ((bfd_vma, bfd_vma)); | |
37 | static int in_bitfield_range PARAMS ((bfd_signed_vma, bfd_signed_vma)); | |
38 | static int sparc_ffs PARAMS ((unsigned int)); | |
39 | static bfd_vma BSR PARAMS ((bfd_vma, int)); | |
40 | static int cmp_reg_entry PARAMS ((const PTR, const PTR)); | |
41 | static int parse_keyword_arg PARAMS ((int (*) (const char *), char **, int *)); | |
42 | static int parse_const_expr_arg PARAMS ((char **, int *)); | |
43 | static int get_expression PARAMS ((char *str)); | |
44 | ||
45 | /* Default architecture. */ | |
46 | /* ??? The default value should be V8, but sparclite support was added | |
47 | by making it the default. GCC now passes -Asparclite, so maybe sometime in | |
48 | the future we can set this to V8. */ | |
49 | #ifndef DEFAULT_ARCH | |
50 | #define DEFAULT_ARCH "sparclite" | |
51 | #endif | |
52 | static char *default_arch = DEFAULT_ARCH; | |
53 | ||
54 | /* Non-zero if the initial values of `max_architecture' and `sparc_arch_size' | |
55 | have been set. */ | |
56 | static int default_init_p; | |
57 | ||
58 | /* Current architecture. We don't bump up unless necessary. */ | |
59 | static enum sparc_opcode_arch_val current_architecture = SPARC_OPCODE_ARCH_V6; | |
60 | ||
61 | /* The maximum architecture level we can bump up to. | |
62 | In a 32 bit environment, don't allow bumping up to v9 by default. | |
63 | The native assembler works this way. The user is required to pass | |
64 | an explicit argument before we'll create v9 object files. However, if | |
65 | we don't see any v9 insns, a v8plus object file is not created. */ | |
66 | static enum sparc_opcode_arch_val max_architecture; | |
67 | ||
68 | /* Either 32 or 64, selects file format. */ | |
69 | static int sparc_arch_size; | |
70 | /* Initial (default) value, recorded separately in case a user option | |
71 | changes the value before md_show_usage is called. */ | |
72 | static int default_arch_size; | |
73 | ||
74 | #ifdef OBJ_ELF | |
75 | /* The currently selected v9 memory model. Currently only used for | |
76 | ELF. */ | |
77 | static enum { MM_TSO, MM_PSO, MM_RMO } sparc_memory_model = MM_RMO; | |
78 | #endif | |
79 | ||
80 | static int architecture_requested; | |
81 | static int warn_on_bump; | |
82 | ||
83 | /* If warn_on_bump and the needed architecture is higher than this | |
84 | architecture, issue a warning. */ | |
85 | static enum sparc_opcode_arch_val warn_after_architecture; | |
86 | ||
87 | /* Non-zero if we are generating PIC code. */ | |
88 | int sparc_pic_code; | |
89 | ||
90 | /* Non-zero if we should give an error when misaligned data is seen. */ | |
91 | static int enforce_aligned_data; | |
92 | ||
93 | extern int target_big_endian; | |
94 | ||
95 | static int target_little_endian_data; | |
96 | ||
97 | /* V9 and 86x have big and little endian data, but instructions are always big | |
98 | endian. The sparclet has bi-endian support but both data and insns have | |
99 | the same endianness. Global `target_big_endian' is used for data. | |
100 | The following macro is used for instructions. */ | |
101 | #ifndef INSN_BIG_ENDIAN | |
102 | #define INSN_BIG_ENDIAN (target_big_endian \ | |
103 | || default_arch_type == sparc86x \ | |
104 | || SPARC_OPCODE_ARCH_V9_P (max_architecture)) | |
105 | #endif | |
106 | ||
107 | /* handle of the OPCODE hash table */ | |
108 | static struct hash_control *op_hash; | |
109 | ||
110 | static int log2 PARAMS ((int)); | |
111 | static void s_data1 PARAMS ((void)); | |
112 | static void s_seg PARAMS ((int)); | |
113 | static void s_proc PARAMS ((int)); | |
114 | static void s_reserve PARAMS ((int)); | |
115 | static void s_common PARAMS ((int)); | |
116 | static void s_empty PARAMS ((int)); | |
117 | static void s_uacons PARAMS ((int)); | |
cf9a1301 | 118 | static void s_ncons PARAMS ((int)); |
252b5132 RH |
119 | |
120 | const pseudo_typeS md_pseudo_table[] = | |
121 | { | |
122 | {"align", s_align_bytes, 0}, /* Defaulting is invalid (0) */ | |
123 | {"common", s_common, 0}, | |
124 | {"empty", s_empty, 0}, | |
125 | {"global", s_globl, 0}, | |
126 | {"half", cons, 2}, | |
cf9a1301 | 127 | {"nword", s_ncons, 0}, |
252b5132 RH |
128 | {"optim", s_ignore, 0}, |
129 | {"proc", s_proc, 0}, | |
130 | {"reserve", s_reserve, 0}, | |
131 | {"seg", s_seg, 0}, | |
132 | {"skip", s_space, 0}, | |
133 | {"word", cons, 4}, | |
134 | {"xword", cons, 8}, | |
135 | {"uahalf", s_uacons, 2}, | |
136 | {"uaword", s_uacons, 4}, | |
137 | {"uaxword", s_uacons, 8}, | |
138 | #ifdef OBJ_ELF | |
139 | /* these are specific to sparc/svr4 */ | |
140 | {"pushsection", obj_elf_section, 0}, | |
141 | {"popsection", obj_elf_previous, 0}, | |
142 | {"2byte", s_uacons, 2}, | |
143 | {"4byte", s_uacons, 4}, | |
144 | {"8byte", s_uacons, 8}, | |
145 | #endif | |
146 | {NULL, 0, 0}, | |
147 | }; | |
148 | ||
149 | const int md_reloc_size = 12; /* Size of relocation record */ | |
150 | ||
151 | /* This array holds the chars that always start a comment. If the | |
152 | pre-processor is disabled, these aren't very useful */ | |
153 | const char comment_chars[] = "!"; /* JF removed '|' from comment_chars */ | |
154 | ||
155 | /* This array holds the chars that only start a comment at the beginning of | |
156 | a line. If the line seems to have the form '# 123 filename' | |
157 | .line and .file directives will appear in the pre-processed output */ | |
158 | /* Note that input_file.c hand checks for '#' at the beginning of the | |
159 | first line of the input file. This is because the compiler outputs | |
160 | #NO_APP at the beginning of its output. */ | |
161 | /* Also note that comments started like this one will always | |
162 | work if '/' isn't otherwise defined. */ | |
163 | const char line_comment_chars[] = "#"; | |
164 | ||
165 | const char line_separator_chars[] = ""; | |
166 | ||
167 | /* Chars that can be used to separate mant from exp in floating point nums */ | |
168 | const char EXP_CHARS[] = "eE"; | |
169 | ||
170 | /* Chars that mean this number is a floating point constant */ | |
171 | /* As in 0f12.456 */ | |
172 | /* or 0d1.2345e12 */ | |
173 | const char FLT_CHARS[] = "rRsSfFdDxXpP"; | |
174 | ||
175 | /* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be | |
176 | changed in read.c. Ideally it shouldn't have to know about it at all, | |
177 | but nothing is ideal around here. */ | |
178 | ||
cf9a1301 | 179 | #define isoctal(c) ((c) >= '0' && (c) < '8') |
252b5132 RH |
180 | |
181 | struct sparc_it | |
182 | { | |
183 | char *error; | |
184 | unsigned long opcode; | |
185 | struct nlist *nlistp; | |
186 | expressionS exp; | |
cf9a1301 | 187 | expressionS exp2; |
252b5132 RH |
188 | int pcrel; |
189 | bfd_reloc_code_real_type reloc; | |
190 | }; | |
191 | ||
192 | struct sparc_it the_insn, set_insn; | |
193 | ||
194 | static void output_insn | |
195 | PARAMS ((const struct sparc_opcode *, struct sparc_it *)); | |
196 | \f | |
197 | /* Table of arguments to -A. | |
198 | The sparc_opcode_arch table in sparc-opc.c is insufficient and incorrect | |
199 | for this use. That table is for opcodes only. This table is for opcodes | |
200 | and file formats. */ | |
201 | ||
202 | enum sparc_arch_types {v6, v7, v8, sparclet, sparclite, sparc86x, v8plus, | |
203 | v8plusa, v9, v9a, v9_64}; | |
204 | ||
205 | static struct sparc_arch { | |
206 | char *name; | |
207 | char *opcode_arch; | |
208 | enum sparc_arch_types arch_type; | |
209 | /* Default word size, as specified during configuration. | |
210 | A value of zero means can't be used to specify default architecture. */ | |
211 | int default_arch_size; | |
212 | /* Allowable arg to -A? */ | |
213 | int user_option_p; | |
214 | } sparc_arch_table[] = { | |
215 | { "v6", "v6", v6, 0, 1 }, | |
216 | { "v7", "v7", v7, 0, 1 }, | |
217 | { "v8", "v8", v8, 32, 1 }, | |
218 | { "sparclet", "sparclet", sparclet, 32, 1 }, | |
219 | { "sparclite", "sparclite", sparclite, 32, 1 }, | |
220 | { "sparc86x", "sparclite", sparc86x, 32, 1 }, | |
221 | { "v8plus", "v9", v9, 0, 1 }, | |
222 | { "v8plusa", "v9a", v9, 0, 1 }, | |
223 | { "v9", "v9", v9, 0, 1 }, | |
224 | { "v9a", "v9a", v9, 0, 1 }, | |
225 | /* This exists to allow configure.in/Makefile.in to pass one | |
226 | value to specify both the default machine and default word size. */ | |
227 | { "v9-64", "v9", v9, 64, 0 }, | |
228 | { NULL, NULL, v8, 0, 0 } | |
229 | }; | |
230 | ||
231 | /* Variant of default_arch */ | |
232 | static enum sparc_arch_types default_arch_type; | |
233 | ||
234 | static struct sparc_arch * | |
235 | lookup_arch (name) | |
236 | char *name; | |
237 | { | |
238 | struct sparc_arch *sa; | |
239 | ||
240 | for (sa = &sparc_arch_table[0]; sa->name != NULL; sa++) | |
241 | if (strcmp (sa->name, name) == 0) | |
242 | break; | |
243 | if (sa->name == NULL) | |
244 | return NULL; | |
245 | return sa; | |
246 | } | |
247 | ||
248 | /* Initialize the default opcode arch and word size from the default | |
249 | architecture name. */ | |
250 | ||
251 | static void | |
252 | init_default_arch () | |
253 | { | |
254 | struct sparc_arch *sa = lookup_arch (default_arch); | |
255 | ||
256 | if (sa == NULL | |
257 | || sa->default_arch_size == 0) | |
258 | as_fatal (_("Invalid default architecture, broken assembler.")); | |
259 | ||
260 | max_architecture = sparc_opcode_lookup_arch (sa->opcode_arch); | |
261 | if (max_architecture == SPARC_OPCODE_ARCH_BAD) | |
262 | as_fatal (_("Bad opcode table, broken assembler.")); | |
263 | default_arch_size = sparc_arch_size = sa->default_arch_size; | |
264 | default_init_p = 1; | |
265 | default_arch_type = sa->arch_type; | |
266 | } | |
267 | ||
268 | /* Called by TARGET_FORMAT. */ | |
269 | ||
270 | const char * | |
271 | sparc_target_format () | |
272 | { | |
273 | /* We don't get a chance to initialize anything before we're called, | |
274 | so handle that now. */ | |
275 | if (! default_init_p) | |
276 | init_default_arch (); | |
277 | ||
278 | #ifdef OBJ_AOUT | |
279 | #ifdef TE_NetBSD | |
280 | return "a.out-sparc-netbsd"; | |
281 | #else | |
282 | #ifdef TE_SPARCAOUT | |
283 | if (target_big_endian) | |
284 | return "a.out-sunos-big"; | |
285 | else if (default_arch_type == sparc86x && target_little_endian_data) | |
286 | return "a.out-sunos-big"; | |
287 | else return "a.out-sparc-little"; | |
288 | #else | |
289 | return "a.out-sunos-big"; | |
290 | #endif | |
291 | #endif | |
292 | #endif | |
293 | ||
294 | #ifdef OBJ_BOUT | |
295 | return "b.out.big"; | |
296 | #endif | |
297 | ||
298 | #ifdef OBJ_COFF | |
299 | #ifdef TE_LYNX | |
300 | return "coff-sparc-lynx"; | |
301 | #else | |
302 | return "coff-sparc"; | |
303 | #endif | |
304 | #endif | |
305 | ||
306 | #ifdef OBJ_ELF | |
307 | return sparc_arch_size == 64 ? "elf64-sparc" : "elf32-sparc"; | |
308 | #endif | |
309 | ||
310 | abort (); | |
311 | } | |
312 | \f | |
313 | /* | |
314 | * md_parse_option | |
315 | * Invocation line includes a switch not recognized by the base assembler. | |
316 | * See if it's a processor-specific option. These are: | |
317 | * | |
318 | * -bump | |
319 | * Warn on architecture bumps. See also -A. | |
320 | * | |
321 | * -Av6, -Av7, -Av8, -Asparclite, -Asparclet | |
322 | * Standard 32 bit architectures. | |
323 | * -Av8plus, -Av8plusa | |
324 | * Sparc64 in a 32 bit world. | |
325 | * -Av9, -Av9a | |
326 | * Sparc64 in either a 32 or 64 bit world (-32/-64 says which). | |
327 | * This used to only mean 64 bits, but properly specifying it | |
328 | * complicated gcc's ASM_SPECs, so now opcode selection is | |
329 | * specified orthogonally to word size (except when specifying | |
330 | * the default, but that is an internal implementation detail). | |
331 | * -xarch=v8plus, -xarch=v8plusa | |
332 | * Same as -Av8plus{,a}, for compatibility with Sun's assembler. | |
333 | * | |
334 | * Select the architecture and possibly the file format. | |
335 | * Instructions or features not supported by the selected | |
336 | * architecture cause fatal errors. | |
337 | * | |
338 | * The default is to start at v6, and bump the architecture up | |
339 | * whenever an instruction is seen at a higher level. In 32 bit | |
340 | * environments, v9 is not bumped up to, the user must pass | |
341 | * -Av8plus{,a}. | |
342 | * | |
343 | * If -bump is specified, a warning is printing when bumping to | |
344 | * higher levels. | |
345 | * | |
346 | * If an architecture is specified, all instructions must match | |
347 | * that architecture. Any higher level instructions are flagged | |
348 | * as errors. Note that in the 32 bit environment specifying | |
349 | * -Av8plus does not automatically create a v8plus object file, a | |
350 | * v9 insn must be seen. | |
351 | * | |
352 | * If both an architecture and -bump are specified, the | |
353 | * architecture starts at the specified level, but bumps are | |
354 | * warnings. Note that we can't set `current_architecture' to | |
355 | * the requested level in this case: in the 32 bit environment, | |
356 | * we still must avoid creating v8plus object files unless v9 | |
357 | * insns are seen. | |
358 | * | |
359 | * Note: | |
360 | * Bumping between incompatible architectures is always an | |
361 | * error. For example, from sparclite to v9. | |
362 | */ | |
363 | ||
364 | #ifdef OBJ_ELF | |
365 | CONST char *md_shortopts = "A:K:VQ:sq"; | |
366 | #else | |
367 | #ifdef OBJ_AOUT | |
368 | CONST char *md_shortopts = "A:k"; | |
369 | #else | |
370 | CONST char *md_shortopts = "A:"; | |
371 | #endif | |
372 | #endif | |
373 | struct option md_longopts[] = { | |
374 | #define OPTION_BUMP (OPTION_MD_BASE) | |
375 | {"bump", no_argument, NULL, OPTION_BUMP}, | |
376 | #define OPTION_SPARC (OPTION_MD_BASE + 1) | |
377 | {"sparc", no_argument, NULL, OPTION_SPARC}, | |
378 | #define OPTION_XARCH (OPTION_MD_BASE + 2) | |
379 | {"xarch", required_argument, NULL, OPTION_XARCH}, | |
380 | #ifdef OBJ_ELF | |
381 | #define OPTION_32 (OPTION_MD_BASE + 3) | |
382 | {"32", no_argument, NULL, OPTION_32}, | |
383 | #define OPTION_64 (OPTION_MD_BASE + 4) | |
384 | {"64", no_argument, NULL, OPTION_64}, | |
385 | #define OPTION_TSO (OPTION_MD_BASE + 5) | |
386 | {"TSO", no_argument, NULL, OPTION_TSO}, | |
387 | #define OPTION_PSO (OPTION_MD_BASE + 6) | |
388 | {"PSO", no_argument, NULL, OPTION_PSO}, | |
389 | #define OPTION_RMO (OPTION_MD_BASE + 7) | |
390 | {"RMO", no_argument, NULL, OPTION_RMO}, | |
391 | #endif | |
392 | #ifdef SPARC_BIENDIAN | |
393 | #define OPTION_LITTLE_ENDIAN (OPTION_MD_BASE + 8) | |
394 | {"EL", no_argument, NULL, OPTION_LITTLE_ENDIAN}, | |
395 | #define OPTION_BIG_ENDIAN (OPTION_MD_BASE + 9) | |
396 | {"EB", no_argument, NULL, OPTION_BIG_ENDIAN}, | |
397 | #endif | |
398 | #define OPTION_ENFORCE_ALIGNED_DATA (OPTION_MD_BASE + 10) | |
399 | {"enforce-aligned-data", no_argument, NULL, OPTION_ENFORCE_ALIGNED_DATA}, | |
400 | #define OPTION_LITTLE_ENDIAN_DATA (OPTION_MD_BASE + 11) | |
401 | {"little-endian-data", no_argument, NULL, OPTION_LITTLE_ENDIAN_DATA}, | |
402 | {NULL, no_argument, NULL, 0} | |
403 | }; | |
404 | size_t md_longopts_size = sizeof(md_longopts); | |
405 | ||
406 | int | |
407 | md_parse_option (c, arg) | |
408 | int c; | |
409 | char *arg; | |
410 | { | |
411 | /* We don't get a chance to initialize anything before we're called, | |
412 | so handle that now. */ | |
413 | if (! default_init_p) | |
414 | init_default_arch (); | |
415 | ||
416 | switch (c) | |
417 | { | |
418 | case OPTION_BUMP: | |
419 | warn_on_bump = 1; | |
420 | warn_after_architecture = SPARC_OPCODE_ARCH_V6; | |
421 | break; | |
422 | ||
423 | case OPTION_XARCH: | |
424 | /* This is for compatibility with Sun's assembler. */ | |
425 | if (strcmp (arg, "v8plus") != 0 | |
426 | && strcmp (arg, "v8plusa") != 0) | |
427 | { | |
428 | as_bad (_("invalid architecture -xarch=%s"), arg); | |
429 | return 0; | |
430 | } | |
431 | ||
432 | /* fall through */ | |
433 | ||
434 | case 'A': | |
435 | { | |
436 | struct sparc_arch *sa; | |
437 | enum sparc_opcode_arch_val opcode_arch; | |
438 | ||
439 | sa = lookup_arch (arg); | |
440 | if (sa == NULL | |
441 | || ! sa->user_option_p) | |
442 | { | |
443 | as_bad (_("invalid architecture -A%s"), arg); | |
444 | return 0; | |
445 | } | |
446 | ||
447 | opcode_arch = sparc_opcode_lookup_arch (sa->opcode_arch); | |
448 | if (opcode_arch == SPARC_OPCODE_ARCH_BAD) | |
449 | as_fatal (_("Bad opcode table, broken assembler.")); | |
450 | ||
451 | max_architecture = opcode_arch; | |
452 | architecture_requested = 1; | |
453 | } | |
454 | break; | |
455 | ||
456 | case OPTION_SPARC: | |
457 | /* Ignore -sparc, used by SunOS make default .s.o rule. */ | |
458 | break; | |
459 | ||
460 | case OPTION_ENFORCE_ALIGNED_DATA: | |
461 | enforce_aligned_data = 1; | |
462 | break; | |
463 | ||
464 | #ifdef SPARC_BIENDIAN | |
465 | case OPTION_LITTLE_ENDIAN: | |
466 | target_big_endian = 0; | |
467 | if (default_arch_type != sparclet) | |
468 | as_fatal ("This target does not support -EL"); | |
469 | break; | |
470 | case OPTION_LITTLE_ENDIAN_DATA: | |
471 | target_little_endian_data = 1; | |
472 | target_big_endian = 0; | |
473 | if (default_arch_type != sparc86x | |
474 | && default_arch_type != v9) | |
475 | as_fatal ("This target does not support --little-endian-data"); | |
476 | break; | |
477 | case OPTION_BIG_ENDIAN: | |
478 | target_big_endian = 1; | |
479 | break; | |
480 | #endif | |
481 | ||
482 | #ifdef OBJ_AOUT | |
483 | case 'k': | |
484 | sparc_pic_code = 1; | |
485 | break; | |
486 | #endif | |
487 | ||
488 | #ifdef OBJ_ELF | |
489 | case OPTION_32: | |
490 | case OPTION_64: | |
491 | { | |
492 | const char **list, **l; | |
493 | ||
494 | sparc_arch_size = c == OPTION_32 ? 32 : 64; | |
495 | list = bfd_target_list (); | |
496 | for (l = list; *l != NULL; l++) | |
497 | { | |
498 | if (sparc_arch_size == 32) | |
499 | { | |
500 | if (strcmp (*l, "elf32-sparc") == 0) | |
501 | break; | |
502 | } | |
503 | else | |
504 | { | |
505 | if (strcmp (*l, "elf64-sparc") == 0) | |
506 | break; | |
507 | } | |
508 | } | |
509 | if (*l == NULL) | |
510 | as_fatal (_("No compiled in support for %d bit object file format"), | |
511 | sparc_arch_size); | |
512 | free (list); | |
513 | } | |
514 | break; | |
515 | ||
516 | case OPTION_TSO: | |
517 | sparc_memory_model = MM_TSO; | |
518 | break; | |
519 | ||
520 | case OPTION_PSO: | |
521 | sparc_memory_model = MM_PSO; | |
522 | break; | |
523 | ||
524 | case OPTION_RMO: | |
525 | sparc_memory_model = MM_RMO; | |
526 | break; | |
527 | ||
528 | case 'V': | |
529 | print_version_id (); | |
530 | break; | |
531 | ||
532 | case 'Q': | |
533 | /* Qy - do emit .comment | |
534 | Qn - do not emit .comment */ | |
535 | break; | |
536 | ||
537 | case 's': | |
538 | /* use .stab instead of .stab.excl */ | |
539 | break; | |
540 | ||
541 | case 'q': | |
542 | /* quick -- native assembler does fewer checks */ | |
543 | break; | |
544 | ||
545 | case 'K': | |
546 | if (strcmp (arg, "PIC") != 0) | |
547 | as_warn (_("Unrecognized option following -K")); | |
548 | else | |
549 | sparc_pic_code = 1; | |
550 | break; | |
551 | #endif | |
552 | ||
553 | default: | |
554 | return 0; | |
555 | } | |
556 | ||
557 | return 1; | |
558 | } | |
559 | ||
560 | void | |
561 | md_show_usage (stream) | |
562 | FILE *stream; | |
563 | { | |
564 | const struct sparc_arch *arch; | |
565 | ||
566 | /* We don't get a chance to initialize anything before we're called, | |
567 | so handle that now. */ | |
568 | if (! default_init_p) | |
569 | init_default_arch (); | |
570 | ||
571 | fprintf(stream, _("SPARC options:\n")); | |
572 | for (arch = &sparc_arch_table[0]; arch->name; arch++) | |
573 | { | |
574 | if (arch != &sparc_arch_table[0]) | |
575 | fprintf (stream, " | "); | |
576 | if (arch->user_option_p) | |
577 | fprintf (stream, "-A%s", arch->name); | |
578 | } | |
579 | fprintf (stream, _("\n-xarch=v8plus | -xarch=v8plusa\n")); | |
580 | fprintf (stream, _("\ | |
581 | specify variant of SPARC architecture\n\ | |
582 | -bump warn when assembler switches architectures\n\ | |
583 | -sparc ignored\n\ | |
584 | --enforce-aligned-data force .long, etc., to be aligned correctly\n")); | |
585 | #ifdef OBJ_AOUT | |
586 | fprintf (stream, _("\ | |
587 | -k generate PIC\n")); | |
588 | #endif | |
589 | #ifdef OBJ_ELF | |
590 | fprintf (stream, _("\ | |
591 | -32 create 32 bit object file\n\ | |
592 | -64 create 64 bit object file\n")); | |
593 | fprintf (stream, _("\ | |
594 | [default is %d]\n"), default_arch_size); | |
595 | fprintf (stream, _("\ | |
596 | -TSO use Total Store Ordering\n\ | |
597 | -PSO use Partial Store Ordering\n\ | |
598 | -RMO use Relaxed Memory Ordering\n")); | |
599 | fprintf (stream, _("\ | |
600 | [default is %s]\n"), (default_arch_size == 64) ? "RMO" : "TSO"); | |
601 | fprintf (stream, _("\ | |
602 | -KPIC generate PIC\n\ | |
603 | -V print assembler version number\n\ | |
604 | -q ignored\n\ | |
605 | -Qy, -Qn ignored\n\ | |
606 | -s ignored\n")); | |
607 | #endif | |
608 | #ifdef SPARC_BIENDIAN | |
609 | fprintf (stream, _("\ | |
610 | -EL generate code for a little endian machine\n\ | |
611 | -EB generate code for a big endian machine\n\ | |
612 | --little-endian-data generate code for a machine having big endian\n\ | |
613 | instructions and little endian data.")); | |
614 | #endif | |
615 | } | |
616 | \f | |
cf9a1301 RH |
617 | /* native operand size opcode translation */ |
618 | struct | |
619 | { | |
620 | char *name; | |
621 | char *name32; | |
622 | char *name64; | |
623 | } native_op_table[] = | |
624 | { | |
625 | {"ldn", "ld", "ldx"}, | |
626 | {"ldna", "lda", "ldxa"}, | |
627 | {"stn", "st", "stx"}, | |
628 | {"stna", "sta", "stxa"}, | |
629 | {"slln", "sll", "sllx"}, | |
630 | {"srln", "srl", "srlx"}, | |
631 | {"sran", "sra", "srax"}, | |
632 | {"casn", "cas", "casx"}, | |
633 | {"casna", "casa", "casxa"}, | |
634 | {"clrn", "clr", "clrx"}, | |
635 | {NULL, NULL, NULL}, | |
636 | }; | |
637 | \f | |
252b5132 RH |
638 | /* sparc64 priviledged registers */ |
639 | ||
640 | struct priv_reg_entry | |
641 | { | |
642 | char *name; | |
643 | int regnum; | |
644 | }; | |
645 | ||
646 | struct priv_reg_entry priv_reg_table[] = | |
647 | { | |
648 | {"tpc", 0}, | |
649 | {"tnpc", 1}, | |
650 | {"tstate", 2}, | |
651 | {"tt", 3}, | |
652 | {"tick", 4}, | |
653 | {"tba", 5}, | |
654 | {"pstate", 6}, | |
655 | {"tl", 7}, | |
656 | {"pil", 8}, | |
657 | {"cwp", 9}, | |
658 | {"cansave", 10}, | |
659 | {"canrestore", 11}, | |
660 | {"cleanwin", 12}, | |
661 | {"otherwin", 13}, | |
662 | {"wstate", 14}, | |
663 | {"fq", 15}, | |
664 | {"ver", 31}, | |
665 | {"", -1}, /* end marker */ | |
666 | }; | |
667 | ||
668 | /* v9a specific asrs */ | |
669 | ||
670 | struct priv_reg_entry v9a_asr_table[] = | |
671 | { | |
672 | {"tick_cmpr", 23}, | |
673 | {"softint", 22}, | |
674 | {"set_softint", 20}, | |
675 | {"pic", 17}, | |
676 | {"pcr", 16}, | |
677 | {"gsr", 19}, | |
678 | {"dcr", 18}, | |
679 | {"clear_softint", 21}, | |
680 | {"", -1}, /* end marker */ | |
681 | }; | |
682 | ||
683 | static int | |
684 | cmp_reg_entry (parg, qarg) | |
685 | const PTR parg; | |
686 | const PTR qarg; | |
687 | { | |
688 | const struct priv_reg_entry *p = (const struct priv_reg_entry *) parg; | |
689 | const struct priv_reg_entry *q = (const struct priv_reg_entry *) qarg; | |
690 | ||
691 | return strcmp (q->name, p->name); | |
692 | } | |
693 | \f | |
694 | /* This function is called once, at assembler startup time. It should | |
695 | set up all the tables, etc. that the MD part of the assembler will need. */ | |
696 | ||
697 | void | |
698 | md_begin () | |
699 | { | |
700 | register const char *retval = NULL; | |
701 | int lose = 0; | |
702 | register unsigned int i = 0; | |
703 | ||
704 | /* We don't get a chance to initialize anything before md_parse_option | |
705 | is called, and it may not be called, so handle default initialization | |
706 | now if not already done. */ | |
707 | if (! default_init_p) | |
708 | init_default_arch (); | |
709 | ||
710 | op_hash = hash_new (); | |
711 | ||
712 | while (i < (unsigned int) sparc_num_opcodes) | |
713 | { | |
714 | const char *name = sparc_opcodes[i].name; | |
715 | retval = hash_insert (op_hash, name, (PTR) &sparc_opcodes[i]); | |
716 | if (retval != NULL) | |
717 | { | |
cf9a1301 RH |
718 | as_bad (_("Internal error: can't hash `%s': %s\n"), |
719 | sparc_opcodes[i].name, retval); | |
252b5132 RH |
720 | lose = 1; |
721 | } | |
722 | do | |
723 | { | |
724 | if (sparc_opcodes[i].match & sparc_opcodes[i].lose) | |
725 | { | |
cf9a1301 RH |
726 | as_bad (_("Internal error: losing opcode: `%s' \"%s\"\n"), |
727 | sparc_opcodes[i].name, sparc_opcodes[i].args); | |
252b5132 RH |
728 | lose = 1; |
729 | } | |
730 | ++i; | |
731 | } | |
732 | while (i < (unsigned int) sparc_num_opcodes | |
733 | && !strcmp (sparc_opcodes[i].name, name)); | |
734 | } | |
735 | ||
cf9a1301 RH |
736 | for (i = 0; native_op_table[i].name; i++) |
737 | { | |
738 | const struct sparc_opcode *insn; | |
739 | char *name = sparc_arch_size == 32 ? native_op_table[i].name32 : | |
740 | native_op_table[i].name64; | |
741 | insn = (struct sparc_opcode *)hash_find (op_hash, name); | |
742 | if (insn == NULL) | |
743 | { | |
744 | as_bad (_("Internal error: can't find opcode `%s' for `%s'\n"), | |
745 | name, native_op_table[i].name); | |
746 | lose = 1; | |
747 | } | |
748 | else | |
749 | { | |
750 | retval = hash_insert (op_hash, native_op_table[i].name, (PTR) insn); | |
751 | if (retval != NULL) | |
752 | { | |
753 | as_bad (_("Internal error: can't hash `%s': %s\n"), | |
754 | sparc_opcodes[i].name, retval); | |
755 | lose = 1; | |
756 | } | |
757 | } | |
758 | } | |
759 | ||
252b5132 RH |
760 | if (lose) |
761 | as_fatal (_("Broken assembler. No assembly attempted.")); | |
762 | ||
252b5132 RH |
763 | qsort (priv_reg_table, sizeof (priv_reg_table) / sizeof (priv_reg_table[0]), |
764 | sizeof (priv_reg_table[0]), cmp_reg_entry); | |
765 | ||
766 | /* If -bump, record the architecture level at which we start issuing | |
767 | warnings. The behaviour is different depending upon whether an | |
768 | architecture was explicitly specified. If it wasn't, we issue warnings | |
769 | for all upwards bumps. If it was, we don't start issuing warnings until | |
770 | we need to bump beyond the requested architecture or when we bump between | |
771 | conflicting architectures. */ | |
772 | ||
773 | if (warn_on_bump | |
774 | && architecture_requested) | |
775 | { | |
776 | /* `max_architecture' records the requested architecture. | |
777 | Issue warnings if we go above it. */ | |
778 | warn_after_architecture = max_architecture; | |
779 | ||
780 | /* Find the highest architecture level that doesn't conflict with | |
781 | the requested one. */ | |
782 | for (max_architecture = SPARC_OPCODE_ARCH_MAX; | |
783 | max_architecture > warn_after_architecture; | |
784 | --max_architecture) | |
785 | if (! SPARC_OPCODE_CONFLICT_P (max_architecture, | |
786 | warn_after_architecture)) | |
787 | break; | |
788 | } | |
789 | } | |
790 | ||
791 | /* Called after all assembly has been done. */ | |
792 | ||
793 | void | |
794 | sparc_md_end () | |
795 | { | |
796 | if (sparc_arch_size == 64) | |
797 | { | |
798 | if (current_architecture == SPARC_OPCODE_ARCH_V9A) | |
799 | bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc_v9a); | |
800 | else | |
801 | bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc_v9); | |
802 | } | |
803 | else | |
804 | { | |
805 | if (current_architecture == SPARC_OPCODE_ARCH_V9) | |
806 | bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc_v8plus); | |
807 | else if (current_architecture == SPARC_OPCODE_ARCH_V9A) | |
808 | bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc_v8plusa); | |
809 | else if (current_architecture == SPARC_OPCODE_ARCH_SPARCLET) | |
810 | bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc_sparclet); | |
811 | else if (default_arch_type == sparc86x && target_little_endian_data) | |
812 | bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc_sparclite_le); | |
813 | else | |
814 | { | |
815 | /* The sparclite is treated like a normal sparc. Perhaps it shouldn't | |
816 | be but for now it is (since that's the way it's always been | |
817 | treated). */ | |
818 | bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc); | |
819 | } | |
820 | } | |
821 | } | |
822 | \f | |
823 | /* Return non-zero if VAL is in the range -(MAX+1) to MAX. */ | |
824 | ||
825 | static INLINE int | |
826 | in_signed_range (val, max) | |
827 | bfd_signed_vma val, max; | |
828 | { | |
829 | if (max <= 0) | |
830 | abort (); | |
831 | /* Sign-extend the value from the architecture word size, so that | |
832 | 0xffffffff is always considered -1 on sparc32. */ | |
833 | if (sparc_arch_size == 32) | |
834 | { | |
835 | bfd_signed_vma sign = (bfd_signed_vma)1 << 31; | |
836 | val = ((val & 0xffffffff) ^ sign) - sign; | |
837 | } | |
838 | if (val > max) | |
839 | return 0; | |
840 | if (val < ~max) | |
841 | return 0; | |
842 | return 1; | |
843 | } | |
844 | ||
845 | /* Return non-zero if VAL is in the range 0 to MAX. */ | |
846 | ||
847 | static INLINE int | |
848 | in_unsigned_range (val, max) | |
849 | bfd_vma val, max; | |
850 | { | |
851 | if (val > max) | |
852 | return 0; | |
853 | return 1; | |
854 | } | |
855 | ||
856 | /* Return non-zero if VAL is in the range -(MAX/2+1) to MAX. | |
857 | (e.g. -15 to +31). */ | |
858 | ||
859 | static INLINE int | |
860 | in_bitfield_range (val, max) | |
861 | bfd_signed_vma val, max; | |
862 | { | |
863 | if (max <= 0) | |
864 | abort (); | |
865 | if (val > max) | |
866 | return 0; | |
867 | if (val < ~(max >> 1)) | |
868 | return 0; | |
869 | return 1; | |
870 | } | |
871 | ||
872 | static int | |
873 | sparc_ffs (mask) | |
874 | unsigned int mask; | |
875 | { | |
876 | int i; | |
877 | ||
878 | if (mask == 0) | |
879 | return -1; | |
880 | ||
881 | for (i = 0; (mask & 1) == 0; ++i) | |
882 | mask >>= 1; | |
883 | return i; | |
884 | } | |
885 | ||
886 | /* Implement big shift right. */ | |
887 | static bfd_vma | |
888 | BSR (val, amount) | |
889 | bfd_vma val; | |
890 | int amount; | |
891 | { | |
892 | if (sizeof (bfd_vma) <= 4 && amount >= 32) | |
893 | as_fatal (_("Support for 64-bit arithmetic not compiled in.")); | |
894 | return val >> amount; | |
895 | } | |
896 | \f | |
897 | /* For communication between sparc_ip and get_expression. */ | |
898 | static char *expr_end; | |
899 | ||
900 | /* For communication between md_assemble and sparc_ip. */ | |
901 | static int special_case; | |
902 | ||
903 | /* Values for `special_case'. | |
904 | Instructions that require wierd handling because they're longer than | |
905 | 4 bytes. */ | |
906 | #define SPECIAL_CASE_NONE 0 | |
907 | #define SPECIAL_CASE_SET 1 | |
908 | #define SPECIAL_CASE_SETSW 2 | |
909 | #define SPECIAL_CASE_SETX 3 | |
910 | /* FIXME: sparc-opc.c doesn't have necessary "S" trigger to enable this. */ | |
911 | #define SPECIAL_CASE_FDIV 4 | |
912 | ||
913 | /* Bit masks of various insns. */ | |
914 | #define NOP_INSN 0x01000000 | |
915 | #define OR_INSN 0x80100000 | |
916 | #define FMOVS_INSN 0x81A00020 | |
917 | #define SETHI_INSN 0x01000000 | |
918 | #define SLLX_INSN 0x81281000 | |
919 | #define SRA_INSN 0x81380000 | |
920 | ||
921 | /* The last instruction to be assembled. */ | |
922 | static const struct sparc_opcode *last_insn; | |
923 | /* The assembled opcode of `last_insn'. */ | |
924 | static unsigned long last_opcode; | |
925 | \f | |
926 | /* Main entry point to assemble one instruction. */ | |
927 | ||
928 | void | |
929 | md_assemble (str) | |
930 | char *str; | |
931 | { | |
932 | const struct sparc_opcode *insn; | |
933 | ||
934 | know (str); | |
935 | special_case = SPECIAL_CASE_NONE; | |
936 | sparc_ip (str, &insn); | |
937 | ||
938 | /* We warn about attempts to put a floating point branch in a delay slot, | |
939 | unless the delay slot has been annulled. */ | |
940 | if (insn != NULL | |
941 | && last_insn != NULL | |
942 | && (insn->flags & F_FBR) != 0 | |
943 | && (last_insn->flags & F_DELAYED) != 0 | |
944 | /* ??? This test isn't completely accurate. We assume anything with | |
945 | F_{UNBR,CONDBR,FBR} set is annullable. */ | |
946 | && ((last_insn->flags & (F_UNBR | F_CONDBR | F_FBR)) == 0 | |
947 | || (last_opcode & ANNUL) == 0)) | |
948 | as_warn (_("FP branch in delay slot")); | |
949 | ||
950 | /* SPARC before v9 requires a nop instruction between a floating | |
951 | point instruction and a floating point branch. We insert one | |
952 | automatically, with a warning. */ | |
953 | if (max_architecture < SPARC_OPCODE_ARCH_V9 | |
954 | && insn != NULL | |
955 | && last_insn != NULL | |
956 | && (insn->flags & F_FBR) != 0 | |
957 | && (last_insn->flags & F_FLOAT) != 0) | |
958 | { | |
959 | struct sparc_it nop_insn; | |
960 | ||
961 | nop_insn.opcode = NOP_INSN; | |
962 | nop_insn.reloc = BFD_RELOC_NONE; | |
963 | output_insn (insn, &nop_insn); | |
964 | as_warn (_("FP branch preceded by FP instruction; NOP inserted")); | |
965 | } | |
966 | ||
967 | switch (special_case) | |
968 | { | |
969 | case SPECIAL_CASE_NONE: | |
970 | /* normal insn */ | |
971 | output_insn (insn, &the_insn); | |
972 | break; | |
973 | ||
974 | case SPECIAL_CASE_SET: | |
975 | { | |
976 | int need_hi22_p = 0; | |
977 | ||
978 | /* "set" is not defined for negative numbers in v9: it doesn't yield | |
979 | what you expect it to. */ | |
980 | if (SPARC_OPCODE_ARCH_V9_P (max_architecture) | |
981 | && the_insn.exp.X_op == O_constant) | |
982 | { | |
983 | if (the_insn.exp.X_add_number < 0) | |
984 | as_warn (_("set: used with negative number")); | |
985 | else if (the_insn.exp.X_add_number > (offsetT) 0xffffffff) | |
986 | as_warn (_("set: number larger than 4294967295")); | |
987 | } | |
988 | ||
989 | /* See if operand is absolute and small; skip sethi if so. */ | |
990 | if (the_insn.exp.X_op != O_constant | |
991 | || the_insn.exp.X_add_number >= (1 << 12) | |
992 | || the_insn.exp.X_add_number < -(1 << 12)) | |
993 | { | |
994 | output_insn (insn, &the_insn); | |
995 | need_hi22_p = 1; | |
996 | } | |
997 | /* See if operand has no low-order bits; skip OR if so. */ | |
998 | if (the_insn.exp.X_op != O_constant | |
999 | || (need_hi22_p && (the_insn.exp.X_add_number & 0x3FF) != 0) | |
1000 | || ! need_hi22_p) | |
1001 | { | |
1002 | int rd = (the_insn.opcode & RD (~0)) >> 25; | |
1003 | the_insn.opcode = (OR_INSN | (need_hi22_p ? RS1 (rd) : 0) | |
1004 | | RD (rd) | |
1005 | | IMMED | |
1006 | | (the_insn.exp.X_add_number | |
1007 | & (need_hi22_p ? 0x3ff : 0x1fff))); | |
1008 | the_insn.reloc = (the_insn.exp.X_op != O_constant | |
1009 | ? BFD_RELOC_LO10 | |
1010 | : BFD_RELOC_NONE); | |
1011 | output_insn (insn, &the_insn); | |
1012 | } | |
1013 | break; | |
1014 | } | |
1015 | ||
1016 | case SPECIAL_CASE_SETSW: | |
1017 | { | |
1018 | /* FIXME: Not finished. */ | |
1019 | break; | |
1020 | } | |
1021 | ||
1022 | case SPECIAL_CASE_SETX: | |
1023 | { | |
1024 | #define SIGNEXT32(x) ((((x) & 0xffffffff) ^ 0x80000000) - 0x80000000) | |
1025 | int upper32 = SIGNEXT32 (BSR (the_insn.exp.X_add_number, 32)); | |
1026 | int lower32 = SIGNEXT32 (the_insn.exp.X_add_number); | |
1027 | #undef SIGNEXT32 | |
1028 | int tmpreg = (the_insn.opcode & RS1 (~0)) >> 14; | |
1029 | int dstreg = (the_insn.opcode & RD (~0)) >> 25; | |
1030 | /* Output directly to dst reg if lower 32 bits are all zero. */ | |
1031 | int upper_dstreg = (the_insn.exp.X_op == O_constant | |
1032 | && lower32 == 0) ? dstreg : tmpreg; | |
1033 | int need_hh22_p = 0, need_hm10_p = 0, need_hi22_p = 0, need_lo10_p = 0; | |
1034 | ||
1035 | /* The tmp reg should not be the dst reg. */ | |
1036 | if (tmpreg == dstreg) | |
1037 | as_warn (_("setx: temporary register same as destination register")); | |
1038 | ||
1039 | /* Reset X_add_number, we've extracted it as upper32/lower32. | |
1040 | Otherwise fixup_segment will complain about not being able to | |
1041 | write an 8 byte number in a 4 byte field. */ | |
1042 | the_insn.exp.X_add_number = 0; | |
1043 | ||
1044 | /* ??? Obviously there are other optimizations we can do | |
1045 | (e.g. sethi+shift for 0x1f0000000) and perhaps we shouldn't be | |
1046 | doing some of these. Later. If you do change things, try to | |
1047 | change all of this to be table driven as well. */ | |
1048 | ||
1049 | /* What to output depends on the number if it's constant. | |
1050 | Compute that first, then output what we've decided upon. */ | |
1051 | if (the_insn.exp.X_op != O_constant) | |
1052 | need_hh22_p = need_hm10_p = need_hi22_p = need_lo10_p = 1; | |
1053 | else | |
1054 | { | |
1055 | /* Only need hh22 if `or' insn can't handle constant. */ | |
1056 | if (upper32 < -(1 << 12) || upper32 >= (1 << 12)) | |
1057 | need_hh22_p = 1; | |
1058 | ||
1059 | /* Does bottom part (after sethi) have bits? */ | |
1060 | if ((need_hh22_p && (upper32 & 0x3ff) != 0) | |
1061 | /* No hh22, but does upper32 still have bits we can't set | |
1062 | from lower32? */ | |
1063 | || (! need_hh22_p | |
1064 | && upper32 != 0 | |
1065 | && (upper32 != -1 || lower32 >= 0))) | |
1066 | need_hm10_p = 1; | |
1067 | ||
1068 | /* If the lower half is all zero, we build the upper half directly | |
1069 | into the dst reg. */ | |
1070 | if (lower32 != 0 | |
1071 | /* Need lower half if number is zero. */ | |
1072 | || (! need_hh22_p && ! need_hm10_p)) | |
1073 | { | |
1074 | /* No need for sethi if `or' insn can handle constant. */ | |
1075 | if (lower32 < -(1 << 12) || lower32 >= (1 << 12) | |
1076 | /* Note that we can't use a negative constant in the `or' | |
1077 | insn unless the upper 32 bits are all ones. */ | |
1078 | || (lower32 < 0 && upper32 != -1)) | |
1079 | need_hi22_p = 1; | |
1080 | ||
1081 | /* Does bottom part (after sethi) have bits? */ | |
1082 | if ((need_hi22_p && (lower32 & 0x3ff) != 0) | |
1083 | /* No sethi. */ | |
1084 | || (! need_hi22_p && (lower32 & 0x1fff) != 0) | |
1085 | /* Need `or' if we didn't set anything else. */ | |
1086 | || (! need_hi22_p && ! need_hh22_p && ! need_hm10_p)) | |
1087 | need_lo10_p = 1; | |
1088 | } | |
1089 | } | |
1090 | ||
1091 | if (need_hh22_p) | |
1092 | { | |
1093 | the_insn.opcode = (SETHI_INSN | RD (upper_dstreg) | |
1094 | | ((upper32 >> 10) & 0x3fffff)); | |
1095 | the_insn.reloc = (the_insn.exp.X_op != O_constant | |
1096 | ? BFD_RELOC_SPARC_HH22 : BFD_RELOC_NONE); | |
1097 | output_insn (insn, &the_insn); | |
1098 | } | |
1099 | ||
1100 | if (need_hm10_p) | |
1101 | { | |
1102 | the_insn.opcode = (OR_INSN | |
1103 | | (need_hh22_p ? RS1 (upper_dstreg) : 0) | |
1104 | | RD (upper_dstreg) | |
1105 | | IMMED | |
1106 | | (upper32 | |
1107 | & (need_hh22_p ? 0x3ff : 0x1fff))); | |
1108 | the_insn.reloc = (the_insn.exp.X_op != O_constant | |
1109 | ? BFD_RELOC_SPARC_HM10 : BFD_RELOC_NONE); | |
1110 | output_insn (insn, &the_insn); | |
1111 | } | |
1112 | ||
1113 | if (need_hi22_p) | |
1114 | { | |
1115 | the_insn.opcode = (SETHI_INSN | RD (dstreg) | |
1116 | | ((lower32 >> 10) & 0x3fffff)); | |
1117 | the_insn.reloc = BFD_RELOC_HI22; | |
1118 | output_insn (insn, &the_insn); | |
1119 | } | |
1120 | ||
1121 | if (need_lo10_p) | |
1122 | { | |
1123 | /* FIXME: One nice optimization to do here is to OR the low part | |
1124 | with the highpart if hi22 isn't needed and the low part is | |
1125 | positive. */ | |
1126 | the_insn.opcode = (OR_INSN | (need_hi22_p ? RS1 (dstreg) : 0) | |
1127 | | RD (dstreg) | |
1128 | | IMMED | |
1129 | | (lower32 | |
1130 | & (need_hi22_p ? 0x3ff : 0x1fff))); | |
1131 | the_insn.reloc = BFD_RELOC_LO10; | |
1132 | output_insn (insn, &the_insn); | |
1133 | } | |
1134 | ||
1135 | /* If we needed to build the upper part, shift it into place. */ | |
1136 | if (need_hh22_p || need_hm10_p) | |
1137 | { | |
1138 | the_insn.opcode = (SLLX_INSN | RS1 (upper_dstreg) | RD (upper_dstreg) | |
1139 | | IMMED | 32); | |
1140 | the_insn.reloc = BFD_RELOC_NONE; | |
1141 | output_insn (insn, &the_insn); | |
1142 | } | |
1143 | ||
1144 | /* If we needed to build both upper and lower parts, OR them together. */ | |
1145 | if ((need_hh22_p || need_hm10_p) | |
1146 | && (need_hi22_p || need_lo10_p)) | |
1147 | { | |
1148 | the_insn.opcode = (OR_INSN | RS1 (dstreg) | RS2 (upper_dstreg) | |
1149 | | RD (dstreg)); | |
1150 | the_insn.reloc = BFD_RELOC_NONE; | |
1151 | output_insn (insn, &the_insn); | |
1152 | } | |
1153 | /* We didn't need both regs, but we may have to sign extend lower32. */ | |
1154 | else if (need_hi22_p && upper32 == -1) | |
1155 | { | |
1156 | the_insn.opcode = (SRA_INSN | RS1 (dstreg) | RD (dstreg) | |
1157 | | IMMED | 0); | |
1158 | the_insn.reloc = BFD_RELOC_NONE; | |
1159 | output_insn (insn, &the_insn); | |
1160 | } | |
1161 | break; | |
1162 | } | |
1163 | ||
1164 | case SPECIAL_CASE_FDIV: | |
1165 | { | |
1166 | int rd = (the_insn.opcode >> 25) & 0x1f; | |
1167 | ||
1168 | output_insn (insn, &the_insn); | |
1169 | ||
1170 | /* According to information leaked from Sun, the "fdiv" instructions | |
1171 | on early SPARC machines would produce incorrect results sometimes. | |
1172 | The workaround is to add an fmovs of the destination register to | |
1173 | itself just after the instruction. This was true on machines | |
1174 | with Weitek 1165 float chips, such as the Sun-4/260 and /280. */ | |
1175 | assert (the_insn.reloc == BFD_RELOC_NONE); | |
1176 | the_insn.opcode = FMOVS_INSN | rd | RD (rd); | |
1177 | output_insn (insn, &the_insn); | |
1178 | break; | |
1179 | } | |
1180 | ||
1181 | default: | |
1182 | as_fatal (_("failed special case insn sanity check")); | |
1183 | } | |
1184 | } | |
1185 | ||
1186 | /* Subroutine of md_assemble to do the actual parsing. */ | |
1187 | ||
1188 | static void | |
1189 | sparc_ip (str, pinsn) | |
1190 | char *str; | |
1191 | const struct sparc_opcode **pinsn; | |
1192 | { | |
1193 | char *error_message = ""; | |
1194 | char *s; | |
1195 | const char *args; | |
1196 | char c; | |
1197 | const struct sparc_opcode *insn; | |
1198 | char *argsStart; | |
1199 | unsigned long opcode; | |
1200 | unsigned int mask = 0; | |
1201 | int match = 0; | |
1202 | int comma = 0; | |
1203 | int v9_arg_p; | |
1204 | ||
1205 | s = str; | |
1206 | if (islower ((unsigned char) *s)) | |
1207 | { | |
1208 | do | |
1209 | ++s; | |
1210 | while (islower ((unsigned char) *s) || isdigit ((unsigned char) *s)); | |
1211 | } | |
1212 | ||
1213 | switch (*s) | |
1214 | { | |
1215 | case '\0': | |
1216 | break; | |
1217 | ||
1218 | case ',': | |
1219 | comma = 1; | |
1220 | ||
1221 | /*FALLTHROUGH */ | |
1222 | ||
1223 | case ' ': | |
1224 | *s++ = '\0'; | |
1225 | break; | |
1226 | ||
1227 | default: | |
1228 | as_fatal (_("Unknown opcode: `%s'"), str); | |
1229 | } | |
1230 | insn = (struct sparc_opcode *) hash_find (op_hash, str); | |
1231 | *pinsn = insn; | |
1232 | if (insn == NULL) | |
1233 | { | |
1234 | as_bad (_("Unknown opcode: `%s'"), str); | |
1235 | return; | |
1236 | } | |
1237 | if (comma) | |
1238 | { | |
1239 | *--s = ','; | |
1240 | } | |
1241 | ||
1242 | argsStart = s; | |
1243 | for (;;) | |
1244 | { | |
1245 | opcode = insn->match; | |
1246 | memset (&the_insn, '\0', sizeof (the_insn)); | |
1247 | the_insn.reloc = BFD_RELOC_NONE; | |
1248 | v9_arg_p = 0; | |
1249 | ||
1250 | /* | |
1251 | * Build the opcode, checking as we go to make | |
1252 | * sure that the operands match | |
1253 | */ | |
1254 | for (args = insn->args;; ++args) | |
1255 | { | |
1256 | switch (*args) | |
1257 | { | |
1258 | case 'K': | |
1259 | { | |
1260 | int kmask = 0; | |
1261 | ||
1262 | /* Parse a series of masks. */ | |
1263 | if (*s == '#') | |
1264 | { | |
1265 | while (*s == '#') | |
1266 | { | |
1267 | int mask; | |
1268 | ||
1269 | if (! parse_keyword_arg (sparc_encode_membar, &s, | |
1270 | &mask)) | |
1271 | { | |
1272 | error_message = _(": invalid membar mask name"); | |
1273 | goto error; | |
1274 | } | |
1275 | kmask |= mask; | |
1276 | while (*s == ' ') { ++s; continue; } | |
1277 | if (*s == '|' || *s == '+') | |
1278 | ++s; | |
1279 | while (*s == ' ') { ++s; continue; } | |
1280 | } | |
1281 | } | |
1282 | else | |
1283 | { | |
1284 | if (! parse_const_expr_arg (&s, &kmask)) | |
1285 | { | |
1286 | error_message = _(": invalid membar mask expression"); | |
1287 | goto error; | |
1288 | } | |
1289 | if (kmask < 0 || kmask > 127) | |
1290 | { | |
1291 | error_message = _(": invalid membar mask number"); | |
1292 | goto error; | |
1293 | } | |
1294 | } | |
1295 | ||
1296 | opcode |= MEMBAR (kmask); | |
1297 | continue; | |
1298 | } | |
1299 | ||
1300 | case '*': | |
1301 | { | |
1302 | int fcn = 0; | |
1303 | ||
1304 | /* Parse a prefetch function. */ | |
1305 | if (*s == '#') | |
1306 | { | |
1307 | if (! parse_keyword_arg (sparc_encode_prefetch, &s, &fcn)) | |
1308 | { | |
1309 | error_message = _(": invalid prefetch function name"); | |
1310 | goto error; | |
1311 | } | |
1312 | } | |
1313 | else | |
1314 | { | |
1315 | if (! parse_const_expr_arg (&s, &fcn)) | |
1316 | { | |
1317 | error_message = _(": invalid prefetch function expression"); | |
1318 | goto error; | |
1319 | } | |
1320 | if (fcn < 0 || fcn > 31) | |
1321 | { | |
1322 | error_message = _(": invalid prefetch function number"); | |
1323 | goto error; | |
1324 | } | |
1325 | } | |
1326 | opcode |= RD (fcn); | |
1327 | continue; | |
1328 | } | |
1329 | ||
1330 | case '!': | |
1331 | case '?': | |
1332 | /* Parse a sparc64 privileged register. */ | |
1333 | if (*s == '%') | |
1334 | { | |
1335 | struct priv_reg_entry *p = priv_reg_table; | |
1336 | unsigned int len = 9999999; /* init to make gcc happy */ | |
1337 | ||
1338 | s += 1; | |
1339 | while (p->name[0] > s[0]) | |
1340 | p++; | |
1341 | while (p->name[0] == s[0]) | |
1342 | { | |
1343 | len = strlen (p->name); | |
1344 | if (strncmp (p->name, s, len) == 0) | |
1345 | break; | |
1346 | p++; | |
1347 | } | |
1348 | if (p->name[0] != s[0]) | |
1349 | { | |
1350 | error_message = _(": unrecognizable privileged register"); | |
1351 | goto error; | |
1352 | } | |
1353 | if (*args == '?') | |
1354 | opcode |= (p->regnum << 14); | |
1355 | else | |
1356 | opcode |= (p->regnum << 25); | |
1357 | s += len; | |
1358 | continue; | |
1359 | } | |
1360 | else | |
1361 | { | |
1362 | error_message = _(": unrecognizable privileged register"); | |
1363 | goto error; | |
1364 | } | |
1365 | ||
1366 | case '_': | |
1367 | case '/': | |
1368 | /* Parse a v9a ancillary state register. */ | |
1369 | if (*s == '%') | |
1370 | { | |
1371 | struct priv_reg_entry *p = v9a_asr_table; | |
1372 | unsigned int len = 9999999; /* init to make gcc happy */ | |
1373 | ||
1374 | s += 1; | |
1375 | while (p->name[0] > s[0]) | |
1376 | p++; | |
1377 | while (p->name[0] == s[0]) | |
1378 | { | |
1379 | len = strlen (p->name); | |
1380 | if (strncmp (p->name, s, len) == 0) | |
1381 | break; | |
1382 | p++; | |
1383 | } | |
1384 | if (p->name[0] != s[0]) | |
1385 | { | |
1386 | error_message = _(": unrecognizable v9a ancillary state register"); | |
1387 | goto error; | |
1388 | } | |
1389 | if (*args == '/' && (p->regnum == 20 || p->regnum == 21)) | |
1390 | { | |
1391 | error_message = _(": rd on write only ancillary state register"); | |
1392 | goto error; | |
1393 | } | |
1394 | if (*args == '/') | |
1395 | opcode |= (p->regnum << 14); | |
1396 | else | |
1397 | opcode |= (p->regnum << 25); | |
1398 | s += len; | |
1399 | continue; | |
1400 | } | |
1401 | else | |
1402 | { | |
1403 | error_message = _(": unrecognizable v9a ancillary state register"); | |
1404 | goto error; | |
1405 | } | |
1406 | ||
1407 | case 'M': | |
1408 | case 'm': | |
1409 | if (strncmp (s, "%asr", 4) == 0) | |
1410 | { | |
1411 | s += 4; | |
1412 | ||
1413 | if (isdigit ((unsigned char) *s)) | |
1414 | { | |
1415 | long num = 0; | |
1416 | ||
1417 | while (isdigit ((unsigned char) *s)) | |
1418 | { | |
1419 | num = num * 10 + *s - '0'; | |
1420 | ++s; | |
1421 | } | |
1422 | ||
1423 | if (current_architecture >= SPARC_OPCODE_ARCH_V9) | |
1424 | { | |
1425 | if (num < 16 || 31 < num) | |
1426 | { | |
1427 | error_message = _(": asr number must be between 16 and 31"); | |
1428 | goto error; | |
1429 | } | |
1430 | } | |
1431 | else | |
1432 | { | |
1433 | if (num < 0 || 31 < num) | |
1434 | { | |
1435 | error_message = _(": asr number must be between 0 and 31"); | |
1436 | goto error; | |
1437 | } | |
1438 | } | |
1439 | ||
1440 | opcode |= (*args == 'M' ? RS1 (num) : RD (num)); | |
1441 | continue; | |
1442 | } | |
1443 | else | |
1444 | { | |
1445 | error_message = _(": expecting %asrN"); | |
1446 | goto error; | |
1447 | } | |
1448 | } /* if %asr */ | |
1449 | break; | |
1450 | ||
1451 | case 'I': | |
1452 | the_insn.reloc = BFD_RELOC_SPARC_11; | |
1453 | goto immediate; | |
1454 | ||
1455 | case 'j': | |
1456 | the_insn.reloc = BFD_RELOC_SPARC_10; | |
1457 | goto immediate; | |
1458 | ||
1459 | case 'X': | |
1460 | /* V8 systems don't understand BFD_RELOC_SPARC_5. */ | |
1461 | if (SPARC_OPCODE_ARCH_V9_P (max_architecture)) | |
1462 | the_insn.reloc = BFD_RELOC_SPARC_5; | |
1463 | else | |
1464 | the_insn.reloc = BFD_RELOC_SPARC13; | |
1465 | /* These fields are unsigned, but for upward compatibility, | |
1466 | allow negative values as well. */ | |
1467 | goto immediate; | |
1468 | ||
1469 | case 'Y': | |
1470 | /* V8 systems don't understand BFD_RELOC_SPARC_6. */ | |
1471 | if (SPARC_OPCODE_ARCH_V9_P (max_architecture)) | |
1472 | the_insn.reloc = BFD_RELOC_SPARC_6; | |
1473 | else | |
1474 | the_insn.reloc = BFD_RELOC_SPARC13; | |
1475 | /* These fields are unsigned, but for upward compatibility, | |
1476 | allow negative values as well. */ | |
1477 | goto immediate; | |
1478 | ||
1479 | case 'k': | |
1480 | the_insn.reloc = /* RELOC_WDISP2_14 */ BFD_RELOC_SPARC_WDISP16; | |
1481 | the_insn.pcrel = 1; | |
1482 | goto immediate; | |
1483 | ||
1484 | case 'G': | |
1485 | the_insn.reloc = BFD_RELOC_SPARC_WDISP19; | |
1486 | the_insn.pcrel = 1; | |
1487 | goto immediate; | |
1488 | ||
1489 | case 'N': | |
1490 | if (*s == 'p' && s[1] == 'n') | |
1491 | { | |
1492 | s += 2; | |
1493 | continue; | |
1494 | } | |
1495 | break; | |
1496 | ||
1497 | case 'T': | |
1498 | if (*s == 'p' && s[1] == 't') | |
1499 | { | |
1500 | s += 2; | |
1501 | continue; | |
1502 | } | |
1503 | break; | |
1504 | ||
1505 | case 'z': | |
1506 | if (*s == ' ') | |
1507 | { | |
1508 | ++s; | |
1509 | } | |
1510 | if (strncmp (s, "%icc", 4) == 0) | |
1511 | { | |
1512 | s += 4; | |
1513 | continue; | |
1514 | } | |
1515 | break; | |
1516 | ||
1517 | case 'Z': | |
1518 | if (*s == ' ') | |
1519 | { | |
1520 | ++s; | |
1521 | } | |
1522 | if (strncmp (s, "%xcc", 4) == 0) | |
1523 | { | |
1524 | s += 4; | |
1525 | continue; | |
1526 | } | |
1527 | break; | |
1528 | ||
1529 | case '6': | |
1530 | if (*s == ' ') | |
1531 | { | |
1532 | ++s; | |
1533 | } | |
1534 | if (strncmp (s, "%fcc0", 5) == 0) | |
1535 | { | |
1536 | s += 5; | |
1537 | continue; | |
1538 | } | |
1539 | break; | |
1540 | ||
1541 | case '7': | |
1542 | if (*s == ' ') | |
1543 | { | |
1544 | ++s; | |
1545 | } | |
1546 | if (strncmp (s, "%fcc1", 5) == 0) | |
1547 | { | |
1548 | s += 5; | |
1549 | continue; | |
1550 | } | |
1551 | break; | |
1552 | ||
1553 | case '8': | |
1554 | if (*s == ' ') | |
1555 | { | |
1556 | ++s; | |
1557 | } | |
1558 | if (strncmp (s, "%fcc2", 5) == 0) | |
1559 | { | |
1560 | s += 5; | |
1561 | continue; | |
1562 | } | |
1563 | break; | |
1564 | ||
1565 | case '9': | |
1566 | if (*s == ' ') | |
1567 | { | |
1568 | ++s; | |
1569 | } | |
1570 | if (strncmp (s, "%fcc3", 5) == 0) | |
1571 | { | |
1572 | s += 5; | |
1573 | continue; | |
1574 | } | |
1575 | break; | |
1576 | ||
1577 | case 'P': | |
1578 | if (strncmp (s, "%pc", 3) == 0) | |
1579 | { | |
1580 | s += 3; | |
1581 | continue; | |
1582 | } | |
1583 | break; | |
1584 | ||
1585 | case 'W': | |
1586 | if (strncmp (s, "%tick", 5) == 0) | |
1587 | { | |
1588 | s += 5; | |
1589 | continue; | |
1590 | } | |
1591 | break; | |
1592 | ||
1593 | case '\0': /* end of args */ | |
1594 | if (*s == '\0') | |
1595 | { | |
1596 | match = 1; | |
1597 | } | |
1598 | break; | |
1599 | ||
1600 | case '+': | |
1601 | if (*s == '+') | |
1602 | { | |
1603 | ++s; | |
1604 | continue; | |
1605 | } | |
1606 | if (*s == '-') | |
1607 | { | |
1608 | continue; | |
1609 | } | |
1610 | break; | |
1611 | ||
1612 | case '[': /* these must match exactly */ | |
1613 | case ']': | |
1614 | case ',': | |
1615 | case ' ': | |
1616 | if (*s++ == *args) | |
1617 | continue; | |
1618 | break; | |
1619 | ||
1620 | case '#': /* must be at least one digit */ | |
1621 | if (isdigit ((unsigned char) *s++)) | |
1622 | { | |
1623 | while (isdigit ((unsigned char) *s)) | |
1624 | { | |
1625 | ++s; | |
1626 | } | |
1627 | continue; | |
1628 | } | |
1629 | break; | |
1630 | ||
1631 | case 'C': /* coprocessor state register */ | |
1632 | if (strncmp (s, "%csr", 4) == 0) | |
1633 | { | |
1634 | s += 4; | |
1635 | continue; | |
1636 | } | |
1637 | break; | |
1638 | ||
1639 | case 'b': /* next operand is a coprocessor register */ | |
1640 | case 'c': | |
1641 | case 'D': | |
1642 | if (*s++ == '%' && *s++ == 'c' && isdigit ((unsigned char) *s)) | |
1643 | { | |
1644 | mask = *s++; | |
1645 | if (isdigit ((unsigned char) *s)) | |
1646 | { | |
1647 | mask = 10 * (mask - '0') + (*s++ - '0'); | |
1648 | if (mask >= 32) | |
1649 | { | |
1650 | break; | |
1651 | } | |
1652 | } | |
1653 | else | |
1654 | { | |
1655 | mask -= '0'; | |
1656 | } | |
1657 | switch (*args) | |
1658 | { | |
1659 | ||
1660 | case 'b': | |
1661 | opcode |= mask << 14; | |
1662 | continue; | |
1663 | ||
1664 | case 'c': | |
1665 | opcode |= mask; | |
1666 | continue; | |
1667 | ||
1668 | case 'D': | |
1669 | opcode |= mask << 25; | |
1670 | continue; | |
1671 | } | |
1672 | } | |
1673 | break; | |
1674 | ||
1675 | case 'r': /* next operand must be a register */ | |
1676 | case 'O': | |
1677 | case '1': | |
1678 | case '2': | |
1679 | case 'd': | |
1680 | if (*s++ == '%') | |
1681 | { | |
1682 | switch (c = *s++) | |
1683 | { | |
1684 | ||
1685 | case 'f': /* frame pointer */ | |
1686 | if (*s++ == 'p') | |
1687 | { | |
1688 | mask = 0x1e; | |
1689 | break; | |
1690 | } | |
1691 | goto error; | |
1692 | ||
1693 | case 'g': /* global register */ | |
1694 | if (isoctal (c = *s++)) | |
1695 | { | |
1696 | mask = c - '0'; | |
1697 | break; | |
1698 | } | |
1699 | goto error; | |
1700 | ||
1701 | case 'i': /* in register */ | |
1702 | if (isoctal (c = *s++)) | |
1703 | { | |
1704 | mask = c - '0' + 24; | |
1705 | break; | |
1706 | } | |
1707 | goto error; | |
1708 | ||
1709 | case 'l': /* local register */ | |
1710 | if (isoctal (c = *s++)) | |
1711 | { | |
1712 | mask = (c - '0' + 16); | |
1713 | break; | |
1714 | } | |
1715 | goto error; | |
1716 | ||
1717 | case 'o': /* out register */ | |
1718 | if (isoctal (c = *s++)) | |
1719 | { | |
1720 | mask = (c - '0' + 8); | |
1721 | break; | |
1722 | } | |
1723 | goto error; | |
1724 | ||
1725 | case 's': /* stack pointer */ | |
1726 | if (*s++ == 'p') | |
1727 | { | |
1728 | mask = 0xe; | |
1729 | break; | |
1730 | } | |
1731 | goto error; | |
1732 | ||
1733 | case 'r': /* any register */ | |
1734 | if (!isdigit ((unsigned char) (c = *s++))) | |
1735 | { | |
1736 | goto error; | |
1737 | } | |
1738 | /* FALLTHROUGH */ | |
1739 | case '0': | |
1740 | case '1': | |
1741 | case '2': | |
1742 | case '3': | |
1743 | case '4': | |
1744 | case '5': | |
1745 | case '6': | |
1746 | case '7': | |
1747 | case '8': | |
1748 | case '9': | |
1749 | if (isdigit ((unsigned char) *s)) | |
1750 | { | |
1751 | if ((c = 10 * (c - '0') + (*s++ - '0')) >= 32) | |
1752 | { | |
1753 | goto error; | |
1754 | } | |
1755 | } | |
1756 | else | |
1757 | { | |
1758 | c -= '0'; | |
1759 | } | |
1760 | mask = c; | |
1761 | break; | |
1762 | ||
1763 | default: | |
1764 | goto error; | |
1765 | } | |
1766 | ||
1767 | /* Got the register, now figure out where | |
1768 | it goes in the opcode. */ | |
1769 | switch (*args) | |
1770 | { | |
1771 | case '1': | |
1772 | opcode |= mask << 14; | |
1773 | continue; | |
1774 | ||
1775 | case '2': | |
1776 | opcode |= mask; | |
1777 | continue; | |
1778 | ||
1779 | case 'd': | |
1780 | opcode |= mask << 25; | |
1781 | continue; | |
1782 | ||
1783 | case 'r': | |
1784 | opcode |= (mask << 25) | (mask << 14); | |
1785 | continue; | |
1786 | ||
1787 | case 'O': | |
1788 | opcode |= (mask << 25) | (mask << 0); | |
1789 | continue; | |
1790 | } | |
1791 | } | |
1792 | break; | |
1793 | ||
1794 | case 'e': /* next operand is a floating point register */ | |
1795 | case 'v': | |
1796 | case 'V': | |
1797 | ||
1798 | case 'f': | |
1799 | case 'B': | |
1800 | case 'R': | |
1801 | ||
1802 | case 'g': | |
1803 | case 'H': | |
1804 | case 'J': | |
1805 | { | |
1806 | char format; | |
1807 | ||
1808 | if (*s++ == '%' | |
1809 | && ((format = *s) == 'f') | |
1810 | && isdigit ((unsigned char) *++s)) | |
1811 | { | |
1812 | for (mask = 0; isdigit ((unsigned char) *s); ++s) | |
1813 | { | |
1814 | mask = 10 * mask + (*s - '0'); | |
1815 | } /* read the number */ | |
1816 | ||
1817 | if ((*args == 'v' | |
1818 | || *args == 'B' | |
1819 | || *args == 'H') | |
1820 | && (mask & 1)) | |
1821 | { | |
1822 | break; | |
1823 | } /* register must be even numbered */ | |
1824 | ||
1825 | if ((*args == 'V' | |
1826 | || *args == 'R' | |
1827 | || *args == 'J') | |
1828 | && (mask & 3)) | |
1829 | { | |
1830 | break; | |
1831 | } /* register must be multiple of 4 */ | |
1832 | ||
1833 | if (mask >= 64) | |
1834 | { | |
1835 | if (SPARC_OPCODE_ARCH_V9_P (max_architecture)) | |
1836 | error_message = _(": There are only 64 f registers; [0-63]"); | |
1837 | else | |
1838 | error_message = _(": There are only 32 f registers; [0-31]"); | |
1839 | goto error; | |
1840 | } /* on error */ | |
1841 | else if (mask >= 32) | |
1842 | { | |
1843 | if (SPARC_OPCODE_ARCH_V9_P (max_architecture)) | |
1844 | { | |
1845 | v9_arg_p = 1; | |
1846 | mask -= 31; /* wrap high bit */ | |
1847 | } | |
1848 | else | |
1849 | { | |
1850 | error_message = _(": There are only 32 f registers; [0-31]"); | |
1851 | goto error; | |
1852 | } | |
1853 | } | |
1854 | } | |
1855 | else | |
1856 | { | |
1857 | break; | |
1858 | } /* if not an 'f' register. */ | |
1859 | ||
1860 | switch (*args) | |
1861 | { | |
1862 | case 'v': | |
1863 | case 'V': | |
1864 | case 'e': | |
1865 | opcode |= RS1 (mask); | |
1866 | continue; | |
1867 | ||
1868 | ||
1869 | case 'f': | |
1870 | case 'B': | |
1871 | case 'R': | |
1872 | opcode |= RS2 (mask); | |
1873 | continue; | |
1874 | ||
1875 | case 'g': | |
1876 | case 'H': | |
1877 | case 'J': | |
1878 | opcode |= RD (mask); | |
1879 | continue; | |
1880 | } /* pack it in. */ | |
1881 | ||
1882 | know (0); | |
1883 | break; | |
1884 | } /* float arg */ | |
1885 | ||
1886 | case 'F': | |
1887 | if (strncmp (s, "%fsr", 4) == 0) | |
1888 | { | |
1889 | s += 4; | |
1890 | continue; | |
1891 | } | |
1892 | break; | |
1893 | ||
1894 | case '0': /* 64 bit immediate (setx insn) */ | |
1895 | the_insn.reloc = BFD_RELOC_NONE; /* reloc handled elsewhere */ | |
1896 | goto immediate; | |
1897 | ||
1898 | case 'h': /* high 22 bits */ | |
1899 | the_insn.reloc = BFD_RELOC_HI22; | |
1900 | goto immediate; | |
1901 | ||
1902 | case 'l': /* 22 bit PC relative immediate */ | |
1903 | the_insn.reloc = BFD_RELOC_SPARC_WDISP22; | |
1904 | the_insn.pcrel = 1; | |
1905 | goto immediate; | |
1906 | ||
1907 | case 'L': /* 30 bit immediate */ | |
1908 | the_insn.reloc = BFD_RELOC_32_PCREL_S2; | |
1909 | the_insn.pcrel = 1; | |
1910 | goto immediate; | |
1911 | ||
1912 | case 'n': /* 22 bit immediate */ | |
1913 | the_insn.reloc = BFD_RELOC_SPARC22; | |
1914 | goto immediate; | |
1915 | ||
1916 | case 'i': /* 13 bit immediate */ | |
1917 | the_insn.reloc = BFD_RELOC_SPARC13; | |
1918 | ||
1919 | /* fallthrough */ | |
1920 | ||
1921 | immediate: | |
1922 | if (*s == ' ') | |
1923 | s++; | |
1924 | ||
cf9a1301 RH |
1925 | { |
1926 | char *s1; | |
1927 | char *op_arg = NULL; | |
1928 | expressionS op_exp; | |
1929 | bfd_reloc_code_real_type old_reloc = the_insn.reloc; | |
1930 | ||
1931 | /* Check for %hi, etc. */ | |
1932 | if (*s == '%') | |
1933 | { | |
1934 | static const struct ops { | |
1935 | /* The name as it appears in assembler. */ | |
1936 | char *name; | |
1937 | /* strlen (name), precomputed for speed */ | |
1938 | int len; | |
1939 | /* The reloc this pseudo-op translates to. */ | |
1940 | int reloc; | |
1941 | /* Non-zero if for v9 only. */ | |
1942 | int v9_p; | |
1943 | /* Non-zero if can be used in pc-relative contexts. */ | |
1944 | int pcrel_p;/*FIXME:wip*/ | |
1945 | } ops[] = { | |
1946 | /* hix/lox must appear before hi/lo so %hix won't be | |
1947 | mistaken for %hi. */ | |
1948 | { "hix", 3, BFD_RELOC_SPARC_HIX22, 1, 0 }, | |
1949 | { "lox", 3, BFD_RELOC_SPARC_LOX10, 1, 0 }, | |
1950 | { "hi", 2, BFD_RELOC_HI22, 0, 1 }, | |
1951 | { "lo", 2, BFD_RELOC_LO10, 0, 1 }, | |
1952 | { "hh", 2, BFD_RELOC_SPARC_HH22, 1, 1 }, | |
1953 | { "hm", 2, BFD_RELOC_SPARC_HM10, 1, 1 }, | |
1954 | { "lm", 2, BFD_RELOC_SPARC_LM22, 1, 1 }, | |
1955 | { "h44", 3, BFD_RELOC_SPARC_H44, 1, 0 }, | |
1956 | { "m44", 3, BFD_RELOC_SPARC_M44, 1, 0 }, | |
1957 | { "l44", 3, BFD_RELOC_SPARC_L44, 1, 0 }, | |
1958 | { "uhi", 3, BFD_RELOC_SPARC_HH22, 1, 0 }, | |
1959 | { "ulo", 3, BFD_RELOC_SPARC_HM10, 1, 0 }, | |
1960 | { NULL } | |
1961 | }; | |
1962 | const struct ops *o; | |
1963 | ||
1964 | for (o = ops; o->name; o++) | |
1965 | if (strncmp (s + 1, o->name, o->len) == 0) | |
1966 | break; | |
1967 | if (o->name == NULL) | |
252b5132 | 1968 | break; |
cf9a1301 RH |
1969 | |
1970 | if (s[o->len + 1] != '(') | |
1971 | { | |
1972 | as_bad (_("Illegal operands: %%%s requires arguments in ()"), o->name); | |
1973 | return; | |
1974 | } | |
252b5132 | 1975 | |
cf9a1301 RH |
1976 | op_arg = o->name; |
1977 | the_insn.reloc = o->reloc; | |
1978 | s += o->len + 2; | |
1979 | v9_arg_p = o->v9_p; | |
1980 | } | |
1981 | ||
1982 | /* Note that if the get_expression() fails, we will still | |
1983 | have created U entries in the symbol table for the | |
1984 | 'symbols' in the input string. Try not to create U | |
1985 | symbols for registers, etc. */ | |
252b5132 | 1986 | |
252b5132 RH |
1987 | /* This stuff checks to see if the expression ends in |
1988 | +%reg. If it does, it removes the register from | |
1989 | the expression, and re-sets 's' to point to the | |
1990 | right place. */ | |
1991 | ||
cf9a1301 RH |
1992 | if (op_arg) |
1993 | { | |
1994 | int npar = 0; | |
1995 | ||
1996 | for (s1 = s; *s1 && *s1 != ',' && *s1 != ']'; s1++) | |
1997 | if (*s1 == '(') | |
1998 | npar++; | |
1999 | else if (*s1 == ')') | |
2000 | { | |
2001 | if (!npar) | |
2002 | break; | |
2003 | npar--; | |
2004 | } | |
2005 | ||
2006 | if (*s1 != ')') | |
2007 | { | |
2008 | as_bad (_("Illegal operands: %%%s requires arguments in ()"), op_arg); | |
2009 | return; | |
2010 | } | |
2011 | ||
2012 | *s1 = '\0'; | |
2013 | (void) get_expression (s); | |
2014 | *s1 = ')'; | |
2015 | s = s1 + 1; | |
2016 | if (*s == ',' || *s == ']' || !*s) | |
2017 | continue; | |
2018 | if (*s != '+' && *s != '-') | |
2019 | { | |
2020 | as_bad (_("Illegal operands: Can't do arithmetics other than + and - involving %%%s()"), op_arg); | |
2021 | return; | |
2022 | } | |
2023 | *s1 = '0'; | |
2024 | s = s1; | |
2025 | op_exp = the_insn.exp; | |
2026 | memset (&the_insn.exp, 0, sizeof(the_insn.exp)); | |
2027 | } | |
252b5132 RH |
2028 | |
2029 | for (s1 = s; *s1 && *s1 != ',' && *s1 != ']'; s1++) ; | |
2030 | ||
2031 | if (s1 != s && isdigit ((unsigned char) s1[-1])) | |
2032 | { | |
2033 | if (s1[-2] == '%' && s1[-3] == '+') | |
cf9a1301 RH |
2034 | s1 -= 3; |
2035 | else if (strchr ("goli0123456789", s1[-2]) && s1[-3] == '%' && s1[-4] == '+') | |
2036 | s1 -= 4; | |
2037 | else | |
2038 | s1 = NULL; | |
2039 | if (s1) | |
252b5132 | 2040 | { |
252b5132 RH |
2041 | *s1 = '\0'; |
2042 | (void) get_expression (s); | |
2043 | *s1 = '+'; | |
cf9a1301 RH |
2044 | if (op_arg) |
2045 | *s = ')'; | |
252b5132 | 2046 | s = s1; |
252b5132 | 2047 | } |
cf9a1301 RH |
2048 | } |
2049 | else | |
2050 | s1 = NULL; | |
2051 | ||
2052 | if (!s1) | |
2053 | { | |
2054 | (void) get_expression (s); | |
2055 | if (op_arg) | |
2056 | *s = ')'; | |
2057 | s = expr_end; | |
2058 | } | |
2059 | ||
2060 | if (op_arg) | |
2061 | { | |
2062 | the_insn.exp2 = the_insn.exp; | |
2063 | the_insn.exp = op_exp; | |
2064 | if (the_insn.exp2.X_op == O_absent) | |
2065 | the_insn.exp2.X_op = O_illegal; | |
2066 | else if (the_insn.exp.X_op == O_absent) | |
252b5132 | 2067 | { |
cf9a1301 RH |
2068 | the_insn.exp = the_insn.exp2; |
2069 | the_insn.exp2.X_op = O_illegal; | |
2070 | } | |
2071 | else if (the_insn.exp.X_op == O_constant) | |
2072 | { | |
2073 | valueT val = the_insn.exp.X_add_number; | |
2074 | switch (the_insn.reloc) | |
2075 | { | |
2076 | case BFD_RELOC_SPARC_HH22: | |
2077 | val = BSR (val, 32); | |
2078 | /* intentional fallthrough */ | |
2079 | ||
2080 | case BFD_RELOC_SPARC_LM22: | |
2081 | case BFD_RELOC_HI22: | |
2082 | val = (val >> 10) & 0x3fffff; | |
2083 | break; | |
2084 | ||
2085 | case BFD_RELOC_SPARC_HM10: | |
2086 | val = BSR (val, 32); | |
2087 | /* intentional fallthrough */ | |
2088 | ||
2089 | case BFD_RELOC_LO10: | |
2090 | val &= 0x3ff; | |
2091 | break; | |
2092 | ||
2093 | case BFD_RELOC_SPARC_H44: | |
2094 | val >>= 22; | |
2095 | val &= 0x3fffff; | |
2096 | break; | |
2097 | ||
2098 | case BFD_RELOC_SPARC_M44: | |
2099 | val >>= 12; | |
2100 | val &= 0x3ff; | |
2101 | break; | |
2102 | ||
2103 | case BFD_RELOC_SPARC_L44: | |
2104 | val &= 0xfff; | |
2105 | break; | |
2106 | ||
2107 | case BFD_RELOC_SPARC_HIX22: | |
2108 | val = ~ val; | |
2109 | val = (val >> 10) & 0x3fffff; | |
2110 | break; | |
2111 | ||
2112 | case BFD_RELOC_SPARC_LOX10: | |
2113 | val = (val & 0x3ff) | 0x1c00; | |
2114 | break; | |
2115 | } | |
2116 | the_insn.exp = the_insn.exp2; | |
2117 | the_insn.exp.X_add_number += val; | |
2118 | the_insn.exp2.X_op = O_illegal; | |
2119 | the_insn.reloc = old_reloc; | |
2120 | } | |
2121 | else if (the_insn.exp2.X_op != O_constant) | |
2122 | { | |
2123 | as_bad (_("Illegal operands: Can't add non-constant expression to %%%s()"), op_arg); | |
2124 | return; | |
2125 | } | |
2126 | else | |
2127 | { | |
2128 | if (1 || old_reloc != BFD_RELOC_SPARC13 | |
2129 | || the_insn.reloc != BFD_RELOC_LO10 | |
2130 | || sparc_arch_size != 64 | |
2131 | || sparc_pic_code) | |
2132 | { | |
2133 | as_bad (_("Illegal operands: Can't do arithmetics involving %%%s() of a relocatable symbol"), op_arg); | |
2134 | return; | |
2135 | } | |
2136 | the_insn.reloc = BFD_RELOC_SPARC_OLO10; | |
252b5132 RH |
2137 | } |
2138 | } | |
2139 | } | |
252b5132 RH |
2140 | /* Check for constants that don't require emitting a reloc. */ |
2141 | if (the_insn.exp.X_op == O_constant | |
2142 | && the_insn.exp.X_add_symbol == 0 | |
2143 | && the_insn.exp.X_op_symbol == 0) | |
2144 | { | |
2145 | /* For pc-relative call instructions, we reject | |
2146 | constants to get better code. */ | |
2147 | if (the_insn.pcrel | |
2148 | && the_insn.reloc == BFD_RELOC_32_PCREL_S2 | |
2149 | && in_signed_range (the_insn.exp.X_add_number, 0x3fff)) | |
2150 | { | |
2151 | error_message = _(": PC-relative operand can't be a constant"); | |
2152 | goto error; | |
2153 | } | |
2154 | ||
2155 | /* Constants that won't fit are checked in md_apply_fix3 | |
2156 | and bfd_install_relocation. | |
2157 | ??? It would be preferable to install the constants | |
2158 | into the insn here and save having to create a fixS | |
2159 | for each one. There already exists code to handle | |
2160 | all the various cases (e.g. in md_apply_fix3 and | |
2161 | bfd_install_relocation) so duplicating all that code | |
2162 | here isn't right. */ | |
2163 | } | |
2164 | ||
2165 | continue; | |
2166 | ||
2167 | case 'a': | |
2168 | if (*s++ == 'a') | |
2169 | { | |
2170 | opcode |= ANNUL; | |
2171 | continue; | |
2172 | } | |
2173 | break; | |
2174 | ||
2175 | case 'A': | |
2176 | { | |
2177 | int asi = 0; | |
2178 | ||
2179 | /* Parse an asi. */ | |
2180 | if (*s == '#') | |
2181 | { | |
2182 | if (! parse_keyword_arg (sparc_encode_asi, &s, &asi)) | |
2183 | { | |
2184 | error_message = _(": invalid ASI name"); | |
2185 | goto error; | |
2186 | } | |
2187 | } | |
2188 | else | |
2189 | { | |
2190 | if (! parse_const_expr_arg (&s, &asi)) | |
2191 | { | |
2192 | error_message = _(": invalid ASI expression"); | |
2193 | goto error; | |
2194 | } | |
2195 | if (asi < 0 || asi > 255) | |
2196 | { | |
2197 | error_message = _(": invalid ASI number"); | |
2198 | goto error; | |
2199 | } | |
2200 | } | |
2201 | opcode |= ASI (asi); | |
2202 | continue; | |
2203 | } /* alternate space */ | |
2204 | ||
2205 | case 'p': | |
2206 | if (strncmp (s, "%psr", 4) == 0) | |
2207 | { | |
2208 | s += 4; | |
2209 | continue; | |
2210 | } | |
2211 | break; | |
2212 | ||
2213 | case 'q': /* floating point queue */ | |
2214 | if (strncmp (s, "%fq", 3) == 0) | |
2215 | { | |
2216 | s += 3; | |
2217 | continue; | |
2218 | } | |
2219 | break; | |
2220 | ||
2221 | case 'Q': /* coprocessor queue */ | |
2222 | if (strncmp (s, "%cq", 3) == 0) | |
2223 | { | |
2224 | s += 3; | |
2225 | continue; | |
2226 | } | |
2227 | break; | |
2228 | ||
2229 | case 'S': | |
2230 | if (strcmp (str, "set") == 0 | |
2231 | || strcmp (str, "setuw") == 0) | |
2232 | { | |
2233 | special_case = SPECIAL_CASE_SET; | |
2234 | continue; | |
2235 | } | |
2236 | else if (strcmp (str, "setsw") == 0) | |
2237 | { | |
2238 | special_case = SPECIAL_CASE_SETSW; | |
2239 | continue; | |
2240 | } | |
2241 | else if (strcmp (str, "setx") == 0) | |
2242 | { | |
2243 | special_case = SPECIAL_CASE_SETX; | |
2244 | continue; | |
2245 | } | |
2246 | else if (strncmp (str, "fdiv", 4) == 0) | |
2247 | { | |
2248 | special_case = SPECIAL_CASE_FDIV; | |
2249 | continue; | |
2250 | } | |
2251 | break; | |
2252 | ||
2253 | case 'o': | |
2254 | if (strncmp (s, "%asi", 4) != 0) | |
2255 | break; | |
2256 | s += 4; | |
2257 | continue; | |
2258 | ||
2259 | case 's': | |
2260 | if (strncmp (s, "%fprs", 5) != 0) | |
2261 | break; | |
2262 | s += 5; | |
2263 | continue; | |
2264 | ||
2265 | case 'E': | |
2266 | if (strncmp (s, "%ccr", 4) != 0) | |
2267 | break; | |
2268 | s += 4; | |
2269 | continue; | |
2270 | ||
2271 | case 't': | |
2272 | if (strncmp (s, "%tbr", 4) != 0) | |
2273 | break; | |
2274 | s += 4; | |
2275 | continue; | |
2276 | ||
2277 | case 'w': | |
2278 | if (strncmp (s, "%wim", 4) != 0) | |
2279 | break; | |
2280 | s += 4; | |
2281 | continue; | |
2282 | ||
2283 | case 'x': | |
2284 | { | |
2285 | char *push = input_line_pointer; | |
2286 | expressionS e; | |
2287 | ||
2288 | input_line_pointer = s; | |
2289 | expression (&e); | |
2290 | if (e.X_op == O_constant) | |
2291 | { | |
2292 | int n = e.X_add_number; | |
2293 | if (n != e.X_add_number || (n & ~0x1ff) != 0) | |
2294 | as_bad (_("OPF immediate operand out of range (0-0x1ff)")); | |
2295 | else | |
2296 | opcode |= e.X_add_number << 5; | |
2297 | } | |
2298 | else | |
2299 | as_bad (_("non-immediate OPF operand, ignored")); | |
2300 | s = input_line_pointer; | |
2301 | input_line_pointer = push; | |
2302 | continue; | |
2303 | } | |
2304 | ||
2305 | case 'y': | |
2306 | if (strncmp (s, "%y", 2) != 0) | |
2307 | break; | |
2308 | s += 2; | |
2309 | continue; | |
2310 | ||
2311 | case 'u': | |
2312 | case 'U': | |
2313 | { | |
2314 | /* Parse a sparclet cpreg. */ | |
2315 | int cpreg; | |
2316 | if (! parse_keyword_arg (sparc_encode_sparclet_cpreg, &s, &cpreg)) | |
2317 | { | |
2318 | error_message = _(": invalid cpreg name"); | |
2319 | goto error; | |
2320 | } | |
2321 | opcode |= (*args == 'U' ? RS1 (cpreg) : RD (cpreg)); | |
2322 | continue; | |
2323 | } | |
2324 | ||
2325 | default: | |
2326 | as_fatal (_("failed sanity check.")); | |
2327 | } /* switch on arg code */ | |
2328 | ||
2329 | /* Break out of for() loop. */ | |
2330 | break; | |
2331 | } /* for each arg that we expect */ | |
2332 | ||
2333 | error: | |
2334 | if (match == 0) | |
2335 | { | |
2336 | /* Args don't match. */ | |
2337 | if (&insn[1] - sparc_opcodes < sparc_num_opcodes | |
2338 | && (insn->name == insn[1].name | |
2339 | || !strcmp (insn->name, insn[1].name))) | |
2340 | { | |
2341 | ++insn; | |
2342 | s = argsStart; | |
2343 | continue; | |
2344 | } | |
2345 | else | |
2346 | { | |
2347 | as_bad (_("Illegal operands%s"), error_message); | |
2348 | return; | |
2349 | } | |
2350 | } | |
2351 | else | |
2352 | { | |
2353 | /* We have a match. Now see if the architecture is ok. */ | |
2354 | int needed_arch_mask = insn->architecture; | |
2355 | ||
2356 | if (v9_arg_p) | |
2357 | { | |
2358 | needed_arch_mask &= ~ ((1 << SPARC_OPCODE_ARCH_V9) | |
2359 | | (1 << SPARC_OPCODE_ARCH_V9A)); | |
2360 | needed_arch_mask |= (1 << SPARC_OPCODE_ARCH_V9); | |
2361 | } | |
2362 | ||
2363 | if (needed_arch_mask & SPARC_OPCODE_SUPPORTED (current_architecture)) | |
2364 | ; /* ok */ | |
2365 | /* Can we bump up the architecture? */ | |
2366 | else if (needed_arch_mask & SPARC_OPCODE_SUPPORTED (max_architecture)) | |
2367 | { | |
2368 | enum sparc_opcode_arch_val needed_architecture = | |
2369 | sparc_ffs (SPARC_OPCODE_SUPPORTED (max_architecture) | |
2370 | & needed_arch_mask); | |
2371 | ||
2372 | assert (needed_architecture <= SPARC_OPCODE_ARCH_MAX); | |
2373 | if (warn_on_bump | |
2374 | && needed_architecture > warn_after_architecture) | |
2375 | { | |
2376 | as_warn (_("architecture bumped from \"%s\" to \"%s\" on \"%s\""), | |
2377 | sparc_opcode_archs[current_architecture].name, | |
2378 | sparc_opcode_archs[needed_architecture].name, | |
2379 | str); | |
2380 | warn_after_architecture = needed_architecture; | |
2381 | } | |
2382 | current_architecture = needed_architecture; | |
2383 | } | |
2384 | /* Conflict. */ | |
2385 | /* ??? This seems to be a bit fragile. What if the next entry in | |
2386 | the opcode table is the one we want and it is supported? | |
2387 | It is possible to arrange the table today so that this can't | |
2388 | happen but what about tomorrow? */ | |
2389 | else | |
2390 | { | |
2391 | int arch,printed_one_p = 0; | |
2392 | char *p; | |
2393 | char required_archs[SPARC_OPCODE_ARCH_MAX * 16]; | |
2394 | ||
2395 | /* Create a list of the architectures that support the insn. */ | |
2396 | needed_arch_mask &= ~ SPARC_OPCODE_SUPPORTED (max_architecture); | |
2397 | p = required_archs; | |
2398 | arch = sparc_ffs (needed_arch_mask); | |
2399 | while ((1 << arch) <= needed_arch_mask) | |
2400 | { | |
2401 | if ((1 << arch) & needed_arch_mask) | |
2402 | { | |
2403 | if (printed_one_p) | |
2404 | *p++ = '|'; | |
2405 | strcpy (p, sparc_opcode_archs[arch].name); | |
2406 | p += strlen (p); | |
2407 | printed_one_p = 1; | |
2408 | } | |
2409 | ++arch; | |
2410 | } | |
2411 | ||
2412 | as_bad (_("Architecture mismatch on \"%s\"."), str); | |
2413 | as_tsktsk (_(" (Requires %s; requested architecture is %s.)"), | |
2414 | required_archs, | |
2415 | sparc_opcode_archs[max_architecture].name); | |
2416 | return; | |
2417 | } | |
2418 | } /* if no match */ | |
2419 | ||
2420 | break; | |
2421 | } /* forever looking for a match */ | |
2422 | ||
2423 | the_insn.opcode = opcode; | |
2424 | } | |
2425 | ||
2426 | /* Parse an argument that can be expressed as a keyword. | |
2427 | (eg: #StoreStore or %ccfr). | |
2428 | The result is a boolean indicating success. | |
2429 | If successful, INPUT_POINTER is updated. */ | |
2430 | ||
2431 | static int | |
2432 | parse_keyword_arg (lookup_fn, input_pointerP, valueP) | |
2433 | int (*lookup_fn) PARAMS ((const char *)); | |
2434 | char **input_pointerP; | |
2435 | int *valueP; | |
2436 | { | |
2437 | int value; | |
2438 | char c, *p, *q; | |
2439 | ||
2440 | p = *input_pointerP; | |
2441 | for (q = p + (*p == '#' || *p == '%'); | |
2442 | isalnum ((unsigned char) *q) || *q == '_'; | |
2443 | ++q) | |
2444 | continue; | |
2445 | c = *q; | |
2446 | *q = 0; | |
2447 | value = (*lookup_fn) (p); | |
2448 | *q = c; | |
2449 | if (value == -1) | |
2450 | return 0; | |
2451 | *valueP = value; | |
2452 | *input_pointerP = q; | |
2453 | return 1; | |
2454 | } | |
2455 | ||
2456 | /* Parse an argument that is a constant expression. | |
2457 | The result is a boolean indicating success. */ | |
2458 | ||
2459 | static int | |
2460 | parse_const_expr_arg (input_pointerP, valueP) | |
2461 | char **input_pointerP; | |
2462 | int *valueP; | |
2463 | { | |
2464 | char *save = input_line_pointer; | |
2465 | expressionS exp; | |
2466 | ||
2467 | input_line_pointer = *input_pointerP; | |
2468 | /* The next expression may be something other than a constant | |
2469 | (say if we're not processing the right variant of the insn). | |
2470 | Don't call expression unless we're sure it will succeed as it will | |
2471 | signal an error (which we want to defer until later). */ | |
2472 | /* FIXME: It might be better to define md_operand and have it recognize | |
2473 | things like %asi, etc. but continuing that route through to the end | |
2474 | is a lot of work. */ | |
2475 | if (*input_line_pointer == '%') | |
2476 | { | |
2477 | input_line_pointer = save; | |
2478 | return 0; | |
2479 | } | |
2480 | expression (&exp); | |
2481 | *input_pointerP = input_line_pointer; | |
2482 | input_line_pointer = save; | |
2483 | if (exp.X_op != O_constant) | |
2484 | return 0; | |
2485 | *valueP = exp.X_add_number; | |
2486 | return 1; | |
2487 | } | |
2488 | ||
2489 | /* Subroutine of sparc_ip to parse an expression. */ | |
2490 | ||
2491 | static int | |
2492 | get_expression (str) | |
2493 | char *str; | |
2494 | { | |
2495 | char *save_in; | |
2496 | segT seg; | |
2497 | ||
2498 | save_in = input_line_pointer; | |
2499 | input_line_pointer = str; | |
2500 | seg = expression (&the_insn.exp); | |
2501 | if (seg != absolute_section | |
2502 | && seg != text_section | |
2503 | && seg != data_section | |
2504 | && seg != bss_section | |
2505 | && seg != undefined_section) | |
2506 | { | |
2507 | the_insn.error = _("bad segment"); | |
2508 | expr_end = input_line_pointer; | |
2509 | input_line_pointer = save_in; | |
2510 | return 1; | |
2511 | } | |
2512 | expr_end = input_line_pointer; | |
2513 | input_line_pointer = save_in; | |
2514 | return 0; | |
2515 | } | |
2516 | ||
2517 | /* Subroutine of md_assemble to output one insn. */ | |
2518 | ||
2519 | static void | |
2520 | output_insn (insn, the_insn) | |
2521 | const struct sparc_opcode *insn; | |
2522 | struct sparc_it *the_insn; | |
2523 | { | |
2524 | char *toP = frag_more (4); | |
2525 | ||
2526 | /* put out the opcode */ | |
2527 | if (INSN_BIG_ENDIAN) | |
2528 | number_to_chars_bigendian (toP, (valueT) the_insn->opcode, 4); | |
2529 | else | |
2530 | number_to_chars_littleendian (toP, (valueT) the_insn->opcode, 4); | |
2531 | ||
2532 | /* put out the symbol-dependent stuff */ | |
2533 | if (the_insn->reloc != BFD_RELOC_NONE) | |
2534 | { | |
2535 | fixS *fixP = fix_new_exp (frag_now, /* which frag */ | |
2536 | (toP - frag_now->fr_literal), /* where */ | |
2537 | 4, /* size */ | |
2538 | &the_insn->exp, | |
2539 | the_insn->pcrel, | |
2540 | the_insn->reloc); | |
2541 | /* Turn off overflow checking in fixup_segment. We'll do our | |
2542 | own overflow checking in md_apply_fix3. This is necessary because | |
2543 | the insn size is 4 and fixup_segment will signal an overflow for | |
2544 | large 8 byte quantities. */ | |
2545 | fixP->fx_no_overflow = 1; | |
2546 | } | |
2547 | ||
2548 | last_insn = insn; | |
2549 | last_opcode = the_insn->opcode; | |
2550 | } | |
2551 | \f | |
2552 | /* | |
2553 | This is identical to the md_atof in m68k.c. I think this is right, | |
2554 | but I'm not sure. | |
2555 | ||
2556 | Turn a string in input_line_pointer into a floating point constant of type | |
2557 | type, and store the appropriate bytes in *litP. The number of LITTLENUMS | |
2558 | emitted is stored in *sizeP . An error message is returned, or NULL on OK. | |
2559 | */ | |
2560 | ||
2561 | /* Equal to MAX_PRECISION in atof-ieee.c */ | |
2562 | #define MAX_LITTLENUMS 6 | |
2563 | ||
2564 | char * | |
2565 | md_atof (type, litP, sizeP) | |
2566 | char type; | |
2567 | char *litP; | |
2568 | int *sizeP; | |
2569 | { | |
2570 | int i,prec; | |
2571 | LITTLENUM_TYPE words[MAX_LITTLENUMS]; | |
2572 | char *t; | |
2573 | ||
2574 | switch (type) | |
2575 | { | |
2576 | case 'f': | |
2577 | case 'F': | |
2578 | case 's': | |
2579 | case 'S': | |
2580 | prec = 2; | |
2581 | break; | |
2582 | ||
2583 | case 'd': | |
2584 | case 'D': | |
2585 | case 'r': | |
2586 | case 'R': | |
2587 | prec = 4; | |
2588 | break; | |
2589 | ||
2590 | case 'x': | |
2591 | case 'X': | |
2592 | prec = 6; | |
2593 | break; | |
2594 | ||
2595 | case 'p': | |
2596 | case 'P': | |
2597 | prec = 6; | |
2598 | break; | |
2599 | ||
2600 | default: | |
2601 | *sizeP = 0; | |
2602 | return _("Bad call to MD_ATOF()"); | |
2603 | } | |
2604 | ||
2605 | t = atof_ieee (input_line_pointer, type, words); | |
2606 | if (t) | |
2607 | input_line_pointer = t; | |
2608 | *sizeP = prec * sizeof (LITTLENUM_TYPE); | |
2609 | ||
2610 | if (target_big_endian) | |
2611 | { | |
2612 | for (i = 0; i < prec; i++) | |
2613 | { | |
2614 | md_number_to_chars (litP, (valueT) words[i], sizeof (LITTLENUM_TYPE)); | |
2615 | litP += sizeof (LITTLENUM_TYPE); | |
2616 | } | |
2617 | } | |
2618 | else | |
2619 | { | |
2620 | for (i = prec - 1; i >= 0; i--) | |
2621 | { | |
2622 | md_number_to_chars (litP, (valueT) words[i], sizeof (LITTLENUM_TYPE)); | |
2623 | litP += sizeof (LITTLENUM_TYPE); | |
2624 | } | |
2625 | } | |
2626 | ||
2627 | return 0; | |
2628 | } | |
2629 | ||
2630 | /* Write a value out to the object file, using the appropriate | |
2631 | endianness. */ | |
2632 | ||
2633 | void | |
2634 | md_number_to_chars (buf, val, n) | |
2635 | char *buf; | |
2636 | valueT val; | |
2637 | int n; | |
2638 | { | |
2639 | if (target_big_endian) | |
2640 | number_to_chars_bigendian (buf, val, n); | |
2641 | else if (target_little_endian_data | |
2642 | && ((n == 4 || n == 2) && ~now_seg->flags & SEC_ALLOC)) | |
2643 | /* Output debug words, which are not in allocated sections, as big endian */ | |
2644 | number_to_chars_bigendian (buf, val, n); | |
2645 | else if (target_little_endian_data || ! target_big_endian) | |
2646 | number_to_chars_littleendian (buf, val, n); | |
2647 | } | |
2648 | \f | |
2649 | /* Apply a fixS to the frags, now that we know the value it ought to | |
2650 | hold. */ | |
2651 | ||
2652 | int | |
2653 | md_apply_fix3 (fixP, value, segment) | |
2654 | fixS *fixP; | |
2655 | valueT *value; | |
2656 | segT segment; | |
2657 | { | |
2658 | char *buf = fixP->fx_where + fixP->fx_frag->fr_literal; | |
2659 | offsetT val; | |
2660 | long insn; | |
2661 | ||
2662 | val = *value; | |
2663 | ||
2664 | assert (fixP->fx_r_type < BFD_RELOC_UNUSED); | |
2665 | ||
2666 | fixP->fx_addnumber = val; /* Remember value for emit_reloc */ | |
2667 | ||
2668 | #ifdef OBJ_ELF | |
2669 | /* FIXME: SPARC ELF relocations don't use an addend in the data | |
2670 | field itself. This whole approach should be somehow combined | |
2671 | with the calls to bfd_install_relocation. Also, the value passed | |
2672 | in by fixup_segment includes the value of a defined symbol. We | |
2673 | don't want to include the value of an externally visible symbol. */ | |
2674 | if (fixP->fx_addsy != NULL) | |
2675 | { | |
49309057 | 2676 | if (symbol_used_in_reloc_p (fixP->fx_addsy) |
252b5132 RH |
2677 | && (S_IS_EXTERNAL (fixP->fx_addsy) |
2678 | || S_IS_WEAK (fixP->fx_addsy) | |
2679 | || (sparc_pic_code && ! fixP->fx_pcrel) | |
2680 | || (S_GET_SEGMENT (fixP->fx_addsy) != segment | |
2681 | && ((bfd_get_section_flags (stdoutput, | |
2682 | S_GET_SEGMENT (fixP->fx_addsy)) | |
2683 | & SEC_LINK_ONCE) != 0 | |
2684 | || strncmp (segment_name (S_GET_SEGMENT (fixP->fx_addsy)), | |
2685 | ".gnu.linkonce", | |
2686 | sizeof ".gnu.linkonce" - 1) == 0))) | |
2687 | && S_GET_SEGMENT (fixP->fx_addsy) != absolute_section | |
2688 | && S_GET_SEGMENT (fixP->fx_addsy) != undefined_section | |
2689 | && ! bfd_is_com_section (S_GET_SEGMENT (fixP->fx_addsy))) | |
2690 | fixP->fx_addnumber -= S_GET_VALUE (fixP->fx_addsy); | |
2691 | return 1; | |
2692 | } | |
2693 | #endif | |
2694 | ||
2695 | /* This is a hack. There should be a better way to | |
2696 | handle this. Probably in terms of howto fields, once | |
2697 | we can look at these fixups in terms of howtos. */ | |
2698 | if (fixP->fx_r_type == BFD_RELOC_32_PCREL_S2 && fixP->fx_addsy) | |
2699 | val += fixP->fx_where + fixP->fx_frag->fr_address; | |
2700 | ||
2701 | #ifdef OBJ_AOUT | |
2702 | /* FIXME: More ridiculous gas reloc hacking. If we are going to | |
2703 | generate a reloc, then we just want to let the reloc addend set | |
2704 | the value. We do not want to also stuff the addend into the | |
2705 | object file. Including the addend in the object file works when | |
2706 | doing a static link, because the linker will ignore the object | |
2707 | file contents. However, the dynamic linker does not ignore the | |
2708 | object file contents. */ | |
2709 | if (fixP->fx_addsy != NULL | |
2710 | && fixP->fx_r_type != BFD_RELOC_32_PCREL_S2) | |
2711 | val = 0; | |
2712 | ||
2713 | /* When generating PIC code, we do not want an addend for a reloc | |
2714 | against a local symbol. We adjust fx_addnumber to cancel out the | |
2715 | value already included in val, and to also cancel out the | |
2716 | adjustment which bfd_install_relocation will create. */ | |
2717 | if (sparc_pic_code | |
2718 | && fixP->fx_r_type != BFD_RELOC_32_PCREL_S2 | |
2719 | && fixP->fx_addsy != NULL | |
2720 | && ! S_IS_COMMON (fixP->fx_addsy) | |
49309057 | 2721 | && symbol_section_p (fixP->fx_addsy)) |
252b5132 RH |
2722 | fixP->fx_addnumber -= 2 * S_GET_VALUE (fixP->fx_addsy); |
2723 | ||
2724 | /* When generating PIC code, we need to fiddle to get | |
2725 | bfd_install_relocation to do the right thing for a PC relative | |
2726 | reloc against a local symbol which we are going to keep. */ | |
2727 | if (sparc_pic_code | |
2728 | && fixP->fx_r_type == BFD_RELOC_32_PCREL_S2 | |
2729 | && fixP->fx_addsy != NULL | |
2730 | && (S_IS_EXTERNAL (fixP->fx_addsy) | |
2731 | || S_IS_WEAK (fixP->fx_addsy)) | |
2732 | && S_IS_DEFINED (fixP->fx_addsy) | |
2733 | && ! S_IS_COMMON (fixP->fx_addsy)) | |
2734 | { | |
2735 | val = 0; | |
2736 | fixP->fx_addnumber -= 2 * S_GET_VALUE (fixP->fx_addsy); | |
2737 | } | |
2738 | #endif | |
2739 | ||
2740 | /* If this is a data relocation, just output VAL. */ | |
2741 | ||
2742 | if (fixP->fx_r_type == BFD_RELOC_16) | |
2743 | { | |
2744 | md_number_to_chars (buf, val, 2); | |
2745 | } | |
2746 | else if (fixP->fx_r_type == BFD_RELOC_32 | |
2747 | || fixP->fx_r_type == BFD_RELOC_SPARC_REV32) | |
2748 | { | |
2749 | md_number_to_chars (buf, val, 4); | |
2750 | } | |
2751 | else if (fixP->fx_r_type == BFD_RELOC_64) | |
2752 | { | |
2753 | md_number_to_chars (buf, val, 8); | |
2754 | } | |
2755 | else if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT | |
2756 | || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY) | |
2757 | { | |
2758 | fixP->fx_done = 0; | |
2759 | return 1; | |
2760 | } | |
2761 | else | |
2762 | { | |
2763 | /* It's a relocation against an instruction. */ | |
2764 | ||
2765 | if (INSN_BIG_ENDIAN) | |
2766 | insn = bfd_getb32 ((unsigned char *) buf); | |
2767 | else | |
2768 | insn = bfd_getl32 ((unsigned char *) buf); | |
2769 | ||
2770 | switch (fixP->fx_r_type) | |
2771 | { | |
2772 | case BFD_RELOC_32_PCREL_S2: | |
2773 | val = val >> 2; | |
2774 | /* FIXME: This increment-by-one deserves a comment of why it's | |
2775 | being done! */ | |
2776 | if (! sparc_pic_code | |
2777 | || fixP->fx_addsy == NULL | |
49309057 | 2778 | || symbol_section_p (fixP->fx_addsy)) |
252b5132 RH |
2779 | ++val; |
2780 | insn |= val & 0x3fffffff; | |
2781 | break; | |
2782 | ||
2783 | case BFD_RELOC_SPARC_11: | |
2784 | if (! in_signed_range (val, 0x7ff)) | |
2785 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
2786 | _("relocation overflow")); | |
2787 | insn |= val & 0x7ff; | |
2788 | break; | |
2789 | ||
2790 | case BFD_RELOC_SPARC_10: | |
2791 | if (! in_signed_range (val, 0x3ff)) | |
2792 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
2793 | _("relocation overflow")); | |
2794 | insn |= val & 0x3ff; | |
2795 | break; | |
2796 | ||
2797 | case BFD_RELOC_SPARC_7: | |
2798 | if (! in_bitfield_range (val, 0x7f)) | |
2799 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
2800 | _("relocation overflow")); | |
2801 | insn |= val & 0x7f; | |
2802 | break; | |
2803 | ||
2804 | case BFD_RELOC_SPARC_6: | |
2805 | if (! in_bitfield_range (val, 0x3f)) | |
2806 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
2807 | _("relocation overflow")); | |
2808 | insn |= val & 0x3f; | |
2809 | break; | |
2810 | ||
2811 | case BFD_RELOC_SPARC_5: | |
2812 | if (! in_bitfield_range (val, 0x1f)) | |
2813 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
2814 | _("relocation overflow")); | |
2815 | insn |= val & 0x1f; | |
2816 | break; | |
2817 | ||
2818 | case BFD_RELOC_SPARC_WDISP16: | |
2819 | /* FIXME: simplify */ | |
2820 | if (((val > 0) && (val & ~0x3fffc)) | |
2821 | || ((val < 0) && (~(val - 1) & ~0x3fffc))) | |
2822 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
2823 | _("relocation overflow")); | |
2824 | /* FIXME: The +1 deserves a comment. */ | |
2825 | val = (val >> 2) + 1; | |
2826 | insn |= ((val & 0xc000) << 6) | (val & 0x3fff); | |
2827 | break; | |
2828 | ||
2829 | case BFD_RELOC_SPARC_WDISP19: | |
2830 | /* FIXME: simplify */ | |
2831 | if (((val > 0) && (val & ~0x1ffffc)) | |
2832 | || ((val < 0) && (~(val - 1) & ~0x1ffffc))) | |
2833 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
2834 | _("relocation overflow")); | |
2835 | /* FIXME: The +1 deserves a comment. */ | |
2836 | val = (val >> 2) + 1; | |
2837 | insn |= val & 0x7ffff; | |
2838 | break; | |
2839 | ||
2840 | case BFD_RELOC_SPARC_HH22: | |
2841 | val = BSR (val, 32); | |
2842 | /* intentional fallthrough */ | |
2843 | ||
2844 | case BFD_RELOC_SPARC_LM22: | |
2845 | case BFD_RELOC_HI22: | |
2846 | if (!fixP->fx_addsy) | |
2847 | { | |
2848 | insn |= (val >> 10) & 0x3fffff; | |
2849 | } | |
2850 | else | |
2851 | { | |
2852 | /* FIXME: Need comment explaining why we do this. */ | |
2853 | insn &= ~0xffff; | |
2854 | } | |
2855 | break; | |
2856 | ||
2857 | case BFD_RELOC_SPARC22: | |
2858 | if (val & ~0x003fffff) | |
2859 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
2860 | _("relocation overflow")); | |
2861 | insn |= (val & 0x3fffff); | |
2862 | break; | |
2863 | ||
2864 | case BFD_RELOC_SPARC_HM10: | |
2865 | val = BSR (val, 32); | |
2866 | /* intentional fallthrough */ | |
2867 | ||
2868 | case BFD_RELOC_LO10: | |
2869 | if (!fixP->fx_addsy) | |
2870 | { | |
2871 | insn |= val & 0x3ff; | |
2872 | } | |
2873 | else | |
2874 | { | |
2875 | /* FIXME: Need comment explaining why we do this. */ | |
2876 | insn &= ~0xff; | |
2877 | } | |
2878 | break; | |
2879 | ||
2880 | case BFD_RELOC_SPARC13: | |
2881 | if (! in_signed_range (val, 0x1fff)) | |
2882 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
2883 | _("relocation overflow")); | |
2884 | insn |= val & 0x1fff; | |
2885 | break; | |
2886 | ||
2887 | case BFD_RELOC_SPARC_WDISP22: | |
2888 | val = (val >> 2) + 1; | |
2889 | /* FALLTHROUGH */ | |
2890 | case BFD_RELOC_SPARC_BASE22: | |
2891 | insn |= val & 0x3fffff; | |
2892 | break; | |
2893 | ||
2894 | case BFD_RELOC_SPARC_H44: | |
2895 | if (!fixP->fx_addsy) | |
2896 | { | |
2897 | bfd_vma tval = val; | |
2898 | tval >>= 22; | |
2899 | insn |= tval & 0x3fffff; | |
2900 | } | |
2901 | break; | |
2902 | ||
2903 | case BFD_RELOC_SPARC_M44: | |
2904 | if (!fixP->fx_addsy) | |
2905 | insn |= (val >> 12) & 0x3ff; | |
2906 | break; | |
2907 | ||
2908 | case BFD_RELOC_SPARC_L44: | |
2909 | if (!fixP->fx_addsy) | |
2910 | insn |= val & 0xfff; | |
2911 | break; | |
2912 | ||
2913 | case BFD_RELOC_SPARC_HIX22: | |
2914 | if (!fixP->fx_addsy) | |
2915 | { | |
2916 | val ^= ~ (offsetT) 0; | |
2917 | insn |= (val >> 10) & 0x3fffff; | |
2918 | } | |
2919 | break; | |
2920 | ||
2921 | case BFD_RELOC_SPARC_LOX10: | |
2922 | if (!fixP->fx_addsy) | |
2923 | insn |= 0x1c00 | (val & 0x3ff); | |
2924 | break; | |
2925 | ||
2926 | case BFD_RELOC_NONE: | |
2927 | default: | |
2928 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
2929 | _("bad or unhandled relocation type: 0x%02x"), | |
2930 | fixP->fx_r_type); | |
2931 | break; | |
2932 | } | |
2933 | ||
2934 | if (INSN_BIG_ENDIAN) | |
2935 | bfd_putb32 (insn, (unsigned char *) buf); | |
2936 | else | |
2937 | bfd_putl32 (insn, (unsigned char *) buf); | |
2938 | } | |
2939 | ||
2940 | /* Are we finished with this relocation now? */ | |
2941 | if (fixP->fx_addsy == 0 && !fixP->fx_pcrel) | |
2942 | fixP->fx_done = 1; | |
2943 | ||
2944 | return 1; | |
2945 | } | |
2946 | ||
2947 | /* Translate internal representation of relocation info to BFD target | |
2948 | format. */ | |
2949 | arelent * | |
2950 | tc_gen_reloc (section, fixp) | |
2951 | asection *section; | |
2952 | fixS *fixp; | |
2953 | { | |
2954 | arelent *reloc; | |
2955 | bfd_reloc_code_real_type code; | |
2956 | ||
2957 | reloc = (arelent *) xmalloc (sizeof (arelent)); | |
2958 | ||
49309057 ILT |
2959 | reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); |
2960 | *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); | |
252b5132 RH |
2961 | reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; |
2962 | ||
2963 | switch (fixp->fx_r_type) | |
2964 | { | |
2965 | case BFD_RELOC_16: | |
2966 | case BFD_RELOC_32: | |
2967 | case BFD_RELOC_HI22: | |
2968 | case BFD_RELOC_LO10: | |
2969 | case BFD_RELOC_32_PCREL_S2: | |
2970 | case BFD_RELOC_SPARC13: | |
2971 | case BFD_RELOC_SPARC_BASE13: | |
2972 | case BFD_RELOC_SPARC_WDISP16: | |
2973 | case BFD_RELOC_SPARC_WDISP19: | |
2974 | case BFD_RELOC_SPARC_WDISP22: | |
2975 | case BFD_RELOC_64: | |
2976 | case BFD_RELOC_SPARC_5: | |
2977 | case BFD_RELOC_SPARC_6: | |
2978 | case BFD_RELOC_SPARC_7: | |
2979 | case BFD_RELOC_SPARC_10: | |
2980 | case BFD_RELOC_SPARC_11: | |
2981 | case BFD_RELOC_SPARC_HH22: | |
2982 | case BFD_RELOC_SPARC_HM10: | |
2983 | case BFD_RELOC_SPARC_LM22: | |
2984 | case BFD_RELOC_SPARC_PC_HH22: | |
2985 | case BFD_RELOC_SPARC_PC_HM10: | |
2986 | case BFD_RELOC_SPARC_PC_LM22: | |
2987 | case BFD_RELOC_SPARC_H44: | |
2988 | case BFD_RELOC_SPARC_M44: | |
2989 | case BFD_RELOC_SPARC_L44: | |
2990 | case BFD_RELOC_SPARC_HIX22: | |
2991 | case BFD_RELOC_SPARC_LOX10: | |
2992 | case BFD_RELOC_SPARC_REV32: | |
2993 | case BFD_RELOC_VTABLE_ENTRY: | |
2994 | case BFD_RELOC_VTABLE_INHERIT: | |
2995 | code = fixp->fx_r_type; | |
2996 | break; | |
2997 | default: | |
2998 | abort (); | |
2999 | return NULL; | |
3000 | } | |
3001 | ||
3002 | #if defined (OBJ_ELF) || defined (OBJ_AOUT) | |
3003 | /* If we are generating PIC code, we need to generate a different | |
3004 | set of relocs. */ | |
3005 | ||
3006 | #ifdef OBJ_ELF | |
3007 | #define GOT_NAME "_GLOBAL_OFFSET_TABLE_" | |
3008 | #else | |
3009 | #define GOT_NAME "__GLOBAL_OFFSET_TABLE_" | |
3010 | #endif | |
3011 | ||
3012 | if (sparc_pic_code) | |
3013 | { | |
3014 | switch (code) | |
3015 | { | |
3016 | case BFD_RELOC_32_PCREL_S2: | |
3017 | if (! S_IS_DEFINED (fixp->fx_addsy) | |
3018 | || S_IS_COMMON (fixp->fx_addsy) | |
3019 | || S_IS_EXTERNAL (fixp->fx_addsy) | |
3020 | || S_IS_WEAK (fixp->fx_addsy)) | |
3021 | code = BFD_RELOC_SPARC_WPLT30; | |
3022 | break; | |
3023 | case BFD_RELOC_HI22: | |
3024 | if (fixp->fx_addsy != NULL | |
3025 | && strcmp (S_GET_NAME (fixp->fx_addsy), GOT_NAME) == 0) | |
3026 | code = BFD_RELOC_SPARC_PC22; | |
3027 | else | |
3028 | code = BFD_RELOC_SPARC_GOT22; | |
3029 | break; | |
3030 | case BFD_RELOC_LO10: | |
3031 | if (fixp->fx_addsy != NULL | |
3032 | && strcmp (S_GET_NAME (fixp->fx_addsy), GOT_NAME) == 0) | |
3033 | code = BFD_RELOC_SPARC_PC10; | |
3034 | else | |
3035 | code = BFD_RELOC_SPARC_GOT10; | |
3036 | break; | |
3037 | case BFD_RELOC_SPARC13: | |
3038 | code = BFD_RELOC_SPARC_GOT13; | |
3039 | break; | |
3040 | default: | |
3041 | break; | |
3042 | } | |
3043 | } | |
3044 | #endif /* defined (OBJ_ELF) || defined (OBJ_AOUT) */ | |
3045 | ||
3046 | reloc->howto = bfd_reloc_type_lookup (stdoutput, code); | |
3047 | if (reloc->howto == 0) | |
3048 | { | |
3049 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
3050 | _("internal error: can't export reloc type %d (`%s')"), | |
3051 | fixp->fx_r_type, bfd_get_reloc_code_name (code)); | |
3052 | return 0; | |
3053 | } | |
3054 | ||
3055 | /* @@ Why fx_addnumber sometimes and fx_offset other times? */ | |
3056 | #ifdef OBJ_AOUT | |
3057 | ||
3058 | if (reloc->howto->pc_relative == 0 | |
3059 | || code == BFD_RELOC_SPARC_PC10 | |
3060 | || code == BFD_RELOC_SPARC_PC22) | |
3061 | reloc->addend = fixp->fx_addnumber; | |
3062 | else if (sparc_pic_code | |
3063 | && fixp->fx_r_type == BFD_RELOC_32_PCREL_S2 | |
3064 | && fixp->fx_addsy != NULL | |
3065 | && (S_IS_EXTERNAL (fixp->fx_addsy) | |
3066 | || S_IS_WEAK (fixp->fx_addsy)) | |
3067 | && S_IS_DEFINED (fixp->fx_addsy) | |
3068 | && ! S_IS_COMMON (fixp->fx_addsy)) | |
3069 | reloc->addend = fixp->fx_addnumber; | |
3070 | else | |
3071 | reloc->addend = fixp->fx_offset - reloc->address; | |
3072 | ||
3073 | #else /* elf or coff */ | |
3074 | ||
3075 | if (reloc->howto->pc_relative == 0 | |
3076 | || code == BFD_RELOC_SPARC_PC10 | |
3077 | || code == BFD_RELOC_SPARC_PC22) | |
3078 | reloc->addend = fixp->fx_addnumber; | |
49309057 | 3079 | else if (symbol_section_p (fixp->fx_addsy)) |
252b5132 RH |
3080 | reloc->addend = (section->vma |
3081 | + fixp->fx_addnumber | |
3082 | + md_pcrel_from (fixp)); | |
3083 | else | |
3084 | reloc->addend = fixp->fx_offset; | |
3085 | #endif | |
3086 | ||
3087 | return reloc; | |
3088 | } | |
3089 | \f | |
3090 | /* We have no need to default values of symbols. */ | |
3091 | ||
3092 | /* ARGSUSED */ | |
3093 | symbolS * | |
3094 | md_undefined_symbol (name) | |
3095 | char *name; | |
3096 | { | |
3097 | return 0; | |
3098 | } /* md_undefined_symbol() */ | |
3099 | ||
3100 | /* Round up a section size to the appropriate boundary. */ | |
3101 | valueT | |
3102 | md_section_align (segment, size) | |
3103 | segT segment; | |
3104 | valueT size; | |
3105 | { | |
3106 | #ifndef OBJ_ELF | |
3107 | /* This is not right for ELF; a.out wants it, and COFF will force | |
3108 | the alignment anyways. */ | |
3109 | valueT align = ((valueT) 1 | |
3110 | << (valueT) bfd_get_section_alignment (stdoutput, segment)); | |
3111 | valueT newsize; | |
3112 | /* turn alignment value into a mask */ | |
3113 | align--; | |
3114 | newsize = (size + align) & ~align; | |
3115 | return newsize; | |
3116 | #else | |
3117 | return size; | |
3118 | #endif | |
3119 | } | |
3120 | ||
3121 | /* Exactly what point is a PC-relative offset relative TO? | |
3122 | On the sparc, they're relative to the address of the offset, plus | |
3123 | its size. This gets us to the following instruction. | |
3124 | (??? Is this right? FIXME-SOON) */ | |
3125 | long | |
3126 | md_pcrel_from (fixP) | |
3127 | fixS *fixP; | |
3128 | { | |
3129 | long ret; | |
3130 | ||
3131 | ret = fixP->fx_where + fixP->fx_frag->fr_address; | |
3132 | if (! sparc_pic_code | |
3133 | || fixP->fx_addsy == NULL | |
49309057 | 3134 | || symbol_section_p (fixP->fx_addsy)) |
252b5132 RH |
3135 | ret += fixP->fx_size; |
3136 | return ret; | |
3137 | } | |
3138 | \f | |
3139 | /* Return log2 (VALUE), or -1 if VALUE is not an exact positive power | |
3140 | of two. */ | |
3141 | ||
3142 | static int | |
3143 | log2 (value) | |
3144 | int value; | |
3145 | { | |
3146 | int shift; | |
3147 | ||
3148 | if (value <= 0) | |
3149 | return -1; | |
3150 | ||
3151 | for (shift = 0; (value & 1) == 0; value >>= 1) | |
3152 | ++shift; | |
3153 | ||
3154 | return (value == 1) ? shift : -1; | |
3155 | } | |
3156 | ||
3157 | /* | |
3158 | * sort of like s_lcomm | |
3159 | */ | |
3160 | ||
3161 | #ifndef OBJ_ELF | |
3162 | static int max_alignment = 15; | |
3163 | #endif | |
3164 | ||
3165 | static void | |
3166 | s_reserve (ignore) | |
3167 | int ignore; | |
3168 | { | |
3169 | char *name; | |
3170 | char *p; | |
3171 | char c; | |
3172 | int align; | |
3173 | int size; | |
3174 | int temp; | |
3175 | symbolS *symbolP; | |
3176 | ||
3177 | name = input_line_pointer; | |
3178 | c = get_symbol_end (); | |
3179 | p = input_line_pointer; | |
3180 | *p = c; | |
3181 | SKIP_WHITESPACE (); | |
3182 | ||
3183 | if (*input_line_pointer != ',') | |
3184 | { | |
3185 | as_bad (_("Expected comma after name")); | |
3186 | ignore_rest_of_line (); | |
3187 | return; | |
3188 | } | |
3189 | ||
3190 | ++input_line_pointer; | |
3191 | ||
3192 | if ((size = get_absolute_expression ()) < 0) | |
3193 | { | |
3194 | as_bad (_("BSS length (%d.) <0! Ignored."), size); | |
3195 | ignore_rest_of_line (); | |
3196 | return; | |
3197 | } /* bad length */ | |
3198 | ||
3199 | *p = 0; | |
3200 | symbolP = symbol_find_or_make (name); | |
3201 | *p = c; | |
3202 | ||
3203 | if (strncmp (input_line_pointer, ",\"bss\"", 6) != 0 | |
3204 | && strncmp (input_line_pointer, ",\".bss\"", 7) != 0) | |
3205 | { | |
3206 | as_bad (_("bad .reserve segment -- expected BSS segment")); | |
3207 | return; | |
3208 | } | |
3209 | ||
3210 | if (input_line_pointer[2] == '.') | |
3211 | input_line_pointer += 7; | |
3212 | else | |
3213 | input_line_pointer += 6; | |
3214 | SKIP_WHITESPACE (); | |
3215 | ||
3216 | if (*input_line_pointer == ',') | |
3217 | { | |
3218 | ++input_line_pointer; | |
3219 | ||
3220 | SKIP_WHITESPACE (); | |
3221 | if (*input_line_pointer == '\n') | |
3222 | { | |
3223 | as_bad (_("missing alignment")); | |
3224 | ignore_rest_of_line (); | |
3225 | return; | |
3226 | } | |
3227 | ||
3228 | align = (int) get_absolute_expression (); | |
3229 | ||
3230 | #ifndef OBJ_ELF | |
3231 | if (align > max_alignment) | |
3232 | { | |
3233 | align = max_alignment; | |
3234 | as_warn (_("alignment too large; assuming %d"), align); | |
3235 | } | |
3236 | #endif | |
3237 | ||
3238 | if (align < 0) | |
3239 | { | |
3240 | as_bad (_("negative alignment")); | |
3241 | ignore_rest_of_line (); | |
3242 | return; | |
3243 | } | |
3244 | ||
3245 | if (align != 0) | |
3246 | { | |
3247 | temp = log2 (align); | |
3248 | if (temp < 0) | |
3249 | { | |
3250 | as_bad (_("alignment not a power of 2")); | |
3251 | ignore_rest_of_line (); | |
3252 | return; | |
3253 | } | |
3254 | ||
3255 | align = temp; | |
3256 | } | |
3257 | ||
3258 | record_alignment (bss_section, align); | |
3259 | } | |
3260 | else | |
3261 | align = 0; | |
3262 | ||
3263 | if (!S_IS_DEFINED (symbolP) | |
3264 | #ifdef OBJ_AOUT | |
3265 | && S_GET_OTHER (symbolP) == 0 | |
3266 | && S_GET_DESC (symbolP) == 0 | |
3267 | #endif | |
3268 | ) | |
3269 | { | |
3270 | if (! need_pass_2) | |
3271 | { | |
3272 | char *pfrag; | |
3273 | segT current_seg = now_seg; | |
3274 | subsegT current_subseg = now_subseg; | |
3275 | ||
3276 | subseg_set (bss_section, 1); /* switch to bss */ | |
3277 | ||
3278 | if (align) | |
3279 | frag_align (align, 0, 0); /* do alignment */ | |
3280 | ||
3281 | /* detach from old frag */ | |
3282 | if (S_GET_SEGMENT(symbolP) == bss_section) | |
49309057 | 3283 | symbol_get_frag (symbolP)->fr_symbol = NULL; |
252b5132 | 3284 | |
49309057 | 3285 | symbol_set_frag (symbolP, frag_now); |
252b5132 RH |
3286 | pfrag = frag_var (rs_org, 1, 1, (relax_substateT)0, symbolP, |
3287 | (offsetT) size, (char *)0); | |
3288 | *pfrag = 0; | |
3289 | ||
3290 | S_SET_SEGMENT (symbolP, bss_section); | |
3291 | ||
3292 | subseg_set (current_seg, current_subseg); | |
3293 | ||
3294 | #ifdef OBJ_ELF | |
3295 | S_SET_SIZE (symbolP, size); | |
3296 | #endif | |
3297 | } | |
3298 | } | |
3299 | else | |
3300 | { | |
3301 | as_warn("Ignoring attempt to re-define symbol %s", | |
3302 | S_GET_NAME (symbolP)); | |
3303 | } /* if not redefining */ | |
3304 | ||
3305 | demand_empty_rest_of_line (); | |
3306 | } | |
3307 | ||
3308 | static void | |
3309 | s_common (ignore) | |
3310 | int ignore; | |
3311 | { | |
3312 | char *name; | |
3313 | char c; | |
3314 | char *p; | |
3315 | int temp, size; | |
3316 | symbolS *symbolP; | |
3317 | ||
3318 | name = input_line_pointer; | |
3319 | c = get_symbol_end (); | |
3320 | /* just after name is now '\0' */ | |
3321 | p = input_line_pointer; | |
3322 | *p = c; | |
3323 | SKIP_WHITESPACE (); | |
3324 | if (*input_line_pointer != ',') | |
3325 | { | |
3326 | as_bad (_("Expected comma after symbol-name")); | |
3327 | ignore_rest_of_line (); | |
3328 | return; | |
3329 | } | |
3330 | input_line_pointer++; /* skip ',' */ | |
3331 | if ((temp = get_absolute_expression ()) < 0) | |
3332 | { | |
3333 | as_bad (_(".COMMon length (%d.) <0! Ignored."), temp); | |
3334 | ignore_rest_of_line (); | |
3335 | return; | |
3336 | } | |
3337 | size = temp; | |
3338 | *p = 0; | |
3339 | symbolP = symbol_find_or_make (name); | |
3340 | *p = c; | |
3341 | if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP)) | |
3342 | { | |
3343 | as_bad (_("Ignoring attempt to re-define symbol")); | |
3344 | ignore_rest_of_line (); | |
3345 | return; | |
3346 | } | |
3347 | if (S_GET_VALUE (symbolP) != 0) | |
3348 | { | |
3349 | if (S_GET_VALUE (symbolP) != (valueT) size) | |
3350 | { | |
3351 | as_warn (_("Length of .comm \"%s\" is already %ld. Not changed to %d."), | |
3352 | S_GET_NAME (symbolP), (long) S_GET_VALUE (symbolP), size); | |
3353 | } | |
3354 | } | |
3355 | else | |
3356 | { | |
3357 | #ifndef OBJ_ELF | |
3358 | S_SET_VALUE (symbolP, (valueT) size); | |
3359 | S_SET_EXTERNAL (symbolP); | |
3360 | #endif | |
3361 | } | |
3362 | know (symbolP->sy_frag == &zero_address_frag); | |
3363 | if (*input_line_pointer != ',') | |
3364 | { | |
3365 | as_bad (_("Expected comma after common length")); | |
3366 | ignore_rest_of_line (); | |
3367 | return; | |
3368 | } | |
3369 | input_line_pointer++; | |
3370 | SKIP_WHITESPACE (); | |
3371 | if (*input_line_pointer != '"') | |
3372 | { | |
3373 | temp = get_absolute_expression (); | |
3374 | ||
3375 | #ifndef OBJ_ELF | |
3376 | if (temp > max_alignment) | |
3377 | { | |
3378 | temp = max_alignment; | |
3379 | as_warn (_("alignment too large; assuming %d"), temp); | |
3380 | } | |
3381 | #endif | |
3382 | ||
3383 | if (temp < 0) | |
3384 | { | |
3385 | as_bad (_("negative alignment")); | |
3386 | ignore_rest_of_line (); | |
3387 | return; | |
3388 | } | |
3389 | ||
3390 | #ifdef OBJ_ELF | |
49309057 | 3391 | if (symbol_get_obj (symbolP)->local) |
252b5132 RH |
3392 | { |
3393 | segT old_sec; | |
3394 | int old_subsec; | |
3395 | char *p; | |
3396 | int align; | |
3397 | ||
3398 | old_sec = now_seg; | |
3399 | old_subsec = now_subseg; | |
3400 | ||
3401 | if (temp == 0) | |
3402 | align = 0; | |
3403 | else | |
3404 | align = log2 (temp); | |
3405 | ||
3406 | if (align < 0) | |
3407 | { | |
3408 | as_bad (_("alignment not a power of 2")); | |
3409 | ignore_rest_of_line (); | |
3410 | return; | |
3411 | } | |
3412 | ||
3413 | record_alignment (bss_section, align); | |
3414 | subseg_set (bss_section, 0); | |
3415 | if (align) | |
3416 | frag_align (align, 0, 0); | |
3417 | if (S_GET_SEGMENT (symbolP) == bss_section) | |
49309057 ILT |
3418 | symbol_get_frag (symbolP)->fr_symbol = 0; |
3419 | symbol_set_frag (symbolP, frag_now); | |
252b5132 RH |
3420 | p = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, |
3421 | (offsetT) size, (char *) 0); | |
3422 | *p = 0; | |
3423 | S_SET_SEGMENT (symbolP, bss_section); | |
3424 | S_CLEAR_EXTERNAL (symbolP); | |
3425 | S_SET_SIZE (symbolP, size); | |
3426 | subseg_set (old_sec, old_subsec); | |
3427 | } | |
3428 | else | |
3429 | #endif /* OBJ_ELF */ | |
3430 | { | |
3431 | allocate_common: | |
3432 | S_SET_VALUE (symbolP, (valueT) size); | |
3433 | #ifdef OBJ_ELF | |
3434 | S_SET_ALIGN (symbolP, temp); | |
3435 | S_SET_SIZE (symbolP, size); | |
3436 | #endif | |
3437 | S_SET_EXTERNAL (symbolP); | |
3438 | S_SET_SEGMENT (symbolP, bfd_com_section_ptr); | |
3439 | } | |
3440 | } | |
3441 | else | |
3442 | { | |
3443 | input_line_pointer++; | |
3444 | /* @@ Some use the dot, some don't. Can we get some consistency?? */ | |
3445 | if (*input_line_pointer == '.') | |
3446 | input_line_pointer++; | |
3447 | /* @@ Some say data, some say bss. */ | |
3448 | if (strncmp (input_line_pointer, "bss\"", 4) | |
3449 | && strncmp (input_line_pointer, "data\"", 5)) | |
3450 | { | |
3451 | while (*--input_line_pointer != '"') | |
3452 | ; | |
3453 | input_line_pointer--; | |
3454 | goto bad_common_segment; | |
3455 | } | |
3456 | while (*input_line_pointer++ != '"') | |
3457 | ; | |
3458 | goto allocate_common; | |
3459 | } | |
3460 | ||
3461 | #ifdef BFD_ASSEMBLER | |
49309057 | 3462 | symbol_get_bfdsym (symbolP)->flags |= BSF_OBJECT; |
252b5132 RH |
3463 | #endif |
3464 | ||
3465 | demand_empty_rest_of_line (); | |
3466 | return; | |
3467 | ||
3468 | { | |
3469 | bad_common_segment: | |
3470 | p = input_line_pointer; | |
3471 | while (*p && *p != '\n') | |
3472 | p++; | |
3473 | c = *p; | |
3474 | *p = '\0'; | |
3475 | as_bad (_("bad .common segment %s"), input_line_pointer + 1); | |
3476 | *p = c; | |
3477 | input_line_pointer = p; | |
3478 | ignore_rest_of_line (); | |
3479 | return; | |
3480 | } | |
3481 | } | |
3482 | ||
3483 | /* Handle the .empty pseudo-op. This supresses the warnings about | |
3484 | invalid delay slot usage. */ | |
3485 | ||
3486 | static void | |
3487 | s_empty (ignore) | |
3488 | int ignore; | |
3489 | { | |
3490 | /* The easy way to implement is to just forget about the last | |
3491 | instruction. */ | |
3492 | last_insn = NULL; | |
3493 | } | |
3494 | ||
3495 | static void | |
3496 | s_seg (ignore) | |
3497 | int ignore; | |
3498 | { | |
3499 | ||
3500 | if (strncmp (input_line_pointer, "\"text\"", 6) == 0) | |
3501 | { | |
3502 | input_line_pointer += 6; | |
3503 | s_text (0); | |
3504 | return; | |
3505 | } | |
3506 | if (strncmp (input_line_pointer, "\"data\"", 6) == 0) | |
3507 | { | |
3508 | input_line_pointer += 6; | |
3509 | s_data (0); | |
3510 | return; | |
3511 | } | |
3512 | if (strncmp (input_line_pointer, "\"data1\"", 7) == 0) | |
3513 | { | |
3514 | input_line_pointer += 7; | |
3515 | s_data1 (); | |
3516 | return; | |
3517 | } | |
3518 | if (strncmp (input_line_pointer, "\"bss\"", 5) == 0) | |
3519 | { | |
3520 | input_line_pointer += 5; | |
3521 | /* We only support 2 segments -- text and data -- for now, so | |
3522 | things in the "bss segment" will have to go into data for now. | |
3523 | You can still allocate SEG_BSS stuff with .lcomm or .reserve. */ | |
3524 | subseg_set (data_section, 255); /* FIXME-SOMEDAY */ | |
3525 | return; | |
3526 | } | |
3527 | as_bad (_("Unknown segment type")); | |
3528 | demand_empty_rest_of_line (); | |
3529 | } | |
3530 | ||
3531 | static void | |
3532 | s_data1 () | |
3533 | { | |
3534 | subseg_set (data_section, 1); | |
3535 | demand_empty_rest_of_line (); | |
3536 | } | |
3537 | ||
3538 | static void | |
3539 | s_proc (ignore) | |
3540 | int ignore; | |
3541 | { | |
3542 | while (!is_end_of_line[(unsigned char) *input_line_pointer]) | |
3543 | { | |
3544 | ++input_line_pointer; | |
3545 | } | |
3546 | ++input_line_pointer; | |
3547 | } | |
3548 | ||
3549 | /* This static variable is set by s_uacons to tell sparc_cons_align | |
3550 | that the expession does not need to be aligned. */ | |
3551 | ||
3552 | static int sparc_no_align_cons = 0; | |
3553 | ||
3554 | /* This handles the unaligned space allocation pseudo-ops, such as | |
3555 | .uaword. .uaword is just like .word, but the value does not need | |
3556 | to be aligned. */ | |
3557 | ||
3558 | static void | |
3559 | s_uacons (bytes) | |
3560 | int bytes; | |
3561 | { | |
3562 | /* Tell sparc_cons_align not to align this value. */ | |
3563 | sparc_no_align_cons = 1; | |
3564 | cons (bytes); | |
3565 | } | |
3566 | ||
cf9a1301 RH |
3567 | /* This handles the native word allocation pseudo-op .nword. |
3568 | For sparc_arch_size 32 it is equivalent to .word, for | |
3569 | sparc_arch_size 64 it is equivalent to .xword. */ | |
3570 | ||
3571 | static void | |
3572 | s_ncons (bytes) | |
3573 | int bytes; | |
3574 | { | |
3575 | cons (sparc_arch_size == 32 ? 4 : 8); | |
3576 | } | |
3577 | ||
252b5132 RH |
3578 | /* If the --enforce-aligned-data option is used, we require .word, |
3579 | et. al., to be aligned correctly. We do it by setting up an | |
3580 | rs_align_code frag, and checking in HANDLE_ALIGN to make sure that | |
3581 | no unexpected alignment was introduced. | |
3582 | ||
3583 | The SunOS and Solaris native assemblers enforce aligned data by | |
3584 | default. We don't want to do that, because gcc can deliberately | |
3585 | generate misaligned data if the packed attribute is used. Instead, | |
3586 | we permit misaligned data by default, and permit the user to set an | |
3587 | option to check for it. */ | |
3588 | ||
3589 | void | |
3590 | sparc_cons_align (nbytes) | |
3591 | int nbytes; | |
3592 | { | |
3593 | int nalign; | |
3594 | char *p; | |
3595 | ||
3596 | /* Only do this if we are enforcing aligned data. */ | |
3597 | if (! enforce_aligned_data) | |
3598 | return; | |
3599 | ||
3600 | if (sparc_no_align_cons) | |
3601 | { | |
3602 | /* This is an unaligned pseudo-op. */ | |
3603 | sparc_no_align_cons = 0; | |
3604 | return; | |
3605 | } | |
3606 | ||
3607 | nalign = log2 (nbytes); | |
3608 | if (nalign == 0) | |
3609 | return; | |
3610 | ||
3611 | assert (nalign > 0); | |
3612 | ||
3613 | if (now_seg == absolute_section) | |
3614 | { | |
3615 | if ((abs_section_offset & ((1 << nalign) - 1)) != 0) | |
3616 | as_bad (_("misaligned data")); | |
3617 | return; | |
3618 | } | |
3619 | ||
3620 | p = frag_var (rs_align_code, 1, 1, (relax_substateT) 0, | |
3621 | (symbolS *) NULL, (offsetT) nalign, (char *) NULL); | |
3622 | ||
3623 | record_alignment (now_seg, nalign); | |
3624 | } | |
3625 | ||
3626 | /* This is where we do the unexpected alignment check. | |
3627 | This is called from HANDLE_ALIGN in tc-sparc.h. */ | |
3628 | ||
3629 | void | |
3630 | sparc_handle_align (fragp) | |
3631 | fragS *fragp; | |
3632 | { | |
3633 | if (fragp->fr_type == rs_align_code && !fragp->fr_subtype | |
3634 | && fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix != 0) | |
3635 | as_bad_where (fragp->fr_file, fragp->fr_line, _("misaligned data")); | |
3636 | if (fragp->fr_type == rs_align_code && fragp->fr_subtype == 1024) | |
3637 | { | |
3638 | int count = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix; | |
3639 | ||
3640 | if (count >= 4 | |
3641 | && !(count & 3) | |
3642 | && count <= 1024 | |
3643 | && !((long)(fragp->fr_literal + fragp->fr_fix) & 3)) | |
3644 | { | |
3645 | unsigned *p = (unsigned *)(fragp->fr_literal + fragp->fr_fix); | |
3646 | int i; | |
3647 | ||
3648 | for (i = 0; i < count; i += 4, p++) | |
3649 | if (INSN_BIG_ENDIAN) | |
3650 | number_to_chars_bigendian ((char *)p, 0x01000000, 4); /* emit nops */ | |
3651 | else | |
3652 | number_to_chars_littleendian ((char *)p, 0x10000000, 4); | |
3653 | ||
3654 | if (SPARC_OPCODE_ARCH_V9_P (max_architecture) && count > 8) | |
3655 | { | |
3656 | char *waddr = &fragp->fr_literal[fragp->fr_fix]; | |
3657 | unsigned wval = (0x30680000 | count >> 2); /* ba,a,pt %xcc, 1f */ | |
3658 | if (INSN_BIG_ENDIAN) | |
3659 | number_to_chars_bigendian (waddr, wval, 4); | |
3660 | else | |
3661 | number_to_chars_littleendian (waddr, wval, 4); | |
3662 | } | |
3663 | fragp->fr_var = count; | |
3664 | } | |
3665 | } | |
3666 | } | |
3667 | ||
3668 | #ifdef OBJ_ELF | |
3669 | /* Some special processing for a Sparc ELF file. */ | |
3670 | ||
3671 | void | |
3672 | sparc_elf_final_processing () | |
3673 | { | |
3674 | /* Set the Sparc ELF flag bits. FIXME: There should probably be some | |
3675 | sort of BFD interface for this. */ | |
3676 | if (sparc_arch_size == 64) | |
3677 | { | |
3678 | switch (sparc_memory_model) | |
3679 | { | |
3680 | case MM_RMO: | |
3681 | elf_elfheader (stdoutput)->e_flags |= EF_SPARCV9_RMO; | |
3682 | break; | |
3683 | case MM_PSO: | |
3684 | elf_elfheader (stdoutput)->e_flags |= EF_SPARCV9_PSO; | |
3685 | break; | |
3686 | default: | |
3687 | break; | |
3688 | } | |
3689 | } | |
3690 | else if (current_architecture >= SPARC_OPCODE_ARCH_V9) | |
3691 | elf_elfheader (stdoutput)->e_flags |= EF_SPARC_32PLUS; | |
3692 | if (current_architecture == SPARC_OPCODE_ARCH_V9A) | |
3693 | elf_elfheader (stdoutput)->e_flags |= EF_SPARC_SUN_US1; | |
3694 | } | |
3695 | #endif | |
3696 | ||
3697 | /* This is called by emit_expr via TC_CONS_FIX_NEW when creating a | |
3698 | reloc for a cons. We could use the definition there, except that | |
3699 | we want to handle little endian relocs specially. */ | |
3700 | ||
3701 | void | |
3702 | cons_fix_new_sparc (frag, where, nbytes, exp) | |
3703 | fragS *frag; | |
3704 | int where; | |
3705 | unsigned int nbytes; | |
3706 | expressionS *exp; | |
3707 | { | |
3708 | bfd_reloc_code_real_type r; | |
3709 | ||
3710 | r = (nbytes == 1 ? BFD_RELOC_8 : | |
3711 | (nbytes == 2 ? BFD_RELOC_16 : | |
3712 | (nbytes == 4 ? BFD_RELOC_32 : BFD_RELOC_64))); | |
3713 | ||
3714 | if (target_little_endian_data && nbytes == 4 | |
3715 | && now_seg->flags & SEC_ALLOC) | |
3716 | r = BFD_RELOC_SPARC_REV32; | |
3717 | fix_new_exp (frag, where, (int) nbytes, exp, 0, r); | |
3718 | } | |
3719 | ||
3720 | #ifdef OBJ_ELF | |
3721 | int | |
3722 | elf32_sparc_force_relocation (fixp) | |
3723 | struct fix *fixp; | |
3724 | { | |
3725 | if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT | |
3726 | || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY) | |
3727 | return 1; | |
3728 | ||
3729 | return 0; | |
3730 | } | |
3731 | #endif | |
3732 |