Commit | Line | Data |
---|---|---|
fecd2382 | 1 | /* tc-sparc.c -- Assemble for the SPARC |
590c50d8 | 2 | Copyright (C) 1989, 90-96, 1997 Free Software Foundation, Inc. |
355afbcd | 3 | |
fecd2382 | 4 | This file is part of GAS, the GNU Assembler. |
355afbcd | 5 | |
fecd2382 RP |
6 | GAS is free software; you can redistribute it and/or modify |
7 | it under the terms of the GNU General Public License as published by | |
6321e9ea | 8 | the Free Software Foundation; either version 2, or (at your option) |
fecd2382 | 9 | any later version. |
355afbcd | 10 | |
fecd2382 RP |
11 | GAS is distributed in the hope that it will be useful, |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
355afbcd | 15 | |
8dd07a84 ILT |
16 | You should have received a copy of the GNU General Public |
17 | License along with GAS; see the file COPYING. If not, write | |
18 | to the Free Software Foundation, 59 Temple Place - Suite 330, | |
19 | Boston, MA 02111-1307, USA. */ | |
fecd2382 | 20 | |
fecd2382 RP |
21 | #include <stdio.h> |
22 | #include <ctype.h> | |
23 | ||
24 | #include "as.h" | |
7ab2e983 | 25 | #include "subsegs.h" |
fecd2382 RP |
26 | |
27 | /* careful, this file includes data *declarations* */ | |
584a0f78 | 28 | #include "opcode/sparc.h" |
fecd2382 | 29 | |
ed94c2b8 | 30 | static void sparc_ip PARAMS ((char *, const struct sparc_opcode **)); |
9f6da653 DE |
31 | static int in_signed_range PARAMS ((bfd_signed_vma, bfd_signed_vma)); |
32 | static int in_bitfield_range PARAMS ((bfd_signed_vma, bfd_signed_vma)); | |
33 | static int sparc_ffs PARAMS ((unsigned int)); | |
34 | static bfd_vma BSR PARAMS ((bfd_vma, int)); | |
35 | static int cmp_reg_entry PARAMS ((const PTR, const PTR)); | |
36 | static int parse_keyword_arg PARAMS ((int (*) (const char *), char **, int *)); | |
37 | static int parse_const_expr_arg PARAMS ((char **, int *)); | |
fecd2382 | 38 | |
e70ad5d5 DE |
39 | /* Current architecture. We don't bump up unless necessary. */ |
40 | static enum sparc_opcode_arch_val current_architecture = SPARC_OPCODE_ARCH_V6; | |
41 | ||
42 | /* The maximum architecture level we can bump up to. | |
43 | In a 32 bit environment, don't allow bumping up to v9 by default. | |
2b063e6d | 44 | The native assembler works this way. The user is required to pass |
e70ad5d5 DE |
45 | an explicit argument before we'll create v9 object files. However, if |
46 | we don't see any v9 insns, a v9 object file is not created. */ | |
6df07e7f | 47 | #ifdef SPARC_ARCH64 |
e70ad5d5 | 48 | static enum sparc_opcode_arch_val max_architecture = SPARC_OPCODE_ARCH_V9; |
5e0a90a8 | 49 | #else |
d8b42b96 DE |
50 | /* ??? This should be V8, but sparclite support was added by making it the |
51 | default. GCC now passes -Asparclite, so maybe sometime in the future | |
52 | we can set this to V8. */ | |
53 | static enum sparc_opcode_arch_val max_architecture = SPARC_OPCODE_ARCH_SPARCLITE; | |
6df07e7f DE |
54 | #endif |
55 | ||
428d312b KR |
56 | static int architecture_requested; |
57 | static int warn_on_bump; | |
839df5c3 | 58 | |
e70ad5d5 DE |
59 | /* If warn_on_bump and the needed architecture is higher than this |
60 | architecture, issue a warning. */ | |
61 | static enum sparc_opcode_arch_val warn_after_architecture; | |
62 | ||
4c67b523 ILT |
63 | /* Non-zero if we are generating PIC code. */ |
64 | int sparc_pic_code; | |
65 | ||
2b063e6d ILT |
66 | /* Non-zero if we should give an error when misaligned data is seen. */ |
67 | static int enforce_aligned_data; | |
68 | ||
ed9638af KR |
69 | extern int target_big_endian; |
70 | ||
2b063e6d ILT |
71 | /* V9 has big and little endian data, but instructions are always big endian. |
72 | The sparclet has bi-endian support but both data and insns have the same | |
73 | endianness. Global `target_big_endian' is used for data. The following | |
74 | macro is used for instructions. */ | |
75 | #define INSN_BIG_ENDIAN (target_big_endian \ | |
76 | || SPARC_OPCODE_ARCH_V9_P (max_architecture)) | |
77 | ||
fecd2382 | 78 | /* handle of the OPCODE hash table */ |
5e0a90a8 | 79 | static struct hash_control *op_hash; |
fecd2382 | 80 | |
7766838e ILT |
81 | static void s_data1 PARAMS ((void)); |
82 | static void s_seg PARAMS ((int)); | |
83 | static void s_proc PARAMS ((int)); | |
84 | static void s_reserve PARAMS ((int)); | |
85 | static void s_common PARAMS ((int)); | |
8dd07a84 ILT |
86 | static void s_empty PARAMS ((int)); |
87 | static void s_uacons PARAMS ((int)); | |
428d312b | 88 | |
355afbcd KR |
89 | const pseudo_typeS md_pseudo_table[] = |
90 | { | |
91 | {"align", s_align_bytes, 0}, /* Defaulting is invalid (0) */ | |
92 | {"common", s_common, 0}, | |
8dd07a84 | 93 | {"empty", s_empty, 0}, |
355afbcd KR |
94 | {"global", s_globl, 0}, |
95 | {"half", cons, 2}, | |
96 | {"optim", s_ignore, 0}, | |
97 | {"proc", s_proc, 0}, | |
98 | {"reserve", s_reserve, 0}, | |
99 | {"seg", s_seg, 0}, | |
100 | {"skip", s_space, 0}, | |
101 | {"word", cons, 4}, | |
7766838e | 102 | {"xword", cons, 8}, |
2b063e6d ILT |
103 | {"uahalf", s_uacons, 2}, |
104 | {"uaword", s_uacons, 4}, | |
105 | {"uaxword", s_uacons, 8}, | |
693b21e7 | 106 | #ifdef OBJ_ELF |
693b21e7 KR |
107 | /* these are specific to sparc/svr4 */ |
108 | {"pushsection", obj_elf_section, 0}, | |
109 | {"popsection", obj_elf_previous, 0}, | |
2b063e6d ILT |
110 | {"2byte", s_uacons, 2}, |
111 | {"4byte", s_uacons, 4}, | |
112 | {"8byte", s_uacons, 8}, | |
693b21e7 | 113 | #endif |
355afbcd | 114 | {NULL, 0, 0}, |
fecd2382 RP |
115 | }; |
116 | ||
355afbcd | 117 | const int md_reloc_size = 12; /* Size of relocation record */ |
fecd2382 RP |
118 | |
119 | /* This array holds the chars that always start a comment. If the | |
120 | pre-processor is disabled, these aren't very useful */ | |
839df5c3 | 121 | const char comment_chars[] = "!"; /* JF removed '|' from comment_chars */ |
fecd2382 RP |
122 | |
123 | /* This array holds the chars that only start a comment at the beginning of | |
124 | a line. If the line seems to have the form '# 123 filename' | |
125 | .line and .file directives will appear in the pre-processed output */ | |
126 | /* Note that input_file.c hand checks for '#' at the beginning of the | |
127 | first line of the input file. This is because the compiler outputs | |
128 | #NO_APP at the beginning of its output. */ | |
839df5c3 RP |
129 | /* Also note that comments started like this one will always |
130 | work if '/' isn't otherwise defined. */ | |
131 | const char line_comment_chars[] = "#"; | |
fecd2382 | 132 | |
355afbcd KR |
133 | const char line_separator_chars[] = ""; |
134 | ||
fecd2382 | 135 | /* Chars that can be used to separate mant from exp in floating point nums */ |
839df5c3 | 136 | const char EXP_CHARS[] = "eE"; |
fecd2382 RP |
137 | |
138 | /* Chars that mean this number is a floating point constant */ | |
139 | /* As in 0f12.456 */ | |
140 | /* or 0d1.2345e12 */ | |
839df5c3 | 141 | const char FLT_CHARS[] = "rRsSfFdDxXpP"; |
fecd2382 RP |
142 | |
143 | /* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be | |
9b6a882e KR |
144 | changed in read.c. Ideally it shouldn't have to know about it at all, |
145 | but nothing is ideal around here. */ | |
fecd2382 RP |
146 | |
147 | static unsigned char octal[256]; | |
58d4951d | 148 | #define isoctal(c) octal[(unsigned char) (c)] |
355afbcd KR |
149 | static unsigned char toHex[256]; |
150 | ||
151 | struct sparc_it | |
152 | { | |
153 | char *error; | |
154 | unsigned long opcode; | |
155 | struct nlist *nlistp; | |
156 | expressionS exp; | |
157 | int pcrel; | |
428d312b | 158 | bfd_reloc_code_real_type reloc; |
428d312b KR |
159 | }; |
160 | ||
161 | struct sparc_it the_insn, set_insn; | |
162 | ||
9f6da653 DE |
163 | static void output_insn |
164 | PARAMS ((const struct sparc_opcode *, struct sparc_it *)); | |
165 | ||
8dd07a84 ILT |
166 | /* Return non-zero if VAL is in the range -(MAX+1) to MAX. */ |
167 | ||
7ab2e983 ILT |
168 | static INLINE int |
169 | in_signed_range (val, max) | |
170 | bfd_signed_vma val, max; | |
171 | { | |
172 | if (max <= 0) | |
173 | abort (); | |
174 | if (val > max) | |
175 | return 0; | |
176 | if (val < ~max) | |
177 | return 0; | |
178 | return 1; | |
179 | } | |
180 | ||
8dd07a84 ILT |
181 | /* Return non-zero if VAL is in the range -(MAX/2+1) to MAX. |
182 | (e.g. -15 to +31). */ | |
183 | ||
184 | static INLINE int | |
185 | in_bitfield_range (val, max) | |
186 | bfd_signed_vma val, max; | |
187 | { | |
188 | if (max <= 0) | |
189 | abort (); | |
190 | if (val > max) | |
191 | return 0; | |
192 | if (val < ~(max >> 1)) | |
193 | return 0; | |
194 | return 1; | |
195 | } | |
196 | ||
d8b42b96 DE |
197 | static int |
198 | sparc_ffs (mask) | |
199 | unsigned int mask; | |
200 | { | |
201 | int i; | |
202 | ||
203 | if (mask == 0) | |
204 | return -1; | |
205 | ||
206 | for (i = 0; (mask & 1) == 0; ++i) | |
207 | mask >>= 1; | |
208 | return i; | |
209 | } | |
210 | ||
2b063e6d ILT |
211 | /* Implement big shift right. */ |
212 | static bfd_vma | |
213 | BSR (val, amount) | |
214 | bfd_vma val; | |
215 | int amount; | |
216 | { | |
217 | if (sizeof (bfd_vma) <= 4 && amount >= 32) | |
218 | as_fatal ("Support for 64-bit arithmetic not compiled in."); | |
219 | return val >> amount; | |
220 | } | |
221 | ||
fecd2382 | 222 | #if 0 |
428d312b | 223 | static void print_insn PARAMS ((struct sparc_it *insn)); |
fecd2382 | 224 | #endif |
428d312b | 225 | static int getExpression PARAMS ((char *str)); |
a87b3269 | 226 | |
fecd2382 RP |
227 | static char *expr_end; |
228 | static int special_case; | |
229 | ||
230 | /* | |
231 | * Instructions that require wierd handling because they're longer than | |
232 | * 4 bytes. | |
233 | */ | |
234 | #define SPECIAL_CASE_SET 1 | |
2b063e6d ILT |
235 | #define SPECIAL_CASE_SETSW 2 |
236 | #define SPECIAL_CASE_SETX 3 | |
237 | /* FIXME: sparc-opc.c doesn't have necessary "S" trigger to enable this. */ | |
238 | #define SPECIAL_CASE_FDIV 4 | |
239 | ||
240 | /* Bit masks of various insns. */ | |
241 | #define NOP_INSN 0x01000000 | |
242 | #define OR_INSN 0x80100000 | |
243 | #define FMOVS_INSN 0x81A00020 | |
244 | #define SETHI_INSN 0x01000000 | |
245 | #define SLLX_INSN 0x81281000 | |
246 | #define SRA_INSN 0x81380000 | |
fecd2382 | 247 | |
ed94c2b8 ILT |
248 | /* The last instruction to be assembled. */ |
249 | static const struct sparc_opcode *last_insn; | |
9f6da653 DE |
250 | /* The assembled opcode of `last_insn'. */ |
251 | static unsigned long last_opcode; | |
ed94c2b8 | 252 | |
fecd2382 RP |
253 | /* |
254 | * sort of like s_lcomm | |
255 | * | |
256 | */ | |
58d4951d | 257 | #ifndef OBJ_ELF |
584a0f78 | 258 | static int max_alignment = 15; |
58d4951d | 259 | #endif |
584a0f78 | 260 | |
355afbcd | 261 | static void |
7766838e ILT |
262 | s_reserve (ignore) |
263 | int ignore; | |
355afbcd KR |
264 | { |
265 | char *name; | |
266 | char *p; | |
267 | char c; | |
268 | int align; | |
269 | int size; | |
270 | int temp; | |
271 | symbolS *symbolP; | |
272 | ||
273 | name = input_line_pointer; | |
274 | c = get_symbol_end (); | |
275 | p = input_line_pointer; | |
276 | *p = c; | |
277 | SKIP_WHITESPACE (); | |
278 | ||
279 | if (*input_line_pointer != ',') | |
280 | { | |
281 | as_bad ("Expected comma after name"); | |
282 | ignore_rest_of_line (); | |
283 | return; | |
284 | } | |
285 | ||
286 | ++input_line_pointer; | |
287 | ||
288 | if ((size = get_absolute_expression ()) < 0) | |
289 | { | |
290 | as_bad ("BSS length (%d.) <0! Ignored.", size); | |
291 | ignore_rest_of_line (); | |
292 | return; | |
293 | } /* bad length */ | |
294 | ||
295 | *p = 0; | |
296 | symbolP = symbol_find_or_make (name); | |
297 | *p = c; | |
298 | ||
125f0b0d KR |
299 | if (strncmp (input_line_pointer, ",\"bss\"", 6) != 0 |
300 | && strncmp (input_line_pointer, ",\".bss\"", 7) != 0) | |
355afbcd | 301 | { |
5e0a90a8 | 302 | as_bad ("bad .reserve segment -- expected BSS segment"); |
355afbcd | 303 | return; |
9b6a882e | 304 | } |
355afbcd | 305 | |
125f0b0d KR |
306 | if (input_line_pointer[2] == '.') |
307 | input_line_pointer += 7; | |
308 | else | |
309 | input_line_pointer += 6; | |
355afbcd KR |
310 | SKIP_WHITESPACE (); |
311 | ||
312 | if (*input_line_pointer == ',') | |
313 | { | |
314 | ++input_line_pointer; | |
315 | ||
316 | SKIP_WHITESPACE (); | |
317 | if (*input_line_pointer == '\n') | |
318 | { | |
319 | as_bad ("Missing alignment"); | |
320 | return; | |
321 | } | |
322 | ||
323 | align = get_absolute_expression (); | |
58d4951d | 324 | #ifndef OBJ_ELF |
355afbcd KR |
325 | if (align > max_alignment) |
326 | { | |
327 | align = max_alignment; | |
328 | as_warn ("Alignment too large: %d. assumed.", align); | |
329 | } | |
58d4951d ILT |
330 | #endif |
331 | if (align < 0) | |
355afbcd KR |
332 | { |
333 | align = 0; | |
334 | as_warn ("Alignment negative. 0 assumed."); | |
fecd2382 | 335 | } |
428d312b KR |
336 | |
337 | record_alignment (bss_section, align); | |
355afbcd KR |
338 | |
339 | /* convert to a power of 2 alignment */ | |
340 | for (temp = 0; (align & 1) == 0; align >>= 1, ++temp);; | |
341 | ||
342 | if (align != 1) | |
343 | { | |
344 | as_bad ("Alignment not a power of 2"); | |
345 | ignore_rest_of_line (); | |
346 | return; | |
347 | } /* not a power of two */ | |
348 | ||
349 | align = temp; | |
355afbcd | 350 | } /* if has optional alignment */ |
428d312b KR |
351 | else |
352 | align = 0; | |
355afbcd | 353 | |
a0eb1c2c | 354 | if (!S_IS_DEFINED (symbolP) |
125f0b0d KR |
355 | #ifdef OBJ_AOUT |
356 | && S_GET_OTHER (symbolP) == 0 | |
355afbcd | 357 | && S_GET_DESC (symbolP) == 0 |
125f0b0d KR |
358 | #endif |
359 | ) | |
355afbcd | 360 | { |
428d312b KR |
361 | if (! need_pass_2) |
362 | { | |
7766838e | 363 | char *pfrag; |
428d312b KR |
364 | segT current_seg = now_seg; |
365 | subsegT current_subseg = now_subseg; | |
366 | ||
367 | subseg_set (bss_section, 1); /* switch to bss */ | |
368 | ||
369 | if (align) | |
590c50d8 | 370 | frag_align (align, 0, 0); /* do alignment */ |
428d312b KR |
371 | |
372 | /* detach from old frag */ | |
373 | if (S_GET_SEGMENT(symbolP) == bss_section) | |
374 | symbolP->sy_frag->fr_symbol = NULL; | |
375 | ||
376 | symbolP->sy_frag = frag_now; | |
7766838e | 377 | pfrag = frag_var (rs_org, 1, 1, (relax_substateT)0, symbolP, |
9f6da653 | 378 | (offsetT) size, (char *)0); |
7766838e | 379 | *pfrag = 0; |
428d312b KR |
380 | |
381 | S_SET_SEGMENT (symbolP, bss_section); | |
382 | ||
383 | subseg_set (current_seg, current_subseg); | |
384 | } | |
355afbcd KR |
385 | } |
386 | else | |
387 | { | |
a0eb1c2c ILT |
388 | as_warn("Ignoring attempt to re-define symbol %s", |
389 | S_GET_NAME (symbolP)); | |
355afbcd KR |
390 | } /* if not redefining */ |
391 | ||
392 | demand_empty_rest_of_line (); | |
428d312b | 393 | } |
355afbcd KR |
394 | |
395 | static void | |
7766838e ILT |
396 | s_common (ignore) |
397 | int ignore; | |
355afbcd | 398 | { |
ed9638af KR |
399 | char *name; |
400 | char c; | |
401 | char *p; | |
402 | int temp, size; | |
403 | symbolS *symbolP; | |
355afbcd KR |
404 | |
405 | name = input_line_pointer; | |
406 | c = get_symbol_end (); | |
407 | /* just after name is now '\0' */ | |
408 | p = input_line_pointer; | |
409 | *p = c; | |
410 | SKIP_WHITESPACE (); | |
411 | if (*input_line_pointer != ',') | |
412 | { | |
413 | as_bad ("Expected comma after symbol-name"); | |
414 | ignore_rest_of_line (); | |
415 | return; | |
416 | } | |
417 | input_line_pointer++; /* skip ',' */ | |
418 | if ((temp = get_absolute_expression ()) < 0) | |
419 | { | |
420 | as_bad (".COMMon length (%d.) <0! Ignored.", temp); | |
421 | ignore_rest_of_line (); | |
422 | return; | |
423 | } | |
ed9638af | 424 | size = temp; |
355afbcd KR |
425 | *p = 0; |
426 | symbolP = symbol_find_or_make (name); | |
427 | *p = c; | |
9f6da653 | 428 | if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP)) |
355afbcd KR |
429 | { |
430 | as_bad ("Ignoring attempt to re-define symbol"); | |
431 | ignore_rest_of_line (); | |
432 | return; | |
433 | } | |
434 | if (S_GET_VALUE (symbolP) != 0) | |
435 | { | |
ed9638af | 436 | if (S_GET_VALUE (symbolP) != size) |
355afbcd | 437 | { |
125f0b0d KR |
438 | as_warn ("Length of .comm \"%s\" is already %ld. Not changed to %d.", |
439 | S_GET_NAME (symbolP), (long) S_GET_VALUE (symbolP), size); | |
680227f3 | 440 | } |
355afbcd KR |
441 | } |
442 | else | |
443 | { | |
ed9638af | 444 | #ifndef OBJ_ELF |
7766838e | 445 | S_SET_VALUE (symbolP, (valueT) size); |
355afbcd | 446 | S_SET_EXTERNAL (symbolP); |
428d312b | 447 | #endif |
355afbcd KR |
448 | } |
449 | know (symbolP->sy_frag == &zero_address_frag); | |
428d312b KR |
450 | if (*input_line_pointer != ',') |
451 | { | |
125f0b0d | 452 | as_bad ("Expected comma after common length"); |
428d312b KR |
453 | ignore_rest_of_line (); |
454 | return; | |
455 | } | |
456 | input_line_pointer++; | |
125f0b0d KR |
457 | SKIP_WHITESPACE (); |
458 | if (*input_line_pointer != '"') | |
ed9638af | 459 | { |
125f0b0d | 460 | temp = get_absolute_expression (); |
58d4951d | 461 | #ifndef OBJ_ELF |
125f0b0d KR |
462 | if (temp > max_alignment) |
463 | { | |
464 | temp = max_alignment; | |
465 | as_warn ("Common alignment too large: %d. assumed", temp); | |
466 | } | |
58d4951d ILT |
467 | #endif |
468 | if (temp < 0) | |
125f0b0d KR |
469 | { |
470 | temp = 0; | |
471 | as_warn ("Common alignment negative; 0 assumed"); | |
472 | } | |
b2565433 | 473 | #ifdef OBJ_ELF |
125f0b0d KR |
474 | if (symbolP->local) |
475 | { | |
ff4cac38 KR |
476 | segT old_sec; |
477 | int old_subsec; | |
125f0b0d | 478 | char *p; |
ff4cac38 | 479 | int align; |
ed9638af | 480 | |
ff4cac38 KR |
481 | old_sec = now_seg; |
482 | old_subsec = now_subseg; | |
483 | align = temp; | |
125f0b0d KR |
484 | record_alignment (bss_section, align); |
485 | subseg_set (bss_section, 0); | |
486 | if (align) | |
590c50d8 | 487 | frag_align (align, 0, 0); |
125f0b0d KR |
488 | if (S_GET_SEGMENT (symbolP) == bss_section) |
489 | symbolP->sy_frag->fr_symbol = 0; | |
490 | symbolP->sy_frag = frag_now; | |
9f6da653 DE |
491 | p = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, |
492 | (offsetT) size, (char *) 0); | |
125f0b0d KR |
493 | *p = 0; |
494 | S_SET_SEGMENT (symbolP, bss_section); | |
495 | S_CLEAR_EXTERNAL (symbolP); | |
496 | subseg_set (old_sec, old_subsec); | |
497 | } | |
498 | else | |
b2565433 | 499 | #endif |
125f0b0d | 500 | { |
ff4cac38 | 501 | allocate_common: |
7766838e | 502 | S_SET_VALUE (symbolP, (valueT) size); |
5e0a90a8 KR |
503 | #ifdef OBJ_ELF |
504 | S_SET_ALIGN (symbolP, temp); | |
505 | #endif | |
125f0b0d | 506 | S_SET_EXTERNAL (symbolP); |
9f6da653 | 507 | S_SET_SEGMENT (symbolP, bfd_com_section_ptr); |
125f0b0d | 508 | } |
ed9638af KR |
509 | } |
510 | else | |
511 | { | |
125f0b0d | 512 | input_line_pointer++; |
ff4cac38 KR |
513 | /* @@ Some use the dot, some don't. Can we get some consistency?? */ |
514 | if (*input_line_pointer == '.') | |
515 | input_line_pointer++; | |
516 | /* @@ Some say data, some say bss. */ | |
125f0b0d | 517 | if (strncmp (input_line_pointer, "bss\"", 4) |
ff4cac38 | 518 | && strncmp (input_line_pointer, "data\"", 5)) |
125f0b0d | 519 | { |
ff4cac38 KR |
520 | while (*--input_line_pointer != '"') |
521 | ; | |
522 | input_line_pointer--; | |
125f0b0d KR |
523 | goto bad_common_segment; |
524 | } | |
525 | while (*input_line_pointer++ != '"') | |
526 | ; | |
ff4cac38 | 527 | goto allocate_common; |
355afbcd | 528 | } |
590c50d8 ILT |
529 | |
530 | #ifdef BFD_ASSEMBLER | |
531 | symbolP->bsym->flags |= BSF_OBJECT; | |
532 | #endif | |
533 | ||
355afbcd KR |
534 | demand_empty_rest_of_line (); |
535 | return; | |
ff4cac38 KR |
536 | |
537 | { | |
538 | bad_common_segment: | |
539 | p = input_line_pointer; | |
540 | while (*p && *p != '\n') | |
541 | p++; | |
542 | c = *p; | |
543 | *p = '\0'; | |
544 | as_bad ("bad .common segment %s", input_line_pointer + 1); | |
545 | *p = c; | |
546 | input_line_pointer = p; | |
547 | ignore_rest_of_line (); | |
548 | return; | |
549 | } | |
550 | } | |
355afbcd | 551 | |
8dd07a84 ILT |
552 | /* Handle the .empty pseudo-op. This supresses the warnings about |
553 | invalid delay slot usage. */ | |
554 | ||
555 | static void | |
556 | s_empty (ignore) | |
557 | int ignore; | |
558 | { | |
559 | /* The easy way to implement is to just forget about the last | |
560 | instruction. */ | |
561 | last_insn = NULL; | |
562 | } | |
563 | ||
355afbcd | 564 | static void |
7766838e ILT |
565 | s_seg (ignore) |
566 | int ignore; | |
355afbcd KR |
567 | { |
568 | ||
569 | if (strncmp (input_line_pointer, "\"text\"", 6) == 0) | |
570 | { | |
571 | input_line_pointer += 6; | |
7766838e | 572 | s_text (0); |
355afbcd KR |
573 | return; |
574 | } | |
575 | if (strncmp (input_line_pointer, "\"data\"", 6) == 0) | |
576 | { | |
577 | input_line_pointer += 6; | |
7766838e | 578 | s_data (0); |
355afbcd KR |
579 | return; |
580 | } | |
581 | if (strncmp (input_line_pointer, "\"data1\"", 7) == 0) | |
582 | { | |
583 | input_line_pointer += 7; | |
584 | s_data1 (); | |
585 | return; | |
586 | } | |
587 | if (strncmp (input_line_pointer, "\"bss\"", 5) == 0) | |
588 | { | |
589 | input_line_pointer += 5; | |
590 | /* We only support 2 segments -- text and data -- for now, so | |
428d312b KR |
591 | things in the "bss segment" will have to go into data for now. |
592 | You can still allocate SEG_BSS stuff with .lcomm or .reserve. */ | |
593 | subseg_set (data_section, 255); /* FIXME-SOMEDAY */ | |
355afbcd KR |
594 | return; |
595 | } | |
596 | as_bad ("Unknown segment type"); | |
597 | demand_empty_rest_of_line (); | |
c999fd9f | 598 | } |
355afbcd KR |
599 | |
600 | static void | |
601 | s_data1 () | |
602 | { | |
428d312b | 603 | subseg_set (data_section, 1); |
355afbcd | 604 | demand_empty_rest_of_line (); |
c999fd9f | 605 | } |
fecd2382 | 606 | |
355afbcd | 607 | static void |
7766838e ILT |
608 | s_proc (ignore) |
609 | int ignore; | |
355afbcd | 610 | { |
58d4951d | 611 | while (!is_end_of_line[(unsigned char) *input_line_pointer]) |
355afbcd KR |
612 | { |
613 | ++input_line_pointer; | |
614 | } | |
615 | ++input_line_pointer; | |
c999fd9f | 616 | } |
fecd2382 | 617 | |
8dd07a84 ILT |
618 | /* This static variable is set by s_uacons to tell sparc_cons_align |
619 | that the expession does not need to be aligned. */ | |
620 | ||
621 | static int sparc_no_align_cons = 0; | |
622 | ||
623 | /* This handles the unaligned space allocation pseudo-ops, such as | |
624 | .uaword. .uaword is just like .word, but the value does not need | |
625 | to be aligned. */ | |
626 | ||
627 | static void | |
628 | s_uacons (bytes) | |
629 | int bytes; | |
630 | { | |
631 | /* Tell sparc_cons_align not to align this value. */ | |
632 | sparc_no_align_cons = 1; | |
633 | cons (bytes); | |
634 | } | |
635 | ||
2b063e6d ILT |
636 | /* If the --enforce-aligned-data option is used, we require .word, |
637 | et. al., to be aligned correctly. We do it by setting up an | |
638 | rs_align_code frag, and checking in HANDLE_ALIGN to make sure that | |
639 | no unexpected alignment was introduced. | |
640 | ||
641 | The SunOS and Solaris native assemblers enforce aligned data by | |
642 | default. We don't want to do that, because gcc can deliberately | |
643 | generate misaligned data if the packed attribute is used. Instead, | |
644 | we permit misaligned data by default, and permit the user to set an | |
645 | option to check for it. */ | |
8dd07a84 ILT |
646 | |
647 | void | |
648 | sparc_cons_align (nbytes) | |
649 | int nbytes; | |
650 | { | |
651 | int nalign; | |
652 | char *p; | |
653 | ||
2b063e6d ILT |
654 | /* Only do this if we are enforcing aligned data. */ |
655 | if (! enforce_aligned_data) | |
656 | return; | |
657 | ||
8dd07a84 ILT |
658 | if (sparc_no_align_cons) |
659 | { | |
660 | /* This is an unaligned pseudo-op. */ | |
661 | sparc_no_align_cons = 0; | |
662 | return; | |
663 | } | |
664 | ||
665 | nalign = 0; | |
666 | while ((nbytes & 1) == 0) | |
667 | { | |
668 | ++nalign; | |
669 | nbytes >>= 1; | |
670 | } | |
671 | ||
672 | if (nalign == 0) | |
673 | return; | |
674 | ||
675 | if (now_seg == absolute_section) | |
676 | { | |
677 | if ((abs_section_offset & ((1 << nalign) - 1)) != 0) | |
678 | as_bad ("misaligned data"); | |
679 | return; | |
680 | } | |
681 | ||
682 | p = frag_var (rs_align_code, 1, 1, (relax_substateT) 0, | |
9f6da653 | 683 | (symbolS *) NULL, (offsetT) nalign, (char *) NULL); |
8dd07a84 ILT |
684 | |
685 | record_alignment (now_seg, nalign); | |
686 | } | |
687 | ||
688 | /* This is where we do the unexpected alignment check. */ | |
689 | ||
690 | void | |
691 | sparc_handle_align (fragp) | |
692 | fragS *fragp; | |
693 | { | |
694 | if (fragp->fr_type == rs_align_code | |
695 | && fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix != 0) | |
696 | as_bad_where (fragp->fr_file, fragp->fr_line, "misaligned data"); | |
697 | } | |
698 | ||
6df07e7f | 699 | /* sparc64 priviledged registers */ |
428d312b | 700 | |
355afbcd KR |
701 | struct priv_reg_entry |
702 | { | |
703 | char *name; | |
704 | int regnum; | |
705 | }; | |
428d312b | 706 | |
680227f3 KR |
707 | struct priv_reg_entry priv_reg_table[] = |
708 | { | |
355afbcd KR |
709 | {"tpc", 0}, |
710 | {"tnpc", 1}, | |
711 | {"tstate", 2}, | |
712 | {"tt", 3}, | |
713 | {"tick", 4}, | |
714 | {"tba", 5}, | |
715 | {"pstate", 6}, | |
716 | {"tl", 7}, | |
717 | {"pil", 8}, | |
718 | {"cwp", 9}, | |
719 | {"cansave", 10}, | |
720 | {"canrestore", 11}, | |
721 | {"cleanwin", 12}, | |
722 | {"otherwin", 13}, | |
723 | {"wstate", 14}, | |
125f0b0d | 724 | {"fq", 15}, |
355afbcd KR |
725 | {"ver", 31}, |
726 | {"", -1}, /* end marker */ | |
680227f3 KR |
727 | }; |
728 | ||
355afbcd | 729 | static int |
9f6da653 DE |
730 | cmp_reg_entry (parg, qarg) |
731 | const PTR parg; | |
732 | const PTR qarg; | |
680227f3 | 733 | { |
9f6da653 DE |
734 | const struct priv_reg_entry *p = (const struct priv_reg_entry *) parg; |
735 | const struct priv_reg_entry *q = (const struct priv_reg_entry *) qarg; | |
736 | ||
680227f3 KR |
737 | return strcmp (q->name, p->name); |
738 | } | |
355afbcd | 739 | |
fecd2382 RP |
740 | /* This function is called once, at assembler startup time. It should |
741 | set up all the tables, etc. that the MD part of the assembler will need. */ | |
6df07e7f | 742 | |
355afbcd KR |
743 | void |
744 | md_begin () | |
745 | { | |
7766838e | 746 | register const char *retval = NULL; |
355afbcd KR |
747 | int lose = 0; |
748 | register unsigned int i = 0; | |
749 | ||
750 | op_hash = hash_new (); | |
355afbcd | 751 | |
e70ad5d5 | 752 | while (i < sparc_num_opcodes) |
355afbcd KR |
753 | { |
754 | const char *name = sparc_opcodes[i].name; | |
90a579fa | 755 | retval = hash_insert (op_hash, name, (PTR) &sparc_opcodes[i]); |
7766838e | 756 | if (retval != NULL) |
355afbcd KR |
757 | { |
758 | fprintf (stderr, "internal error: can't hash `%s': %s\n", | |
759 | sparc_opcodes[i].name, retval); | |
760 | lose = 1; | |
fecd2382 | 761 | } |
355afbcd KR |
762 | do |
763 | { | |
764 | if (sparc_opcodes[i].match & sparc_opcodes[i].lose) | |
765 | { | |
766 | fprintf (stderr, "internal error: losing opcode: `%s' \"%s\"\n", | |
767 | sparc_opcodes[i].name, sparc_opcodes[i].args); | |
768 | lose = 1; | |
769 | } | |
770 | ++i; | |
771 | } | |
e70ad5d5 | 772 | while (i < sparc_num_opcodes |
355afbcd KR |
773 | && !strcmp (sparc_opcodes[i].name, name)); |
774 | } | |
775 | ||
776 | if (lose) | |
777 | as_fatal ("Broken assembler. No assembly attempted."); | |
778 | ||
779 | for (i = '0'; i < '8'; ++i) | |
780 | octal[i] = 1; | |
781 | for (i = '0'; i <= '9'; ++i) | |
782 | toHex[i] = i - '0'; | |
783 | for (i = 'a'; i <= 'f'; ++i) | |
784 | toHex[i] = i + 10 - 'a'; | |
785 | for (i = 'A'; i <= 'F'; ++i) | |
786 | toHex[i] = i + 10 - 'A'; | |
787 | ||
355afbcd KR |
788 | qsort (priv_reg_table, sizeof (priv_reg_table) / sizeof (priv_reg_table[0]), |
789 | sizeof (priv_reg_table[0]), cmp_reg_entry); | |
ed9638af | 790 | |
d8b42b96 DE |
791 | /* If -bump, record the architecture level at which we start issuing |
792 | warnings. The behaviour is different depending upon whether an | |
793 | architecture was explicitly specified. If it wasn't, we issue warnings | |
794 | for all upwards bumps. If it was, we don't start issuing warnings until | |
795 | we need to bump beyond the requested architecture or when we bump between | |
796 | conflicting architectures. */ | |
797 | ||
798 | if (warn_on_bump | |
799 | && architecture_requested) | |
800 | { | |
801 | /* `max_architecture' records the requested architecture. | |
802 | Issue warnings if we go above it. */ | |
803 | warn_after_architecture = max_architecture; | |
804 | ||
805 | /* Find the highest architecture level that doesn't conflict with | |
806 | the requested one. */ | |
807 | for (max_architecture = SPARC_OPCODE_ARCH_MAX; | |
808 | max_architecture > warn_after_architecture; | |
809 | --max_architecture) | |
810 | if (! SPARC_OPCODE_CONFLICT_P (max_architecture, | |
811 | warn_after_architecture)) | |
812 | break; | |
813 | } | |
6df07e7f DE |
814 | } |
815 | ||
816 | /* Called after all assembly has been done. */ | |
817 | ||
818 | void | |
819 | sparc_md_end () | |
820 | { | |
60abd849 | 821 | #ifdef SPARC_ARCH64 |
e70ad5d5 DE |
822 | if (current_architecture == SPARC_OPCODE_ARCH_V9A) |
823 | bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc_v9a); | |
824 | else | |
825 | bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc_v9); | |
6df07e7f | 826 | #else |
e70ad5d5 DE |
827 | if (current_architecture == SPARC_OPCODE_ARCH_V9) |
828 | bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc_v8plus); | |
829 | else if (current_architecture == SPARC_OPCODE_ARCH_V9A) | |
830 | bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc_v8plusa); | |
ed94c2b8 ILT |
831 | else if (current_architecture == SPARC_OPCODE_ARCH_SPARCLET) |
832 | bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc_sparclet); | |
e70ad5d5 | 833 | else |
ed94c2b8 ILT |
834 | { |
835 | /* The sparclite is treated like a normal sparc. Perhaps it shouldn't | |
836 | be but for now it is (since that's the way it's always been | |
837 | treated). */ | |
838 | bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc); | |
839 | } | |
6df07e7f | 840 | #endif |
9b6a882e | 841 | } |
fecd2382 | 842 | |
2b063e6d ILT |
843 | /* Utility to output one insn. */ |
844 | ||
845 | static void | |
846 | output_insn (insn, the_insn) | |
847 | const struct sparc_opcode *insn; | |
848 | struct sparc_it *the_insn; | |
849 | { | |
850 | char *toP = frag_more (4); | |
851 | ||
852 | /* put out the opcode */ | |
853 | if (INSN_BIG_ENDIAN) | |
854 | number_to_chars_bigendian (toP, (valueT) the_insn->opcode, 4); | |
855 | else | |
856 | number_to_chars_littleendian (toP, (valueT) the_insn->opcode, 4); | |
857 | ||
858 | /* put out the symbol-dependent stuff */ | |
859 | if (the_insn->reloc != BFD_RELOC_NONE) | |
860 | { | |
861 | fix_new_exp (frag_now, /* which frag */ | |
862 | (toP - frag_now->fr_literal), /* where */ | |
863 | 4, /* size */ | |
864 | &the_insn->exp, | |
865 | the_insn->pcrel, | |
866 | the_insn->reloc); | |
867 | } | |
868 | ||
869 | last_insn = insn; | |
9f6da653 | 870 | last_opcode = the_insn->opcode; |
2b063e6d ILT |
871 | } |
872 | ||
355afbcd KR |
873 | void |
874 | md_assemble (str) | |
875 | char *str; | |
fecd2382 | 876 | { |
ed94c2b8 | 877 | const struct sparc_opcode *insn; |
355afbcd KR |
878 | |
879 | know (str); | |
2b063e6d | 880 | special_case = 0; |
ed94c2b8 ILT |
881 | sparc_ip (str, &insn); |
882 | ||
9f6da653 DE |
883 | /* We warn about attempts to put a floating point branch in a delay slot, |
884 | unless the delay slot has been annulled. */ | |
ed94c2b8 ILT |
885 | if (insn != NULL |
886 | && last_insn != NULL | |
887 | && (insn->flags & F_FBR) != 0 | |
9f6da653 DE |
888 | && (last_insn->flags & F_DELAYED) != 0 |
889 | /* ??? This test isn't completely accurate. We assume anything with | |
890 | F_{UNBR,CONDBR,FBR} set is annullable. */ | |
891 | && ((last_insn->flags & (F_UNBR | F_CONDBR | F_FBR)) == 0 | |
892 | || (last_opcode & ANNUL) == 0)) | |
ed94c2b8 ILT |
893 | as_warn ("FP branch in delay slot"); |
894 | ||
895 | /* SPARC before v9 requires a nop instruction between a floating | |
896 | point instruction and a floating point branch. We insert one | |
897 | automatically, with a warning. */ | |
898 | if (max_architecture < SPARC_OPCODE_ARCH_V9 | |
899 | && insn != NULL | |
900 | && last_insn != NULL | |
901 | && (insn->flags & F_FBR) != 0 | |
902 | && (last_insn->flags & F_FLOAT) != 0) | |
903 | { | |
2b063e6d ILT |
904 | struct sparc_it nop_insn; |
905 | ||
906 | nop_insn.opcode = NOP_INSN; | |
907 | nop_insn.reloc = BFD_RELOC_NONE; | |
908 | output_insn (insn, &nop_insn); | |
ed94c2b8 | 909 | as_warn ("FP branch preceded by FP instruction; NOP inserted"); |
ed94c2b8 | 910 | } |
355afbcd | 911 | |
2b063e6d | 912 | switch (special_case) |
355afbcd | 913 | { |
2b063e6d ILT |
914 | case 0: |
915 | /* normal insn */ | |
916 | output_insn (insn, &the_insn); | |
917 | break; | |
355afbcd | 918 | |
2b063e6d ILT |
919 | case SPECIAL_CASE_SET: |
920 | { | |
921 | int need_hi22_p = 0; | |
355afbcd | 922 | |
2b063e6d ILT |
923 | /* "set" is not defined for negative numbers in v9: it doesn't yield |
924 | what you expect it to. */ | |
925 | if (SPARC_OPCODE_ARCH_V9_P (max_architecture) | |
926 | && the_insn.exp.X_op == O_constant) | |
927 | { | |
928 | if (the_insn.exp.X_add_number < 0) | |
929 | as_warn ("set: used with negative number"); | |
930 | else if (the_insn.exp.X_add_number > 0xffffffff) | |
931 | as_warn ("set: number larger than 4294967295"); | |
932 | } | |
428d312b | 933 | |
2b063e6d ILT |
934 | /* See if operand is absolute and small; skip sethi if so. */ |
935 | if (the_insn.exp.X_op != O_constant | |
936 | || the_insn.exp.X_add_number >= (1 << 12) | |
937 | || the_insn.exp.X_add_number < -(1 << 12)) | |
938 | { | |
939 | output_insn (insn, &the_insn); | |
940 | need_hi22_p = 1; | |
941 | } | |
942 | /* See if operand has no low-order bits; skip OR if so. */ | |
943 | if (the_insn.exp.X_op != O_constant | |
944 | || (need_hi22_p && (the_insn.exp.X_add_number & 0x3FF) != 0) | |
945 | || ! need_hi22_p) | |
946 | { | |
947 | int rd = (the_insn.opcode & RD (~0)) >> 25; | |
948 | the_insn.opcode = (OR_INSN | (need_hi22_p ? RS1 (rd) : 0) | |
949 | | RD (rd) | |
950 | | IMMED | |
951 | | (the_insn.exp.X_add_number | |
952 | & (need_hi22_p ? 0x3ff : 0x1fff))); | |
953 | the_insn.reloc = (the_insn.exp.X_op != O_constant | |
954 | ? BFD_RELOC_LO10 | |
955 | : BFD_RELOC_NONE); | |
956 | output_insn (insn, &the_insn); | |
957 | } | |
958 | break; | |
959 | } | |
ed94c2b8 | 960 | |
2b063e6d ILT |
961 | case SPECIAL_CASE_SETSW: |
962 | { | |
963 | /* FIXME: Not finished. */ | |
964 | break; | |
965 | } | |
355afbcd | 966 | |
2b063e6d ILT |
967 | case SPECIAL_CASE_SETX: |
968 | { | |
969 | #define SIGNEXT32(x) ((((x) & 0xffffffff) ^ 0x80000000) - 0x80000000) | |
970 | int upper32 = SIGNEXT32 (BSR (the_insn.exp.X_add_number, 32)); | |
971 | int lower32 = SIGNEXT32 (the_insn.exp.X_add_number); | |
972 | #undef SIGNEXT32 | |
973 | int tmpreg = (the_insn.opcode & RS1 (~0)) >> 14; | |
974 | int dstreg = (the_insn.opcode & RD (~0)) >> 25; | |
975 | /* Output directly to dst reg if lower 32 bits are all zero. */ | |
976 | int upper_dstreg = (the_insn.exp.X_op == O_constant | |
977 | && lower32 == 0) ? dstreg : tmpreg; | |
978 | int need_hh22_p = 0, need_hm10_p = 0, need_hi22_p = 0, need_lo10_p = 0; | |
979 | ||
980 | /* The tmp reg should not be the dst reg. */ | |
981 | if (tmpreg == dstreg) | |
982 | as_warn ("setx: temporary register same as destination register"); | |
983 | ||
984 | /* Reset X_add_number, we've extracted it as upper32/lower32. | |
985 | Otherwise fixup_segment will complain about not being able to | |
986 | write an 8 byte number in a 4 byte field. */ | |
987 | the_insn.exp.X_add_number = 0; | |
988 | ||
989 | /* ??? Obviously there are other optimizations we can do | |
990 | (e.g. sethi+shift for 0x1f0000000) and perhaps we shouldn't be | |
991 | doing some of these. Later. If you do change things, try to | |
992 | change all of this to be table driven as well. */ | |
993 | ||
994 | /* What to output depends on the number if it's constant. | |
995 | Compute that first, then output what we've decided upon. */ | |
996 | if (the_insn.exp.X_op != O_constant) | |
997 | need_hh22_p = need_hm10_p = need_hi22_p = need_lo10_p = 1; | |
998 | else | |
999 | { | |
1000 | /* Only need hh22 if `or' insn can't handle constant. */ | |
1001 | if (upper32 < -(1 << 12) || upper32 >= (1 << 12)) | |
1002 | need_hh22_p = 1; | |
1003 | ||
1004 | /* Does bottom part (after sethi) have bits? */ | |
1005 | if ((need_hh22_p && (upper32 & 0x3ff) != 0) | |
1006 | /* No hh22, but does upper32 still have bits we can't set | |
1007 | from lower32? */ | |
1008 | || (! need_hh22_p | |
1009 | && upper32 != 0 | |
1010 | && (upper32 != -1 || lower32 >= 0))) | |
1011 | need_hm10_p = 1; | |
1012 | ||
1013 | /* If the lower half is all zero, we build the upper half directly | |
1014 | into the dst reg. */ | |
1015 | if (lower32 != 0 | |
1016 | /* Need lower half if number is zero. */ | |
1017 | || (! need_hh22_p && ! need_hm10_p)) | |
1018 | { | |
1019 | /* No need for sethi if `or' insn can handle constant. */ | |
1020 | if (lower32 < -(1 << 12) || lower32 >= (1 << 12) | |
1021 | /* Note that we can't use a negative constant in the `or' | |
1022 | insn unless the upper 32 bits are all ones. */ | |
1023 | || (lower32 < 0 && upper32 != -1)) | |
1024 | need_hi22_p = 1; | |
1025 | ||
1026 | /* Does bottom part (after sethi) have bits? */ | |
1027 | if ((need_hi22_p && (lower32 & 0x3ff) != 0) | |
1028 | /* No sethi. */ | |
1029 | || (! need_hi22_p && (lower32 & 0x1fff) != 0) | |
1030 | /* Need `or' if we didn't set anything else. */ | |
1031 | || (! need_hi22_p && ! need_hh22_p && ! need_hm10_p)) | |
1032 | need_lo10_p = 1; | |
1033 | } | |
1034 | } | |
355afbcd | 1035 | |
2b063e6d ILT |
1036 | if (need_hh22_p) |
1037 | { | |
1038 | the_insn.opcode = (SETHI_INSN | RD (upper_dstreg) | |
1039 | | ((upper32 >> 10) & 0x3fffff)); | |
1040 | the_insn.reloc = (the_insn.exp.X_op != O_constant | |
1041 | ? BFD_RELOC_SPARC_HH22 : BFD_RELOC_NONE); | |
1042 | output_insn (insn, &the_insn); | |
1043 | } | |
1044 | ||
1045 | if (need_hm10_p) | |
1046 | { | |
1047 | the_insn.opcode = (OR_INSN | |
1048 | | (need_hh22_p ? RS1 (upper_dstreg) : 0) | |
1049 | | RD (upper_dstreg) | |
1050 | | IMMED | |
1051 | | (upper32 | |
1052 | & (need_hh22_p ? 0x3ff : 0x1fff))); | |
1053 | the_insn.reloc = (the_insn.exp.X_op != O_constant | |
1054 | ? BFD_RELOC_SPARC_HM10 : BFD_RELOC_NONE); | |
1055 | output_insn (insn, &the_insn); | |
1056 | } | |
1057 | ||
1058 | if (need_hi22_p) | |
1059 | { | |
1060 | the_insn.opcode = (SETHI_INSN | RD (dstreg) | |
1061 | | ((lower32 >> 10) & 0x3fffff)); | |
1062 | the_insn.reloc = BFD_RELOC_HI22; | |
1063 | output_insn (insn, &the_insn); | |
1064 | } | |
1065 | ||
1066 | if (need_lo10_p) | |
1067 | { | |
1068 | /* FIXME: One nice optimization to do here is to OR the low part | |
1069 | with the highpart if hi22 isn't needed and the low part is | |
1070 | positive. */ | |
1071 | the_insn.opcode = (OR_INSN | (need_hi22_p ? RS1 (dstreg) : 0) | |
1072 | | RD (dstreg) | |
1073 | | IMMED | |
1074 | | (lower32 | |
1075 | & (need_hi22_p ? 0x3ff : 0x1fff))); | |
1076 | the_insn.reloc = BFD_RELOC_LO10; | |
1077 | output_insn (insn, &the_insn); | |
1078 | } | |
1079 | ||
1080 | /* If we needed to build the upper part, shift it into place. */ | |
1081 | if (need_hh22_p || need_hm10_p) | |
1082 | { | |
1083 | the_insn.opcode = (SLLX_INSN | RS1 (upper_dstreg) | RD (upper_dstreg) | |
1084 | | IMMED | 32); | |
1085 | the_insn.reloc = BFD_RELOC_NONE; | |
1086 | output_insn (insn, &the_insn); | |
1087 | } | |
1088 | ||
1089 | /* If we needed to build both upper and lower parts, OR them together. */ | |
1090 | if ((need_hh22_p || need_hm10_p) | |
1091 | && (need_hi22_p || need_lo10_p)) | |
1092 | { | |
1093 | the_insn.opcode = (OR_INSN | RS1 (dstreg) | RS2 (upper_dstreg) | |
1094 | | RD (dstreg)); | |
1095 | the_insn.reloc = BFD_RELOC_NONE; | |
1096 | output_insn (insn, &the_insn); | |
1097 | } | |
1098 | /* We didn't need both regs, but we may have to sign extend lower32. */ | |
1099 | else if (need_hi22_p && upper32 == -1) | |
1100 | { | |
1101 | the_insn.opcode = (SRA_INSN | RS1 (dstreg) | RD (dstreg) | |
1102 | | IMMED | 0); | |
1103 | the_insn.reloc = BFD_RELOC_NONE; | |
1104 | output_insn (insn, &the_insn); | |
1105 | } | |
1106 | break; | |
1107 | } | |
1108 | ||
1109 | case SPECIAL_CASE_FDIV: | |
1110 | { | |
1111 | int rd = (the_insn.opcode >> 25) & 0x1f; | |
1112 | ||
1113 | output_insn (insn, &the_insn); | |
1114 | ||
1115 | /* According to information leaked from Sun, the "fdiv" instructions | |
1116 | on early SPARC machines would produce incorrect results sometimes. | |
1117 | The workaround is to add an fmovs of the destination register to | |
1118 | itself just after the instruction. This was true on machines | |
1119 | with Weitek 1165 float chips, such as the Sun-4/260 and /280. */ | |
1120 | assert (the_insn.reloc == BFD_RELOC_NONE); | |
1121 | the_insn.opcode = FMOVS_INSN | rd | RD (rd); | |
1122 | output_insn (insn, &the_insn); | |
1123 | break; | |
1124 | } | |
355afbcd KR |
1125 | |
1126 | default: | |
2b063e6d | 1127 | as_fatal ("failed special case insn sanity check"); |
355afbcd | 1128 | } |
9b6a882e | 1129 | } |
355afbcd | 1130 | |
6df07e7f | 1131 | /* Parse an argument that can be expressed as a keyword. |
e86d5cf3 | 1132 | (eg: #StoreStore or %ccfr). |
6df07e7f DE |
1133 | The result is a boolean indicating success. |
1134 | If successful, INPUT_POINTER is updated. */ | |
1135 | ||
1136 | static int | |
1137 | parse_keyword_arg (lookup_fn, input_pointerP, valueP) | |
9f6da653 | 1138 | int (*lookup_fn) PARAMS ((const char *)); |
6df07e7f DE |
1139 | char **input_pointerP; |
1140 | int *valueP; | |
1141 | { | |
1142 | int value; | |
1143 | char c, *p, *q; | |
1144 | ||
1145 | p = *input_pointerP; | |
90a579fa | 1146 | for (q = p + (*p == '#' || *p == '%'); isalnum (*q) || *q == '_'; ++q) |
6df07e7f DE |
1147 | continue; |
1148 | c = *q; | |
1149 | *q = 0; | |
1150 | value = (*lookup_fn) (p); | |
1151 | *q = c; | |
1152 | if (value == -1) | |
1153 | return 0; | |
1154 | *valueP = value; | |
1155 | *input_pointerP = q; | |
1156 | return 1; | |
1157 | } | |
1158 | ||
1159 | /* Parse an argument that is a constant expression. | |
1160 | The result is a boolean indicating success. */ | |
1161 | ||
1162 | static int | |
1163 | parse_const_expr_arg (input_pointerP, valueP) | |
1164 | char **input_pointerP; | |
1165 | int *valueP; | |
1166 | { | |
1167 | char *save = input_line_pointer; | |
1168 | expressionS exp; | |
1169 | ||
1170 | input_line_pointer = *input_pointerP; | |
1171 | /* The next expression may be something other than a constant | |
1172 | (say if we're not processing the right variant of the insn). | |
1173 | Don't call expression unless we're sure it will succeed as it will | |
1174 | signal an error (which we want to defer until later). */ | |
1175 | /* FIXME: It might be better to define md_operand and have it recognize | |
1176 | things like %asi, etc. but continuing that route through to the end | |
1177 | is a lot of work. */ | |
1178 | if (*input_line_pointer == '%') | |
1179 | { | |
1180 | input_line_pointer = save; | |
1181 | return 0; | |
1182 | } | |
1183 | expression (&exp); | |
1184 | *input_pointerP = input_line_pointer; | |
1185 | input_line_pointer = save; | |
1186 | if (exp.X_op != O_constant) | |
1187 | return 0; | |
1188 | *valueP = exp.X_add_number; | |
1189 | return 1; | |
1190 | } | |
1191 | ||
355afbcd | 1192 | static void |
ed94c2b8 | 1193 | sparc_ip (str, pinsn) |
355afbcd | 1194 | char *str; |
ed94c2b8 | 1195 | const struct sparc_opcode **pinsn; |
fecd2382 | 1196 | { |
355afbcd KR |
1197 | char *error_message = ""; |
1198 | char *s; | |
1199 | const char *args; | |
1200 | char c; | |
a7aa7a2b | 1201 | const struct sparc_opcode *insn; |
355afbcd KR |
1202 | char *argsStart; |
1203 | unsigned long opcode; | |
1204 | unsigned int mask = 0; | |
1205 | int match = 0; | |
1206 | int comma = 0; | |
1207 | long immediate_max = 0; | |
6df07e7f | 1208 | int v9_arg_p; |
355afbcd KR |
1209 | |
1210 | for (s = str; islower (*s) || (*s >= '0' && *s <= '3'); ++s) | |
1211 | ; | |
6df07e7f | 1212 | |
355afbcd KR |
1213 | switch (*s) |
1214 | { | |
355afbcd KR |
1215 | case '\0': |
1216 | break; | |
1217 | ||
1218 | case ',': | |
1219 | comma = 1; | |
1220 | ||
1221 | /*FALLTHROUGH */ | |
1222 | ||
1223 | case ' ': | |
1224 | *s++ = '\0'; | |
1225 | break; | |
1226 | ||
1227 | default: | |
a7aa7a2b | 1228 | as_fatal ("Unknown opcode: `%s'", str); |
355afbcd | 1229 | } |
a7aa7a2b | 1230 | insn = (struct sparc_opcode *) hash_find (op_hash, str); |
ed94c2b8 | 1231 | *pinsn = insn; |
a7aa7a2b | 1232 | if (insn == NULL) |
355afbcd KR |
1233 | { |
1234 | as_bad ("Unknown opcode: `%s'", str); | |
1235 | return; | |
1236 | } | |
1237 | if (comma) | |
1238 | { | |
1239 | *--s = ','; | |
1240 | } | |
6df07e7f | 1241 | |
355afbcd KR |
1242 | argsStart = s; |
1243 | for (;;) | |
1244 | { | |
1245 | opcode = insn->match; | |
1246 | memset (&the_insn, '\0', sizeof (the_insn)); | |
428d312b | 1247 | the_insn.reloc = BFD_RELOC_NONE; |
6df07e7f | 1248 | v9_arg_p = 0; |
355afbcd KR |
1249 | |
1250 | /* | |
8fc0776d JW |
1251 | * Build the opcode, checking as we go to make |
1252 | * sure that the operands match | |
1253 | */ | |
355afbcd KR |
1254 | for (args = insn->args;; ++args) |
1255 | { | |
1256 | switch (*args) | |
1257 | { | |
355afbcd KR |
1258 | case 'K': |
1259 | { | |
7766838e | 1260 | int kmask = 0; |
ed9638af KR |
1261 | |
1262 | /* Parse a series of masks. */ | |
1263 | if (*s == '#') | |
355afbcd | 1264 | { |
ed9638af | 1265 | while (*s == '#') |
355afbcd | 1266 | { |
6df07e7f DE |
1267 | int mask; |
1268 | ||
1269 | if (! parse_keyword_arg (sparc_encode_membar, &s, | |
1270 | &mask)) | |
ed9638af KR |
1271 | { |
1272 | error_message = ": invalid membar mask name"; | |
1273 | goto error; | |
1274 | } | |
6df07e7f DE |
1275 | kmask |= mask; |
1276 | while (*s == ' ') { ++s; continue; } | |
1277 | if (*s == '|' || *s == '+') | |
ed9638af | 1278 | ++s; |
6df07e7f | 1279 | while (*s == ' ') { ++s; continue; } |
355afbcd | 1280 | } |
ed9638af | 1281 | } |
c999fd9f | 1282 | else |
ed9638af | 1283 | { |
6df07e7f DE |
1284 | if (! parse_const_expr_arg (&s, &kmask)) |
1285 | { | |
1286 | error_message = ": invalid membar mask expression"; | |
1287 | goto error; | |
1288 | } | |
1289 | if (kmask < 0 || kmask > 127) | |
ed9638af KR |
1290 | { |
1291 | error_message = ": invalid membar mask number"; | |
1292 | goto error; | |
355afbcd | 1293 | } |
355afbcd | 1294 | } |
c999fd9f | 1295 | |
6df07e7f | 1296 | opcode |= MEMBAR (kmask); |
355afbcd KR |
1297 | continue; |
1298 | } | |
1299 | ||
1300 | case '*': | |
ed9638af | 1301 | { |
6df07e7f | 1302 | int fcn = 0; |
355afbcd | 1303 | |
ed9638af KR |
1304 | /* Parse a prefetch function. */ |
1305 | if (*s == '#') | |
1306 | { | |
6df07e7f | 1307 | if (! parse_keyword_arg (sparc_encode_prefetch, &s, &fcn)) |
ed9638af KR |
1308 | { |
1309 | error_message = ": invalid prefetch function name"; | |
1310 | goto error; | |
1311 | } | |
1312 | } | |
6df07e7f | 1313 | else |
ed9638af | 1314 | { |
6df07e7f | 1315 | if (! parse_const_expr_arg (&s, &fcn)) |
ed9638af | 1316 | { |
6df07e7f DE |
1317 | error_message = ": invalid prefetch function expression"; |
1318 | goto error; | |
ed9638af | 1319 | } |
6df07e7f | 1320 | if (fcn < 0 || fcn > 31) |
ed9638af KR |
1321 | { |
1322 | error_message = ": invalid prefetch function number"; | |
1323 | goto error; | |
1324 | } | |
1325 | } | |
6df07e7f | 1326 | opcode |= RD (fcn); |
ed9638af KR |
1327 | continue; |
1328 | } | |
355afbcd KR |
1329 | |
1330 | case '!': | |
1331 | case '?': | |
6df07e7f | 1332 | /* Parse a sparc64 privileged register. */ |
355afbcd KR |
1333 | if (*s == '%') |
1334 | { | |
1335 | struct priv_reg_entry *p = priv_reg_table; | |
7766838e | 1336 | unsigned int len = 9999999; /* init to make gcc happy */ |
355afbcd KR |
1337 | |
1338 | s += 1; | |
1339 | while (p->name[0] > s[0]) | |
1340 | p++; | |
1341 | while (p->name[0] == s[0]) | |
1342 | { | |
1343 | len = strlen (p->name); | |
1344 | if (strncmp (p->name, s, len) == 0) | |
1345 | break; | |
1346 | p++; | |
1347 | } | |
1348 | if (p->name[0] != s[0]) | |
1349 | { | |
ed9638af | 1350 | error_message = ": unrecognizable privileged register"; |
355afbcd KR |
1351 | goto error; |
1352 | } | |
1353 | if (*args == '?') | |
1354 | opcode |= (p->regnum << 14); | |
1355 | else | |
1356 | opcode |= (p->regnum << 25); | |
1357 | s += len; | |
1358 | continue; | |
1359 | } | |
1360 | else | |
1361 | { | |
ed9638af | 1362 | error_message = ": unrecognizable privileged register"; |
355afbcd KR |
1363 | goto error; |
1364 | } | |
680227f3 | 1365 | |
355afbcd KR |
1366 | case 'M': |
1367 | case 'm': | |
1368 | if (strncmp (s, "%asr", 4) == 0) | |
1369 | { | |
1370 | s += 4; | |
680227f3 | 1371 | |
355afbcd KR |
1372 | if (isdigit (*s)) |
1373 | { | |
1374 | long num = 0; | |
1375 | ||
1376 | while (isdigit (*s)) | |
1377 | { | |
1378 | num = num * 10 + *s - '0'; | |
1379 | ++s; | |
1380 | } | |
1381 | ||
e86d5cf3 | 1382 | if (current_architecture >= SPARC_OPCODE_ARCH_V9) |
355afbcd | 1383 | { |
e86d5cf3 DE |
1384 | if (num < 16 || 31 < num) |
1385 | { | |
1386 | error_message = ": asr number must be between 16 and 31"; | |
1387 | goto error; | |
1388 | } | |
1389 | } | |
1390 | else | |
1391 | { | |
2cb1807e | 1392 | if (num < 0 || 31 < num) |
e86d5cf3 | 1393 | { |
2cb1807e | 1394 | error_message = ": asr number must be between 0 and 31"; |
e86d5cf3 DE |
1395 | goto error; |
1396 | } | |
1397 | } | |
355afbcd KR |
1398 | |
1399 | opcode |= (*args == 'M' ? RS1 (num) : RD (num)); | |
1400 | continue; | |
1401 | } | |
1402 | else | |
1403 | { | |
1404 | error_message = ": expecting %asrN"; | |
1405 | goto error; | |
e86d5cf3 DE |
1406 | } |
1407 | } /* if %asr */ | |
355afbcd KR |
1408 | break; |
1409 | ||
355afbcd | 1410 | case 'I': |
125f0b0d | 1411 | the_insn.reloc = BFD_RELOC_SPARC_11; |
355afbcd KR |
1412 | immediate_max = 0x03FF; |
1413 | goto immediate; | |
1414 | ||
1415 | case 'j': | |
125f0b0d | 1416 | the_insn.reloc = BFD_RELOC_SPARC_10; |
355afbcd KR |
1417 | immediate_max = 0x01FF; |
1418 | goto immediate; | |
1419 | ||
8dd07a84 ILT |
1420 | case 'X': |
1421 | /* V8 systems don't understand BFD_RELOC_SPARC_5. */ | |
1422 | if (SPARC_OPCODE_ARCH_V9_P (max_architecture)) | |
1423 | the_insn.reloc = BFD_RELOC_SPARC_5; | |
1424 | else | |
1425 | the_insn.reloc = BFD_RELOC_SPARC13; | |
1426 | /* These fields are unsigned, but for upward compatibility, | |
1427 | allow negative values as well. */ | |
1428 | immediate_max = 0x1f; | |
1429 | goto immediate; | |
1430 | ||
1431 | case 'Y': | |
1432 | /* V8 systems don't understand BFD_RELOC_SPARC_6. */ | |
1433 | if (SPARC_OPCODE_ARCH_V9_P (max_architecture)) | |
1434 | the_insn.reloc = BFD_RELOC_SPARC_6; | |
1435 | else | |
1436 | the_insn.reloc = BFD_RELOC_SPARC13; | |
1437 | /* These fields are unsigned, but for upward compatibility, | |
1438 | allow negative values as well. */ | |
1439 | immediate_max = 0x3f; | |
1440 | goto immediate; | |
1441 | ||
355afbcd | 1442 | case 'k': |
125f0b0d | 1443 | the_insn.reloc = /* RELOC_WDISP2_14 */ BFD_RELOC_SPARC_WDISP16; |
355afbcd KR |
1444 | the_insn.pcrel = 1; |
1445 | goto immediate; | |
1446 | ||
1447 | case 'G': | |
125f0b0d | 1448 | the_insn.reloc = BFD_RELOC_SPARC_WDISP19; |
355afbcd KR |
1449 | the_insn.pcrel = 1; |
1450 | goto immediate; | |
1451 | ||
1452 | case 'N': | |
1453 | if (*s == 'p' && s[1] == 'n') | |
1454 | { | |
1455 | s += 2; | |
1456 | continue; | |
1457 | } | |
1458 | break; | |
1459 | ||
1460 | case 'T': | |
1461 | if (*s == 'p' && s[1] == 't') | |
1462 | { | |
1463 | s += 2; | |
1464 | continue; | |
1465 | } | |
1466 | break; | |
1467 | ||
1468 | case 'z': | |
1469 | if (*s == ' ') | |
1470 | { | |
1471 | ++s; | |
1472 | } | |
0d44b3d1 | 1473 | if (strncmp (s, "%icc", 4) == 0) |
355afbcd | 1474 | { |
0d44b3d1 | 1475 | s += 4; |
355afbcd KR |
1476 | continue; |
1477 | } | |
1478 | break; | |
1479 | ||
1480 | case 'Z': | |
1481 | if (*s == ' ') | |
1482 | { | |
1483 | ++s; | |
1484 | } | |
0d44b3d1 | 1485 | if (strncmp (s, "%xcc", 4) == 0) |
355afbcd | 1486 | { |
0d44b3d1 | 1487 | s += 4; |
355afbcd KR |
1488 | continue; |
1489 | } | |
1490 | break; | |
1491 | ||
1492 | case '6': | |
1493 | if (*s == ' ') | |
1494 | { | |
1495 | ++s; | |
1496 | } | |
0d44b3d1 | 1497 | if (strncmp (s, "%fcc0", 5) == 0) |
355afbcd | 1498 | { |
0d44b3d1 | 1499 | s += 5; |
355afbcd KR |
1500 | continue; |
1501 | } | |
1502 | break; | |
1503 | ||
1504 | case '7': | |
1505 | if (*s == ' ') | |
1506 | { | |
1507 | ++s; | |
1508 | } | |
0d44b3d1 | 1509 | if (strncmp (s, "%fcc1", 5) == 0) |
355afbcd | 1510 | { |
0d44b3d1 | 1511 | s += 5; |
355afbcd KR |
1512 | continue; |
1513 | } | |
1514 | break; | |
1515 | ||
1516 | case '8': | |
1517 | if (*s == ' ') | |
1518 | { | |
1519 | ++s; | |
1520 | } | |
0d44b3d1 | 1521 | if (strncmp (s, "%fcc2", 5) == 0) |
355afbcd | 1522 | { |
0d44b3d1 | 1523 | s += 5; |
355afbcd KR |
1524 | continue; |
1525 | } | |
1526 | break; | |
1527 | ||
1528 | case '9': | |
1529 | if (*s == ' ') | |
1530 | { | |
1531 | ++s; | |
1532 | } | |
0d44b3d1 | 1533 | if (strncmp (s, "%fcc3", 5) == 0) |
355afbcd | 1534 | { |
0d44b3d1 | 1535 | s += 5; |
355afbcd KR |
1536 | continue; |
1537 | } | |
1538 | break; | |
1539 | ||
1540 | case 'P': | |
1541 | if (strncmp (s, "%pc", 3) == 0) | |
1542 | { | |
1543 | s += 3; | |
1544 | continue; | |
1545 | } | |
1546 | break; | |
1547 | ||
1548 | case 'W': | |
1549 | if (strncmp (s, "%tick", 5) == 0) | |
1550 | { | |
1551 | s += 5; | |
1552 | continue; | |
1553 | } | |
1554 | break; | |
355afbcd KR |
1555 | |
1556 | case '\0': /* end of args */ | |
1557 | if (*s == '\0') | |
1558 | { | |
1559 | match = 1; | |
1560 | } | |
1561 | break; | |
1562 | ||
1563 | case '+': | |
1564 | if (*s == '+') | |
1565 | { | |
1566 | ++s; | |
1567 | continue; | |
1568 | } | |
1569 | if (*s == '-') | |
1570 | { | |
1571 | continue; | |
1572 | } | |
1573 | break; | |
1574 | ||
1575 | case '[': /* these must match exactly */ | |
1576 | case ']': | |
1577 | case ',': | |
1578 | case ' ': | |
1579 | if (*s++ == *args) | |
1580 | continue; | |
1581 | break; | |
1582 | ||
1583 | case '#': /* must be at least one digit */ | |
1584 | if (isdigit (*s++)) | |
1585 | { | |
1586 | while (isdigit (*s)) | |
1587 | { | |
1588 | ++s; | |
1589 | } | |
1590 | continue; | |
1591 | } | |
1592 | break; | |
1593 | ||
1594 | case 'C': /* coprocessor state register */ | |
1595 | if (strncmp (s, "%csr", 4) == 0) | |
1596 | { | |
1597 | s += 4; | |
1598 | continue; | |
1599 | } | |
1600 | break; | |
1601 | ||
1602 | case 'b': /* next operand is a coprocessor register */ | |
1603 | case 'c': | |
1604 | case 'D': | |
1605 | if (*s++ == '%' && *s++ == 'c' && isdigit (*s)) | |
1606 | { | |
1607 | mask = *s++; | |
1608 | if (isdigit (*s)) | |
1609 | { | |
1610 | mask = 10 * (mask - '0') + (*s++ - '0'); | |
1611 | if (mask >= 32) | |
1612 | { | |
1613 | break; | |
1614 | } | |
1615 | } | |
1616 | else | |
1617 | { | |
1618 | mask -= '0'; | |
1619 | } | |
1620 | switch (*args) | |
1621 | { | |
1622 | ||
1623 | case 'b': | |
1624 | opcode |= mask << 14; | |
1625 | continue; | |
1626 | ||
1627 | case 'c': | |
1628 | opcode |= mask; | |
1629 | continue; | |
1630 | ||
1631 | case 'D': | |
1632 | opcode |= mask << 25; | |
1633 | continue; | |
1634 | } | |
1635 | } | |
1636 | break; | |
1637 | ||
1638 | case 'r': /* next operand must be a register */ | |
ed94c2b8 | 1639 | case 'O': |
355afbcd KR |
1640 | case '1': |
1641 | case '2': | |
1642 | case 'd': | |
1643 | if (*s++ == '%') | |
1644 | { | |
1645 | switch (c = *s++) | |
1646 | { | |
1647 | ||
1648 | case 'f': /* frame pointer */ | |
1649 | if (*s++ == 'p') | |
1650 | { | |
1651 | mask = 0x1e; | |
1652 | break; | |
1653 | } | |
1654 | goto error; | |
1655 | ||
1656 | case 'g': /* global register */ | |
1657 | if (isoctal (c = *s++)) | |
1658 | { | |
1659 | mask = c - '0'; | |
1660 | break; | |
1661 | } | |
1662 | goto error; | |
1663 | ||
1664 | case 'i': /* in register */ | |
1665 | if (isoctal (c = *s++)) | |
1666 | { | |
1667 | mask = c - '0' + 24; | |
1668 | break; | |
1669 | } | |
1670 | goto error; | |
1671 | ||
1672 | case 'l': /* local register */ | |
1673 | if (isoctal (c = *s++)) | |
1674 | { | |
1675 | mask = (c - '0' + 16); | |
1676 | break; | |
1677 | } | |
1678 | goto error; | |
1679 | ||
1680 | case 'o': /* out register */ | |
1681 | if (isoctal (c = *s++)) | |
1682 | { | |
1683 | mask = (c - '0' + 8); | |
1684 | break; | |
1685 | } | |
1686 | goto error; | |
1687 | ||
1688 | case 's': /* stack pointer */ | |
1689 | if (*s++ == 'p') | |
1690 | { | |
1691 | mask = 0xe; | |
1692 | break; | |
1693 | } | |
1694 | goto error; | |
1695 | ||
1696 | case 'r': /* any register */ | |
1697 | if (!isdigit (c = *s++)) | |
1698 | { | |
1699 | goto error; | |
1700 | } | |
1701 | /* FALLTHROUGH */ | |
1702 | case '0': | |
1703 | case '1': | |
1704 | case '2': | |
1705 | case '3': | |
1706 | case '4': | |
1707 | case '5': | |
1708 | case '6': | |
1709 | case '7': | |
1710 | case '8': | |
1711 | case '9': | |
1712 | if (isdigit (*s)) | |
1713 | { | |
1714 | if ((c = 10 * (c - '0') + (*s++ - '0')) >= 32) | |
680227f3 | 1715 | { |
680227f3 KR |
1716 | goto error; |
1717 | } | |
355afbcd KR |
1718 | } |
1719 | else | |
1720 | { | |
1721 | c -= '0'; | |
1722 | } | |
1723 | mask = c; | |
1724 | break; | |
1725 | ||
1726 | default: | |
1727 | goto error; | |
1728 | } | |
6df07e7f DE |
1729 | |
1730 | /* Got the register, now figure out where | |
1731 | it goes in the opcode. */ | |
355afbcd KR |
1732 | switch (*args) |
1733 | { | |
355afbcd KR |
1734 | case '1': |
1735 | opcode |= mask << 14; | |
1736 | continue; | |
1737 | ||
1738 | case '2': | |
1739 | opcode |= mask; | |
1740 | continue; | |
1741 | ||
1742 | case 'd': | |
1743 | opcode |= mask << 25; | |
1744 | continue; | |
1745 | ||
1746 | case 'r': | |
1747 | opcode |= (mask << 25) | (mask << 14); | |
1748 | continue; | |
ed94c2b8 ILT |
1749 | |
1750 | case 'O': | |
1751 | opcode |= (mask << 25) | (mask << 0); | |
1752 | continue; | |
355afbcd KR |
1753 | } |
1754 | } | |
1755 | break; | |
1756 | ||
1757 | case 'e': /* next operand is a floating point register */ | |
1758 | case 'v': | |
1759 | case 'V': | |
1760 | ||
1761 | case 'f': | |
1762 | case 'B': | |
1763 | case 'R': | |
1764 | ||
1765 | case 'g': | |
1766 | case 'H': | |
1767 | case 'J': | |
1768 | { | |
1769 | char format; | |
1770 | ||
1771 | if (*s++ == '%' | |
355afbcd | 1772 | && ((format = *s) == 'f') |
355afbcd KR |
1773 | && isdigit (*++s)) |
1774 | { | |
355afbcd KR |
1775 | for (mask = 0; isdigit (*s); ++s) |
1776 | { | |
1777 | mask = 10 * mask + (*s - '0'); | |
1778 | } /* read the number */ | |
1779 | ||
1780 | if ((*args == 'v' | |
1781 | || *args == 'B' | |
1782 | || *args == 'H') | |
1783 | && (mask & 1)) | |
1784 | { | |
1785 | break; | |
1786 | } /* register must be even numbered */ | |
1787 | ||
1788 | if ((*args == 'V' | |
1789 | || *args == 'R' | |
1790 | || *args == 'J') | |
1791 | && (mask & 3)) | |
1792 | { | |
1793 | break; | |
1794 | } /* register must be multiple of 4 */ | |
1795 | ||
125f0b0d | 1796 | if (mask >= 64) |
355afbcd | 1797 | { |
8dd07a84 | 1798 | if (SPARC_OPCODE_ARCH_V9_P (max_architecture)) |
6df07e7f DE |
1799 | error_message = ": There are only 64 f registers; [0-63]"; |
1800 | else | |
1801 | error_message = ": There are only 32 f registers; [0-31]"; | |
125f0b0d KR |
1802 | goto error; |
1803 | } /* on error */ | |
6df07e7f | 1804 | else if (mask >= 32) |
125f0b0d | 1805 | { |
8dd07a84 | 1806 | if (SPARC_OPCODE_ARCH_V9_P (max_architecture)) |
6df07e7f DE |
1807 | { |
1808 | v9_arg_p = 1; | |
1809 | mask -= 31; /* wrap high bit */ | |
1810 | } | |
1811 | else | |
1812 | { | |
1813 | error_message = ": There are only 32 f registers; [0-31]"; | |
1814 | goto error; | |
1815 | } | |
1816 | } | |
125f0b0d KR |
1817 | } |
1818 | else | |
1819 | { | |
1820 | break; | |
1821 | } /* if not an 'f' register. */ | |
355afbcd KR |
1822 | |
1823 | switch (*args) | |
1824 | { | |
355afbcd KR |
1825 | case 'v': |
1826 | case 'V': | |
1827 | case 'e': | |
1828 | opcode |= RS1 (mask); | |
1829 | continue; | |
1830 | ||
1831 | ||
1832 | case 'f': | |
1833 | case 'B': | |
1834 | case 'R': | |
1835 | opcode |= RS2 (mask); | |
1836 | continue; | |
1837 | ||
1838 | case 'g': | |
1839 | case 'H': | |
1840 | case 'J': | |
1841 | opcode |= RD (mask); | |
1842 | continue; | |
1843 | } /* pack it in. */ | |
1844 | ||
1845 | know (0); | |
1846 | break; | |
1847 | } /* float arg */ | |
1848 | ||
1849 | case 'F': | |
1850 | if (strncmp (s, "%fsr", 4) == 0) | |
1851 | { | |
1852 | s += 4; | |
1853 | continue; | |
1854 | } | |
1855 | break; | |
1856 | ||
2b063e6d ILT |
1857 | case '0': /* 64 bit immediate (setx insn) */ |
1858 | the_insn.reloc = BFD_RELOC_NONE; /* reloc handled elsewhere */ | |
1859 | goto immediate; | |
1860 | ||
355afbcd | 1861 | case 'h': /* high 22 bits */ |
428d312b | 1862 | the_insn.reloc = BFD_RELOC_HI22; |
355afbcd KR |
1863 | goto immediate; |
1864 | ||
1865 | case 'l': /* 22 bit PC relative immediate */ | |
428d312b | 1866 | the_insn.reloc = BFD_RELOC_SPARC_WDISP22; |
355afbcd KR |
1867 | the_insn.pcrel = 1; |
1868 | goto immediate; | |
1869 | ||
1870 | case 'L': /* 30 bit immediate */ | |
428d312b | 1871 | the_insn.reloc = BFD_RELOC_32_PCREL_S2; |
355afbcd KR |
1872 | the_insn.pcrel = 1; |
1873 | goto immediate; | |
1874 | ||
1875 | case 'n': /* 22 bit immediate */ | |
428d312b | 1876 | the_insn.reloc = BFD_RELOC_SPARC22; |
355afbcd KR |
1877 | goto immediate; |
1878 | ||
1879 | case 'i': /* 13 bit immediate */ | |
7ab2e983 | 1880 | the_insn.reloc = BFD_RELOC_SPARC13; |
355afbcd KR |
1881 | immediate_max = 0x0FFF; |
1882 | ||
1883 | /*FALLTHROUGH */ | |
1884 | ||
1885 | immediate: | |
1886 | if (*s == ' ') | |
1887 | s++; | |
1888 | if (*s == '%') | |
1889 | { | |
1890 | if ((c = s[1]) == 'h' && s[2] == 'i') | |
1891 | { | |
428d312b | 1892 | the_insn.reloc = BFD_RELOC_HI22; |
355afbcd KR |
1893 | s += 3; |
1894 | } | |
1895 | else if (c == 'l' && s[2] == 'o') | |
1896 | { | |
428d312b | 1897 | the_insn.reloc = BFD_RELOC_LO10; |
355afbcd | 1898 | s += 3; |
355afbcd KR |
1899 | } |
1900 | else if (c == 'u' | |
1901 | && s[2] == 'h' | |
1902 | && s[3] == 'i') | |
1903 | { | |
125f0b0d | 1904 | the_insn.reloc = BFD_RELOC_SPARC_HH22; |
355afbcd | 1905 | s += 4; |
6df07e7f | 1906 | v9_arg_p = 1; |
355afbcd KR |
1907 | } |
1908 | else if (c == 'u' | |
1909 | && s[2] == 'l' | |
1910 | && s[3] == 'o') | |
1911 | { | |
125f0b0d | 1912 | the_insn.reloc = BFD_RELOC_SPARC_HM10; |
355afbcd | 1913 | s += 4; |
6df07e7f | 1914 | v9_arg_p = 1; |
355afbcd KR |
1915 | } |
1916 | else | |
1917 | break; | |
1918 | } | |
9b6a882e KR |
1919 | /* Note that if the getExpression() fails, we will still |
1920 | have created U entries in the symbol table for the | |
1921 | 'symbols' in the input string. Try not to create U | |
1922 | symbols for registers, etc. */ | |
355afbcd | 1923 | { |
9b6a882e KR |
1924 | /* This stuff checks to see if the expression ends in |
1925 | +%reg. If it does, it removes the register from | |
1926 | the expression, and re-sets 's' to point to the | |
1927 | right place. */ | |
355afbcd KR |
1928 | |
1929 | char *s1; | |
1930 | ||
2b063e6d | 1931 | for (s1 = s; *s1 && *s1 != ',' && *s1 != ']'; s1++) ; |
355afbcd KR |
1932 | |
1933 | if (s1 != s && isdigit (s1[-1])) | |
1934 | { | |
1935 | if (s1[-2] == '%' && s1[-3] == '+') | |
1936 | { | |
1937 | s1 -= 3; | |
1938 | *s1 = '\0'; | |
1939 | (void) getExpression (s); | |
1940 | *s1 = '+'; | |
1941 | s = s1; | |
1942 | continue; | |
1943 | } | |
1944 | else if (strchr ("goli0123456789", s1[-2]) && s1[-3] == '%' && s1[-4] == '+') | |
1945 | { | |
1946 | s1 -= 4; | |
1947 | *s1 = '\0'; | |
1948 | (void) getExpression (s); | |
1949 | *s1 = '+'; | |
1950 | s = s1; | |
1951 | continue; | |
1952 | } | |
1953 | } | |
1954 | } | |
1955 | (void) getExpression (s); | |
1956 | s = expr_end; | |
1957 | ||
9b6a882e KR |
1958 | if (the_insn.exp.X_op == O_constant |
1959 | && the_insn.exp.X_add_symbol == 0 | |
1960 | && the_insn.exp.X_op_symbol == 0) | |
1961 | { | |
7ab2e983 ILT |
1962 | /* Handle %uhi/%ulo by moving the upper word to the lower |
1963 | one and pretending it's %hi/%lo. We also need to watch | |
1964 | for %hi/%lo: the top word needs to be zeroed otherwise | |
1965 | fixup_segment will complain the value is too big. */ | |
9b6a882e KR |
1966 | switch (the_insn.reloc) |
1967 | { | |
1968 | case BFD_RELOC_SPARC_HH22: | |
1969 | the_insn.reloc = BFD_RELOC_HI22; | |
5e0a90a8 | 1970 | the_insn.exp.X_add_number = BSR (the_insn.exp.X_add_number, 32); |
9b6a882e KR |
1971 | break; |
1972 | case BFD_RELOC_SPARC_HM10: | |
1973 | the_insn.reloc = BFD_RELOC_LO10; | |
5e0a90a8 | 1974 | the_insn.exp.X_add_number = BSR (the_insn.exp.X_add_number, 32); |
9b6a882e | 1975 | break; |
7ab2e983 ILT |
1976 | case BFD_RELOC_HI22: |
1977 | case BFD_RELOC_LO10: | |
1978 | the_insn.exp.X_add_number &= 0xffffffff; | |
1979 | break; | |
6df07e7f DE |
1980 | default: |
1981 | break; | |
9b6a882e | 1982 | } |
6df07e7f | 1983 | |
7ab2e983 ILT |
1984 | /* For pc-relative call instructions, we reject |
1985 | constants to get better code. */ | |
1986 | if (the_insn.pcrel | |
1987 | && the_insn.reloc == BFD_RELOC_32_PCREL_S2 | |
1988 | && in_signed_range (the_insn.exp.X_add_number, 0x3fff) | |
1989 | ) | |
1990 | { | |
1991 | error_message = ": PC-relative operand can't be a constant"; | |
1992 | goto error; | |
1993 | } | |
9b6a882e KR |
1994 | /* Check for invalid constant values. Don't warn if |
1995 | constant was inside %hi or %lo, since these | |
1996 | truncate the constant to fit. */ | |
1997 | if (immediate_max != 0 | |
1998 | && the_insn.reloc != BFD_RELOC_LO10 | |
1999 | && the_insn.reloc != BFD_RELOC_HI22 | |
7ab2e983 ILT |
2000 | && !in_signed_range (the_insn.exp.X_add_number, |
2001 | immediate_max) | |
2002 | ) | |
2003 | { | |
2004 | if (the_insn.pcrel) | |
2005 | /* Who knows? After relocation, we may be within | |
2006 | range. Let the linker figure it out. */ | |
2007 | { | |
2008 | the_insn.exp.X_op = O_symbol; | |
2009 | the_insn.exp.X_add_symbol = section_symbol (absolute_section); | |
2010 | } | |
2011 | else | |
2012 | /* Immediate value is non-pcrel, and out of | |
2013 | range. */ | |
2014 | as_bad ("constant value %ld out of range (%ld .. %ld)", | |
2015 | the_insn.exp.X_add_number, | |
2016 | ~immediate_max, immediate_max); | |
2017 | } | |
9b6a882e KR |
2018 | } |
2019 | ||
355afbcd KR |
2020 | /* Reset to prevent extraneous range check. */ |
2021 | immediate_max = 0; | |
2022 | ||
2023 | continue; | |
2024 | ||
2025 | case 'a': | |
2026 | if (*s++ == 'a') | |
2027 | { | |
2028 | opcode |= ANNUL; | |
2029 | continue; | |
2030 | } | |
2031 | break; | |
2032 | ||
2033 | case 'A': | |
2034 | { | |
ed9638af KR |
2035 | int asi = 0; |
2036 | ||
2037 | /* Parse an asi. */ | |
2038 | if (*s == '#') | |
2039 | { | |
6df07e7f | 2040 | if (! parse_keyword_arg (sparc_encode_asi, &s, &asi)) |
ed9638af | 2041 | { |
6df07e7f | 2042 | error_message = ": invalid ASI name"; |
ed9638af KR |
2043 | goto error; |
2044 | } | |
2045 | } | |
a7aa7a2b | 2046 | else |
ed9638af | 2047 | { |
6df07e7f | 2048 | if (! parse_const_expr_arg (&s, &asi)) |
a7aa7a2b | 2049 | { |
6df07e7f | 2050 | error_message = ": invalid ASI expression"; |
a7aa7a2b ILT |
2051 | goto error; |
2052 | } | |
ed9638af KR |
2053 | if (asi < 0 || asi > 255) |
2054 | { | |
6df07e7f | 2055 | error_message = ": invalid ASI number"; |
ed9638af KR |
2056 | goto error; |
2057 | } | |
2058 | } | |
ed9638af KR |
2059 | opcode |= ASI (asi); |
2060 | continue; | |
355afbcd KR |
2061 | } /* alternate space */ |
2062 | ||
2063 | case 'p': | |
2064 | if (strncmp (s, "%psr", 4) == 0) | |
2065 | { | |
2066 | s += 4; | |
2067 | continue; | |
2068 | } | |
2069 | break; | |
2070 | ||
2071 | case 'q': /* floating point queue */ | |
2072 | if (strncmp (s, "%fq", 3) == 0) | |
2073 | { | |
2074 | s += 3; | |
2075 | continue; | |
2076 | } | |
2077 | break; | |
2078 | ||
2079 | case 'Q': /* coprocessor queue */ | |
2080 | if (strncmp (s, "%cq", 3) == 0) | |
2081 | { | |
2082 | s += 3; | |
2083 | continue; | |
2084 | } | |
2085 | break; | |
2086 | ||
2087 | case 'S': | |
2b063e6d ILT |
2088 | if (strcmp (str, "set") == 0 |
2089 | || strcmp (str, "setuw") == 0) | |
355afbcd KR |
2090 | { |
2091 | special_case = SPECIAL_CASE_SET; | |
2092 | continue; | |
2093 | } | |
2b063e6d ILT |
2094 | else if (strcmp (str, "setsw") == 0) |
2095 | { | |
2096 | special_case = SPECIAL_CASE_SETSW; | |
2097 | continue; | |
2098 | } | |
2099 | else if (strcmp (str, "setx") == 0) | |
2100 | { | |
2101 | special_case = SPECIAL_CASE_SETX; | |
2102 | continue; | |
2103 | } | |
355afbcd KR |
2104 | else if (strncmp (str, "fdiv", 4) == 0) |
2105 | { | |
2106 | special_case = SPECIAL_CASE_FDIV; | |
2107 | continue; | |
2108 | } | |
2109 | break; | |
2110 | ||
355afbcd KR |
2111 | case 'o': |
2112 | if (strncmp (s, "%asi", 4) != 0) | |
2113 | break; | |
2114 | s += 4; | |
2115 | continue; | |
2116 | ||
2117 | case 's': | |
2118 | if (strncmp (s, "%fprs", 5) != 0) | |
2119 | break; | |
2120 | s += 5; | |
2121 | continue; | |
2122 | ||
2123 | case 'E': | |
2124 | if (strncmp (s, "%ccr", 4) != 0) | |
2125 | break; | |
2126 | s += 4; | |
2127 | continue; | |
680227f3 | 2128 | |
355afbcd KR |
2129 | case 't': |
2130 | if (strncmp (s, "%tbr", 4) != 0) | |
2131 | break; | |
2132 | s += 4; | |
2133 | continue; | |
2134 | ||
2135 | case 'w': | |
2136 | if (strncmp (s, "%wim", 4) != 0) | |
2137 | break; | |
2138 | s += 4; | |
2139 | continue; | |
2140 | ||
5e0a90a8 KR |
2141 | case 'x': |
2142 | { | |
2143 | char *push = input_line_pointer; | |
2144 | expressionS e; | |
2145 | ||
2146 | input_line_pointer = s; | |
2147 | expression (&e); | |
2148 | if (e.X_op == O_constant) | |
2149 | { | |
2150 | int n = e.X_add_number; | |
2151 | if (n != e.X_add_number || (n & ~0x1ff) != 0) | |
2152 | as_bad ("OPF immediate operand out of range (0-0x1ff)"); | |
2153 | else | |
2154 | opcode |= e.X_add_number << 5; | |
2155 | } | |
2156 | else | |
2157 | as_bad ("non-immediate OPF operand, ignored"); | |
2158 | s = input_line_pointer; | |
2159 | input_line_pointer = push; | |
2160 | continue; | |
2161 | } | |
5e0a90a8 | 2162 | |
355afbcd KR |
2163 | case 'y': |
2164 | if (strncmp (s, "%y", 2) != 0) | |
2165 | break; | |
2166 | s += 2; | |
2167 | continue; | |
2168 | ||
e86d5cf3 DE |
2169 | case 'u': |
2170 | case 'U': | |
2171 | { | |
2172 | /* Parse a sparclet cpreg. */ | |
2173 | int cpreg; | |
2174 | if (! parse_keyword_arg (sparc_encode_sparclet_cpreg, &s, &cpreg)) | |
2175 | { | |
2176 | error_message = ": invalid cpreg name"; | |
2177 | goto error; | |
2178 | } | |
2179 | opcode |= (*args == 'U' ? RS1 (cpreg) : RD (cpreg)); | |
2180 | continue; | |
2181 | } | |
2182 | ||
355afbcd KR |
2183 | default: |
2184 | as_fatal ("failed sanity check."); | |
2185 | } /* switch on arg code */ | |
6df07e7f DE |
2186 | |
2187 | /* Break out of for() loop. */ | |
355afbcd KR |
2188 | break; |
2189 | } /* for each arg that we expect */ | |
6df07e7f | 2190 | |
355afbcd KR |
2191 | error: |
2192 | if (match == 0) | |
2193 | { | |
2194 | /* Args don't match. */ | |
e70ad5d5 | 2195 | if (((unsigned) (&insn[1] - sparc_opcodes)) < sparc_num_opcodes |
a7aa7a2b ILT |
2196 | && (insn->name == insn[1].name |
2197 | || !strcmp (insn->name, insn[1].name))) | |
355afbcd KR |
2198 | { |
2199 | ++insn; | |
2200 | s = argsStart; | |
2201 | continue; | |
2202 | } | |
2203 | else | |
2204 | { | |
2205 | as_bad ("Illegal operands%s", error_message); | |
2206 | return; | |
2207 | } | |
2208 | } | |
2209 | else | |
2210 | { | |
e70ad5d5 | 2211 | /* We have a match. Now see if the architecture is ok. */ |
d8b42b96 | 2212 | int needed_arch_mask = insn->architecture; |
e70ad5d5 | 2213 | |
d8b42b96 | 2214 | if (v9_arg_p) |
355afbcd | 2215 | { |
d8b42b96 DE |
2216 | needed_arch_mask &= ~ ((1 << SPARC_OPCODE_ARCH_V9) |
2217 | | (1 << SPARC_OPCODE_ARCH_V9A)); | |
2218 | needed_arch_mask |= (1 << SPARC_OPCODE_ARCH_V9); | |
e70ad5d5 | 2219 | } |
d8b42b96 DE |
2220 | |
2221 | if (needed_arch_mask & SPARC_OPCODE_SUPPORTED (current_architecture)) | |
2222 | ; /* ok */ | |
2223 | /* Can we bump up the architecture? */ | |
2224 | else if (needed_arch_mask & SPARC_OPCODE_SUPPORTED (max_architecture)) | |
e70ad5d5 | 2225 | { |
d8b42b96 DE |
2226 | enum sparc_opcode_arch_val needed_architecture = |
2227 | sparc_ffs (SPARC_OPCODE_SUPPORTED (max_architecture) | |
2228 | & needed_arch_mask); | |
2229 | ||
2230 | assert (needed_architecture <= SPARC_OPCODE_ARCH_MAX); | |
e70ad5d5 DE |
2231 | if (warn_on_bump |
2232 | && needed_architecture > warn_after_architecture) | |
355afbcd | 2233 | { |
e70ad5d5 DE |
2234 | as_warn ("architecture bumped from \"%s\" to \"%s\" on \"%s\"", |
2235 | sparc_opcode_archs[current_architecture].name, | |
2236 | sparc_opcode_archs[needed_architecture].name, | |
2237 | str); | |
d8b42b96 | 2238 | warn_after_architecture = needed_architecture; |
355afbcd | 2239 | } |
e70ad5d5 DE |
2240 | current_architecture = needed_architecture; |
2241 | } | |
d8b42b96 | 2242 | /* Conflict. */ |
110b814d DE |
2243 | /* ??? This seems to be a bit fragile. What if the next entry in |
2244 | the opcode table is the one we want and it is supported? | |
2245 | It is possible to arrange the table today so that this can't | |
2246 | happen but what about tomorrow? */ | |
d8b42b96 DE |
2247 | else |
2248 | { | |
110b814d DE |
2249 | int arch,printed_one_p = 0; |
2250 | char *p; | |
2251 | char required_archs[SPARC_OPCODE_ARCH_MAX * 16]; | |
2252 | ||
2253 | /* Create a list of the architectures that support the insn. */ | |
2254 | needed_arch_mask &= ~ SPARC_OPCODE_SUPPORTED (max_architecture); | |
2255 | p = required_archs; | |
2256 | arch = sparc_ffs (needed_arch_mask); | |
2257 | while ((1 << arch) <= needed_arch_mask) | |
2258 | { | |
2259 | if ((1 << arch) & needed_arch_mask) | |
2260 | { | |
2261 | if (printed_one_p) | |
2262 | *p++ = '|'; | |
2263 | strcpy (p, sparc_opcode_archs[arch].name); | |
2264 | p += strlen (p); | |
2265 | printed_one_p = 1; | |
2266 | } | |
2267 | ++arch; | |
2268 | } | |
d8b42b96 | 2269 | |
d8b42b96 DE |
2270 | as_bad ("Architecture mismatch on \"%s\".", str); |
2271 | as_tsktsk (" (Requires %s; requested architecture is %s.)", | |
110b814d | 2272 | required_archs, |
d8b42b96 DE |
2273 | sparc_opcode_archs[max_architecture].name); |
2274 | return; | |
2275 | } | |
e70ad5d5 | 2276 | } /* if no match */ |
355afbcd KR |
2277 | |
2278 | break; | |
e70ad5d5 | 2279 | } /* forever looking for a match */ |
355afbcd KR |
2280 | |
2281 | the_insn.opcode = opcode; | |
c999fd9f | 2282 | } |
355afbcd KR |
2283 | |
2284 | static int | |
2285 | getExpression (str) | |
2286 | char *str; | |
fecd2382 | 2287 | { |
355afbcd KR |
2288 | char *save_in; |
2289 | segT seg; | |
2290 | ||
2291 | save_in = input_line_pointer; | |
2292 | input_line_pointer = str; | |
428d312b | 2293 | seg = expression (&the_insn.exp); |
58d4951d ILT |
2294 | if (seg != absolute_section |
2295 | && seg != text_section | |
2296 | && seg != data_section | |
2297 | && seg != bss_section | |
2298 | && seg != undefined_section) | |
355afbcd | 2299 | { |
355afbcd KR |
2300 | the_insn.error = "bad segment"; |
2301 | expr_end = input_line_pointer; | |
2302 | input_line_pointer = save_in; | |
2303 | return 1; | |
2304 | } | |
2305 | expr_end = input_line_pointer; | |
2306 | input_line_pointer = save_in; | |
2307 | return 0; | |
2308 | } /* getExpression() */ | |
fecd2382 RP |
2309 | |
2310 | ||
2311 | /* | |
2312 | This is identical to the md_atof in m68k.c. I think this is right, | |
2313 | but I'm not sure. | |
355afbcd | 2314 | |
fecd2382 RP |
2315 | Turn a string in input_line_pointer into a floating point constant of type |
2316 | type, and store the appropriate bytes in *litP. The number of LITTLENUMS | |
2317 | emitted is stored in *sizeP . An error message is returned, or NULL on OK. | |
2318 | */ | |
2319 | ||
2320 | /* Equal to MAX_PRECISION in atof-ieee.c */ | |
2321 | #define MAX_LITTLENUMS 6 | |
2322 | ||
355afbcd KR |
2323 | char * |
2324 | md_atof (type, litP, sizeP) | |
2325 | char type; | |
2326 | char *litP; | |
2327 | int *sizeP; | |
fecd2382 | 2328 | { |
2b063e6d | 2329 | int i,prec; |
355afbcd | 2330 | LITTLENUM_TYPE words[MAX_LITTLENUMS]; |
355afbcd | 2331 | char *t; |
355afbcd KR |
2332 | |
2333 | switch (type) | |
2334 | { | |
355afbcd KR |
2335 | case 'f': |
2336 | case 'F': | |
2337 | case 's': | |
2338 | case 'S': | |
2339 | prec = 2; | |
2340 | break; | |
2341 | ||
2342 | case 'd': | |
2343 | case 'D': | |
2344 | case 'r': | |
2345 | case 'R': | |
2346 | prec = 4; | |
2347 | break; | |
2348 | ||
2349 | case 'x': | |
2350 | case 'X': | |
2351 | prec = 6; | |
2352 | break; | |
2353 | ||
2354 | case 'p': | |
2355 | case 'P': | |
2356 | prec = 6; | |
2357 | break; | |
2358 | ||
2359 | default: | |
2360 | *sizeP = 0; | |
2361 | return "Bad call to MD_ATOF()"; | |
2362 | } | |
2b063e6d | 2363 | |
355afbcd KR |
2364 | t = atof_ieee (input_line_pointer, type, words); |
2365 | if (t) | |
2366 | input_line_pointer = t; | |
2367 | *sizeP = prec * sizeof (LITTLENUM_TYPE); | |
2b063e6d ILT |
2368 | |
2369 | if (target_big_endian) | |
355afbcd | 2370 | { |
2b063e6d ILT |
2371 | for (i = 0; i < prec; i++) |
2372 | { | |
2373 | md_number_to_chars (litP, (valueT) words[i], sizeof (LITTLENUM_TYPE)); | |
2374 | litP += sizeof (LITTLENUM_TYPE); | |
2375 | } | |
2376 | } | |
2377 | else | |
2378 | { | |
2379 | for (i = prec - 1; i >= 0; i--) | |
2380 | { | |
2381 | md_number_to_chars (litP, (valueT) words[i], sizeof (LITTLENUM_TYPE)); | |
2382 | litP += sizeof (LITTLENUM_TYPE); | |
2383 | } | |
355afbcd | 2384 | } |
2b063e6d | 2385 | |
ed9638af KR |
2386 | return 0; |
2387 | } | |
fecd2382 | 2388 | |
2b063e6d ILT |
2389 | /* Write a value out to the object file, using the appropriate |
2390 | endianness. */ | |
2391 | ||
355afbcd KR |
2392 | void |
2393 | md_number_to_chars (buf, val, n) | |
2394 | char *buf; | |
125f0b0d | 2395 | valueT val; |
355afbcd | 2396 | int n; |
fecd2382 | 2397 | { |
2b063e6d ILT |
2398 | if (target_big_endian) |
2399 | number_to_chars_bigendian (buf, val, n); | |
2400 | else | |
2401 | number_to_chars_littleendian (buf, val, n); | |
c999fd9f | 2402 | } |
fecd2382 RP |
2403 | |
2404 | /* Apply a fixS to the frags, now that we know the value it ought to | |
2405 | hold. */ | |
2406 | ||
428d312b | 2407 | int |
2b063e6d | 2408 | md_apply_fix3 (fixP, value, segment) |
355afbcd | 2409 | fixS *fixP; |
125f0b0d | 2410 | valueT *value; |
2b063e6d | 2411 | segT segment; |
fecd2382 | 2412 | { |
355afbcd | 2413 | char *buf = fixP->fx_where + fixP->fx_frag->fr_literal; |
125f0b0d | 2414 | offsetT val; |
2b063e6d | 2415 | long insn; |
428d312b | 2416 | |
428d312b | 2417 | val = *value; |
355afbcd | 2418 | |
428d312b | 2419 | assert (fixP->fx_r_type < BFD_RELOC_UNUSED); |
355afbcd KR |
2420 | |
2421 | fixP->fx_addnumber = val; /* Remember value for emit_reloc */ | |
2422 | ||
7766838e ILT |
2423 | #ifdef OBJ_ELF |
2424 | /* FIXME: SPARC ELF relocations don't use an addend in the data | |
2425 | field itself. This whole approach should be somehow combined | |
9e6f4c6b | 2426 | with the calls to bfd_install_relocation. Also, the value passed |
a7aa7a2b ILT |
2427 | in by fixup_segment includes the value of a defined symbol. We |
2428 | don't want to include the value of an externally visible symbol. */ | |
7766838e | 2429 | if (fixP->fx_addsy != NULL) |
a7aa7a2b | 2430 | { |
2b063e6d ILT |
2431 | if (fixP->fx_addsy->sy_used_in_reloc |
2432 | && (S_IS_EXTERNAL (fixP->fx_addsy) | |
2433 | || S_IS_WEAK (fixP->fx_addsy) | |
2434 | || (sparc_pic_code && ! fixP->fx_pcrel) | |
2435 | || (S_GET_SEGMENT (fixP->fx_addsy) != segment | |
2436 | && ((bfd_get_section_flags (stdoutput, | |
2437 | S_GET_SEGMENT (fixP->fx_addsy)) | |
2438 | & SEC_LINK_ONCE) != 0 | |
2439 | || strncmp (segment_name (S_GET_SEGMENT (fixP->fx_addsy)), | |
2440 | ".gnu.linkonce", | |
2441 | sizeof ".gnu.linkonce" - 1) == 0))) | |
a7aa7a2b ILT |
2442 | && S_GET_SEGMENT (fixP->fx_addsy) != absolute_section |
2443 | && S_GET_SEGMENT (fixP->fx_addsy) != undefined_section | |
2444 | && ! bfd_is_com_section (S_GET_SEGMENT (fixP->fx_addsy))) | |
2445 | fixP->fx_addnumber -= S_GET_VALUE (fixP->fx_addsy); | |
2446 | return 1; | |
2447 | } | |
7766838e ILT |
2448 | #endif |
2449 | ||
c999fd9f KR |
2450 | /* This is a hack. There should be a better way to |
2451 | handle this. Probably in terms of howto fields, once | |
2452 | we can look at these fixups in terms of howtos. */ | |
428d312b | 2453 | if (fixP->fx_r_type == BFD_RELOC_32_PCREL_S2 && fixP->fx_addsy) |
c999fd9f | 2454 | val += fixP->fx_where + fixP->fx_frag->fr_address; |
355afbcd | 2455 | |
ade614d5 KR |
2456 | #ifdef OBJ_AOUT |
2457 | /* FIXME: More ridiculous gas reloc hacking. If we are going to | |
2458 | generate a reloc, then we just want to let the reloc addend set | |
2459 | the value. We do not want to also stuff the addend into the | |
2460 | object file. Including the addend in the object file works when | |
2461 | doing a static link, because the linker will ignore the object | |
2462 | file contents. However, the dynamic linker does not ignore the | |
2463 | object file contents. */ | |
2464 | if (fixP->fx_addsy != NULL | |
2465 | && fixP->fx_r_type != BFD_RELOC_32_PCREL_S2) | |
2466 | val = 0; | |
4c67b523 ILT |
2467 | |
2468 | /* When generating PIC code, we do not want an addend for a reloc | |
2469 | against a local symbol. We adjust fx_addnumber to cancel out the | |
2470 | value already included in val, and to also cancel out the | |
2471 | adjustment which bfd_install_relocation will create. */ | |
2472 | if (sparc_pic_code | |
2473 | && fixP->fx_r_type != BFD_RELOC_32_PCREL_S2 | |
2474 | && fixP->fx_addsy != NULL | |
2475 | && ! S_IS_COMMON (fixP->fx_addsy) | |
2476 | && (fixP->fx_addsy->bsym->flags & BSF_SECTION_SYM) == 0) | |
2477 | fixP->fx_addnumber -= 2 * S_GET_VALUE (fixP->fx_addsy); | |
ade614d5 KR |
2478 | #endif |
2479 | ||
2b063e6d | 2480 | /* If this is a data relocation, just output VAL. */ |
58d4951d | 2481 | |
2b063e6d ILT |
2482 | if (fixP->fx_r_type == BFD_RELOC_16) |
2483 | { | |
2484 | md_number_to_chars (buf, val, 2); | |
2485 | } | |
2486 | else if (fixP->fx_r_type == BFD_RELOC_32) | |
2487 | { | |
2488 | md_number_to_chars (buf, val, 4); | |
2489 | } | |
2490 | else if (fixP->fx_r_type == BFD_RELOC_64) | |
2491 | { | |
2492 | md_number_to_chars (buf, val, 8); | |
2493 | } | |
2494 | else | |
2495 | { | |
2496 | /* It's a relocation against an instruction. */ | |
355afbcd | 2497 | |
2b063e6d ILT |
2498 | if (INSN_BIG_ENDIAN) |
2499 | insn = bfd_getb32 ((unsigned char *) buf); | |
2500 | else | |
2501 | insn = bfd_getl32 ((unsigned char *) buf); | |
2502 | ||
2503 | switch (fixP->fx_r_type) | |
2504 | { | |
2505 | case BFD_RELOC_32_PCREL_S2: | |
2506 | val = val >> 2; | |
2507 | /* FIXME: This increment-by-one deserves a comment of why it's | |
2508 | being done! */ | |
2509 | if (! sparc_pic_code | |
2510 | || fixP->fx_addsy == NULL | |
2511 | || (fixP->fx_addsy->bsym->flags & BSF_SECTION_SYM) != 0) | |
2512 | ++val; | |
2513 | insn |= val & 0x3fffffff; | |
2514 | break; | |
693b21e7 | 2515 | |
2b063e6d ILT |
2516 | case BFD_RELOC_SPARC_11: |
2517 | if (! in_signed_range (val, 0x7ff)) | |
2518 | as_bad ("relocation overflow."); | |
2519 | insn |= val & 0x7ff; | |
2520 | break; | |
355afbcd | 2521 | |
2b063e6d ILT |
2522 | case BFD_RELOC_SPARC_10: |
2523 | if (! in_signed_range (val, 0x3ff)) | |
2524 | as_bad ("relocation overflow."); | |
2525 | insn |= val & 0x3ff; | |
2526 | break; | |
355afbcd | 2527 | |
2b063e6d ILT |
2528 | case BFD_RELOC_SPARC_6: |
2529 | if (! in_bitfield_range (val, 0x3f)) | |
2530 | as_bad ("relocation overflow."); | |
2531 | insn |= val & 0x3f; | |
2532 | break; | |
355afbcd | 2533 | |
2b063e6d ILT |
2534 | case BFD_RELOC_SPARC_5: |
2535 | if (! in_bitfield_range (val, 0x1f)) | |
2536 | as_bad ("relocation overflow."); | |
2537 | insn |= val & 0x1f; | |
2538 | break; | |
8dd07a84 | 2539 | |
2b063e6d ILT |
2540 | case BFD_RELOC_SPARC_WDISP16: |
2541 | /* FIXME: simplify */ | |
2542 | if (((val > 0) && (val & ~0x3fffc)) | |
2543 | || ((val < 0) && (~(val - 1) & ~0x3fffc))) | |
2544 | as_bad ("relocation overflow."); | |
2545 | /* FIXME: The +1 deserves a comment. */ | |
2546 | val = (val >> 2) + 1; | |
2547 | insn |= ((val & 0xc000) << 6) | (val & 0x3fff); | |
2548 | break; | |
8dd07a84 | 2549 | |
2b063e6d ILT |
2550 | case BFD_RELOC_SPARC_WDISP19: |
2551 | /* FIXME: simplify */ | |
2552 | if (((val > 0) && (val & ~0x1ffffc)) | |
2553 | || ((val < 0) && (~(val - 1) & ~0x1ffffc))) | |
2554 | as_bad ("relocation overflow."); | |
2555 | /* FIXME: The +1 deserves a comment. */ | |
2556 | val = (val >> 2) + 1; | |
2557 | insn |= val & 0x7ffff; | |
2558 | break; | |
8dd07a84 | 2559 | |
2b063e6d ILT |
2560 | case BFD_RELOC_SPARC_HH22: |
2561 | val = BSR (val, 32); | |
2562 | /* intentional fallthrough */ | |
8dd07a84 | 2563 | |
2b063e6d ILT |
2564 | case BFD_RELOC_SPARC_LM22: |
2565 | case BFD_RELOC_HI22: | |
2566 | if (!fixP->fx_addsy) | |
2567 | { | |
2568 | insn |= (val >> 10) & 0x3fffff; | |
2569 | } | |
2570 | else | |
2571 | { | |
2572 | /* FIXME: Need comment explaining why we do this. */ | |
2573 | insn &= ~0xffff; | |
2574 | } | |
2575 | break; | |
355afbcd | 2576 | |
2b063e6d ILT |
2577 | case BFD_RELOC_SPARC22: |
2578 | if (val & ~0x003fffff) | |
2579 | as_bad ("relocation overflow"); | |
2580 | insn |= (val & 0x3fffff); | |
2581 | break; | |
355afbcd | 2582 | |
2b063e6d ILT |
2583 | case BFD_RELOC_SPARC_HM10: |
2584 | val = BSR (val, 32); | |
2585 | /* intentional fallthrough */ | |
355afbcd | 2586 | |
2b063e6d ILT |
2587 | case BFD_RELOC_LO10: |
2588 | if (!fixP->fx_addsy) | |
2589 | { | |
2590 | insn |= val & 0x3ff; | |
2591 | } | |
2592 | else | |
2593 | { | |
2594 | /* FIXME: Need comment explaining why we do this. */ | |
2595 | insn &= ~0xff; | |
2596 | } | |
2597 | break; | |
355afbcd | 2598 | |
2b063e6d ILT |
2599 | case BFD_RELOC_SPARC13: |
2600 | if (! in_signed_range (val, 0x1fff)) | |
2601 | as_bad ("relocation overflow"); | |
2602 | insn |= val & 0x1fff; | |
2603 | break; | |
355afbcd | 2604 | |
2b063e6d ILT |
2605 | case BFD_RELOC_SPARC_WDISP22: |
2606 | val = (val >> 2) + 1; | |
2607 | /* FALLTHROUGH */ | |
2608 | case BFD_RELOC_SPARC_BASE22: | |
2609 | insn |= val & 0x3fffff; | |
2610 | break; | |
355afbcd | 2611 | |
2b063e6d ILT |
2612 | case BFD_RELOC_NONE: |
2613 | default: | |
2614 | as_bad ("bad or unhandled relocation type: 0x%02x", fixP->fx_r_type); | |
2615 | break; | |
355afbcd | 2616 | } |
355afbcd | 2617 | |
2b063e6d ILT |
2618 | if (INSN_BIG_ENDIAN) |
2619 | bfd_putb32 (insn, (unsigned char *) buf); | |
355afbcd | 2620 | else |
2b063e6d | 2621 | bfd_putl32 (insn, (unsigned char *) buf); |
355afbcd | 2622 | } |
428d312b | 2623 | |
7ab2e983 ILT |
2624 | /* Are we finished with this relocation now? */ |
2625 | if (fixP->fx_addsy == 0 && !fixP->fx_pcrel) | |
2626 | fixP->fx_done = 1; | |
2627 | ||
428d312b | 2628 | return 1; |
428d312b | 2629 | } |
fecd2382 | 2630 | |
428d312b KR |
2631 | /* Translate internal representation of relocation info to BFD target |
2632 | format. */ | |
2633 | arelent * | |
2634 | tc_gen_reloc (section, fixp) | |
2635 | asection *section; | |
2636 | fixS *fixp; | |
2637 | { | |
2638 | arelent *reloc; | |
2639 | bfd_reloc_code_real_type code; | |
2640 | ||
590c50d8 | 2641 | reloc = (arelent *) xmalloc (sizeof (arelent)); |
428d312b KR |
2642 | |
2643 | reloc->sym_ptr_ptr = &fixp->fx_addsy->bsym; | |
2644 | reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; | |
428d312b | 2645 | |
428d312b KR |
2646 | switch (fixp->fx_r_type) |
2647 | { | |
58d4951d | 2648 | case BFD_RELOC_16: |
428d312b KR |
2649 | case BFD_RELOC_32: |
2650 | case BFD_RELOC_HI22: | |
2651 | case BFD_RELOC_LO10: | |
2652 | case BFD_RELOC_32_PCREL_S2: | |
7ab2e983 | 2653 | case BFD_RELOC_SPARC13: |
428d312b | 2654 | case BFD_RELOC_SPARC_BASE13: |
a7aa7a2b ILT |
2655 | case BFD_RELOC_SPARC_WDISP16: |
2656 | case BFD_RELOC_SPARC_WDISP19: | |
ed9638af | 2657 | case BFD_RELOC_SPARC_WDISP22: |
693b21e7 | 2658 | case BFD_RELOC_64: |
8dd07a84 ILT |
2659 | case BFD_RELOC_SPARC_5: |
2660 | case BFD_RELOC_SPARC_6: | |
125f0b0d KR |
2661 | case BFD_RELOC_SPARC_10: |
2662 | case BFD_RELOC_SPARC_11: | |
2663 | case BFD_RELOC_SPARC_HH22: | |
2664 | case BFD_RELOC_SPARC_HM10: | |
2665 | case BFD_RELOC_SPARC_LM22: | |
2666 | case BFD_RELOC_SPARC_PC_HH22: | |
2667 | case BFD_RELOC_SPARC_PC_HM10: | |
2668 | case BFD_RELOC_SPARC_PC_LM22: | |
428d312b KR |
2669 | code = fixp->fx_r_type; |
2670 | break; | |
2671 | default: | |
2672 | abort (); | |
2673 | } | |
4c67b523 ILT |
2674 | |
2675 | #if defined (OBJ_ELF) || defined (OBJ_AOUT) | |
2676 | /* If we are generating PIC code, we need to generate a different | |
2677 | set of relocs. */ | |
2678 | ||
2679 | #ifdef OBJ_ELF | |
2680 | #define GOT_NAME "_GLOBAL_OFFSET_TABLE_" | |
2681 | #else | |
2682 | #define GOT_NAME "__GLOBAL_OFFSET_TABLE_" | |
2683 | #endif | |
2684 | ||
2685 | if (sparc_pic_code) | |
2686 | { | |
2687 | switch (code) | |
2688 | { | |
2689 | case BFD_RELOC_32_PCREL_S2: | |
2690 | if (! S_IS_DEFINED (fixp->fx_addsy) | |
9f6da653 | 2691 | || S_IS_COMMON (fixp->fx_addsy) |
21965655 ILT |
2692 | || S_IS_EXTERNAL (fixp->fx_addsy) |
2693 | || S_IS_WEAK (fixp->fx_addsy)) | |
4c67b523 ILT |
2694 | code = BFD_RELOC_SPARC_WPLT30; |
2695 | break; | |
2696 | case BFD_RELOC_HI22: | |
2697 | if (fixp->fx_addsy != NULL | |
2698 | && strcmp (S_GET_NAME (fixp->fx_addsy), GOT_NAME) == 0) | |
2699 | code = BFD_RELOC_SPARC_PC22; | |
2700 | else | |
2701 | code = BFD_RELOC_SPARC_GOT22; | |
2702 | break; | |
2703 | case BFD_RELOC_LO10: | |
2704 | if (fixp->fx_addsy != NULL | |
2705 | && strcmp (S_GET_NAME (fixp->fx_addsy), GOT_NAME) == 0) | |
2706 | code = BFD_RELOC_SPARC_PC10; | |
2707 | else | |
2708 | code = BFD_RELOC_SPARC_GOT10; | |
2709 | break; | |
2710 | case BFD_RELOC_SPARC13: | |
2711 | code = BFD_RELOC_SPARC_GOT13; | |
2712 | break; | |
2713 | default: | |
2714 | break; | |
2715 | } | |
2716 | } | |
2717 | #endif /* defined (OBJ_ELF) || defined (OBJ_AOUT) */ | |
2718 | ||
428d312b | 2719 | reloc->howto = bfd_reloc_type_lookup (stdoutput, code); |
a7129c48 KR |
2720 | if (reloc->howto == 0) |
2721 | { | |
2722 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
ade614d5 KR |
2723 | "internal error: can't export reloc type %d (`%s')", |
2724 | fixp->fx_r_type, bfd_get_reloc_code_name (code)); | |
a7129c48 KR |
2725 | return 0; |
2726 | } | |
c999fd9f KR |
2727 | |
2728 | /* @@ Why fx_addnumber sometimes and fx_offset other times? */ | |
a7aa7a2b ILT |
2729 | #ifdef OBJ_AOUT |
2730 | ||
4c67b523 ILT |
2731 | if (reloc->howto->pc_relative == 0 |
2732 | || code == BFD_RELOC_SPARC_PC10 | |
2733 | || code == BFD_RELOC_SPARC_PC22) | |
a7aa7a2b ILT |
2734 | reloc->addend = fixp->fx_addnumber; |
2735 | else | |
2736 | reloc->addend = fixp->fx_offset - reloc->address; | |
2737 | ||
2738 | #else /* elf or coff */ | |
2739 | ||
4c67b523 ILT |
2740 | if (reloc->howto->pc_relative == 0 |
2741 | || code == BFD_RELOC_SPARC_PC10 | |
2742 | || code == BFD_RELOC_SPARC_PC22) | |
c999fd9f | 2743 | reloc->addend = fixp->fx_addnumber; |
7ab2e983 ILT |
2744 | else if ((fixp->fx_addsy->bsym->flags & BSF_SECTION_SYM) != 0) |
2745 | reloc->addend = (section->vma | |
2746 | + fixp->fx_addnumber | |
2747 | + md_pcrel_from (fixp)); | |
c999fd9f | 2748 | else |
a7aa7a2b | 2749 | reloc->addend = fixp->fx_offset; |
a7aa7a2b | 2750 | #endif |
428d312b KR |
2751 | |
2752 | return reloc; | |
2753 | } | |
2754 | ||
fecd2382 RP |
2755 | |
2756 | #if 0 | |
2757 | /* for debugging only */ | |
355afbcd KR |
2758 | static void |
2759 | print_insn (insn) | |
2760 | struct sparc_it *insn; | |
fecd2382 | 2761 | { |
c999fd9f | 2762 | const char *const Reloc[] = { |
355afbcd KR |
2763 | "RELOC_8", |
2764 | "RELOC_16", | |
2765 | "RELOC_32", | |
2766 | "RELOC_DISP8", | |
2767 | "RELOC_DISP16", | |
2768 | "RELOC_DISP32", | |
2769 | "RELOC_WDISP30", | |
2770 | "RELOC_WDISP22", | |
2771 | "RELOC_HI22", | |
2772 | "RELOC_22", | |
2773 | "RELOC_13", | |
2774 | "RELOC_LO10", | |
2775 | "RELOC_SFA_BASE", | |
2776 | "RELOC_SFA_OFF13", | |
2777 | "RELOC_BASE10", | |
2778 | "RELOC_BASE13", | |
2779 | "RELOC_BASE22", | |
2780 | "RELOC_PC10", | |
2781 | "RELOC_PC22", | |
2782 | "RELOC_JMP_TBL", | |
2783 | "RELOC_SEGOFF16", | |
2784 | "RELOC_GLOB_DAT", | |
2785 | "RELOC_JMP_SLOT", | |
2786 | "RELOC_RELATIVE", | |
2787 | "NO_RELOC" | |
2788 | }; | |
2789 | ||
2790 | if (insn->error) | |
c999fd9f | 2791 | fprintf (stderr, "ERROR: %s\n"); |
355afbcd KR |
2792 | fprintf (stderr, "opcode=0x%08x\n", insn->opcode); |
2793 | fprintf (stderr, "reloc = %s\n", Reloc[insn->reloc]); | |
2794 | fprintf (stderr, "exp = {\n"); | |
2795 | fprintf (stderr, "\t\tX_add_symbol = %s\n", | |
2796 | ((insn->exp.X_add_symbol != NULL) | |
2797 | ? ((S_GET_NAME (insn->exp.X_add_symbol) != NULL) | |
2798 | ? S_GET_NAME (insn->exp.X_add_symbol) | |
2799 | : "???") | |
2800 | : "0")); | |
2801 | fprintf (stderr, "\t\tX_sub_symbol = %s\n", | |
5ac34ac3 ILT |
2802 | ((insn->exp.X_op_symbol != NULL) |
2803 | ? (S_GET_NAME (insn->exp.X_op_symbol) | |
2804 | ? S_GET_NAME (insn->exp.X_op_symbol) | |
355afbcd KR |
2805 | : "???") |
2806 | : "0")); | |
2807 | fprintf (stderr, "\t\tX_add_number = %d\n", | |
2808 | insn->exp.X_add_number); | |
2809 | fprintf (stderr, "}\n"); | |
c999fd9f | 2810 | } |
fecd2382 | 2811 | #endif |
f3d817d8 | 2812 | \f |
839df5c3 RP |
2813 | /* |
2814 | * md_parse_option | |
2815 | * Invocation line includes a switch not recognized by the base assembler. | |
2816 | * See if it's a processor-specific option. These are: | |
2817 | * | |
2818 | * -bump | |
2819 | * Warn on architecture bumps. See also -A. | |
2820 | * | |
e70ad5d5 DE |
2821 | * -Av6, -Av7, -Av8, -Av9, -Av9a, -Asparclite |
2822 | * -xarch=v8plus, -xarch=v8plusa | |
839df5c3 RP |
2823 | * Select the architecture. Instructions or features not |
2824 | * supported by the selected architecture cause fatal errors. | |
2825 | * | |
2826 | * The default is to start at v6, and bump the architecture up | |
e70ad5d5 DE |
2827 | * whenever an instruction is seen at a higher level. If 32 bit |
2828 | * environments, v9 is not bumped up to, the user must pass -Av9. | |
2829 | * | |
2830 | * -xarch=v8plus{,a} is for compatibility with the Sun assembler. | |
839df5c3 RP |
2831 | * |
2832 | * If -bump is specified, a warning is printing when bumping to | |
2833 | * higher levels. | |
2834 | * | |
2835 | * If an architecture is specified, all instructions must match | |
2836 | * that architecture. Any higher level instructions are flagged | |
e70ad5d5 DE |
2837 | * as errors. Note that in the 32 bit environment specifying |
2838 | * -Av9 does not automatically create a v9 object file, a v9 | |
2839 | * insn must be seen. | |
839df5c3 | 2840 | * |
6df07e7f | 2841 | * If both an architecture and -bump are specified, the |
839df5c3 | 2842 | * architecture starts at the specified level, but bumps are |
e70ad5d5 DE |
2843 | * warnings. Note that we can't set `current_architecture' to |
2844 | * the requested level in this case: in the 32 bit environment, | |
2845 | * we still must avoid creating v9 object files unless v9 insns | |
2846 | * are seen. | |
839df5c3 | 2847 | * |
162e3485 | 2848 | * Note: |
680227f3 KR |
2849 | * Bumping between incompatible architectures is always an |
2850 | * error. For example, from sparclite to v9. | |
839df5c3 | 2851 | */ |
162e3485 | 2852 | |
f3d817d8 | 2853 | #ifdef OBJ_ELF |
a7aa7a2b | 2854 | CONST char *md_shortopts = "A:K:VQ:sq"; |
f3d817d8 | 2855 | #else |
4c67b523 ILT |
2856 | #ifdef OBJ_AOUT |
2857 | CONST char *md_shortopts = "A:k"; | |
2858 | #else | |
f3d817d8 DM |
2859 | CONST char *md_shortopts = "A:"; |
2860 | #endif | |
4c67b523 | 2861 | #endif |
f3d817d8 DM |
2862 | struct option md_longopts[] = { |
2863 | #define OPTION_BUMP (OPTION_MD_BASE) | |
2864 | {"bump", no_argument, NULL, OPTION_BUMP}, | |
2865 | #define OPTION_SPARC (OPTION_MD_BASE + 1) | |
2866 | {"sparc", no_argument, NULL, OPTION_SPARC}, | |
e70ad5d5 DE |
2867 | #define OPTION_XARCH (OPTION_MD_BASE + 2) |
2868 | {"xarch", required_argument, NULL, OPTION_XARCH}, | |
2b063e6d ILT |
2869 | #ifdef SPARC_BIENDIAN |
2870 | #define OPTION_LITTLE_ENDIAN (OPTION_MD_BASE + 3) | |
2871 | {"EL", no_argument, NULL, OPTION_LITTLE_ENDIAN}, | |
2872 | #define OPTION_BIG_ENDIAN (OPTION_MD_BASE + 4) | |
2873 | {"EB", no_argument, NULL, OPTION_BIG_ENDIAN}, | |
2874 | #endif | |
2dffd20a | 2875 | #define OPTION_ENFORCE_ALIGNED_DATA (OPTION_MD_BASE + 5) |
2b063e6d | 2876 | {"enforce-aligned-data", no_argument, NULL, OPTION_ENFORCE_ALIGNED_DATA}, |
f3d817d8 DM |
2877 | {NULL, no_argument, NULL, 0} |
2878 | }; | |
2879 | size_t md_longopts_size = sizeof(md_longopts); | |
355afbcd | 2880 | |
f3d817d8 DM |
2881 | int |
2882 | md_parse_option (c, arg) | |
2883 | int c; | |
2884 | char *arg; | |
2885 | { | |
2886 | switch (c) | |
355afbcd | 2887 | { |
f3d817d8 | 2888 | case OPTION_BUMP: |
355afbcd | 2889 | warn_on_bump = 1; |
e70ad5d5 | 2890 | warn_after_architecture = SPARC_OPCODE_ARCH_V6; |
f3d817d8 | 2891 | break; |
355afbcd | 2892 | |
e70ad5d5 DE |
2893 | case OPTION_XARCH: |
2894 | /* ??? We could add v8plus and v8plusa to sparc_opcode_archs. | |
2895 | But we might want v8plus to mean something different than v9 | |
2896 | someday, and we'd recognize more -xarch options than Sun's | |
2897 | assembler does (which may lead to a conflict someday). */ | |
2898 | if (strcmp (arg, "v8plus") == 0) | |
2899 | arg = "v9"; | |
2900 | else if (strcmp (arg, "v8plusa") == 0) | |
2901 | arg = "v9a"; | |
2902 | else | |
2903 | { | |
2904 | as_bad ("invalid architecture -xarch=%s", arg); | |
2905 | return 0; | |
2906 | } | |
2907 | ||
2908 | /* fall through */ | |
2909 | ||
f3d817d8 DM |
2910 | case 'A': |
2911 | { | |
e70ad5d5 | 2912 | enum sparc_opcode_arch_val new_arch = sparc_opcode_lookup_arch (arg); |
f3d817d8 | 2913 | |
e70ad5d5 | 2914 | if (new_arch == SPARC_OPCODE_ARCH_BAD) |
f3d817d8 | 2915 | { |
e70ad5d5 | 2916 | as_bad ("invalid architecture -A%s", arg); |
f3d817d8 DM |
2917 | return 0; |
2918 | } | |
2919 | else | |
2920 | { | |
e70ad5d5 | 2921 | max_architecture = new_arch; |
f3d817d8 DM |
2922 | architecture_requested = 1; |
2923 | } | |
2924 | } | |
2925 | break; | |
2926 | ||
2927 | case OPTION_SPARC: | |
2928 | /* Ignore -sparc, used by SunOS make default .s.o rule. */ | |
2929 | break; | |
355afbcd | 2930 | |
2b063e6d ILT |
2931 | case OPTION_ENFORCE_ALIGNED_DATA: |
2932 | enforce_aligned_data = 1; | |
2933 | break; | |
2934 | ||
2935 | #ifdef SPARC_BIENDIAN | |
2936 | case OPTION_LITTLE_ENDIAN: | |
2937 | target_big_endian = 0; | |
2938 | break; | |
2939 | case OPTION_BIG_ENDIAN: | |
2940 | target_big_endian = 1; | |
2941 | break; | |
2942 | #endif | |
2943 | ||
4c67b523 ILT |
2944 | #ifdef OBJ_AOUT |
2945 | case 'k': | |
2946 | sparc_pic_code = 1; | |
2947 | break; | |
2948 | #endif | |
2949 | ||
ed9638af | 2950 | #ifdef OBJ_ELF |
f3d817d8 | 2951 | case 'V': |
ed9638af | 2952 | print_version_id (); |
f3d817d8 DM |
2953 | break; |
2954 | ||
2955 | case 'Q': | |
ed9638af KR |
2956 | /* Qy - do emit .comment |
2957 | Qn - do not emit .comment */ | |
f3d817d8 DM |
2958 | break; |
2959 | ||
2960 | case 's': | |
ed9638af | 2961 | /* use .stab instead of .stab.excl */ |
f3d817d8 DM |
2962 | break; |
2963 | ||
2964 | case 'q': | |
c06e55d9 | 2965 | /* quick -- native assembler does fewer checks */ |
f3d817d8 | 2966 | break; |
a7aa7a2b ILT |
2967 | |
2968 | case 'K': | |
2969 | if (strcmp (arg, "PIC") != 0) | |
2970 | as_warn ("Unrecognized option following -K"); | |
2971 | else | |
4c67b523 ILT |
2972 | sparc_pic_code = 1; |
2973 | break; | |
ed9638af | 2974 | #endif |
f3d817d8 DM |
2975 | |
2976 | default: | |
355afbcd KR |
2977 | return 0; |
2978 | } | |
fecd2382 | 2979 | |
e70ad5d5 | 2980 | return 1; |
f3d817d8 DM |
2981 | } |
2982 | ||
2983 | void | |
2984 | md_show_usage (stream) | |
2985 | FILE *stream; | |
2986 | { | |
e70ad5d5 DE |
2987 | const struct sparc_opcode_arch *arch; |
2988 | ||
5e0a90a8 | 2989 | fprintf(stream, "SPARC options:\n"); |
e70ad5d5 | 2990 | for (arch = &sparc_opcode_archs[0]; arch->name; arch++) |
5e0a90a8 | 2991 | { |
e70ad5d5 | 2992 | if (arch != &sparc_opcode_archs[0]) |
5e0a90a8 | 2993 | fprintf (stream, " | "); |
e70ad5d5 | 2994 | fprintf (stream, "-A%s", arch->name); |
5e0a90a8 | 2995 | } |
e70ad5d5 DE |
2996 | fprintf (stream, "\n-xarch=v8plus | -xarch=v8plusa\n"); |
2997 | fprintf (stream, "\ | |
f3d817d8 DM |
2998 | specify variant of SPARC architecture\n\ |
2999 | -bump warn when assembler switches architectures\n\ | |
590c50d8 | 3000 | -sparc ignored\n\ |
2b063e6d | 3001 | --enforce-aligned-data force .long, etc., to be aligned correctly\n"); |
4c67b523 ILT |
3002 | #ifdef OBJ_AOUT |
3003 | fprintf (stream, "\ | |
3004 | -k generate PIC\n"); | |
3005 | #endif | |
f3d817d8 | 3006 | #ifdef OBJ_ELF |
4c67b523 ILT |
3007 | fprintf (stream, "\ |
3008 | -KPIC generate PIC\n\ | |
f3d817d8 DM |
3009 | -V print assembler version number\n\ |
3010 | -q ignored\n\ | |
3011 | -Qy, -Qn ignored\n\ | |
3012 | -s ignored\n"); | |
3013 | #endif | |
2b063e6d ILT |
3014 | #ifdef SPARC_BIENDIAN |
3015 | fprintf (stream, "\ | |
3016 | -EL generate code for a little endian machine\n\ | |
3017 | -EB generate code for a big endian machine\n"); | |
3018 | #endif | |
f3d817d8 DM |
3019 | } |
3020 | \f | |
fecd2382 RP |
3021 | /* We have no need to default values of symbols. */ |
3022 | ||
3023 | /* ARGSUSED */ | |
355afbcd KR |
3024 | symbolS * |
3025 | md_undefined_symbol (name) | |
3026 | char *name; | |
fecd2382 | 3027 | { |
355afbcd KR |
3028 | return 0; |
3029 | } /* md_undefined_symbol() */ | |
fecd2382 | 3030 | |
fecd2382 | 3031 | /* Round up a section size to the appropriate boundary. */ |
125f0b0d | 3032 | valueT |
355afbcd KR |
3033 | md_section_align (segment, size) |
3034 | segT segment; | |
125f0b0d | 3035 | valueT size; |
fecd2382 | 3036 | { |
f9c57637 ILT |
3037 | #ifndef OBJ_ELF |
3038 | /* This is not right for ELF; a.out wants it, and COFF will force | |
3039 | the alignment anyways. */ | |
a7aa7a2b ILT |
3040 | valueT align = ((valueT) 1 |
3041 | << (valueT) bfd_get_section_alignment (stdoutput, segment)); | |
f9c57637 ILT |
3042 | valueT newsize; |
3043 | /* turn alignment value into a mask */ | |
3044 | align--; | |
3045 | newsize = (size + align) & ~align; | |
3046 | return newsize; | |
3047 | #else | |
693b21e7 | 3048 | return size; |
f9c57637 | 3049 | #endif |
428d312b | 3050 | } |
fecd2382 RP |
3051 | |
3052 | /* Exactly what point is a PC-relative offset relative TO? | |
3053 | On the sparc, they're relative to the address of the offset, plus | |
3054 | its size. This gets us to the following instruction. | |
3055 | (??? Is this right? FIXME-SOON) */ | |
355afbcd KR |
3056 | long |
3057 | md_pcrel_from (fixP) | |
3058 | fixS *fixP; | |
fecd2382 | 3059 | { |
4c67b523 ILT |
3060 | long ret; |
3061 | ||
3062 | ret = fixP->fx_where + fixP->fx_frag->fr_address; | |
3063 | if (! sparc_pic_code | |
3064 | || fixP->fx_addsy == NULL | |
3065 | || (fixP->fx_addsy->bsym->flags & BSF_SECTION_SYM) != 0) | |
3066 | ret += fixP->fx_size; | |
3067 | return ret; | |
428d312b | 3068 | } |
fecd2382 | 3069 | |
8b228fe9 | 3070 | /* end of tc-sparc.c */ |