* config/tc-cris.c (md_estimate_size_before_relax) <case
[deliverable/binutils-gdb.git] / gas / config / tc-tahoe.c
CommitLineData
f7e42eb4 1/* This file is tc-tahoe.c
252b5132 2
f7e42eb4
NC
3 Copyright 1987, 1988, 1989, 1990, 1991, 1992, 1995, 2000
4 Free Software Foundation, Inc.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
20 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
21 02111-1307, USA. */
252b5132
RH
22#include "as.h"
23#include "obstack.h"
24
f7e42eb4 25/* This bit glommed from tahoe-inst.h. */
252b5132
RH
26
27typedef unsigned char byte;
28typedef byte tahoe_opcodeT;
29
f7e42eb4
NC
30/* This is part of tahoe-ins-parse.c & friends.
31 We want to parse a tahoe instruction text into a tree defined here. */
252b5132
RH
32
33#define TIT_MAX_OPERANDS (4) /* maximum number of operands in one
34 single tahoe instruction */
35
36struct top /* tahoe instruction operand */
f7e42eb4
NC
37 {
38 int top_ndx; /* -1, or index register. eg 7=[R7] */
39 int top_reg; /* -1, or register number. eg 7 = R7 or (R7) */
40 byte top_mode; /* Addressing mode byte. This byte, defines
a4d24084 41 which of the 11 modes opcode is. */
252b5132 42
f7e42eb4 43 char top_access; /* Access type wanted for this opperand
252b5132 44 'b'branch ' 'no-instruction 'amrvw' */
f7e42eb4 45 char top_width; /* Operand width expected, one of "bwlq?-:!" */
252b5132 46
f7e42eb4 47 char * top_error; /* Say if operand is inappropriate */
252b5132 48
f7e42eb4 49 segT seg_of_operand; /* segment as returned by expression()*/
252b5132 50
f7e42eb4 51 expressionS exp_of_operand; /* The expression as parsed by expression()*/
252b5132 52
f7e42eb4 53 byte top_dispsize; /* Number of bytes in the displacement if we
252b5132 54 can figure it out */
f7e42eb4 55 };
252b5132
RH
56
57/* The addressing modes for an operand. These numbers are the acutal values
a4d24084 58 for certain modes, so be carefull if you screw with them. */
252b5132
RH
59#define TAHOE_DIRECT_REG (0x50)
60#define TAHOE_REG_DEFERRED (0x60)
61
62#define TAHOE_REG_DISP (0xE0)
63#define TAHOE_REG_DISP_DEFERRED (0xF0)
64
65#define TAHOE_IMMEDIATE (0x8F)
66#define TAHOE_IMMEDIATE_BYTE (0x88)
67#define TAHOE_IMMEDIATE_WORD (0x89)
68#define TAHOE_IMMEDIATE_LONGWORD (0x8F)
69#define TAHOE_ABSOLUTE_ADDR (0x9F)
70
71#define TAHOE_DISPLACED_RELATIVE (0xEF)
72#define TAHOE_DISP_REL_DEFERRED (0xFF)
73
74#define TAHOE_AUTO_DEC (0x7E)
75#define TAHOE_AUTO_INC (0x8E)
76#define TAHOE_AUTO_INC_DEFERRED (0x9E)
f7e42eb4 77/* INDEXED_REG is decided by the existance or lack of a [reg]. */
252b5132
RH
78
79/* These are encoded into top_width when top_access=='b'
f7e42eb4 80 and it's a psuedo op. */
252b5132
RH
81#define TAHOE_WIDTH_ALWAYS_JUMP '-'
82#define TAHOE_WIDTH_CONDITIONAL_JUMP '?'
83#define TAHOE_WIDTH_BIG_REV_JUMP '!'
84#define TAHOE_WIDTH_BIG_NON_REV_JUMP ':'
85
86/* The hex code for certain tahoe commands and modes.
a4d24084 87 This is just for readability. */
252b5132
RH
88#define TAHOE_JMP (0x71)
89#define TAHOE_PC_REL_LONG (0xEF)
90#define TAHOE_BRB (0x11)
91#define TAHOE_BRW (0x13)
92/* These, when 'ored' with, or added to, a register number,
a4d24084 93 set up the number for the displacement mode. */
252b5132
RH
94#define TAHOE_PC_OR_BYTE (0xA0)
95#define TAHOE_PC_OR_WORD (0xC0)
96#define TAHOE_PC_OR_LONG (0xE0)
97
f7e42eb4
NC
98struct tit /* Get it out of the sewer, it stands for
99 tahoe instruction tree (Geeze!). */
252b5132 100{
a4d24084
KH
101 tahoe_opcodeT tit_opcode; /* The opcode. */
102 byte tit_operands; /* How many operands are here. */
252b5132
RH
103 struct top tit_operand[TIT_MAX_OPERANDS]; /* Operands */
104 char *tit_error; /* "" or fatal error text */
105};
106
107/* end: tahoe-inst.h */
108
109/* tahoe.c - tahoe-specific -
110 Not part of gas yet.
111 */
112
113#include "opcode/tahoe.h"
114
115/* This is the number to put at the beginning of the a.out file */
116long omagic = OMAGIC;
117
118/* These chars start a comment anywhere in a source file (except inside
a4d24084 119 another comment or a quoted string. */
252b5132
RH
120const char comment_chars[] = "#;";
121
a4d24084 122/* These chars only start a comment at the beginning of a line. */
252b5132
RH
123const char line_comment_chars[] = "#";
124
125/* Chars that can be used to separate mant from exp in floating point nums */
126const char EXP_CHARS[] = "eE";
127
128/* Chars that mean this number is a floating point constant
129 as in 0f123.456
130 or 0d1.234E-12 (see exp chars above)
131 Note: The Tahoe port doesn't support floating point constants. This is
a4d24084 132 consistant with 'as' If it's needed, I can always add it later. */
252b5132
RH
133const char FLT_CHARS[] = "df";
134
135/* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be
136 changed in read.c . Ideally it shouldn't have to know about it at all,
137 but nothing is ideal around here.
138 (The tahoe has plenty of room, so the change currently isn't needed.)
139 */
140
a4d24084 141static struct tit t; /* A tahoe instruction after decoding. */
252b5132
RH
142
143void float_cons ();
144/* A table of pseudo ops (sans .), the function called, and an integer op
a4d24084 145 that the function is called with. */
252b5132
RH
146
147const pseudo_typeS md_pseudo_table[] =
148{
149 {"dfloat", float_cons, 'd'},
150 {"ffloat", float_cons, 'f'},
151 {0}
152};
153\f
154/*
155 * For Tahoe, relative addresses of "just the right length" are pretty easy.
156 * The branch displacement is always the last operand, even in
157 * synthetic instructions.
158 * For Tahoe, we encode the relax_substateTs (in e.g. fr_substate) as:
159 *
160 * 4 3 2 1 0 bit number
161 * ---/ /--+-------+-------+-------+-------+-------+
162 * | what state ? | how long ? |
163 * ---/ /--+-------+-------+-------+-------+-------+
164 *
165 * The "how long" bits are 00=byte, 01=word, 10=long.
166 * This is a Un*x convention.
167 * Not all lengths are legit for a given value of (what state).
168 * The four states are listed below.
169 * The "how long" refers merely to the displacement length.
170 * The address usually has some constant bytes in it as well.
171 *
172
173States for Tahoe address relaxing.
1741. TAHOE_WIDTH_ALWAYS_JUMP (-)
175 Format: "b-"
176 Tahoe opcodes are: (Hex)
177 jr 11
178 jbr 11
179 Simple branch.
180 Always, 1 byte opcode, then displacement/absolute.
181 If word or longword, change opcode to brw or jmp.
182
252b5132
RH
1832. TAHOE_WIDTH_CONDITIONAL_JUMP (?)
184 J<cond> where <cond> is a simple flag test.
185 Format: "b?"
186 Tahoe opcodes are: (Hex)
187 jneq/jnequ 21
188 jeql/jeqlu 31
189 jgtr 41
190 jleq 51
191 jgeq 81
192 jlss 91
193 jgtru a1
194 jlequ b1
195 jvc c1
196 jvs d1
197 jlssu/jcs e1
198 jgequ/jcc f1
199 Always, you complement 4th bit to reverse the condition.
200 Always, 1-byte opcode, then 1-byte displacement.
201
2023. TAHOE_WIDTH_BIG_REV_JUMP (!)
203 Jbc/Jbs where cond tests a memory bit.
204 Format: "rlvlb!"
205 Tahoe opcodes are: (Hex)
206 jbs 0e
207 jbc 1e
208 Always, you complement 4th bit to reverse the condition.
209 Always, 1-byte opcde, longword, longword-address, 1-word-displacement
210
2114. TAHOE_WIDTH_BIG_NON_REV_JUMP (:)
212 JaoblXX/Jbssi
213 Format: "rlmlb:"
214 Tahoe opcodes are: (Hex)
215 aojlss 2f
216 jaoblss 2f
217 aojleq 3f
218 jaobleq 3f
219 jbssi 5f
220 Always, we cannot reverse the sense of the branch; we have a word
221 displacement.
222
223We need to modify the opcode is for class 1, 2 and 3 instructions.
224After relax() we may complement the 4th bit of 2 or 3 to reverse sense of
225branch.
226
227We sometimes store context in the operand literal. This way we can figure out
228after relax() what the original addressing mode was. (Was is pc_rel, or
229pc_rel_disp? That sort of thing.) */
230\f
231/* These displacements are relative to the START address of the
232 displacement which is at the start of the displacement, not the end of
233 the instruction. The hardware pc_rel is at the end of the instructions.
234 That's why all the displacements have the length of the displacement added
235 to them. (WF + length(word))
236
237 The first letter is Byte, Word.
a4d24084 238 2nd letter is Forward, Backward. */
252b5132
RH
239#define BF (1+ 127)
240#define BB (1+-128)
241#define WF (2+ 32767)
242#define WB (2+-32768)
243/* Dont need LF, LB because they always reach. [They are coded as 0.] */
244
245#define C(a,b) ENCODE_RELAX(a,b)
a4d24084 246/* This macro has no side-effects. */
252b5132
RH
247#define ENCODE_RELAX(what,length) (((what) << 2) + (length))
248#define RELAX_STATE(what) ((what) >> 2)
249#define RELAX_LENGTH(length) ((length) && 3)
250
251#define STATE_ALWAYS_BRANCH (1)
252#define STATE_CONDITIONAL_BRANCH (2)
253#define STATE_BIG_REV_BRANCH (3)
254#define STATE_BIG_NON_REV_BRANCH (4)
255#define STATE_PC_RELATIVE (5)
256
257#define STATE_BYTE (0)
258#define STATE_WORD (1)
259#define STATE_LONG (2)
260#define STATE_UNDF (3) /* Symbol undefined in pass1 */
261
262/* This is the table used by gas to figure out relaxing modes. The fields are
263 forward_branch reach, backward_branch reach, number of bytes it would take,
a4d24084 264 where the next biggest branch is. */
252b5132
RH
265const relax_typeS md_relax_table[] =
266{
267 {
268 1, 1, 0, 0
269 }, /* error sentinel 0,0 */
270 {
271 1, 1, 0, 0
272 }, /* unused 0,1 */
273 {
274 1, 1, 0, 0
275 }, /* unused 0,2 */
276 {
277 1, 1, 0, 0
278 }, /* unused 0,3 */
279/* Unconditional branch cases "jrb"
280 The relax part is the actual displacement */
281 {
282 BF, BB, 1, C (1, 1)
283 }, /* brb B`foo 1,0 */
284 {
285 WF, WB, 2, C (1, 2)
286 }, /* brw W`foo 1,1 */
287 {
288 0, 0, 5, 0
289 }, /* Jmp L`foo 1,2 */
290 {
291 1, 1, 0, 0
292 }, /* unused 1,3 */
293/* Reversible Conditional Branch. If the branch won't reach, reverse
294 it, and jump over a brw or a jmp that will reach. The relax part is the
a4d24084 295 actual address. */
252b5132
RH
296 {
297 BF, BB, 1, C (2, 1)
298 }, /* b<cond> B`foo 2,0 */
299 {
300 WF + 2, WB + 2, 4, C (2, 2)
301 }, /* brev over, brw W`foo, over: 2,1 */
302 {
303 0, 0, 7, 0
304 }, /* brev over, jmp L`foo, over: 2,2 */
305 {
306 1, 1, 0, 0
307 }, /* unused 2,3 */
308/* Another type of reversable branch. But this only has a word
a4d24084 309 displacement. */
252b5132
RH
310 {
311 1, 1, 0, 0
312 }, /* unused 3,0 */
313 {
314 WF, WB, 2, C (3, 2)
315 }, /* jbX W`foo 3,1 */
316 {
317 0, 0, 8, 0
318 }, /* jrevX over, jmp L`foo, over: 3,2 */
319 {
320 1, 1, 0, 0
321 }, /* unused 3,3 */
322/* These are the non reversable branches, all of which have a word
323 displacement. If I can't reach, branch over a byte branch, to a
324 jump that will reach. The jumped branch jumps over the reaching
325 branch, to continue with the flow of the program. It's like playing
a4d24084 326 leap frog. */
252b5132
RH
327 {
328 1, 1, 0, 0
329 }, /* unused 4,0 */
330 {
331 WF, WB, 2, C (4, 2)
332 }, /* aobl_ W`foo 4,1 */
333 {
334 0, 0, 10, 0
335 }, /*aobl_ W`hop,br over,hop: jmp L^foo,over 4,2*/
336 {
337 1, 1, 0, 0
338 }, /* unused 4,3 */
339/* Normal displacement mode, no jumping or anything like that.
340 The relax points to one byte before the address, thats why all
a4d24084 341 the numbers are up by one. */
252b5132
RH
342 {
343 BF + 1, BB + 1, 2, C (5, 1)
344 }, /* B^"foo" 5,0 */
345 {
346 WF + 1, WB + 1, 3, C (5, 2)
347 }, /* W^"foo" 5,1 */
348 {
349 0, 0, 5, 0
350 }, /* L^"foo" 5,2 */
351 {
352 1, 1, 0, 0
353 }, /* unused 5,3 */
354};
355
356#undef C
357#undef BF
358#undef BB
359#undef WF
360#undef WB
361/* End relax stuff */
362\f
363/* Handle of the OPCODE hash table. NULL means any use before
364 md_begin() will crash. */
365static struct hash_control *op_hash;
366
a4d24084 367/* Init function. Build the hash table. */
252b5132
RH
368void
369md_begin ()
370{
371 struct tot *tP;
372 char *errorval = 0;
a4d24084 373 int synthetic_too = 1; /* If 0, just use real opcodes. */
252b5132
RH
374
375 op_hash = hash_new ();
376
377 for (tP = totstrs; *tP->name && !errorval; tP++)
378 errorval = hash_insert (op_hash, tP->name, &tP->detail);
379
380 if (synthetic_too)
381 for (tP = synthetic_totstrs; *tP->name && !errorval; tP++)
382 errorval = hash_insert (op_hash, tP->name, &tP->detail);
383
384 if (errorval)
385 as_fatal (errorval);
386}
387\f
388CONST char *md_shortopts = "ad:STt:V";
389struct option md_longopts[] = {
390 {NULL, no_argument, NULL, 0}
391};
bc805888 392size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH
393
394int
395md_parse_option (c, arg)
396 int c;
397 char *arg;
398{
399 switch (c)
400 {
401 case 'a':
402 as_warn (_("The -a option doesn't exist. (Despite what the man page says!"));
403 break;
404
405 case 'd':
406 as_warn (_("Displacement length %s ignored!"), arg);
407 break;
408
409 case 'S':
410 as_warn (_("SYMBOL TABLE not implemented"));
411 break;
412
413 case 'T':
414 as_warn (_("TOKEN TRACE not implemented"));
415 break;
416
417 case 't':
418 as_warn (_("I don't need or use temp. file \"%s\"."), arg);
419 break;
420
421 case 'V':
422 as_warn (_("I don't use an interpass file! -V ignored"));
423 break;
424
425 default:
426 return 0;
427 }
428
429 return 1;
430}
431
432void
433md_show_usage (stream)
434 FILE *stream;
435{
bc805888 436 fprintf (stream, _("\
252b5132
RH
437Tahoe options:\n\
438-a ignored\n\
439-d LENGTH ignored\n\
440-J ignored\n\
441-S ignored\n\
442-t FILE ignored\n\
443-T ignored\n\
444-V ignored\n"));
445}
446\f
447/* The functions in this section take numbers in the machine format, and
448 munges them into Tahoe byte order.
a4d24084
KH
449 They exist primarily for cross assembly purpose. */
450void /* Knows about order of bytes in address. */
252b5132 451md_number_to_chars (con, value, nbytes)
a4d24084
KH
452 char con[]; /* Return 'nbytes' of chars here. */
453 valueT value; /* The value of the bits. */
454 int nbytes; /* Number of bytes in the output. */
252b5132
RH
455{
456 number_to_chars_bigendian (con, value, nbytes);
457}
458
459#ifdef comment
a4d24084 460void /* Knows about order of bytes in address. */
252b5132 461md_number_to_imm (con, value, nbytes)
a4d24084
KH
462 char con[]; /* Return 'nbytes' of chars here. */
463 long int value; /* The value of the bits. */
464 int nbytes; /* Number of bytes in the output. */
252b5132
RH
465{
466 md_number_to_chars (con, value, nbytes);
467}
468
469#endif /* comment */
470
471void
472tc_apply_fix (fixP, val)
473 fixS *fixP;
474 long val;
475{
476 /* should never be called */
477 know (0);
478}
479
a4d24084 480void /* Knows about order of bytes in address. */
252b5132 481md_number_to_disp (con, value, nbytes)
a4d24084
KH
482 char con[]; /* Return 'nbytes' of chars here. */
483 long int value; /* The value of the bits. */
484 int nbytes; /* Number of bytes in the output. */
252b5132
RH
485{
486 md_number_to_chars (con, value, nbytes);
487}
488
a4d24084 489void /* Knows about order of bytes in address. */
252b5132 490md_number_to_field (con, value, nbytes)
a4d24084
KH
491 char con[]; /* Return 'nbytes' of chars here. */
492 long int value; /* The value of the bits. */
493 int nbytes; /* Number of bytes in the output. */
252b5132
RH
494{
495 md_number_to_chars (con, value, nbytes);
496}
497
498/* Put the bits in an order that a tahoe will understand, despite the ordering
499 of the native machine.
500 On Tahoe: first 4 bytes are normal unsigned big endian long,
501 next three bytes are symbolnum, in kind of 3 byte big endian (least sig. byte last).
502 The last byte is broken up with bit 7 as pcrel,
503 bits 6 & 5 as length,
a4d24084 504 bit 4 as extern and the last nibble as 'undefined'. */
252b5132
RH
505
506#if comment
507void
508md_ri_to_chars (ri_p, ri)
509 struct relocation_info *ri_p, ri;
510{
511 byte the_bytes[sizeof (struct relocation_info)];
512 /* The reason I can't just encode these directly into ri_p is that
a4d24084 513 ri_p may point to ri. */
252b5132
RH
514
515 /* This is easy */
516 md_number_to_chars (the_bytes, ri.r_address, sizeof (ri.r_address));
517
518 /* now the fun stuff */
519 the_bytes[4] = (ri.r_symbolnum >> 16) & 0x0ff;
520 the_bytes[5] = (ri.r_symbolnum >> 8) & 0x0ff;
521 the_bytes[6] = ri.r_symbolnum & 0x0ff;
522 the_bytes[7] = (((ri.r_extern << 4) & 0x10) | ((ri.r_length << 5) & 0x60) |
523 ((ri.r_pcrel << 7) & 0x80)) & 0xf0;
524
525 bcopy (the_bytes, (char *) ri_p, sizeof (struct relocation_info));
526}
527
528#endif /* comment */
529
530/* Put the bits in an order that a tahoe will understand, despite the ordering
531 of the native machine.
532 On Tahoe: first 4 bytes are normal unsigned big endian long,
533 next three bytes are symbolnum, in kind of 3 byte big endian (least sig. byte last).
534 The last byte is broken up with bit 7 as pcrel,
535 bits 6 & 5 as length,
a4d24084 536 bit 4 as extern and the last nibble as 'undefined'. */
252b5132 537
a4d24084 538void
252b5132
RH
539tc_aout_fix_to_chars (where, fixP, segment_address_in_file)
540 char *where;
541 fixS *fixP;
542 relax_addressT segment_address_in_file;
543{
544 long r_symbolnum;
545
546 know (fixP->fx_addsy != NULL);
547
548 md_number_to_chars (where,
549 fixP->fx_frag->fr_address + fixP->fx_where - segment_address_in_file,
550 4);
551
552 r_symbolnum = (S_IS_DEFINED (fixP->fx_addsy)
553 ? S_GET_TYPE (fixP->fx_addsy)
554 : fixP->fx_addsy->sy_number);
555
556 where[4] = (r_symbolnum >> 16) & 0x0ff;
557 where[5] = (r_symbolnum >> 8) & 0x0ff;
558 where[6] = r_symbolnum & 0x0ff;
559 where[7] = (((is_pcrel (fixP) << 7) & 0x80)
560 | ((((fixP->fx_type == FX_8 || fixP->fx_type == FX_PCREL8
561 ? 0
562 : (fixP->fx_type == FX_16 || fixP->fx_type == FX_PCREL16
563 ? 1
564 : (fixP->fx_type == FX_32 || fixP->fx_type == FX_PCREL32
565 ? 2
566 : 42)))) << 5) & 0x60)
567 | ((!S_IS_DEFINED (fixP->fx_addsy) << 4) & 0x10));
568}
569
570/* Relocate byte stuff */
571\f
a4d24084 572/* This is for broken word. */
252b5132
RH
573const int md_short_jump_size = 3;
574
575void
576md_create_short_jump (ptr, from_addr, to_addr, frag, to_symbol)
577 char *ptr;
578 addressT from_addr, to_addr;
579 fragS *frag;
580 symbolS *to_symbol;
581{
582 valueT offset;
583
584 offset = to_addr - (from_addr + 1);
585 *ptr++ = TAHOE_BRW;
586 md_number_to_chars (ptr, offset, 2);
587}
588
589const int md_long_jump_size = 6;
590const int md_reloc_size = 8; /* Size of relocation record */
591
592void
593md_create_long_jump (ptr, from_addr, to_addr, frag, to_symbol)
594 char *ptr;
595 addressT from_addr, to_addr;
596 fragS *frag;
597 symbolS *to_symbol;
598{
599 valueT offset;
600
601 offset = to_addr - (from_addr + 4);
602 *ptr++ = TAHOE_JMP;
603 *ptr++ = TAHOE_PC_REL_LONG;
604 md_number_to_chars (ptr, offset, 4);
605}
606\f
607/*
608 * md_estimate_size_before_relax()
609 *
610 * Called just before relax().
611 * Any symbol that is now undefined will not become defined, so we assumed
612 * that it will be resolved by the linker.
613 * Return the correct fr_subtype in the frag, for relax()
614 * Return the initial "guess for fr_var" to caller. (How big I think this
615 * will be.)
616 * The guess for fr_var is ACTUALLY the growth beyond fr_fix.
617 * Whatever we do to grow fr_fix or fr_var contributes to our returned value.
618 * Although it may not be explicit in the frag, pretend fr_var starts with a
619 * 0 value.
620 */
621int
622md_estimate_size_before_relax (fragP, segment_type)
623 register fragS *fragP;
a4d24084 624 segT segment_type; /* N_DATA or N_TEXT. */
252b5132
RH
625{
626 register char *p;
627 register int old_fr_fix;
628 /* int pc_rel; FIXME: remove this */
629
630 old_fr_fix = fragP->fr_fix;
631 switch (fragP->fr_subtype)
632 {
633 case ENCODE_RELAX (STATE_PC_RELATIVE, STATE_UNDF):
634 if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type)
635 {
636 /* The symbol was in the same segment as the opcode, and it's
a4d24084 637 a real pc_rel case so it's a relaxable case. */
252b5132
RH
638 fragP->fr_subtype = ENCODE_RELAX (STATE_PC_RELATIVE, STATE_BYTE);
639 }
640 else
641 {
642 /* This case is still undefined, so asume it's a long word for the
a4d24084 643 linker to fix. */
252b5132
RH
644 p = fragP->fr_literal + old_fr_fix;
645 *p |= TAHOE_PC_OR_LONG;
a4d24084 646 /* We now know how big it will be, one long word. */
252b5132
RH
647 fragP->fr_fix += 1 + 4;
648 fix_new (fragP, old_fr_fix + 1, fragP->fr_symbol,
649 fragP->fr_offset, FX_PCREL32, NULL);
650 frag_wane (fragP);
651 }
652 break;
653
654 case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_UNDF):
655 if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type)
656 {
657 fragP->fr_subtype = ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_BYTE);
658 }
659 else
660 {
661 p = fragP->fr_literal + old_fr_fix;
a4d24084 662 *fragP->fr_opcode ^= 0x10; /* Reverse sense of branch. */
252b5132
RH
663 *p++ = 6;
664 *p++ = TAHOE_JMP;
665 *p++ = TAHOE_PC_REL_LONG;
666 fragP->fr_fix += 1 + 1 + 1 + 4;
667 fix_new (fragP, old_fr_fix + 3, fragP->fr_symbol,
668 fragP->fr_offset, FX_PCREL32, NULL);
669 frag_wane (fragP);
670 }
671 break;
672
673 case ENCODE_RELAX (STATE_BIG_REV_BRANCH, STATE_UNDF):
674 if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type)
675 {
676 fragP->fr_subtype =
677 ENCODE_RELAX (STATE_BIG_REV_BRANCH, STATE_WORD);
678 }
679 else
680 {
681 p = fragP->fr_literal + old_fr_fix;
a4d24084 682 *fragP->fr_opcode ^= 0x10; /* Reverse sense of branch. */
252b5132
RH
683 *p++ = 0;
684 *p++ = 6;
685 *p++ = TAHOE_JMP;
686 *p++ = TAHOE_PC_REL_LONG;
687 fragP->fr_fix += 2 + 2 + 4;
688 fix_new (fragP, old_fr_fix + 4, fragP->fr_symbol,
689 fragP->fr_offset, FX_PCREL32, NULL);
690 frag_wane (fragP);
691 }
692 break;
693
694 case ENCODE_RELAX (STATE_BIG_NON_REV_BRANCH, STATE_UNDF):
695 if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type)
696 {
697 fragP->fr_subtype = ENCODE_RELAX (STATE_BIG_NON_REV_BRANCH, STATE_WORD);
698 }
699 else
700 {
701 p = fragP->fr_literal + old_fr_fix;
702 *p++ = 2;
703 *p++ = 0;
704 *p++ = TAHOE_BRB;
705 *p++ = 6;
706 *p++ = TAHOE_JMP;
707 *p++ = TAHOE_PC_REL_LONG;
708 fragP->fr_fix += 2 + 2 + 2 + 4;
709 fix_new (fragP, old_fr_fix + 6, fragP->fr_symbol,
710 fragP->fr_offset, FX_PCREL32, NULL);
711 frag_wane (fragP);
712 }
713 break;
714
715 case ENCODE_RELAX (STATE_ALWAYS_BRANCH, STATE_UNDF):
716 if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type)
717 {
718 fragP->fr_subtype = ENCODE_RELAX (STATE_ALWAYS_BRANCH, STATE_BYTE);
719 }
720 else
721 {
722 p = fragP->fr_literal + old_fr_fix;
723 *fragP->fr_opcode = TAHOE_JMP;
724 *p++ = TAHOE_PC_REL_LONG;
725 fragP->fr_fix += 1 + 4;
726 fix_new (fragP, old_fr_fix + 1, fragP->fr_symbol,
727 fragP->fr_offset, FX_PCREL32, NULL);
728 frag_wane (fragP);
729 }
730 break;
731
732 default:
733 break;
734 }
735 return (fragP->fr_var + fragP->fr_fix - old_fr_fix);
736} /* md_estimate_size_before_relax() */
737\f
738/*
739 * md_convert_frag();
740 *
741 * Called after relax() is finished.
742 * In: Address of frag.
743 * fr_type == rs_machine_dependent.
744 * fr_subtype is what the address relaxed to.
745 *
746 * Out: Any fixSs and constants are set up.
747 * Caller will turn frag into a ".space 0".
748 */
749void
750md_convert_frag (headers, seg, fragP)
751 object_headers *headers;
752 segT seg;
753 register fragS *fragP;
754{
a4d24084
KH
755 register char *addressP; /* -> _var to change. */
756 register char *opcodeP; /* -> opcode char(s) to change. */
252b5132
RH
757 register short int length_code; /* 2=long 1=word 0=byte */
758 register short int extension = 0; /* Size of relaxed address.
a4d24084 759 Added to fr_fix: incl. ALL var chars. */
252b5132
RH
760 register symbolS *symbolP;
761 register long int where;
762 register long int address_of_var;
763 /* Where, in file space, is _var of *fragP? */
764 register long int target_address;
765 /* Where, in file space, does addr point? */
766
767 know (fragP->fr_type == rs_machine_dependent);
768 length_code = RELAX_LENGTH (fragP->fr_subtype);
769 know (length_code >= 0 && length_code < 3);
770 where = fragP->fr_fix;
771 addressP = fragP->fr_literal + where;
772 opcodeP = fragP->fr_opcode;
773 symbolP = fragP->fr_symbol;
774 know (symbolP);
775 target_address = S_GET_VALUE (symbolP) + fragP->fr_offset;
776 address_of_var = fragP->fr_address + where;
777 switch (fragP->fr_subtype)
778 {
779 case ENCODE_RELAX (STATE_PC_RELATIVE, STATE_BYTE):
780 /* *addressP holds the registers number, plus 0x10, if it's deferred
781 mode. To set up the right mode, just OR the size of this displacement */
a4d24084 782 /* Byte displacement. */
252b5132
RH
783 *addressP++ |= TAHOE_PC_OR_BYTE;
784 *addressP = target_address - (address_of_var + 2);
785 extension = 2;
786 break;
787
788 case ENCODE_RELAX (STATE_PC_RELATIVE, STATE_WORD):
a4d24084 789 /* Word displacement. */
252b5132
RH
790 *addressP++ |= TAHOE_PC_OR_WORD;
791 md_number_to_chars (addressP, target_address - (address_of_var + 3), 2);
792 extension = 3;
793 break;
794
795 case ENCODE_RELAX (STATE_PC_RELATIVE, STATE_LONG):
a4d24084 796 /* Long word displacement. */
252b5132
RH
797 *addressP++ |= TAHOE_PC_OR_LONG;
798 md_number_to_chars (addressP, target_address - (address_of_var + 5), 4);
799 extension = 5;
800 break;
801
802 case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_BYTE):
803 *addressP = target_address - (address_of_var + 1);
804 extension = 1;
805 break;
806
807 case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_WORD):
a4d24084 808 *opcodeP ^= 0x10; /* Reverse sense of test. */
252b5132
RH
809 *addressP++ = 3; /* Jump over word branch */
810 *addressP++ = TAHOE_BRW;
811 md_number_to_chars (addressP, target_address - (address_of_var + 4), 2);
812 extension = 4;
813 break;
814
815 case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_LONG):
a4d24084 816 *opcodeP ^= 0x10; /* Reverse sense of test. */
252b5132
RH
817 *addressP++ = 6;
818 *addressP++ = TAHOE_JMP;
819 *addressP++ = TAHOE_PC_REL_LONG;
820 md_number_to_chars (addressP, target_address, 4);
821 extension = 7;
822 break;
823
824 case ENCODE_RELAX (STATE_ALWAYS_BRANCH, STATE_BYTE):
825 *addressP = target_address - (address_of_var + 1);
826 extension = 1;
827 break;
828
829 case ENCODE_RELAX (STATE_ALWAYS_BRANCH, STATE_WORD):
830 *opcodeP = TAHOE_BRW;
831 md_number_to_chars (addressP, target_address - (address_of_var + 2), 2);
832 extension = 2;
833 break;
834
835 case ENCODE_RELAX (STATE_ALWAYS_BRANCH, STATE_LONG):
836 *opcodeP = TAHOE_JMP;
837 *addressP++ = TAHOE_PC_REL_LONG;
838 md_number_to_chars (addressP, target_address - (address_of_var + 5), 4);
839 extension = 5;
840 break;
841
842 case ENCODE_RELAX (STATE_BIG_REV_BRANCH, STATE_WORD):
843 md_number_to_chars (addressP, target_address - (address_of_var + 2), 2);
844 extension = 2;
845 break;
846
847 case ENCODE_RELAX (STATE_BIG_REV_BRANCH, STATE_LONG):
848 *opcodeP ^= 0x10;
849 *addressP++ = 0;
850 *addressP++ = 6;
851 *addressP++ = TAHOE_JMP;
852 *addressP++ = TAHOE_PC_REL_LONG;
853 md_number_to_chars (addressP, target_address, 4);
854 extension = 8;
855 break;
856
857 case ENCODE_RELAX (STATE_BIG_NON_REV_BRANCH, STATE_WORD):
858 md_number_to_chars (addressP, target_address - (address_of_var + 2), 2);
859 extension = 2;
860 break;
861
862 case ENCODE_RELAX (STATE_BIG_NON_REV_BRANCH, STATE_LONG):
863 *addressP++ = 0;
864 *addressP++ = 2;
865 *addressP++ = TAHOE_BRB;
866 *addressP++ = 6;
867 *addressP++ = TAHOE_JMP;
868 *addressP++ = TAHOE_PC_REL_LONG;
869 md_number_to_chars (addressP, target_address, 4);
870 extension = 10;
871 break;
872
873 default:
874 BAD_CASE (fragP->fr_subtype);
875 break;
876 }
877 fragP->fr_fix += extension;
878} /* md_convert_frag */
879\f
880
a4d24084 881/* This is the stuff for md_assemble. */
252b5132
RH
882#define FP_REG 13
883#define SP_REG 14
884#define PC_REG 15
885#define BIGGESTREG PC_REG
886
887/*
888 * Parse the string pointed to by START
889 * If it represents a valid register, point START to the character after
890 * the last valid register char, and return the register number (0-15).
891 * If invalid, leave START alone, return -1.
892 * The format has to be exact. I don't do things like eat leading zeros
893 * or the like.
894 * Note: This doesn't check for the next character in the string making
895 * this invalid. Ex: R123 would return 12, it's the callers job to check
896 * what start is point to apon return.
897 *
898 * Valid registers are R1-R15, %1-%15, FP (13), SP (14), PC (15)
899 * Case doesn't matter.
900 */
901int
902tahoe_reg_parse (start)
a4d24084 903 char **start; /* A pointer to the string to parse. */
252b5132
RH
904{
905 register char *regpoint = *start;
906 register int regnum = -1;
907
908 switch (*regpoint++)
909 {
910 case '%': /* Registers can start with a %,
a4d24084 911 R or r, and then a number. */
252b5132
RH
912 case 'R':
913 case 'r':
914 if (isdigit (*regpoint))
915 {
a4d24084 916 /* Got the first digit. */
252b5132
RH
917 regnum = *regpoint++ - '0';
918 if ((regnum == 1) && isdigit (*regpoint))
919 {
a4d24084 920 /* Its a two digit number. */
252b5132
RH
921 regnum = 10 + (*regpoint++ - '0');
922 if (regnum > BIGGESTREG)
923 { /* Number too big? */
924 regnum = -1;
925 }
926 }
927 }
928 break;
929 case 'F': /* Is it the FP */
930 case 'f':
931 switch (*regpoint++)
932 {
933 case 'p':
934 case 'P':
935 regnum = FP_REG;
936 }
937 break;
938 case 's': /* How about the SP */
939 case 'S':
940 switch (*regpoint++)
941 {
942 case 'p':
943 case 'P':
944 regnum = SP_REG;
945 }
946 break;
947 case 'p': /* OR the PC even */
948 case 'P':
949 switch (*regpoint++)
950 {
951 case 'c':
952 case 'C':
953 regnum = PC_REG;
954 }
955 break;
956 }
957
958 if (regnum != -1)
959 { /* No error, so move string pointer */
960 *start = regpoint;
961 }
962 return regnum; /* Return results */
963} /* tahoe_reg_parse */
964\f
965/*
966 * This chops up an operand and figures out its modes and stuff.
967 * It's a little touchy about extra characters.
968 * Optex to start with one extra character so it can be overwritten for
969 * the backward part of the parsing.
970 * You can't put a bunch of extra characters in side to
971 * make the command look cute. ie: * foo ( r1 ) [ r0 ]
972 * If you like doing a lot of typing, try COBOL!
973 * Actually, this parser is a little weak all around. It's designed to be
974 * used with compliers, so I emphisise correct decoding of valid code quickly
975 * rather that catching every possable error.
976 * Note: This uses the expression function, so save input_line_pointer before
977 * calling.
978 *
979 * Sperry defines the semantics of address modes (and values)
980 * by a two-letter code, explained here.
981 *
982 * letter 1: access type
983 *
984 * a address calculation - no data access, registers forbidden
985 * b branch displacement
986 * m read - let go of bus - write back "modify"
987 * r read
988 * w write
989 * v bit field address: like 'a' but registers are OK
990 *
991 * letter 2: data type (i.e. width, alignment)
992 *
993 * b byte
994 * w word
995 * l longword
996 * q quadword (Even regs < 14 allowed) (if 12, you get a warning)
997 * - unconditional synthetic jbr operand
998 * ? simple synthetic reversable branch operand
999 * ! complex synthetic reversable branch operand
1000 * : complex synthetic non-reversable branch operand
1001 *
1002 * The '-?!:' letter 2's are not for external consumption. They are used
1003 * by GAS for psuedo ops relaxing code.
1004 *
1005 * After parsing topP has:
1006 *
1007 * top_ndx: -1, or the index register. eg 7=[R7]
1008 * top_reg: -1, or register number. eg 7 = R7 or (R7)
1009 * top_mode: The addressing mode byte. This byte, defines which of
1010 * the 11 modes opcode is.
1011 * top_access: Access type wanted for this opperand 'b'branch ' '
1012 * no-instruction 'amrvw'
1013 * top_width: Operand width expected, one of "bwlq?-:!"
1014 * exp_of_operand: The expression as parsed by expression()
1015 * top_dispsize: Number of bytes in the displacement if we can figure it
1016 * out and it's relavent.
1017 *
1018 * Need syntax checks built.
1019 */
1020
1021void
1022tip_op (optex, topP)
1023 char *optex; /* The users text input, with one leading character */
1024 struct top *topP; /* The tahoe instruction with some fields already set:
1025 in: access, width
1026 out: ndx, reg, mode, error, dispsize */
1027
1028{
a4d24084
KH
1029 int mode = 0; /* This operand's mode. */
1030 char segfault = *optex; /* To keep the back parsing from freaking. */
1031 char *point = optex + 1; /* Parsing from front to back. */
1032 char *end; /* Parsing from back to front. */
252b5132
RH
1033 int reg = -1; /* major register, -1 means absent */
1034 int imreg = -1; /* Major register in immediate mode */
1035 int ndx = -1; /* index register number, -1 means absent */
1036 char dec_inc = ' '; /* Is the SP auto-incremented '+' or
a4d24084 1037 auto-decremented '-' or neither ' '. */
252b5132
RH
1038 int immediate = 0; /* 1 if '$' immediate mode */
1039 int call_width = 0; /* If the caller casts the displacement */
1040 int abs_width = 0; /* The width of the absolute displacment */
1041 int com_width = 0; /* Displacement width required by branch */
1042 int deferred = 0; /* 1 if '*' deferral is used */
1043 byte disp_size = 0; /* How big is this operand. 0 == don't know */
1044 char *op_bad = ""; /* Bad operand error */
1045
1046 char *tp, *temp, c; /* Temporary holders */
1047
a4d24084 1048 char access = topP->top_access; /* Save on a deref. */
252b5132
RH
1049 char width = topP->top_width;
1050
1051 int really_none = 0; /* Empty expressions evaluate to 0
1052 but I need to know if it's there or not */
1053 expressionS *expP; /* -> expression values for this operand */
1054
a4d24084 1055 /* Does this command restrict the displacement size. */
252b5132
RH
1056 if (access == 'b')
1057 com_width = (width == 'b' ? 1 :
1058 (width == 'w' ? 2 :
1059 (width == 'l' ? 4 : 0)));
1060
1061 *optex = '\0'; /* This is kind of a back stop for all
1062 the searches to fail on if needed.*/
1063 if (*point == '*')
1064 { /* A dereference? */
1065 deferred = 1;
1066 point++;
1067 }
1068
1069 /* Force words into a certain mode */
1070 /* Bitch, Bitch, Bitch! */
1071 /*
1072 * Using the ^ operator is ambigous. If I have an absolute label
1073 * called 'w' set to, say 2, and I have the expression 'w^1', do I get
1074 * 1, forced to be in word displacement mode, or do I get the value of
1075 * 'w' or'ed with 1 (3 in this case).
1076 * The default is 'w' as an offset, so that's what I use.
1077 * Stick with `, it does the same, and isn't ambig.
1078 */
1079
1080 if (*point != '\0' && ((point[1] == '^') || (point[1] == '`')))
1081 switch (*point)
1082 {
1083 case 'b':
1084 case 'B':
1085 case 'w':
1086 case 'W':
1087 case 'l':
1088 case 'L':
1089 if (com_width)
1090 as_warn (_("Casting a branch displacement is bad form, and is ignored."));
1091 else
1092 {
1093 c = (isupper (*point) ? tolower (*point) : *point);
1094 call_width = ((c == 'b') ? 1 :
1095 ((c == 'w') ? 2 : 4));
1096 }
1097 point += 2;
1098 break;
1099 }
1100
1101 /* Setting immediate mode */
1102 if (*point == '$')
1103 {
1104 immediate = 1;
1105 point++;
1106 }
1107
1108 /*
1109 * I've pulled off all the easy stuff off the front, move to the end and
1110 * yank.
1111 */
1112
a4d24084 1113 for (end = point; *end != '\0'; end++) /* Move to the end. */
252b5132
RH
1114 ;
1115
1116 if (end != point) /* Null string? */
1117 end--;
1118
1119 if (end > point && *end == ' ' && end[-1] != '\'')
1120 end--; /* Hop white space */
1121
a4d24084 1122 /* Is this an index reg. */
252b5132
RH
1123 if ((*end == ']') && (end[-1] != '\''))
1124 {
1125 temp = end;
1126
a4d24084 1127 /* Find opening brace. */
252b5132
RH
1128 for (--end; (*end != '[' && end != point); end--)
1129 ;
1130
a4d24084 1131 /* If I found the opening brace, get the index register number. */
252b5132
RH
1132 if (*end == '[')
1133 {
a4d24084 1134 tp = end + 1; /* tp should point to the start of a reg. */
252b5132
RH
1135 ndx = tahoe_reg_parse (&tp);
1136 if (tp != temp)
a4d24084 1137 { /* Reg. parse error. */
252b5132
RH
1138 ndx = -1;
1139 }
1140 else
1141 {
a4d24084 1142 end--; /* Found it, move past brace. */
252b5132
RH
1143 }
1144 if (ndx == -1)
1145 {
1146 op_bad = _("Couldn't parse the [index] in this operand.");
a4d24084 1147 end = point; /* Force all the rest of the tests to fail. */
252b5132
RH
1148 }
1149 }
1150 else
1151 {
1152 op_bad = _("Couldn't find the opening '[' for the index of this operand.");
a4d24084 1153 end = point; /* Force all the rest of the tests to fail. */
252b5132
RH
1154 }
1155 }
1156
1157 /* Post increment? */
1158 if (*end == '+')
1159 {
1160 dec_inc = '+';
1161 /* was: *end--; */
1162 end--;
1163 }
1164
1165 /* register in parens? */
1166 if ((*end == ')') && (end[-1] != '\''))
1167 {
1168 temp = end;
1169
a4d24084 1170 /* Find opening paren. */
252b5132
RH
1171 for (--end; (*end != '(' && end != point); end--)
1172 ;
1173
a4d24084 1174 /* If I found the opening paren, get the register number. */
252b5132
RH
1175 if (*end == '(')
1176 {
1177 tp = end + 1;
1178 reg = tahoe_reg_parse (&tp);
1179 if (tp != temp)
1180 {
a4d24084 1181 /* Not a register, but could be part of the expression. */
252b5132
RH
1182 reg = -1;
1183 end = temp; /* Rest the pointer back */
1184 }
1185 else
1186 {
a4d24084 1187 end--; /* Found the reg. move before opening paren. */
252b5132
RH
1188 }
1189 }
1190 else
1191 {
1192 op_bad = _("Couldn't find the opening '(' for the deref of this operand.");
a4d24084 1193 end = point; /* Force all the rest of the tests to fail. */
252b5132
RH
1194 }
1195 }
1196
1197 /* Pre decrement? */
1198 if (*end == '-')
1199 {
1200 if (dec_inc != ' ')
1201 {
1202 op_bad = _("Operand can't be both pre-inc and post-dec.");
1203 end = point;
1204 }
1205 else
1206 {
1207 dec_inc = '-';
1208 /* was: *end--; */
1209 end--;
1210 }
1211 }
1212
1213 /*
1214 * Everything between point and end is the 'expression', unless it's
1215 * a register name.
1216 */
1217
1218 c = end[1];
1219 end[1] = '\0';
1220
1221 tp = point;
1222 imreg = tahoe_reg_parse (&point); /* Get the immediate register
1223 if it is there.*/
1224 if (*point != '\0')
1225 {
a4d24084 1226 /* If there is junk after point, then the it's not immediate reg. */
252b5132
RH
1227 point = tp;
1228 imreg = -1;
1229 }
1230
1231 if (imreg != -1 && reg != -1)
1232 op_bad = _("I parsed 2 registers in this operand.");
1233
1234 /*
1235 * Evaluate whats left of the expression to see if it's valid.
1236 * Note again: This assumes that the calling expression has saved
1237 * input_line_pointer. (Nag, nag, nag!)
1238 */
1239
1240 if (*op_bad == '\0')
1241 {
1994a7c7 1242 /* Statement has no syntax goofs yet: let's sniff the expression. */
252b5132
RH
1243 input_line_pointer = point;
1244 expP = &(topP->exp_of_operand);
1245 topP->seg_of_operand = expression (expP);
1246 switch (expP->X_op)
1247 {
1248 case O_absent:
1249 /* No expression. For BSD4.2 compatibility, missing expression is
1250 absolute 0 */
1251 expP->X_op = O_constant;
1252 expP->X_add_number = 0;
1253 really_none = 1;
1254 case O_constant:
1255 /* for SEG_ABSOLUTE, we shouldnt need to set X_op_symbol,
a4d24084 1256 X_add_symbol to any particular value. */
252b5132 1257 /* But, we will program defensively. Since this situation occurs
a4d24084 1258 rarely so it costs us little to do so. */
252b5132
RH
1259 expP->X_add_symbol = NULL;
1260 expP->X_op_symbol = NULL;
1261 /* How many bytes are needed to express this abs value? */
1262 abs_width =
1263 ((((expP->X_add_number & 0xFFFFFF80) == 0) ||
1264 ((expP->X_add_number & 0xFFFFFF80) == 0xFFFFFF80)) ? 1 :
1265 (((expP->X_add_number & 0xFFFF8000) == 0) ||
1266 ((expP->X_add_number & 0xFFFF8000) == 0xFFFF8000)) ? 2 : 4);
1267
1268 case O_symbol:
1269 break;
1270
1271 default:
1272 /*
1273 * Major bug. We can't handle the case of a operator
1274 * expression in a synthetic opcode variable-length
1275 * instruction. We don't have a frag type that is smart
1276 * enough to relax a operator, and so we just force all
1277 * operators to behave like SEG_PASS1s. Clearly, if there is
1278 * a demand we can invent a new or modified frag type and
1279 * then coding up a frag for this case will be easy.
1280 */
1281 need_pass_2 = 1;
1282 op_bad = _("Can't relocate expression error.");
1283 break;
1284
1285 case O_big:
1286 /* This is an error. Tahoe doesn't allow any expressions
1287 bigger that a 32 bit long word. Any bigger has to be referenced
a4d24084 1288 by address. */
252b5132
RH
1289 op_bad = _("Expression is too large for a 32 bits.");
1290 break;
1291 }
1292 if (*input_line_pointer != '\0')
1293 {
1294 op_bad = _("Junk at end of expression.");
1295 }
1296 }
1297
1298 end[1] = c;
1299
1300 /* I'm done, so restore optex */
1301 *optex = segfault;
1302
252b5132
RH
1303 /*
1304 * At this point in the game, we (in theory) have all the components of
1305 * the operand at least parsed. Now it's time to check for syntax/semantic
1306 * errors, and build the mode.
1307 * This is what I have:
1308 * deferred = 1 if '*'
1309 * call_width = 0,1,2,4
1310 * abs_width = 0,1,2,4
1311 * com_width = 0,1,2,4
1312 * immediate = 1 if '$'
1313 * ndx = -1 or reg num
1314 * dec_inc = '-' or '+' or ' '
1315 * reg = -1 or reg num
1316 * imreg = -1 or reg num
1317 * topP->exp_of_operand
1318 * really_none
1319 */
1320 /* Is there a displacement size? */
1321 disp_size = (call_width ? call_width :
1322 (com_width ? com_width :
1323 abs_width ? abs_width : 0));
1324
1325 if (*op_bad == '\0')
1326 {
1327 if (imreg != -1)
1328 {
1329 /* Rn */
1330 mode = TAHOE_DIRECT_REG;
1331 if (deferred || immediate || (dec_inc != ' ') ||
1332 (reg != -1) || !really_none)
1333 op_bad = _("Syntax error in direct register mode.");
1334 else if (ndx != -1)
1335 op_bad = _("You can't index a register in direct register mode.");
1336 else if (imreg == SP_REG && access == 'r')
1337 op_bad =
1338 _("SP can't be the source operand with direct register addressing.");
1339 else if (access == 'a')
1340 op_bad = _("Can't take the address of a register.");
1341 else if (access == 'b')
1342 op_bad = _("Direct Register can't be used in a branch.");
1343 else if (width == 'q' && ((imreg % 2) || (imreg > 13)))
1344 op_bad = _("For quad access, the register must be even and < 14.");
1345 else if (call_width)
1346 op_bad = _("You can't cast a direct register.");
1347
1348 if (*op_bad == '\0')
1349 {
1350 /* No errors, check for warnings */
1351 if (width == 'q' && imreg == 12)
1352 as_warn (_("Using reg 14 for quadwords can tromp the FP register."));
1353
1354 reg = imreg;
1355 }
1356
1357 /* We know: imm = -1 */
1358 }
1359 else if (dec_inc == '-')
1360 {
1361 /* -(SP) */
1362 mode = TAHOE_AUTO_DEC;
1363 if (deferred || immediate || !really_none)
1364 op_bad = _("Syntax error in auto-dec mode.");
1365 else if (ndx != -1)
1366 op_bad = _("You can't have an index auto dec mode.");
1367 else if (access == 'r')
1368 op_bad = _("Auto dec mode cant be used for reading.");
1369 else if (reg != SP_REG)
1370 op_bad = _("Auto dec only works of the SP register.");
1371 else if (access == 'b')
1372 op_bad = _("Auto dec can't be used in a branch.");
1373 else if (width == 'q')
1374 op_bad = _("Auto dec won't work with quadwords.");
1375
1376 /* We know: imm = -1, dec_inc != '-' */
1377 }
1378 else if (dec_inc == '+')
1379 {
1380 if (immediate || !really_none)
1381 op_bad = _("Syntax error in one of the auto-inc modes.");
1382 else if (deferred)
1383 {
1384 /* *(SP)+ */
1385 mode = TAHOE_AUTO_INC_DEFERRED;
1386 if (reg != SP_REG)
1387 op_bad = _("Auto inc deferred only works of the SP register.");
1388 else if (ndx != -1)
1389 op_bad = _("You can't have an index auto inc deferred mode.");
1390 else if (access == 'b')
1391 op_bad = _("Auto inc can't be used in a branch.");
1392 }
1393 else
1394 {
1395 /* (SP)+ */
1396 mode = TAHOE_AUTO_INC;
1397 if (access == 'm' || access == 'w')
1398 op_bad = _("You can't write to an auto inc register.");
1399 else if (reg != SP_REG)
1400 op_bad = _("Auto inc only works of the SP register.");
1401 else if (access == 'b')
1402 op_bad = _("Auto inc can't be used in a branch.");
1403 else if (width == 'q')
1404 op_bad = _("Auto inc won't work with quadwords.");
1405 else if (ndx != -1)
1406 op_bad = _("You can't have an index in auto inc mode.");
1407 }
1408
1409 /* We know: imm = -1, dec_inc == ' ' */
1410 }
1411 else if (reg != -1)
1412 {
1413 if ((ndx != -1) && (reg == SP_REG))
1414 op_bad = _("You can't index the sp register.");
1415 if (deferred)
1416 {
1417 /* *<disp>(Rn) */
1418 mode = TAHOE_REG_DISP_DEFERRED;
1419 if (immediate)
1420 op_bad = _("Syntax error in register displaced mode.");
1421 }
1422 else if (really_none)
1423 {
1424 /* (Rn) */
1425 mode = TAHOE_REG_DEFERRED;
1426 /* if reg = SP then cant be indexed */
1427 }
1428 else
1429 {
1430 /* <disp>(Rn) */
1431 mode = TAHOE_REG_DISP;
1432 }
1433
1434 /* We know: imm = -1, dec_inc == ' ', Reg = -1 */
1435 }
1436 else
1437 {
1438 if (really_none)
1439 op_bad = _("An offest is needed for this operand.");
1440 if (deferred && immediate)
1441 {
1442 /* *$<ADDR> */
1443 mode = TAHOE_ABSOLUTE_ADDR;
1444 disp_size = 4;
1445 }
1446 else if (immediate)
1447 {
1448 /* $<disp> */
1449 mode = TAHOE_IMMEDIATE;
1450 if (ndx != -1)
1451 op_bad = _("You can't index a register in immediate mode.");
1452 if (access == 'a')
1453 op_bad = _("Immediate access can't be used as an address.");
a4d24084 1454 /* ponder the wisdom of a cast because it doesn't do any good. */
252b5132
RH
1455 }
1456 else if (deferred)
1457 {
1458 /* *<disp> */
1459 mode = TAHOE_DISP_REL_DEFERRED;
1460 }
1461 else
1462 {
1463 /* <disp> */
1464 mode = TAHOE_DISPLACED_RELATIVE;
1465 }
1466 }
1467 }
1468
1469 /*
1470 * At this point, all the errors we can do have be checked for.
a4d24084 1471 * We can build the 'top'. */
252b5132
RH
1472
1473 topP->top_ndx = ndx;
1474 topP->top_reg = reg;
1475 topP->top_mode = mode;
1476 topP->top_error = op_bad;
1477 topP->top_dispsize = disp_size;
1478} /* tip_op */
1479\f
1480/*
1481 * t i p ( )
1482 *
1483 * This converts a string into a tahoe instruction.
1484 * The string must be a bare single instruction in tahoe (with BSD4 frobs)
1485 * format.
1486 * It provides at most one fatal error message (which stops the scan)
1487 * some warning messages as it finds them.
1488 * The tahoe instruction is returned in exploded form.
1489 *
1490 * The exploded instruction is returned to a struct tit of your choice.
1491 * #include "tahoe-inst.h" to know what a struct tit is.
1492 *
1493 */
1494
1495static void
1496tip (titP, instring)
a4d24084
KH
1497 struct tit *titP; /* We build an exploded instruction here. */
1498 char *instring; /* Text of a vax instruction: we modify. */
252b5132 1499{
a4d24084 1500 register struct tot_wot *twP = NULL; /* How to bit-encode this opcode. */
252b5132
RH
1501 register char *p; /* 1/skip whitespace.2/scan vot_how */
1502 register char *q; /* */
1503 register unsigned char count; /* counts number of operands seen */
1504 register struct top *operandp;/* scan operands in struct tit */
1505 register char *alloperr = ""; /* error over all operands */
1506 register char c; /* Remember char, (we clobber it
a4d24084 1507 with '\0' temporarily). */
252b5132
RH
1508 char *save_input_line_pointer;
1509
1510 if (*instring == ' ')
a4d24084 1511 ++instring; /* Skip leading whitespace. */
252b5132
RH
1512 for (p = instring; *p && *p != ' '; p++)
1513 ; /* MUST end in end-of-string or
a4d24084
KH
1514 exactly 1 space. */
1515 /* Scanned up to end of operation-code. */
1516 /* Operation-code is ended with whitespace. */
252b5132
RH
1517 if (p == instring)
1518 {
1519 titP->tit_error = _("No operator");
1520 count = 0;
1521 titP->tit_opcode = 0;
1522 }
1523 else
1524 {
1525 c = *p;
1526 *p = '\0';
1527 /*
1528 * Here with instring pointing to what better be an op-name, and p
1529 * pointing to character just past that.
1530 * We trust instring points to an op-name, with no whitespace.
1531 */
1532 twP = (struct tot_wot *) hash_find (op_hash, instring);
a4d24084 1533 *p = c; /* Restore char after op-code. */
252b5132
RH
1534 if (twP == 0)
1535 {
1536 titP->tit_error = _("Unknown operator");
1537 count = 0;
1538 titP->tit_opcode = 0;
1539 }
1540 else
1541 {
1542 /*
1994a7c7 1543 * We found a match! So let's pick up as many operands as the
252b5132
RH
1544 * instruction wants, and even gripe if there are too many.
1545 * We expect comma to seperate each operand.
1546 * We let instring track the text, while p tracks a part of the
1547 * struct tot.
1548 */
1549
1550 count = 0; /* no operands seen yet */
1551 instring = p + (*p != '\0'); /* point past the operation code */
1552 /* tip_op() screws with the input_line_pointer, so save it before
1553 I jump in */
1554 save_input_line_pointer = input_line_pointer;
1555 for (p = twP->args, operandp = titP->tit_operand;
1556 !*alloperr && *p;
1557 operandp++, p += 2)
1558 {
1559 /*
1560 * Here to parse one operand. Leave instring pointing just
1561 * past any one ',' that marks the end of this operand.
1562 */
1563 if (!p[1])
1564 as_fatal (_("Compiler bug: ODD number of bytes in arg structure %s."),
1565 twP->args);
1566 else if (*instring)
1567 {
1568 for (q = instring; (*q != ',' && *q != '\0'); q++)
1569 {
1570 if (*q == '\'' && q[1] != '\0') /* Jump quoted characters */
1571 q++;
1572 }
1573 c = *q;
1574 /*
1575 * Q points to ',' or '\0' that ends argument. C is that
1576 * character.
1577 */
1578 *q = '\0';
1579 operandp->top_access = p[0];
1580 operandp->top_width = p[1];
1581 tip_op (instring - 1, operandp);
a4d24084 1582 *q = c; /* Restore input text. */
252b5132
RH
1583 if (*(operandp->top_error))
1584 {
1585 alloperr = operandp->top_error;
1586 }
1587 instring = q + (c ? 1 : 0); /* next operand (if any) */
1588 count++; /* won another argument, may have an operr */
1589 }
1590 else
1591 alloperr = _("Not enough operands");
1592 }
a4d24084 1593 /* Restore the pointer. */
252b5132
RH
1594 input_line_pointer = save_input_line_pointer;
1595
1596 if (!*alloperr)
1597 {
1598 if (*instring == ' ')
a4d24084 1599 instring++; /* Skip whitespace. */
252b5132
RH
1600 if (*instring)
1601 alloperr = _("Too many operands");
1602 }
1603 titP->tit_error = alloperr;
1604 }
1605 }
1606
a4d24084 1607 titP->tit_opcode = twP->code; /* The op-code. */
252b5132
RH
1608 titP->tit_operands = count;
1609} /* tip */
1610\f
1611/* md_assemble() emit frags for 1 instruction */
1612void
1613md_assemble (instruction_string)
a4d24084 1614 char *instruction_string; /* A string: assemble 1 instruction. */
252b5132
RH
1615{
1616 char *p;
a4d24084
KH
1617 register struct top *operandP;/* An operand. Scans all operands. */
1618 /* char c_save; fixme: remove this line *//* What used to live after an expression. */
1619 /* struct frag *fragP; fixme: remove this line *//* Fragment of code we just made. */
252b5132 1620 /* register struct top *end_operandP; fixme: remove this line *//* -> slot just after last operand
a4d24084 1621 Limit of the for (each operand). */
252b5132
RH
1622 register expressionS *expP; /* -> expression values for this operand */
1623
a4d24084 1624 /* These refer to an instruction operand expression. */
252b5132
RH
1625 segT to_seg; /* Target segment of the address. */
1626
1627 register valueT this_add_number;
a4d24084 1628 register symbolS *this_add_symbol; /* +ve (minuend) symbol. */
252b5132 1629
a4d24084
KH
1630 /* tahoe_opcodeT opcode_as_number; fixme: remove this line *//* The opcode as a number. */
1631 char *opcodeP; /* Where it is in a frag. */
1632 /* char *opmodeP; fixme: remove this line *//* Where opcode type is, in a frag. */
252b5132
RH
1633
1634 int dispsize; /* From top_dispsize: tahoe_operand_width
1635 (in bytes) */
1636 int is_undefined; /* 1 if operand expression's
a4d24084 1637 segment not known yet. */
252b5132
RH
1638 int pc_rel; /* Is this operand pc relative? */
1639
a4d24084 1640 /* Decode the operand. */
252b5132
RH
1641 tip (&t, instruction_string);
1642
1643 /*
1644 * Check to see if this operand decode properly.
1645 * Notice that we haven't made any frags yet.
1646 * If it goofed, then this instruction will wedge in any pass,
1647 * and we can safely flush it, without causing interpass symbol phase
1648 * errors. That is, without changing label values in different passes.
1649 */
1650 if (*t.tit_error)
1651 {
1652 as_warn (_("Ignoring statement due to \"%s\""), t.tit_error);
1653 }
1654 else
1655 {
1656 /* We saw no errors in any operands - try to make frag(s) */
a4d24084
KH
1657 /* Emit op-code. */
1658 /* Remember where it is, in case we want to modify the op-code later. */
252b5132
RH
1659 opcodeP = frag_more (1);
1660 *opcodeP = t.tit_opcode;
a4d24084 1661 /* Now do each operand. */
252b5132
RH
1662 for (operandP = t.tit_operand;
1663 operandP < t.tit_operand + t.tit_operands;
1664 operandP++)
1665 { /* for each operand */
1666 expP = &(operandP->exp_of_operand);
1667 if (operandP->top_ndx >= 0)
1668 {
1669 /* Indexed addressing byte
1670 Legality of indexed mode already checked: it is OK */
1671 FRAG_APPEND_1_CHAR (0x40 + operandP->top_ndx);
1672 } /* if(top_ndx>=0) */
1673
a4d24084 1674 /* Here to make main operand frag(s). */
252b5132
RH
1675 this_add_number = expP->X_add_number;
1676 this_add_symbol = expP->X_add_symbol;
1677 to_seg = operandP->seg_of_operand;
1678 know (to_seg == SEG_UNKNOWN || \
1679 to_seg == SEG_ABSOLUTE || \
1680 to_seg == SEG_DATA || \
1681 to_seg == SEG_TEXT || \
1682 to_seg == SEG_BSS);
1683 is_undefined = (to_seg == SEG_UNKNOWN);
1684 /* Do we know how big this opperand is? */
1685 dispsize = operandP->top_dispsize;
1686 pc_rel = 0;
1687 /* Deal with the branch possabilities. (Note, this doesn't include
1688 jumps.)*/
1689 if (operandP->top_access == 'b')
1690 {
1691 /* Branches must be expressions. A psuedo branch can also jump to
a4d24084 1692 an absolute address. */
252b5132
RH
1693 if (to_seg == now_seg || is_undefined)
1694 {
a4d24084 1695 /* If is_undefined, then it might BECOME now_seg by relax time. */
252b5132
RH
1696 if (dispsize)
1697 {
1698 /* I know how big the branch is supposed to be (it's a normal
a4d24084 1699 branch), so I set up the frag, and let GAS do the rest. */
252b5132
RH
1700 p = frag_more (dispsize);
1701 fix_new (frag_now, p - frag_now->fr_literal,
1702 this_add_symbol, this_add_number,
1703 size_to_fx (dispsize, 1),
1704 NULL);
1705 }
1706 else
1707 {
1708 /* (to_seg==now_seg || to_seg == SEG_UNKNOWN) && dispsize==0 */
1709 /* If we don't know how big it is, then its a synthetic branch,
a4d24084 1710 so we set up a simple relax state. */
252b5132
RH
1711 switch (operandP->top_width)
1712 {
1713 case TAHOE_WIDTH_CONDITIONAL_JUMP:
1714 /* Simple (conditional) jump. I may have to reverse the
1715 condition of opcodeP, and then jump to my destination.
1716 I set 1 byte aside for the branch off set, and could need 6
1717 more bytes for the pc_rel jump */
1718 frag_var (rs_machine_dependent, 7, 1,
1719 ENCODE_RELAX (STATE_CONDITIONAL_BRANCH,
1720 is_undefined ? STATE_UNDF : STATE_BYTE),
1721 this_add_symbol, this_add_number, opcodeP);
1722 break;
1723 case TAHOE_WIDTH_ALWAYS_JUMP:
1724 /* Simple (unconditional) jump. I may have to convert this to
a4d24084 1725 a word branch, or an absolute jump. */
252b5132
RH
1726 frag_var (rs_machine_dependent, 5, 1,
1727 ENCODE_RELAX (STATE_ALWAYS_BRANCH,
1728 is_undefined ? STATE_UNDF : STATE_BYTE),
1729 this_add_symbol, this_add_number, opcodeP);
1730 break;
a4d24084 1731 /* The smallest size for the next 2 cases is word. */
252b5132
RH
1732 case TAHOE_WIDTH_BIG_REV_JUMP:
1733 frag_var (rs_machine_dependent, 8, 2,
1734 ENCODE_RELAX (STATE_BIG_REV_BRANCH,
1735 is_undefined ? STATE_UNDF : STATE_WORD),
1736 this_add_symbol, this_add_number,
1737 opcodeP);
1738 break;
1739 case TAHOE_WIDTH_BIG_NON_REV_JUMP:
1740 frag_var (rs_machine_dependent, 10, 2,
1741 ENCODE_RELAX (STATE_BIG_NON_REV_BRANCH,
1742 is_undefined ? STATE_UNDF : STATE_WORD),
1743 this_add_symbol, this_add_number,
1744 opcodeP);
1745 break;
1746 default:
1747 as_fatal (_("Compliler bug: Got a case (%d) I wasn't expecting."),
1748 operandP->top_width);
1749 }
1750 }
1751 }
1752 else
1753 {
1754 /* to_seg != now_seg && to_seg != seg_unknown (still in branch)
1755 In other words, I'm jumping out of my segment so extend the
a4d24084 1756 branches to jumps, and let GAS fix them. */
252b5132
RH
1757
1758 /* These are "branches" what will always be branches around a jump
1759 to the correct addresss in real life.
1760 If to_seg is SEG_ABSOLUTE, just encode the branch in,
a4d24084 1761 else let GAS fix the address. */
252b5132
RH
1762
1763 switch (operandP->top_width)
1764 {
1765 /* The theory:
1766 For SEG_ABSOLUTE, then mode is ABSOLUTE_ADDR, jump
1767 to that addresss (not pc_rel).
a4d24084 1768 For other segs, address is a long word PC rel jump. */
252b5132
RH
1769 case TAHOE_WIDTH_CONDITIONAL_JUMP:
1770 /* b<cond> */
1771 /* To reverse the condition in a TAHOE branch,
1772 complement bit 4 */
1773 *opcodeP ^= 0x10;
1774 p = frag_more (7);
1775 *p++ = 6;
1776 *p++ = TAHOE_JMP;
1777 *p++ = (operandP->top_mode ==
1778 TAHOE_ABSOLUTE_ADDR ? TAHOE_ABSOLUTE_ADDR :
1779 TAHOE_PC_REL_LONG);
1780 fix_new (frag_now, p - frag_now->fr_literal,
1781 this_add_symbol, this_add_number,
1782 (to_seg != SEG_ABSOLUTE) ? FX_PCREL32 : FX_32, NULL);
1783 /*
1784 * Now (eg) BLEQ 1f
1785 * JMP foo
1786 * 1:
1787 */
1788 break;
1789 case TAHOE_WIDTH_ALWAYS_JUMP:
1790 /* br, just turn it into a jump */
1791 *opcodeP = TAHOE_JMP;
1792 p = frag_more (5);
1793 *p++ = (operandP->top_mode ==
1794 TAHOE_ABSOLUTE_ADDR ? TAHOE_ABSOLUTE_ADDR :
1795 TAHOE_PC_REL_LONG);
1796 fix_new (frag_now, p - frag_now->fr_literal,
1797 this_add_symbol, this_add_number,
1798 (to_seg != SEG_ABSOLUTE) ? FX_PCREL32 : FX_32, NULL);
1799 /* Now (eg) JMP foo */
1800 break;
1801 case TAHOE_WIDTH_BIG_REV_JUMP:
1802 p = frag_more (8);
1803 *opcodeP ^= 0x10;
1804 *p++ = 0;
1805 *p++ = 6;
1806 *p++ = TAHOE_JMP;
1807 *p++ = (operandP->top_mode ==
1808 TAHOE_ABSOLUTE_ADDR ? TAHOE_ABSOLUTE_ADDR :
1809 TAHOE_PC_REL_LONG);
1810 fix_new (frag_now, p - frag_now->fr_literal,
1811 this_add_symbol, this_add_number,
1812 (to_seg != SEG_ABSOLUTE) ? FX_PCREL32 : FX_32, NULL);
1813 /*
1814 * Now (eg) ACBx 1f
1815 * JMP foo
1816 * 1:
1817 */
1818 break;
1819 case TAHOE_WIDTH_BIG_NON_REV_JUMP:
1820 p = frag_more (10);
1821 *p++ = 0;
1822 *p++ = 2;
1823 *p++ = TAHOE_BRB;
1824 *p++ = 6;
1825 *p++ = TAHOE_JMP;
1826 *p++ = (operandP->top_mode ==
1827 TAHOE_ABSOLUTE_ADDR ? TAHOE_ABSOLUTE_ADDR :
1828 TAHOE_PC_REL_LONG);
1829 fix_new (frag_now, p - frag_now->fr_literal,
1830 this_add_symbol, this_add_number,
1831 (to_seg != SEG_ABSOLUTE) ? FX_PCREL32 : FX_32, NULL);
1832 /*
1833 * Now (eg) xOBxxx 1f
1834 * BRB 2f
1835 * 1: JMP @#foo
1836 * 2:
1837 */
1838 break;
1839 case 'b':
1840 case 'w':
1841 as_warn (_("Real branch displacements must be expressions."));
1842 break;
1843 default:
1844 as_fatal (_("Complier error: I got an unknown synthetic branch :%c"),
1845 operandP->top_width);
1846 break;
1847 }
1848 }
1849 }
1850 else
1851 {
a4d24084 1852 /* It ain't a branch operand. */
252b5132
RH
1853 switch (operandP->top_mode)
1854 {
1855 /* Auto-foo access, only works for one reg (SP)
a4d24084 1856 so the only thing needed is the mode. */
252b5132
RH
1857 case TAHOE_AUTO_DEC:
1858 case TAHOE_AUTO_INC:
1859 case TAHOE_AUTO_INC_DEFERRED:
1860 FRAG_APPEND_1_CHAR (operandP->top_mode);
1861 break;
1862
1863 /* Numbered Register only access. Only thing needed is the
1864 mode + Register number */
1865 case TAHOE_DIRECT_REG:
1866 case TAHOE_REG_DEFERRED:
1867 FRAG_APPEND_1_CHAR (operandP->top_mode + operandP->top_reg);
1868 break;
1869
1870 /* An absolute address. It's size is always 5 bytes.
a4d24084 1871 (mode_type + 4 byte address). */
252b5132
RH
1872 case TAHOE_ABSOLUTE_ADDR:
1873 know ((this_add_symbol == NULL));
1874 p = frag_more (5);
1875 *p = TAHOE_ABSOLUTE_ADDR;
1876 md_number_to_chars (p + 1, this_add_number, 4);
1877 break;
1878
1879 /* Immediate data. If the size isn't known, then it's an address
a4d24084 1880 + and offset, which is 4 bytes big. */
252b5132
RH
1881 case TAHOE_IMMEDIATE:
1882 if (this_add_symbol != NULL)
1883 {
1884 p = frag_more (5);
1885 *p++ = TAHOE_IMMEDIATE_LONGWORD;
1886 fix_new (frag_now, p - frag_now->fr_literal,
1887 this_add_symbol, this_add_number,
1888 FX_32, NULL);
1889 }
1890 else
1891 {
a4d24084 1892 /* It's a integer, and I know it's size. */
252b5132
RH
1893 if ((unsigned) this_add_number < 0x40)
1894 {
1895 /* Will it fit in a literal? */
1896 FRAG_APPEND_1_CHAR ((byte) this_add_number);
1897 }
1898 else
1899 {
1900 p = frag_more (dispsize + 1);
1901 switch (dispsize)
1902 {
1903 case 1:
1904 *p++ = TAHOE_IMMEDIATE_BYTE;
1905 *p = (byte) this_add_number;
1906 break;
1907 case 2:
1908 *p++ = TAHOE_IMMEDIATE_WORD;
1909 md_number_to_chars (p, this_add_number, 2);
1910 break;
1911 case 4:
1912 *p++ = TAHOE_IMMEDIATE_LONGWORD;
1913 md_number_to_chars (p, this_add_number, 4);
1914 break;
1915 }
1916 }
1917 }
1918 break;
1919
1920 /* Distance from the PC. If the size isn't known, we have to relax
1921 into it. The difference between this and disp(sp) is that
1922 this offset is pc_rel, and disp(sp) isn't.
a4d24084 1923 Note the drop through code. */
252b5132
RH
1924
1925 case TAHOE_DISPLACED_RELATIVE:
1926 case TAHOE_DISP_REL_DEFERRED:
1927 operandP->top_reg = PC_REG;
1928 pc_rel = 1;
1929
1930 /* Register, plus a displacement mode. Save the register number,
1931 and weather its deffered or not, and relax the size if it isn't
a4d24084 1932 known. */
252b5132
RH
1933 case TAHOE_REG_DISP:
1934 case TAHOE_REG_DISP_DEFERRED:
1935 if (operandP->top_mode == TAHOE_DISP_REL_DEFERRED ||
1936 operandP->top_mode == TAHOE_REG_DISP_DEFERRED)
1937 operandP->top_reg += 0x10; /* deffered mode is always 0x10 higher
a4d24084 1938 than it's non-deffered sibling. */
252b5132
RH
1939
1940 /* Is this a value out of this segment?
1941 The first part of this conditional is a cludge to make gas
1942 produce the same output as 'as' when there is a lable, in
1943 the current segment, displaceing a register. It's strange,
1944 and no one in their right mind would do it, but it's easy
a4d24084 1945 to cludge. */
252b5132
RH
1946 if ((dispsize == 0 && !pc_rel) ||
1947 (to_seg != now_seg && !is_undefined && to_seg != SEG_ABSOLUTE))
1948 dispsize = 4;
1949
1950 if (dispsize == 0)
1951 {
1952 /*
1953 * We have a SEG_UNKNOWN symbol, or the size isn't cast.
1954 * It might turn out to be in the same segment as
1955 * the instruction, permitting relaxation.
1956 */
1957 p = frag_var (rs_machine_dependent, 5, 2,
1958 ENCODE_RELAX (STATE_PC_RELATIVE,
1959 is_undefined ? STATE_UNDF : STATE_BYTE),
1960 this_add_symbol, this_add_number, 0);
1961 *p = operandP->top_reg;
1962 }
1963 else
1964 {
a4d24084 1965 /* Either this is an abs, or a cast. */
252b5132
RH
1966 p = frag_more (dispsize + 1);
1967 switch (dispsize)
1968 {
1969 case 1:
1970 *p = TAHOE_PC_OR_BYTE + operandP->top_reg;
1971 break;
1972 case 2:
1973 *p = TAHOE_PC_OR_WORD + operandP->top_reg;
1974 break;
1975 case 4:
1976 *p = TAHOE_PC_OR_LONG + operandP->top_reg;
1977 break;
1978 };
1979 fix_new (frag_now, p + 1 - frag_now->fr_literal,
1980 this_add_symbol, this_add_number,
1981 size_to_fx (dispsize, pc_rel), NULL);
1982 }
1983 break;
1984 default:
1985 as_fatal (_("Barf, bad mode %x\n"), operandP->top_mode);
1986 }
1987 }
1988 } /* for(operandP) */
1989 } /* if(!need_pass_2 && !goofed) */
1990} /* tahoe_assemble() */
1991
a4d24084 1992/* We have no need to default values of symbols. */
252b5132 1993
252b5132
RH
1994symbolS *
1995md_undefined_symbol (name)
1996 char *name;
1997{
1998 return 0;
1999} /* md_undefined_symbol() */
2000
a4d24084 2001/* Round up a section size to the appropriate boundary. */
252b5132
RH
2002valueT
2003md_section_align (segment, size)
2004 segT segment;
2005 valueT size;
2006{
2007 return ((size + 7) & ~7); /* Round all sects to multiple of 8 */
2008} /* md_section_align() */
2009
2010/* Exactly what point is a PC-relative offset relative TO?
2011 On the sparc, they're relative to the address of the offset, plus
2012 its size. This gets us to the following instruction.
2013 (??? Is this right? FIXME-SOON) */
a4d24084 2014long
252b5132
RH
2015md_pcrel_from (fixP)
2016 fixS *fixP;
2017{
2018 return (((fixP->fx_type == FX_8
2019 || fixP->fx_type == FX_PCREL8)
2020 ? 1
2021 : ((fixP->fx_type == FX_16
2022 || fixP->fx_type == FX_PCREL16)
2023 ? 2
2024 : ((fixP->fx_type == FX_32
2025 || fixP->fx_type == FX_PCREL32)
2026 ? 4
2027 : 0))) + fixP->fx_where + fixP->fx_frag->fr_address);
2028} /* md_pcrel_from() */
2029
a4d24084 2030int
252b5132
RH
2031tc_is_pcrel (fixP)
2032 fixS *fixP;
2033{
2034 /* should never be called */
2035 know (0);
2036 return (0);
2037} /* tc_is_pcrel() */
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