Update the address and phone number of the FSF
[deliverable/binutils-gdb.git] / gas / config / tc-tahoe.c
CommitLineData
f7e42eb4 1/* This file is tc-tahoe.c
252b5132 2
aef6203b 3 Copyright 1987, 1988, 1989, 1990, 1991, 1992, 1995, 2000, 2001, 2002,
ea1562b3 4 2003, 2004, 2005 Free Software Foundation, Inc.
f7e42eb4
NC
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC
20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
21 02110-1301, USA. */
ea1562b3 22
252b5132 23#include "as.h"
3882b010 24#include "safe-ctype.h"
252b5132
RH
25#include "obstack.h"
26
f7e42eb4 27/* This bit glommed from tahoe-inst.h. */
252b5132
RH
28
29typedef unsigned char byte;
30typedef byte tahoe_opcodeT;
31
f7e42eb4
NC
32/* This is part of tahoe-ins-parse.c & friends.
33 We want to parse a tahoe instruction text into a tree defined here. */
252b5132 34
ea1562b3
NC
35#define TIT_MAX_OPERANDS 4 /* Maximum number of operands in one
36 single tahoe instruction. */
252b5132 37
ea1562b3 38struct top /* Tahoe instruction operand. */
f7e42eb4 39 {
ea1562b3
NC
40 int top_ndx; /* -1, or index register. eg 7=[R7]. */
41 int top_reg; /* -1, or register number. eg 7 = R7 or (R7). */
f7e42eb4 42 byte top_mode; /* Addressing mode byte. This byte, defines
a4d24084 43 which of the 11 modes opcode is. */
252b5132 44
33b7f697 45 char top_access; /* Access type wanted for this operand
ea1562b3
NC
46 'b'branch ' 'no-instruction 'amrvw'. */
47 char top_width; /* Operand width expected, one of "bwlq?-:!". */
252b5132 48
ea1562b3 49 char * top_error; /* Say if operand is inappropriate. */
252b5132 50
ea1562b3 51 segT seg_of_operand; /* Segment as returned by expression(). */
252b5132 52
ea1562b3 53 expressionS exp_of_operand; /* The expression as parsed by expression(). */
252b5132 54
f7e42eb4 55 byte top_dispsize; /* Number of bytes in the displacement if we
ea1562b3 56 can figure it out. */
f7e42eb4 57 };
252b5132 58
33b7f697
KH
59/* The addressing modes for an operand. These numbers are the actual values
60 for certain modes, so be careful if you screw with them. */
ea1562b3
NC
61#define TAHOE_DIRECT_REG 0x50
62#define TAHOE_REG_DEFERRED 0x60
252b5132 63
ea1562b3
NC
64#define TAHOE_REG_DISP 0xE0
65#define TAHOE_REG_DISP_DEFERRED 0xF0
252b5132 66
ea1562b3
NC
67#define TAHOE_IMMEDIATE 0x8F
68#define TAHOE_IMMEDIATE_BYTE 0x88
69#define TAHOE_IMMEDIATE_WORD 0x89
70#define TAHOE_IMMEDIATE_LONGWORD 0x8F
71#define TAHOE_ABSOLUTE_ADDR 0x9F
252b5132 72
ea1562b3
NC
73#define TAHOE_DISPLACED_RELATIVE 0xEF
74#define TAHOE_DISP_REL_DEFERRED 0xFF
252b5132 75
ea1562b3
NC
76#define TAHOE_AUTO_DEC 0x7E
77#define TAHOE_AUTO_INC 0x8E
78#define TAHOE_AUTO_INC_DEFERRED 0x9E
33b7f697 79/* INDEXED_REG is decided by the existence or lack of a [reg]. */
252b5132
RH
80
81/* These are encoded into top_width when top_access=='b'
f7e42eb4 82 and it's a psuedo op. */
252b5132
RH
83#define TAHOE_WIDTH_ALWAYS_JUMP '-'
84#define TAHOE_WIDTH_CONDITIONAL_JUMP '?'
85#define TAHOE_WIDTH_BIG_REV_JUMP '!'
86#define TAHOE_WIDTH_BIG_NON_REV_JUMP ':'
87
88/* The hex code for certain tahoe commands and modes.
a4d24084 89 This is just for readability. */
ea1562b3
NC
90#define TAHOE_JMP 0x71
91#define TAHOE_PC_REL_LONG 0xEF
92#define TAHOE_BRB 0x11
93#define TAHOE_BRW 0x13
252b5132 94/* These, when 'ored' with, or added to, a register number,
a4d24084 95 set up the number for the displacement mode. */
ea1562b3
NC
96#define TAHOE_PC_OR_BYTE 0xA0
97#define TAHOE_PC_OR_WORD 0xC0
98#define TAHOE_PC_OR_LONG 0xE0
252b5132 99
f7e42eb4
NC
100struct tit /* Get it out of the sewer, it stands for
101 tahoe instruction tree (Geeze!). */
252b5132 102{
a4d24084
KH
103 tahoe_opcodeT tit_opcode; /* The opcode. */
104 byte tit_operands; /* How many operands are here. */
ea1562b3
NC
105 struct top tit_operand[TIT_MAX_OPERANDS]; /* Operands. */
106 char *tit_error; /* "" or fatal error text. */
252b5132
RH
107};
108
109/* end: tahoe-inst.h */
110
111/* tahoe.c - tahoe-specific -
ea1562b3 112 Not part of gas yet. */
252b5132
RH
113
114#include "opcode/tahoe.h"
115
ea1562b3 116/* This is the number to put at the beginning of the a.out file. */
252b5132
RH
117long omagic = OMAGIC;
118
119/* These chars start a comment anywhere in a source file (except inside
a4d24084 120 another comment or a quoted string. */
252b5132
RH
121const char comment_chars[] = "#;";
122
a4d24084 123/* These chars only start a comment at the beginning of a line. */
252b5132
RH
124const char line_comment_chars[] = "#";
125
ea1562b3 126/* Chars that can be used to separate mant from exp in floating point nums. */
252b5132
RH
127const char EXP_CHARS[] = "eE";
128
129/* Chars that mean this number is a floating point constant
130 as in 0f123.456
131 or 0d1.234E-12 (see exp chars above)
132 Note: The Tahoe port doesn't support floating point constants. This is
33b7f697 133 consistent with 'as' If it's needed, I can always add it later. */
252b5132
RH
134const char FLT_CHARS[] = "df";
135
136/* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be
137 changed in read.c . Ideally it shouldn't have to know about it at all,
138 but nothing is ideal around here.
ea1562b3 139 (The tahoe has plenty of room, so the change currently isn't needed.) */
252b5132 140
a4d24084 141static struct tit t; /* A tahoe instruction after decoding. */
252b5132
RH
142
143void float_cons ();
144/* A table of pseudo ops (sans .), the function called, and an integer op
a4d24084 145 that the function is called with. */
252b5132
RH
146
147const pseudo_typeS md_pseudo_table[] =
148{
149 {"dfloat", float_cons, 'd'},
150 {"ffloat", float_cons, 'f'},
151 {0}
152};
153\f
ea1562b3
NC
154/* For Tahoe, relative addresses of "just the right length" are pretty easy.
155 The branch displacement is always the last operand, even in
156 synthetic instructions.
157 For Tahoe, we encode the relax_substateTs (in e.g. fr_substate) as:
158
159 4 3 2 1 0 bit number
160 ---/ /--+-------+-------+-------+-------+-------+
161 | what state ? | how long ? |
162 ---/ /--+-------+-------+-------+-------+-------+
163
164 The "how long" bits are 00=byte, 01=word, 10=long.
165 This is a Un*x convention.
166 Not all lengths are legit for a given value of (what state).
167 The four states are listed below.
168 The "how long" refers merely to the displacement length.
169 The address usually has some constant bytes in it as well.
170
171 States for Tahoe address relaxing.
172 1. TAHOE_WIDTH_ALWAYS_JUMP (-)
252b5132
RH
173 Format: "b-"
174 Tahoe opcodes are: (Hex)
175 jr 11
176 jbr 11
177 Simple branch.
178 Always, 1 byte opcode, then displacement/absolute.
179 If word or longword, change opcode to brw or jmp.
180
ea1562b3 181 2. TAHOE_WIDTH_CONDITIONAL_JUMP (?)
252b5132
RH
182 J<cond> where <cond> is a simple flag test.
183 Format: "b?"
184 Tahoe opcodes are: (Hex)
185 jneq/jnequ 21
186 jeql/jeqlu 31
187 jgtr 41
188 jleq 51
189 jgeq 81
190 jlss 91
191 jgtru a1
192 jlequ b1
193 jvc c1
194 jvs d1
195 jlssu/jcs e1
196 jgequ/jcc f1
197 Always, you complement 4th bit to reverse the condition.
198 Always, 1-byte opcode, then 1-byte displacement.
199
ea1562b3 200 3. TAHOE_WIDTH_BIG_REV_JUMP (!)
252b5132
RH
201 Jbc/Jbs where cond tests a memory bit.
202 Format: "rlvlb!"
203 Tahoe opcodes are: (Hex)
204 jbs 0e
205 jbc 1e
206 Always, you complement 4th bit to reverse the condition.
207 Always, 1-byte opcde, longword, longword-address, 1-word-displacement
208
ea1562b3 209 4. TAHOE_WIDTH_BIG_NON_REV_JUMP (:)
252b5132
RH
210 JaoblXX/Jbssi
211 Format: "rlmlb:"
212 Tahoe opcodes are: (Hex)
213 aojlss 2f
214 jaoblss 2f
215 aojleq 3f
216 jaobleq 3f
217 jbssi 5f
218 Always, we cannot reverse the sense of the branch; we have a word
219 displacement.
220
ea1562b3
NC
221 We need to modify the opcode is for class 1, 2 and 3 instructions.
222 After relax() we may complement the 4th bit of 2 or 3 to reverse sense of
223 branch.
252b5132 224
ea1562b3
NC
225 We sometimes store context in the operand literal. This way we can figure out
226 after relax() what the original addressing mode was. (Was is pc_rel, or
227 pc_rel_disp? That sort of thing.) */
252b5132
RH
228\f
229/* These displacements are relative to the START address of the
230 displacement which is at the start of the displacement, not the end of
231 the instruction. The hardware pc_rel is at the end of the instructions.
232 That's why all the displacements have the length of the displacement added
233 to them. (WF + length(word))
234
235 The first letter is Byte, Word.
a4d24084 236 2nd letter is Forward, Backward. */
ea1562b3
NC
237#define BF (1 + 127)
238#define BB (1 + -128)
239#define WF (2 + 32767)
240#define WB (2 + -32768)
252b5132
RH
241/* Dont need LF, LB because they always reach. [They are coded as 0.] */
242
ea1562b3 243#define C(a,b) ENCODE_RELAX(a, b)
a4d24084 244/* This macro has no side-effects. */
252b5132 245#define ENCODE_RELAX(what,length) (((what) << 2) + (length))
ea1562b3
NC
246#define RELAX_STATE(s) ((s) >> 2)
247#define RELAX_LENGTH(s) ((s) & 3)
252b5132 248
ea1562b3
NC
249#define STATE_ALWAYS_BRANCH 1
250#define STATE_CONDITIONAL_BRANCH 2
251#define STATE_BIG_REV_BRANCH 3
252#define STATE_BIG_NON_REV_BRANCH 4
253#define STATE_PC_RELATIVE 5
252b5132 254
ea1562b3
NC
255#define STATE_BYTE 0
256#define STATE_WORD 1
257#define STATE_LONG 2
258#define STATE_UNDF 3 /* Symbol undefined in pass1. */
252b5132
RH
259
260/* This is the table used by gas to figure out relaxing modes. The fields are
261 forward_branch reach, backward_branch reach, number of bytes it would take,
a4d24084 262 where the next biggest branch is. */
252b5132
RH
263const relax_typeS md_relax_table[] =
264{
265 {
266 1, 1, 0, 0
ea1562b3 267 }, /* Error sentinel 0,0 */
252b5132
RH
268 {
269 1, 1, 0, 0
ea1562b3 270 }, /* Unused 0,1 */
252b5132
RH
271 {
272 1, 1, 0, 0
ea1562b3 273 }, /* Unused 0,2 */
252b5132
RH
274 {
275 1, 1, 0, 0
ea1562b3 276 }, /* Unused 0,3 */
252b5132
RH
277/* Unconditional branch cases "jrb"
278 The relax part is the actual displacement */
279 {
280 BF, BB, 1, C (1, 1)
ea1562b3 281 }, /* Brb B`foo 1,0 */
252b5132
RH
282 {
283 WF, WB, 2, C (1, 2)
ea1562b3 284 }, /* Brw W`foo 1,1 */
252b5132
RH
285 {
286 0, 0, 5, 0
287 }, /* Jmp L`foo 1,2 */
288 {
289 1, 1, 0, 0
ea1562b3 290 }, /* Unused 1,3 */
252b5132
RH
291/* Reversible Conditional Branch. If the branch won't reach, reverse
292 it, and jump over a brw or a jmp that will reach. The relax part is the
a4d24084 293 actual address. */
252b5132
RH
294 {
295 BF, BB, 1, C (2, 1)
296 }, /* b<cond> B`foo 2,0 */
297 {
298 WF + 2, WB + 2, 4, C (2, 2)
299 }, /* brev over, brw W`foo, over: 2,1 */
300 {
301 0, 0, 7, 0
302 }, /* brev over, jmp L`foo, over: 2,2 */
303 {
304 1, 1, 0, 0
ea1562b3 305 }, /* Unused 2,3 */
33b7f697 306/* Another type of reversible branch. But this only has a word
a4d24084 307 displacement. */
252b5132
RH
308 {
309 1, 1, 0, 0
ea1562b3 310 }, /* Unused 3,0 */
252b5132
RH
311 {
312 WF, WB, 2, C (3, 2)
313 }, /* jbX W`foo 3,1 */
314 {
315 0, 0, 8, 0
316 }, /* jrevX over, jmp L`foo, over: 3,2 */
317 {
318 1, 1, 0, 0
ea1562b3 319 }, /* Unused 3,3 */
33b7f697 320/* These are the non reversible branches, all of which have a word
252b5132
RH
321 displacement. If I can't reach, branch over a byte branch, to a
322 jump that will reach. The jumped branch jumps over the reaching
323 branch, to continue with the flow of the program. It's like playing
a4d24084 324 leap frog. */
252b5132
RH
325 {
326 1, 1, 0, 0
ea1562b3 327 }, /* Unused 4,0 */
252b5132
RH
328 {
329 WF, WB, 2, C (4, 2)
330 }, /* aobl_ W`foo 4,1 */
331 {
332 0, 0, 10, 0
333 }, /*aobl_ W`hop,br over,hop: jmp L^foo,over 4,2*/
334 {
335 1, 1, 0, 0
ea1562b3 336 }, /* Unused 4,3 */
252b5132
RH
337/* Normal displacement mode, no jumping or anything like that.
338 The relax points to one byte before the address, thats why all
a4d24084 339 the numbers are up by one. */
252b5132
RH
340 {
341 BF + 1, BB + 1, 2, C (5, 1)
342 }, /* B^"foo" 5,0 */
343 {
344 WF + 1, WB + 1, 3, C (5, 2)
345 }, /* W^"foo" 5,1 */
346 {
347 0, 0, 5, 0
348 }, /* L^"foo" 5,2 */
349 {
350 1, 1, 0, 0
ea1562b3 351 }, /* Unused 5,3 */
252b5132
RH
352};
353
354#undef C
355#undef BF
356#undef BB
357#undef WF
358#undef WB
ea1562b3 359/* End relax stuff. */
252b5132
RH
360\f
361/* Handle of the OPCODE hash table. NULL means any use before
362 md_begin() will crash. */
363static struct hash_control *op_hash;
364
a4d24084 365/* Init function. Build the hash table. */
ea1562b3 366
252b5132 367void
ea1562b3 368md_begin (void)
252b5132
RH
369{
370 struct tot *tP;
371 char *errorval = 0;
a4d24084 372 int synthetic_too = 1; /* If 0, just use real opcodes. */
252b5132
RH
373
374 op_hash = hash_new ();
375
376 for (tP = totstrs; *tP->name && !errorval; tP++)
377 errorval = hash_insert (op_hash, tP->name, &tP->detail);
378
379 if (synthetic_too)
380 for (tP = synthetic_totstrs; *tP->name && !errorval; tP++)
381 errorval = hash_insert (op_hash, tP->name, &tP->detail);
382
383 if (errorval)
384 as_fatal (errorval);
385}
386\f
5a38dc70 387const char *md_shortopts = "ad:STt:V";
ea1562b3
NC
388
389struct option md_longopts[] =
390{
252b5132
RH
391 {NULL, no_argument, NULL, 0}
392};
ea1562b3 393
bc805888 394size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH
395
396int
ea1562b3 397md_parse_option (int c, char *arg)
252b5132
RH
398{
399 switch (c)
400 {
401 case 'a':
402 as_warn (_("The -a option doesn't exist. (Despite what the man page says!"));
403 break;
404
405 case 'd':
406 as_warn (_("Displacement length %s ignored!"), arg);
407 break;
408
409 case 'S':
410 as_warn (_("SYMBOL TABLE not implemented"));
411 break;
412
413 case 'T':
414 as_warn (_("TOKEN TRACE not implemented"));
415 break;
416
417 case 't':
418 as_warn (_("I don't need or use temp. file \"%s\"."), arg);
419 break;
420
421 case 'V':
422 as_warn (_("I don't use an interpass file! -V ignored"));
423 break;
424
425 default:
426 return 0;
427 }
428
429 return 1;
430}
431
432void
ea1562b3 433md_show_usage (FILE *stream)
252b5132 434{
bc805888 435 fprintf (stream, _("\
252b5132
RH
436Tahoe options:\n\
437-a ignored\n\
438-d LENGTH ignored\n\
439-J ignored\n\
440-S ignored\n\
441-t FILE ignored\n\
442-T ignored\n\
443-V ignored\n"));
444}
445\f
446/* The functions in this section take numbers in the machine format, and
447 munges them into Tahoe byte order.
ea1562b3
NC
448 They exist primarily for cross assembly purpose.
449 Knows about order of bytes in address. */
252b5132 450
ea1562b3
NC
451void
452md_number_to_chars (char con[], /* Return 'nbytes' of chars here. */
453 valueT value, /* The value of the bits. */
454 int nbytes) /* Number of bytes in the output. */
252b5132 455{
ea1562b3 456 number_to_chars_bigendian (con, value, nbytes);
252b5132
RH
457}
458
252b5132 459void
ea1562b3
NC
460md_apply_fix3 (fixS *fixP ATTRIBUTE_UNUSED,
461 valueT * valP ATTRIBUTE_UNUSED,
462 segT seg ATTRIBUTE_UNUSED)
252b5132 463{
94f592af 464 /* Should never be called. */
252b5132
RH
465 know (0);
466}
467
ea1562b3
NC
468void
469md_number_to_disp (char con[]m /* Return 'nbytes' of chars here. */
470 long int value, /* The value of the bits. */
471 int nbytes) /* Number of bytes in the output. */
252b5132
RH
472{
473 md_number_to_chars (con, value, nbytes);
474}
475
252b5132 476void
ea1562b3
NC
477md_number_to_field (char con[], /* Return 'nbytes' of chars here. */
478 long int value, /* The value of the bits. */
479 int nbytes) /* Number of bytes in the output. */
252b5132 480{
ea1562b3 481 md_number_to_chars (con, value, nbytes);
252b5132
RH
482}
483
252b5132
RH
484/* Put the bits in an order that a tahoe will understand, despite the ordering
485 of the native machine.
486 On Tahoe: first 4 bytes are normal unsigned big endian long,
487 next three bytes are symbolnum, in kind of 3 byte big endian (least sig. byte last).
488 The last byte is broken up with bit 7 as pcrel,
489 bits 6 & 5 as length,
a4d24084 490 bit 4 as extern and the last nibble as 'undefined'. */
252b5132 491
a4d24084 492void
ea1562b3
NC
493tc_aout_fix_to_chars (char *where,
494 fixS *fixP,
495 relax_addressT segment_address_in_file)
252b5132
RH
496{
497 long r_symbolnum;
498
499 know (fixP->fx_addsy != NULL);
500
501 md_number_to_chars (where,
502 fixP->fx_frag->fr_address + fixP->fx_where - segment_address_in_file,
503 4);
504
505 r_symbolnum = (S_IS_DEFINED (fixP->fx_addsy)
506 ? S_GET_TYPE (fixP->fx_addsy)
507 : fixP->fx_addsy->sy_number);
508
509 where[4] = (r_symbolnum >> 16) & 0x0ff;
510 where[5] = (r_symbolnum >> 8) & 0x0ff;
511 where[6] = r_symbolnum & 0x0ff;
512 where[7] = (((is_pcrel (fixP) << 7) & 0x80)
513 | ((((fixP->fx_type == FX_8 || fixP->fx_type == FX_PCREL8
514 ? 0
515 : (fixP->fx_type == FX_16 || fixP->fx_type == FX_PCREL16
516 ? 1
517 : (fixP->fx_type == FX_32 || fixP->fx_type == FX_PCREL32
518 ? 2
519 : 42)))) << 5) & 0x60)
520 | ((!S_IS_DEFINED (fixP->fx_addsy) << 4) & 0x10));
521}
522
ea1562b3 523/* Relocate byte stuff. */
252b5132 524\f
a4d24084 525/* This is for broken word. */
2b4f075a 526int md_short_jump_size = 3;
252b5132
RH
527
528void
ea1562b3
NC
529md_create_short_jump (char *ptr,
530 addressT from_addr,
531 addressT to_addr,
532 fragS *frag,
533 symbolS *to_symbol)
252b5132
RH
534{
535 valueT offset;
536
537 offset = to_addr - (from_addr + 1);
538 *ptr++ = TAHOE_BRW;
539 md_number_to_chars (ptr, offset, 2);
540}
541
2b4f075a 542int md_long_jump_size = 6;
ea1562b3 543const int md_reloc_size = 8; /* Size of relocation record. */
252b5132
RH
544
545void
ea1562b3
NC
546md_create_long_jump (char *ptr,
547 addressT from_addr,
548 addressT to_addr,
549 fragS *frag,
550 symbolS *to_symbol)
252b5132
RH
551{
552 valueT offset;
553
554 offset = to_addr - (from_addr + 4);
555 *ptr++ = TAHOE_JMP;
556 *ptr++ = TAHOE_PC_REL_LONG;
557 md_number_to_chars (ptr, offset, 4);
558}
559\f
606ab118
AM
560/* md_estimate_size_before_relax(), called just before relax().
561 Any symbol that is now undefined will not become defined.
562 Return the correct fr_subtype in the frag and the growth beyond
563 fr_fix. */
ea1562b3 564
252b5132 565int
ea1562b3 566md_estimate_size_before_relax (fragS *fragP, segT segment_type)
252b5132 567{
606ab118 568 if (RELAX_LENGTH (fragP->fr_subtype) == STATE_UNDF)
252b5132 569 {
606ab118 570 if (S_GET_SEGMENT (fragP->fr_symbol) != segment)
252b5132 571 {
606ab118
AM
572 /* Non-relaxable cases. */
573 char *p;
574 int old_fr_fix;
252b5132 575
606ab118 576 old_fr_fix = fragP->fr_fix;
252b5132 577 p = fragP->fr_literal + old_fr_fix;
606ab118
AM
578 switch (RELAX_STATE (fragP->fr_subtype))
579 {
580 case STATE_PC_RELATIVE:
581 *p |= TAHOE_PC_OR_LONG;
582 /* We now know how big it will be, one long word. */
583 fragP->fr_fix += 1 + 4;
584 fix_new (fragP, old_fr_fix + 1, fragP->fr_symbol,
585 fragP->fr_offset, FX_PCREL32, NULL);
586 break;
587
588 case STATE_CONDITIONAL_BRANCH:
589 *fragP->fr_opcode ^= 0x10; /* Reverse sense of branch. */
590 *p++ = 6;
591 *p++ = TAHOE_JMP;
592 *p++ = TAHOE_PC_REL_LONG;
593 fragP->fr_fix += 1 + 1 + 1 + 4;
594 fix_new (fragP, old_fr_fix + 3, fragP->fr_symbol,
595 fragP->fr_offset, FX_PCREL32, NULL);
596 break;
597
598 case STATE_BIG_REV_BRANCH:
599 *fragP->fr_opcode ^= 0x10; /* Reverse sense of branch. */
600 *p++ = 0;
601 *p++ = 6;
602 *p++ = TAHOE_JMP;
603 *p++ = TAHOE_PC_REL_LONG;
604 fragP->fr_fix += 2 + 2 + 4;
605 fix_new (fragP, old_fr_fix + 4, fragP->fr_symbol,
606 fragP->fr_offset, FX_PCREL32, NULL);
607 break;
608
609 case STATE_BIG_NON_REV_BRANCH:
610 *p++ = 2;
611 *p++ = 0;
612 *p++ = TAHOE_BRB;
613 *p++ = 6;
614 *p++ = TAHOE_JMP;
615 *p++ = TAHOE_PC_REL_LONG;
616 fragP->fr_fix += 2 + 2 + 2 + 4;
617 fix_new (fragP, old_fr_fix + 6, fragP->fr_symbol,
618 fragP->fr_offset, FX_PCREL32, NULL);
619 break;
620
621 case STATE_ALWAYS_BRANCH:
622 *fragP->fr_opcode = TAHOE_JMP;
623 *p++ = TAHOE_PC_REL_LONG;
624 fragP->fr_fix += 1 + 4;
625 fix_new (fragP, old_fr_fix + 1, fragP->fr_symbol,
626 fragP->fr_offset, FX_PCREL32, NULL);
627 break;
628
629 default:
630 abort ();
631 }
252b5132 632 frag_wane (fragP);
252b5132 633
606ab118
AM
634 /* Return the growth in the fixed part of the frag. */
635 return fragP->fr_fix - old_fr_fix;
252b5132 636 }
252b5132 637
606ab118
AM
638 /* Relaxable cases. Set up the initial guess for the variable
639 part of the frag. */
640 switch (RELAX_STATE (fragP->fr_subtype))
252b5132 641 {
606ab118
AM
642 case STATE_PC_RELATIVE:
643 fragP->fr_subtype = ENCODE_RELAX (STATE_PC_RELATIVE, STATE_BYTE);
644 break;
645 case STATE_CONDITIONAL_BRANCH:
646 fragP->fr_subtype = ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_BYTE);
647 break;
648 case STATE_BIG_REV_BRANCH:
649 fragP->fr_subtype = ENCODE_RELAX (STATE_BIG_REV_BRANCH, STATE_WORD);
650 break;
651 case STATE_BIG_NON_REV_BRANCH:
252b5132 652 fragP->fr_subtype = ENCODE_RELAX (STATE_BIG_NON_REV_BRANCH, STATE_WORD);
606ab118
AM
653 break;
654 case STATE_ALWAYS_BRANCH:
252b5132 655 fragP->fr_subtype = ENCODE_RELAX (STATE_ALWAYS_BRANCH, STATE_BYTE);
606ab118 656 break;
252b5132 657 }
252b5132 658 }
606ab118
AM
659
660 if (fragP->fr_subtype >= sizeof (md_relax_table) / sizeof (md_relax_table[0]))
661 abort ();
662
663 /* Return the size of the variable part of the frag. */
664 return md_relax_table[fragP->fr_subtype].rlx_length;
665}
252b5132 666\f
ea1562b3
NC
667/* Called after relax() is finished.
668 In: Address of frag.
669 fr_type == rs_machine_dependent.
670 fr_subtype is what the address relaxed to.
671
672 Out: Any fixSs and constants are set up.
673 Caller will turn frag into a ".space 0". */
674
252b5132 675void
ea1562b3 676md_convert_frag (object_headers *headers, segT seg, fragS *fragP)
252b5132 677{
ea1562b3
NC
678 char *addressP; /* -> _var to change. */
679 char *opcodeP; /* -> opcode char(s) to change. */
680 short int extension = 0; /* Size of relaxed address.
681 Added to fr_fix: incl. ALL var chars. */
682 symbolS *symbolP;
683 long int where;
684 long int address_of_var;
685 /* Where, in file space, is _var of *fragP? */
686 long int target_address;
687 /* Where, in file space, does addr point? */
252b5132
RH
688
689 know (fragP->fr_type == rs_machine_dependent);
252b5132
RH
690 where = fragP->fr_fix;
691 addressP = fragP->fr_literal + where;
692 opcodeP = fragP->fr_opcode;
693 symbolP = fragP->fr_symbol;
694 know (symbolP);
695 target_address = S_GET_VALUE (symbolP) + fragP->fr_offset;
696 address_of_var = fragP->fr_address + where;
ea1562b3 697
252b5132
RH
698 switch (fragP->fr_subtype)
699 {
700 case ENCODE_RELAX (STATE_PC_RELATIVE, STATE_BYTE):
701 /* *addressP holds the registers number, plus 0x10, if it's deferred
ea1562b3 702 mode. To set up the right mode, just OR the size of this displacement. */
a4d24084 703 /* Byte displacement. */
252b5132
RH
704 *addressP++ |= TAHOE_PC_OR_BYTE;
705 *addressP = target_address - (address_of_var + 2);
706 extension = 2;
707 break;
708
709 case ENCODE_RELAX (STATE_PC_RELATIVE, STATE_WORD):
a4d24084 710 /* Word displacement. */
252b5132
RH
711 *addressP++ |= TAHOE_PC_OR_WORD;
712 md_number_to_chars (addressP, target_address - (address_of_var + 3), 2);
713 extension = 3;
714 break;
715
716 case ENCODE_RELAX (STATE_PC_RELATIVE, STATE_LONG):
a4d24084 717 /* Long word displacement. */
252b5132
RH
718 *addressP++ |= TAHOE_PC_OR_LONG;
719 md_number_to_chars (addressP, target_address - (address_of_var + 5), 4);
720 extension = 5;
721 break;
722
723 case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_BYTE):
724 *addressP = target_address - (address_of_var + 1);
725 extension = 1;
726 break;
727
728 case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_WORD):
a4d24084 729 *opcodeP ^= 0x10; /* Reverse sense of test. */
ea1562b3 730 *addressP++ = 3; /* Jump over word branch. */
252b5132
RH
731 *addressP++ = TAHOE_BRW;
732 md_number_to_chars (addressP, target_address - (address_of_var + 4), 2);
733 extension = 4;
734 break;
735
736 case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_LONG):
a4d24084 737 *opcodeP ^= 0x10; /* Reverse sense of test. */
252b5132
RH
738 *addressP++ = 6;
739 *addressP++ = TAHOE_JMP;
740 *addressP++ = TAHOE_PC_REL_LONG;
741 md_number_to_chars (addressP, target_address, 4);
742 extension = 7;
743 break;
744
745 case ENCODE_RELAX (STATE_ALWAYS_BRANCH, STATE_BYTE):
746 *addressP = target_address - (address_of_var + 1);
747 extension = 1;
748 break;
749
750 case ENCODE_RELAX (STATE_ALWAYS_BRANCH, STATE_WORD):
751 *opcodeP = TAHOE_BRW;
752 md_number_to_chars (addressP, target_address - (address_of_var + 2), 2);
753 extension = 2;
754 break;
755
756 case ENCODE_RELAX (STATE_ALWAYS_BRANCH, STATE_LONG):
757 *opcodeP = TAHOE_JMP;
758 *addressP++ = TAHOE_PC_REL_LONG;
759 md_number_to_chars (addressP, target_address - (address_of_var + 5), 4);
760 extension = 5;
761 break;
762
763 case ENCODE_RELAX (STATE_BIG_REV_BRANCH, STATE_WORD):
764 md_number_to_chars (addressP, target_address - (address_of_var + 2), 2);
765 extension = 2;
766 break;
767
768 case ENCODE_RELAX (STATE_BIG_REV_BRANCH, STATE_LONG):
769 *opcodeP ^= 0x10;
770 *addressP++ = 0;
771 *addressP++ = 6;
772 *addressP++ = TAHOE_JMP;
773 *addressP++ = TAHOE_PC_REL_LONG;
774 md_number_to_chars (addressP, target_address, 4);
775 extension = 8;
776 break;
777
778 case ENCODE_RELAX (STATE_BIG_NON_REV_BRANCH, STATE_WORD):
779 md_number_to_chars (addressP, target_address - (address_of_var + 2), 2);
780 extension = 2;
781 break;
782
783 case ENCODE_RELAX (STATE_BIG_NON_REV_BRANCH, STATE_LONG):
784 *addressP++ = 0;
785 *addressP++ = 2;
786 *addressP++ = TAHOE_BRB;
787 *addressP++ = 6;
788 *addressP++ = TAHOE_JMP;
789 *addressP++ = TAHOE_PC_REL_LONG;
790 md_number_to_chars (addressP, target_address, 4);
791 extension = 10;
792 break;
793
794 default:
795 BAD_CASE (fragP->fr_subtype);
796 break;
797 }
798 fragP->fr_fix += extension;
ea1562b3 799}
252b5132
RH
800\f
801
a4d24084 802/* This is the stuff for md_assemble. */
252b5132
RH
803#define FP_REG 13
804#define SP_REG 14
805#define PC_REG 15
806#define BIGGESTREG PC_REG
807
ea1562b3
NC
808/* Parse the string pointed to by START
809 If it represents a valid register, point START to the character after
810 the last valid register char, and return the register number (0-15).
811 If invalid, leave START alone, return -1.
812 The format has to be exact. I don't do things like eat leading zeros
813 or the like.
814 Note: This doesn't check for the next character in the string making
815 this invalid. Ex: R123 would return 12, it's the callers job to check
816 what start is point to apon return.
817
818 Valid registers are R1-R15, %1-%15, FP (13), SP (14), PC (15)
819 Case doesn't matter. */
820
252b5132 821int
ea1562b3 822tahoe_reg_parse (char **start) /* A pointer to the string to parse. */
252b5132 823{
ea1562b3
NC
824 char *regpoint = *start;
825 int regnum = -1;
252b5132
RH
826
827 switch (*regpoint++)
828 {
829 case '%': /* Registers can start with a %,
a4d24084 830 R or r, and then a number. */
252b5132
RH
831 case 'R':
832 case 'r':
3882b010 833 if (ISDIGIT (*regpoint))
252b5132 834 {
a4d24084 835 /* Got the first digit. */
252b5132 836 regnum = *regpoint++ - '0';
3882b010 837 if ((regnum == 1) && ISDIGIT (*regpoint))
252b5132 838 {
a4d24084 839 /* Its a two digit number. */
252b5132
RH
840 regnum = 10 + (*regpoint++ - '0');
841 if (regnum > BIGGESTREG)
ea1562b3 842 regnum = -1;
252b5132
RH
843 }
844 }
845 break;
ea1562b3 846 case 'F': /* Is it the FP. */
252b5132
RH
847 case 'f':
848 switch (*regpoint++)
849 {
850 case 'p':
851 case 'P':
852 regnum = FP_REG;
853 }
854 break;
ea1562b3 855 case 's': /* How about the SP. */
252b5132
RH
856 case 'S':
857 switch (*regpoint++)
858 {
859 case 'p':
860 case 'P':
861 regnum = SP_REG;
862 }
863 break;
ea1562b3 864 case 'p': /* Or the PC even. */
252b5132
RH
865 case 'P':
866 switch (*regpoint++)
867 {
868 case 'c':
869 case 'C':
870 regnum = PC_REG;
871 }
872 break;
873 }
874
875 if (regnum != -1)
ea1562b3
NC
876 /* No error, so move string pointer. */
877 *start = regpoint;
878
879 return regnum;
880}
252b5132 881\f
ea1562b3
NC
882/* This chops up an operand and figures out its modes and stuff.
883 It's a little touchy about extra characters.
884 Optex to start with one extra character so it can be overwritten for
885 the backward part of the parsing.
886 You can't put a bunch of extra characters in side to
887 make the command look cute. ie: * foo ( r1 ) [ r0 ]
888 If you like doing a lot of typing, try COBOL!
889 Actually, this parser is a little weak all around. It's designed to be
890 used with compliers, so I emphasize correct decoding of valid code quickly
891 rather that catching every possible error.
892 Note: This uses the expression function, so save input_line_pointer before
893 calling.
894
895 Sperry defines the semantics of address modes (and values)
896 by a two-letter code, explained here.
897
898 letter 1: access type
899
900 a address calculation - no data access, registers forbidden
901 b branch displacement
902 m read - let go of bus - write back "modify"
903 r read
904 w write
905 v bit field address: like 'a' but registers are OK
906
907 letter 2: data type (i.e. width, alignment)
908
909 b byte
910 w word
911 l longword
912 q quadword (Even regs < 14 allowed) (if 12, you get a warning)
913 - unconditional synthetic jbr operand
914 ? simple synthetic reversible branch operand
915 ! complex synthetic reversible branch operand
916 : complex synthetic non-reversible branch operand
917
918 The '-?!:' letter 2's are not for external consumption. They are used
919 by GAS for psuedo ops relaxing code.
920
921 After parsing topP has:
922
923 top_ndx: -1, or the index register. eg 7=[R7]
924 top_reg: -1, or register number. eg 7 = R7 or (R7)
925 top_mode: The addressing mode byte. This byte, defines which of
926 the 11 modes opcode is.
927 top_access: Access type wanted for this operand 'b'branch ' '
928 no-instruction 'amrvw'
929 top_width: Operand width expected, one of "bwlq?-:!"
930 exp_of_operand: The expression as parsed by expression()
931 top_dispsize: Number of bytes in the displacement if we can figure it
932 out and it's relevant.
933
934 Need syntax checks built. */
252b5132
RH
935
936void
ea1562b3
NC
937tip_op (char *optex, /* The users text input, with one leading character. */
938 struct top *topP) /* The tahoe instruction with some fields already set:
939 in: access, width
940 out: ndx, reg, mode, error, dispsize. */
252b5132 941{
a4d24084
KH
942 int mode = 0; /* This operand's mode. */
943 char segfault = *optex; /* To keep the back parsing from freaking. */
944 char *point = optex + 1; /* Parsing from front to back. */
945 char *end; /* Parsing from back to front. */
ea1562b3
NC
946 int reg = -1; /* major register, -1 means absent. */
947 int imreg = -1; /* Major register in immediate mode. */
948 int ndx = -1; /* index register number, -1 means absent. */
252b5132 949 char dec_inc = ' '; /* Is the SP auto-incremented '+' or
a4d24084 950 auto-decremented '-' or neither ' '. */
ea1562b3
NC
951 int immediate = 0; /* 1 if '$' immediate mode. */
952 int call_width = 0; /* If the caller casts the displacement. */
953 int abs_width = 0; /* The width of the absolute displacement. */
954 int com_width = 0; /* Displacement width required by branch. */
955 int deferred = 0; /* 1 if '*' deferral is used. */
956 byte disp_size = 0; /* How big is this operand. 0 == don't know. */
957 char *op_bad = ""; /* Bad operand error. */
958 char *tp, *temp, c; /* Temporary holders. */
959 char access = topP->top_access;/* Save on a deref. */
252b5132 960 char width = topP->top_width;
252b5132 961 int really_none = 0; /* Empty expressions evaluate to 0
ea1562b3
NC
962 but I need to know if it's there or not. */
963 expressionS *expP; /* -> expression values for this operand. */
252b5132 964
a4d24084 965 /* Does this command restrict the displacement size. */
252b5132
RH
966 if (access == 'b')
967 com_width = (width == 'b' ? 1 :
968 (width == 'w' ? 2 :
969 (width == 'l' ? 4 : 0)));
970
971 *optex = '\0'; /* This is kind of a back stop for all
ea1562b3 972 the searches to fail on if needed. */
252b5132 973 if (*point == '*')
ea1562b3
NC
974 {
975 /* A dereference? */
252b5132
RH
976 deferred = 1;
977 point++;
978 }
979
ea1562b3
NC
980 /* Force words into a certain mode. */
981 /* Using the ^ operator is ambiguous. If I have an absolute label
982 called 'w' set to, say 2, and I have the expression 'w^1', do I get
983 1, forced to be in word displacement mode, or do I get the value of
984 'w' or'ed with 1 (3 in this case).
985 The default is 'w' as an offset, so that's what I use.
986 Stick with `, it does the same, and isn't ambig. */
252b5132
RH
987
988 if (*point != '\0' && ((point[1] == '^') || (point[1] == '`')))
989 switch (*point)
990 {
991 case 'b':
992 case 'B':
993 case 'w':
994 case 'W':
995 case 'l':
996 case 'L':
997 if (com_width)
998 as_warn (_("Casting a branch displacement is bad form, and is ignored."));
999 else
1000 {
3882b010 1001 c = TOLOWER (*point);
252b5132
RH
1002 call_width = ((c == 'b') ? 1 :
1003 ((c == 'w') ? 2 : 4));
1004 }
1005 point += 2;
1006 break;
1007 }
1008
ea1562b3 1009 /* Setting immediate mode. */
252b5132
RH
1010 if (*point == '$')
1011 {
1012 immediate = 1;
1013 point++;
1014 }
1015
ea1562b3
NC
1016 /* I've pulled off all the easy stuff off the front, move to the end and
1017 yank. */
252b5132 1018
a4d24084 1019 for (end = point; *end != '\0'; end++) /* Move to the end. */
252b5132
RH
1020 ;
1021
ea1562b3 1022 if (end != point) /* Null string? */
252b5132
RH
1023 end--;
1024
1025 if (end > point && *end == ' ' && end[-1] != '\'')
ea1562b3 1026 end--; /* Hop white space. */
252b5132 1027
a4d24084 1028 /* Is this an index reg. */
252b5132
RH
1029 if ((*end == ']') && (end[-1] != '\''))
1030 {
1031 temp = end;
1032
a4d24084 1033 /* Find opening brace. */
252b5132
RH
1034 for (--end; (*end != '[' && end != point); end--)
1035 ;
1036
a4d24084 1037 /* If I found the opening brace, get the index register number. */
252b5132
RH
1038 if (*end == '[')
1039 {
a4d24084 1040 tp = end + 1; /* tp should point to the start of a reg. */
252b5132
RH
1041 ndx = tahoe_reg_parse (&tp);
1042 if (tp != temp)
ea1562b3
NC
1043 /* Reg. parse error. */
1044 ndx = -1;
252b5132 1045 else
ea1562b3
NC
1046 /* Found it, move past brace. */
1047 end--;
1048
252b5132
RH
1049 if (ndx == -1)
1050 {
1051 op_bad = _("Couldn't parse the [index] in this operand.");
a4d24084 1052 end = point; /* Force all the rest of the tests to fail. */
252b5132
RH
1053 }
1054 }
1055 else
1056 {
1057 op_bad = _("Couldn't find the opening '[' for the index of this operand.");
a4d24084 1058 end = point; /* Force all the rest of the tests to fail. */
252b5132
RH
1059 }
1060 }
1061
1062 /* Post increment? */
1063 if (*end == '+')
1064 {
1065 dec_inc = '+';
1066 /* was: *end--; */
1067 end--;
1068 }
1069
ea1562b3 1070 /* Register in parens? */
252b5132
RH
1071 if ((*end == ')') && (end[-1] != '\''))
1072 {
1073 temp = end;
1074
a4d24084 1075 /* Find opening paren. */
252b5132
RH
1076 for (--end; (*end != '(' && end != point); end--)
1077 ;
1078
a4d24084 1079 /* If I found the opening paren, get the register number. */
252b5132
RH
1080 if (*end == '(')
1081 {
1082 tp = end + 1;
1083 reg = tahoe_reg_parse (&tp);
1084 if (tp != temp)
1085 {
a4d24084 1086 /* Not a register, but could be part of the expression. */
252b5132 1087 reg = -1;
ea1562b3
NC
1088 /* Rest the pointer back. */
1089 end = temp;
252b5132
RH
1090 }
1091 else
ea1562b3
NC
1092 /* Found the reg. move before opening paren. */
1093 end--;
252b5132
RH
1094 }
1095 else
1096 {
1097 op_bad = _("Couldn't find the opening '(' for the deref of this operand.");
ea1562b3
NC
1098 /* Force all the rest of the tests to fail. */
1099 end = point;
252b5132
RH
1100 }
1101 }
1102
ea1562b3 1103 /* Pre decrement? */
252b5132
RH
1104 if (*end == '-')
1105 {
1106 if (dec_inc != ' ')
1107 {
1108 op_bad = _("Operand can't be both pre-inc and post-dec.");
1109 end = point;
1110 }
1111 else
1112 {
1113 dec_inc = '-';
252b5132
RH
1114 end--;
1115 }
1116 }
1117
ea1562b3
NC
1118 /* Everything between point and end is the 'expression', unless it's
1119 a register name. */
252b5132
RH
1120 c = end[1];
1121 end[1] = '\0';
1122
1123 tp = point;
ea1562b3
NC
1124 /* Get the immediate register if it is there. */
1125 imreg = tahoe_reg_parse (&point);
252b5132
RH
1126 if (*point != '\0')
1127 {
a4d24084 1128 /* If there is junk after point, then the it's not immediate reg. */
252b5132
RH
1129 point = tp;
1130 imreg = -1;
1131 }
1132
1133 if (imreg != -1 && reg != -1)
1134 op_bad = _("I parsed 2 registers in this operand.");
1135
ea1562b3
NC
1136 /* Evaluate whats left of the expression to see if it's valid.
1137 Note again: This assumes that the calling expression has saved
1138 input_line_pointer. (Nag, nag, nag!). */
252b5132
RH
1139 if (*op_bad == '\0')
1140 {
1994a7c7 1141 /* Statement has no syntax goofs yet: let's sniff the expression. */
252b5132
RH
1142 input_line_pointer = point;
1143 expP = &(topP->exp_of_operand);
1144 topP->seg_of_operand = expression (expP);
1145 switch (expP->X_op)
1146 {
1147 case O_absent:
1148 /* No expression. For BSD4.2 compatibility, missing expression is
ea1562b3 1149 absolute 0. */
252b5132
RH
1150 expP->X_op = O_constant;
1151 expP->X_add_number = 0;
1152 really_none = 1;
1153 case O_constant:
ea1562b3 1154 /* For SEG_ABSOLUTE, we shouldn't need to set X_op_symbol,
a4d24084 1155 X_add_symbol to any particular value. */
252b5132 1156 /* But, we will program defensively. Since this situation occurs
a4d24084 1157 rarely so it costs us little to do so. */
252b5132
RH
1158 expP->X_add_symbol = NULL;
1159 expP->X_op_symbol = NULL;
ea1562b3 1160 /* How many bytes are needed to express this abs value? */
252b5132 1161 abs_width =
ea1562b3
NC
1162 ((((expP->X_add_number & 0xFFFFFF80) == 0)
1163 || ((expP->X_add_number & 0xFFFFFF80) == 0xFFFFFF80)) ? 1 :
1164 (((expP->X_add_number & 0xFFFF8000) == 0)
1165 || ((expP->X_add_number & 0xFFFF8000) == 0xFFFF8000)) ? 2 : 4);
252b5132
RH
1166
1167 case O_symbol:
1168 break;
1169
1170 default:
ea1562b3
NC
1171 /* Major bug. We can't handle the case of an operator
1172 expression in a synthetic opcode variable-length
1173 instruction. We don't have a frag type that is smart
1174 enough to relax an operator, and so we just force all
1175 operators to behave like SEG_PASS1s. Clearly, if there is
1176 a demand we can invent a new or modified frag type and
1177 then coding up a frag for this case will be easy. */
252b5132
RH
1178 need_pass_2 = 1;
1179 op_bad = _("Can't relocate expression error.");
1180 break;
1181
1182 case O_big:
1183 /* This is an error. Tahoe doesn't allow any expressions
1184 bigger that a 32 bit long word. Any bigger has to be referenced
a4d24084 1185 by address. */
252b5132
RH
1186 op_bad = _("Expression is too large for a 32 bits.");
1187 break;
1188 }
ea1562b3 1189
252b5132 1190 if (*input_line_pointer != '\0')
ea1562b3 1191 op_bad = _("Junk at end of expression.");
252b5132
RH
1192 }
1193
1194 end[1] = c;
1195
ea1562b3 1196 /* I'm done, so restore optex. */
252b5132
RH
1197 *optex = segfault;
1198
ea1562b3
NC
1199 /* At this point in the game, we (in theory) have all the components of
1200 the operand at least parsed. Now it's time to check for syntax/semantic
1201 errors, and build the mode.
1202 This is what I have:
1203 deferred = 1 if '*'
1204 call_width = 0,1,2,4
1205 abs_width = 0,1,2,4
1206 com_width = 0,1,2,4
1207 immediate = 1 if '$'
1208 ndx = -1 or reg num
1209 dec_inc = '-' or '+' or ' '
1210 reg = -1 or reg num
1211 imreg = -1 or reg num
1212 topP->exp_of_operand
1213 really_none. */
1214 /* Is there a displacement size? */
252b5132
RH
1215 disp_size = (call_width ? call_width :
1216 (com_width ? com_width :
1217 abs_width ? abs_width : 0));
1218
1219 if (*op_bad == '\0')
1220 {
1221 if (imreg != -1)
1222 {
1223 /* Rn */
1224 mode = TAHOE_DIRECT_REG;
ea1562b3
NC
1225 if (deferred
1226 || immediate
1227 || (dec_inc != ' ')
1228 || (reg != -1)
1229 || !really_none)
252b5132
RH
1230 op_bad = _("Syntax error in direct register mode.");
1231 else if (ndx != -1)
1232 op_bad = _("You can't index a register in direct register mode.");
1233 else if (imreg == SP_REG && access == 'r')
1234 op_bad =
1235 _("SP can't be the source operand with direct register addressing.");
1236 else if (access == 'a')
1237 op_bad = _("Can't take the address of a register.");
1238 else if (access == 'b')
1239 op_bad = _("Direct Register can't be used in a branch.");
1240 else if (width == 'q' && ((imreg % 2) || (imreg > 13)))
1241 op_bad = _("For quad access, the register must be even and < 14.");
1242 else if (call_width)
1243 op_bad = _("You can't cast a direct register.");
1244
1245 if (*op_bad == '\0')
1246 {
ea1562b3 1247 /* No errors, check for warnings. */
252b5132
RH
1248 if (width == 'q' && imreg == 12)
1249 as_warn (_("Using reg 14 for quadwords can tromp the FP register."));
1250
1251 reg = imreg;
1252 }
1253
ea1562b3 1254 /* We know: imm = -1. */
252b5132
RH
1255 }
1256 else if (dec_inc == '-')
1257 {
1258 /* -(SP) */
1259 mode = TAHOE_AUTO_DEC;
1260 if (deferred || immediate || !really_none)
1261 op_bad = _("Syntax error in auto-dec mode.");
1262 else if (ndx != -1)
1263 op_bad = _("You can't have an index auto dec mode.");
1264 else if (access == 'r')
1265 op_bad = _("Auto dec mode cant be used for reading.");
1266 else if (reg != SP_REG)
1267 op_bad = _("Auto dec only works of the SP register.");
1268 else if (access == 'b')
1269 op_bad = _("Auto dec can't be used in a branch.");
1270 else if (width == 'q')
1271 op_bad = _("Auto dec won't work with quadwords.");
1272
ea1562b3 1273 /* We know: imm = -1, dec_inc != '-'. */
252b5132
RH
1274 }
1275 else if (dec_inc == '+')
1276 {
1277 if (immediate || !really_none)
1278 op_bad = _("Syntax error in one of the auto-inc modes.");
1279 else if (deferred)
1280 {
1281 /* *(SP)+ */
1282 mode = TAHOE_AUTO_INC_DEFERRED;
1283 if (reg != SP_REG)
1284 op_bad = _("Auto inc deferred only works of the SP register.");
1285 else if (ndx != -1)
1286 op_bad = _("You can't have an index auto inc deferred mode.");
1287 else if (access == 'b')
1288 op_bad = _("Auto inc can't be used in a branch.");
1289 }
1290 else
1291 {
1292 /* (SP)+ */
1293 mode = TAHOE_AUTO_INC;
1294 if (access == 'm' || access == 'w')
1295 op_bad = _("You can't write to an auto inc register.");
1296 else if (reg != SP_REG)
1297 op_bad = _("Auto inc only works of the SP register.");
1298 else if (access == 'b')
1299 op_bad = _("Auto inc can't be used in a branch.");
1300 else if (width == 'q')
1301 op_bad = _("Auto inc won't work with quadwords.");
1302 else if (ndx != -1)
1303 op_bad = _("You can't have an index in auto inc mode.");
1304 }
1305
ea1562b3 1306 /* We know: imm = -1, dec_inc == ' '. */
252b5132
RH
1307 }
1308 else if (reg != -1)
1309 {
1310 if ((ndx != -1) && (reg == SP_REG))
1311 op_bad = _("You can't index the sp register.");
1312 if (deferred)
1313 {
1314 /* *<disp>(Rn) */
1315 mode = TAHOE_REG_DISP_DEFERRED;
1316 if (immediate)
1317 op_bad = _("Syntax error in register displaced mode.");
1318 }
1319 else if (really_none)
ea1562b3
NC
1320 /* (Rn) */
1321 mode = TAHOE_REG_DEFERRED;
252b5132 1322 else
ea1562b3
NC
1323 /* <disp>(Rn) */
1324 mode = TAHOE_REG_DISP;
252b5132
RH
1325
1326 /* We know: imm = -1, dec_inc == ' ', Reg = -1 */
1327 }
1328 else
1329 {
1330 if (really_none)
1331 op_bad = _("An offest is needed for this operand.");
1332 if (deferred && immediate)
1333 {
1334 /* *$<ADDR> */
1335 mode = TAHOE_ABSOLUTE_ADDR;
1336 disp_size = 4;
1337 }
1338 else if (immediate)
1339 {
1340 /* $<disp> */
1341 mode = TAHOE_IMMEDIATE;
1342 if (ndx != -1)
1343 op_bad = _("You can't index a register in immediate mode.");
1344 if (access == 'a')
1345 op_bad = _("Immediate access can't be used as an address.");
a4d24084 1346 /* ponder the wisdom of a cast because it doesn't do any good. */
252b5132
RH
1347 }
1348 else if (deferred)
ea1562b3
NC
1349 /* *<disp> */
1350 mode = TAHOE_DISP_REL_DEFERRED;
252b5132 1351 else
ea1562b3
NC
1352 /* <disp> */
1353 mode = TAHOE_DISPLACED_RELATIVE;
252b5132
RH
1354 }
1355 }
1356
ea1562b3
NC
1357 /* At this point, all the errors we can do have be checked for.
1358 We can build the 'top'. */
252b5132
RH
1359 topP->top_ndx = ndx;
1360 topP->top_reg = reg;
1361 topP->top_mode = mode;
1362 topP->top_error = op_bad;
1363 topP->top_dispsize = disp_size;
ea1562b3 1364}
252b5132 1365\f
ea1562b3
NC
1366/* This converts a string into a tahoe instruction.
1367 The string must be a bare single instruction in tahoe (with BSD4 frobs)
1368 format.
1369 It provides at most one fatal error message (which stops the scan)
1370 some warning messages as it finds them.
1371 The tahoe instruction is returned in exploded form.
1372
1373 The exploded instruction is returned to a struct tit of your choice.
1374 #include "tahoe-inst.h" to know what a struct tit is. */
252b5132
RH
1375
1376static void
ea1562b3
NC
1377tip (struct tit *titP, /* We build an exploded instruction here. */
1378 char *instring) /* Text of a vax instruction: we modify. */
252b5132 1379{
ea1562b3
NC
1380 struct tot_wot *twP = NULL; /* How to bit-encode this opcode. */
1381 char *p; /* 1/skip whitespace.2/scan vot_how. */
1382 char *q;
1383 unsigned char count; /* Counts number of operands seen. */
1384 struct top *operandp; /* Scan operands in struct tit. */
1385 char *alloperr = ""; /* Error over all operands. */
1386 char c; /* Remember char, (we clobber it with '\0' temporarily). */
252b5132
RH
1387 char *save_input_line_pointer;
1388
1389 if (*instring == ' ')
a4d24084 1390 ++instring; /* Skip leading whitespace. */
252b5132 1391 for (p = instring; *p && *p != ' '; p++)
ea1562b3
NC
1392 ;
1393
a4d24084
KH
1394 /* Scanned up to end of operation-code. */
1395 /* Operation-code is ended with whitespace. */
252b5132
RH
1396 if (p == instring)
1397 {
1398 titP->tit_error = _("No operator");
1399 count = 0;
1400 titP->tit_opcode = 0;
1401 }
1402 else
1403 {
1404 c = *p;
1405 *p = '\0';
ea1562b3
NC
1406
1407 /* Here with instring pointing to what better be an op-name, and p
1408 pointing to character just past that.
1409 We trust instring points to an op-name, with no whitespace. */
252b5132 1410 twP = (struct tot_wot *) hash_find (op_hash, instring);
ea1562b3
NC
1411 /* Restore char after op-code. */
1412 *p = c;
252b5132
RH
1413 if (twP == 0)
1414 {
1415 titP->tit_error = _("Unknown operator");
1416 count = 0;
1417 titP->tit_opcode = 0;
1418 }
1419 else
1420 {
ea1562b3
NC
1421 /* We found a match! So let's pick up as many operands as the
1422 instruction wants, and even gripe if there are too many.
1423 We expect comma to separate each operand.
1424 We let instring track the text, while p tracks a part of the
1425 struct tot. */
1426
1427 /* No operands seen yet. */
1428 count = 0;
1429 /* Point past the operation code. */
1430 instring = p + (*p != '\0');
252b5132 1431 /* tip_op() screws with the input_line_pointer, so save it before
ea1562b3 1432 I jump in. */
252b5132 1433 save_input_line_pointer = input_line_pointer;
ea1562b3 1434
252b5132
RH
1435 for (p = twP->args, operandp = titP->tit_operand;
1436 !*alloperr && *p;
1437 operandp++, p += 2)
1438 {
ea1562b3
NC
1439 /* Here to parse one operand. Leave instring pointing just
1440 past any one ',' that marks the end of this operand. */
252b5132
RH
1441 if (!p[1])
1442 as_fatal (_("Compiler bug: ODD number of bytes in arg structure %s."),
1443 twP->args);
1444 else if (*instring)
1445 {
1446 for (q = instring; (*q != ',' && *q != '\0'); q++)
ea1562b3
NC
1447 /* Jump quoted characters. */
1448 if (*q == '\'' && q[1] != '\0')
1449 q++;
1450
252b5132 1451 c = *q;
ea1562b3
NC
1452 /* Q points to ',' or '\0' that ends argument. C is that
1453 character. */
252b5132
RH
1454 *q = '\0';
1455 operandp->top_access = p[0];
1456 operandp->top_width = p[1];
1457 tip_op (instring - 1, operandp);
ea1562b3
NC
1458 /* Restore input text. */
1459 *q = c;
1460
252b5132 1461 if (*(operandp->top_error))
ea1562b3
NC
1462 alloperr = operandp->top_error;
1463
1464 /* Next operand (if any). */
1465 instring = q + (c ? 1 : 0);
1466 /* Won another argument, may have an operr. */
1467 count++;
252b5132
RH
1468 }
1469 else
1470 alloperr = _("Not enough operands");
1471 }
a4d24084 1472 /* Restore the pointer. */
252b5132
RH
1473 input_line_pointer = save_input_line_pointer;
1474
1475 if (!*alloperr)
1476 {
ea1562b3 1477 /* Skip whitespace. */
252b5132 1478 if (*instring == ' ')
ea1562b3
NC
1479 instring ++;
1480
252b5132
RH
1481 if (*instring)
1482 alloperr = _("Too many operands");
1483 }
ea1562b3 1484
252b5132
RH
1485 titP->tit_error = alloperr;
1486 }
1487 }
1488
ea1562b3 1489 titP->tit_opcode = twP->code;
252b5132 1490 titP->tit_operands = count;
ea1562b3 1491}
252b5132 1492\f
252b5132 1493void
ea1562b3 1494md_assemble (char *instruction_string)
252b5132
RH
1495{
1496 char *p;
ea1562b3
NC
1497 struct top *operandP; /* An operand. Scans all operands. */
1498 expressionS *expP; /* -> expression values for this operand. */
a4d24084 1499 /* These refer to an instruction operand expression. */
252b5132 1500 segT to_seg; /* Target segment of the address. */
ea1562b3
NC
1501 valueT this_add_number;
1502 symbolS *this_add_symbol; /* +ve (minuend) symbol. */
a4d24084 1503 char *opcodeP; /* Where it is in a frag. */
ea1562b3
NC
1504 int dispsize; /* From top_dispsize: tahoe_operand_width (in bytes). */
1505 int is_undefined; /* 1 if operand expression's segment not known yet. */
1506 int pc_rel; /* Is this operand pc relative? */
252b5132 1507
a4d24084 1508 /* Decode the operand. */
252b5132
RH
1509 tip (&t, instruction_string);
1510
ea1562b3
NC
1511 /* Check to see if this operand decode properly.
1512 Notice that we haven't made any frags yet.
1513 If it goofed, then this instruction will wedge in any pass,
1514 and we can safely flush it, without causing interpass symbol phase
1515 errors. That is, without changing label values in different passes. */
1516
252b5132 1517 if (*t.tit_error)
ea1562b3 1518 as_warn (_("Ignoring statement due to \"%s\""), t.tit_error);
252b5132
RH
1519 else
1520 {
ea1562b3 1521 /* We saw no errors in any operands - try to make frag(s). */
a4d24084
KH
1522 /* Emit op-code. */
1523 /* Remember where it is, in case we want to modify the op-code later. */
252b5132
RH
1524 opcodeP = frag_more (1);
1525 *opcodeP = t.tit_opcode;
a4d24084 1526 /* Now do each operand. */
252b5132
RH
1527 for (operandP = t.tit_operand;
1528 operandP < t.tit_operand + t.tit_operands;
1529 operandP++)
1530 { /* for each operand */
1531 expP = &(operandP->exp_of_operand);
1532 if (operandP->top_ndx >= 0)
1533 {
1534 /* Indexed addressing byte
ea1562b3 1535 Legality of indexed mode already checked: it is OK. */
252b5132
RH
1536 FRAG_APPEND_1_CHAR (0x40 + operandP->top_ndx);
1537 } /* if(top_ndx>=0) */
1538
a4d24084 1539 /* Here to make main operand frag(s). */
252b5132
RH
1540 this_add_number = expP->X_add_number;
1541 this_add_symbol = expP->X_add_symbol;
1542 to_seg = operandP->seg_of_operand;
ea1562b3
NC
1543 know (to_seg == SEG_UNKNOWN \
1544 || to_seg == SEG_ABSOLUTE \
1545 || to_seg == SEG_DATA \
1546 || to_seg == SEG_TEXT \
1547 || to_seg == SEG_BSS);
252b5132 1548 is_undefined = (to_seg == SEG_UNKNOWN);
ea1562b3 1549 /* Do we know how big this operand is? */
252b5132
RH
1550 dispsize = operandP->top_dispsize;
1551 pc_rel = 0;
ea1562b3 1552 /* Deal with the branch possibilities. (Note, this doesn't include jumps.) */
252b5132
RH
1553 if (operandP->top_access == 'b')
1554 {
1555 /* Branches must be expressions. A psuedo branch can also jump to
ea1562b3 1556 an absolute address. */
252b5132
RH
1557 if (to_seg == now_seg || is_undefined)
1558 {
a4d24084 1559 /* If is_undefined, then it might BECOME now_seg by relax time. */
252b5132
RH
1560 if (dispsize)
1561 {
1562 /* I know how big the branch is supposed to be (it's a normal
ea1562b3 1563 branch), so I set up the frag, and let GAS do the rest. */
252b5132
RH
1564 p = frag_more (dispsize);
1565 fix_new (frag_now, p - frag_now->fr_literal,
1566 this_add_symbol, this_add_number,
1567 size_to_fx (dispsize, 1),
1568 NULL);
1569 }
1570 else
1571 {
252b5132 1572 /* If we don't know how big it is, then its a synthetic branch,
ea1562b3 1573 so we set up a simple relax state. */
252b5132
RH
1574 switch (operandP->top_width)
1575 {
1576 case TAHOE_WIDTH_CONDITIONAL_JUMP:
1577 /* Simple (conditional) jump. I may have to reverse the
ea1562b3
NC
1578 condition of opcodeP, and then jump to my destination.
1579 I set 1 byte aside for the branch off set, and could need 6
1580 more bytes for the pc_rel jump. */
252b5132
RH
1581 frag_var (rs_machine_dependent, 7, 1,
1582 ENCODE_RELAX (STATE_CONDITIONAL_BRANCH,
1583 is_undefined ? STATE_UNDF : STATE_BYTE),
1584 this_add_symbol, this_add_number, opcodeP);
1585 break;
1586 case TAHOE_WIDTH_ALWAYS_JUMP:
1587 /* Simple (unconditional) jump. I may have to convert this to
ea1562b3 1588 a word branch, or an absolute jump. */
252b5132
RH
1589 frag_var (rs_machine_dependent, 5, 1,
1590 ENCODE_RELAX (STATE_ALWAYS_BRANCH,
1591 is_undefined ? STATE_UNDF : STATE_BYTE),
1592 this_add_symbol, this_add_number, opcodeP);
1593 break;
a4d24084 1594 /* The smallest size for the next 2 cases is word. */
252b5132
RH
1595 case TAHOE_WIDTH_BIG_REV_JUMP:
1596 frag_var (rs_machine_dependent, 8, 2,
1597 ENCODE_RELAX (STATE_BIG_REV_BRANCH,
1598 is_undefined ? STATE_UNDF : STATE_WORD),
1599 this_add_symbol, this_add_number,
1600 opcodeP);
1601 break;
1602 case TAHOE_WIDTH_BIG_NON_REV_JUMP:
1603 frag_var (rs_machine_dependent, 10, 2,
1604 ENCODE_RELAX (STATE_BIG_NON_REV_BRANCH,
1605 is_undefined ? STATE_UNDF : STATE_WORD),
1606 this_add_symbol, this_add_number,
1607 opcodeP);
1608 break;
1609 default:
1610 as_fatal (_("Compliler bug: Got a case (%d) I wasn't expecting."),
1611 operandP->top_width);
1612 }
1613 }
1614 }
1615 else
1616 {
1617 /* to_seg != now_seg && to_seg != seg_unknown (still in branch)
ea1562b3
NC
1618 In other words, I'm jumping out of my segment so extend the
1619 branches to jumps, and let GAS fix them. */
252b5132
RH
1620
1621 /* These are "branches" what will always be branches around a jump
ea1562b3
NC
1622 to the correct address in real life.
1623 If to_seg is SEG_ABSOLUTE, just encode the branch in,
1624 else let GAS fix the address. */
252b5132
RH
1625
1626 switch (operandP->top_width)
1627 {
1628 /* The theory:
ea1562b3
NC
1629 For SEG_ABSOLUTE, then mode is ABSOLUTE_ADDR, jump
1630 to that address (not pc_rel).
1631 For other segs, address is a long word PC rel jump. */
252b5132
RH
1632 case TAHOE_WIDTH_CONDITIONAL_JUMP:
1633 /* b<cond> */
1634 /* To reverse the condition in a TAHOE branch,
ea1562b3 1635 complement bit 4 */
252b5132
RH
1636 *opcodeP ^= 0x10;
1637 p = frag_more (7);
1638 *p++ = 6;
1639 *p++ = TAHOE_JMP;
1640 *p++ = (operandP->top_mode ==
1641 TAHOE_ABSOLUTE_ADDR ? TAHOE_ABSOLUTE_ADDR :
1642 TAHOE_PC_REL_LONG);
1643 fix_new (frag_now, p - frag_now->fr_literal,
1644 this_add_symbol, this_add_number,
1645 (to_seg != SEG_ABSOLUTE) ? FX_PCREL32 : FX_32, NULL);
ea1562b3
NC
1646
1647 /* Now (eg) BLEQ 1f
1648 JMP foo
1649 1: */
252b5132 1650 break;
ea1562b3 1651
252b5132 1652 case TAHOE_WIDTH_ALWAYS_JUMP:
ea1562b3 1653 /* Br, just turn it into a jump. */
252b5132
RH
1654 *opcodeP = TAHOE_JMP;
1655 p = frag_more (5);
1656 *p++ = (operandP->top_mode ==
1657 TAHOE_ABSOLUTE_ADDR ? TAHOE_ABSOLUTE_ADDR :
1658 TAHOE_PC_REL_LONG);
1659 fix_new (frag_now, p - frag_now->fr_literal,
1660 this_add_symbol, this_add_number,
1661 (to_seg != SEG_ABSOLUTE) ? FX_PCREL32 : FX_32, NULL);
ea1562b3 1662 /* Now (eg) JMP foo. */
252b5132 1663 break;
ea1562b3 1664
252b5132
RH
1665 case TAHOE_WIDTH_BIG_REV_JUMP:
1666 p = frag_more (8);
1667 *opcodeP ^= 0x10;
1668 *p++ = 0;
1669 *p++ = 6;
1670 *p++ = TAHOE_JMP;
1671 *p++ = (operandP->top_mode ==
1672 TAHOE_ABSOLUTE_ADDR ? TAHOE_ABSOLUTE_ADDR :
1673 TAHOE_PC_REL_LONG);
1674 fix_new (frag_now, p - frag_now->fr_literal,
1675 this_add_symbol, this_add_number,
1676 (to_seg != SEG_ABSOLUTE) ? FX_PCREL32 : FX_32, NULL);
ea1562b3
NC
1677 /* Now (eg) ACBx 1f
1678 JMP foo
1679 1: */
252b5132 1680 break;
ea1562b3 1681
252b5132
RH
1682 case TAHOE_WIDTH_BIG_NON_REV_JUMP:
1683 p = frag_more (10);
1684 *p++ = 0;
1685 *p++ = 2;
1686 *p++ = TAHOE_BRB;
1687 *p++ = 6;
1688 *p++ = TAHOE_JMP;
1689 *p++ = (operandP->top_mode ==
1690 TAHOE_ABSOLUTE_ADDR ? TAHOE_ABSOLUTE_ADDR :
1691 TAHOE_PC_REL_LONG);
1692 fix_new (frag_now, p - frag_now->fr_literal,
1693 this_add_symbol, this_add_number,
1694 (to_seg != SEG_ABSOLUTE) ? FX_PCREL32 : FX_32, NULL);
ea1562b3
NC
1695 /* Now (eg) xOBxxx 1f
1696 BRB 2f
1697 1: JMP @#foo
1698 2: */
252b5132
RH
1699 break;
1700 case 'b':
1701 case 'w':
1702 as_warn (_("Real branch displacements must be expressions."));
1703 break;
1704 default:
1705 as_fatal (_("Complier error: I got an unknown synthetic branch :%c"),
1706 operandP->top_width);
1707 break;
1708 }
1709 }
1710 }
1711 else
1712 {
a4d24084 1713 /* It ain't a branch operand. */
252b5132
RH
1714 switch (operandP->top_mode)
1715 {
1716 /* Auto-foo access, only works for one reg (SP)
ea1562b3 1717 so the only thing needed is the mode. */
252b5132
RH
1718 case TAHOE_AUTO_DEC:
1719 case TAHOE_AUTO_INC:
1720 case TAHOE_AUTO_INC_DEFERRED:
1721 FRAG_APPEND_1_CHAR (operandP->top_mode);
1722 break;
1723
1724 /* Numbered Register only access. Only thing needed is the
ea1562b3 1725 mode + Register number. */
252b5132
RH
1726 case TAHOE_DIRECT_REG:
1727 case TAHOE_REG_DEFERRED:
1728 FRAG_APPEND_1_CHAR (operandP->top_mode + operandP->top_reg);
1729 break;
1730
1731 /* An absolute address. It's size is always 5 bytes.
ea1562b3 1732 (mode_type + 4 byte address). */
252b5132
RH
1733 case TAHOE_ABSOLUTE_ADDR:
1734 know ((this_add_symbol == NULL));
1735 p = frag_more (5);
1736 *p = TAHOE_ABSOLUTE_ADDR;
1737 md_number_to_chars (p + 1, this_add_number, 4);
1738 break;
1739
1740 /* Immediate data. If the size isn't known, then it's an address
ea1562b3 1741 + and offset, which is 4 bytes big. */
252b5132
RH
1742 case TAHOE_IMMEDIATE:
1743 if (this_add_symbol != NULL)
1744 {
1745 p = frag_more (5);
1746 *p++ = TAHOE_IMMEDIATE_LONGWORD;
1747 fix_new (frag_now, p - frag_now->fr_literal,
1748 this_add_symbol, this_add_number,
1749 FX_32, NULL);
1750 }
1751 else
1752 {
b6ff326e 1753 /* It's an integer, and I know it's size. */
252b5132 1754 if ((unsigned) this_add_number < 0x40)
ea1562b3
NC
1755 /* Will it fit in a literal? */
1756 FRAG_APPEND_1_CHAR ((byte) this_add_number);
252b5132
RH
1757 else
1758 {
1759 p = frag_more (dispsize + 1);
1760 switch (dispsize)
1761 {
1762 case 1:
1763 *p++ = TAHOE_IMMEDIATE_BYTE;
1764 *p = (byte) this_add_number;
1765 break;
1766 case 2:
1767 *p++ = TAHOE_IMMEDIATE_WORD;
1768 md_number_to_chars (p, this_add_number, 2);
1769 break;
1770 case 4:
1771 *p++ = TAHOE_IMMEDIATE_LONGWORD;
1772 md_number_to_chars (p, this_add_number, 4);
1773 break;
1774 }
1775 }
1776 }
1777 break;
1778
1779 /* Distance from the PC. If the size isn't known, we have to relax
ea1562b3
NC
1780 into it. The difference between this and disp(sp) is that
1781 this offset is pc_rel, and disp(sp) isn't.
1782 Note the drop through code. */
252b5132
RH
1783
1784 case TAHOE_DISPLACED_RELATIVE:
1785 case TAHOE_DISP_REL_DEFERRED:
1786 operandP->top_reg = PC_REG;
1787 pc_rel = 1;
1788
1789 /* Register, plus a displacement mode. Save the register number,
ea1562b3
NC
1790 and weather its deffered or not, and relax the size if it isn't
1791 known. */
252b5132
RH
1792 case TAHOE_REG_DISP:
1793 case TAHOE_REG_DISP_DEFERRED:
ea1562b3
NC
1794 if (operandP->top_mode == TAHOE_DISP_REL_DEFERRED
1795 || operandP->top_mode == TAHOE_REG_DISP_DEFERRED)
1796 /* Deffered mode is always 0x10 higher than it's non-deffered sibling. */
1797 operandP->top_reg += 0x10;
252b5132
RH
1798
1799 /* Is this a value out of this segment?
ea1562b3
NC
1800 The first part of this conditional is a cludge to make gas
1801 produce the same output as 'as' when there is a lable, in
1802 the current segment, displacing a register. It's strange,
1803 and no one in their right mind would do it, but it's easy
1804 to cludge. */
1805 if ((dispsize == 0 && !pc_rel)
1806 || (to_seg != now_seg && !is_undefined && to_seg != SEG_ABSOLUTE))
252b5132
RH
1807 dispsize = 4;
1808
1809 if (dispsize == 0)
1810 {
ea1562b3
NC
1811 /* We have a SEG_UNKNOWN symbol, or the size isn't cast.
1812 It might turn out to be in the same segment as
1813 the instruction, permitting relaxation. */
252b5132
RH
1814 p = frag_var (rs_machine_dependent, 5, 2,
1815 ENCODE_RELAX (STATE_PC_RELATIVE,
1816 is_undefined ? STATE_UNDF : STATE_BYTE),
1817 this_add_symbol, this_add_number, 0);
1818 *p = operandP->top_reg;
1819 }
1820 else
1821 {
a4d24084 1822 /* Either this is an abs, or a cast. */
252b5132
RH
1823 p = frag_more (dispsize + 1);
1824 switch (dispsize)
1825 {
1826 case 1:
1827 *p = TAHOE_PC_OR_BYTE + operandP->top_reg;
1828 break;
1829 case 2:
1830 *p = TAHOE_PC_OR_WORD + operandP->top_reg;
1831 break;
1832 case 4:
1833 *p = TAHOE_PC_OR_LONG + operandP->top_reg;
1834 break;
1835 };
1836 fix_new (frag_now, p + 1 - frag_now->fr_literal,
1837 this_add_symbol, this_add_number,
1838 size_to_fx (dispsize, pc_rel), NULL);
1839 }
1840 break;
1841 default:
1842 as_fatal (_("Barf, bad mode %x\n"), operandP->top_mode);
1843 }
1844 }
ea1562b3
NC
1845 }
1846 }
1847}
252b5132 1848
a4d24084 1849/* We have no need to default values of symbols. */
252b5132 1850
252b5132 1851symbolS *
ea1562b3 1852md_undefined_symbol (char *name)
252b5132
RH
1853{
1854 return 0;
ea1562b3 1855}
252b5132 1856
a4d24084 1857/* Round up a section size to the appropriate boundary. */
ea1562b3 1858
252b5132 1859valueT
ea1562b3 1860md_section_align (segT segment, valueT size)
252b5132 1861{
ea1562b3
NC
1862 /* Round all sects to multiple of 8. */
1863 return ((size + 7) & ~7);
1864}
252b5132
RH
1865
1866/* Exactly what point is a PC-relative offset relative TO?
1867 On the sparc, they're relative to the address of the offset, plus
1868 its size. This gets us to the following instruction.
1869 (??? Is this right? FIXME-SOON) */
ea1562b3 1870
a4d24084 1871long
ea1562b3 1872md_pcrel_from (fixS *fixP)
252b5132
RH
1873{
1874 return (((fixP->fx_type == FX_8
1875 || fixP->fx_type == FX_PCREL8)
1876 ? 1
1877 : ((fixP->fx_type == FX_16
1878 || fixP->fx_type == FX_PCREL16)
1879 ? 2
1880 : ((fixP->fx_type == FX_32
1881 || fixP->fx_type == FX_PCREL32)
1882 ? 4
1883 : 0))) + fixP->fx_where + fixP->fx_frag->fr_address);
ea1562b3 1884}
252b5132 1885
a4d24084 1886int
ea1562b3 1887tc_is_pcrel (fixS *fixP)
252b5132 1888{
ea1562b3 1889 /* Should never be called. */
252b5132 1890 know (0);
ea1562b3
NC
1891 return 0;
1892}
This page took 0.49101 seconds and 4 git commands to generate.