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[PATCH, COMMITTED] [AArch64] Replace the :got_prel19: address modifier with :got:
[deliverable/binutils-gdb.git] / gas / config / tc-tic6x.c
CommitLineData
40b36596 1/* TI C6X assembler.
795b8e6b 2 Copyright 2010-2013 Free Software Foundation, Inc.
c0621d88
NS		 3 Contributed by Joseph Myers <joseph@codesourcery.com>
4 Bernd Schmidt <bernds@codesourcery.com>
40b36596
JM		 5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
21 02110-1301, USA. */
22
23#include "as.h"
24#include "dwarf2dbg.h"
1bce6bd8 25#include "dw2gencfi.h"
40b36596
JM		 26#include "safe-ctype.h"
27#include "subsegs.h"
28#include "opcode/tic6x.h"
59e6276b 29#include "elf/tic6x.h"
41820509 30#include "elf32-tic6x.h"
40b36596
JM		 31
32/* Truncate and sign-extend at 32 bits, so that building on a 64-bit
33 host gives identical results to a 32-bit host. */
34#define TRUNC(X) ((valueT) (X) & 0xffffffffU)
35#define SEXT(X) ((TRUNC (X) ^ 0x80000000U) - 0x80000000U)
36
1bce6bd8
PB		 37#define streq(a, b) (strcmp (a, b) == 0)
38
ac145307
BS		 39/* Stuff for .scomm symbols. */
40static segT sbss_section;
41static asection scom_section;
42static asymbol scom_symbol;
43
40b36596
JM		 44const char comment_chars[] = ";";
45const char line_comment_chars[] = "#*;";
46const char line_separator_chars[] = "@";
47
48const char EXP_CHARS[] = "eE";
49const char FLT_CHARS[] = "dDfF";
50
51const char *md_shortopts = "";
52
53enum
54 {
55 OPTION_MARCH = OPTION_MD_BASE,
40b36596 56 OPTION_MBIG_ENDIAN,
41820509 57 OPTION_MLITTLE_ENDIAN,
b5593623
JM		 58 OPTION_MDSBT,
59 OPTION_MNO_DSBT,
87779176
JM		 60 OPTION_MPID,
61 OPTION_MPIC,
62 OPTION_MNO_PIC,
41820509 63 OPTION_MGENERATE_REL
40b36596
JM		 64 };
65
66struct option md_longopts[] =
67 {
68 { "march", required_argument, NULL, OPTION_MARCH },
40b36596
JM		 69 { "mbig-endian", no_argument, NULL, OPTION_MBIG_ENDIAN },
70 { "mlittle-endian", no_argument, NULL, OPTION_MLITTLE_ENDIAN },
b5593623
JM		 71 { "mdsbt", no_argument, NULL, OPTION_MDSBT },
72 { "mno-dsbt", no_argument, NULL, OPTION_MNO_DSBT },
87779176
JM		 73 { "mpid", required_argument, NULL, OPTION_MPID },
74 { "mpic", no_argument, NULL, OPTION_MPIC },
75 { "mno-pic", no_argument, NULL, OPTION_MNO_PIC },
41820509 76 { "mgenerate-rel", no_argument, NULL, OPTION_MGENERATE_REL },
40b36596
JM		 77 { NULL, no_argument, NULL, 0 }
78 };
79size_t md_longopts_size = sizeof (md_longopts);
80
40b36596 81/* The instructions enabled based only on the selected architecture
98d23bef 82 (all instructions, if no architecture specified). */
40b36596
JM		 83static unsigned short tic6x_arch_enable = (TIC6X_INSN_C62X
84 | TIC6X_INSN_C64X
85 | TIC6X_INSN_C64XP
86 | TIC6X_INSN_C67X
87 | TIC6X_INSN_C67XP
98d23bef 88 | TIC6X_INSN_C674X);
40b36596
JM		 89
90/* The instructions enabled based on the current set of features
91 (architecture, as modified by other options). */
92static unsigned short tic6x_features;
93
75fa6dc1 94/* The architecture attribute value, or C6XABI_Tag_ISA_none if
59e6276b 95 not yet set. */
75fa6dc1 96static int tic6x_arch_attribute = C6XABI_Tag_ISA_none;
59e6276b
JM		 97
98/* Whether any instructions at all have been seen. Once any
99 instructions have been seen, architecture attributes merge into the
100 previous attribute value rather than replacing it. */
101static bfd_boolean tic6x_seen_insns = FALSE;
102
40b36596
JM		 103/* The number of registers in each register file supported by the
104 current architecture. */
105static unsigned int tic6x_num_registers;
106
107/* Whether predication on A0 is possible. */
108static bfd_boolean tic6x_predicate_a0;
109
110/* Whether execute packets can cross fetch packet boundaries. */
111static bfd_boolean tic6x_can_cross_fp_boundary;
112
113/* Whether there are constraints on simultaneous reads and writes of
114 40-bit data. */
115static bfd_boolean tic6x_long_data_constraints;
116
117/* Whether compact instructions are available. */
118static bfd_boolean tic6x_compact_insns;
119
41820509
JM		 120/* Whether to generate RELA relocations. */
121static bfd_boolean tic6x_generate_rela = TRUE;
122
b5593623
JM		 123/* Whether the code uses DSBT addressing. */
124static bfd_boolean tic6x_dsbt;
125
87779176
JM		 126/* Types of position-independent data (attribute values for
127 Tag_ABI_PID). */
128typedef enum
129 {
130 tic6x_pid_no = 0,
131 tic6x_pid_near = 1,
132 tic6x_pid_far = 2
133 } tic6x_pid_type;
134
135/* The type of data addressing used in this code. */
136static tic6x_pid_type tic6x_pid;
137
138/* Whether the code uses position-independent code. */
139static bfd_boolean tic6x_pic;
140
40b36596
JM		 141/* Table of supported architecture variants. */
142typedef struct
143{
144 const char *arch;
59e6276b 145 int attr;
40b36596
JM		 146 unsigned short features;
147} tic6x_arch_table;
148static const tic6x_arch_table tic6x_arches[] =
149 {
75fa6dc1
JM		 150 { "c62x", C6XABI_Tag_ISA_C62X, TIC6X_INSN_C62X },
151 { "c64x", C6XABI_Tag_ISA_C64X, TIC6X_INSN_C62X | TIC6X_INSN_C64X },
152 { "c64x+", C6XABI_Tag_ISA_C64XP, (TIC6X_INSN_C62X
153 | TIC6X_INSN_C64X
154 | TIC6X_INSN_C64XP) },
155 { "c67x", C6XABI_Tag_ISA_C67X, TIC6X_INSN_C62X | TIC6X_INSN_C67X },
156 { "c67x+", C6XABI_Tag_ISA_C67XP, (TIC6X_INSN_C62X
157 | TIC6X_INSN_C67X
158 | TIC6X_INSN_C67XP) },
159 { "c674x", C6XABI_Tag_ISA_C674X, (TIC6X_INSN_C62X
160 | TIC6X_INSN_C64X
161 | TIC6X_INSN_C64XP
162 | TIC6X_INSN_C67X
163 | TIC6X_INSN_C67XP
164 | TIC6X_INSN_C674X) }
40b36596
JM		 165 };
166
1bce6bd8
PB		 167/* Caller saved register encodings. The standard frame layout uses this
168 order, starting from the highest address. There must be
169 TIC6X_NUM_UNWIND_REGS values. */
170enum
171{
172 UNWIND_A15,
173 UNWIND_B15,
174 UNWIND_B14,
175 UNWIND_B13,
176 UNWIND_B12,
177 UNWIND_B11,
178 UNWIND_B10,
179 UNWIND_B3,
180 UNWIND_A14,
181 UNWIND_A13,
182 UNWIND_A12,
183 UNWIND_A11,
184 UNWIND_A10
185};
186
187static void tic6x_output_unwinding (bfd_boolean need_extab);
188
189/* Return the frame unwind state for the current function, allocating
190 as necessary. */
191
192static tic6x_unwind_info *tic6x_get_unwind (void)
193{
194 tic6x_unwind_info *unwind;
195
196 unwind = seg_info (now_seg)->tc_segment_info_data.unwind;
197 if (unwind)
198 return unwind;
199
200 unwind = seg_info (now_seg)->tc_segment_info_data.text_unwind;
201 if (unwind)
202 return unwind;
203
204 unwind = (tic6x_unwind_info *)xmalloc (sizeof (tic6x_unwind_info));
205 seg_info (now_seg)->tc_segment_info_data.unwind = unwind;
206 memset (unwind, 0, sizeof (*unwind));
207 return unwind;
208}
209
40b36596
JM		 210/* Update the selected architecture based on ARCH, giving an error if
211 ARCH is an invalid value. Does not call tic6x_update_features; the
212 caller must do that if necessary. */
213
214static void
215tic6x_use_arch (const char *arch)
216{
217 unsigned int i;
218
219 for (i = 0; i < ARRAY_SIZE (tic6x_arches); i++)
220 if (strcmp (arch, tic6x_arches[i].arch) == 0)
221 {
222 tic6x_arch_enable = tic6x_arches[i].features;
59e6276b
JM		 223 if (tic6x_seen_insns)
224 tic6x_arch_attribute
225 = elf32_tic6x_merge_arch_attributes (tic6x_arch_attribute,
226 tic6x_arches[i].attr);
227 else
228 tic6x_arch_attribute = tic6x_arches[i].attr;
40b36596
JM		 229 return;
230 }
231
232 as_bad (_("unknown architecture '%s'"), arch);
233}
234
87779176
JM		 235/* Table of supported -mpid arguments. */
236typedef struct
237{
238 const char *arg;
239 tic6x_pid_type attr;
240} tic6x_pid_type_table;
241static const tic6x_pid_type_table tic6x_pid_types[] =
242 {
243 { "no", tic6x_pid_no },
244 { "near", tic6x_pid_near },
245 { "far", tic6x_pid_far }
246 };
247
248/* Handle -mpid=ARG. */
249
250static void
251tic6x_use_pid (const char *arg)
252{
253 unsigned int i;
254
255 for (i = 0; i < ARRAY_SIZE (tic6x_pid_types); i++)
256 if (strcmp (arg, tic6x_pid_types[i].arg) == 0)
257 {
258 tic6x_pid = tic6x_pid_types[i].attr;
259 return;
260 }
261
262 as_bad (_("unknown -mpid= argument '%s'"), arg);
263}
264
40b36596
JM		 265/* Parse a target-specific option. */
266
267int
268md_parse_option (int c, char *arg)
269{
270 switch (c)
271 {
272 case OPTION_MARCH:
273 tic6x_use_arch (arg);
274 break;
275
40b36596
JM		 276 case OPTION_MBIG_ENDIAN:
277 target_big_endian = 1;
278 break;
279
280 case OPTION_MLITTLE_ENDIAN:
281 target_big_endian = 0;
282 break;
283
b5593623
JM		 284 case OPTION_MDSBT:
285 tic6x_dsbt = 1;
286 break;
287
288 case OPTION_MNO_DSBT:
289 tic6x_dsbt = 0;
290 break;
291
87779176
JM		 292 case OPTION_MPID:
293 tic6x_use_pid (arg);
294 break;
295
296 case OPTION_MPIC:
297 tic6x_pic = 1;
298 break;
299
300 case OPTION_MNO_PIC:
301 tic6x_pic = 0;
302 break;
303
41820509
JM		 304 case OPTION_MGENERATE_REL:
305 tic6x_generate_rela = FALSE;
306 break;
307
40b36596
JM		 308 default:
309 return 0;
310 }
311 return 1;
312}
313
314void
315md_show_usage (FILE *stream ATTRIBUTE_UNUSED)
316{
317 unsigned int i;
318
319 fputc ('\n', stream);
320 fprintf (stream, _("TMS320C6000 options:\n"));
321 fprintf (stream, _(" -march=ARCH enable instructions from architecture ARCH\n"));
40b36596
JM		 322 fprintf (stream, _(" -mbig-endian generate big-endian code\n"));
323 fprintf (stream, _(" -mlittle-endian generate little-endian code\n"));
b5593623
JM		 324 fprintf (stream, _(" -mdsbt code uses DSBT addressing\n"));
325 fprintf (stream, _(" -mno-dsbt code does not use DSBT addressing\n"));
87779176
JM		 326 fprintf (stream, _(" -mpid=no code uses position-dependent data addressing\n"));
327 fprintf (stream, _(" -mpid=near code uses position-independent data addressing,\n"
328 " GOT accesses use near DP addressing\n"));
329 fprintf (stream, _(" -mpid=far code uses position-independent data addressing,\n"
330 " GOT accesses use far DP addressing\n"));
331 fprintf (stream, _(" -mpic code addressing is position-independent\n"));
332 fprintf (stream, _(" -mno-pic code addressing is position-dependent\n"));
41820509
JM		 333 /* -mgenerate-rel is only for testsuite use and is deliberately
334 undocumented. */
40b36596
JM		 335
336 fputc ('\n', stream);
337 fprintf (stream, _("Supported ARCH values are:"));
338 for (i = 0; i < ARRAY_SIZE (tic6x_arches); i++)
339 fprintf (stream, " %s", tic6x_arches[i].arch);
340 fputc ('\n', stream);
341}
342
343/* Update enabled features based on the current architecture and
344 related settings. */
345static void
346tic6x_update_features (void)
347{
98d23bef 348 tic6x_features = tic6x_arch_enable;
40b36596
JM		 349
350 tic6x_num_registers
351 = (tic6x_arch_enable & (TIC6X_INSN_C64X | TIC6X_INSN_C67XP)) ? 32 : 16;
352
353 tic6x_predicate_a0 = (tic6x_arch_enable & TIC6X_INSN_C64X) ? TRUE : FALSE;
354
355 tic6x_can_cross_fp_boundary
356 = (tic6x_arch_enable
357 & (TIC6X_INSN_C64X | TIC6X_INSN_C67XP)) ? TRUE : FALSE;
358
359 tic6x_long_data_constraints
360 = (tic6x_arch_enable & TIC6X_INSN_C64X) ? FALSE : TRUE;
361
362 tic6x_compact_insns = (tic6x_arch_enable & TIC6X_INSN_C64XP) ? TRUE : FALSE;
363}
364
365/* Do configuration after all options have been parsed. */
366
367void
368tic6x_after_parse_args (void)
369{
370 tic6x_update_features ();
371}
372
1bce6bd8
PB		 373/* Parse a .cantunwind directive. */
374static void
375s_tic6x_cantunwind (int ignored ATTRIBUTE_UNUSED)
376{
377 tic6x_unwind_info *unwind = tic6x_get_unwind ();
378
379 /* GCC sometimes spits out superfluous .cantunwind directives, so ignore
380 them. */
381 if (unwind->data_bytes == 0)
382 return;
383
384 if (unwind->data_bytes != -1)
385 {
386 as_bad (_("unexpected .cantunwind directive"));
387 return;
388 }
389
390 demand_empty_rest_of_line ();
391
392 if (unwind->personality_routine || unwind->personality_index != -1)
393 as_bad (_("personality routine specified for cantunwind frame"));
394
395 unwind->personality_index = -2;
396}
397
398/* Parse a .handlerdata directive. */
399static void
400s_tic6x_handlerdata (int ignored ATTRIBUTE_UNUSED)
401{
402 tic6x_unwind_info *unwind = tic6x_get_unwind ();
403
404 if (!unwind->saved_seg)
405 {
406 as_bad (_("unexpected .handlerdata directive"));
407 return;
408 }
409
410 if (unwind->table_entry || unwind->personality_index == -2)
411 {
412 as_bad (_("duplicate .handlerdata directive"));
413 return;
414 }
415
416 if (unwind->personality_index == -1 && unwind->personality_routine == NULL)
417 {
418 as_bad (_("personality routine required before .handlerdata directive"));
419 return;
420 }
421
422 tic6x_output_unwinding (TRUE);
423}
424
425/* Parse a .endp directive. */
426static void
427s_tic6x_endp (int ignored ATTRIBUTE_UNUSED)
428{
429 tic6x_unwind_info *unwind = tic6x_get_unwind ();
430
431 if (unwind->data_bytes != 0)
432 {
433 /* Output a .exidx entry if we have not already done so.
434 Then switch back to the text section. */
435 if (!unwind->table_entry)
436 tic6x_output_unwinding (FALSE);
437
438 subseg_set (unwind->saved_seg, unwind->saved_subseg);
439 }
440
441 unwind->saved_seg = NULL;
442 unwind->table_entry = NULL;
443 unwind->data_bytes = 0;
444}
445
446/* Parse a .personalityindex directive. */
447static void
448s_tic6x_personalityindex (int ignored ATTRIBUTE_UNUSED)
449{
450 tic6x_unwind_info *unwind = tic6x_get_unwind ();
451 expressionS exp;
452
453 if (unwind->personality_routine || unwind->personality_index != -1)
454 as_bad (_("duplicate .personalityindex directive"));
455
456 expression (&exp);
457
458 if (exp.X_op != O_constant
459 || exp.X_add_number < 0 || exp.X_add_number > 15)
460 {
461 as_bad (_("bad personality routine number"));
462 ignore_rest_of_line ();
463 return;
464 }
465
466 unwind->personality_index = exp.X_add_number;
467
468 demand_empty_rest_of_line ();
469}
40b36596 470
1bce6bd8
PB		 471static void
472s_tic6x_personality (int ignored ATTRIBUTE_UNUSED)
473{
474 char *name, *p, c;
475 tic6x_unwind_info *unwind = tic6x_get_unwind ();
476
477 if (unwind->personality_routine || unwind->personality_index != -1)
478 as_bad (_("duplicate .personality directive"));
479
480 name = input_line_pointer;
481 c = get_symbol_end ();
482 p = input_line_pointer;
483 unwind->personality_routine = symbol_find_or_make (name);
484 *p = c;
485 demand_empty_rest_of_line ();
486}
487
488/* Parse a .arch directive. */
40b36596
JM		 489static void
490s_tic6x_arch (int ignored ATTRIBUTE_UNUSED)
491{
492 char c;
493 char *arch;
494
495 arch = input_line_pointer;
496 while (*input_line_pointer && !ISSPACE (*input_line_pointer))
497 input_line_pointer++;
498 c = *input_line_pointer;
499 *input_line_pointer = 0;
500
501 tic6x_use_arch (arch);
502 tic6x_update_features ();
503 *input_line_pointer = c;
504 demand_empty_rest_of_line ();
505}
506
2fbb87f6
PB		 507/* Parse a .ehtype directive. */
508
509static void
510s_tic6x_ehtype (int ignored ATTRIBUTE_UNUSED)
511{
512 expressionS exp;
513 char *p;
514
515#ifdef md_flush_pending_output
516 md_flush_pending_output ();
517#endif
518
519 if (is_it_end_of_statement ())
520 {
521 demand_empty_rest_of_line ();
522 return;
523 }
524
525#ifdef md_cons_align
526 md_cons_align (4);
527#endif
528
529
530 expression (&exp);
531
532 if (exp.X_op != O_symbol)
533 {
534 as_bad (_("expected symbol"));
535 return;
536 }
537
538 p = frag_more (4);
539 fix_new_exp (frag_now, p - frag_now->fr_literal, 4,
540 &exp, 0, BFD_RELOC_C6000_EHTYPE);
541
542 demand_empty_rest_of_line ();
543}
544
40b36596
JM		 545/* Parse a .nocmp directive. */
546
547static void
548s_tic6x_nocmp (int ignored ATTRIBUTE_UNUSED)
549{
550 seg_info (now_seg)->tc_segment_info_data.nocmp = TRUE;
551 demand_empty_rest_of_line ();
552}
553
ac145307
BS		 554/* .scomm pseudo-op handler.
555
556 This is a new pseudo-op to handle putting objects in .scommon.
557 By doing this the linker won't need to do any work,
558 and more importantly it removes the implicit -G arg necessary to
559 correctly link the object file. */
560
561static void
562s_tic6x_scomm (int ignore ATTRIBUTE_UNUSED)
563{
564 char *name;
565 char c;
566 char *p;
567 offsetT size;
568 symbolS *symbolP;
569 offsetT align;
570 int align2;
571
572 name = input_line_pointer;
573 c = get_symbol_end ();
574
575 /* Just after name is now '\0'. */
576 p = input_line_pointer;
577 *p = c;
578 SKIP_WHITESPACE ();
579 if (*input_line_pointer != ',')
580 {
581 as_bad (_("expected comma after symbol name"));
582 ignore_rest_of_line ();
583 return;
584 }
585
586 /* Skip ','. */
587 input_line_pointer++;
588 if ((size = get_absolute_expression ()) < 0)
589 {
590 /* xgettext:c-format */
591 as_warn (_("invalid length for .scomm directive"));
592 ignore_rest_of_line ();
593 return;
594 }
595
596 /* The third argument to .scomm is the alignment. */
597 if (*input_line_pointer != ',')
598 align = 8;
599 else
600 {
601 ++input_line_pointer;
602 align = get_absolute_expression ();
603 if (align <= 0)
604 {
605 as_warn (_("alignment is not a positive number"));
606 align = 8;
607 }
608 }
609
610 /* Convert to a power of 2 alignment. */
611 if (align)
612 {
613 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2)
614 continue;
615 if (align != 1)
616 {
617 as_bad (_("alignment is not a power of 2"));
618 ignore_rest_of_line ();
619 return;
620 }
621 }
622 else
623 align2 = 0;
624
625 *p = 0;
626 symbolP = symbol_find_or_make (name);
627 *p = c;
628
629 if (S_IS_DEFINED (symbolP))
630 {
631 /* xgettext:c-format */
632 as_bad (_("attempt to re-define symbol `%s'"),
633 S_GET_NAME (symbolP));
634 ignore_rest_of_line ();
635 return;
636 }
637
638 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
639 {
640 /* xgettext:c-format */
641 as_bad (_("attempt to redefine `%s' with a different length"),
642 S_GET_NAME (symbolP));
643
644 ignore_rest_of_line ();
645 return;
646 }
647
648 if (symbol_get_obj (symbolP)->local)
649 {
650 segT old_sec = now_seg;
651 int old_subsec = now_subseg;
652 char *pfrag;
653
654 record_alignment (sbss_section, align2);
655 subseg_set (sbss_section, 0);
656
657 if (align2)
658 frag_align (align2, 0, 0);
659
660 if (S_GET_SEGMENT (symbolP) == sbss_section)
661 symbol_get_frag (symbolP)->fr_symbol = 0;
662
663 symbol_set_frag (symbolP, frag_now);
664
665 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
666 (char *) 0);
667 *pfrag = 0;
668 S_SET_SIZE (symbolP, size);
669 S_SET_SEGMENT (symbolP, sbss_section);
670 S_CLEAR_EXTERNAL (symbolP);
671 subseg_set (old_sec, old_subsec);
672 }
673 else
674 {
675 S_SET_VALUE (symbolP, (valueT) size);
676 S_SET_ALIGN (symbolP, 1 << align2);
677 S_SET_EXTERNAL (symbolP);
678 S_SET_SEGMENT (symbolP, &scom_section);
679 }
680
681 symbol_get_bfdsym (symbolP)->flags |= BSF_OBJECT;
682
683 demand_empty_rest_of_line ();
684}
685
59e6276b
JM		 686/* Track for each attribute whether it has been set explicitly (and so
687 should not have a default value set by the assembler). */
688static bfd_boolean tic6x_attributes_set_explicitly[NUM_KNOWN_OBJ_ATTRIBUTES];
689
690/* Parse a .c6xabi_attribute directive. */
691
692static void
693s_tic6x_c6xabi_attribute (int ignored ATTRIBUTE_UNUSED)
694{
0420f52b 695 int tag = obj_elf_vendor_attribute (OBJ_ATTR_PROC);
59e6276b
JM		 696
697 if (tag < NUM_KNOWN_OBJ_ATTRIBUTES)
698 tic6x_attributes_set_explicitly[tag] = TRUE;
699}
700
701typedef struct
702{
703 const char *name;
704 int tag;
705} tic6x_attribute_table;
706
707static const tic6x_attribute_table tic6x_attributes[] =
708 {
b5593623 709#define TAG(tag, value) { #tag, tag },
59e6276b
JM		 710#include "elf/tic6x-attrs.h"
711#undef TAG
712 };
713
714/* Convert an attribute name to a number. */
715
716int
717tic6x_convert_symbolic_attribute (const char *name)
718{
719 unsigned int i;
720
721 for (i = 0; i < ARRAY_SIZE (tic6x_attributes); i++)
722 if (strcmp (name, tic6x_attributes[i].name) == 0)
723 return tic6x_attributes[i].tag;
724
725 return -1;
726}
727
40b36596
JM		 728const pseudo_typeS md_pseudo_table[] =
729 {
730 { "arch", s_tic6x_arch, 0 },
59e6276b 731 { "c6xabi_attribute", s_tic6x_c6xabi_attribute, 0 },
40b36596 732 { "nocmp", s_tic6x_nocmp, 0 },
ac145307 733 { "scomm", s_tic6x_scomm, 0 },
40b36596 734 { "word", cons, 4 },
2fbb87f6 735 { "ehtype", s_tic6x_ehtype, 0 },
1bce6bd8
PB		 736 { "endp", s_tic6x_endp, 0 },
737 { "handlerdata", s_tic6x_handlerdata, 0 },
738 { "personalityindex", s_tic6x_personalityindex, 0 },
739 { "personality", s_tic6x_personality, 0 },
740 { "cantunwind", s_tic6x_cantunwind, 0 },
40b36596
JM		 741 { 0, 0, 0 }
742 };
743
744/* Hash table of opcodes. For each opcode name, this stores a pointer
745 to a tic6x_opcode_list listing (in an arbitrary order) all opcode
746 table entries with that name. */
747static struct hash_control *opcode_hash;
748
749/* Initialize the assembler (called once at assembler startup). */
750
751void
752md_begin (void)
753{
754 tic6x_opcode_id id;
ac145307
BS		 755 flagword applicable;
756 segT seg;
757 subsegT subseg;
40b36596
JM		 758
759 bfd_set_arch_mach (stdoutput, TARGET_ARCH, 0);
760
761 /* Insert opcodes into the hash table. */
762 opcode_hash = hash_new ();
763 for (id = 0; id < tic6x_opcode_max; id++)
764 {
765 const char *errmsg;
766 tic6x_opcode_list *opc = xmalloc (sizeof (tic6x_opcode_list));
767
768 opc->id = id;
769 opc->next = hash_find (opcode_hash, tic6x_opcode_table[id].name);
770 if ((errmsg = hash_jam (opcode_hash, tic6x_opcode_table[id].name, opc))
771 != NULL)
772 as_fatal ("%s", _(errmsg));
773 }
ac145307
BS		 774
775 /* Save the current subseg so we can restore it [it's the default one and
776 we don't want the initial section to be .sbss]. */
777 seg = now_seg;
778 subseg = now_subseg;
779
780 /* The sbss section is for local .scomm symbols. */
781 sbss_section = subseg_new (".bss", 0);
782 seg_info (sbss_section)->bss = 1;
783
784 /* This is copied from perform_an_assembly_pass. */
785 applicable = bfd_applicable_section_flags (stdoutput);
786 bfd_set_section_flags (stdoutput, sbss_section, applicable & SEC_ALLOC);
787
788 subseg_set (seg, subseg);
789
790 /* We must construct a fake section similar to bfd_com_section
791 but with the name .scommon. */
45dfa85a 792 scom_section = *bfd_com_section_ptr;
ac145307
BS		 793 scom_section.name = ".scommon";
794 scom_section.output_section = & scom_section;
795 scom_section.symbol = & scom_symbol;
796 scom_section.symbol_ptr_ptr = & scom_section.symbol;
45dfa85a 797 scom_symbol = * bfd_com_section_ptr->symbol;
ac145307
BS		 798 scom_symbol.name = ".scommon";
799 scom_symbol.section = & scom_section;
40b36596
JM		 800}
801
802/* Whether the current line being parsed had the "||" parallel bars. */
803static bfd_boolean tic6x_line_parallel;
804
805/* Whether the current line being parsed started "||^" to indicate an
806 SPMASKed parallel instruction. */
807static bfd_boolean tic6x_line_spmask;
808
809/* If the current line being parsed had an instruction predicate, the
810 creg value for that predicate (which must be nonzero); otherwise
811 0. */
812static unsigned int tic6x_line_creg;
813
814/* If the current line being parsed had an instruction predicate, the
815 z value for that predicate; otherwise 0. */
816static unsigned int tic6x_line_z;
817
818/* Return 1 (updating input_line_pointer as appropriate) if the line
819 starting with C (immediately before input_line_pointer) starts with
820 pre-opcode text appropriate for this target, 0 otherwise. */
821
822int
823tic6x_unrecognized_line (int c)
824{
825 char *p, *endp;
826 unsigned int z;
827 bfd_boolean areg;
828 bfd_boolean bad_predicate;
829
830 switch (c)
831 {
832 case '|':
833 if (input_line_pointer[0] == '|')
834 {
835 if (input_line_pointer[1] == '^')
836 {
837 tic6x_line_spmask = TRUE;
838 input_line_pointer += 2;
839 }
840 else
841 input_line_pointer += 1;
842 if (tic6x_line_parallel)
843 as_bad (_("multiple '||' on same line"));
844 tic6x_line_parallel = TRUE;
845 if (tic6x_line_creg)
846 as_bad (_("'||' after predicate"));
847 return 1;
848 }
849 return 0;
850
851 case '[':
852 /* If it doesn't look like a predicate at all, just return 0.
853 If it looks like one but not a valid one, give a better
854 error. */
855 p = input_line_pointer;
856 while (*p != ']' && !is_end_of_line[(unsigned char) *p])
857 p++;
858 if (*p != ']')
859 return 0;
860 endp = p + 1;
861 p = input_line_pointer;
862 z = 0;
863 bad_predicate = FALSE;
864 if (*p == '!')
865 {
866 z = 1;
867 p++;
868 }
869 if (*p == 'A' || *p == 'a')
870 areg = TRUE;
871 else if (*p == 'B' || *p == 'b')
872 areg = FALSE;
873 else
874 {
875 areg = TRUE; /* Avoid uninitialized warning. */
876 bad_predicate = TRUE;
877 }
878 if (!bad_predicate)
879 {
880 p++;
881 if (*p != '0' && *p != '1' && *p != '2')
882 bad_predicate = TRUE;
883 else if (p[1] != ']')
884 bad_predicate = TRUE;
885 else
886 input_line_pointer = p + 2;
887 }
888
889 if (tic6x_line_creg)
890 as_bad (_("multiple predicates on same line"));
891
892 if (bad_predicate)
893 {
894 char ctmp = *endp;
895 *endp = 0;
896 as_bad (_("bad predicate '%s'"), input_line_pointer - 1);
897 *endp = ctmp;
898 input_line_pointer = endp;
899 return 1;
900 }
901
902 switch (*p)
903 {
904 case '0':
905 tic6x_line_creg = (areg ? 6 : 1);
906 if (areg && !tic6x_predicate_a0)
907 as_bad (_("predication on A0 not supported on this architecture"));
908 break;
909
910 case '1':
911 tic6x_line_creg = (areg ? 4 : 2);
912 break;
913
914 case '2':
915 tic6x_line_creg = (areg ? 5 : 3);
916 break;
917
918 default:
919 abort ();
920 }
921
922 tic6x_line_z = z;
923 return 1;
924
925 default:
926 return 0;
927 }
928}
929
930/* Do any target-specific handling of a label required. */
931
932void
d99e5b39 933tic6x_frob_label (symbolS *sym)
40b36596 934{
d99e5b39
JM		 935 segment_info_type *si;
936 tic6x_label_list *list;
937
40b36596
JM		 938 if (tic6x_line_parallel)
939 {
940 as_bad (_("label after '||'"));
941 tic6x_line_parallel = FALSE;
942 tic6x_line_spmask = FALSE;
943 }
944 if (tic6x_line_creg)
945 {
946 as_bad (_("label after predicate"));
947 tic6x_line_creg = 0;
948 tic6x_line_z = 0;
949 }
950
d99e5b39
JM		 951 si = seg_info (now_seg);
952 list = si->tc_segment_info_data.label_list;
953 si->tc_segment_info_data.label_list = xmalloc (sizeof (tic6x_label_list));
954 si->tc_segment_info_data.label_list->next = list;
955 si->tc_segment_info_data.label_list->label = sym;
40b36596
JM		 956
957 /* Defining tc_frob_label overrides the ELF definition of
958 obj_frob_label, so we need to apply its effects here. */
959 dwarf2_emit_label (sym);
960}
961
962/* At end-of-line, give errors for start-of-line decorations that
963 needed an instruction but were not followed by one. */
964
965static void
966tic6x_end_of_line (void)
967{
968 if (tic6x_line_parallel)
969 {
970 as_bad (_("'||' not followed by instruction"));
971 tic6x_line_parallel = FALSE;
972 tic6x_line_spmask = FALSE;
973 }
974 if (tic6x_line_creg)
975 {
976 as_bad (_("predicate not followed by instruction"));
977 tic6x_line_creg = 0;
978 tic6x_line_z = 0;
979 }
980}
981
982/* Do any target-specific handling of the start of a logical line. */
983
984void
985tic6x_start_line_hook (void)
986{
987 tic6x_end_of_line ();
988}
989
d99e5b39
JM		 990/* Do target-specific handling immediately after an input file from
991 the command line, and any other inputs it includes, have been
992 read. */
40b36596
JM		 993
994void
995tic6x_cleanup (void)
996{
997 tic6x_end_of_line ();
998}
999
41820509
JM		 1000/* Do target-specific initialization after arguments have been
1001 processed and the output file created. */
1002
1003void
1004tic6x_init_after_args (void)
1005{
1006 elf32_tic6x_set_use_rela_p (stdoutput, tic6x_generate_rela);
1007}
1008
d99e5b39
JM		 1009/* Free LIST of labels (possibly NULL). */
1010
1011static void
1012tic6x_free_label_list (tic6x_label_list *list)
1013{
1014 while (list)
1015 {
1016 tic6x_label_list *old = list;
1017
1018 list = list->next;
1019 free (old);
1020 }
1021}
1022
40b36596
JM		 1023/* Handle a data alignment of N bytes. */
1024
1025void
1026tic6x_cons_align (int n ATTRIBUTE_UNUSED)
1027{
1028 segment_info_type *seginfo = seg_info (now_seg);
1029
1030 /* Data means there is no current execute packet, and that any label
1031 applies to that data rather than a subsequent instruction. */
d99e5b39
JM		 1032 tic6x_free_label_list (seginfo->tc_segment_info_data.label_list);
1033 seginfo->tc_segment_info_data.label_list = NULL;
1034 seginfo->tc_segment_info_data.execute_packet_frag = NULL;
40b36596
JM		 1035 seginfo->tc_segment_info_data.last_insn_lsb = NULL;
1036 seginfo->tc_segment_info_data.spmask_addr = NULL;
38bd8d09 1037 seginfo->tc_segment_info_data.func_units_used = 0;
40b36596
JM		 1038}
1039
d99e5b39
JM		 1040/* Handle an alignment directive. Return TRUE if the
1041 machine-independent frag generation should be skipped. */
1042
1043bfd_boolean
1044tic6x_do_align (int n, char *fill, int len ATTRIBUTE_UNUSED, int max)
1045{
1046 /* Given code alignments of 4, 8, 16 or 32 bytes, we try to handle
1047 them in the md_end pass by inserting NOPs in parallel with
1048 previous instructions. We only do this in sections containing
1049 nothing but instructions. Code alignments of 1 or 2 bytes have
1050 no effect in such sections (but we record them with
1051 machine-dependent frags anyway so they can be skipped or
1052 converted to machine-independent), while those of more than 64
1053 bytes cannot reliably be handled in this way. */
1054 if (n > 0
1055 && max >= 0
1056 && max < (1 << n)
1057 && !need_pass_2
1058 && fill == NULL
1059 && subseg_text_p (now_seg))
1060 {
1061 fragS *align_frag;
1062 char *p;
1063
1064 if (n > 5)
1065 return FALSE;
1066
1067 /* Machine-independent code would generate a frag here, but we
1068 wish to handle it in a machine-dependent way. */
1069 if (frag_now_fix () != 0)
1070 {
1071 if (frag_now->fr_type != rs_machine_dependent)
1072 frag_wane (frag_now);
1073
1074 frag_new (0);
1075 }
1076 frag_grow (32);
1077 align_frag = frag_now;
1078 p = frag_var (rs_machine_dependent, 32, 32, max, NULL, n, NULL);
1079 /* This must be the same as the frag to which a pointer was just
1080 saved. */
1081 if (p != align_frag->fr_literal)
1082 abort ();
1083 align_frag->tc_frag_data.is_insns = FALSE;
1084 return TRUE;
1085 }
1086 else
1087 return FALSE;
1088}
1089
40b36596
JM		 1090/* Types of operand for parsing purposes. These are used as bit-masks
1091 to tell tic6x_parse_operand what forms of operand are
1092 permitted. */
1093#define TIC6X_OP_EXP 0x0001u
1094#define TIC6X_OP_REG 0x0002u
1095#define TIC6X_OP_REGPAIR 0x0004u
1096#define TIC6X_OP_IRP 0x0008u
1097#define TIC6X_OP_NRP 0x0010u
1098/* With TIC6X_OP_MEM_NOUNREG, the contents of a () offset are always
1099 interpreted as an expression, which may be a symbol with the same
1100 name as a register that ends up being implicitly DP-relative. With
1101 TIC6X_OP_MEM_UNREG, the contents of a () offset are interpreted as
1102 a register if they match one, and failing that as an expression,
1103 which must be constant. */
1104#define TIC6X_OP_MEM_NOUNREG 0x0020u
1105#define TIC6X_OP_MEM_UNREG 0x0040u
1106#define TIC6X_OP_CTRL 0x0080u
1107#define TIC6X_OP_FUNC_UNIT 0x0100u
1108
1109/* A register or register pair read by the assembler. */
1110typedef struct
1111{
1112 /* The side the register is on (1 or 2). */
1113 unsigned int side;
1114 /* The register number (0 to 31). */
1115 unsigned int num;
1116} tic6x_register;
1117
1118/* Types of modification of a base address. */
1119typedef enum
1120 {
1121 tic6x_mem_mod_none,
1122 tic6x_mem_mod_plus,
1123 tic6x_mem_mod_minus,
1124 tic6x_mem_mod_preinc,
1125 tic6x_mem_mod_predec,
1126 tic6x_mem_mod_postinc,
1127 tic6x_mem_mod_postdec
1128 } tic6x_mem_mod;
1129
1130/* Scaled [] or unscaled () nature of an offset. */
1131typedef enum
1132 {
1133 tic6x_offset_none,
1134 tic6x_offset_scaled,
1135 tic6x_offset_unscaled
1136 } tic6x_mem_scaling;
1137
1138/* A memory operand read by the assembler. */
1139typedef struct
1140{
1141 /* The base register. */
1142 tic6x_register base_reg;
1143 /* How the base register is modified. */
1144 tic6x_mem_mod mod;
1145 /* Whether there is an offset (required with plain "+" and "-"), and
1146 whether it is scaled or unscaled if so. */
1147 tic6x_mem_scaling scaled;
1148 /* Whether the offset is a register (TRUE) or an expression
1149 (FALSE). */
1150 bfd_boolean offset_is_reg;
1151 /* The offset. */
1152 union
1153 {
1154 expressionS exp;
1155 tic6x_register reg;
1156 } offset;
1157} tic6x_mem_ref;
1158
1159/* A functional unit in SPMASK operands read by the assembler. */
1160typedef struct
1161{
1162 /* The basic unit. */
1163 tic6x_func_unit_base base;
1164 /* The side (1 or 2). */
1165 unsigned int side;
1166} tic6x_func_unit_operand;
1167
1168/* An operand read by the assembler. */
1169typedef struct
1170{
1171 /* The syntactic form of the operand, as one of the bit-masks
1172 above. */
1173 unsigned int form;
1174 /* The operand value. */
1175 union
1176 {
1177 /* An expression: TIC6X_OP_EXP. */
1178 expressionS exp;
1179 /* A register: TIC6X_OP_REG, TIC6X_OP_REGPAIR. */
1180 tic6x_register reg;
1181 /* A memory reference: TIC6X_OP_MEM_NOUNREG,
1182 TIC6X_OP_MEM_UNREG. */
1183 tic6x_mem_ref mem;
1184 /* A control register: TIC6X_OP_CTRL. */
1185 tic6x_ctrl_id ctrl;
1186 /* A functional unit: TIC6X_OP_FUNC_UNIT. */
1187 tic6x_func_unit_operand func_unit;
1188 } value;
1189} tic6x_operand;
1190
1191#define skip_whitespace(str) do { if (*(str) == ' ') ++(str); } while (0)
1192
1193/* Parse a register operand, or part of an operand, starting at *P.
1194 If syntactically OK (including that the number is in the range 0 to
1195 31, but not necessarily in range for this architecture), return
1196 TRUE, putting the register side and number in *REG and update *P to
1197 point immediately after the register number; otherwise return FALSE
1198 without changing *P (but possibly changing *REG). Do not print any
1199 diagnostics. */
1200
1201static bfd_boolean
1202tic6x_parse_register (char **p, tic6x_register *reg)
1203{
1204 char *r = *p;
1205
1206 switch (*r)
1207 {
1208 case 'a':
1209 case 'A':
1210 reg->side = 1;
1211 break;
1212
1213 case 'b':
1214 case 'B':
1215 reg->side = 2;
1216 break;
1217
1218 default:
1219 return FALSE;
1220 }
1221 r++;
1222
1223 if (*r >= '0' && *r <= '9')
1224 {
1225 reg->num = *r - '0';
1226 r++;
1227 }
1228 else
1229 return FALSE;
1230
1231 if (reg->num > 0 && *r >= '0' && *r <= '9')
1232 {
1233 reg->num = reg->num * 10 + (*r - '0');
1234 r++;
1235 }
1236
1237 if (*r >= '0' && *r <= '9')
1238 return FALSE;
1239
1240 if (reg->num >= 32)
1241 return FALSE;
1242 *p = r;
1243 return TRUE;
1244}
1245
1246/* Parse the initial two characters of a functional unit name starting
1247 at *P. If OK, set *BASE and *SIDE and return TRUE; otherwise,
1248 return FALSE. */
1249
1250static bfd_boolean
1251tic6x_parse_func_unit_base (char *p, tic6x_func_unit_base *base,
1252 unsigned int *side)
1253{
1254 bfd_boolean good_func_unit = TRUE;
1255 tic6x_func_unit_base maybe_base = tic6x_func_unit_nfu;
1256 unsigned int maybe_side = 0;
1257
1258 switch (p[0])
1259 {
1260 case 'd':
1261 case 'D':
1262 maybe_base = tic6x_func_unit_d;
1263 break;
1264
1265 case 'l':
1266 case 'L':
1267 maybe_base = tic6x_func_unit_l;
1268 break;
1269
1270 case 'm':
1271 case 'M':
1272 maybe_base = tic6x_func_unit_m;
1273 break;
1274
1275 case 's':
1276 case 'S':
1277 maybe_base = tic6x_func_unit_s;
1278 break;
1279
1280 default:
1281 good_func_unit = FALSE;
1282 break;
1283 }
1284
1285 if (good_func_unit)
1286 switch (p[1])
1287 {
1288 case '1':
1289 maybe_side = 1;
1290 break;
1291
1292 case '2':
1293 maybe_side = 2;
1294 break;
1295
1296 default:
1297 good_func_unit = FALSE;
1298 break;
1299 }
1300
1301 if (good_func_unit)
1302 {
1303 *base = maybe_base;
1304 *side = maybe_side;
1305 }
1306
1307 return good_func_unit;
1308}
1309
1310/* Parse an operand starting at *P. If the operand parses OK, return
1311 TRUE and store the value in *OP; otherwise return FALSE (possibly
1312 changing *OP). In any case, update *P to point to the following
1313 comma or end of line. The possible operand forms are given by
1314 OP_FORMS. For diagnostics, this is operand OPNO of an opcode
1315 starting at STR, length OPC_LEN. */
1316
1317static bfd_boolean
1318tic6x_parse_operand (char **p, tic6x_operand *op, unsigned int op_forms,
1319 char *str, int opc_len, unsigned int opno)
1320{
1321 bfd_boolean operand_parsed = FALSE;
1322 char *q = *p;
1323
1324 if ((op_forms & (TIC6X_OP_MEM_NOUNREG | TIC6X_OP_MEM_UNREG))
1325 == (TIC6X_OP_MEM_NOUNREG | TIC6X_OP_MEM_UNREG))
1326 abort ();
1327
1328 /* Check for functional unit names for SPMASK and SPMASKR. */
1329 if (!operand_parsed && (op_forms & TIC6X_OP_FUNC_UNIT))
1330 {
1331 tic6x_func_unit_base base = tic6x_func_unit_nfu;
1332 unsigned int side = 0;
1333
1334 if (tic6x_parse_func_unit_base (q, &base, &side))
1335 {
1336 char *rq = q + 2;
1337
1338 skip_whitespace (rq);
1339 if (is_end_of_line[(unsigned char) *rq] || *rq == ',')
1340 {
1341 op->form = TIC6X_OP_FUNC_UNIT;
1342 op->value.func_unit.base = base;
1343 op->value.func_unit.side = side;
1344 operand_parsed = TRUE;
1345 q = rq;
1346 }
1347 }
1348 }
1349
1350 /* Check for literal "irp". */
1351 if (!operand_parsed && (op_forms & TIC6X_OP_IRP))
1352 {
1353 if ((q[0] == 'i' || q[0] == 'I')
1354 && (q[1] == 'r' || q[1] == 'R')
1355 && (q[2] == 'p' || q[2] == 'P'))
1356 {
1357 char *rq = q + 3;
1358
1359 skip_whitespace (rq);
1360 if (is_end_of_line[(unsigned char) *rq] || *rq == ',')
1361 {
1362 op->form = TIC6X_OP_IRP;
1363 operand_parsed = TRUE;
1364 q = rq;
1365 }
1366 }
1367 }
1368
1369 /* Check for literal "nrp". */
1370 if (!operand_parsed && (op_forms & TIC6X_OP_NRP))
1371 {
1372 if ((q[0] == 'n' || q[0] == 'N')
1373 && (q[1] == 'r' || q[1] == 'R')
1374 && (q[2] == 'p' || q[2] == 'P'))
1375 {
1376 char *rq = q + 3;
1377
1378 skip_whitespace (rq);
1379 if (is_end_of_line[(unsigned char) *rq] || *rq == ',')
1380 {
1381 op->form = TIC6X_OP_NRP;
1382 operand_parsed = TRUE;
1383 q = rq;
1384 }
1385 }
1386 }
1387
1388 /* Check for control register names. */
1389 if (!operand_parsed && (op_forms & TIC6X_OP_CTRL))
1390 {
1391 tic6x_ctrl_id crid;
1392
1393 for (crid = 0; crid < tic6x_ctrl_max; crid++)
1394 {
1395 size_t len = strlen (tic6x_ctrl_table[crid].name);
1396
1397 if (strncasecmp (tic6x_ctrl_table[crid].name, q, len) == 0)
1398 {
1399 char *rq = q + len;
1400
1401 skip_whitespace (rq);
1402 if (is_end_of_line[(unsigned char) *rq] || *rq == ',')
1403 {
1404 op->form = TIC6X_OP_CTRL;
1405 op->value.ctrl = crid;
1406 operand_parsed = TRUE;
1407 q = rq;
1408 if (!(tic6x_ctrl_table[crid].isa_variants & tic6x_features))
1409 as_bad (_("control register '%s' not supported "
1410 "on this architecture"),
1411 tic6x_ctrl_table[crid].name);
1412 }
1413 }
1414 }
1415 }
1416
1417 /* See if this looks like a memory reference. */
1418 if (!operand_parsed
1419 && (op_forms & (TIC6X_OP_MEM_NOUNREG | TIC6X_OP_MEM_UNREG)))
1420 {
1421 bfd_boolean mem_ok = TRUE;
1422 char *mq = q;
1423 tic6x_mem_mod mem_mod = tic6x_mem_mod_none;
1424 tic6x_register base_reg;
1425 bfd_boolean require_offset, permit_offset;
1426 tic6x_mem_scaling scaled;
1427 bfd_boolean offset_is_reg;
1428 expressionS offset_exp;
1429 tic6x_register offset_reg;
1430
1431 if (*mq == '*')
1432 mq++;
1433 else
1434 mem_ok = FALSE;
1435
1436 if (mem_ok)
1437 {
1438 skip_whitespace (mq);
1439 switch (*mq)
1440 {
1441 case '+':
1442 if (mq[1] == '+')
1443 {
1444 mem_mod = tic6x_mem_mod_preinc;
1445 mq += 2;
1446 }
1447 else
1448 {
1449 mem_mod = tic6x_mem_mod_plus;
1450 mq++;
1451 }
1452 break;
1453
1454 case '-':
1455 if (mq[1] == '-')
1456 {
1457 mem_mod = tic6x_mem_mod_predec;
1458 mq += 2;
1459 }
1460 else
1461 {
1462 mem_mod = tic6x_mem_mod_minus;
1463 mq++;
1464 }
1465 break;
1466
1467 default:
1468 break;
1469 }
1470 }
1471
1472 if (mem_ok)
1473 {
1474 skip_whitespace (mq);
1475 mem_ok = tic6x_parse_register (&mq, &base_reg);
1476 }
1477
1478 if (mem_ok && mem_mod == tic6x_mem_mod_none)
1479 {
1480 skip_whitespace (mq);
1481 if (mq[0] == '+' && mq[1] == '+')
1482 {
1483 mem_mod = tic6x_mem_mod_postinc;
1484 mq += 2;
1485 }
1486 else if (mq[0] == '-' && mq[1] == '-')
1487 {
1488 mem_mod = tic6x_mem_mod_postdec;
1489 mq += 2;
1490 }
1491 }
1492
1493 if (mem_mod == tic6x_mem_mod_none)
1494 permit_offset = FALSE;
1495 else
1496 permit_offset = TRUE;
1497 if (mem_mod == tic6x_mem_mod_plus || mem_mod == tic6x_mem_mod_minus)
1498 require_offset = TRUE;
1499 else
1500 require_offset = FALSE;
1501 scaled = tic6x_offset_none;
1502 offset_is_reg = FALSE;
1503
1504 if (mem_ok && permit_offset)
1505 {
1506 char endc = 0;
1507
1508 skip_whitespace (mq);
1509 switch (*mq)
1510 {
1511 case '[':
1512 scaled = tic6x_offset_scaled;
1513 mq++;
1514 endc = ']';
1515 break;
1516
1517 case '(':
1518 scaled = tic6x_offset_unscaled;
1519 mq++;
1520 endc = ')';
1521 break;
1522
1523 default:
1524 break;
1525 }
1526 if (scaled != tic6x_offset_none)
1527 {
1528 skip_whitespace (mq);
1529 if (scaled == tic6x_offset_scaled
1530 || (op_forms & TIC6X_OP_MEM_UNREG))
1531 {
1532 bfd_boolean reg_ok;
1533 char *rq = mq;
1534
1535 reg_ok = tic6x_parse_register (&rq, &offset_reg);
1536 if (reg_ok)
1537 {
1538 skip_whitespace (rq);
1539 if (*rq == endc)
1540 {
1541 mq = rq;
1542 offset_is_reg = TRUE;
1543 }
1544 }
1545 }
1546 if (!offset_is_reg)
1547 {
1548 char *save_input_line_pointer;
1549
1550 save_input_line_pointer = input_line_pointer;
1551 input_line_pointer = mq;
1552 expression (&offset_exp);
1553 mq = input_line_pointer;
1554 input_line_pointer = save_input_line_pointer;
1555 }
1556 skip_whitespace (mq);
1557 if (*mq == endc)
1558 mq++;
1559 else
1560 mem_ok = FALSE;
1561 }
1562 }
1563
1564 if (mem_ok && require_offset && scaled == tic6x_offset_none)
1565 mem_ok = FALSE;
1566
1567 if (mem_ok)
1568 {
1569 skip_whitespace (mq);
1570 if (!is_end_of_line[(unsigned char) *mq] && *mq != ',')
1571 mem_ok = FALSE;
1572 }
1573
1574 if (mem_ok)
1575 {
1576 op->form = op_forms & (TIC6X_OP_MEM_NOUNREG | TIC6X_OP_MEM_UNREG);
1577 op->value.mem.base_reg = base_reg;
1578 op->value.mem.mod = mem_mod;
1579 op->value.mem.scaled = scaled;
1580 op->value.mem.offset_is_reg = offset_is_reg;
1581 if (offset_is_reg)
1582 op->value.mem.offset.reg = offset_reg;
1583 else
1584 op->value.mem.offset.exp = offset_exp;
1585 operand_parsed = TRUE;
1586 q = mq;
1587 if (base_reg.num >= tic6x_num_registers)
1588 as_bad (_("register number %u not supported on this architecture"),
1589 base_reg.num);
1590 if (offset_is_reg && offset_reg.num >= tic6x_num_registers)
1591 as_bad (_("register number %u not supported on this architecture"),
1592 offset_reg.num);
1593 }
1594 }
1595
1596 /* See if this looks like a register or register pair. */
1597 if (!operand_parsed && (op_forms & (TIC6X_OP_REG | TIC6X_OP_REGPAIR)))
1598 {
1599 tic6x_register first_reg, second_reg;
1600 bfd_boolean reg_ok;
1601 char *rq = q;
1602
1603 reg_ok = tic6x_parse_register (&rq, &first_reg);
1604
1605 if (reg_ok)
1606 {
1607 if (*rq == ':' && (op_forms & TIC6X_OP_REGPAIR))
1608 {
1609 rq++;
1610 reg_ok = tic6x_parse_register (&rq, &second_reg);
1611 if (reg_ok)
1612 {
1613 skip_whitespace (rq);
1614 if (is_end_of_line[(unsigned char) *rq] || *rq == ',')
1615 {
1616 if ((second_reg.num & 1)
1617 || (first_reg.num != second_reg.num + 1)
1618 || (first_reg.side != second_reg.side))
1619 as_bad (_("register pair for operand %u of '%.*s'"
1620 " not a valid even/odd pair"), opno,
1621 opc_len, str);
1622 op->form = TIC6X_OP_REGPAIR;
1623 op->value.reg = second_reg;
1624 operand_parsed = TRUE;
1625 q = rq;
1626 }
1627 }
1628 }
1629 else if (op_forms & TIC6X_OP_REG)
1630 {
1631 skip_whitespace (rq);
1632 if (is_end_of_line[(unsigned char) *rq] || *rq == ',')
1633 {
1634 op->form = TIC6X_OP_REG;
1635 op->value.reg = first_reg;
1636 operand_parsed = TRUE;
1637 q = rq;
1638 }
1639 }
1640 }
1641 if (operand_parsed)
1642 {
1643 if (first_reg.num >= tic6x_num_registers)
1644 as_bad (_("register number %u not supported on this architecture"),
1645 first_reg.num);
1646 if (op->form == TIC6X_OP_REGPAIR
1647 && second_reg.num >= tic6x_num_registers)
1648 as_bad (_("register number %u not supported on this architecture"),
1649 second_reg.num);
1650 }
1651 }
1652
1653 /* Otherwise, parse it as an expression. */
1654 if (!operand_parsed && (op_forms & TIC6X_OP_EXP))
1655 {
1656 char *save_input_line_pointer;
1657
1658 save_input_line_pointer = input_line_pointer;
1659 input_line_pointer = q;
1660 op->form = TIC6X_OP_EXP;
1661 expression (&op->value.exp);
1662 q = input_line_pointer;
1663 input_line_pointer = save_input_line_pointer;
1664 operand_parsed = TRUE;
1665 }
1666
1667 if (operand_parsed)
1668 {
1669 /* Now the operand has been parsed, there must be nothing more
1670 before the comma or end of line. */
1671 skip_whitespace (q);
1672 if (!is_end_of_line[(unsigned char) *q] && *q != ',')
1673 {
1674 operand_parsed = FALSE;
1675 as_bad (_("junk after operand %u of '%.*s'"), opno,
1676 opc_len, str);
1677 while (!is_end_of_line[(unsigned char) *q] && *q != ',')
1678 q++;
1679 }
1680 }
1681 else
1682 {
1683 /* This could not be parsed as any acceptable form of
1684 operand. */
1685 switch (op_forms)
1686 {
1687 case TIC6X_OP_REG | TIC6X_OP_REGPAIR:
1688 as_bad (_("bad register or register pair for operand %u of '%.*s'"),
1689 opno, opc_len, str);
1690 break;
1691
1692 case TIC6X_OP_REG | TIC6X_OP_CTRL:
1693 case TIC6X_OP_REG:
1694 as_bad (_("bad register for operand %u of '%.*s'"),
1695 opno, opc_len, str);
1696 break;
1697
1698 case TIC6X_OP_REGPAIR:
1699 as_bad (_("bad register pair for operand %u of '%.*s'"),
1700 opno, opc_len, str);
1701 break;
1702
1703 case TIC6X_OP_FUNC_UNIT:
1704 as_bad (_("bad functional unit for operand %u of '%.*s'"),
1705 opno, opc_len, str);
1706 break;
1707
1708 default:
1709 as_bad (_("bad operand %u of '%.*s'"),
1710 opno, opc_len, str);
1711 break;
1712
1713 }
1714 while (!is_end_of_line[(unsigned char) *q] && *q != ',')
1715 q++;
1716 }
1717 *p = q;
1718 return operand_parsed;
1719}
1720
1721/* Table of assembler operators and associated O_* values. */
1722typedef struct
1723{
1724 const char *name;
1725 operatorT op;
1726} tic6x_operator_table;
1727static const tic6x_operator_table tic6x_operators[] = {
1728#define O_dsbt_index O_md1
1729 { "dsbt_index", O_dsbt_index },
1730#define O_got O_md2
1731 { "got", O_got },
1732#define O_dpr_got O_md3
1733 { "dpr_got", O_dpr_got },
1734#define O_dpr_byte O_md4
1735 { "dpr_byte", O_dpr_byte },
1736#define O_dpr_hword O_md5
1737 { "dpr_hword", O_dpr_hword },
1738#define O_dpr_word O_md6
1739 { "dpr_word", O_dpr_word },
4a732032
BS		 1740#define O_pcr_offset O_md7
1741 { "pcr_offset", O_pcr_offset }
40b36596
JM		 1742};
1743
1744/* Parse a name in some machine-specific way. Used on C6X to handle
1745 assembler operators. */
1746
1747int
1748tic6x_parse_name (const char *name, expressionS *exprP,
1749 enum expr_mode mode ATTRIBUTE_UNUSED, char *nextchar)
1750{
1751 char *p = input_line_pointer;
1752 char c, *name_start, *name_end;
1753 const char *inner_name;
1754 unsigned int i;
1755 operatorT op = O_illegal;
4a732032 1756 symbolS *sym, *op_sym = NULL;
40b36596
JM		 1757
1758 if (*name != '$')
1759 return 0;
1760
1761 for (i = 0; i < ARRAY_SIZE (tic6x_operators); i++)
1762 if (strcasecmp (name + 1, tic6x_operators[i].name) == 0)
1763 {
1764 op = tic6x_operators[i].op;
1765 break;
1766 }
1767
1768 if (op == O_illegal)
1769 return 0;
1770
1771 *input_line_pointer = *nextchar;
1772 skip_whitespace (p);
1773
1774 if (*p != '(')
1775 {
1776 *input_line_pointer = 0;
1777 return 0;
1778 }
1779 p++;
1780 skip_whitespace (p);
1781
1782 if (!is_name_beginner (*p))
1783 {
1784 *input_line_pointer = 0;
1785 return 0;
1786 }
1787
1788 name_start = p;
1789 p++;
1790 while (is_part_of_name (*p))
1791 p++;
1792 name_end = p;
1793 skip_whitespace (p);
1794
4a732032
BS		 1795 if (op == O_pcr_offset)
1796 {
1797 char *op_name_start, *op_name_end;
1798
1799 if (*p != ',')
1800 {
1801 *input_line_pointer = 0;
1802 return 0;
1803 }
1804 p++;
1805 skip_whitespace (p);
1806
1807 if (!is_name_beginner (*p))
1808 {
1809 *input_line_pointer = 0;
1810 return 0;
1811 }
1812
1813 op_name_start = p;
1814 p++;
1815 while (is_part_of_name (*p))
1816 p++;
1817 op_name_end = p;
1818 skip_whitespace (p);
1819
1820 c = *op_name_end;
1821 *op_name_end = 0;
1822 op_sym = symbol_find_or_make (op_name_start);
1823 *op_name_end = c;
1824 }
1825
40b36596
JM		 1826 if (*p != ')')
1827 {
1828 *input_line_pointer = 0;
1829 return 0;
1830 }
1831
1832 input_line_pointer = p + 1;
1833 *nextchar = *input_line_pointer;
1834 *input_line_pointer = 0;
1835
1836 c = *name_end;
1837 *name_end = 0;
1838 inner_name = name_start;
1839 if (op == O_dsbt_index && strcmp (inner_name, "__c6xabi_DSBT_BASE") != 0)
1840 {
1841 as_bad (_("$DSBT_INDEX must be used with __c6xabi_DSBT_BASE"));
1842 inner_name = "__c6xabi_DSBT_BASE";
1843 }
1844 sym = symbol_find_or_make (inner_name);
1845 *name_end = c;
1846
1847 exprP->X_op = op;
1848 exprP->X_add_symbol = sym;
1849 exprP->X_add_number = 0;
4a732032 1850 exprP->X_op_symbol = op_sym;
40b36596
JM		 1851 exprP->X_md = 0;
1852
1853 return 1;
1854}
1855
1856/* Create a fixup for an expression. Same arguments as fix_new_exp,
1857 plus FIX_ADDA which is TRUE for ADDA instructions (to indicate that
1858 fixes resolving to constants should have those constants implicitly
1859 shifted) and FALSE otherwise, but look for C6X-specific expression
1860 types and adjust the relocations or give errors accordingly. */
1861
1862static void
1863tic6x_fix_new_exp (fragS *frag, int where, int size, expressionS *exp,
1864 int pcrel, bfd_reloc_code_real_type r_type,
1865 bfd_boolean fix_adda)
1866{
1867 bfd_reloc_code_real_type new_reloc = BFD_RELOC_UNUSED;
4a732032 1868 symbolS *subsy = NULL;
40b36596
JM		 1869 fixS *fix;
1870
1871 switch (exp->X_op)
1872 {
1873 case O_dsbt_index:
1874 switch (r_type)
1875 {
1876 case BFD_RELOC_C6000_SBR_U15_W:
1877 new_reloc = BFD_RELOC_C6000_DSBT_INDEX;
1878 break;
1879
1880 default:
1881 as_bad (_("$DSBT_INDEX not supported in this context"));
1882 return;
1883 }
1884 break;
1885
1886 case O_got:
1887 switch (r_type)
1888 {
1889 case BFD_RELOC_C6000_SBR_U15_W:
1890 new_reloc = BFD_RELOC_C6000_SBR_GOT_U15_W;
1891 break;
1892
1893 default:
1894 as_bad (_("$GOT not supported in this context"));
1895 return;
1896 }
1897 break;
1898
1899 case O_dpr_got:
1900 switch (r_type)
1901 {
1902 case BFD_RELOC_C6000_ABS_L16:
1903 new_reloc = BFD_RELOC_C6000_SBR_GOT_L16_W;
1904 break;
1905
1906 case BFD_RELOC_C6000_ABS_H16:
1907 new_reloc = BFD_RELOC_C6000_SBR_GOT_H16_W;
1908 break;
1909
1910 default:
1911 as_bad (_("$DPR_GOT not supported in this context"));
1912 return;
1913 }
1914 break;
1915
1916 case O_dpr_byte:
1917 switch (r_type)
1918 {
1919 case BFD_RELOC_C6000_ABS_S16:
1920 new_reloc = BFD_RELOC_C6000_SBR_S16;
1921 break;
1922
1923 case BFD_RELOC_C6000_ABS_L16:
1924 new_reloc = BFD_RELOC_C6000_SBR_L16_B;
1925 break;
1926
1927 case BFD_RELOC_C6000_ABS_H16:
1928 new_reloc = BFD_RELOC_C6000_SBR_H16_B;
1929 break;
1930
1931 default:
1932 as_bad (_("$DPR_BYTE not supported in this context"));
1933 return;
1934 }
1935 break;
1936
1937 case O_dpr_hword:
1938 switch (r_type)
1939 {
1940 case BFD_RELOC_C6000_ABS_L16:
1941 new_reloc = BFD_RELOC_C6000_SBR_L16_H;
1942 break;
1943
1944 case BFD_RELOC_C6000_ABS_H16:
1945 new_reloc = BFD_RELOC_C6000_SBR_H16_H;
1946 break;
1947
1948 default:
1949 as_bad (_("$DPR_HWORD not supported in this context"));
1950 return;
1951 }
1952 break;
1953
1954 case O_dpr_word:
1955 switch (r_type)
1956 {
1957 case BFD_RELOC_C6000_ABS_L16:
1958 new_reloc = BFD_RELOC_C6000_SBR_L16_W;
1959 break;
1960
1961 case BFD_RELOC_C6000_ABS_H16:
1962 new_reloc = BFD_RELOC_C6000_SBR_H16_W;
1963 break;
1964
1965 default:
1966 as_bad (_("$DPR_WORD not supported in this context"));
1967 return;
1968 }
1969 break;
1970
4a732032
BS		 1971 case O_pcr_offset:
1972 subsy = exp->X_op_symbol;
1973 switch (r_type)
1974 {
1975 case BFD_RELOC_C6000_ABS_S16:
1976 case BFD_RELOC_C6000_ABS_L16:
1977 new_reloc = BFD_RELOC_C6000_PCR_L16;
1978 break;
1979
1980 case BFD_RELOC_C6000_ABS_H16:
1981 new_reloc = BFD_RELOC_C6000_PCR_H16;
1982 break;
1983
1984 default:
1985 as_bad (_("$PCR_OFFSET not supported in this context"));
1986 return;
1987 }
1988 break;
1989
40b36596
JM		 1990 case O_symbol:
1991 break;
1992
1993 default:
1994 if (pcrel)
1995 {
1996 as_bad (_("invalid PC-relative operand"));
1997 return;
1998 }
1999 break;
2000 }
2001
2002 if (new_reloc == BFD_RELOC_UNUSED)
2003 fix = fix_new_exp (frag, where, size, exp, pcrel, r_type);
2004 else
2005 fix = fix_new (frag, where, size, exp->X_add_symbol, exp->X_add_number,
2006 pcrel, new_reloc);
4a732032 2007 fix->tc_fix_data.fix_subsy = subsy;
40b36596
JM		 2008 fix->tc_fix_data.fix_adda = fix_adda;
2009}
2010
2011/* Generate a fix for a constant (.word etc.). Needed to ensure these
2012 go through the error checking in tic6x_fix_new_exp. */
2013
2014void
2015tic6x_cons_fix_new (fragS *frag, int where, int size, expressionS *exp)
2016{
2017 bfd_reloc_code_real_type r_type;
2018
2019 switch (size)
2020 {
2021 case 1:
2022 r_type = BFD_RELOC_8;
2023 break;
2024
2025 case 2:
2026 r_type = BFD_RELOC_16;
2027 break;
2028
2029 case 4:
2030 r_type = BFD_RELOC_32;
2031 break;
2032
2033 default:
2034 as_bad (_("no %d-byte relocations available"), size);
2035 return;
2036 }
2037
2038 tic6x_fix_new_exp (frag, where, size, exp, 0, r_type, FALSE);
2039}
2040
2041/* Initialize target-specific fix data. */
2042
2043void
2044tic6x_init_fix_data (fixS *fixP)
2045{
2046 fixP->tc_fix_data.fix_adda = FALSE;
4a732032 2047 fixP->tc_fix_data.fix_subsy = NULL;
40b36596
JM		 2048}
2049
43bb514a
BS		 2050/* Return true if the fix can be handled by GAS, false if it must
2051 be passed through to the linker. */
2052
2053bfd_boolean
2054tic6x_fix_adjustable (fixS *fixP)
2055{
2056 switch (fixP->fx_r_type)
2057 {
2058 /* Adjust_reloc_syms doesn't know about the GOT. */
2059 case BFD_RELOC_C6000_SBR_GOT_U15_W:
2060 case BFD_RELOC_C6000_SBR_GOT_H16_W:
2061 case BFD_RELOC_C6000_SBR_GOT_L16_W:
2fbb87f6 2062 case BFD_RELOC_C6000_EHTYPE:
43bb514a
BS		 2063 return 0;
2064
1bce6bd8
PB		 2065 case BFD_RELOC_C6000_PREL31:
2066 return 0;
2067
4a732032
BS		 2068 case BFD_RELOC_C6000_PCR_H16:
2069 case BFD_RELOC_C6000_PCR_L16:
2070 return 0;
2071
43bb514a
BS		 2072 default:
2073 return 1;
2074 }
2075}
2076
40b36596
JM		 2077/* Given the fine-grained form of an operand, return the coarse
2078 (bit-mask) form. */
2079
2080static unsigned int
2081tic6x_coarse_operand_form (tic6x_operand_form form)
2082{
2083 switch (form)
2084 {
2085 case tic6x_operand_asm_const:
2086 case tic6x_operand_link_const:
2087 return TIC6X_OP_EXP;
2088
2089 case tic6x_operand_reg:
2090 case tic6x_operand_xreg:
2091 case tic6x_operand_dreg:
2092 case tic6x_operand_areg:
2093 case tic6x_operand_retreg:
2094 return TIC6X_OP_REG;
2095
2096 case tic6x_operand_regpair:
2097 case tic6x_operand_xregpair:
2098 case tic6x_operand_dregpair:
2099 return TIC6X_OP_REGPAIR;
2100
2101 case tic6x_operand_irp:
2102 return TIC6X_OP_IRP;
2103
2104 case tic6x_operand_nrp:
2105 return TIC6X_OP_NRP;
2106
2107 case tic6x_operand_ctrl:
2108 return TIC6X_OP_CTRL;
2109
2110 case tic6x_operand_mem_short:
2111 case tic6x_operand_mem_long:
2112 case tic6x_operand_mem_deref:
2113 return TIC6X_OP_MEM_NOUNREG;
2114
2115 case tic6x_operand_mem_ndw:
2116 return TIC6X_OP_MEM_UNREG;
2117
2118 case tic6x_operand_func_unit:
2119 return TIC6X_OP_FUNC_UNIT;
2120
2121 default:
2122 abort ();
2123 }
2124}
2125
2126/* How an operand may match or not match a desired form. If different
2127 instruction alternatives fail in different ways, the first failure
2128 in this list determines the diagnostic. */
2129typedef enum
2130 {
2131 /* Matches. */
2132 tic6x_match_matches,
2133 /* Bad coarse form. */
2134 tic6x_match_coarse,
2135 /* Not constant. */
2136 tic6x_match_non_const,
2137 /* Register on wrong side. */
2138 tic6x_match_wrong_side,
2139 /* Not a valid address register. */
2140 tic6x_match_bad_address,
2141 /* Not a valid return address register. */
2142 tic6x_match_bad_return,
2143 /* Control register not readable. */
2144 tic6x_match_ctrl_write_only,
2145 /* Control register not writable. */
2146 tic6x_match_ctrl_read_only,
2147 /* Not a valid memory reference for this instruction. */
2148 tic6x_match_bad_mem
2149 } tic6x_operand_match;
2150
2151/* Return whether an operand matches the given fine-grained form and
2152 read/write usage, and, if it does not match, how it fails to match.
2153 The main functional unit side is SIDE; the cross-path side is CROSS
2154 (the same as SIDE if a cross path not used); the data side is
2155 DATA_SIDE. */
2156static tic6x_operand_match
2157tic6x_operand_matches_form (const tic6x_operand *op, tic6x_operand_form form,
2158 tic6x_rw rw, unsigned int side, unsigned int cross,
2159 unsigned int data_side)
2160{
2161 unsigned int coarse = tic6x_coarse_operand_form (form);
2162
2163 if (coarse != op->form)
2164 return tic6x_match_coarse;
2165
2166 switch (form)
2167 {
2168 case tic6x_operand_asm_const:
2169 if (op->value.exp.X_op == O_constant)
2170 return tic6x_match_matches;
2171 else
2172 return tic6x_match_non_const;
2173
2174 case tic6x_operand_link_const:
2175 case tic6x_operand_irp:
2176 case tic6x_operand_nrp:
2177 case tic6x_operand_func_unit:
2178 /* All expressions are link-time constants, although there may
2179 not be relocations to express them in the output file. "irp"
2180 and "nrp" are unique operand values. All parsed functional
2181 unit names are valid. */
2182 return tic6x_match_matches;
2183
2184 case tic6x_operand_reg:
2185 case tic6x_operand_regpair:
2186 if (op->value.reg.side == side)
2187 return tic6x_match_matches;
2188 else
2189 return tic6x_match_wrong_side;
2190
2191 case tic6x_operand_xreg:
2192 case tic6x_operand_xregpair:
2193 if (op->value.reg.side == cross)
2194 return tic6x_match_matches;
2195 else
2196 return tic6x_match_wrong_side;
2197
2198 case tic6x_operand_dreg:
2199 case tic6x_operand_dregpair:
2200 if (op->value.reg.side == data_side)
2201 return tic6x_match_matches;
2202 else
2203 return tic6x_match_wrong_side;
2204
2205 case tic6x_operand_areg:
2206 if (op->value.reg.side != cross)
2207 return tic6x_match_wrong_side;
2208 else if (op->value.reg.side == 2
2209 && (op->value.reg.num == 14 || op->value.reg.num == 15))
2210 return tic6x_match_matches;
2211 else
2212 return tic6x_match_bad_address;
2213
2214 case tic6x_operand_retreg:
2215 if (op->value.reg.side != side)
2216 return tic6x_match_wrong_side;
2217 else if (op->value.reg.num != 3)
2218 return tic6x_match_bad_return;
2219 else
2220 return tic6x_match_matches;
2221
2222 case tic6x_operand_ctrl:
2223 switch (rw)
2224 {
2225 case tic6x_rw_read:
2226 if (tic6x_ctrl_table[op->value.ctrl].rw == tic6x_rw_read
2227 || tic6x_ctrl_table[op->value.ctrl].rw == tic6x_rw_read_write)
2228 return tic6x_match_matches;
2229 else
2230 return tic6x_match_ctrl_write_only;
2231
2232 case tic6x_rw_write:
2233 if (tic6x_ctrl_table[op->value.ctrl].rw == tic6x_rw_write
2234 || tic6x_ctrl_table[op->value.ctrl].rw == tic6x_rw_read_write)
2235 return tic6x_match_matches;
2236 else
2237 return tic6x_match_ctrl_read_only;
2238
2239 default:
2240 abort ();
2241 }
2242
2243 case tic6x_operand_mem_deref:
2244 if (op->value.mem.mod != tic6x_mem_mod_none)
2245 return tic6x_match_bad_mem;
2246 else if (op->value.mem.scaled != tic6x_offset_none)
2247 abort ();
2248 else if (op->value.mem.base_reg.side != side)
2249 return tic6x_match_bad_mem;
2250 else
2251 return tic6x_match_matches;
2252
2253 case tic6x_operand_mem_short:
2254 case tic6x_operand_mem_ndw:
2255 if (op->value.mem.base_reg.side != side)
2256 return tic6x_match_bad_mem;
2257 if (op->value.mem.mod == tic6x_mem_mod_none)
2258 {
2259 if (op->value.mem.scaled != tic6x_offset_none)
2260 abort ();
2261 return tic6x_match_matches;
2262 }
2263 if (op->value.mem.scaled == tic6x_offset_none)
2264 {
2265 if (op->value.mem.mod == tic6x_mem_mod_plus
2266 || op->value.mem.mod == tic6x_mem_mod_minus)
2267 abort ();
2268 return tic6x_match_matches;
2269 }
2270 if (op->value.mem.offset_is_reg)
2271 {
2272 if (op->value.mem.scaled == tic6x_offset_unscaled
2273 && form != tic6x_operand_mem_ndw)
2274 abort ();
2275 if (op->value.mem.offset.reg.side == side)
2276 return tic6x_match_matches;
2277 else
2278 return tic6x_match_bad_mem;
2279 }
2280 else
2281 {
2282 if (op->value.mem.offset.exp.X_op == O_constant)
2283 return tic6x_match_matches;
2284 else
2285 return tic6x_match_bad_mem;
2286 }
2287
2288 case tic6x_operand_mem_long:
2289 if (op->value.mem.base_reg.side == 2
2290 && (op->value.mem.base_reg.num == 14
2291 || op->value.mem.base_reg.num == 15))
2292 {
2293 switch (op->value.mem.mod)
2294 {
2295 case tic6x_mem_mod_none:
2296 if (op->value.mem.scaled != tic6x_offset_none)
2297 abort ();
2298 return tic6x_match_matches;
2299
2300 case tic6x_mem_mod_plus:
2301 if (op->value.mem.scaled == tic6x_offset_none)
2302 abort ();
2303 if (op->value.mem.offset_is_reg)
2304 return tic6x_match_bad_mem;
2305 else if (op->value.mem.scaled == tic6x_offset_scaled
2306 && op->value.mem.offset.exp.X_op != O_constant)
2307 return tic6x_match_bad_mem;
2308 else
2309 return tic6x_match_matches;
2310
2311 case tic6x_mem_mod_minus:
2312 case tic6x_mem_mod_preinc:
2313 case tic6x_mem_mod_predec:
2314 case tic6x_mem_mod_postinc:
2315 case tic6x_mem_mod_postdec:
2316 return tic6x_match_bad_mem;
2317
2318 default:
2319 abort ();
2320 }
2321
2322 }
2323 else
2324 return tic6x_match_bad_mem;
2325
2326 default:
2327 abort ();
2328 }
2329}
2330
2331/* Return the number of bits shift used with DP-relative coding method
2332 CODING. */
2333
2334static unsigned int
2335tic6x_dpr_shift (tic6x_coding_method coding)
2336{
2337 switch (coding)
2338 {
2339 case tic6x_coding_ulcst_dpr_byte:
2340 return 0;
2341
2342 case tic6x_coding_ulcst_dpr_half:
2343 return 1;
2344
2345 case tic6x_coding_ulcst_dpr_word:
2346 return 2;
2347
2348 default:
2349 abort ();
2350 }
2351}
2352
2353/* Return the relocation used with DP-relative coding method
2354 CODING. */
2355
2356static bfd_reloc_code_real_type
2357tic6x_dpr_reloc (tic6x_coding_method coding)
2358{
2359 switch (coding)
2360 {
2361 case tic6x_coding_ulcst_dpr_byte:
2362 return BFD_RELOC_C6000_SBR_U15_B;
2363
2364 case tic6x_coding_ulcst_dpr_half:
2365 return BFD_RELOC_C6000_SBR_U15_H;
2366
2367 case tic6x_coding_ulcst_dpr_word:
2368 return BFD_RELOC_C6000_SBR_U15_W;
2369
2370 default:
2371 abort ();
2372 }
2373}
2374
2375/* Given a memory reference *MEM_REF as originally parsed, fill in
2376 defaults for missing offsets. */
2377
2378static void
2379tic6x_default_mem_ref (tic6x_mem_ref *mem_ref)
2380{
2381 switch (mem_ref->mod)
2382 {
2383 case tic6x_mem_mod_none:
2384 if (mem_ref->scaled != tic6x_offset_none)
2385 abort ();
2386 mem_ref->mod = tic6x_mem_mod_plus;
2387 mem_ref->scaled = tic6x_offset_unscaled;
2388 mem_ref->offset_is_reg = FALSE;
2389 memset (&mem_ref->offset.exp, 0, sizeof mem_ref->offset.exp);
2390 mem_ref->offset.exp.X_op = O_constant;
2391 mem_ref->offset.exp.X_add_number = 0;
2392 mem_ref->offset.exp.X_unsigned = 0;
2393 break;
2394
2395 case tic6x_mem_mod_plus:
2396 case tic6x_mem_mod_minus:
2397 if (mem_ref->scaled == tic6x_offset_none)
2398 abort ();
2399 break;
2400
2401 case tic6x_mem_mod_preinc:
2402 case tic6x_mem_mod_predec:
2403 case tic6x_mem_mod_postinc:
2404 case tic6x_mem_mod_postdec:
2405 if (mem_ref->scaled != tic6x_offset_none)
2406 break;
2407 mem_ref->scaled = tic6x_offset_scaled;
2408 mem_ref->offset_is_reg = FALSE;
2409 memset (&mem_ref->offset.exp, 0, sizeof mem_ref->offset.exp);
2410 mem_ref->offset.exp.X_op = O_constant;
2411 mem_ref->offset.exp.X_add_number = 1;
2412 mem_ref->offset.exp.X_unsigned = 0;
2413 break;
2414
2415 default:
2416 abort ();
2417 }
2418}
2419
2420/* Return the encoding in the 8-bit field of an SPMASK or SPMASKR
2421 instruction of the specified UNIT, side SIDE. */
2422
2423static unsigned int
2424tic6x_encode_spmask (tic6x_func_unit_base unit, unsigned int side)
2425{
2426 switch (unit)
2427 {
2428 case tic6x_func_unit_l:
2429 return 1 << (side - 1);
2430
2431 case tic6x_func_unit_s:
2432 return 1 << (side + 1);
2433
2434 case tic6x_func_unit_d:
2435 return 1 << (side + 3);
2436
2437 case tic6x_func_unit_m:
2438 return 1 << (side + 5);
2439
2440 default:
2441 abort ();
2442 }
2443}
2444
2445/* Try to encode the instruction with opcode number ID and operands
2446 OPERANDS (number NUM_OPERANDS), creg value THIS_LINE_CREG and z
2447 value THIS_LINE_Z; FUNC_UNIT_SIDE, FUNC_UNIT_CROSS and
2448 FUNC_UNIT_DATA_SIDE describe the functional unit specification;
2449 SPLOOP_II is the ii value from the previous SPLOOP-family
2450 instruction, or 0 if not in such a loop; the only possible problems
2451 are operands being out of range (they already match the
2452 fine-grained form), and inappropriate predication. If this
2453 succeeds, return the encoding and set *OK to TRUE; otherwise return
2454 0 and set *OK to FALSE. If a fix is needed, set *FIX_NEEDED to
2455 true and fill in *FIX_EXP, *FIX_PCREL, *FX_R_TYPE and *FIX_ADDA.
2456 Print error messages for failure if PRINT_ERRORS is TRUE; the
2457 opcode starts at STR and has length OPC_LEN. */
2458
2459static unsigned int
2460tic6x_try_encode (tic6x_opcode_id id, tic6x_operand *operands,
2461 unsigned int num_operands, unsigned int this_line_creg,
2462 unsigned int this_line_z, unsigned int func_unit_side,
2463 unsigned int func_unit_cross,
2464 unsigned int func_unit_data_side, int sploop_ii,
2465 expressionS **fix_exp, int *fix_pcrel,
2466 bfd_reloc_code_real_type *fx_r_type, bfd_boolean *fix_adda,
2467 bfd_boolean *fix_needed, bfd_boolean *ok,
2468 bfd_boolean print_errors, char *str, int opc_len)
2469{
2470 const tic6x_opcode *opct;
2471 const tic6x_insn_format *fmt;
2472 unsigned int opcode_value;
2473 unsigned int fld;
2474
2475 opct = &tic6x_opcode_table[id];
2476 fmt = &tic6x_insn_format_table[opct->format];
2477 opcode_value = fmt->cst_bits;
2478
2479 for (fld = 0; fld < opct->num_fixed_fields; fld++)
2480 {
2481 if (opct->fixed_fields[fld].min_val == opct->fixed_fields[fld].max_val)
2482 {
2483 const tic6x_insn_field *fldd;
2484 fldd = tic6x_field_from_fmt (fmt, opct->fixed_fields[fld].field_id);
2485 if (fldd == NULL)
2486 abort ();
51dcdd4d 2487 opcode_value |= opct->fixed_fields[fld].min_val << fldd->bitfields[0].low_pos;
40b36596
JM		 2488 }
2489 }
2490
2491 for (fld = 0; fld < opct->num_variable_fields; fld++)
2492 {
2493 const tic6x_insn_field *fldd;
2494 unsigned int value;
2495 unsigned int opno;
2496 unsigned int ffld;
2497 offsetT sign_value;
2498 unsigned int bits;
2499 unsigned int fcyc_bits;
2500 expressionS *expp;
2501 expressionS ucexp;
2502 tic6x_mem_ref mem;
2503
2504 fldd = tic6x_field_from_fmt (fmt, opct->variable_fields[fld].field_id);
2505 if (fldd == NULL)
2506 abort ();
2507 opno = opct->variable_fields[fld].operand_num;
2508 switch (opct->variable_fields[fld].coding_method)
2509 {
2510 case tic6x_coding_ucst:
2511 if (operands[opno].form != TIC6X_OP_EXP)
2512 abort ();
2513 if (operands[opno].value.exp.X_op != O_constant)
2514 abort ();
2515 ucexp = operands[opno].value.exp;
2516 unsigned_constant:
2517 if (ucexp.X_add_number < 0
51dcdd4d 2518 || ucexp.X_add_number >= (1 << fldd->bitfields[0].width))
40b36596
JM		 2519 {
2520 if (print_errors)
2521 as_bad (_("operand %u of '%.*s' out of range"), opno + 1,
2522 opc_len, str);
2523 *ok = FALSE;
2524 return 0;
2525 }
2526 value = ucexp.X_add_number;
2527 break;
2528
2529 case tic6x_coding_scst:
2530 if (operands[opno].form != TIC6X_OP_EXP)
2531 abort ();
2532 if (operands[opno].value.exp.X_op != O_constant)
2533 {
2534 value = 0;
2535 /* Opcode table should not permit non-constants without
2536 a known relocation for them. */
51dcdd4d 2537 if (fldd->bitfields[0].low_pos != 7 || fldd->bitfields[0].width != 16)
40b36596
JM		 2538 abort ();
2539 *fix_needed = TRUE;
2540 *fix_exp = &operands[opno].value.exp;
2541 *fix_pcrel = 0;
2542 *fx_r_type = BFD_RELOC_C6000_ABS_S16;
2543 *fix_adda = FALSE;
2544 break;
2545 }
2546 sign_value = SEXT (operands[opno].value.exp.X_add_number);
2547 signed_constant:
51dcdd4d
NC		 2548 if (sign_value < -(1 << (fldd->bitfields[0].width - 1))
2549 || (sign_value >= (1 << (fldd->bitfields[0].width - 1))))
40b36596
JM		 2550 {
2551 if (print_errors)
2552 as_bad (_("operand %u of '%.*s' out of range"), opno + 1,
2553 opc_len, str);
2554 *ok = FALSE;
2555 return 0;
2556 }
51dcdd4d
NC		 2557 value = sign_value + (1 << (fldd->bitfields[0].width - 1));
2558 value ^= (1 << (fldd->bitfields[0].width - 1));
40b36596
JM		 2559 break;
2560
2561 case tic6x_coding_ucst_minus_one:
2562 if (operands[opno].form != TIC6X_OP_EXP)
2563 abort ();
2564 if (operands[opno].value.exp.X_op != O_constant)
2565 abort ();
2566 if (operands[opno].value.exp.X_add_number <= 0
51dcdd4d 2567 || operands[opno].value.exp.X_add_number > (1 << fldd->bitfields[0].width))
40b36596
JM		 2568 {
2569 if (print_errors)
2570 as_bad (_("operand %u of '%.*s' out of range"), opno + 1,
2571 opc_len, str);
2572 *ok = FALSE;
2573 return 0;
2574 }
2575 value = operands[opno].value.exp.X_add_number - 1;
2576 break;
2577
2578 case tic6x_coding_scst_negate:
2579 if (operands[opno].form != TIC6X_OP_EXP)
2580 abort ();
2581 if (operands[opno].value.exp.X_op != O_constant)
2582 abort ();
2583 sign_value = SEXT (-operands[opno].value.exp.X_add_number);
2584 goto signed_constant;
2585
2586 case tic6x_coding_ulcst_dpr_byte:
2587 case tic6x_coding_ulcst_dpr_half:
2588 case tic6x_coding_ulcst_dpr_word:
2589 bits = tic6x_dpr_shift (opct->variable_fields[fld].coding_method);
2590 switch (operands[opno].form)
2591 {
2592 case TIC6X_OP_EXP:
2593 if (operands[opno].value.exp.X_op == O_constant)
2594 {
2595 ucexp = operands[opno].value.exp;
2596 goto unsigned_constant;
2597 }
2598 expp = &operands[opno].value.exp;
2599 break;
2600
2601 case TIC6X_OP_MEM_NOUNREG:
2602 mem = operands[opno].value.mem;
2603 tic6x_default_mem_ref (&mem);
2604 if (mem.offset_is_reg)
2605 abort ();
2606 if (mem.offset.exp.X_op == O_constant)
2607 {
2608 ucexp = mem.offset.exp;
2609 if (mem.scaled == tic6x_offset_unscaled)
2610 {
2611 if (ucexp.X_add_number & ((1 << bits) - 1))
2612 {
2613 if (print_errors)
2614 as_bad (_("offset in operand %u of '%.*s' not "
2615 "divisible by %u"), opno + 1, opc_len,
2616 str, 1u << bits);
2617 *ok = FALSE;
2618 return 0;
2619 }
2620 ucexp.X_add_number >>= bits;
2621 }
2622 goto unsigned_constant;
2623 }
2624 if (mem.scaled != tic6x_offset_unscaled)
2625 abort ();
2626 if (operands[opno].value.mem.mod == tic6x_mem_mod_none
2627 || operands[opno].value.mem.scaled != tic6x_offset_unscaled
2628 || operands[opno].value.mem.offset_is_reg)
2629 abort ();
2630 expp = &operands[opno].value.mem.offset.exp;
2631 break;
2632
2633 default:
2634 abort ();
2635 }
2636 value = 0;
2637 /* Opcode table should not use this encoding without a known
2638 relocation. */
51dcdd4d 2639 if (fldd->bitfields[0].low_pos != 8 || fldd->bitfields[0].width != 15)
40b36596
JM		 2640 abort ();
2641 /* We do not check for offset divisibility here; such a
2642 check is not needed at this point to encode the value,
2643 and if there is eventually a problem it will be detected
2644 either in md_apply_fix or at link time. */
2645 *fix_needed = TRUE;
2646 *fix_exp = expp;
2647 *fix_pcrel = 0;
2648 *fx_r_type
2649 = tic6x_dpr_reloc (opct->variable_fields[fld].coding_method);
2650 if (operands[opno].form == TIC6X_OP_EXP)
2651 *fix_adda = TRUE;
2652 else
2653 *fix_adda = FALSE;
2654 break;
2655
2656 case tic6x_coding_lcst_low16:
2657 if (operands[opno].form != TIC6X_OP_EXP)
2658 abort ();
2659 if (operands[opno].value.exp.X_op == O_constant)
2660 value = operands[opno].value.exp.X_add_number & 0xffff;
2661 else
2662 {
2663 value = 0;
2664 /* Opcode table should not use this encoding without a
2665 known relocation. */
51dcdd4d 2666 if (fldd->bitfields[0].low_pos != 7 || fldd->bitfields[0].width != 16)
40b36596
JM		 2667 abort ();
2668 *fix_needed = TRUE;
2669 *fix_exp = &operands[opno].value.exp;
2670 *fix_pcrel = 0;
2671 *fx_r_type = BFD_RELOC_C6000_ABS_L16;
2672 *fix_adda = FALSE;
2673 }
2674 break;
2675
2676 case tic6x_coding_lcst_high16:
2677 if (operands[opno].form != TIC6X_OP_EXP)
2678 abort ();
2679 if (operands[opno].value.exp.X_op == O_constant)
2680 value = (operands[opno].value.exp.X_add_number >> 16) & 0xffff;
2681 else
2682 {
2683 value = 0;
2684 /* Opcode table should not use this encoding without a
2685 known relocation. */
51dcdd4d 2686 if (fldd->bitfields[0].low_pos != 7 || fldd->bitfields[0].width != 16)
40b36596
JM		 2687 abort ();
2688 *fix_needed = TRUE;
2689 *fix_exp = &operands[opno].value.exp;
2690 *fix_pcrel = 0;
2691 *fx_r_type = BFD_RELOC_C6000_ABS_H16;
2692 *fix_adda = FALSE;
2693 }
2694 break;
2695
2696 case tic6x_coding_pcrel:
2697 case tic6x_coding_pcrel_half:
2698 if (operands[opno].form != TIC6X_OP_EXP)
2699 abort ();
2700 value = 0;
2701 *fix_needed = TRUE;
2702 *fix_exp = &operands[opno].value.exp;
2703 *fix_pcrel = 1;
51dcdd4d 2704 if (fldd->bitfields[0].low_pos == 7 && fldd->bitfields[0].width == 21)
40b36596 2705 *fx_r_type = BFD_RELOC_C6000_PCR_S21;
51dcdd4d 2706 else if (fldd->bitfields[0].low_pos == 16 && fldd->bitfields[0].width == 12)
40b36596 2707 *fx_r_type = BFD_RELOC_C6000_PCR_S12;
51dcdd4d 2708 else if (fldd->bitfields[0].low_pos == 13 && fldd->bitfields[0].width == 10)
40b36596 2709 *fx_r_type = BFD_RELOC_C6000_PCR_S10;
51dcdd4d 2710 else if (fldd->bitfields[0].low_pos == 16 && fldd->bitfields[0].width == 7)
40b36596
JM		 2711 *fx_r_type = BFD_RELOC_C6000_PCR_S7;
2712 else
2713 /* Opcode table should not use this encoding without a
2714 known relocation. */
2715 abort ();
2716 *fix_adda = FALSE;
2717 break;
2718
795b8e6b
NC		 2719 case tic6x_coding_regpair_lsb:
2720 switch (operands[opno].form)
2721 {
2722 case TIC6X_OP_REGPAIR:
2723 value = operands[opno].value.reg.num;
2724 break;
2725
2726 default:
2727 abort ();
2728 }
2729 break;
2730
2731 case tic6x_coding_regpair_msb:
2732 switch (operands[opno].form)
2733 {
2734 case TIC6X_OP_REGPAIR:
2735 value = operands[opno].value.reg.num + 1;
2736 break;
2737
2738 default:
2739 abort ();
2740 }
2741 break;
2742
40b36596
JM		 2743 case tic6x_coding_reg:
2744 switch (operands[opno].form)
2745 {
2746 case TIC6X_OP_REG:
2747 case TIC6X_OP_REGPAIR:
2748 value = operands[opno].value.reg.num;
2749 break;
2750
2751 case TIC6X_OP_MEM_NOUNREG:
2752 case TIC6X_OP_MEM_UNREG:
2753 value = operands[opno].value.mem.base_reg.num;
2754 break;
2755
2756 default:
2757 abort ();
2758 }
2759 break;
2760
2761 case tic6x_coding_areg:
2762 switch (operands[opno].form)
2763 {
2764 case TIC6X_OP_REG:
2765 value = (operands[opno].value.reg.num == 15 ? 1 : 0);
2766 break;
2767
2768 case TIC6X_OP_MEM_NOUNREG:
2769 value = (operands[opno].value.mem.base_reg.num == 15 ? 1 : 0);
2770 break;
2771
2772 default:
2773 abort ();
2774 }
2775 break;
2776
2777 case tic6x_coding_crlo:
2778 if (operands[opno].form != TIC6X_OP_CTRL)
2779 abort ();
2780 value = tic6x_ctrl_table[operands[opno].value.ctrl].crlo;
2781 break;
2782
2783 case tic6x_coding_crhi:
2784 if (operands[opno].form != TIC6X_OP_CTRL)
2785 abort ();
2786 value = 0;
2787 break;
2788
2789 case tic6x_coding_reg_shift:
2790 if (operands[opno].form != TIC6X_OP_REGPAIR)
2791 abort ();
2792 value = operands[opno].value.reg.num >> 1;
2793 break;
2794
2795 case tic6x_coding_mem_offset:
2796 if (operands[opno].form != TIC6X_OP_MEM_NOUNREG)
2797 abort ();
2798 mem = operands[opno].value.mem;
2799 tic6x_default_mem_ref (&mem);
2800 if (mem.offset_is_reg)
2801 {
2802 if (mem.scaled != tic6x_offset_scaled)
2803 abort ();
2804 value = mem.offset.reg.num;
2805 }
2806 else
2807 {
2808 int scale;
2809
2810 if (mem.offset.exp.X_op != O_constant)
2811 abort ();
2812 switch (mem.scaled)
2813 {
2814 case tic6x_offset_scaled:
2815 scale = 1;
2816 break;
2817
2818 case tic6x_offset_unscaled:
2819 scale = opct->operand_info[opno].size;
2820 if (scale != 1 && scale != 2 && scale != 4 && scale != 8)
2821 abort ();
2822 break;
2823
2824 default:
2825 abort ();
2826 }
2827 if (mem.offset.exp.X_add_number < 0
51dcdd4d 2828 || mem.offset.exp.X_add_number >= (1 << fldd->bitfields[0].width) * scale)
40b36596
JM		 2829 {
2830 if (print_errors)
2831 as_bad (_("offset in operand %u of '%.*s' out of range"),
2832 opno + 1, opc_len, str);
2833 *ok = FALSE;
2834 return 0;
2835 }
2836 if (mem.offset.exp.X_add_number % scale)
2837 {
2838 if (print_errors)
2839 as_bad (_("offset in operand %u of '%.*s' not "
2840 "divisible by %u"),
2841 opno + 1, opc_len, str, scale);
2842 *ok = FALSE;
2843 return 0;
2844 }
2845 value = mem.offset.exp.X_add_number / scale;
2846 }
2847 break;
2848
2849 case tic6x_coding_mem_offset_noscale:
2850 if (operands[opno].form != TIC6X_OP_MEM_UNREG)
2851 abort ();
2852 mem = operands[opno].value.mem;
2853 tic6x_default_mem_ref (&mem);
2854 if (mem.offset_is_reg)
2855 value = mem.offset.reg.num;
2856 else
2857 {
2858 if (mem.offset.exp.X_op != O_constant)
2859 abort ();
2860 if (mem.offset.exp.X_add_number < 0
51dcdd4d 2861 || mem.offset.exp.X_add_number >= (1 << fldd->bitfields[0].width))
40b36596
JM		 2862 {
2863 if (print_errors)
2864 as_bad (_("offset in operand %u of '%.*s' out of range"),
2865 opno + 1, opc_len, str);
2866 *ok = FALSE;
2867 return 0;
2868 }
2869 value = mem.offset.exp.X_add_number;
2870 }
2871 break;
2872
2873 case tic6x_coding_mem_mode:
2874 if (operands[opno].form != TIC6X_OP_MEM_NOUNREG
2875 && operands[opno].form != TIC6X_OP_MEM_UNREG)
2876 abort ();
2877 mem = operands[opno].value.mem;
2878 tic6x_default_mem_ref (&mem);
2879 switch (mem.mod)
2880 {
2881 case tic6x_mem_mod_plus:
2882 value = 1;
2883 break;
2884
2885 case tic6x_mem_mod_minus:
2886 value = 0;
2887 break;
2888
2889 case tic6x_mem_mod_preinc:
2890 value = 9;
2891 break;
2892
2893 case tic6x_mem_mod_predec:
2894 value = 8;
2895 break;
2896
2897 case tic6x_mem_mod_postinc:
2898 value = 11;
2899 break;
2900
2901 case tic6x_mem_mod_postdec:
2902 value = 10;
2903 break;
2904
2905 default:
2906 abort ();
2907 }
2908 value += (mem.offset_is_reg ? 4 : 0);
2909 break;
2910
2911 case tic6x_coding_scaled:
2912 if (operands[opno].form != TIC6X_OP_MEM_UNREG)
2913 abort ();
2914 mem = operands[opno].value.mem;
2915 tic6x_default_mem_ref (&mem);
2916 switch (mem.scaled)
2917 {
2918 case tic6x_offset_unscaled:
2919 value = 0;
2920 break;
2921
2922 case tic6x_offset_scaled:
2923 value = 1;
2924 break;
2925
2926 default:
2927 abort ();
2928 }
2929 break;
2930
2931 case tic6x_coding_spmask:
2932 /* The position of such a field is hardcoded in the handling
2933 of "||^". */
51dcdd4d 2934 if (fldd->bitfields[0].low_pos != 18)
40b36596
JM		 2935 abort ();
2936 value = 0;
2937 for (opno = 0; opno < num_operands; opno++)
2938 {
2939 unsigned int v;
2940
2941 v = tic6x_encode_spmask (operands[opno].value.func_unit.base,
2942 operands[opno].value.func_unit.side);
2943 if (value & v)
2944 {
2945 if (print_errors)
2946 as_bad (_("functional unit already masked for operand "
2947 "%u of '%.*s'"), opno + 1, opc_len, str);
2948 *ok = FALSE;
2949 return 0;
2950 }
2951 value |= v;
2952 }
2953 break;
2954
2955 case tic6x_coding_reg_unused:
2956 /* This is a placeholder; correct handling goes along with
2957 resource constraint checks. */
2958 value = 0;
2959 break;
2960
2961 case tic6x_coding_fstg:
2962 case tic6x_coding_fcyc:
2963 if (operands[opno].form != TIC6X_OP_EXP)
2964 abort ();
2965 if (operands[opno].value.exp.X_op != O_constant)
2966 abort ();
2967 if (!sploop_ii)
2968 {
2969 if (print_errors)
2970 as_bad (_("'%.*s' instruction not in a software "
2971 "pipelined loop"),
2972 opc_len, str);
2973 *ok = FALSE;
2974 return 0;
2975 }
2976
2977 if (sploop_ii <= 1)
2978 fcyc_bits = 0;
2979 else if (sploop_ii <= 2)
2980 fcyc_bits = 1;
2981 else if (sploop_ii <= 4)
2982 fcyc_bits = 2;
2983 else if (sploop_ii <= 8)
2984 fcyc_bits = 3;
2985 else if (sploop_ii <= 14)
2986 fcyc_bits = 4;
2987 else
2988 abort ();
51dcdd4d 2989 if (fcyc_bits > fldd->bitfields[0].width)
40b36596
JM		 2990 abort ();
2991
2992 if (opct->variable_fields[fld].coding_method == tic6x_coding_fstg)
2993 {
5d4c71e1 2994 int i, t;
40b36596
JM		 2995 if (operands[opno].value.exp.X_add_number < 0
2996 || (operands[opno].value.exp.X_add_number
51dcdd4d 2997 >= (1 << (fldd->bitfields[0].width - fcyc_bits))))
40b36596
JM		 2998 {
2999 if (print_errors)
3000 as_bad (_("operand %u of '%.*s' out of range"), opno + 1,
3001 opc_len, str);
3002 *ok = FALSE;
3003 return 0;
3004 }
5d4c71e1 3005 value = operands[opno].value.exp.X_add_number;
51dcdd4d 3006 for (t = 0, i = fcyc_bits; i < fldd->bitfields[0].width; i++)
5d4c71e1
BS		 3007 {
3008 t = (t << 1) | (value & 1);
3009 value >>= 1;
3010 }
3011 value = t << fcyc_bits;
40b36596
JM		 3012 }
3013 else
3014 {
3015 if (operands[opno].value.exp.X_add_number < 0
3016 || (operands[opno].value.exp.X_add_number >= sploop_ii))
3017 {
3018 if (print_errors)
3019 as_bad (_("operand %u of '%.*s' out of range"), opno + 1,
3020 opc_len, str);
3021 *ok = FALSE;
3022 return 0;
3023 }
3024 value = operands[opno].value.exp.X_add_number;
3025 }
3026 break;
3027
3028 case tic6x_coding_fu:
3029 value = func_unit_side == 2 ? 1 : 0;
3030 break;
3031
3032 case tic6x_coding_data_fu:
3033 value = func_unit_data_side == 2 ? 1 : 0;
3034 break;
3035
3036 case tic6x_coding_xpath:
3037 value = func_unit_cross;
3038 break;
3039
3040 default:
3041 abort ();
3042 }
3043
3044 for (ffld = 0; ffld < opct->num_fixed_fields; ffld++)
3045 if ((opct->fixed_fields[ffld].field_id
3046 == opct->variable_fields[fld].field_id)
3047 && (value < opct->fixed_fields[ffld].min_val
3048 || value > opct->fixed_fields[ffld].max_val))
3049 {
3050 if (print_errors)
3051 as_bad (_("operand %u of '%.*s' out of range"), opno + 1,
3052 opc_len, str);
3053 *ok = FALSE;
3054 return 0;
3055 }
3056
51dcdd4d 3057 opcode_value |= value << fldd->bitfields[0].low_pos;
40b36596
JM		 3058 }
3059
3060 if (this_line_creg)
3061 {
3062 const tic6x_insn_field *creg;
3063 const tic6x_insn_field *z;
3064
3065 creg = tic6x_field_from_fmt (fmt, tic6x_field_creg);
3066 if (creg == NULL)
3067 {
3068 if (print_errors)
3069 as_bad (_("instruction '%.*s' cannot be predicated"),
3070 opc_len, str);
3071 *ok = FALSE;
3072 return 0;
3073 }
3074 z = tic6x_field_from_fmt (fmt, tic6x_field_z);
3075 /* If there is a creg field, there must be a z field; otherwise
3076 there is an error in the format table. */
3077 if (z == NULL)
3078 abort ();
3079
51dcdd4d
NC		 3080 opcode_value |= this_line_creg << creg->bitfields[0].low_pos;
3081 opcode_value |= this_line_z << z->bitfields[0].low_pos;
40b36596
JM		 3082 }
3083
3084 *ok = TRUE;
3085 return opcode_value;
3086}
3087
3088/* Convert the target integer stored in N bytes in BUF to a host
3089 integer, returning that value. */
3090
3091static valueT
3092md_chars_to_number (char *buf, int n)
3093{
3094 valueT result = 0;
3095 unsigned char *p = (unsigned char *) buf;
3096
3097 if (target_big_endian)
3098 {
3099 while (n--)
3100 {
3101 result <<= 8;
3102 result |= (*p++ & 0xff);
3103 }
3104 }
3105 else
3106 {
3107 while (n--)
3108 {
3109 result <<= 8;
3110 result |= (p[n] & 0xff);
3111 }
3112 }
3113
3114 return result;
3115}
3116
3117/* Assemble the instruction starting at STR (an opcode, with the
3118 opcode name all-lowercase). */
3119
3120void
3121md_assemble (char *str)
3122{
3123 char *p;
3124 int opc_len;
3125 bfd_boolean this_line_parallel;
3126 bfd_boolean this_line_spmask;
3127 unsigned int this_line_creg;
3128 unsigned int this_line_z;
d99e5b39 3129 tic6x_label_list *this_insn_label_list;
40b36596
JM		 3130 segment_info_type *seginfo;
3131 tic6x_opcode_list *opc_list, *opc;
3132 tic6x_func_unit_base func_unit_base = tic6x_func_unit_nfu;
3133 unsigned int func_unit_side = 0;
3134 unsigned int func_unit_cross = 0;
3135 unsigned int cross_side = 0;
3136 unsigned int func_unit_data_side = 0;
3137 unsigned int max_matching_opcodes, num_matching_opcodes;
3138 tic6x_opcode_id *opcm = NULL;
3139 unsigned int opc_rank[TIC6X_NUM_PREFER];
3140 const tic6x_opcode *opct = NULL;
3141 int min_rank, try_rank, max_rank;
3142 bfd_boolean num_operands_permitted[TIC6X_MAX_SOURCE_OPERANDS + 1]
3143 = { FALSE };
3144 unsigned int operand_forms[TIC6X_MAX_SOURCE_OPERANDS] = { 0 };
3145 tic6x_operand operands[TIC6X_MAX_SOURCE_OPERANDS];
3146 unsigned int max_num_operands;
3147 unsigned int num_operands_read;
3148 bfd_boolean ok_this_arch, ok_this_fu, ok_this_arch_fu;
3149 bfd_boolean bad_operands = FALSE;
3150 unsigned int opcode_value;
3151 bfd_boolean encoded_ok;
3152 bfd_boolean fix_needed = FALSE;
3153 expressionS *fix_exp = NULL;
3154 int fix_pcrel = 0;
3155 bfd_reloc_code_real_type fx_r_type = BFD_RELOC_UNUSED;
3156 bfd_boolean fix_adda = FALSE;
d99e5b39 3157 fragS *insn_frag;
40b36596
JM		 3158 char *output;
3159
3160 p = str;
3161 while (*p && !is_end_of_line[(unsigned char) *p] && *p != ' ')
3162 p++;
3163
3164 /* This function should only have been called when there is actually
3165 an instruction to assemble. */
3166 if (p == str)
3167 abort ();
3168
59e6276b
JM		 3169 /* Now an instruction has been seen, architecture attributes from
3170 .arch directives merge with rather than overriding the previous
3171 value. */
3172 tic6x_seen_insns = TRUE;
3173 /* If no .arch directives or -march options have been seen, we are
3174 assessing instruction validity based on the C674X default, so set
3175 the attribute accordingly. */
75fa6dc1
JM		 3176 if (tic6x_arch_attribute == C6XABI_Tag_ISA_none)
3177 tic6x_arch_attribute = C6XABI_Tag_ISA_C674X;
59e6276b 3178
40b36596
JM		 3179 /* Reset global settings for parallel bars and predicates now to
3180 avoid extra errors if there are problems with this opcode. */
3181 this_line_parallel = tic6x_line_parallel;
3182 this_line_spmask = tic6x_line_spmask;
3183 this_line_creg = tic6x_line_creg;
3184 this_line_z = tic6x_line_z;
3185 tic6x_line_parallel = FALSE;
3186 tic6x_line_spmask = FALSE;
3187 tic6x_line_creg = 0;
3188 tic6x_line_z = 0;
3189 seginfo = seg_info (now_seg);
d99e5b39
JM		 3190 this_insn_label_list = seginfo->tc_segment_info_data.label_list;
3191 seginfo->tc_segment_info_data.label_list = NULL;
40b36596
JM		 3192
3193 opc_list = hash_find_n (opcode_hash, str, p - str);
3194 if (opc_list == NULL)
3195 {
3196 char c = *p;
3197 *p = 0;
3198 as_bad (_("unknown opcode '%s'"), str);
3199 *p = c;
3200 return;
3201 }
3202
3203 opc_len = p - str;
3204 skip_whitespace (p);
3205
3206 /* See if there is something that looks like a functional unit
3207 specifier. */
3208 if (*p == '.')
3209 {
3210 bfd_boolean good_func_unit;
3211 tic6x_func_unit_base maybe_base = tic6x_func_unit_nfu;
3212 unsigned int maybe_side = 0;
3213 unsigned int maybe_cross = 0;
3214 unsigned int maybe_data_side = 0;
3215
3216 good_func_unit = tic6x_parse_func_unit_base (p + 1, &maybe_base,
3217 &maybe_side);
3218
3219 if (good_func_unit)
3220 {
3221 if (p[3] == ' ' || is_end_of_line[(unsigned char) p[3]])
3222 p += 3;
3223 else if ((p[3] == 'x' || p[3] == 'X')
3224 && (p[4] == ' ' || is_end_of_line[(unsigned char) p[4]]))
3225 {
3226 maybe_cross = 1;
3227 p += 4;
3228 }
3229 else if (maybe_base == tic6x_func_unit_d
3230 && (p[3] == 't' || p[3] == 'T')
3231 && (p[4] == '1' || p[4] == '2')
3232 && (p[5] == ' ' || is_end_of_line[(unsigned char) p[5]]))
3233 {
3234 maybe_data_side = p[4] - '0';
3235 p += 5;
3236 }
3237 else
3238 good_func_unit = FALSE;
3239 }
3240
3241 if (good_func_unit)
3242 {
3243 func_unit_base = maybe_base;
3244 func_unit_side = maybe_side;
3245 func_unit_cross = maybe_cross;
3246 cross_side = (func_unit_cross ? 3 - func_unit_side : func_unit_side);
3247 func_unit_data_side = maybe_data_side;
3248 }
3249
3250 skip_whitespace (p);
3251 }
3252
3253 /* Determine which entries in the opcode table match, and the
3254 associated permitted forms of operands. */
3255 max_matching_opcodes = 0;
3256 for (opc = opc_list; opc; opc = opc->next)
3257 max_matching_opcodes++;
3258 num_matching_opcodes = 0;
3259 opcm = xmalloc (max_matching_opcodes * sizeof (*opcm));
3260 max_num_operands = 0;
3261 ok_this_arch = FALSE;
3262 ok_this_fu = FALSE;
3263 ok_this_arch_fu = FALSE;
3264 for (opc = opc_list; opc; opc = opc->next)
3265 {
3266 unsigned int num_operands;
3267 unsigned int i;
3268 bfd_boolean this_opc_arch_ok = TRUE;
3269 bfd_boolean this_opc_fu_ok = TRUE;
3270
3271 if (tic6x_insn_format_table[tic6x_opcode_table[opc->id].format].num_bits
3272 != 32)
3273 continue;
3274 if (!(tic6x_opcode_table[opc->id].isa_variants & tic6x_features))
3275 this_opc_arch_ok = FALSE;
3276 if (tic6x_opcode_table[opc->id].func_unit != func_unit_base)
3277 this_opc_fu_ok = FALSE;
3278 if (func_unit_side == 1
3279 && (tic6x_opcode_table[opc->id].flags & TIC6X_FLAG_SIDE_B_ONLY))
3280 this_opc_fu_ok = FALSE;
3281 if (func_unit_cross
3282 && (tic6x_opcode_table[opc->id].flags & TIC6X_FLAG_NO_CROSS))
3283 this_opc_fu_ok = FALSE;
3284 if (!func_unit_data_side
3285 && (tic6x_opcode_table[opc->id].flags
3286 & (TIC6X_FLAG_LOAD | TIC6X_FLAG_STORE)))
3287 this_opc_fu_ok = FALSE;
3288 if (func_unit_data_side
3289 && !(tic6x_opcode_table[opc->id].flags
3290 & (TIC6X_FLAG_LOAD | TIC6X_FLAG_STORE)))
3291 this_opc_fu_ok = FALSE;
3292 if (func_unit_data_side == 1
3293 && (tic6x_opcode_table[opc->id].flags & TIC6X_FLAG_SIDE_T2_ONLY))
3294 this_opc_fu_ok = FALSE;
3295 if (this_opc_arch_ok)
3296 ok_this_arch = TRUE;
3297 if (this_opc_fu_ok)
3298 ok_this_fu = TRUE;
3299 if (!this_opc_arch_ok || !this_opc_fu_ok)
3300 continue;
3301 ok_this_arch_fu = TRUE;
3302 opcm[num_matching_opcodes] = opc->id;
3303 num_matching_opcodes++;
3304 num_operands = tic6x_opcode_table[opc->id].num_operands;
3305
3306 if (tic6x_opcode_table[opc->id].flags & TIC6X_FLAG_SPMASK)
3307 {
3308 if (num_operands != 1
3309 || (tic6x_opcode_table[opc->id].operand_info[0].form
3310 != tic6x_operand_func_unit))
3311 abort ();
3312 num_operands = 8;
3313 for (i = 0; i < num_operands; i++)
3314 {
3315 operand_forms[i]
3316 |= tic6x_coarse_operand_form (tic6x_operand_func_unit);
3317 num_operands_permitted[i] = TRUE;
3318 }
3319 }
3320 else
3321 {
3322 for (i = 0; i < num_operands; i++)
3323 {
3324 tic6x_operand_form f
3325 = tic6x_opcode_table[opc->id].operand_info[i].form;
3326
3327 operand_forms[i] |= tic6x_coarse_operand_form (f);
3328 }
3329 }
3330 num_operands_permitted[num_operands] = TRUE;
3331 if (num_operands > max_num_operands)
3332 max_num_operands = num_operands;
3333 }
3334
3335 if (!ok_this_arch)
3336 {
3337 as_bad (_("'%.*s' instruction not supported on this architecture"),
3338 opc_len, str);
3339 free (opcm);
3340 return;
3341 }
3342
3343 if (!ok_this_fu)
3344 {
3345 as_bad (_("'%.*s' instruction not supported on this functional unit"),
3346 opc_len, str);
3347 free (opcm);
3348 return;
3349 }
3350
3351 if (!ok_this_arch_fu)
3352 {
3353 as_bad (_("'%.*s' instruction not supported on this functional unit"
3354 " for this architecture"),
3355 opc_len, str);
3356 free (opcm);
3357 return;
3358 }
3359
3360 /* If there were no instructions matching the above availability
3361 checks, we should now have given an error and returned. */
3362 if (num_matching_opcodes == 0)
3363 abort ();
3364
3365 num_operands_read = 0;
3366 while (TRUE)
3367 {
3368 skip_whitespace (p);
3369 if (is_end_of_line[(unsigned char) *p])
3370 {
3371 if (num_operands_read > 0)
3372 {
3373 as_bad (_("missing operand after comma"));
3374 bad_operands = TRUE;
3375 }
3376 break;
3377 }
3378
3379 if (max_num_operands == 0)
3380 {
3381 as_bad (_("too many operands to '%.*s'"), opc_len, str);
3382 bad_operands = TRUE;
3383 break;
3384 }
3385
3386 if (!tic6x_parse_operand (&p, &operands[num_operands_read],
3387 operand_forms[num_operands_read], str, opc_len,
3388 num_operands_read + 1))
3389 bad_operands = TRUE;
3390 num_operands_read++;
3391
3392 if (is_end_of_line[(unsigned char) *p])
3393 break;
3394 else if (*p == ',')
3395 {
3396 p++;
3397 if (num_operands_read == max_num_operands)
3398 {
3399 as_bad (_("too many operands to '%.*s'"), opc_len, str);
3400 bad_operands = TRUE;
3401 break;
3402 }
3403 continue;
3404 }
3405 else
3406 /* Operand parsing should consume whole operands. */
3407 abort ();
3408 }
3409
3410 if (!bad_operands && !num_operands_permitted[num_operands_read])
3411 {
3412 as_bad (_("bad number of operands to '%.*s'"), opc_len, str);
3413 bad_operands = TRUE;
3414 }
3415
3416 if (!bad_operands)
3417 {
3418 /* Each operand is of the right syntactic form for some opcode
3419 choice, and the number of operands is valid. Check that each
3420 operand is OK in detail for some opcode choice with the right
3421 number of operands. */
3422 unsigned int i;
3423
3424 for (i = 0; i < num_operands_read; i++)
3425 {
3426 bfd_boolean coarse_ok = FALSE;
3427 bfd_boolean fine_ok = FALSE;
3428 tic6x_operand_match fine_failure = tic6x_match_matches;
3429 unsigned int j;
3430
3431 for (j = 0; j < num_matching_opcodes; j++)
3432 {
3433 tic6x_operand_form f;
3434 tic6x_rw rw;
3435 unsigned int cf;
3436 tic6x_operand_match this_fine_failure;
3437
3438 if (tic6x_opcode_table[opcm[j]].flags & TIC6X_FLAG_SPMASK)
3439 {
3440 f = tic6x_operand_func_unit;
3441 rw = tic6x_rw_none;
3442 }
3443 else
3444 {
3445 if (tic6x_opcode_table[opcm[j]].num_operands
3446 != num_operands_read)
3447 continue;
3448
3449 f = tic6x_opcode_table[opcm[j]].operand_info[i].form;
3450 rw = tic6x_opcode_table[opcm[j]].operand_info[i].rw;
3451 }
3452 cf = tic6x_coarse_operand_form (f);
3453
3454 if (operands[i].form != cf)
3455 continue;
3456
3457 coarse_ok = TRUE;
3458 this_fine_failure
3459 = tic6x_operand_matches_form (&operands[i], f, rw,
3460 func_unit_side,
3461 cross_side,
3462 func_unit_data_side);
3463 if (this_fine_failure == tic6x_match_matches)
3464 {
3465 fine_ok = TRUE;
3466 break;
3467 }
3468 if (fine_failure == tic6x_match_matches
3469 || fine_failure > this_fine_failure)
3470 fine_failure = this_fine_failure;
3471 }
3472
3473 /* No instructions should have operand syntactic forms only
3474 acceptable with certain numbers of operands, so no
3475 diagnostic for this case. */
3476 if (!coarse_ok)
3477 abort ();
3478
3479 if (!fine_ok)
3480 {
3481 switch (fine_failure)
3482 {
3483 case tic6x_match_non_const:
3484 as_bad (_("operand %u of '%.*s' not constant"),
3485 i + 1, opc_len, str);
3486 break;
3487
3488 case tic6x_match_wrong_side:
3489 as_bad (_("operand %u of '%.*s' on wrong side"),
3490 i + 1, opc_len, str);
3491 break;
3492
3493 case tic6x_match_bad_return:
3494 as_bad (_("operand %u of '%.*s' not a valid return "
3495 "address register"),
3496 i + 1, opc_len, str);
3497 break;
3498
3499 case tic6x_match_ctrl_write_only:
3500 as_bad (_("operand %u of '%.*s' is write-only"),
3501 i + 1, opc_len, str);
3502 break;
3503
3504 case tic6x_match_ctrl_read_only:
3505 as_bad (_("operand %u of '%.*s' is read-only"),
3506 i + 1, opc_len, str);
3507 break;
3508
3509 case tic6x_match_bad_mem:
3510 as_bad (_("operand %u of '%.*s' not a valid memory "
3511 "reference"),
3512 i + 1, opc_len, str);
3513 break;
3514
3515 case tic6x_match_bad_address:
3516 as_bad (_("operand %u of '%.*s' not a valid base "
3517 "address register"),
3518 i + 1, opc_len, str);
3519 break;
3520
3521 default:
3522 abort ();
3523 }
3524 bad_operands = TRUE;
3525 break;
3526 }
3527 }
3528 }
3529
3530 if (!bad_operands)
3531 {
3532 /* Each operand is OK for some opcode choice, and the number of
3533 operands is valid. Check whether there is an opcode choice
3534 for which all operands are simultaneously valid. */
3535 unsigned int i;
3536 bfd_boolean found_match = FALSE;
3537
3538 for (i = 0; i < TIC6X_NUM_PREFER; i++)
3539 opc_rank[i] = (unsigned int) -1;
3540
3541 min_rank = TIC6X_NUM_PREFER - 1;
3542 max_rank = 0;
3543
3544 for (i = 0; i < num_matching_opcodes; i++)
3545 {
3546 unsigned int j;
3547 bfd_boolean this_matches = TRUE;
3548
3549 if (!(tic6x_opcode_table[opcm[i]].flags & TIC6X_FLAG_SPMASK)
3550 && tic6x_opcode_table[opcm[i]].num_operands != num_operands_read)
3551 continue;
3552
3553 for (j = 0; j < num_operands_read; j++)
3554 {
3555 tic6x_operand_form f;
3556 tic6x_rw rw;
3557
3558 if (tic6x_opcode_table[opcm[i]].flags & TIC6X_FLAG_SPMASK)
3559 {
3560 f = tic6x_operand_func_unit;
3561 rw = tic6x_rw_none;
3562 }
3563 else
3564 {
3565 f = tic6x_opcode_table[opcm[i]].operand_info[j].form;
3566 rw = tic6x_opcode_table[opcm[i]].operand_info[j].rw;
3567 }
3568 if (tic6x_operand_matches_form (&operands[j], f, rw,
3569 func_unit_side,
3570 cross_side,
3571 func_unit_data_side)
3572 != tic6x_match_matches)
3573 {
3574 this_matches = FALSE;
3575 break;
3576 }
3577 }
3578
3579 if (this_matches)
3580 {
3581 int rank = TIC6X_PREFER_VAL (tic6x_opcode_table[opcm[i]].flags);
3582
3583 if (rank < min_rank)
3584 min_rank = rank;
3585 if (rank > max_rank)
3586 max_rank = rank;
3587
3588 if (opc_rank[rank] == (unsigned int) -1)
3589 opc_rank[rank] = i;
3590 else
3591 /* The opcode table should provide a total ordering
3592 for all cases where multiple matches may get
3593 here. */
3594 abort ();
3595
3596 found_match = TRUE;
3597 }
3598 }
3599
3600 if (!found_match)
3601 {
3602 as_bad (_("bad operand combination for '%.*s'"), opc_len, str);
3603 bad_operands = TRUE;
3604 }
3605 }
3606
3607 if (bad_operands)
3608 {
3609 free (opcm);
3610 return;
3611 }
3612
3613 opcode_value = 0;
3614 encoded_ok = FALSE;
3615 for (try_rank = max_rank; try_rank >= min_rank; try_rank--)
3616 {
3617 fix_needed = FALSE;
3618
3619 if (opc_rank[try_rank] == (unsigned int) -1)
3620 continue;
3621
3622 opcode_value = tic6x_try_encode (opcm[opc_rank[try_rank]], operands,
3623 num_operands_read, this_line_creg,
3624 this_line_z, func_unit_side,
3625 func_unit_cross, func_unit_data_side,
3626 seginfo->tc_segment_info_data.sploop_ii,
3627 &fix_exp, &fix_pcrel, &fx_r_type,
3628 &fix_adda, &fix_needed, &encoded_ok,
3629 (try_rank == min_rank ? TRUE : FALSE),
3630 str, opc_len);
3631 if (encoded_ok)
3632 {
3633 opct = &tic6x_opcode_table[opcm[opc_rank[try_rank]]];
3634 break;
3635 }
3636 }
3637
3638 free (opcm);
3639
3640 if (!encoded_ok)
3641 return;
3642
3643 if (this_line_parallel)
3644 {
d99e5b39
JM		 3645 insn_frag = seginfo->tc_segment_info_data.execute_packet_frag;
3646 if (insn_frag == NULL)
40b36596
JM		 3647 {
3648 as_bad (_("parallel instruction not following another instruction"));
3649 return;
3650 }
3651
d99e5b39 3652 if (insn_frag->fr_fix >= 32)
40b36596
JM		 3653 {
3654 as_bad (_("too many instructions in execute packet"));
3655 return;
3656 }
3657
d99e5b39 3658 if (this_insn_label_list != NULL)
40b36596
JM		 3659 as_bad (_("label not at start of execute packet"));
3660
3661 if (opct->flags & TIC6X_FLAG_FIRST)
3662 as_bad (_("'%.*s' instruction not at start of execute packet"),
3663 opc_len, str);
3664
3665 *seginfo->tc_segment_info_data.last_insn_lsb |= 0x1;
d99e5b39 3666 output = insn_frag->fr_literal + insn_frag->fr_fix;
40b36596
JM		 3667 }
3668 else
3669 {
d99e5b39
JM		 3670 tic6x_label_list *l;
3671
40b36596 3672 seginfo->tc_segment_info_data.spmask_addr = NULL;
38bd8d09 3673 seginfo->tc_segment_info_data.func_units_used = 0;
d99e5b39
JM		 3674
3675 /* Start a new frag for this execute packet. */
3676 if (frag_now_fix () != 0)
3677 {
3678 if (frag_now->fr_type != rs_machine_dependent)
3679 frag_wane (frag_now);
3680
3681 frag_new (0);
3682 }
3683 frag_grow (32);
3684 insn_frag = seginfo->tc_segment_info_data.execute_packet_frag = frag_now;
3685 for (l = this_insn_label_list; l; l = l->next)
3686 {
3687 symbol_set_frag (l->label, frag_now);
3688 S_SET_VALUE (l->label, 0);
3689 S_SET_SEGMENT (l->label, now_seg);
3690 }
3691 tic6x_free_label_list (this_insn_label_list);
3692 dwarf2_emit_insn (0);
3693 output = frag_var (rs_machine_dependent, 32, 32, 0, NULL, 0, NULL);
3694 /* This must be the same as the frag to which a pointer was just
3695 saved. */
3696 if (output != insn_frag->fr_literal)
3697 abort ();
3698 insn_frag->tc_frag_data.is_insns = TRUE;
3699 insn_frag->tc_frag_data.can_cross_fp_boundary
3700 = tic6x_can_cross_fp_boundary;
40b36596
JM		 3701 }
3702
38bd8d09
JM		 3703 if (func_unit_base != tic6x_func_unit_nfu)
3704 {
3705 unsigned int func_unit_enc;
3706
3707 func_unit_enc = tic6x_encode_spmask (func_unit_base, func_unit_side);
3708
3709 if (seginfo->tc_segment_info_data.func_units_used & func_unit_enc)
3710 as_bad (_("functional unit already used in this execute packet"));
3711
3712 seginfo->tc_segment_info_data.func_units_used |= func_unit_enc;
3713 }
3714
40b36596
JM		 3715 if (opct->flags & TIC6X_FLAG_SPLOOP)
3716 {
3717 if (seginfo->tc_segment_info_data.sploop_ii)
3718 as_bad (_("nested software pipelined loop"));
3719 if (num_operands_read != 1
3720 || operands[0].form != TIC6X_OP_EXP
3721 || operands[0].value.exp.X_op != O_constant)
3722 abort ();
3723 seginfo->tc_segment_info_data.sploop_ii
3724 = operands[0].value.exp.X_add_number;
3725 }
3726 else if (opct->flags & TIC6X_FLAG_SPKERNEL)
3727 {
3728 if (!seginfo->tc_segment_info_data.sploop_ii)
3729 as_bad (_("'%.*s' instruction not in a software pipelined loop"),
3730 opc_len, str);
3731 seginfo->tc_segment_info_data.sploop_ii = 0;
3732 }
3733
3734 if (this_line_spmask)
3735 {
3736 if (seginfo->tc_segment_info_data.spmask_addr == NULL)
3737 as_bad (_("'||^' without previous SPMASK"));
3738 else if (func_unit_base == tic6x_func_unit_nfu)
3739 as_bad (_("cannot mask instruction using no functional unit"));
3740 else
3741 {
3742 unsigned int spmask_opcode;
3743 unsigned int mask_bit;
3744
3745 spmask_opcode
3746 = md_chars_to_number (seginfo->tc_segment_info_data.spmask_addr,
3747 4);
3748 mask_bit = tic6x_encode_spmask (func_unit_base, func_unit_side);
3749 mask_bit <<= 18;
3750 if (spmask_opcode & mask_bit)
3751 as_bad (_("functional unit already masked"));
3752 spmask_opcode |= mask_bit;
3753 md_number_to_chars (seginfo->tc_segment_info_data.spmask_addr,
3754 spmask_opcode, 4);
3755 }
3756 }
3757
3758 record_alignment (now_seg, 5);
40b36596
JM		 3759 md_number_to_chars (output, opcode_value, 4);
3760 if (fix_needed)
d99e5b39 3761 tic6x_fix_new_exp (insn_frag, output - insn_frag->fr_literal, 4, fix_exp,
40b36596 3762 fix_pcrel, fx_r_type, fix_adda);
d99e5b39
JM		 3763 insn_frag->fr_fix += 4;
3764 insn_frag->fr_var -= 4;
40b36596
JM		 3765 seginfo->tc_segment_info_data.last_insn_lsb
3766 = (target_big_endian ? output + 3 : output);
3767 if (opct->flags & TIC6X_FLAG_SPMASK)
3768 seginfo->tc_segment_info_data.spmask_addr = output;
40b36596
JM		 3769}
3770
3771/* Modify NEWVAL (32-bit) by inserting VALUE, shifted right by SHIFT
3772 and the least significant BITS bits taken, at position POS. */
3773#define MODIFY_VALUE(NEWVAL, VALUE, SHIFT, POS, BITS) \
3774 do { \
3775 (NEWVAL) &= 0xffffffffU & ~(((1U << (BITS)) - 1) << (POS)); \
3776 (NEWVAL) |= (((VALUE) >> (SHIFT)) & ((1U << (BITS)) - 1)) << (POS); \
3777 } while (0)
3778
3779/* Apply a fixup to the object file. */
3780
3781void
3782md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
3783{
3784 offsetT value = *valP;
3785 char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
3786
3787 value = SEXT (value);
3788 *valP = value;
3789
3790 fixP->fx_offset = SEXT (fixP->fx_offset);
3791
3792 if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0)
3793 fixP->fx_done = 1;
3794
3795 /* We do our own overflow checks. */
3796 fixP->fx_no_overflow = 1;
3797
3798 switch (fixP->fx_r_type)
3799 {
3800 case BFD_RELOC_NONE:
2fbb87f6 3801 case BFD_RELOC_C6000_EHTYPE:
40b36596
JM		 3802 /* Force output to the object file. */
3803 fixP->fx_done = 0;
3804 break;
3805
3806 case BFD_RELOC_32:
3807 if (fixP->fx_done || !seg->use_rela_p)
3808 md_number_to_chars (buf, value, 4);
3809 break;
3810
3811 case BFD_RELOC_16:
3812 if (fixP->fx_done || !seg->use_rela_p)
3813 {
3814 if (value < -0x8000 || value > 0xffff)
3815 as_bad_where (fixP->fx_file, fixP->fx_line,
3816 _("value too large for 2-byte field"));
3817 md_number_to_chars (buf, value, 2);
3818 }
3819 break;
3820
3821 case BFD_RELOC_8:
3822 if (fixP->fx_done || !seg->use_rela_p)
3823 {
3824 if (value < -0x80 || value > 0xff)
3825 as_bad_where (fixP->fx_file, fixP->fx_line,
3826 _("value too large for 1-byte field"));
3827 md_number_to_chars (buf, value, 1);
3828 }
3829 break;
3830
3831 case BFD_RELOC_C6000_ABS_S16:
3832 case BFD_RELOC_C6000_ABS_L16:
3833 case BFD_RELOC_C6000_SBR_S16:
3834 case BFD_RELOC_C6000_SBR_L16_B:
3835 case BFD_RELOC_C6000_SBR_L16_H:
3836 case BFD_RELOC_C6000_SBR_L16_W:
3837 case BFD_RELOC_C6000_SBR_GOT_L16_W:
3838 if (fixP->fx_done || !seg->use_rela_p)
3839 {
3840 offsetT newval = md_chars_to_number (buf, 4);
41820509
JM		 3841 int shift;
3842
3843 switch (fixP->fx_r_type)
3844 {
3845 case BFD_RELOC_C6000_SBR_L16_H:
3846 shift = 1;
3847 break;
3848
3849 case BFD_RELOC_C6000_SBR_L16_W:
3850 case BFD_RELOC_C6000_SBR_GOT_L16_W:
3851 shift = 2;
3852 break;
3853
3854 default:
3855 shift = 0;
3856 break;
3857 }
40b36596 3858
41820509 3859 MODIFY_VALUE (newval, value, shift, 7, 16);
40b36596
JM		 3860 if ((value < -0x8000 || value > 0x7fff)
3861 && (fixP->fx_r_type == BFD_RELOC_C6000_ABS_S16
3862 || fixP->fx_r_type == BFD_RELOC_C6000_SBR_S16))
3863 as_bad_where (fixP->fx_file, fixP->fx_line,
3864 _("immediate offset out of range"));
3865
3866 md_number_to_chars (buf, newval, 4);
3867 }
3868 if (fixP->fx_done
3869 && fixP->fx_r_type != BFD_RELOC_C6000_ABS_S16
3870 && fixP->fx_r_type != BFD_RELOC_C6000_ABS_L16)
3871 abort ();
3872 break;
3873
3874 case BFD_RELOC_C6000_ABS_H16:
3875 case BFD_RELOC_C6000_SBR_H16_B:
3876 case BFD_RELOC_C6000_SBR_H16_H:
3877 case BFD_RELOC_C6000_SBR_H16_W:
3878 case BFD_RELOC_C6000_SBR_GOT_H16_W:
3879 if (fixP->fx_done || !seg->use_rela_p)
3880 {
3881 offsetT newval = md_chars_to_number (buf, 4);
41820509
JM		 3882 int shift;
3883
3884 switch (fixP->fx_r_type)
3885 {
3886 case BFD_RELOC_C6000_SBR_H16_H:
3887 shift = 17;
3888 break;
3889
3890 case BFD_RELOC_C6000_SBR_H16_W:
3891 case BFD_RELOC_C6000_SBR_GOT_H16_W:
3892 shift = 18;
3893 break;
40b36596 3894
41820509
JM		 3895 default:
3896 shift = 16;
3897 break;
3898 }
3899
3900 MODIFY_VALUE (newval, value, shift, 7, 16);
40b36596
JM		 3901
3902 md_number_to_chars (buf, newval, 4);
3903 }
3904 if (fixP->fx_done && fixP->fx_r_type != BFD_RELOC_C6000_ABS_H16)
3905 abort ();
3906 break;
3907
4a732032
BS		 3908 case BFD_RELOC_C6000_PCR_H16:
3909 case BFD_RELOC_C6000_PCR_L16:
3910 if (fixP->fx_done || !seg->use_rela_p)
3911 {
3912 offsetT newval = md_chars_to_number (buf, 4);
3913 int shift = fixP->fx_r_type == BFD_RELOC_C6000_PCR_H16 ? 16 : 0;
3914
3915 MODIFY_VALUE (newval, value, shift, 7, 16);
3916
3917 md_number_to_chars (buf, newval, 4);
3918 }
3919 break;
3920
40b36596
JM		 3921 case BFD_RELOC_C6000_SBR_U15_B:
3922 if (fixP->fx_done || !seg->use_rela_p)
3923 {
3924 offsetT newval = md_chars_to_number (buf, 4);
3925
3926 MODIFY_VALUE (newval, value, 0, 8, 15);
3927 if (value < 0 || value > 0x7fff)
3928 as_bad_where (fixP->fx_file, fixP->fx_line,
3929 _("immediate offset out of range"));
3930
3931 md_number_to_chars (buf, newval, 4);
3932 }
3933 break;
3934
3935 case BFD_RELOC_C6000_SBR_U15_H:
3936 if (fixP->fx_done || !seg->use_rela_p)
3937 {
3938 offsetT newval = md_chars_to_number (buf, 4);
3939
3940 /* Constant ADDA operands, processed as constant when the
3941 instruction is parsed, are encoded as-is rather than
3942 shifted. If the operand of an ADDA instruction is now
3943 constant (for example, the difference between two labels
3944 found after the instruction), ensure it is encoded the
3945 same way it would have been if the constant value had
3946 been known when the instruction was parsed. */
3947 if (fixP->tc_fix_data.fix_adda && fixP->fx_done)
3948 value <<= 1;
3949
3950 MODIFY_VALUE (newval, value, 1, 8, 15);
3951 if (value & 1)
3952 as_bad_where (fixP->fx_file, fixP->fx_line,
3953 _("immediate offset not 2-byte-aligned"));
3954 if (value < 0 || value > 0xfffe)
3955 as_bad_where (fixP->fx_file, fixP->fx_line,
3956 _("immediate offset out of range"));
3957
3958 md_number_to_chars (buf, newval, 4);
3959 }
3960 break;
3961
3962 case BFD_RELOC_C6000_SBR_U15_W:
3963 case BFD_RELOC_C6000_SBR_GOT_U15_W:
3964 if (fixP->fx_done || !seg->use_rela_p)
3965 {
3966 offsetT newval = md_chars_to_number (buf, 4);
3967
3968 /* Constant ADDA operands, processed as constant when the
3969 instruction is parsed, are encoded as-is rather than
3970 shifted. If the operand of an ADDA instruction is now
3971 constant (for example, the difference between two labels
3972 found after the instruction), ensure it is encoded the
3973 same way it would have been if the constant value had
3974 been known when the instruction was parsed. */
3975 if (fixP->tc_fix_data.fix_adda && fixP->fx_done)
3976 value <<= 2;
3977
3978 MODIFY_VALUE (newval, value, 2, 8, 15);
3979 if (value & 3)
3980 as_bad_where (fixP->fx_file, fixP->fx_line,
3981 _("immediate offset not 4-byte-aligned"));
3982 if (value < 0 || value > 0x1fffc)
3983 as_bad_where (fixP->fx_file, fixP->fx_line,
3984 _("immediate offset out of range"));
3985
3986 md_number_to_chars (buf, newval, 4);
3987 }
3988 if (fixP->fx_done && fixP->fx_r_type != BFD_RELOC_C6000_SBR_U15_W)
3989 abort ();
3990 break;
3991
3992 case BFD_RELOC_C6000_DSBT_INDEX:
3993 if (value != 0)
3994 as_bad_where (fixP->fx_file, fixP->fx_line,
3995 _("addend used with $DSBT_INDEX"));
3996 if (fixP->fx_done)
3997 abort ();
3998 break;
3999
4000 case BFD_RELOC_C6000_PCR_S21:
4001 if (fixP->fx_done || !seg->use_rela_p)
4002 {
4003 offsetT newval = md_chars_to_number (buf, 4);
4004
4005 MODIFY_VALUE (newval, value, 2, 7, 21);
4006
4007 if (value & 3)
4008 as_bad_where (fixP->fx_file, fixP->fx_line,
4009 _("PC-relative offset not 4-byte-aligned"));
4010 if (value < -0x400000 || value > 0x3ffffc)
4011 as_bad_where (fixP->fx_file, fixP->fx_line,
4012 _("PC-relative offset out of range"));
4013
4014 md_number_to_chars (buf, newval, 4);
4015 }
4016 break;
4017
4018 case BFD_RELOC_C6000_PCR_S12:
4019 if (fixP->fx_done || !seg->use_rela_p)
4020 {
4021 offsetT newval = md_chars_to_number (buf, 4);
4022
4023 MODIFY_VALUE (newval, value, 2, 16, 12);
4024
4025 if (value & 3)
4026 as_bad_where (fixP->fx_file, fixP->fx_line,
4027 _("PC-relative offset not 4-byte-aligned"));
4028 if (value < -0x2000 || value > 0x1ffc)
4029 as_bad_where (fixP->fx_file, fixP->fx_line,
4030 _("PC-relative offset out of range"));
4031
4032 md_number_to_chars (buf, newval, 4);
4033 }
4034 break;
4035
4036 case BFD_RELOC_C6000_PCR_S10:
4037 if (fixP->fx_done || !seg->use_rela_p)
4038 {
4039 offsetT newval = md_chars_to_number (buf, 4);
4040
4041 MODIFY_VALUE (newval, value, 2, 13, 10);
4042
4043 if (value & 3)
4044 as_bad_where (fixP->fx_file, fixP->fx_line,
4045 _("PC-relative offset not 4-byte-aligned"));
4046 if (value < -0x800 || value > 0x7fc)
4047 as_bad_where (fixP->fx_file, fixP->fx_line,
4048 _("PC-relative offset out of range"));
4049
4050 md_number_to_chars (buf, newval, 4);
4051 }
4052 break;
4053
4054 case BFD_RELOC_C6000_PCR_S7:
4055 if (fixP->fx_done || !seg->use_rela_p)
4056 {
4057 offsetT newval = md_chars_to_number (buf, 4);
4058
4059 MODIFY_VALUE (newval, value, 2, 16, 7);
4060
4061 if (value & 3)
4062 as_bad_where (fixP->fx_file, fixP->fx_line,
4063 _("PC-relative offset not 4-byte-aligned"));
4064 if (value < -0x100 || value > 0xfc)
4065 as_bad_where (fixP->fx_file, fixP->fx_line,
4066 _("PC-relative offset out of range"));
4067
4068 md_number_to_chars (buf, newval, 4);
4069 }
4070 break;
4071
1bce6bd8
PB		 4072 case BFD_RELOC_C6000_PREL31:
4073 /* Force output to the object file. */
4074 fixP->fx_done = 0;
4075 break;
4076
40b36596
JM		 4077 default:
4078 abort ();
4079 }
4080}
4081
4082/* Convert a floating-point number to target (IEEE) format. */
4083
4084char *
4085md_atof (int type, char *litP, int *sizeP)
4086{
4087 return ieee_md_atof (type, litP, sizeP, target_big_endian);
4088}
4089
d99e5b39
JM		 4090/* Adjust the frags in SECTION (see tic6x_end). */
4091
4092static void
4093tic6x_adjust_section (bfd *abfd ATTRIBUTE_UNUSED, segT section,
4094 void *dummy ATTRIBUTE_UNUSED)
4095{
4096 segment_info_type *info;
4097 frchainS *frchp;
4098 fragS *fragp;
4099 bfd_boolean have_code = FALSE;
4100 bfd_boolean have_non_code = FALSE;
4101
4102 info = seg_info (section);
4103 if (info == NULL)
4104 return;
4105
4106 for (frchp = info->frchainP; frchp; frchp = frchp->frch_next)
4107 for (fragp = frchp->frch_root; fragp; fragp = fragp->fr_next)
4108 switch (fragp->fr_type)
4109 {
4110 case rs_machine_dependent:
4111 if (fragp->tc_frag_data.is_insns)
4112 have_code = TRUE;
4113 break;
4114
4115 case rs_dummy:
4116 case rs_fill:
4117 if (fragp->fr_fix > 0)
4118 have_non_code = TRUE;
4119 break;
4120
4121 default:
4122 have_non_code = TRUE;
4123 break;
4124 }
4125
4126 /* Process alignment requirements in a code-only section. */
4127 if (have_code && !have_non_code)
4128 {
4129 /* If we need to insert an odd number of instructions to meet an
4130 alignment requirement, there must have been an odd number of
4131 instructions since the last 8-byte-aligned execute packet
4132 boundary. So there must have been an execute packet with an
4133 odd number (and so a number fewer than 8) of instructions
4134 into which we can insert a NOP without breaking any previous
4135 alignments.
4136
4137 If then we need to insert a number 2 mod 4 of instructions,
4138 the number of instructions since the last 16-byte-aligned
4139 execute packet boundary must be 2 mod 4. So between that
4140 boundary and the following 8-byte-aligned boundary there must
4141 either be at least one execute packet with 2-mod-4
4142 instructions, or at least two with an odd number of
4143 instructions; again, greedily inserting NOPs as soon as
4144 possible suffices to meet the alignment requirement.
4145
4146 If then we need to insert 4 instructions, we look between the
4147 last 32-byte-aligned boundary and the following
4148 16-byte-aligned boundary. The sizes of the execute packets
4149 in this range total 4 instructions mod 8, so again there is
4150 room for greedy insertion of NOPs to meet the alignment
4151 requirement, and before any intermediate point with 8-byte
4152 (2-instruction) alignment requirement the sizes of execute
4153 packets (and so the room for NOPs) will total 2 instructions
4154 mod 4 so greedy insertion will not break such alignments.
4155
4156 So we can always meet these alignment requirements by
4157 inserting NOPs in parallel with existing execute packets, and
4158 by induction the approach described above inserts the minimum
4159 number of such NOPs. */
4160
4161 /* The number of NOPs we are currently looking to insert, if we
4162 have gone back to insert NOPs. */
4163 unsigned int want_insert = 0;
4164
4165 /* Out of that number, the number inserted so far in the current
4166 stage of the above algorithm. */
4167 unsigned int want_insert_done_so_far = 0;
4168
4169 /* The position mod 32 at the start of the current frag. */
4170 unsigned int pos = 0;
4171
4172 /* The locations in the frag chain of the most recent frags at
4173 the start of which there is the given alignment. */
4174 frchainS *frchp_last32, *frchp_last16, *frchp_last8;
4175 fragS *fragp_last32, *fragp_last16, *fragp_last8;
4176 unsigned int pos_last32, pos_last16, pos_last8;
4177
4178 frchp_last32 = frchp_last16 = frchp_last8 = info->frchainP;
4179 fragp_last32 = fragp_last16 = fragp_last8 = info->frchainP->frch_root;
4180 pos_last32 = pos_last16 = pos_last8 = 0;
4181
4182 for (frchp = info->frchainP; frchp; frchp = frchp->frch_next)
4183 for (fragp = frchp->frch_root; fragp; fragp = fragp->fr_next)
4184 look_at_frag:
4185 {
4186 bfd_boolean go_back = FALSE;
4187 frchainS *frchp_next;
4188 fragS *fragp_next;
4189
4190 if (fragp->fr_type != rs_machine_dependent)
4191 continue;
4192
4193 if (fragp->tc_frag_data.is_insns
4194 && pos + fragp->fr_fix > 32
4195 && !fragp->tc_frag_data.can_cross_fp_boundary)
4196 {
4197 /* As described above, we should always have met an
4198 alignment requirement by the time we come back to
4199 it. */
4200 if (want_insert)
4201 abort ();
4202
4203 if (pos & 3)
4204 abort ();
4205 want_insert = (32 - pos) >> 2;
4206 if (want_insert > 7)
4207 abort ();
4208 want_insert_done_so_far = 0;
4209 go_back = TRUE;
4210 }
4211
4212 if (!fragp->tc_frag_data.is_insns)
4213 {
4214 unsigned int would_insert_bytes;
4215
4216 if (!(pos & ((1 << fragp->fr_offset) - 1)))
4217 /* This alignment requirement is already met. */
4218 continue;
4219
4220 /* As described above, we should always have met an
4221 alignment requirement by the time we come back to
4222 it. */
4223 if (want_insert)
4224 abort ();
4225
4226 /* We may not be able to meet this requirement within
4227 the given number of characters. */
4228 would_insert_bytes
4229 = ((1 << fragp->fr_offset)
4230 - (pos & ((1 << fragp->fr_offset) - 1)));
4231
4232 if (fragp->fr_subtype != 0
4233 && would_insert_bytes > fragp->fr_subtype)
4234 continue;
4235
4236 /* An unmet alignment must be 8, 16 or 32 bytes;
4237 smaller ones must always be met within code-only
4238 sections and larger ones cause the section not to
4239 be code-only. */
4240 if (fragp->fr_offset != 3
4241 && fragp->fr_offset != 4
4242 && fragp->fr_offset != 5)
4243 abort ();
4244
4245 if (would_insert_bytes & 3)
4246 abort ();
4247 want_insert = would_insert_bytes >> 2;
4248 if (want_insert > 7)
4249 abort ();
4250 want_insert_done_so_far = 0;
4251 go_back = TRUE;
4252 }
4253 else if (want_insert && !go_back)
4254 {
4255 unsigned int num_insns = fragp->fr_fix >> 2;
4256 unsigned int max_poss_nops = 8 - num_insns;
4257
4258 if (max_poss_nops)
4259 {
4260 unsigned int cur_want_nops, max_want_nops, do_nops, i;
4261
4262 if (want_insert & 1)
4263 cur_want_nops = 1;
4264 else if (want_insert & 2)
4265 cur_want_nops = 2;
4266 else if (want_insert & 4)
4267 cur_want_nops = 4;
4268 else
4269 abort ();
4270
4271 max_want_nops = cur_want_nops - want_insert_done_so_far;
4272
4273 do_nops = (max_poss_nops < max_want_nops
4274 ? max_poss_nops
4275 : max_want_nops);
4276 for (i = 0; i < do_nops; i++)
4277 {
4278 md_number_to_chars (fragp->fr_literal + fragp->fr_fix,
4279 0, 4);
4280 if (target_big_endian)
4281 fragp->fr_literal[fragp->fr_fix - 1] |= 0x1;
4282 else
4283 fragp->fr_literal[fragp->fr_fix - 4] |= 0x1;
4284 fragp->fr_fix += 4;
4285 fragp->fr_var -= 4;
4286 }
4287 want_insert_done_so_far += do_nops;
4288 if (want_insert_done_so_far == cur_want_nops)
4289 {
4290 want_insert -= want_insert_done_so_far;
4291 want_insert_done_so_far = 0;
4292 if (want_insert)
4293 go_back = TRUE;
4294 }
4295 }
4296 }
4297 if (go_back)
4298 {
4299 if (want_insert & 1)
4300 {
4301 frchp = frchp_last8;
4302 fragp = fragp_last8;
4303 pos = pos_last8;
4304 }
4305 else if (want_insert & 2)
4306 {
4307 frchp = frchp_last8 = frchp_last16;
4308 fragp = fragp_last8 = fragp_last16;
4309 pos = pos_last8 = pos_last16;
4310 }
4311 else if (want_insert & 4)
4312 {
4313 frchp = frchp_last8 = frchp_last16 = frchp_last32;
4314 fragp = fragp_last8 = fragp_last16 = fragp_last32;
4315 pos = pos_last8 = pos_last16 = pos_last32;
4316 }
4317 else
4318 abort ();
4319
4320 goto look_at_frag;
4321 }
4322
4323 /* Update current position for moving past a code
4324 frag. */
4325 pos += fragp->fr_fix;
4326 pos &= 31;
4327 frchp_next = frchp;
4328 fragp_next = fragp->fr_next;
4329 if (fragp_next == NULL)
4330 {
4331 frchp_next = frchp->frch_next;
4332 if (frchp_next != NULL)
4333 fragp_next = frchp_next->frch_root;
4334 }
4335 if (!(pos & 7))
4336 {
4337 frchp_last8 = frchp_next;
4338 fragp_last8 = fragp_next;
4339 pos_last8 = pos;
4340 }
4341 if (!(pos & 15))
4342 {
4343 frchp_last16 = frchp_next;
4344 fragp_last16 = fragp_next;
4345 pos_last16 = pos;
4346 }
4347 if (!(pos & 31))
4348 {
4349 frchp_last32 = frchp_next;
4350 fragp_last32 = fragp_next;
4351 pos_last32 = pos;
4352 }
4353 }
4354 }
4355
4356 /* Now convert the machine-dependent frags to machine-independent
4357 ones. */
4358 for (frchp = info->frchainP; frchp; frchp = frchp->frch_next)
4359 for (fragp = frchp->frch_root; fragp; fragp = fragp->fr_next)
4360 {
4361 if (fragp->fr_type == rs_machine_dependent)
4362 {
4363 if (fragp->tc_frag_data.is_insns)
4364 frag_wane (fragp);
4365 else
4366 {
4367 fragp->fr_type = rs_align_code;
4368 fragp->fr_var = 1;
4369 *fragp->fr_literal = 0;
4370 }
4371 }
4372 }
4373}
4374
4375/* Initialize the machine-dependent parts of a frag. */
4376
4377void
4378tic6x_frag_init (fragS *fragp)
4379{
4380 fragp->tc_frag_data.is_insns = FALSE;
4381 fragp->tc_frag_data.can_cross_fp_boundary = FALSE;
4382}
4383
59e6276b
JM		 4384/* Set an attribute if it has not already been set by the user. */
4385
4386static void
4387tic6x_set_attribute_int (int tag, int value)
4388{
4389 if (tag < 1
4390 || tag >= NUM_KNOWN_OBJ_ATTRIBUTES)
4391 abort ();
4392 if (!tic6x_attributes_set_explicitly[tag])
4393 bfd_elf_add_proc_attr_int (stdoutput, tag, value);
4394}
4395
4396/* Set object attributes deduced from the input file and command line
4397 rather than given explicitly. */
4398static void
4399tic6x_set_attributes (void)
4400{
75fa6dc1
JM		 4401 if (tic6x_arch_attribute == C6XABI_Tag_ISA_none)
4402 tic6x_arch_attribute = C6XABI_Tag_ISA_C674X;
59e6276b 4403
75fa6dc1 4404 tic6x_set_attribute_int (Tag_ISA, tic6x_arch_attribute);
b5593623 4405 tic6x_set_attribute_int (Tag_ABI_DSBT, tic6x_dsbt);
87779176
JM		 4406 tic6x_set_attribute_int (Tag_ABI_PID, tic6x_pid);
4407 tic6x_set_attribute_int (Tag_ABI_PIC, tic6x_pic);
59e6276b
JM		 4408}
4409
d99e5b39
JM		 4410/* Do machine-dependent manipulations of the frag chains after all
4411 input has been read and before the machine-independent sizing and
4412 relaxing. */
4413
4414void
4415tic6x_end (void)
4416{
59e6276b
JM		 4417 /* Set object attributes at this point if not explicitly set. */
4418 tic6x_set_attributes ();
4419
d99e5b39
JM		 4420 /* Meeting alignment requirements may require inserting NOPs in
4421 parallel in execute packets earlier in the segment. Future
4422 16-bit instruction generation involves whole-segment optimization
4423 to determine the best choice and ordering of 32-bit or 16-bit
4424 instructions. This doesn't fit will in the general relaxation
4425 framework, so handle alignment and 16-bit instruction generation
4426 here. */
4427 bfd_map_over_sections (stdoutput, tic6x_adjust_section, NULL);
4428}
4429
4430/* No machine-dependent frags at this stage; all converted in
4431 tic6x_end. */
40b36596
JM		 4432
4433void
4434md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, segT asec ATTRIBUTE_UNUSED,
4435 fragS *fragp ATTRIBUTE_UNUSED)
4436{
4437 abort ();
4438}
4439
d99e5b39
JM		 4440/* No machine-dependent frags at this stage; all converted in
4441 tic6x_end. */
40b36596
JM		 4442
4443int
4444md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
4445 segT seg ATTRIBUTE_UNUSED)
4446{
4447 abort ();
4448}
4449
4450/* Put a number into target byte order. */
4451
4452void
4453md_number_to_chars (char *buf, valueT val, int n)
4454{
4455 if (target_big_endian)
4456 number_to_chars_bigendian (buf, val, n);
4457 else
4458 number_to_chars_littleendian (buf, val, n);
4459}
4460
4461/* Machine-dependent operand parsing not currently needed. */
4462
4463void
4464md_operand (expressionS *op ATTRIBUTE_UNUSED)
4465{
4466}
4467
4468/* PC-relative operands are relative to the start of the fetch
4469 packet. */
4470
4471long
41820509 4472tic6x_pcrel_from_section (fixS *fixp, segT sec)
40b36596 4473{
41820509
JM		 4474 if (fixp->fx_addsy != NULL
4475 && (!S_IS_DEFINED (fixp->fx_addsy)
4476 || S_GET_SEGMENT (fixp->fx_addsy) != sec))
4477 return 0;
40b36596
JM		 4478 return (fixp->fx_where + fixp->fx_frag->fr_address) & ~(long) 0x1f;
4479}
4480
4481/* Round up a section size to the appropriate boundary. */
4482
4483valueT
4484md_section_align (segT segment ATTRIBUTE_UNUSED,
4485 valueT size)
4486{
4487 /* Round up section sizes to ensure that text sections consist of
4488 whole fetch packets. */
4489 int align = bfd_get_section_alignment (stdoutput, segment);
4490 return ((size + (1 << align) - 1) & ((valueT) -1 << align));
4491}
4492
4493/* No special undefined symbol handling needed for now. */
4494
4495symbolS *
4496md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
4497{
4498 return NULL;
4499}
4500
4501/* Translate internal representation of relocation info to BFD target
4502 format. */
4503
4504arelent *
4505tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp)
4506{
4507 arelent *reloc;
ac145307 4508 asymbol *symbol;
40b36596
JM		 4509 bfd_reloc_code_real_type r_type;
4510
4511 reloc = xmalloc (sizeof (arelent));
4512 reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
ac145307
BS		 4513 symbol = symbol_get_bfdsym (fixp->fx_addsy);
4514 *reloc->sym_ptr_ptr = symbol;
40b36596 4515 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
41820509 4516 reloc->addend = (tic6x_generate_rela ? fixp->fx_offset : 0);
40b36596
JM		 4517 r_type = fixp->fx_r_type;
4518 reloc->howto = bfd_reloc_type_lookup (stdoutput, r_type);
4519
4520 if (reloc->howto == NULL)
4521 {
4522 as_bad_where (fixp->fx_file, fixp->fx_line,
4523 _("Cannot represent relocation type %s"),
4524 bfd_get_reloc_code_name (r_type));
4525 return NULL;
4526 }
4527
41820509
JM		 4528 /* Correct for adjustments bfd_install_relocation will make. */
4529 if (reloc->howto->pcrel_offset && reloc->howto->partial_inplace)
ac145307
BS		 4530 {
4531 reloc->addend += reloc->address;
4532 if (!bfd_is_com_section (symbol))
4533 reloc->addend -= symbol->value;
4534 }
4a732032
BS		 4535 if (r_type == BFD_RELOC_C6000_PCR_H16
4536 || r_type == BFD_RELOC_C6000_PCR_L16)
4537 {
4538 symbolS *t = fixp->tc_fix_data.fix_subsy;
4539 segT sub_symbol_segment;
4540
4541 resolve_symbol_value (t);
4542 sub_symbol_segment = S_GET_SEGMENT (t);
4543 if (sub_symbol_segment == undefined_section)
4544 as_bad_where (fixp->fx_file, fixp->fx_line,
4545 _("undefined symbol %s in PCR relocation"),
4546 S_GET_NAME (t));
4547 else
4548 {
4549 reloc->addend = reloc->address & ~0x1F;
4550 reloc->addend -= S_GET_VALUE (t);
4551 }
4552 }
40b36596
JM		 4553 return reloc;
4554}
1bce6bd8
PB		 4555
4556/* Convert REGNAME to a DWARF-2 register number. */
4557
4558int
4559tic6x_regname_to_dw2regnum (char *regname)
4560{
4561 bfd_boolean reg_ok;
4562 tic6x_register reg;
4563 char *rq = regname;
4564
4565 reg_ok = tic6x_parse_register (&rq, &reg);
4566
4567 if (!reg_ok)
4568 return -1;
4569
4570 switch (reg.side)
4571 {
4572 case 1: /* A regs. */
4573 if (reg.num < 16)
4574 return reg.num;
4575 else if (reg.num < 32)
4576 return (reg.num - 16) + 37;
4577 else
4578 return -1;
4579
4580 case 2: /* B regs. */
4581 if (reg.num < 16)
4582 return reg.num + 16;
4583 else if (reg.num < 32)
4584 return (reg.num - 16) + 53;
4585 else
4586 return -1;
4587
4588 default:
4589 return -1;
4590 }
4591}
4592
4593/* Initialize the DWARF-2 unwind information for this procedure. */
4594
4595void
4596tic6x_frame_initial_instructions (void)
4597{
4598 /* CFA is initial stack pointer (B15). */
4599 cfi_add_CFA_def_cfa (31, 0);
4600}
4601
4602/* Start an exception table entry. If idx is nonzero this is an index table
4603 entry. */
4604
4605static void
4606tic6x_start_unwind_section (const segT text_seg, int idx)
4607{
4608 tic6x_unwind_info *unwind = tic6x_get_unwind ();
4609 const char * text_name;
4610 const char * prefix;
4611 const char * prefix_once;
4612 const char * group_name;
4613 size_t prefix_len;
4614 size_t text_len;
4615 char * sec_name;
4616 size_t sec_name_len;
4617 int type;
4618 int flags;
4619 int linkonce;
4620
4621 if (idx)
4622 {
4623 prefix = ELF_STRING_C6000_unwind;
4624 prefix_once = ELF_STRING_C6000_unwind_once;
4625 type = SHT_C6000_UNWIND;
4626 }
4627 else
4628 {
4629 prefix = ELF_STRING_C6000_unwind_info;
4630 prefix_once = ELF_STRING_C6000_unwind_info_once;
4631 type = SHT_PROGBITS;
4632 }
4633
4634 text_name = segment_name (text_seg);
4635 if (streq (text_name, ".text"))
4636 text_name = "";
4637
4638 if (strncmp (text_name, ".gnu.linkonce.t.",
4639 strlen (".gnu.linkonce.t.")) == 0)
4640 {
4641 prefix = prefix_once;
4642 text_name += strlen (".gnu.linkonce.t.");
4643 }
4644
4645 prefix_len = strlen (prefix);
4646 text_len = strlen (text_name);
4647 sec_name_len = prefix_len + text_len;
4648 sec_name = (char *) xmalloc (sec_name_len + 1);
4649 memcpy (sec_name, prefix, prefix_len);
4650 memcpy (sec_name + prefix_len, text_name, text_len);
4651 sec_name[prefix_len + text_len] = '\0';
4652
4653 flags = SHF_ALLOC;
4654 linkonce = 0;
4655 group_name = 0;
4656
4657 /* Handle COMDAT group. */
4658 if (prefix != prefix_once && (text_seg->flags & SEC_LINK_ONCE) != 0)
4659 {
4660 group_name = elf_group_name (text_seg);
4661 if (group_name == NULL)
4662 {
4663 as_bad (_("group section `%s' has no group signature"),
4664 segment_name (text_seg));
4665 ignore_rest_of_line ();
4666 return;
4667 }
4668 flags |= SHF_GROUP;
4669 linkonce = 1;
4670 }
4671
4672 obj_elf_change_section (sec_name, type, flags, 0, group_name, linkonce, 0);
4673
4674 /* Set the section link for index tables. */
4675 if (idx)
4676 elf_linked_to_section (now_seg) = text_seg;
4677
4678 seg_info (now_seg)->tc_segment_info_data.text_unwind = unwind;
4679}
4680
4681
4682static const int
4683tic6x_unwind_frame_regs[TIC6X_NUM_UNWIND_REGS] =
4684/* A15 B15 B14 B13 B12 B11 B10 B3 A14 A13 A12 A11 A10. */
4685 { 15, 31, 30, 29, 28, 27, 26, 19, 14, 13, 12, 11, 10 };
4686
4687/* Register save offsets for __c6xabi_push_rts. */
4688static const int
4689tic6x_pop_rts_offset_little[TIC6X_NUM_UNWIND_REGS] =
4690/* A15 B15 B14 B13 B12 B11 B10 B3 A14 A13 A12 A11 A10. */
4691 { -1, 1, 0, -3, -4, -7, -8,-11, -2, -5, -6, -9,-10};
4692
4693static const int
4694tic6x_pop_rts_offset_big[TIC6X_NUM_UNWIND_REGS] =
4695/* A15 B15 B14 B13 B12 B11 B10 B3 A14 A13 A12 A11 A10. */
4696 { -2, 1, 0, -4, -3, -8, -7,-12, -1, -6, -5,-10, -9};
4697
4698/* Map from dwarf register number to unwind frame register number. */
4699static int
4700tic6x_unwind_reg_from_dwarf (int dwarf)
4701{
4702 int reg;
4703
4704 for (reg = 0; reg < TIC6X_NUM_UNWIND_REGS; reg++)
4705 {
4706 if (tic6x_unwind_frame_regs[reg] == dwarf)
4707 return reg;
4708 }
4709
4710 return -1;
4711}
4712
4713/* Unwinding bytecode definitions. */
4714#define UNWIND_OP_ADD_SP 0x00
4715#define UNWIND_OP_ADD_SP2 0xd2
4716#define UNWIND_OP2_POP 0x8000
4717#define UNWIND_OP2_POP_COMPACT 0xa000
4718#define UNWIND_OP_POP_REG 0xc0
4719#define UNWIND_OP_MV_FP 0xd0
4720#define UNWIND_OP_POP_RTS 0xd1
4721#define UNWIND_OP_RET 0xe0
4722
4723/* Maximum stack adjustment for __c6xabi_unwind_cpp_pr3/4 */
4724#define MAX_COMPACT_SP_OFFSET (0x7f << 3)
4725
4726static void
4727tic6x_flush_unwind_word (valueT data)
4728{
4729 tic6x_unwind_info *unwind = tic6x_get_unwind ();
4730 char *ptr;
4731
4732 /* Create EXTAB entry if it does not exist. */
4733 if (unwind->table_entry == NULL)
4734 {
4735 tic6x_start_unwind_section (unwind->saved_seg, 0);
4736 frag_align (2, 0, 0);
4737 record_alignment (now_seg, 2);
4738 unwind->table_entry = expr_build_dot ();
4739 ptr = frag_more (4);
4740 unwind->frag_start = ptr;
4741 }
4742 else
4743 {
4744 /* Append additional word of data. */
4745 ptr = frag_more (4);
4746 }
4747
4748 md_number_to_chars (ptr, data, 4);
4749}
4750
4751/* Add a single byte of unwinding data. */
4752
4753static void
4754tic6x_unwind_byte (int byte)
4755{
4756 tic6x_unwind_info *unwind = tic6x_get_unwind ();
4757
4758 unwind->data_bytes++;
4759 /* Only flush the first word after we know multiple words are required. */
4760 if (unwind->data_bytes == 5)
4761 {
4762 if (unwind->personality_index == -1)
4763 {
4764 /* At this point we know we are too big for pr0. */
4765 unwind->personality_index = 1;
4766 tic6x_flush_unwind_word (0x81000000 | ((unwind->data >> 8) & 0xffff));
4767 unwind->data = ((unwind->data & 0xff) << 8) | byte;
4768 unwind->data_bytes++;
4769 }
4770 else
4771 {
4772 tic6x_flush_unwind_word (unwind->data);
4773 unwind->data = byte;
4774 }
4775 }
4776 else
4777 {
4778 unwind->data = (unwind->data << 8) | byte;
4779 if ((unwind->data_bytes & 3) == 0 && unwind->data_bytes > 4)
4780 {
4781 tic6x_flush_unwind_word (unwind->data);
4782 unwind->data = 0;
4783 }
4784 }
4785}
4786
4787/* Add a two-byte unwinding opcode. */
4788static void
4789tic6x_unwind_2byte (int bytes)
4790{
4791 tic6x_unwind_byte (bytes >> 8);
4792 tic6x_unwind_byte (bytes & 0xff);
4793}
4794
4795static void
4796tic6x_unwind_uleb (offsetT offset)
4797{
4798 while (offset > 0x7f)
4799 {
4800 tic6x_unwind_byte ((offset & 0x7f) | 0x80);
4801 offset >>= 7;
4802 }
4803 tic6x_unwind_byte (offset);
4804}
4805
4806void
4807tic6x_cfi_startproc (void)
4808{
4809 tic6x_unwind_info *unwind = tic6x_get_unwind ();
4810
4811 unwind->personality_index = -1;
4812 unwind->personality_routine = NULL;
4813 if (unwind->table_entry)
4814 as_bad (_("missing .endp before .cfi_startproc"));
4815
4816 unwind->table_entry = NULL;
4817 unwind->data_bytes = -1;
4818}
4819
4820static void
4821tic6x_output_exidx_entry (void)
4822{
4823 char *ptr;
4824 long where;
4825 unsigned int marked_pr_dependency;
4826 segT old_seg;
4827 subsegT old_subseg;
4828 tic6x_unwind_info *unwind = tic6x_get_unwind ();
4829
4830 old_seg = now_seg;
4831 old_subseg = now_subseg;
4832
4833 /* Add index table entry. This is two words. */
4834 tic6x_start_unwind_section (unwind->saved_seg, 1);
4835 frag_align (2, 0, 0);
4836 record_alignment (now_seg, 2);
4837
4838 ptr = frag_more (8);
4839 where = frag_now_fix () - 8;
4840
4841 /* Self relative offset of the function start. */
4842 fix_new (frag_now, where, 4, unwind->function_start, 0, 1,
4843 BFD_RELOC_C6000_PREL31);
4844
4845 /* Indicate dependency on ABI-defined personality routines to the
4846 linker, if it hasn't been done already. */
4847 marked_pr_dependency
4848 = seg_info (now_seg)->tc_segment_info_data.marked_pr_dependency;
4849 if (unwind->personality_index >= 0 && unwind->personality_index < 5
4850 && !(marked_pr_dependency & (1 << unwind->personality_index)))
4851 {
4852 static const char *const name[] =
4853 {
4854 "__c6xabi_unwind_cpp_pr0",
4855 "__c6xabi_unwind_cpp_pr1",
4856 "__c6xabi_unwind_cpp_pr2",
4857 "__c6xabi_unwind_cpp_pr3",
4858 "__c6xabi_unwind_cpp_pr4"
4859 };
4860 symbolS *pr = symbol_find_or_make (name[unwind->personality_index]);
4861 fix_new (frag_now, where, 0, pr, 0, 1, BFD_RELOC_NONE);
4862 seg_info (now_seg)->tc_segment_info_data.marked_pr_dependency
4863 |= 1 << unwind->personality_index;
4864 }
4865
4866 if (unwind->table_entry)
4867 {
4868 /* Self relative offset of the table entry. */
4869 fix_new (frag_now, where + 4, 4, unwind->table_entry, 0, 1,
4870 BFD_RELOC_C6000_PREL31);
4871 }
4872 else
4873 {
4874 /* Inline exception table entry. */
4875 md_number_to_chars (ptr + 4, unwind->data, 4);
4876 }
4877
4878 /* Restore the original section. */
4879 subseg_set (old_seg, old_subseg);
4880}
4881
4882static void
4883tic6x_output_unwinding (bfd_boolean need_extab)
4884{
4885 tic6x_unwind_info *unwind = tic6x_get_unwind ();
4886 unsigned safe_mask = unwind->safe_mask;
4887 unsigned compact_mask = unwind->compact_mask;
4888 unsigned reg_saved_mask = unwind->reg_saved_mask;
4889 offsetT cfa_offset = unwind->cfa_offset;
4890 long where;
4891 int reg;
4892
4893 if (unwind->personality_index == -2)
4894 {
4895 /* Function can not be unwound. */
4896 unwind->data = 1;
4897 tic6x_output_exidx_entry ();
4898 return;
4899 }
4900
4901 if (unwind->personality_index == -1 && unwind->personality_routine == NULL)
4902 {
4903 /* Auto-select a personality routine if none specified. */
4904 if (reg_saved_mask || cfa_offset >= MAX_COMPACT_SP_OFFSET)
4905 unwind->personality_index = -1;
4906 else if (safe_mask)
4907 unwind->personality_index = 3;
4908 else
4909 unwind->personality_index = 4;
4910 }
4911
4912 /* Calculate unwinding opcodes, and emit to EXTAB if necessary. */
4913 unwind->table_entry = NULL;
4914 if (unwind->personality_index == 3 || unwind->personality_index == 4)
4915 {
4916 if (cfa_offset >= MAX_COMPACT_SP_OFFSET)
4917 {
4918 as_bad (_("stack pointer offset too large for personality routine"));
4919 return;
4920 }
4921 if (reg_saved_mask
4922 || (unwind->personality_index == 3 && compact_mask != 0)
4923 || (unwind->personality_index == 4 && safe_mask != 0))
4924 {
4925 as_bad (_("stack frame layout does not match personality routine"));
4926 return;
4927 }
4928
4929 unwind->data = (1u << 31) | (unwind->personality_index << 24);
4930 if (unwind->cfa_reg == 15)
4931 unwind->data |= 0x7f << 17;
4932 else
4933 unwind->data |= cfa_offset << (17 - 3);
4934
4935 if (unwind->personality_index == 3)
4936 unwind->data |= safe_mask << 4;
4937 else
4938 unwind->data |= compact_mask << 4;
4939 unwind->data |= unwind->return_reg;
4940 unwind->data_bytes = 4;
4941 }
4942 else
4943 {
4944 if (unwind->personality_routine)
4945 {
4946 unwind->data = 0;
4947 unwind->data_bytes = 5;
4948 tic6x_flush_unwind_word (0);
4949 /* First word is personality routine. */
4950 where = frag_now_fix () - 4;
4951 fix_new (frag_now, where, 4, unwind->personality_routine, 0, 1,
4952 BFD_RELOC_C6000_PREL31);
4953 }
4954 else if (unwind->personality_index > 0)
4955 {
4956 unwind->data = 0x8000 | (unwind->personality_index << 8);
4957 unwind->data_bytes = 2;
4958 }
4959 else /* pr0 or undecided */
4960 {
4961 unwind->data = 0x80;
4962 unwind->data_bytes = 1;
4963 }
4964
4965 if (unwind->return_reg != UNWIND_B3)
4966 {
4967 tic6x_unwind_byte (UNWIND_OP_RET | unwind->return_reg);
4968 }
4969
4970 if (unwind->cfa_reg == 15)
4971 {
4972 tic6x_unwind_byte (UNWIND_OP_MV_FP);
4973 }
4974 else if (cfa_offset != 0)
4975 {
4976 cfa_offset >>= 3;
4977 if (cfa_offset > 0x80)
4978 {
4979 tic6x_unwind_byte (UNWIND_OP_ADD_SP2);
4980 tic6x_unwind_uleb (cfa_offset - 0x81);
4981 }
4982 else if (cfa_offset > 0x40)
4983 {
4984 tic6x_unwind_byte (UNWIND_OP_ADD_SP | 0x3f);
4985 tic6x_unwind_byte (UNWIND_OP_ADD_SP | (cfa_offset - 0x40));
4986 }
4987 else
4988 {
4989 tic6x_unwind_byte (UNWIND_OP_ADD_SP | (cfa_offset - 1));
4990 }
4991 }
4992
4993 if (safe_mask)
4994 tic6x_unwind_2byte (UNWIND_OP2_POP | unwind->safe_mask);
4995 else if (unwind->pop_rts)
4996 tic6x_unwind_byte (UNWIND_OP_POP_RTS);
4997 else if (compact_mask)
4998 tic6x_unwind_2byte (UNWIND_OP2_POP_COMPACT | unwind->compact_mask);
4999 else if (reg_saved_mask)
5000 {
5001 offsetT cur_offset;
5002 int val;
5003 int last_val;
5004
5005 tic6x_unwind_byte (UNWIND_OP_POP_REG | unwind->saved_reg_count);
5006 last_val = 0;
5007 for (cur_offset = 0; unwind->saved_reg_count > 0; cur_offset -= 4)
5008 {
5009 val = 0xf;
5010 for (reg = 0; reg < TIC6X_NUM_UNWIND_REGS; reg++)
5011 {
5012 if (!unwind->reg_saved[reg])
5013 continue;
5014
5015 if (unwind->reg_offset[reg] == cur_offset)
5016 {
5017 unwind->saved_reg_count--;
5018 val = reg;
5019 break;
5020 }
5021 }
5022 if ((cur_offset & 4) == 4)
5023 tic6x_unwind_byte ((last_val << 4) | val);
5024 else
5025 last_val = val;
5026 }
5027 if ((cur_offset & 4) == 4)
5028 tic6x_unwind_byte ((last_val << 4) | 0xf);
5029 }
5030
5031 /* Pad with RETURN opcodes. */
5032 while ((unwind->data_bytes & 3) != 0)
5033 tic6x_unwind_byte (UNWIND_OP_RET | UNWIND_B3);
5034
5035 if (unwind->personality_index == -1 && unwind->personality_routine == NULL)
5036 unwind->personality_index = 0;
5037 }
5038
5039 /* Force creation of an EXTAB entry if an LSDA is required. */
5040 if (need_extab && !unwind->table_entry)
5041 {
5042 if (unwind->data_bytes != 4)
5043 abort ();
5044
5045 tic6x_flush_unwind_word (unwind->data);
5046 }
5047 else if (unwind->table_entry && !need_extab)
5048 {
5049 /* Add an empty descriptor if there is no user-specified data. */
5050 char *ptr = frag_more (4);
5051 md_number_to_chars (ptr, 0, 4);
5052 }
5053
5054 /* Fill in length of unwinding bytecode. */
5055 if (unwind->table_entry)
5056 {
5057 valueT tmp;
5058 if (unwind->data_bytes > 0x400)
5059 as_bad (_("too many unwinding instructions"));
5060
5061 if (unwind->personality_index == -1)
5062 {
5063 tmp = md_chars_to_number (unwind->frag_start + 4, 4);
5064 tmp |= ((unwind->data_bytes - 8) >> 2) << 24;
5065 md_number_to_chars (unwind->frag_start + 4, tmp, 4);
5066 }
5067 else if (unwind->personality_index == 1 || unwind->personality_index == 2)
5068 {
5069 tmp = md_chars_to_number (unwind->frag_start, 4);
5070 tmp |= ((unwind->data_bytes - 4) >> 2) << 16;
5071 md_number_to_chars (unwind->frag_start, tmp, 4);
5072 }
5073 }
5074 tic6x_output_exidx_entry ();
5075}
5076
5077/* FIXME: This will get horribly confused if cfi directives are emitted for
5078 function epilogue. */
5079void
5080tic6x_cfi_endproc (struct fde_entry *fde)
5081{
5082 tic6x_unwind_info *unwind = tic6x_get_unwind ();
5083 struct cfi_insn_data *insn;
5084 int reg;
5085 unsigned safe_mask = 0;
5086 unsigned compact_mask = 0;
5087 unsigned reg_saved_mask = 0;
5088 offsetT cfa_offset = 0;
5089 offsetT save_offset = 0;
5090
5091 unwind->cfa_reg = 31;
5092 unwind->return_reg = UNWIND_B3;
5093 unwind->saved_reg_count = 0;
5094 unwind->pop_rts = FALSE;
5095
5096 unwind->saved_seg = now_seg;
5097 unwind->saved_subseg = now_subseg;
5098
5099 for (reg = 0; reg < TIC6X_NUM_UNWIND_REGS; reg++)
5100 unwind->reg_saved[reg] = FALSE;
5101
5102 /* Scan FDE instructions to build up stack frame layout. */
5103 for (insn = fde->data; insn; insn = insn->next)
5104 {
5105 switch (insn->insn)
5106 {
5107 case DW_CFA_advance_loc:
5108 break;
5109
5110 case DW_CFA_def_cfa:
5111 unwind->cfa_reg = insn->u.ri.reg;
5112 cfa_offset = insn->u.ri.offset;
5113 break;
5114
5115 case DW_CFA_def_cfa_register:
5116 unwind->cfa_reg = insn->u.r;
5117 break;
5118
5119 case DW_CFA_def_cfa_offset:
5120 cfa_offset = insn->u.i;
5121 break;
5122
5123 case DW_CFA_undefined:
5124 case DW_CFA_same_value:
5125 reg = tic6x_unwind_reg_from_dwarf (insn->u.r);
5126 if (reg >= 0)
5127 unwind->reg_saved[reg] = FALSE;
5128 break;
5129
5130 case DW_CFA_offset:
5131 reg = tic6x_unwind_reg_from_dwarf (insn->u.ri.reg);
5132 if (reg < 0)
5133 {
5134 as_bad (_("unable to generate unwinding opcode for reg %d"),
5135 insn->u.ri.reg);
5136 return;
5137 }
5138 unwind->reg_saved[reg] = TRUE;
5139 unwind->reg_offset[reg] = insn->u.ri.offset;
5140 if (insn->u.ri.reg == UNWIND_B3)
5141 unwind->return_reg = UNWIND_B3;
5142 break;
5143
5144 case DW_CFA_register:
5145 if (insn->u.rr.reg1 != 19)
5146 {
5147 as_bad (_("unable to generate unwinding opcode for reg %d"),
5148 insn->u.rr.reg1);
5149 return;
5150 }
5151
5152 reg = tic6x_unwind_reg_from_dwarf (insn->u.rr.reg2);
5153 if (reg < 0)
5154 {
5155 as_bad (_("unable to generate unwinding opcode for reg %d"),
5156 insn->u.rr.reg2);
5157 return;
5158 }
5159
5160 unwind->return_reg = reg;
5161 unwind->reg_saved[UNWIND_B3] = FALSE;
5162 if (unwind->reg_saved[reg])
5163 {
5164 as_bad (_("unable to restore return address from "
5165 "previously restored reg"));
5166 return;
5167 }
5168 break;
5169
5170 case DW_CFA_restore:
5171 case DW_CFA_remember_state:
5172 case DW_CFA_restore_state:
5173 case DW_CFA_GNU_window_save:
5174 case CFI_escape:
5175 case CFI_val_encoded_addr:
5176 as_bad (_("unhandled CFA insn for unwinding (%d)"), insn->insn);
5177 break;
5178
5179 default:
5180 abort ();
5181 }
5182 }
5183
5184 if (unwind->cfa_reg != 15 && unwind->cfa_reg != 31)
5185 {
5186 as_bad (_("unable to generate unwinding opcode for frame pointer reg %d"),
5187 unwind->cfa_reg);
5188 return;
5189 }
5190
5191 if (unwind->cfa_reg == 15)
5192 {
5193 if (cfa_offset != 0)
5194 {
5195 as_bad (_("unable to generate unwinding opcode for "
5196 "frame pointer offset"));
5197 return;
5198 }
5199 }
5200 else
5201 {
5202 if ((cfa_offset & 7) != 0)
5203 {
5204 as_bad (_("unwound stack pointer not doubleword aligned"));
5205 return;
5206 }
5207 }
5208
5209 for (reg = 0; reg < TIC6X_NUM_UNWIND_REGS; reg++)
5210 {
5211 if (unwind->reg_saved[reg])
5212 reg_saved_mask |= 1 << (TIC6X_NUM_UNWIND_REGS - (reg + 1));
5213 }
5214
5215 /* Check for standard "safe debug" frame layout */
5216 if (reg_saved_mask)
5217 {
5218 save_offset = 0;
5219 for (reg = 0; reg < TIC6X_NUM_UNWIND_REGS; reg++)
5220 {
5221 if (!unwind->reg_saved[reg])
5222 continue;
5223
5224 if (target_big_endian
5225 && reg < TIC6X_NUM_UNWIND_REGS - 1
5226 && unwind->reg_saved[reg + 1]
5227 && tic6x_unwind_frame_regs[reg]
5228 == tic6x_unwind_frame_regs[reg + 1] + 1
5229 && (tic6x_unwind_frame_regs[reg] & 1) == 1
5230 && (save_offset & 4) == 4)
5231 {
5232 /* Swapped pair */
5233 if (save_offset != unwind->reg_offset[reg + 1]
5234 || save_offset - 4 != unwind->reg_offset[reg])
5235 break;
5236 save_offset -= 8;
5237 reg++;
5238 }
5239 else
5240 {
5241 if (save_offset != unwind->reg_offset[reg])
5242 break;
5243 save_offset -= 4;
5244 }
5245 }
5246 if (reg == TIC6X_NUM_UNWIND_REGS)
5247 {
5248 safe_mask = reg_saved_mask;
5249 reg_saved_mask = 0;
5250 }
5251 }
5252
5253 /* Check for compact frame layout. */
5254 if (reg_saved_mask)
5255 {
5256 save_offset = 0;
5257 for (reg = 0; reg < TIC6X_NUM_UNWIND_REGS; reg++)
5258 {
5259 int reg2;
5260
5261 if (!unwind->reg_saved[reg])
5262 continue;
5263
5264 if (reg < TIC6X_NUM_UNWIND_REGS - 1)
5265 {
5266 reg2 = reg + 1;
5267
5268 if (!unwind->reg_saved[reg2]
5269 || tic6x_unwind_frame_regs[reg]
5270 != tic6x_unwind_frame_regs[reg2] + 1
5271 || (tic6x_unwind_frame_regs[reg2] & 1) != 0
5272 || save_offset == 0)
5273 reg2 = -1;
5274 }
5275 else
5276 reg2 = -1;
5277
5278 if (reg2 >= 0)
5279 {
5280 int high_offset;
5281 if (target_big_endian)
5282 high_offset = 4; /* lower address = positive stack offset. */
5283 else
5284 high_offset = 0;
5285
5286 if (save_offset + 4 - high_offset != unwind->reg_offset[reg]
5287 || save_offset + high_offset != unwind->reg_offset[reg2])
5288 {
5289 break;
5290 }
5291 reg++;
5292 }
5293 else
5294 {
5295 if (save_offset != unwind->reg_offset[reg])
5296 break;
5297 }
5298 save_offset -= 8;
5299 }
5300
5301 if (reg == TIC6X_NUM_UNWIND_REGS)
5302 {
5303 compact_mask = reg_saved_mask;
5304 reg_saved_mask = 0;
5305 }
5306 }
5307
5308 /* Check for __c6xabi_pop_rts format */
5309 if (reg_saved_mask == 0x17ff)
5310 {
5311 const int *pop_rts_offset = target_big_endian
5312 ? tic6x_pop_rts_offset_big
5313 : tic6x_pop_rts_offset_little;
5314
5315 save_offset = 0;
5316 for (reg = 0; reg < TIC6X_NUM_UNWIND_REGS; reg++)
5317 {
5318 if (reg == UNWIND_B15)
5319 continue;
5320
5321 if (unwind->reg_offset[reg] != pop_rts_offset[reg] * 4)
5322 break;
5323 }
5324
5325 if (reg == TIC6X_NUM_UNWIND_REGS)
5326 {
5327 unwind->pop_rts = TRUE;
5328 reg_saved_mask = 0;
5329 }
5330 }
5331 /* If all else fails then describe the frame manually. */
5332 if (reg_saved_mask)
5333 {
5334 save_offset = 0;
5335
5336 for (reg = 0; reg < TIC6X_NUM_UNWIND_REGS; reg++)
5337 {
5338 if (!unwind->reg_saved[reg])
5339 continue;
5340
5341 unwind->saved_reg_count++;
5342 /* Encoding uses 4 bits per word, so size of unwinding opcode data
5343 limits the save area size. The exact cap will be figured out
5344 later due to overflow, the 0x800 here is just a quick sanity
5345 check to weed out obviously excessive offsets. */
5346 if (unwind->reg_offset[reg] > 0 || unwind->reg_offset[reg] < -0x800
5347 || (unwind->reg_offset[reg] & 3) != 0)
5348 {
5349 as_bad (_("stack frame layout too complex for unwinder"));
5350 return;
5351 }
5352
5353 if (unwind->reg_offset[reg] < save_offset)
5354 save_offset = unwind->reg_offset[reg] - 4;
5355 }
5356 }
5357
5358 /* Align to 8-byte boundary (stack grows towards negative offsets). */
5359 save_offset &= ~7;
5360
5361 if (unwind->cfa_reg == 31 && !reg_saved_mask)
5362 {
5363 cfa_offset += save_offset;
5364 if (cfa_offset < 0)
5365 {
5366 as_bad (_("unwound frame has negative size"));
5367 return;
5368 }
5369 }
5370
5371 unwind->safe_mask = safe_mask;
5372 unwind->compact_mask = compact_mask;
5373 unwind->reg_saved_mask = reg_saved_mask;
5374 unwind->cfa_offset = cfa_offset;
5375 unwind->function_start = fde->start_address;
5376}
GDB Binutils - Deliverables
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