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40b36596 JM |
1 | /* TI C6X assembler. |
2 | Copyright 2010 | |
3 | Free Software Foundation, Inc. | |
4 | ||
5 | This file is part of GAS, the GNU Assembler. | |
6 | ||
7 | GAS is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 3, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GAS is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GAS; see the file COPYING. If not, write to the Free | |
19 | Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA | |
20 | 02110-1301, USA. */ | |
21 | ||
22 | #include "as.h" | |
23 | #include "dwarf2dbg.h" | |
24 | #include "safe-ctype.h" | |
25 | #include "subsegs.h" | |
26 | #include "opcode/tic6x.h" | |
59e6276b | 27 | #include "elf/tic6x.h" |
41820509 | 28 | #include "elf32-tic6x.h" |
40b36596 JM |
29 | |
30 | /* Truncate and sign-extend at 32 bits, so that building on a 64-bit | |
31 | host gives identical results to a 32-bit host. */ | |
32 | #define TRUNC(X) ((valueT) (X) & 0xffffffffU) | |
33 | #define SEXT(X) ((TRUNC (X) ^ 0x80000000U) - 0x80000000U) | |
34 | ||
35 | const char comment_chars[] = ";"; | |
36 | const char line_comment_chars[] = "#*;"; | |
37 | const char line_separator_chars[] = "@"; | |
38 | ||
39 | const char EXP_CHARS[] = "eE"; | |
40 | const char FLT_CHARS[] = "dDfF"; | |
41 | ||
42 | const char *md_shortopts = ""; | |
43 | ||
44 | enum | |
45 | { | |
46 | OPTION_MARCH = OPTION_MD_BASE, | |
47 | OPTION_MATOMIC, | |
48 | OPTION_MNO_ATOMIC, | |
49 | OPTION_MBIG_ENDIAN, | |
41820509 JM |
50 | OPTION_MLITTLE_ENDIAN, |
51 | OPTION_MGENERATE_REL | |
40b36596 JM |
52 | }; |
53 | ||
54 | struct option md_longopts[] = | |
55 | { | |
56 | { "march", required_argument, NULL, OPTION_MARCH }, | |
57 | { "matomic", no_argument, NULL, OPTION_MATOMIC }, | |
58 | { "mno-atomic", no_argument, NULL, OPTION_MNO_ATOMIC }, | |
59 | { "mbig-endian", no_argument, NULL, OPTION_MBIG_ENDIAN }, | |
60 | { "mlittle-endian", no_argument, NULL, OPTION_MLITTLE_ENDIAN }, | |
41820509 | 61 | { "mgenerate-rel", no_argument, NULL, OPTION_MGENERATE_REL }, |
40b36596 JM |
62 | { NULL, no_argument, NULL, 0 } |
63 | }; | |
64 | size_t md_longopts_size = sizeof (md_longopts); | |
65 | ||
66 | /* Whether to enable atomic instructions. 1 to enable them, 0 to | |
67 | disable, -1 to default from architecture. */ | |
68 | static int tic6x_atomic = -1; | |
69 | ||
70 | /* The instructions enabled based only on the selected architecture | |
71 | (all instructions, if no architecture specified). Atomic | |
72 | instructions may be enabled or disabled separately. */ | |
73 | static unsigned short tic6x_arch_enable = (TIC6X_INSN_C62X | |
74 | | TIC6X_INSN_C64X | |
75 | | TIC6X_INSN_C64XP | |
76 | | TIC6X_INSN_C67X | |
77 | | TIC6X_INSN_C67XP | |
78 | | TIC6X_INSN_C674X | |
79 | | TIC6X_INSN_ATOMIC); | |
80 | ||
81 | /* The instructions enabled based on the current set of features | |
82 | (architecture, as modified by other options). */ | |
83 | static unsigned short tic6x_features; | |
84 | ||
75fa6dc1 | 85 | /* The architecture attribute value, or C6XABI_Tag_ISA_none if |
59e6276b | 86 | not yet set. */ |
75fa6dc1 | 87 | static int tic6x_arch_attribute = C6XABI_Tag_ISA_none; |
59e6276b JM |
88 | |
89 | /* Whether any instructions at all have been seen. Once any | |
90 | instructions have been seen, architecture attributes merge into the | |
91 | previous attribute value rather than replacing it. */ | |
92 | static bfd_boolean tic6x_seen_insns = FALSE; | |
93 | ||
40b36596 JM |
94 | /* The number of registers in each register file supported by the |
95 | current architecture. */ | |
96 | static unsigned int tic6x_num_registers; | |
97 | ||
98 | /* Whether predication on A0 is possible. */ | |
99 | static bfd_boolean tic6x_predicate_a0; | |
100 | ||
101 | /* Whether execute packets can cross fetch packet boundaries. */ | |
102 | static bfd_boolean tic6x_can_cross_fp_boundary; | |
103 | ||
104 | /* Whether there are constraints on simultaneous reads and writes of | |
105 | 40-bit data. */ | |
106 | static bfd_boolean tic6x_long_data_constraints; | |
107 | ||
108 | /* Whether compact instructions are available. */ | |
109 | static bfd_boolean tic6x_compact_insns; | |
110 | ||
41820509 JM |
111 | /* Whether to generate RELA relocations. */ |
112 | static bfd_boolean tic6x_generate_rela = TRUE; | |
113 | ||
40b36596 JM |
114 | /* Table of supported architecture variants. */ |
115 | typedef struct | |
116 | { | |
117 | const char *arch; | |
59e6276b | 118 | int attr; |
40b36596 JM |
119 | unsigned short features; |
120 | } tic6x_arch_table; | |
121 | static const tic6x_arch_table tic6x_arches[] = | |
122 | { | |
75fa6dc1 JM |
123 | { "c62x", C6XABI_Tag_ISA_C62X, TIC6X_INSN_C62X }, |
124 | { "c64x", C6XABI_Tag_ISA_C64X, TIC6X_INSN_C62X | TIC6X_INSN_C64X }, | |
125 | { "c64x+", C6XABI_Tag_ISA_C64XP, (TIC6X_INSN_C62X | |
126 | | TIC6X_INSN_C64X | |
127 | | TIC6X_INSN_C64XP) }, | |
128 | { "c67x", C6XABI_Tag_ISA_C67X, TIC6X_INSN_C62X | TIC6X_INSN_C67X }, | |
129 | { "c67x+", C6XABI_Tag_ISA_C67XP, (TIC6X_INSN_C62X | |
130 | | TIC6X_INSN_C67X | |
131 | | TIC6X_INSN_C67XP) }, | |
132 | { "c674x", C6XABI_Tag_ISA_C674X, (TIC6X_INSN_C62X | |
133 | | TIC6X_INSN_C64X | |
134 | | TIC6X_INSN_C64XP | |
135 | | TIC6X_INSN_C67X | |
136 | | TIC6X_INSN_C67XP | |
137 | | TIC6X_INSN_C674X) } | |
40b36596 JM |
138 | }; |
139 | ||
140 | /* Update the selected architecture based on ARCH, giving an error if | |
141 | ARCH is an invalid value. Does not call tic6x_update_features; the | |
142 | caller must do that if necessary. */ | |
143 | ||
144 | static void | |
145 | tic6x_use_arch (const char *arch) | |
146 | { | |
147 | unsigned int i; | |
148 | ||
149 | for (i = 0; i < ARRAY_SIZE (tic6x_arches); i++) | |
150 | if (strcmp (arch, tic6x_arches[i].arch) == 0) | |
151 | { | |
152 | tic6x_arch_enable = tic6x_arches[i].features; | |
59e6276b JM |
153 | if (tic6x_seen_insns) |
154 | tic6x_arch_attribute | |
155 | = elf32_tic6x_merge_arch_attributes (tic6x_arch_attribute, | |
156 | tic6x_arches[i].attr); | |
157 | else | |
158 | tic6x_arch_attribute = tic6x_arches[i].attr; | |
40b36596 JM |
159 | return; |
160 | } | |
161 | ||
162 | as_bad (_("unknown architecture '%s'"), arch); | |
163 | } | |
164 | ||
165 | /* Parse a target-specific option. */ | |
166 | ||
167 | int | |
168 | md_parse_option (int c, char *arg) | |
169 | { | |
170 | switch (c) | |
171 | { | |
172 | case OPTION_MARCH: | |
173 | tic6x_use_arch (arg); | |
174 | break; | |
175 | ||
176 | case OPTION_MATOMIC: | |
177 | tic6x_atomic = 1; | |
178 | break; | |
179 | ||
180 | case OPTION_MNO_ATOMIC: | |
181 | tic6x_atomic = 0; | |
182 | break; | |
183 | ||
184 | case OPTION_MBIG_ENDIAN: | |
185 | target_big_endian = 1; | |
186 | break; | |
187 | ||
188 | case OPTION_MLITTLE_ENDIAN: | |
189 | target_big_endian = 0; | |
190 | break; | |
191 | ||
41820509 JM |
192 | case OPTION_MGENERATE_REL: |
193 | tic6x_generate_rela = FALSE; | |
194 | break; | |
195 | ||
40b36596 JM |
196 | default: |
197 | return 0; | |
198 | } | |
199 | return 1; | |
200 | } | |
201 | ||
202 | void | |
203 | md_show_usage (FILE *stream ATTRIBUTE_UNUSED) | |
204 | { | |
205 | unsigned int i; | |
206 | ||
207 | fputc ('\n', stream); | |
208 | fprintf (stream, _("TMS320C6000 options:\n")); | |
209 | fprintf (stream, _(" -march=ARCH enable instructions from architecture ARCH\n")); | |
210 | fprintf (stream, _(" -matomic enable atomic operation instructions\n")); | |
211 | fprintf (stream, _(" -mno-atomic disable atomic operation instructions\n")); | |
212 | fprintf (stream, _(" -mbig-endian generate big-endian code\n")); | |
213 | fprintf (stream, _(" -mlittle-endian generate little-endian code\n")); | |
41820509 JM |
214 | /* -mgenerate-rel is only for testsuite use and is deliberately |
215 | undocumented. */ | |
40b36596 JM |
216 | |
217 | fputc ('\n', stream); | |
218 | fprintf (stream, _("Supported ARCH values are:")); | |
219 | for (i = 0; i < ARRAY_SIZE (tic6x_arches); i++) | |
220 | fprintf (stream, " %s", tic6x_arches[i].arch); | |
221 | fputc ('\n', stream); | |
222 | } | |
223 | ||
224 | /* Update enabled features based on the current architecture and | |
225 | related settings. */ | |
226 | static void | |
227 | tic6x_update_features (void) | |
228 | { | |
229 | switch (tic6x_atomic) | |
230 | { | |
231 | case -1: | |
232 | tic6x_features = tic6x_arch_enable; | |
233 | break; | |
234 | ||
235 | case 0: | |
236 | tic6x_features = tic6x_arch_enable & ~TIC6X_INSN_ATOMIC; | |
237 | break; | |
238 | ||
239 | case 1: | |
240 | tic6x_features = tic6x_arch_enable | TIC6X_INSN_ATOMIC; | |
241 | break; | |
242 | ||
243 | default: | |
244 | abort (); | |
245 | } | |
246 | ||
247 | tic6x_num_registers | |
248 | = (tic6x_arch_enable & (TIC6X_INSN_C64X | TIC6X_INSN_C67XP)) ? 32 : 16; | |
249 | ||
250 | tic6x_predicate_a0 = (tic6x_arch_enable & TIC6X_INSN_C64X) ? TRUE : FALSE; | |
251 | ||
252 | tic6x_can_cross_fp_boundary | |
253 | = (tic6x_arch_enable | |
254 | & (TIC6X_INSN_C64X | TIC6X_INSN_C67XP)) ? TRUE : FALSE; | |
255 | ||
256 | tic6x_long_data_constraints | |
257 | = (tic6x_arch_enable & TIC6X_INSN_C64X) ? FALSE : TRUE; | |
258 | ||
259 | tic6x_compact_insns = (tic6x_arch_enable & TIC6X_INSN_C64XP) ? TRUE : FALSE; | |
260 | } | |
261 | ||
262 | /* Do configuration after all options have been parsed. */ | |
263 | ||
264 | void | |
265 | tic6x_after_parse_args (void) | |
266 | { | |
267 | tic6x_update_features (); | |
268 | } | |
269 | ||
270 | /* Parse a .arch directive. */ | |
271 | ||
272 | static void | |
273 | s_tic6x_arch (int ignored ATTRIBUTE_UNUSED) | |
274 | { | |
275 | char c; | |
276 | char *arch; | |
277 | ||
278 | arch = input_line_pointer; | |
279 | while (*input_line_pointer && !ISSPACE (*input_line_pointer)) | |
280 | input_line_pointer++; | |
281 | c = *input_line_pointer; | |
282 | *input_line_pointer = 0; | |
283 | ||
284 | tic6x_use_arch (arch); | |
285 | tic6x_update_features (); | |
286 | *input_line_pointer = c; | |
287 | demand_empty_rest_of_line (); | |
288 | } | |
289 | ||
290 | /* Parse a .atomic directive. */ | |
291 | ||
292 | static void | |
293 | s_tic6x_atomic (int ignored ATTRIBUTE_UNUSED) | |
294 | { | |
295 | tic6x_atomic = 1; | |
296 | tic6x_update_features (); | |
297 | demand_empty_rest_of_line (); | |
298 | } | |
299 | ||
300 | /* Parse a .noatomic directive. */ | |
301 | ||
302 | static void | |
303 | s_tic6x_noatomic (int ignored ATTRIBUTE_UNUSED) | |
304 | { | |
305 | tic6x_atomic = 0; | |
306 | tic6x_update_features (); | |
307 | demand_empty_rest_of_line (); | |
308 | } | |
309 | ||
310 | /* Parse a .nocmp directive. */ | |
311 | ||
312 | static void | |
313 | s_tic6x_nocmp (int ignored ATTRIBUTE_UNUSED) | |
314 | { | |
315 | seg_info (now_seg)->tc_segment_info_data.nocmp = TRUE; | |
316 | demand_empty_rest_of_line (); | |
317 | } | |
318 | ||
59e6276b JM |
319 | /* Track for each attribute whether it has been set explicitly (and so |
320 | should not have a default value set by the assembler). */ | |
321 | static bfd_boolean tic6x_attributes_set_explicitly[NUM_KNOWN_OBJ_ATTRIBUTES]; | |
322 | ||
323 | /* Parse a .c6xabi_attribute directive. */ | |
324 | ||
325 | static void | |
326 | s_tic6x_c6xabi_attribute (int ignored ATTRIBUTE_UNUSED) | |
327 | { | |
328 | int tag = s_vendor_attribute (OBJ_ATTR_PROC); | |
329 | ||
330 | if (tag < NUM_KNOWN_OBJ_ATTRIBUTES) | |
331 | tic6x_attributes_set_explicitly[tag] = TRUE; | |
332 | } | |
333 | ||
334 | typedef struct | |
335 | { | |
336 | const char *name; | |
337 | int tag; | |
338 | } tic6x_attribute_table; | |
339 | ||
340 | static const tic6x_attribute_table tic6x_attributes[] = | |
341 | { | |
342 | #define TAG(tag, value) { #tag, tag } | |
343 | #include "elf/tic6x-attrs.h" | |
344 | #undef TAG | |
345 | }; | |
346 | ||
347 | /* Convert an attribute name to a number. */ | |
348 | ||
349 | int | |
350 | tic6x_convert_symbolic_attribute (const char *name) | |
351 | { | |
352 | unsigned int i; | |
353 | ||
354 | for (i = 0; i < ARRAY_SIZE (tic6x_attributes); i++) | |
355 | if (strcmp (name, tic6x_attributes[i].name) == 0) | |
356 | return tic6x_attributes[i].tag; | |
357 | ||
358 | return -1; | |
359 | } | |
360 | ||
40b36596 JM |
361 | const pseudo_typeS md_pseudo_table[] = |
362 | { | |
363 | { "arch", s_tic6x_arch, 0 }, | |
364 | { "atomic", s_tic6x_atomic, 0 }, | |
59e6276b | 365 | { "c6xabi_attribute", s_tic6x_c6xabi_attribute, 0 }, |
40b36596 JM |
366 | { "noatomic", s_tic6x_noatomic, 0 }, |
367 | { "nocmp", s_tic6x_nocmp, 0 }, | |
368 | { "word", cons, 4 }, | |
369 | { 0, 0, 0 } | |
370 | }; | |
371 | ||
372 | /* Hash table of opcodes. For each opcode name, this stores a pointer | |
373 | to a tic6x_opcode_list listing (in an arbitrary order) all opcode | |
374 | table entries with that name. */ | |
375 | static struct hash_control *opcode_hash; | |
376 | ||
377 | /* Initialize the assembler (called once at assembler startup). */ | |
378 | ||
379 | void | |
380 | md_begin (void) | |
381 | { | |
382 | tic6x_opcode_id id; | |
383 | ||
384 | bfd_set_arch_mach (stdoutput, TARGET_ARCH, 0); | |
385 | ||
386 | /* Insert opcodes into the hash table. */ | |
387 | opcode_hash = hash_new (); | |
388 | for (id = 0; id < tic6x_opcode_max; id++) | |
389 | { | |
390 | const char *errmsg; | |
391 | tic6x_opcode_list *opc = xmalloc (sizeof (tic6x_opcode_list)); | |
392 | ||
393 | opc->id = id; | |
394 | opc->next = hash_find (opcode_hash, tic6x_opcode_table[id].name); | |
395 | if ((errmsg = hash_jam (opcode_hash, tic6x_opcode_table[id].name, opc)) | |
396 | != NULL) | |
397 | as_fatal ("%s", _(errmsg)); | |
398 | } | |
399 | } | |
400 | ||
401 | /* Whether the current line being parsed had the "||" parallel bars. */ | |
402 | static bfd_boolean tic6x_line_parallel; | |
403 | ||
404 | /* Whether the current line being parsed started "||^" to indicate an | |
405 | SPMASKed parallel instruction. */ | |
406 | static bfd_boolean tic6x_line_spmask; | |
407 | ||
408 | /* If the current line being parsed had an instruction predicate, the | |
409 | creg value for that predicate (which must be nonzero); otherwise | |
410 | 0. */ | |
411 | static unsigned int tic6x_line_creg; | |
412 | ||
413 | /* If the current line being parsed had an instruction predicate, the | |
414 | z value for that predicate; otherwise 0. */ | |
415 | static unsigned int tic6x_line_z; | |
416 | ||
417 | /* Return 1 (updating input_line_pointer as appropriate) if the line | |
418 | starting with C (immediately before input_line_pointer) starts with | |
419 | pre-opcode text appropriate for this target, 0 otherwise. */ | |
420 | ||
421 | int | |
422 | tic6x_unrecognized_line (int c) | |
423 | { | |
424 | char *p, *endp; | |
425 | unsigned int z; | |
426 | bfd_boolean areg; | |
427 | bfd_boolean bad_predicate; | |
428 | ||
429 | switch (c) | |
430 | { | |
431 | case '|': | |
432 | if (input_line_pointer[0] == '|') | |
433 | { | |
434 | if (input_line_pointer[1] == '^') | |
435 | { | |
436 | tic6x_line_spmask = TRUE; | |
437 | input_line_pointer += 2; | |
438 | } | |
439 | else | |
440 | input_line_pointer += 1; | |
441 | if (tic6x_line_parallel) | |
442 | as_bad (_("multiple '||' on same line")); | |
443 | tic6x_line_parallel = TRUE; | |
444 | if (tic6x_line_creg) | |
445 | as_bad (_("'||' after predicate")); | |
446 | return 1; | |
447 | } | |
448 | return 0; | |
449 | ||
450 | case '[': | |
451 | /* If it doesn't look like a predicate at all, just return 0. | |
452 | If it looks like one but not a valid one, give a better | |
453 | error. */ | |
454 | p = input_line_pointer; | |
455 | while (*p != ']' && !is_end_of_line[(unsigned char) *p]) | |
456 | p++; | |
457 | if (*p != ']') | |
458 | return 0; | |
459 | endp = p + 1; | |
460 | p = input_line_pointer; | |
461 | z = 0; | |
462 | bad_predicate = FALSE; | |
463 | if (*p == '!') | |
464 | { | |
465 | z = 1; | |
466 | p++; | |
467 | } | |
468 | if (*p == 'A' || *p == 'a') | |
469 | areg = TRUE; | |
470 | else if (*p == 'B' || *p == 'b') | |
471 | areg = FALSE; | |
472 | else | |
473 | { | |
474 | areg = TRUE; /* Avoid uninitialized warning. */ | |
475 | bad_predicate = TRUE; | |
476 | } | |
477 | if (!bad_predicate) | |
478 | { | |
479 | p++; | |
480 | if (*p != '0' && *p != '1' && *p != '2') | |
481 | bad_predicate = TRUE; | |
482 | else if (p[1] != ']') | |
483 | bad_predicate = TRUE; | |
484 | else | |
485 | input_line_pointer = p + 2; | |
486 | } | |
487 | ||
488 | if (tic6x_line_creg) | |
489 | as_bad (_("multiple predicates on same line")); | |
490 | ||
491 | if (bad_predicate) | |
492 | { | |
493 | char ctmp = *endp; | |
494 | *endp = 0; | |
495 | as_bad (_("bad predicate '%s'"), input_line_pointer - 1); | |
496 | *endp = ctmp; | |
497 | input_line_pointer = endp; | |
498 | return 1; | |
499 | } | |
500 | ||
501 | switch (*p) | |
502 | { | |
503 | case '0': | |
504 | tic6x_line_creg = (areg ? 6 : 1); | |
505 | if (areg && !tic6x_predicate_a0) | |
506 | as_bad (_("predication on A0 not supported on this architecture")); | |
507 | break; | |
508 | ||
509 | case '1': | |
510 | tic6x_line_creg = (areg ? 4 : 2); | |
511 | break; | |
512 | ||
513 | case '2': | |
514 | tic6x_line_creg = (areg ? 5 : 3); | |
515 | break; | |
516 | ||
517 | default: | |
518 | abort (); | |
519 | } | |
520 | ||
521 | tic6x_line_z = z; | |
522 | return 1; | |
523 | ||
524 | default: | |
525 | return 0; | |
526 | } | |
527 | } | |
528 | ||
529 | /* Do any target-specific handling of a label required. */ | |
530 | ||
531 | void | |
d99e5b39 | 532 | tic6x_frob_label (symbolS *sym) |
40b36596 | 533 | { |
d99e5b39 JM |
534 | segment_info_type *si; |
535 | tic6x_label_list *list; | |
536 | ||
40b36596 JM |
537 | if (tic6x_line_parallel) |
538 | { | |
539 | as_bad (_("label after '||'")); | |
540 | tic6x_line_parallel = FALSE; | |
541 | tic6x_line_spmask = FALSE; | |
542 | } | |
543 | if (tic6x_line_creg) | |
544 | { | |
545 | as_bad (_("label after predicate")); | |
546 | tic6x_line_creg = 0; | |
547 | tic6x_line_z = 0; | |
548 | } | |
549 | ||
d99e5b39 JM |
550 | si = seg_info (now_seg); |
551 | list = si->tc_segment_info_data.label_list; | |
552 | si->tc_segment_info_data.label_list = xmalloc (sizeof (tic6x_label_list)); | |
553 | si->tc_segment_info_data.label_list->next = list; | |
554 | si->tc_segment_info_data.label_list->label = sym; | |
40b36596 JM |
555 | |
556 | /* Defining tc_frob_label overrides the ELF definition of | |
557 | obj_frob_label, so we need to apply its effects here. */ | |
558 | dwarf2_emit_label (sym); | |
559 | } | |
560 | ||
561 | /* At end-of-line, give errors for start-of-line decorations that | |
562 | needed an instruction but were not followed by one. */ | |
563 | ||
564 | static void | |
565 | tic6x_end_of_line (void) | |
566 | { | |
567 | if (tic6x_line_parallel) | |
568 | { | |
569 | as_bad (_("'||' not followed by instruction")); | |
570 | tic6x_line_parallel = FALSE; | |
571 | tic6x_line_spmask = FALSE; | |
572 | } | |
573 | if (tic6x_line_creg) | |
574 | { | |
575 | as_bad (_("predicate not followed by instruction")); | |
576 | tic6x_line_creg = 0; | |
577 | tic6x_line_z = 0; | |
578 | } | |
579 | } | |
580 | ||
581 | /* Do any target-specific handling of the start of a logical line. */ | |
582 | ||
583 | void | |
584 | tic6x_start_line_hook (void) | |
585 | { | |
586 | tic6x_end_of_line (); | |
587 | } | |
588 | ||
d99e5b39 JM |
589 | /* Do target-specific handling immediately after an input file from |
590 | the command line, and any other inputs it includes, have been | |
591 | read. */ | |
40b36596 JM |
592 | |
593 | void | |
594 | tic6x_cleanup (void) | |
595 | { | |
596 | tic6x_end_of_line (); | |
597 | } | |
598 | ||
41820509 JM |
599 | /* Do target-specific initialization after arguments have been |
600 | processed and the output file created. */ | |
601 | ||
602 | void | |
603 | tic6x_init_after_args (void) | |
604 | { | |
605 | elf32_tic6x_set_use_rela_p (stdoutput, tic6x_generate_rela); | |
606 | } | |
607 | ||
d99e5b39 JM |
608 | /* Free LIST of labels (possibly NULL). */ |
609 | ||
610 | static void | |
611 | tic6x_free_label_list (tic6x_label_list *list) | |
612 | { | |
613 | while (list) | |
614 | { | |
615 | tic6x_label_list *old = list; | |
616 | ||
617 | list = list->next; | |
618 | free (old); | |
619 | } | |
620 | } | |
621 | ||
40b36596 JM |
622 | /* Handle a data alignment of N bytes. */ |
623 | ||
624 | void | |
625 | tic6x_cons_align (int n ATTRIBUTE_UNUSED) | |
626 | { | |
627 | segment_info_type *seginfo = seg_info (now_seg); | |
628 | ||
629 | /* Data means there is no current execute packet, and that any label | |
630 | applies to that data rather than a subsequent instruction. */ | |
d99e5b39 JM |
631 | tic6x_free_label_list (seginfo->tc_segment_info_data.label_list); |
632 | seginfo->tc_segment_info_data.label_list = NULL; | |
633 | seginfo->tc_segment_info_data.execute_packet_frag = NULL; | |
40b36596 JM |
634 | seginfo->tc_segment_info_data.last_insn_lsb = NULL; |
635 | seginfo->tc_segment_info_data.spmask_addr = NULL; | |
38bd8d09 | 636 | seginfo->tc_segment_info_data.func_units_used = 0; |
40b36596 JM |
637 | } |
638 | ||
d99e5b39 JM |
639 | /* Handle an alignment directive. Return TRUE if the |
640 | machine-independent frag generation should be skipped. */ | |
641 | ||
642 | bfd_boolean | |
643 | tic6x_do_align (int n, char *fill, int len ATTRIBUTE_UNUSED, int max) | |
644 | { | |
645 | /* Given code alignments of 4, 8, 16 or 32 bytes, we try to handle | |
646 | them in the md_end pass by inserting NOPs in parallel with | |
647 | previous instructions. We only do this in sections containing | |
648 | nothing but instructions. Code alignments of 1 or 2 bytes have | |
649 | no effect in such sections (but we record them with | |
650 | machine-dependent frags anyway so they can be skipped or | |
651 | converted to machine-independent), while those of more than 64 | |
652 | bytes cannot reliably be handled in this way. */ | |
653 | if (n > 0 | |
654 | && max >= 0 | |
655 | && max < (1 << n) | |
656 | && !need_pass_2 | |
657 | && fill == NULL | |
658 | && subseg_text_p (now_seg)) | |
659 | { | |
660 | fragS *align_frag; | |
661 | char *p; | |
662 | ||
663 | if (n > 5) | |
664 | return FALSE; | |
665 | ||
666 | /* Machine-independent code would generate a frag here, but we | |
667 | wish to handle it in a machine-dependent way. */ | |
668 | if (frag_now_fix () != 0) | |
669 | { | |
670 | if (frag_now->fr_type != rs_machine_dependent) | |
671 | frag_wane (frag_now); | |
672 | ||
673 | frag_new (0); | |
674 | } | |
675 | frag_grow (32); | |
676 | align_frag = frag_now; | |
677 | p = frag_var (rs_machine_dependent, 32, 32, max, NULL, n, NULL); | |
678 | /* This must be the same as the frag to which a pointer was just | |
679 | saved. */ | |
680 | if (p != align_frag->fr_literal) | |
681 | abort (); | |
682 | align_frag->tc_frag_data.is_insns = FALSE; | |
683 | return TRUE; | |
684 | } | |
685 | else | |
686 | return FALSE; | |
687 | } | |
688 | ||
40b36596 JM |
689 | /* Types of operand for parsing purposes. These are used as bit-masks |
690 | to tell tic6x_parse_operand what forms of operand are | |
691 | permitted. */ | |
692 | #define TIC6X_OP_EXP 0x0001u | |
693 | #define TIC6X_OP_REG 0x0002u | |
694 | #define TIC6X_OP_REGPAIR 0x0004u | |
695 | #define TIC6X_OP_IRP 0x0008u | |
696 | #define TIC6X_OP_NRP 0x0010u | |
697 | /* With TIC6X_OP_MEM_NOUNREG, the contents of a () offset are always | |
698 | interpreted as an expression, which may be a symbol with the same | |
699 | name as a register that ends up being implicitly DP-relative. With | |
700 | TIC6X_OP_MEM_UNREG, the contents of a () offset are interpreted as | |
701 | a register if they match one, and failing that as an expression, | |
702 | which must be constant. */ | |
703 | #define TIC6X_OP_MEM_NOUNREG 0x0020u | |
704 | #define TIC6X_OP_MEM_UNREG 0x0040u | |
705 | #define TIC6X_OP_CTRL 0x0080u | |
706 | #define TIC6X_OP_FUNC_UNIT 0x0100u | |
707 | ||
708 | /* A register or register pair read by the assembler. */ | |
709 | typedef struct | |
710 | { | |
711 | /* The side the register is on (1 or 2). */ | |
712 | unsigned int side; | |
713 | /* The register number (0 to 31). */ | |
714 | unsigned int num; | |
715 | } tic6x_register; | |
716 | ||
717 | /* Types of modification of a base address. */ | |
718 | typedef enum | |
719 | { | |
720 | tic6x_mem_mod_none, | |
721 | tic6x_mem_mod_plus, | |
722 | tic6x_mem_mod_minus, | |
723 | tic6x_mem_mod_preinc, | |
724 | tic6x_mem_mod_predec, | |
725 | tic6x_mem_mod_postinc, | |
726 | tic6x_mem_mod_postdec | |
727 | } tic6x_mem_mod; | |
728 | ||
729 | /* Scaled [] or unscaled () nature of an offset. */ | |
730 | typedef enum | |
731 | { | |
732 | tic6x_offset_none, | |
733 | tic6x_offset_scaled, | |
734 | tic6x_offset_unscaled | |
735 | } tic6x_mem_scaling; | |
736 | ||
737 | /* A memory operand read by the assembler. */ | |
738 | typedef struct | |
739 | { | |
740 | /* The base register. */ | |
741 | tic6x_register base_reg; | |
742 | /* How the base register is modified. */ | |
743 | tic6x_mem_mod mod; | |
744 | /* Whether there is an offset (required with plain "+" and "-"), and | |
745 | whether it is scaled or unscaled if so. */ | |
746 | tic6x_mem_scaling scaled; | |
747 | /* Whether the offset is a register (TRUE) or an expression | |
748 | (FALSE). */ | |
749 | bfd_boolean offset_is_reg; | |
750 | /* The offset. */ | |
751 | union | |
752 | { | |
753 | expressionS exp; | |
754 | tic6x_register reg; | |
755 | } offset; | |
756 | } tic6x_mem_ref; | |
757 | ||
758 | /* A functional unit in SPMASK operands read by the assembler. */ | |
759 | typedef struct | |
760 | { | |
761 | /* The basic unit. */ | |
762 | tic6x_func_unit_base base; | |
763 | /* The side (1 or 2). */ | |
764 | unsigned int side; | |
765 | } tic6x_func_unit_operand; | |
766 | ||
767 | /* An operand read by the assembler. */ | |
768 | typedef struct | |
769 | { | |
770 | /* The syntactic form of the operand, as one of the bit-masks | |
771 | above. */ | |
772 | unsigned int form; | |
773 | /* The operand value. */ | |
774 | union | |
775 | { | |
776 | /* An expression: TIC6X_OP_EXP. */ | |
777 | expressionS exp; | |
778 | /* A register: TIC6X_OP_REG, TIC6X_OP_REGPAIR. */ | |
779 | tic6x_register reg; | |
780 | /* A memory reference: TIC6X_OP_MEM_NOUNREG, | |
781 | TIC6X_OP_MEM_UNREG. */ | |
782 | tic6x_mem_ref mem; | |
783 | /* A control register: TIC6X_OP_CTRL. */ | |
784 | tic6x_ctrl_id ctrl; | |
785 | /* A functional unit: TIC6X_OP_FUNC_UNIT. */ | |
786 | tic6x_func_unit_operand func_unit; | |
787 | } value; | |
788 | } tic6x_operand; | |
789 | ||
790 | #define skip_whitespace(str) do { if (*(str) == ' ') ++(str); } while (0) | |
791 | ||
792 | /* Parse a register operand, or part of an operand, starting at *P. | |
793 | If syntactically OK (including that the number is in the range 0 to | |
794 | 31, but not necessarily in range for this architecture), return | |
795 | TRUE, putting the register side and number in *REG and update *P to | |
796 | point immediately after the register number; otherwise return FALSE | |
797 | without changing *P (but possibly changing *REG). Do not print any | |
798 | diagnostics. */ | |
799 | ||
800 | static bfd_boolean | |
801 | tic6x_parse_register (char **p, tic6x_register *reg) | |
802 | { | |
803 | char *r = *p; | |
804 | ||
805 | switch (*r) | |
806 | { | |
807 | case 'a': | |
808 | case 'A': | |
809 | reg->side = 1; | |
810 | break; | |
811 | ||
812 | case 'b': | |
813 | case 'B': | |
814 | reg->side = 2; | |
815 | break; | |
816 | ||
817 | default: | |
818 | return FALSE; | |
819 | } | |
820 | r++; | |
821 | ||
822 | if (*r >= '0' && *r <= '9') | |
823 | { | |
824 | reg->num = *r - '0'; | |
825 | r++; | |
826 | } | |
827 | else | |
828 | return FALSE; | |
829 | ||
830 | if (reg->num > 0 && *r >= '0' && *r <= '9') | |
831 | { | |
832 | reg->num = reg->num * 10 + (*r - '0'); | |
833 | r++; | |
834 | } | |
835 | ||
836 | if (*r >= '0' && *r <= '9') | |
837 | return FALSE; | |
838 | ||
839 | if (reg->num >= 32) | |
840 | return FALSE; | |
841 | *p = r; | |
842 | return TRUE; | |
843 | } | |
844 | ||
845 | /* Parse the initial two characters of a functional unit name starting | |
846 | at *P. If OK, set *BASE and *SIDE and return TRUE; otherwise, | |
847 | return FALSE. */ | |
848 | ||
849 | static bfd_boolean | |
850 | tic6x_parse_func_unit_base (char *p, tic6x_func_unit_base *base, | |
851 | unsigned int *side) | |
852 | { | |
853 | bfd_boolean good_func_unit = TRUE; | |
854 | tic6x_func_unit_base maybe_base = tic6x_func_unit_nfu; | |
855 | unsigned int maybe_side = 0; | |
856 | ||
857 | switch (p[0]) | |
858 | { | |
859 | case 'd': | |
860 | case 'D': | |
861 | maybe_base = tic6x_func_unit_d; | |
862 | break; | |
863 | ||
864 | case 'l': | |
865 | case 'L': | |
866 | maybe_base = tic6x_func_unit_l; | |
867 | break; | |
868 | ||
869 | case 'm': | |
870 | case 'M': | |
871 | maybe_base = tic6x_func_unit_m; | |
872 | break; | |
873 | ||
874 | case 's': | |
875 | case 'S': | |
876 | maybe_base = tic6x_func_unit_s; | |
877 | break; | |
878 | ||
879 | default: | |
880 | good_func_unit = FALSE; | |
881 | break; | |
882 | } | |
883 | ||
884 | if (good_func_unit) | |
885 | switch (p[1]) | |
886 | { | |
887 | case '1': | |
888 | maybe_side = 1; | |
889 | break; | |
890 | ||
891 | case '2': | |
892 | maybe_side = 2; | |
893 | break; | |
894 | ||
895 | default: | |
896 | good_func_unit = FALSE; | |
897 | break; | |
898 | } | |
899 | ||
900 | if (good_func_unit) | |
901 | { | |
902 | *base = maybe_base; | |
903 | *side = maybe_side; | |
904 | } | |
905 | ||
906 | return good_func_unit; | |
907 | } | |
908 | ||
909 | /* Parse an operand starting at *P. If the operand parses OK, return | |
910 | TRUE and store the value in *OP; otherwise return FALSE (possibly | |
911 | changing *OP). In any case, update *P to point to the following | |
912 | comma or end of line. The possible operand forms are given by | |
913 | OP_FORMS. For diagnostics, this is operand OPNO of an opcode | |
914 | starting at STR, length OPC_LEN. */ | |
915 | ||
916 | static bfd_boolean | |
917 | tic6x_parse_operand (char **p, tic6x_operand *op, unsigned int op_forms, | |
918 | char *str, int opc_len, unsigned int opno) | |
919 | { | |
920 | bfd_boolean operand_parsed = FALSE; | |
921 | char *q = *p; | |
922 | ||
923 | if ((op_forms & (TIC6X_OP_MEM_NOUNREG | TIC6X_OP_MEM_UNREG)) | |
924 | == (TIC6X_OP_MEM_NOUNREG | TIC6X_OP_MEM_UNREG)) | |
925 | abort (); | |
926 | ||
927 | /* Check for functional unit names for SPMASK and SPMASKR. */ | |
928 | if (!operand_parsed && (op_forms & TIC6X_OP_FUNC_UNIT)) | |
929 | { | |
930 | tic6x_func_unit_base base = tic6x_func_unit_nfu; | |
931 | unsigned int side = 0; | |
932 | ||
933 | if (tic6x_parse_func_unit_base (q, &base, &side)) | |
934 | { | |
935 | char *rq = q + 2; | |
936 | ||
937 | skip_whitespace (rq); | |
938 | if (is_end_of_line[(unsigned char) *rq] || *rq == ',') | |
939 | { | |
940 | op->form = TIC6X_OP_FUNC_UNIT; | |
941 | op->value.func_unit.base = base; | |
942 | op->value.func_unit.side = side; | |
943 | operand_parsed = TRUE; | |
944 | q = rq; | |
945 | } | |
946 | } | |
947 | } | |
948 | ||
949 | /* Check for literal "irp". */ | |
950 | if (!operand_parsed && (op_forms & TIC6X_OP_IRP)) | |
951 | { | |
952 | if ((q[0] == 'i' || q[0] == 'I') | |
953 | && (q[1] == 'r' || q[1] == 'R') | |
954 | && (q[2] == 'p' || q[2] == 'P')) | |
955 | { | |
956 | char *rq = q + 3; | |
957 | ||
958 | skip_whitespace (rq); | |
959 | if (is_end_of_line[(unsigned char) *rq] || *rq == ',') | |
960 | { | |
961 | op->form = TIC6X_OP_IRP; | |
962 | operand_parsed = TRUE; | |
963 | q = rq; | |
964 | } | |
965 | } | |
966 | } | |
967 | ||
968 | /* Check for literal "nrp". */ | |
969 | if (!operand_parsed && (op_forms & TIC6X_OP_NRP)) | |
970 | { | |
971 | if ((q[0] == 'n' || q[0] == 'N') | |
972 | && (q[1] == 'r' || q[1] == 'R') | |
973 | && (q[2] == 'p' || q[2] == 'P')) | |
974 | { | |
975 | char *rq = q + 3; | |
976 | ||
977 | skip_whitespace (rq); | |
978 | if (is_end_of_line[(unsigned char) *rq] || *rq == ',') | |
979 | { | |
980 | op->form = TIC6X_OP_NRP; | |
981 | operand_parsed = TRUE; | |
982 | q = rq; | |
983 | } | |
984 | } | |
985 | } | |
986 | ||
987 | /* Check for control register names. */ | |
988 | if (!operand_parsed && (op_forms & TIC6X_OP_CTRL)) | |
989 | { | |
990 | tic6x_ctrl_id crid; | |
991 | ||
992 | for (crid = 0; crid < tic6x_ctrl_max; crid++) | |
993 | { | |
994 | size_t len = strlen (tic6x_ctrl_table[crid].name); | |
995 | ||
996 | if (strncasecmp (tic6x_ctrl_table[crid].name, q, len) == 0) | |
997 | { | |
998 | char *rq = q + len; | |
999 | ||
1000 | skip_whitespace (rq); | |
1001 | if (is_end_of_line[(unsigned char) *rq] || *rq == ',') | |
1002 | { | |
1003 | op->form = TIC6X_OP_CTRL; | |
1004 | op->value.ctrl = crid; | |
1005 | operand_parsed = TRUE; | |
1006 | q = rq; | |
1007 | if (!(tic6x_ctrl_table[crid].isa_variants & tic6x_features)) | |
1008 | as_bad (_("control register '%s' not supported " | |
1009 | "on this architecture"), | |
1010 | tic6x_ctrl_table[crid].name); | |
1011 | } | |
1012 | } | |
1013 | } | |
1014 | } | |
1015 | ||
1016 | /* See if this looks like a memory reference. */ | |
1017 | if (!operand_parsed | |
1018 | && (op_forms & (TIC6X_OP_MEM_NOUNREG | TIC6X_OP_MEM_UNREG))) | |
1019 | { | |
1020 | bfd_boolean mem_ok = TRUE; | |
1021 | char *mq = q; | |
1022 | tic6x_mem_mod mem_mod = tic6x_mem_mod_none; | |
1023 | tic6x_register base_reg; | |
1024 | bfd_boolean require_offset, permit_offset; | |
1025 | tic6x_mem_scaling scaled; | |
1026 | bfd_boolean offset_is_reg; | |
1027 | expressionS offset_exp; | |
1028 | tic6x_register offset_reg; | |
1029 | ||
1030 | if (*mq == '*') | |
1031 | mq++; | |
1032 | else | |
1033 | mem_ok = FALSE; | |
1034 | ||
1035 | if (mem_ok) | |
1036 | { | |
1037 | skip_whitespace (mq); | |
1038 | switch (*mq) | |
1039 | { | |
1040 | case '+': | |
1041 | if (mq[1] == '+') | |
1042 | { | |
1043 | mem_mod = tic6x_mem_mod_preinc; | |
1044 | mq += 2; | |
1045 | } | |
1046 | else | |
1047 | { | |
1048 | mem_mod = tic6x_mem_mod_plus; | |
1049 | mq++; | |
1050 | } | |
1051 | break; | |
1052 | ||
1053 | case '-': | |
1054 | if (mq[1] == '-') | |
1055 | { | |
1056 | mem_mod = tic6x_mem_mod_predec; | |
1057 | mq += 2; | |
1058 | } | |
1059 | else | |
1060 | { | |
1061 | mem_mod = tic6x_mem_mod_minus; | |
1062 | mq++; | |
1063 | } | |
1064 | break; | |
1065 | ||
1066 | default: | |
1067 | break; | |
1068 | } | |
1069 | } | |
1070 | ||
1071 | if (mem_ok) | |
1072 | { | |
1073 | skip_whitespace (mq); | |
1074 | mem_ok = tic6x_parse_register (&mq, &base_reg); | |
1075 | } | |
1076 | ||
1077 | if (mem_ok && mem_mod == tic6x_mem_mod_none) | |
1078 | { | |
1079 | skip_whitespace (mq); | |
1080 | if (mq[0] == '+' && mq[1] == '+') | |
1081 | { | |
1082 | mem_mod = tic6x_mem_mod_postinc; | |
1083 | mq += 2; | |
1084 | } | |
1085 | else if (mq[0] == '-' && mq[1] == '-') | |
1086 | { | |
1087 | mem_mod = tic6x_mem_mod_postdec; | |
1088 | mq += 2; | |
1089 | } | |
1090 | } | |
1091 | ||
1092 | if (mem_mod == tic6x_mem_mod_none) | |
1093 | permit_offset = FALSE; | |
1094 | else | |
1095 | permit_offset = TRUE; | |
1096 | if (mem_mod == tic6x_mem_mod_plus || mem_mod == tic6x_mem_mod_minus) | |
1097 | require_offset = TRUE; | |
1098 | else | |
1099 | require_offset = FALSE; | |
1100 | scaled = tic6x_offset_none; | |
1101 | offset_is_reg = FALSE; | |
1102 | ||
1103 | if (mem_ok && permit_offset) | |
1104 | { | |
1105 | char endc = 0; | |
1106 | ||
1107 | skip_whitespace (mq); | |
1108 | switch (*mq) | |
1109 | { | |
1110 | case '[': | |
1111 | scaled = tic6x_offset_scaled; | |
1112 | mq++; | |
1113 | endc = ']'; | |
1114 | break; | |
1115 | ||
1116 | case '(': | |
1117 | scaled = tic6x_offset_unscaled; | |
1118 | mq++; | |
1119 | endc = ')'; | |
1120 | break; | |
1121 | ||
1122 | default: | |
1123 | break; | |
1124 | } | |
1125 | if (scaled != tic6x_offset_none) | |
1126 | { | |
1127 | skip_whitespace (mq); | |
1128 | if (scaled == tic6x_offset_scaled | |
1129 | || (op_forms & TIC6X_OP_MEM_UNREG)) | |
1130 | { | |
1131 | bfd_boolean reg_ok; | |
1132 | char *rq = mq; | |
1133 | ||
1134 | reg_ok = tic6x_parse_register (&rq, &offset_reg); | |
1135 | if (reg_ok) | |
1136 | { | |
1137 | skip_whitespace (rq); | |
1138 | if (*rq == endc) | |
1139 | { | |
1140 | mq = rq; | |
1141 | offset_is_reg = TRUE; | |
1142 | } | |
1143 | } | |
1144 | } | |
1145 | if (!offset_is_reg) | |
1146 | { | |
1147 | char *save_input_line_pointer; | |
1148 | ||
1149 | save_input_line_pointer = input_line_pointer; | |
1150 | input_line_pointer = mq; | |
1151 | expression (&offset_exp); | |
1152 | mq = input_line_pointer; | |
1153 | input_line_pointer = save_input_line_pointer; | |
1154 | } | |
1155 | skip_whitespace (mq); | |
1156 | if (*mq == endc) | |
1157 | mq++; | |
1158 | else | |
1159 | mem_ok = FALSE; | |
1160 | } | |
1161 | } | |
1162 | ||
1163 | if (mem_ok && require_offset && scaled == tic6x_offset_none) | |
1164 | mem_ok = FALSE; | |
1165 | ||
1166 | if (mem_ok) | |
1167 | { | |
1168 | skip_whitespace (mq); | |
1169 | if (!is_end_of_line[(unsigned char) *mq] && *mq != ',') | |
1170 | mem_ok = FALSE; | |
1171 | } | |
1172 | ||
1173 | if (mem_ok) | |
1174 | { | |
1175 | op->form = op_forms & (TIC6X_OP_MEM_NOUNREG | TIC6X_OP_MEM_UNREG); | |
1176 | op->value.mem.base_reg = base_reg; | |
1177 | op->value.mem.mod = mem_mod; | |
1178 | op->value.mem.scaled = scaled; | |
1179 | op->value.mem.offset_is_reg = offset_is_reg; | |
1180 | if (offset_is_reg) | |
1181 | op->value.mem.offset.reg = offset_reg; | |
1182 | else | |
1183 | op->value.mem.offset.exp = offset_exp; | |
1184 | operand_parsed = TRUE; | |
1185 | q = mq; | |
1186 | if (base_reg.num >= tic6x_num_registers) | |
1187 | as_bad (_("register number %u not supported on this architecture"), | |
1188 | base_reg.num); | |
1189 | if (offset_is_reg && offset_reg.num >= tic6x_num_registers) | |
1190 | as_bad (_("register number %u not supported on this architecture"), | |
1191 | offset_reg.num); | |
1192 | } | |
1193 | } | |
1194 | ||
1195 | /* See if this looks like a register or register pair. */ | |
1196 | if (!operand_parsed && (op_forms & (TIC6X_OP_REG | TIC6X_OP_REGPAIR))) | |
1197 | { | |
1198 | tic6x_register first_reg, second_reg; | |
1199 | bfd_boolean reg_ok; | |
1200 | char *rq = q; | |
1201 | ||
1202 | reg_ok = tic6x_parse_register (&rq, &first_reg); | |
1203 | ||
1204 | if (reg_ok) | |
1205 | { | |
1206 | if (*rq == ':' && (op_forms & TIC6X_OP_REGPAIR)) | |
1207 | { | |
1208 | rq++; | |
1209 | reg_ok = tic6x_parse_register (&rq, &second_reg); | |
1210 | if (reg_ok) | |
1211 | { | |
1212 | skip_whitespace (rq); | |
1213 | if (is_end_of_line[(unsigned char) *rq] || *rq == ',') | |
1214 | { | |
1215 | if ((second_reg.num & 1) | |
1216 | || (first_reg.num != second_reg.num + 1) | |
1217 | || (first_reg.side != second_reg.side)) | |
1218 | as_bad (_("register pair for operand %u of '%.*s'" | |
1219 | " not a valid even/odd pair"), opno, | |
1220 | opc_len, str); | |
1221 | op->form = TIC6X_OP_REGPAIR; | |
1222 | op->value.reg = second_reg; | |
1223 | operand_parsed = TRUE; | |
1224 | q = rq; | |
1225 | } | |
1226 | } | |
1227 | } | |
1228 | else if (op_forms & TIC6X_OP_REG) | |
1229 | { | |
1230 | skip_whitespace (rq); | |
1231 | if (is_end_of_line[(unsigned char) *rq] || *rq == ',') | |
1232 | { | |
1233 | op->form = TIC6X_OP_REG; | |
1234 | op->value.reg = first_reg; | |
1235 | operand_parsed = TRUE; | |
1236 | q = rq; | |
1237 | } | |
1238 | } | |
1239 | } | |
1240 | if (operand_parsed) | |
1241 | { | |
1242 | if (first_reg.num >= tic6x_num_registers) | |
1243 | as_bad (_("register number %u not supported on this architecture"), | |
1244 | first_reg.num); | |
1245 | if (op->form == TIC6X_OP_REGPAIR | |
1246 | && second_reg.num >= tic6x_num_registers) | |
1247 | as_bad (_("register number %u not supported on this architecture"), | |
1248 | second_reg.num); | |
1249 | } | |
1250 | } | |
1251 | ||
1252 | /* Otherwise, parse it as an expression. */ | |
1253 | if (!operand_parsed && (op_forms & TIC6X_OP_EXP)) | |
1254 | { | |
1255 | char *save_input_line_pointer; | |
1256 | ||
1257 | save_input_line_pointer = input_line_pointer; | |
1258 | input_line_pointer = q; | |
1259 | op->form = TIC6X_OP_EXP; | |
1260 | expression (&op->value.exp); | |
1261 | q = input_line_pointer; | |
1262 | input_line_pointer = save_input_line_pointer; | |
1263 | operand_parsed = TRUE; | |
1264 | } | |
1265 | ||
1266 | if (operand_parsed) | |
1267 | { | |
1268 | /* Now the operand has been parsed, there must be nothing more | |
1269 | before the comma or end of line. */ | |
1270 | skip_whitespace (q); | |
1271 | if (!is_end_of_line[(unsigned char) *q] && *q != ',') | |
1272 | { | |
1273 | operand_parsed = FALSE; | |
1274 | as_bad (_("junk after operand %u of '%.*s'"), opno, | |
1275 | opc_len, str); | |
1276 | while (!is_end_of_line[(unsigned char) *q] && *q != ',') | |
1277 | q++; | |
1278 | } | |
1279 | } | |
1280 | else | |
1281 | { | |
1282 | /* This could not be parsed as any acceptable form of | |
1283 | operand. */ | |
1284 | switch (op_forms) | |
1285 | { | |
1286 | case TIC6X_OP_REG | TIC6X_OP_REGPAIR: | |
1287 | as_bad (_("bad register or register pair for operand %u of '%.*s'"), | |
1288 | opno, opc_len, str); | |
1289 | break; | |
1290 | ||
1291 | case TIC6X_OP_REG | TIC6X_OP_CTRL: | |
1292 | case TIC6X_OP_REG: | |
1293 | as_bad (_("bad register for operand %u of '%.*s'"), | |
1294 | opno, opc_len, str); | |
1295 | break; | |
1296 | ||
1297 | case TIC6X_OP_REGPAIR: | |
1298 | as_bad (_("bad register pair for operand %u of '%.*s'"), | |
1299 | opno, opc_len, str); | |
1300 | break; | |
1301 | ||
1302 | case TIC6X_OP_FUNC_UNIT: | |
1303 | as_bad (_("bad functional unit for operand %u of '%.*s'"), | |
1304 | opno, opc_len, str); | |
1305 | break; | |
1306 | ||
1307 | default: | |
1308 | as_bad (_("bad operand %u of '%.*s'"), | |
1309 | opno, opc_len, str); | |
1310 | break; | |
1311 | ||
1312 | } | |
1313 | while (!is_end_of_line[(unsigned char) *q] && *q != ',') | |
1314 | q++; | |
1315 | } | |
1316 | *p = q; | |
1317 | return operand_parsed; | |
1318 | } | |
1319 | ||
1320 | /* Table of assembler operators and associated O_* values. */ | |
1321 | typedef struct | |
1322 | { | |
1323 | const char *name; | |
1324 | operatorT op; | |
1325 | } tic6x_operator_table; | |
1326 | static const tic6x_operator_table tic6x_operators[] = { | |
1327 | #define O_dsbt_index O_md1 | |
1328 | { "dsbt_index", O_dsbt_index }, | |
1329 | #define O_got O_md2 | |
1330 | { "got", O_got }, | |
1331 | #define O_dpr_got O_md3 | |
1332 | { "dpr_got", O_dpr_got }, | |
1333 | #define O_dpr_byte O_md4 | |
1334 | { "dpr_byte", O_dpr_byte }, | |
1335 | #define O_dpr_hword O_md5 | |
1336 | { "dpr_hword", O_dpr_hword }, | |
1337 | #define O_dpr_word O_md6 | |
1338 | { "dpr_word", O_dpr_word }, | |
1339 | }; | |
1340 | ||
1341 | /* Parse a name in some machine-specific way. Used on C6X to handle | |
1342 | assembler operators. */ | |
1343 | ||
1344 | int | |
1345 | tic6x_parse_name (const char *name, expressionS *exprP, | |
1346 | enum expr_mode mode ATTRIBUTE_UNUSED, char *nextchar) | |
1347 | { | |
1348 | char *p = input_line_pointer; | |
1349 | char c, *name_start, *name_end; | |
1350 | const char *inner_name; | |
1351 | unsigned int i; | |
1352 | operatorT op = O_illegal; | |
1353 | symbolS *sym; | |
1354 | ||
1355 | if (*name != '$') | |
1356 | return 0; | |
1357 | ||
1358 | for (i = 0; i < ARRAY_SIZE (tic6x_operators); i++) | |
1359 | if (strcasecmp (name + 1, tic6x_operators[i].name) == 0) | |
1360 | { | |
1361 | op = tic6x_operators[i].op; | |
1362 | break; | |
1363 | } | |
1364 | ||
1365 | if (op == O_illegal) | |
1366 | return 0; | |
1367 | ||
1368 | *input_line_pointer = *nextchar; | |
1369 | skip_whitespace (p); | |
1370 | ||
1371 | if (*p != '(') | |
1372 | { | |
1373 | *input_line_pointer = 0; | |
1374 | return 0; | |
1375 | } | |
1376 | p++; | |
1377 | skip_whitespace (p); | |
1378 | ||
1379 | if (!is_name_beginner (*p)) | |
1380 | { | |
1381 | *input_line_pointer = 0; | |
1382 | return 0; | |
1383 | } | |
1384 | ||
1385 | name_start = p; | |
1386 | p++; | |
1387 | while (is_part_of_name (*p)) | |
1388 | p++; | |
1389 | name_end = p; | |
1390 | skip_whitespace (p); | |
1391 | ||
1392 | if (*p != ')') | |
1393 | { | |
1394 | *input_line_pointer = 0; | |
1395 | return 0; | |
1396 | } | |
1397 | ||
1398 | input_line_pointer = p + 1; | |
1399 | *nextchar = *input_line_pointer; | |
1400 | *input_line_pointer = 0; | |
1401 | ||
1402 | c = *name_end; | |
1403 | *name_end = 0; | |
1404 | inner_name = name_start; | |
1405 | if (op == O_dsbt_index && strcmp (inner_name, "__c6xabi_DSBT_BASE") != 0) | |
1406 | { | |
1407 | as_bad (_("$DSBT_INDEX must be used with __c6xabi_DSBT_BASE")); | |
1408 | inner_name = "__c6xabi_DSBT_BASE"; | |
1409 | } | |
1410 | sym = symbol_find_or_make (inner_name); | |
1411 | *name_end = c; | |
1412 | ||
1413 | exprP->X_op = op; | |
1414 | exprP->X_add_symbol = sym; | |
1415 | exprP->X_add_number = 0; | |
1416 | exprP->X_op_symbol = NULL; | |
1417 | exprP->X_md = 0; | |
1418 | ||
1419 | return 1; | |
1420 | } | |
1421 | ||
1422 | /* Create a fixup for an expression. Same arguments as fix_new_exp, | |
1423 | plus FIX_ADDA which is TRUE for ADDA instructions (to indicate that | |
1424 | fixes resolving to constants should have those constants implicitly | |
1425 | shifted) and FALSE otherwise, but look for C6X-specific expression | |
1426 | types and adjust the relocations or give errors accordingly. */ | |
1427 | ||
1428 | static void | |
1429 | tic6x_fix_new_exp (fragS *frag, int where, int size, expressionS *exp, | |
1430 | int pcrel, bfd_reloc_code_real_type r_type, | |
1431 | bfd_boolean fix_adda) | |
1432 | { | |
1433 | bfd_reloc_code_real_type new_reloc = BFD_RELOC_UNUSED; | |
1434 | fixS *fix; | |
1435 | ||
1436 | switch (exp->X_op) | |
1437 | { | |
1438 | case O_dsbt_index: | |
1439 | switch (r_type) | |
1440 | { | |
1441 | case BFD_RELOC_C6000_SBR_U15_W: | |
1442 | new_reloc = BFD_RELOC_C6000_DSBT_INDEX; | |
1443 | break; | |
1444 | ||
1445 | default: | |
1446 | as_bad (_("$DSBT_INDEX not supported in this context")); | |
1447 | return; | |
1448 | } | |
1449 | break; | |
1450 | ||
1451 | case O_got: | |
1452 | switch (r_type) | |
1453 | { | |
1454 | case BFD_RELOC_C6000_SBR_U15_W: | |
1455 | new_reloc = BFD_RELOC_C6000_SBR_GOT_U15_W; | |
1456 | break; | |
1457 | ||
1458 | default: | |
1459 | as_bad (_("$GOT not supported in this context")); | |
1460 | return; | |
1461 | } | |
1462 | break; | |
1463 | ||
1464 | case O_dpr_got: | |
1465 | switch (r_type) | |
1466 | { | |
1467 | case BFD_RELOC_C6000_ABS_L16: | |
1468 | new_reloc = BFD_RELOC_C6000_SBR_GOT_L16_W; | |
1469 | break; | |
1470 | ||
1471 | case BFD_RELOC_C6000_ABS_H16: | |
1472 | new_reloc = BFD_RELOC_C6000_SBR_GOT_H16_W; | |
1473 | break; | |
1474 | ||
1475 | default: | |
1476 | as_bad (_("$DPR_GOT not supported in this context")); | |
1477 | return; | |
1478 | } | |
1479 | break; | |
1480 | ||
1481 | case O_dpr_byte: | |
1482 | switch (r_type) | |
1483 | { | |
1484 | case BFD_RELOC_C6000_ABS_S16: | |
1485 | new_reloc = BFD_RELOC_C6000_SBR_S16; | |
1486 | break; | |
1487 | ||
1488 | case BFD_RELOC_C6000_ABS_L16: | |
1489 | new_reloc = BFD_RELOC_C6000_SBR_L16_B; | |
1490 | break; | |
1491 | ||
1492 | case BFD_RELOC_C6000_ABS_H16: | |
1493 | new_reloc = BFD_RELOC_C6000_SBR_H16_B; | |
1494 | break; | |
1495 | ||
1496 | default: | |
1497 | as_bad (_("$DPR_BYTE not supported in this context")); | |
1498 | return; | |
1499 | } | |
1500 | break; | |
1501 | ||
1502 | case O_dpr_hword: | |
1503 | switch (r_type) | |
1504 | { | |
1505 | case BFD_RELOC_C6000_ABS_L16: | |
1506 | new_reloc = BFD_RELOC_C6000_SBR_L16_H; | |
1507 | break; | |
1508 | ||
1509 | case BFD_RELOC_C6000_ABS_H16: | |
1510 | new_reloc = BFD_RELOC_C6000_SBR_H16_H; | |
1511 | break; | |
1512 | ||
1513 | default: | |
1514 | as_bad (_("$DPR_HWORD not supported in this context")); | |
1515 | return; | |
1516 | } | |
1517 | break; | |
1518 | ||
1519 | case O_dpr_word: | |
1520 | switch (r_type) | |
1521 | { | |
1522 | case BFD_RELOC_C6000_ABS_L16: | |
1523 | new_reloc = BFD_RELOC_C6000_SBR_L16_W; | |
1524 | break; | |
1525 | ||
1526 | case BFD_RELOC_C6000_ABS_H16: | |
1527 | new_reloc = BFD_RELOC_C6000_SBR_H16_W; | |
1528 | break; | |
1529 | ||
1530 | default: | |
1531 | as_bad (_("$DPR_WORD not supported in this context")); | |
1532 | return; | |
1533 | } | |
1534 | break; | |
1535 | ||
1536 | case O_symbol: | |
1537 | break; | |
1538 | ||
1539 | default: | |
1540 | if (pcrel) | |
1541 | { | |
1542 | as_bad (_("invalid PC-relative operand")); | |
1543 | return; | |
1544 | } | |
1545 | break; | |
1546 | } | |
1547 | ||
1548 | if (new_reloc == BFD_RELOC_UNUSED) | |
1549 | fix = fix_new_exp (frag, where, size, exp, pcrel, r_type); | |
1550 | else | |
1551 | fix = fix_new (frag, where, size, exp->X_add_symbol, exp->X_add_number, | |
1552 | pcrel, new_reloc); | |
1553 | fix->tc_fix_data.fix_adda = fix_adda; | |
1554 | } | |
1555 | ||
1556 | /* Generate a fix for a constant (.word etc.). Needed to ensure these | |
1557 | go through the error checking in tic6x_fix_new_exp. */ | |
1558 | ||
1559 | void | |
1560 | tic6x_cons_fix_new (fragS *frag, int where, int size, expressionS *exp) | |
1561 | { | |
1562 | bfd_reloc_code_real_type r_type; | |
1563 | ||
1564 | switch (size) | |
1565 | { | |
1566 | case 1: | |
1567 | r_type = BFD_RELOC_8; | |
1568 | break; | |
1569 | ||
1570 | case 2: | |
1571 | r_type = BFD_RELOC_16; | |
1572 | break; | |
1573 | ||
1574 | case 4: | |
1575 | r_type = BFD_RELOC_32; | |
1576 | break; | |
1577 | ||
1578 | default: | |
1579 | as_bad (_("no %d-byte relocations available"), size); | |
1580 | return; | |
1581 | } | |
1582 | ||
1583 | tic6x_fix_new_exp (frag, where, size, exp, 0, r_type, FALSE); | |
1584 | } | |
1585 | ||
1586 | /* Initialize target-specific fix data. */ | |
1587 | ||
1588 | void | |
1589 | tic6x_init_fix_data (fixS *fixP) | |
1590 | { | |
1591 | fixP->tc_fix_data.fix_adda = FALSE; | |
1592 | } | |
1593 | ||
43bb514a BS |
1594 | /* Return true if the fix can be handled by GAS, false if it must |
1595 | be passed through to the linker. */ | |
1596 | ||
1597 | bfd_boolean | |
1598 | tic6x_fix_adjustable (fixS *fixP) | |
1599 | { | |
1600 | switch (fixP->fx_r_type) | |
1601 | { | |
1602 | /* Adjust_reloc_syms doesn't know about the GOT. */ | |
1603 | case BFD_RELOC_C6000_SBR_GOT_U15_W: | |
1604 | case BFD_RELOC_C6000_SBR_GOT_H16_W: | |
1605 | case BFD_RELOC_C6000_SBR_GOT_L16_W: | |
1606 | return 0; | |
1607 | ||
1608 | default: | |
1609 | return 1; | |
1610 | } | |
1611 | } | |
1612 | ||
40b36596 JM |
1613 | /* Given the fine-grained form of an operand, return the coarse |
1614 | (bit-mask) form. */ | |
1615 | ||
1616 | static unsigned int | |
1617 | tic6x_coarse_operand_form (tic6x_operand_form form) | |
1618 | { | |
1619 | switch (form) | |
1620 | { | |
1621 | case tic6x_operand_asm_const: | |
1622 | case tic6x_operand_link_const: | |
1623 | return TIC6X_OP_EXP; | |
1624 | ||
1625 | case tic6x_operand_reg: | |
1626 | case tic6x_operand_xreg: | |
1627 | case tic6x_operand_dreg: | |
1628 | case tic6x_operand_areg: | |
1629 | case tic6x_operand_retreg: | |
1630 | return TIC6X_OP_REG; | |
1631 | ||
1632 | case tic6x_operand_regpair: | |
1633 | case tic6x_operand_xregpair: | |
1634 | case tic6x_operand_dregpair: | |
1635 | return TIC6X_OP_REGPAIR; | |
1636 | ||
1637 | case tic6x_operand_irp: | |
1638 | return TIC6X_OP_IRP; | |
1639 | ||
1640 | case tic6x_operand_nrp: | |
1641 | return TIC6X_OP_NRP; | |
1642 | ||
1643 | case tic6x_operand_ctrl: | |
1644 | return TIC6X_OP_CTRL; | |
1645 | ||
1646 | case tic6x_operand_mem_short: | |
1647 | case tic6x_operand_mem_long: | |
1648 | case tic6x_operand_mem_deref: | |
1649 | return TIC6X_OP_MEM_NOUNREG; | |
1650 | ||
1651 | case tic6x_operand_mem_ndw: | |
1652 | return TIC6X_OP_MEM_UNREG; | |
1653 | ||
1654 | case tic6x_operand_func_unit: | |
1655 | return TIC6X_OP_FUNC_UNIT; | |
1656 | ||
1657 | default: | |
1658 | abort (); | |
1659 | } | |
1660 | } | |
1661 | ||
1662 | /* How an operand may match or not match a desired form. If different | |
1663 | instruction alternatives fail in different ways, the first failure | |
1664 | in this list determines the diagnostic. */ | |
1665 | typedef enum | |
1666 | { | |
1667 | /* Matches. */ | |
1668 | tic6x_match_matches, | |
1669 | /* Bad coarse form. */ | |
1670 | tic6x_match_coarse, | |
1671 | /* Not constant. */ | |
1672 | tic6x_match_non_const, | |
1673 | /* Register on wrong side. */ | |
1674 | tic6x_match_wrong_side, | |
1675 | /* Not a valid address register. */ | |
1676 | tic6x_match_bad_address, | |
1677 | /* Not a valid return address register. */ | |
1678 | tic6x_match_bad_return, | |
1679 | /* Control register not readable. */ | |
1680 | tic6x_match_ctrl_write_only, | |
1681 | /* Control register not writable. */ | |
1682 | tic6x_match_ctrl_read_only, | |
1683 | /* Not a valid memory reference for this instruction. */ | |
1684 | tic6x_match_bad_mem | |
1685 | } tic6x_operand_match; | |
1686 | ||
1687 | /* Return whether an operand matches the given fine-grained form and | |
1688 | read/write usage, and, if it does not match, how it fails to match. | |
1689 | The main functional unit side is SIDE; the cross-path side is CROSS | |
1690 | (the same as SIDE if a cross path not used); the data side is | |
1691 | DATA_SIDE. */ | |
1692 | static tic6x_operand_match | |
1693 | tic6x_operand_matches_form (const tic6x_operand *op, tic6x_operand_form form, | |
1694 | tic6x_rw rw, unsigned int side, unsigned int cross, | |
1695 | unsigned int data_side) | |
1696 | { | |
1697 | unsigned int coarse = tic6x_coarse_operand_form (form); | |
1698 | ||
1699 | if (coarse != op->form) | |
1700 | return tic6x_match_coarse; | |
1701 | ||
1702 | switch (form) | |
1703 | { | |
1704 | case tic6x_operand_asm_const: | |
1705 | if (op->value.exp.X_op == O_constant) | |
1706 | return tic6x_match_matches; | |
1707 | else | |
1708 | return tic6x_match_non_const; | |
1709 | ||
1710 | case tic6x_operand_link_const: | |
1711 | case tic6x_operand_irp: | |
1712 | case tic6x_operand_nrp: | |
1713 | case tic6x_operand_func_unit: | |
1714 | /* All expressions are link-time constants, although there may | |
1715 | not be relocations to express them in the output file. "irp" | |
1716 | and "nrp" are unique operand values. All parsed functional | |
1717 | unit names are valid. */ | |
1718 | return tic6x_match_matches; | |
1719 | ||
1720 | case tic6x_operand_reg: | |
1721 | case tic6x_operand_regpair: | |
1722 | if (op->value.reg.side == side) | |
1723 | return tic6x_match_matches; | |
1724 | else | |
1725 | return tic6x_match_wrong_side; | |
1726 | ||
1727 | case tic6x_operand_xreg: | |
1728 | case tic6x_operand_xregpair: | |
1729 | if (op->value.reg.side == cross) | |
1730 | return tic6x_match_matches; | |
1731 | else | |
1732 | return tic6x_match_wrong_side; | |
1733 | ||
1734 | case tic6x_operand_dreg: | |
1735 | case tic6x_operand_dregpair: | |
1736 | if (op->value.reg.side == data_side) | |
1737 | return tic6x_match_matches; | |
1738 | else | |
1739 | return tic6x_match_wrong_side; | |
1740 | ||
1741 | case tic6x_operand_areg: | |
1742 | if (op->value.reg.side != cross) | |
1743 | return tic6x_match_wrong_side; | |
1744 | else if (op->value.reg.side == 2 | |
1745 | && (op->value.reg.num == 14 || op->value.reg.num == 15)) | |
1746 | return tic6x_match_matches; | |
1747 | else | |
1748 | return tic6x_match_bad_address; | |
1749 | ||
1750 | case tic6x_operand_retreg: | |
1751 | if (op->value.reg.side != side) | |
1752 | return tic6x_match_wrong_side; | |
1753 | else if (op->value.reg.num != 3) | |
1754 | return tic6x_match_bad_return; | |
1755 | else | |
1756 | return tic6x_match_matches; | |
1757 | ||
1758 | case tic6x_operand_ctrl: | |
1759 | switch (rw) | |
1760 | { | |
1761 | case tic6x_rw_read: | |
1762 | if (tic6x_ctrl_table[op->value.ctrl].rw == tic6x_rw_read | |
1763 | || tic6x_ctrl_table[op->value.ctrl].rw == tic6x_rw_read_write) | |
1764 | return tic6x_match_matches; | |
1765 | else | |
1766 | return tic6x_match_ctrl_write_only; | |
1767 | ||
1768 | case tic6x_rw_write: | |
1769 | if (tic6x_ctrl_table[op->value.ctrl].rw == tic6x_rw_write | |
1770 | || tic6x_ctrl_table[op->value.ctrl].rw == tic6x_rw_read_write) | |
1771 | return tic6x_match_matches; | |
1772 | else | |
1773 | return tic6x_match_ctrl_read_only; | |
1774 | ||
1775 | default: | |
1776 | abort (); | |
1777 | } | |
1778 | ||
1779 | case tic6x_operand_mem_deref: | |
1780 | if (op->value.mem.mod != tic6x_mem_mod_none) | |
1781 | return tic6x_match_bad_mem; | |
1782 | else if (op->value.mem.scaled != tic6x_offset_none) | |
1783 | abort (); | |
1784 | else if (op->value.mem.base_reg.side != side) | |
1785 | return tic6x_match_bad_mem; | |
1786 | else | |
1787 | return tic6x_match_matches; | |
1788 | ||
1789 | case tic6x_operand_mem_short: | |
1790 | case tic6x_operand_mem_ndw: | |
1791 | if (op->value.mem.base_reg.side != side) | |
1792 | return tic6x_match_bad_mem; | |
1793 | if (op->value.mem.mod == tic6x_mem_mod_none) | |
1794 | { | |
1795 | if (op->value.mem.scaled != tic6x_offset_none) | |
1796 | abort (); | |
1797 | return tic6x_match_matches; | |
1798 | } | |
1799 | if (op->value.mem.scaled == tic6x_offset_none) | |
1800 | { | |
1801 | if (op->value.mem.mod == tic6x_mem_mod_plus | |
1802 | || op->value.mem.mod == tic6x_mem_mod_minus) | |
1803 | abort (); | |
1804 | return tic6x_match_matches; | |
1805 | } | |
1806 | if (op->value.mem.offset_is_reg) | |
1807 | { | |
1808 | if (op->value.mem.scaled == tic6x_offset_unscaled | |
1809 | && form != tic6x_operand_mem_ndw) | |
1810 | abort (); | |
1811 | if (op->value.mem.offset.reg.side == side) | |
1812 | return tic6x_match_matches; | |
1813 | else | |
1814 | return tic6x_match_bad_mem; | |
1815 | } | |
1816 | else | |
1817 | { | |
1818 | if (op->value.mem.offset.exp.X_op == O_constant) | |
1819 | return tic6x_match_matches; | |
1820 | else | |
1821 | return tic6x_match_bad_mem; | |
1822 | } | |
1823 | ||
1824 | case tic6x_operand_mem_long: | |
1825 | if (op->value.mem.base_reg.side == 2 | |
1826 | && (op->value.mem.base_reg.num == 14 | |
1827 | || op->value.mem.base_reg.num == 15)) | |
1828 | { | |
1829 | switch (op->value.mem.mod) | |
1830 | { | |
1831 | case tic6x_mem_mod_none: | |
1832 | if (op->value.mem.scaled != tic6x_offset_none) | |
1833 | abort (); | |
1834 | return tic6x_match_matches; | |
1835 | ||
1836 | case tic6x_mem_mod_plus: | |
1837 | if (op->value.mem.scaled == tic6x_offset_none) | |
1838 | abort (); | |
1839 | if (op->value.mem.offset_is_reg) | |
1840 | return tic6x_match_bad_mem; | |
1841 | else if (op->value.mem.scaled == tic6x_offset_scaled | |
1842 | && op->value.mem.offset.exp.X_op != O_constant) | |
1843 | return tic6x_match_bad_mem; | |
1844 | else | |
1845 | return tic6x_match_matches; | |
1846 | ||
1847 | case tic6x_mem_mod_minus: | |
1848 | case tic6x_mem_mod_preinc: | |
1849 | case tic6x_mem_mod_predec: | |
1850 | case tic6x_mem_mod_postinc: | |
1851 | case tic6x_mem_mod_postdec: | |
1852 | return tic6x_match_bad_mem; | |
1853 | ||
1854 | default: | |
1855 | abort (); | |
1856 | } | |
1857 | ||
1858 | } | |
1859 | else | |
1860 | return tic6x_match_bad_mem; | |
1861 | ||
1862 | default: | |
1863 | abort (); | |
1864 | } | |
1865 | } | |
1866 | ||
1867 | /* Return the number of bits shift used with DP-relative coding method | |
1868 | CODING. */ | |
1869 | ||
1870 | static unsigned int | |
1871 | tic6x_dpr_shift (tic6x_coding_method coding) | |
1872 | { | |
1873 | switch (coding) | |
1874 | { | |
1875 | case tic6x_coding_ulcst_dpr_byte: | |
1876 | return 0; | |
1877 | ||
1878 | case tic6x_coding_ulcst_dpr_half: | |
1879 | return 1; | |
1880 | ||
1881 | case tic6x_coding_ulcst_dpr_word: | |
1882 | return 2; | |
1883 | ||
1884 | default: | |
1885 | abort (); | |
1886 | } | |
1887 | } | |
1888 | ||
1889 | /* Return the relocation used with DP-relative coding method | |
1890 | CODING. */ | |
1891 | ||
1892 | static bfd_reloc_code_real_type | |
1893 | tic6x_dpr_reloc (tic6x_coding_method coding) | |
1894 | { | |
1895 | switch (coding) | |
1896 | { | |
1897 | case tic6x_coding_ulcst_dpr_byte: | |
1898 | return BFD_RELOC_C6000_SBR_U15_B; | |
1899 | ||
1900 | case tic6x_coding_ulcst_dpr_half: | |
1901 | return BFD_RELOC_C6000_SBR_U15_H; | |
1902 | ||
1903 | case tic6x_coding_ulcst_dpr_word: | |
1904 | return BFD_RELOC_C6000_SBR_U15_W; | |
1905 | ||
1906 | default: | |
1907 | abort (); | |
1908 | } | |
1909 | } | |
1910 | ||
1911 | /* Given a memory reference *MEM_REF as originally parsed, fill in | |
1912 | defaults for missing offsets. */ | |
1913 | ||
1914 | static void | |
1915 | tic6x_default_mem_ref (tic6x_mem_ref *mem_ref) | |
1916 | { | |
1917 | switch (mem_ref->mod) | |
1918 | { | |
1919 | case tic6x_mem_mod_none: | |
1920 | if (mem_ref->scaled != tic6x_offset_none) | |
1921 | abort (); | |
1922 | mem_ref->mod = tic6x_mem_mod_plus; | |
1923 | mem_ref->scaled = tic6x_offset_unscaled; | |
1924 | mem_ref->offset_is_reg = FALSE; | |
1925 | memset (&mem_ref->offset.exp, 0, sizeof mem_ref->offset.exp); | |
1926 | mem_ref->offset.exp.X_op = O_constant; | |
1927 | mem_ref->offset.exp.X_add_number = 0; | |
1928 | mem_ref->offset.exp.X_unsigned = 0; | |
1929 | break; | |
1930 | ||
1931 | case tic6x_mem_mod_plus: | |
1932 | case tic6x_mem_mod_minus: | |
1933 | if (mem_ref->scaled == tic6x_offset_none) | |
1934 | abort (); | |
1935 | break; | |
1936 | ||
1937 | case tic6x_mem_mod_preinc: | |
1938 | case tic6x_mem_mod_predec: | |
1939 | case tic6x_mem_mod_postinc: | |
1940 | case tic6x_mem_mod_postdec: | |
1941 | if (mem_ref->scaled != tic6x_offset_none) | |
1942 | break; | |
1943 | mem_ref->scaled = tic6x_offset_scaled; | |
1944 | mem_ref->offset_is_reg = FALSE; | |
1945 | memset (&mem_ref->offset.exp, 0, sizeof mem_ref->offset.exp); | |
1946 | mem_ref->offset.exp.X_op = O_constant; | |
1947 | mem_ref->offset.exp.X_add_number = 1; | |
1948 | mem_ref->offset.exp.X_unsigned = 0; | |
1949 | break; | |
1950 | ||
1951 | default: | |
1952 | abort (); | |
1953 | } | |
1954 | } | |
1955 | ||
1956 | /* Return the encoding in the 8-bit field of an SPMASK or SPMASKR | |
1957 | instruction of the specified UNIT, side SIDE. */ | |
1958 | ||
1959 | static unsigned int | |
1960 | tic6x_encode_spmask (tic6x_func_unit_base unit, unsigned int side) | |
1961 | { | |
1962 | switch (unit) | |
1963 | { | |
1964 | case tic6x_func_unit_l: | |
1965 | return 1 << (side - 1); | |
1966 | ||
1967 | case tic6x_func_unit_s: | |
1968 | return 1 << (side + 1); | |
1969 | ||
1970 | case tic6x_func_unit_d: | |
1971 | return 1 << (side + 3); | |
1972 | ||
1973 | case tic6x_func_unit_m: | |
1974 | return 1 << (side + 5); | |
1975 | ||
1976 | default: | |
1977 | abort (); | |
1978 | } | |
1979 | } | |
1980 | ||
1981 | /* Try to encode the instruction with opcode number ID and operands | |
1982 | OPERANDS (number NUM_OPERANDS), creg value THIS_LINE_CREG and z | |
1983 | value THIS_LINE_Z; FUNC_UNIT_SIDE, FUNC_UNIT_CROSS and | |
1984 | FUNC_UNIT_DATA_SIDE describe the functional unit specification; | |
1985 | SPLOOP_II is the ii value from the previous SPLOOP-family | |
1986 | instruction, or 0 if not in such a loop; the only possible problems | |
1987 | are operands being out of range (they already match the | |
1988 | fine-grained form), and inappropriate predication. If this | |
1989 | succeeds, return the encoding and set *OK to TRUE; otherwise return | |
1990 | 0 and set *OK to FALSE. If a fix is needed, set *FIX_NEEDED to | |
1991 | true and fill in *FIX_EXP, *FIX_PCREL, *FX_R_TYPE and *FIX_ADDA. | |
1992 | Print error messages for failure if PRINT_ERRORS is TRUE; the | |
1993 | opcode starts at STR and has length OPC_LEN. */ | |
1994 | ||
1995 | static unsigned int | |
1996 | tic6x_try_encode (tic6x_opcode_id id, tic6x_operand *operands, | |
1997 | unsigned int num_operands, unsigned int this_line_creg, | |
1998 | unsigned int this_line_z, unsigned int func_unit_side, | |
1999 | unsigned int func_unit_cross, | |
2000 | unsigned int func_unit_data_side, int sploop_ii, | |
2001 | expressionS **fix_exp, int *fix_pcrel, | |
2002 | bfd_reloc_code_real_type *fx_r_type, bfd_boolean *fix_adda, | |
2003 | bfd_boolean *fix_needed, bfd_boolean *ok, | |
2004 | bfd_boolean print_errors, char *str, int opc_len) | |
2005 | { | |
2006 | const tic6x_opcode *opct; | |
2007 | const tic6x_insn_format *fmt; | |
2008 | unsigned int opcode_value; | |
2009 | unsigned int fld; | |
2010 | ||
2011 | opct = &tic6x_opcode_table[id]; | |
2012 | fmt = &tic6x_insn_format_table[opct->format]; | |
2013 | opcode_value = fmt->cst_bits; | |
2014 | ||
2015 | for (fld = 0; fld < opct->num_fixed_fields; fld++) | |
2016 | { | |
2017 | if (opct->fixed_fields[fld].min_val == opct->fixed_fields[fld].max_val) | |
2018 | { | |
2019 | const tic6x_insn_field *fldd; | |
2020 | fldd = tic6x_field_from_fmt (fmt, opct->fixed_fields[fld].field_id); | |
2021 | if (fldd == NULL) | |
2022 | abort (); | |
2023 | opcode_value |= opct->fixed_fields[fld].min_val << fldd->low_pos; | |
2024 | } | |
2025 | } | |
2026 | ||
2027 | for (fld = 0; fld < opct->num_variable_fields; fld++) | |
2028 | { | |
2029 | const tic6x_insn_field *fldd; | |
2030 | unsigned int value; | |
2031 | unsigned int opno; | |
2032 | unsigned int ffld; | |
2033 | offsetT sign_value; | |
2034 | unsigned int bits; | |
2035 | unsigned int fcyc_bits; | |
2036 | expressionS *expp; | |
2037 | expressionS ucexp; | |
2038 | tic6x_mem_ref mem; | |
2039 | ||
2040 | fldd = tic6x_field_from_fmt (fmt, opct->variable_fields[fld].field_id); | |
2041 | if (fldd == NULL) | |
2042 | abort (); | |
2043 | opno = opct->variable_fields[fld].operand_num; | |
2044 | switch (opct->variable_fields[fld].coding_method) | |
2045 | { | |
2046 | case tic6x_coding_ucst: | |
2047 | if (operands[opno].form != TIC6X_OP_EXP) | |
2048 | abort (); | |
2049 | if (operands[opno].value.exp.X_op != O_constant) | |
2050 | abort (); | |
2051 | ucexp = operands[opno].value.exp; | |
2052 | unsigned_constant: | |
2053 | if (ucexp.X_add_number < 0 | |
2054 | || ucexp.X_add_number >= (1 << fldd->width)) | |
2055 | { | |
2056 | if (print_errors) | |
2057 | as_bad (_("operand %u of '%.*s' out of range"), opno + 1, | |
2058 | opc_len, str); | |
2059 | *ok = FALSE; | |
2060 | return 0; | |
2061 | } | |
2062 | value = ucexp.X_add_number; | |
2063 | break; | |
2064 | ||
2065 | case tic6x_coding_scst: | |
2066 | if (operands[opno].form != TIC6X_OP_EXP) | |
2067 | abort (); | |
2068 | if (operands[opno].value.exp.X_op != O_constant) | |
2069 | { | |
2070 | value = 0; | |
2071 | /* Opcode table should not permit non-constants without | |
2072 | a known relocation for them. */ | |
2073 | if (fldd->low_pos != 7 || fldd->width != 16) | |
2074 | abort (); | |
2075 | *fix_needed = TRUE; | |
2076 | *fix_exp = &operands[opno].value.exp; | |
2077 | *fix_pcrel = 0; | |
2078 | *fx_r_type = BFD_RELOC_C6000_ABS_S16; | |
2079 | *fix_adda = FALSE; | |
2080 | break; | |
2081 | } | |
2082 | sign_value = SEXT (operands[opno].value.exp.X_add_number); | |
2083 | signed_constant: | |
2084 | if (sign_value < -(1 << (fldd->width - 1)) | |
2085 | || (sign_value >= (1 << (fldd->width - 1)))) | |
2086 | { | |
2087 | if (print_errors) | |
2088 | as_bad (_("operand %u of '%.*s' out of range"), opno + 1, | |
2089 | opc_len, str); | |
2090 | *ok = FALSE; | |
2091 | return 0; | |
2092 | } | |
2093 | value = sign_value + (1 << (fldd->width - 1)); | |
2094 | value ^= (1 << (fldd->width - 1)); | |
2095 | break; | |
2096 | ||
2097 | case tic6x_coding_ucst_minus_one: | |
2098 | if (operands[opno].form != TIC6X_OP_EXP) | |
2099 | abort (); | |
2100 | if (operands[opno].value.exp.X_op != O_constant) | |
2101 | abort (); | |
2102 | if (operands[opno].value.exp.X_add_number <= 0 | |
2103 | || operands[opno].value.exp.X_add_number > (1 << fldd->width)) | |
2104 | { | |
2105 | if (print_errors) | |
2106 | as_bad (_("operand %u of '%.*s' out of range"), opno + 1, | |
2107 | opc_len, str); | |
2108 | *ok = FALSE; | |
2109 | return 0; | |
2110 | } | |
2111 | value = operands[opno].value.exp.X_add_number - 1; | |
2112 | break; | |
2113 | ||
2114 | case tic6x_coding_scst_negate: | |
2115 | if (operands[opno].form != TIC6X_OP_EXP) | |
2116 | abort (); | |
2117 | if (operands[opno].value.exp.X_op != O_constant) | |
2118 | abort (); | |
2119 | sign_value = SEXT (-operands[opno].value.exp.X_add_number); | |
2120 | goto signed_constant; | |
2121 | ||
2122 | case tic6x_coding_ulcst_dpr_byte: | |
2123 | case tic6x_coding_ulcst_dpr_half: | |
2124 | case tic6x_coding_ulcst_dpr_word: | |
2125 | bits = tic6x_dpr_shift (opct->variable_fields[fld].coding_method); | |
2126 | switch (operands[opno].form) | |
2127 | { | |
2128 | case TIC6X_OP_EXP: | |
2129 | if (operands[opno].value.exp.X_op == O_constant) | |
2130 | { | |
2131 | ucexp = operands[opno].value.exp; | |
2132 | goto unsigned_constant; | |
2133 | } | |
2134 | expp = &operands[opno].value.exp; | |
2135 | break; | |
2136 | ||
2137 | case TIC6X_OP_MEM_NOUNREG: | |
2138 | mem = operands[opno].value.mem; | |
2139 | tic6x_default_mem_ref (&mem); | |
2140 | if (mem.offset_is_reg) | |
2141 | abort (); | |
2142 | if (mem.offset.exp.X_op == O_constant) | |
2143 | { | |
2144 | ucexp = mem.offset.exp; | |
2145 | if (mem.scaled == tic6x_offset_unscaled) | |
2146 | { | |
2147 | if (ucexp.X_add_number & ((1 << bits) - 1)) | |
2148 | { | |
2149 | if (print_errors) | |
2150 | as_bad (_("offset in operand %u of '%.*s' not " | |
2151 | "divisible by %u"), opno + 1, opc_len, | |
2152 | str, 1u << bits); | |
2153 | *ok = FALSE; | |
2154 | return 0; | |
2155 | } | |
2156 | ucexp.X_add_number >>= bits; | |
2157 | } | |
2158 | goto unsigned_constant; | |
2159 | } | |
2160 | if (mem.scaled != tic6x_offset_unscaled) | |
2161 | abort (); | |
2162 | if (operands[opno].value.mem.mod == tic6x_mem_mod_none | |
2163 | || operands[opno].value.mem.scaled != tic6x_offset_unscaled | |
2164 | || operands[opno].value.mem.offset_is_reg) | |
2165 | abort (); | |
2166 | expp = &operands[opno].value.mem.offset.exp; | |
2167 | break; | |
2168 | ||
2169 | default: | |
2170 | abort (); | |
2171 | } | |
2172 | value = 0; | |
2173 | /* Opcode table should not use this encoding without a known | |
2174 | relocation. */ | |
2175 | if (fldd->low_pos != 8 || fldd->width != 15) | |
2176 | abort (); | |
2177 | /* We do not check for offset divisibility here; such a | |
2178 | check is not needed at this point to encode the value, | |
2179 | and if there is eventually a problem it will be detected | |
2180 | either in md_apply_fix or at link time. */ | |
2181 | *fix_needed = TRUE; | |
2182 | *fix_exp = expp; | |
2183 | *fix_pcrel = 0; | |
2184 | *fx_r_type | |
2185 | = tic6x_dpr_reloc (opct->variable_fields[fld].coding_method); | |
2186 | if (operands[opno].form == TIC6X_OP_EXP) | |
2187 | *fix_adda = TRUE; | |
2188 | else | |
2189 | *fix_adda = FALSE; | |
2190 | break; | |
2191 | ||
2192 | case tic6x_coding_lcst_low16: | |
2193 | if (operands[opno].form != TIC6X_OP_EXP) | |
2194 | abort (); | |
2195 | if (operands[opno].value.exp.X_op == O_constant) | |
2196 | value = operands[opno].value.exp.X_add_number & 0xffff; | |
2197 | else | |
2198 | { | |
2199 | value = 0; | |
2200 | /* Opcode table should not use this encoding without a | |
2201 | known relocation. */ | |
2202 | if (fldd->low_pos != 7 || fldd->width != 16) | |
2203 | abort (); | |
2204 | *fix_needed = TRUE; | |
2205 | *fix_exp = &operands[opno].value.exp; | |
2206 | *fix_pcrel = 0; | |
2207 | *fx_r_type = BFD_RELOC_C6000_ABS_L16; | |
2208 | *fix_adda = FALSE; | |
2209 | } | |
2210 | break; | |
2211 | ||
2212 | case tic6x_coding_lcst_high16: | |
2213 | if (operands[opno].form != TIC6X_OP_EXP) | |
2214 | abort (); | |
2215 | if (operands[opno].value.exp.X_op == O_constant) | |
2216 | value = (operands[opno].value.exp.X_add_number >> 16) & 0xffff; | |
2217 | else | |
2218 | { | |
2219 | value = 0; | |
2220 | /* Opcode table should not use this encoding without a | |
2221 | known relocation. */ | |
2222 | if (fldd->low_pos != 7 || fldd->width != 16) | |
2223 | abort (); | |
2224 | *fix_needed = TRUE; | |
2225 | *fix_exp = &operands[opno].value.exp; | |
2226 | *fix_pcrel = 0; | |
2227 | *fx_r_type = BFD_RELOC_C6000_ABS_H16; | |
2228 | *fix_adda = FALSE; | |
2229 | } | |
2230 | break; | |
2231 | ||
2232 | case tic6x_coding_pcrel: | |
2233 | case tic6x_coding_pcrel_half: | |
2234 | if (operands[opno].form != TIC6X_OP_EXP) | |
2235 | abort (); | |
2236 | value = 0; | |
2237 | *fix_needed = TRUE; | |
2238 | *fix_exp = &operands[opno].value.exp; | |
2239 | *fix_pcrel = 1; | |
2240 | if (fldd->low_pos == 7 && fldd->width == 21) | |
2241 | *fx_r_type = BFD_RELOC_C6000_PCR_S21; | |
2242 | else if (fldd->low_pos == 16 && fldd->width == 12) | |
2243 | *fx_r_type = BFD_RELOC_C6000_PCR_S12; | |
2244 | else if (fldd->low_pos == 13 && fldd->width == 10) | |
2245 | *fx_r_type = BFD_RELOC_C6000_PCR_S10; | |
2246 | else if (fldd->low_pos == 16 && fldd->width == 7) | |
2247 | *fx_r_type = BFD_RELOC_C6000_PCR_S7; | |
2248 | else | |
2249 | /* Opcode table should not use this encoding without a | |
2250 | known relocation. */ | |
2251 | abort (); | |
2252 | *fix_adda = FALSE; | |
2253 | break; | |
2254 | ||
2255 | case tic6x_coding_reg: | |
2256 | switch (operands[opno].form) | |
2257 | { | |
2258 | case TIC6X_OP_REG: | |
2259 | case TIC6X_OP_REGPAIR: | |
2260 | value = operands[opno].value.reg.num; | |
2261 | break; | |
2262 | ||
2263 | case TIC6X_OP_MEM_NOUNREG: | |
2264 | case TIC6X_OP_MEM_UNREG: | |
2265 | value = operands[opno].value.mem.base_reg.num; | |
2266 | break; | |
2267 | ||
2268 | default: | |
2269 | abort (); | |
2270 | } | |
2271 | break; | |
2272 | ||
2273 | case tic6x_coding_areg: | |
2274 | switch (operands[opno].form) | |
2275 | { | |
2276 | case TIC6X_OP_REG: | |
2277 | value = (operands[opno].value.reg.num == 15 ? 1 : 0); | |
2278 | break; | |
2279 | ||
2280 | case TIC6X_OP_MEM_NOUNREG: | |
2281 | value = (operands[opno].value.mem.base_reg.num == 15 ? 1 : 0); | |
2282 | break; | |
2283 | ||
2284 | default: | |
2285 | abort (); | |
2286 | } | |
2287 | break; | |
2288 | ||
2289 | case tic6x_coding_crlo: | |
2290 | if (operands[opno].form != TIC6X_OP_CTRL) | |
2291 | abort (); | |
2292 | value = tic6x_ctrl_table[operands[opno].value.ctrl].crlo; | |
2293 | break; | |
2294 | ||
2295 | case tic6x_coding_crhi: | |
2296 | if (operands[opno].form != TIC6X_OP_CTRL) | |
2297 | abort (); | |
2298 | value = 0; | |
2299 | break; | |
2300 | ||
2301 | case tic6x_coding_reg_shift: | |
2302 | if (operands[opno].form != TIC6X_OP_REGPAIR) | |
2303 | abort (); | |
2304 | value = operands[opno].value.reg.num >> 1; | |
2305 | break; | |
2306 | ||
2307 | case tic6x_coding_mem_offset: | |
2308 | if (operands[opno].form != TIC6X_OP_MEM_NOUNREG) | |
2309 | abort (); | |
2310 | mem = operands[opno].value.mem; | |
2311 | tic6x_default_mem_ref (&mem); | |
2312 | if (mem.offset_is_reg) | |
2313 | { | |
2314 | if (mem.scaled != tic6x_offset_scaled) | |
2315 | abort (); | |
2316 | value = mem.offset.reg.num; | |
2317 | } | |
2318 | else | |
2319 | { | |
2320 | int scale; | |
2321 | ||
2322 | if (mem.offset.exp.X_op != O_constant) | |
2323 | abort (); | |
2324 | switch (mem.scaled) | |
2325 | { | |
2326 | case tic6x_offset_scaled: | |
2327 | scale = 1; | |
2328 | break; | |
2329 | ||
2330 | case tic6x_offset_unscaled: | |
2331 | scale = opct->operand_info[opno].size; | |
2332 | if (scale != 1 && scale != 2 && scale != 4 && scale != 8) | |
2333 | abort (); | |
2334 | break; | |
2335 | ||
2336 | default: | |
2337 | abort (); | |
2338 | } | |
2339 | if (mem.offset.exp.X_add_number < 0 | |
2340 | || mem.offset.exp.X_add_number >= (1 << fldd->width) * scale) | |
2341 | { | |
2342 | if (print_errors) | |
2343 | as_bad (_("offset in operand %u of '%.*s' out of range"), | |
2344 | opno + 1, opc_len, str); | |
2345 | *ok = FALSE; | |
2346 | return 0; | |
2347 | } | |
2348 | if (mem.offset.exp.X_add_number % scale) | |
2349 | { | |
2350 | if (print_errors) | |
2351 | as_bad (_("offset in operand %u of '%.*s' not " | |
2352 | "divisible by %u"), | |
2353 | opno + 1, opc_len, str, scale); | |
2354 | *ok = FALSE; | |
2355 | return 0; | |
2356 | } | |
2357 | value = mem.offset.exp.X_add_number / scale; | |
2358 | } | |
2359 | break; | |
2360 | ||
2361 | case tic6x_coding_mem_offset_noscale: | |
2362 | if (operands[opno].form != TIC6X_OP_MEM_UNREG) | |
2363 | abort (); | |
2364 | mem = operands[opno].value.mem; | |
2365 | tic6x_default_mem_ref (&mem); | |
2366 | if (mem.offset_is_reg) | |
2367 | value = mem.offset.reg.num; | |
2368 | else | |
2369 | { | |
2370 | if (mem.offset.exp.X_op != O_constant) | |
2371 | abort (); | |
2372 | if (mem.offset.exp.X_add_number < 0 | |
2373 | || mem.offset.exp.X_add_number >= (1 << fldd->width)) | |
2374 | { | |
2375 | if (print_errors) | |
2376 | as_bad (_("offset in operand %u of '%.*s' out of range"), | |
2377 | opno + 1, opc_len, str); | |
2378 | *ok = FALSE; | |
2379 | return 0; | |
2380 | } | |
2381 | value = mem.offset.exp.X_add_number; | |
2382 | } | |
2383 | break; | |
2384 | ||
2385 | case tic6x_coding_mem_mode: | |
2386 | if (operands[opno].form != TIC6X_OP_MEM_NOUNREG | |
2387 | && operands[opno].form != TIC6X_OP_MEM_UNREG) | |
2388 | abort (); | |
2389 | mem = operands[opno].value.mem; | |
2390 | tic6x_default_mem_ref (&mem); | |
2391 | switch (mem.mod) | |
2392 | { | |
2393 | case tic6x_mem_mod_plus: | |
2394 | value = 1; | |
2395 | break; | |
2396 | ||
2397 | case tic6x_mem_mod_minus: | |
2398 | value = 0; | |
2399 | break; | |
2400 | ||
2401 | case tic6x_mem_mod_preinc: | |
2402 | value = 9; | |
2403 | break; | |
2404 | ||
2405 | case tic6x_mem_mod_predec: | |
2406 | value = 8; | |
2407 | break; | |
2408 | ||
2409 | case tic6x_mem_mod_postinc: | |
2410 | value = 11; | |
2411 | break; | |
2412 | ||
2413 | case tic6x_mem_mod_postdec: | |
2414 | value = 10; | |
2415 | break; | |
2416 | ||
2417 | default: | |
2418 | abort (); | |
2419 | } | |
2420 | value += (mem.offset_is_reg ? 4 : 0); | |
2421 | break; | |
2422 | ||
2423 | case tic6x_coding_scaled: | |
2424 | if (operands[opno].form != TIC6X_OP_MEM_UNREG) | |
2425 | abort (); | |
2426 | mem = operands[opno].value.mem; | |
2427 | tic6x_default_mem_ref (&mem); | |
2428 | switch (mem.scaled) | |
2429 | { | |
2430 | case tic6x_offset_unscaled: | |
2431 | value = 0; | |
2432 | break; | |
2433 | ||
2434 | case tic6x_offset_scaled: | |
2435 | value = 1; | |
2436 | break; | |
2437 | ||
2438 | default: | |
2439 | abort (); | |
2440 | } | |
2441 | break; | |
2442 | ||
2443 | case tic6x_coding_spmask: | |
2444 | /* The position of such a field is hardcoded in the handling | |
2445 | of "||^". */ | |
2446 | if (fldd->low_pos != 18) | |
2447 | abort (); | |
2448 | value = 0; | |
2449 | for (opno = 0; opno < num_operands; opno++) | |
2450 | { | |
2451 | unsigned int v; | |
2452 | ||
2453 | v = tic6x_encode_spmask (operands[opno].value.func_unit.base, | |
2454 | operands[opno].value.func_unit.side); | |
2455 | if (value & v) | |
2456 | { | |
2457 | if (print_errors) | |
2458 | as_bad (_("functional unit already masked for operand " | |
2459 | "%u of '%.*s'"), opno + 1, opc_len, str); | |
2460 | *ok = FALSE; | |
2461 | return 0; | |
2462 | } | |
2463 | value |= v; | |
2464 | } | |
2465 | break; | |
2466 | ||
2467 | case tic6x_coding_reg_unused: | |
2468 | /* This is a placeholder; correct handling goes along with | |
2469 | resource constraint checks. */ | |
2470 | value = 0; | |
2471 | break; | |
2472 | ||
2473 | case tic6x_coding_fstg: | |
2474 | case tic6x_coding_fcyc: | |
2475 | if (operands[opno].form != TIC6X_OP_EXP) | |
2476 | abort (); | |
2477 | if (operands[opno].value.exp.X_op != O_constant) | |
2478 | abort (); | |
2479 | if (!sploop_ii) | |
2480 | { | |
2481 | if (print_errors) | |
2482 | as_bad (_("'%.*s' instruction not in a software " | |
2483 | "pipelined loop"), | |
2484 | opc_len, str); | |
2485 | *ok = FALSE; | |
2486 | return 0; | |
2487 | } | |
2488 | ||
2489 | if (sploop_ii <= 1) | |
2490 | fcyc_bits = 0; | |
2491 | else if (sploop_ii <= 2) | |
2492 | fcyc_bits = 1; | |
2493 | else if (sploop_ii <= 4) | |
2494 | fcyc_bits = 2; | |
2495 | else if (sploop_ii <= 8) | |
2496 | fcyc_bits = 3; | |
2497 | else if (sploop_ii <= 14) | |
2498 | fcyc_bits = 4; | |
2499 | else | |
2500 | abort (); | |
2501 | if (fcyc_bits > fldd->width) | |
2502 | abort (); | |
2503 | ||
2504 | if (opct->variable_fields[fld].coding_method == tic6x_coding_fstg) | |
2505 | { | |
5d4c71e1 | 2506 | int i, t; |
40b36596 JM |
2507 | if (operands[opno].value.exp.X_add_number < 0 |
2508 | || (operands[opno].value.exp.X_add_number | |
2509 | >= (1 << (fldd->width - fcyc_bits)))) | |
2510 | { | |
2511 | if (print_errors) | |
2512 | as_bad (_("operand %u of '%.*s' out of range"), opno + 1, | |
2513 | opc_len, str); | |
2514 | *ok = FALSE; | |
2515 | return 0; | |
2516 | } | |
5d4c71e1 BS |
2517 | value = operands[opno].value.exp.X_add_number; |
2518 | for (t = 0, i = fcyc_bits; i < fldd->width; i++) | |
2519 | { | |
2520 | t = (t << 1) | (value & 1); | |
2521 | value >>= 1; | |
2522 | } | |
2523 | value = t << fcyc_bits; | |
40b36596 JM |
2524 | } |
2525 | else | |
2526 | { | |
2527 | if (operands[opno].value.exp.X_add_number < 0 | |
2528 | || (operands[opno].value.exp.X_add_number >= sploop_ii)) | |
2529 | { | |
2530 | if (print_errors) | |
2531 | as_bad (_("operand %u of '%.*s' out of range"), opno + 1, | |
2532 | opc_len, str); | |
2533 | *ok = FALSE; | |
2534 | return 0; | |
2535 | } | |
2536 | value = operands[opno].value.exp.X_add_number; | |
2537 | } | |
2538 | break; | |
2539 | ||
2540 | case tic6x_coding_fu: | |
2541 | value = func_unit_side == 2 ? 1 : 0; | |
2542 | break; | |
2543 | ||
2544 | case tic6x_coding_data_fu: | |
2545 | value = func_unit_data_side == 2 ? 1 : 0; | |
2546 | break; | |
2547 | ||
2548 | case tic6x_coding_xpath: | |
2549 | value = func_unit_cross; | |
2550 | break; | |
2551 | ||
2552 | default: | |
2553 | abort (); | |
2554 | } | |
2555 | ||
2556 | for (ffld = 0; ffld < opct->num_fixed_fields; ffld++) | |
2557 | if ((opct->fixed_fields[ffld].field_id | |
2558 | == opct->variable_fields[fld].field_id) | |
2559 | && (value < opct->fixed_fields[ffld].min_val | |
2560 | || value > opct->fixed_fields[ffld].max_val)) | |
2561 | { | |
2562 | if (print_errors) | |
2563 | as_bad (_("operand %u of '%.*s' out of range"), opno + 1, | |
2564 | opc_len, str); | |
2565 | *ok = FALSE; | |
2566 | return 0; | |
2567 | } | |
2568 | ||
2569 | opcode_value |= value << fldd->low_pos; | |
2570 | } | |
2571 | ||
2572 | if (this_line_creg) | |
2573 | { | |
2574 | const tic6x_insn_field *creg; | |
2575 | const tic6x_insn_field *z; | |
2576 | ||
2577 | creg = tic6x_field_from_fmt (fmt, tic6x_field_creg); | |
2578 | if (creg == NULL) | |
2579 | { | |
2580 | if (print_errors) | |
2581 | as_bad (_("instruction '%.*s' cannot be predicated"), | |
2582 | opc_len, str); | |
2583 | *ok = FALSE; | |
2584 | return 0; | |
2585 | } | |
2586 | z = tic6x_field_from_fmt (fmt, tic6x_field_z); | |
2587 | /* If there is a creg field, there must be a z field; otherwise | |
2588 | there is an error in the format table. */ | |
2589 | if (z == NULL) | |
2590 | abort (); | |
2591 | ||
2592 | opcode_value |= this_line_creg << creg->low_pos; | |
2593 | opcode_value |= this_line_z << z->low_pos; | |
2594 | } | |
2595 | ||
2596 | *ok = TRUE; | |
2597 | return opcode_value; | |
2598 | } | |
2599 | ||
2600 | /* Convert the target integer stored in N bytes in BUF to a host | |
2601 | integer, returning that value. */ | |
2602 | ||
2603 | static valueT | |
2604 | md_chars_to_number (char *buf, int n) | |
2605 | { | |
2606 | valueT result = 0; | |
2607 | unsigned char *p = (unsigned char *) buf; | |
2608 | ||
2609 | if (target_big_endian) | |
2610 | { | |
2611 | while (n--) | |
2612 | { | |
2613 | result <<= 8; | |
2614 | result |= (*p++ & 0xff); | |
2615 | } | |
2616 | } | |
2617 | else | |
2618 | { | |
2619 | while (n--) | |
2620 | { | |
2621 | result <<= 8; | |
2622 | result |= (p[n] & 0xff); | |
2623 | } | |
2624 | } | |
2625 | ||
2626 | return result; | |
2627 | } | |
2628 | ||
2629 | /* Assemble the instruction starting at STR (an opcode, with the | |
2630 | opcode name all-lowercase). */ | |
2631 | ||
2632 | void | |
2633 | md_assemble (char *str) | |
2634 | { | |
2635 | char *p; | |
2636 | int opc_len; | |
2637 | bfd_boolean this_line_parallel; | |
2638 | bfd_boolean this_line_spmask; | |
2639 | unsigned int this_line_creg; | |
2640 | unsigned int this_line_z; | |
d99e5b39 | 2641 | tic6x_label_list *this_insn_label_list; |
40b36596 JM |
2642 | segment_info_type *seginfo; |
2643 | tic6x_opcode_list *opc_list, *opc; | |
2644 | tic6x_func_unit_base func_unit_base = tic6x_func_unit_nfu; | |
2645 | unsigned int func_unit_side = 0; | |
2646 | unsigned int func_unit_cross = 0; | |
2647 | unsigned int cross_side = 0; | |
2648 | unsigned int func_unit_data_side = 0; | |
2649 | unsigned int max_matching_opcodes, num_matching_opcodes; | |
2650 | tic6x_opcode_id *opcm = NULL; | |
2651 | unsigned int opc_rank[TIC6X_NUM_PREFER]; | |
2652 | const tic6x_opcode *opct = NULL; | |
2653 | int min_rank, try_rank, max_rank; | |
2654 | bfd_boolean num_operands_permitted[TIC6X_MAX_SOURCE_OPERANDS + 1] | |
2655 | = { FALSE }; | |
2656 | unsigned int operand_forms[TIC6X_MAX_SOURCE_OPERANDS] = { 0 }; | |
2657 | tic6x_operand operands[TIC6X_MAX_SOURCE_OPERANDS]; | |
2658 | unsigned int max_num_operands; | |
2659 | unsigned int num_operands_read; | |
2660 | bfd_boolean ok_this_arch, ok_this_fu, ok_this_arch_fu; | |
2661 | bfd_boolean bad_operands = FALSE; | |
2662 | unsigned int opcode_value; | |
2663 | bfd_boolean encoded_ok; | |
2664 | bfd_boolean fix_needed = FALSE; | |
2665 | expressionS *fix_exp = NULL; | |
2666 | int fix_pcrel = 0; | |
2667 | bfd_reloc_code_real_type fx_r_type = BFD_RELOC_UNUSED; | |
2668 | bfd_boolean fix_adda = FALSE; | |
d99e5b39 | 2669 | fragS *insn_frag; |
40b36596 JM |
2670 | char *output; |
2671 | ||
2672 | p = str; | |
2673 | while (*p && !is_end_of_line[(unsigned char) *p] && *p != ' ') | |
2674 | p++; | |
2675 | ||
2676 | /* This function should only have been called when there is actually | |
2677 | an instruction to assemble. */ | |
2678 | if (p == str) | |
2679 | abort (); | |
2680 | ||
59e6276b JM |
2681 | /* Now an instruction has been seen, architecture attributes from |
2682 | .arch directives merge with rather than overriding the previous | |
2683 | value. */ | |
2684 | tic6x_seen_insns = TRUE; | |
2685 | /* If no .arch directives or -march options have been seen, we are | |
2686 | assessing instruction validity based on the C674X default, so set | |
2687 | the attribute accordingly. */ | |
75fa6dc1 JM |
2688 | if (tic6x_arch_attribute == C6XABI_Tag_ISA_none) |
2689 | tic6x_arch_attribute = C6XABI_Tag_ISA_C674X; | |
59e6276b | 2690 | |
40b36596 JM |
2691 | /* Reset global settings for parallel bars and predicates now to |
2692 | avoid extra errors if there are problems with this opcode. */ | |
2693 | this_line_parallel = tic6x_line_parallel; | |
2694 | this_line_spmask = tic6x_line_spmask; | |
2695 | this_line_creg = tic6x_line_creg; | |
2696 | this_line_z = tic6x_line_z; | |
2697 | tic6x_line_parallel = FALSE; | |
2698 | tic6x_line_spmask = FALSE; | |
2699 | tic6x_line_creg = 0; | |
2700 | tic6x_line_z = 0; | |
2701 | seginfo = seg_info (now_seg); | |
d99e5b39 JM |
2702 | this_insn_label_list = seginfo->tc_segment_info_data.label_list; |
2703 | seginfo->tc_segment_info_data.label_list = NULL; | |
40b36596 JM |
2704 | |
2705 | opc_list = hash_find_n (opcode_hash, str, p - str); | |
2706 | if (opc_list == NULL) | |
2707 | { | |
2708 | char c = *p; | |
2709 | *p = 0; | |
2710 | as_bad (_("unknown opcode '%s'"), str); | |
2711 | *p = c; | |
2712 | return; | |
2713 | } | |
2714 | ||
2715 | opc_len = p - str; | |
2716 | skip_whitespace (p); | |
2717 | ||
2718 | /* See if there is something that looks like a functional unit | |
2719 | specifier. */ | |
2720 | if (*p == '.') | |
2721 | { | |
2722 | bfd_boolean good_func_unit; | |
2723 | tic6x_func_unit_base maybe_base = tic6x_func_unit_nfu; | |
2724 | unsigned int maybe_side = 0; | |
2725 | unsigned int maybe_cross = 0; | |
2726 | unsigned int maybe_data_side = 0; | |
2727 | ||
2728 | good_func_unit = tic6x_parse_func_unit_base (p + 1, &maybe_base, | |
2729 | &maybe_side); | |
2730 | ||
2731 | if (good_func_unit) | |
2732 | { | |
2733 | if (p[3] == ' ' || is_end_of_line[(unsigned char) p[3]]) | |
2734 | p += 3; | |
2735 | else if ((p[3] == 'x' || p[3] == 'X') | |
2736 | && (p[4] == ' ' || is_end_of_line[(unsigned char) p[4]])) | |
2737 | { | |
2738 | maybe_cross = 1; | |
2739 | p += 4; | |
2740 | } | |
2741 | else if (maybe_base == tic6x_func_unit_d | |
2742 | && (p[3] == 't' || p[3] == 'T') | |
2743 | && (p[4] == '1' || p[4] == '2') | |
2744 | && (p[5] == ' ' || is_end_of_line[(unsigned char) p[5]])) | |
2745 | { | |
2746 | maybe_data_side = p[4] - '0'; | |
2747 | p += 5; | |
2748 | } | |
2749 | else | |
2750 | good_func_unit = FALSE; | |
2751 | } | |
2752 | ||
2753 | if (good_func_unit) | |
2754 | { | |
2755 | func_unit_base = maybe_base; | |
2756 | func_unit_side = maybe_side; | |
2757 | func_unit_cross = maybe_cross; | |
2758 | cross_side = (func_unit_cross ? 3 - func_unit_side : func_unit_side); | |
2759 | func_unit_data_side = maybe_data_side; | |
2760 | } | |
2761 | ||
2762 | skip_whitespace (p); | |
2763 | } | |
2764 | ||
2765 | /* Determine which entries in the opcode table match, and the | |
2766 | associated permitted forms of operands. */ | |
2767 | max_matching_opcodes = 0; | |
2768 | for (opc = opc_list; opc; opc = opc->next) | |
2769 | max_matching_opcodes++; | |
2770 | num_matching_opcodes = 0; | |
2771 | opcm = xmalloc (max_matching_opcodes * sizeof (*opcm)); | |
2772 | max_num_operands = 0; | |
2773 | ok_this_arch = FALSE; | |
2774 | ok_this_fu = FALSE; | |
2775 | ok_this_arch_fu = FALSE; | |
2776 | for (opc = opc_list; opc; opc = opc->next) | |
2777 | { | |
2778 | unsigned int num_operands; | |
2779 | unsigned int i; | |
2780 | bfd_boolean this_opc_arch_ok = TRUE; | |
2781 | bfd_boolean this_opc_fu_ok = TRUE; | |
2782 | ||
2783 | if (tic6x_insn_format_table[tic6x_opcode_table[opc->id].format].num_bits | |
2784 | != 32) | |
2785 | continue; | |
2786 | if (!(tic6x_opcode_table[opc->id].isa_variants & tic6x_features)) | |
2787 | this_opc_arch_ok = FALSE; | |
2788 | if (tic6x_opcode_table[opc->id].func_unit != func_unit_base) | |
2789 | this_opc_fu_ok = FALSE; | |
2790 | if (func_unit_side == 1 | |
2791 | && (tic6x_opcode_table[opc->id].flags & TIC6X_FLAG_SIDE_B_ONLY)) | |
2792 | this_opc_fu_ok = FALSE; | |
2793 | if (func_unit_cross | |
2794 | && (tic6x_opcode_table[opc->id].flags & TIC6X_FLAG_NO_CROSS)) | |
2795 | this_opc_fu_ok = FALSE; | |
2796 | if (!func_unit_data_side | |
2797 | && (tic6x_opcode_table[opc->id].flags | |
2798 | & (TIC6X_FLAG_LOAD | TIC6X_FLAG_STORE))) | |
2799 | this_opc_fu_ok = FALSE; | |
2800 | if (func_unit_data_side | |
2801 | && !(tic6x_opcode_table[opc->id].flags | |
2802 | & (TIC6X_FLAG_LOAD | TIC6X_FLAG_STORE))) | |
2803 | this_opc_fu_ok = FALSE; | |
2804 | if (func_unit_data_side == 1 | |
2805 | && (tic6x_opcode_table[opc->id].flags & TIC6X_FLAG_SIDE_T2_ONLY)) | |
2806 | this_opc_fu_ok = FALSE; | |
2807 | if (this_opc_arch_ok) | |
2808 | ok_this_arch = TRUE; | |
2809 | if (this_opc_fu_ok) | |
2810 | ok_this_fu = TRUE; | |
2811 | if (!this_opc_arch_ok || !this_opc_fu_ok) | |
2812 | continue; | |
2813 | ok_this_arch_fu = TRUE; | |
2814 | opcm[num_matching_opcodes] = opc->id; | |
2815 | num_matching_opcodes++; | |
2816 | num_operands = tic6x_opcode_table[opc->id].num_operands; | |
2817 | ||
2818 | if (tic6x_opcode_table[opc->id].flags & TIC6X_FLAG_SPMASK) | |
2819 | { | |
2820 | if (num_operands != 1 | |
2821 | || (tic6x_opcode_table[opc->id].operand_info[0].form | |
2822 | != tic6x_operand_func_unit)) | |
2823 | abort (); | |
2824 | num_operands = 8; | |
2825 | for (i = 0; i < num_operands; i++) | |
2826 | { | |
2827 | operand_forms[i] | |
2828 | |= tic6x_coarse_operand_form (tic6x_operand_func_unit); | |
2829 | num_operands_permitted[i] = TRUE; | |
2830 | } | |
2831 | } | |
2832 | else | |
2833 | { | |
2834 | for (i = 0; i < num_operands; i++) | |
2835 | { | |
2836 | tic6x_operand_form f | |
2837 | = tic6x_opcode_table[opc->id].operand_info[i].form; | |
2838 | ||
2839 | operand_forms[i] |= tic6x_coarse_operand_form (f); | |
2840 | } | |
2841 | } | |
2842 | num_operands_permitted[num_operands] = TRUE; | |
2843 | if (num_operands > max_num_operands) | |
2844 | max_num_operands = num_operands; | |
2845 | } | |
2846 | ||
2847 | if (!ok_this_arch) | |
2848 | { | |
2849 | as_bad (_("'%.*s' instruction not supported on this architecture"), | |
2850 | opc_len, str); | |
2851 | free (opcm); | |
2852 | return; | |
2853 | } | |
2854 | ||
2855 | if (!ok_this_fu) | |
2856 | { | |
2857 | as_bad (_("'%.*s' instruction not supported on this functional unit"), | |
2858 | opc_len, str); | |
2859 | free (opcm); | |
2860 | return; | |
2861 | } | |
2862 | ||
2863 | if (!ok_this_arch_fu) | |
2864 | { | |
2865 | as_bad (_("'%.*s' instruction not supported on this functional unit" | |
2866 | " for this architecture"), | |
2867 | opc_len, str); | |
2868 | free (opcm); | |
2869 | return; | |
2870 | } | |
2871 | ||
2872 | /* If there were no instructions matching the above availability | |
2873 | checks, we should now have given an error and returned. */ | |
2874 | if (num_matching_opcodes == 0) | |
2875 | abort (); | |
2876 | ||
2877 | num_operands_read = 0; | |
2878 | while (TRUE) | |
2879 | { | |
2880 | skip_whitespace (p); | |
2881 | if (is_end_of_line[(unsigned char) *p]) | |
2882 | { | |
2883 | if (num_operands_read > 0) | |
2884 | { | |
2885 | as_bad (_("missing operand after comma")); | |
2886 | bad_operands = TRUE; | |
2887 | } | |
2888 | break; | |
2889 | } | |
2890 | ||
2891 | if (max_num_operands == 0) | |
2892 | { | |
2893 | as_bad (_("too many operands to '%.*s'"), opc_len, str); | |
2894 | bad_operands = TRUE; | |
2895 | break; | |
2896 | } | |
2897 | ||
2898 | if (!tic6x_parse_operand (&p, &operands[num_operands_read], | |
2899 | operand_forms[num_operands_read], str, opc_len, | |
2900 | num_operands_read + 1)) | |
2901 | bad_operands = TRUE; | |
2902 | num_operands_read++; | |
2903 | ||
2904 | if (is_end_of_line[(unsigned char) *p]) | |
2905 | break; | |
2906 | else if (*p == ',') | |
2907 | { | |
2908 | p++; | |
2909 | if (num_operands_read == max_num_operands) | |
2910 | { | |
2911 | as_bad (_("too many operands to '%.*s'"), opc_len, str); | |
2912 | bad_operands = TRUE; | |
2913 | break; | |
2914 | } | |
2915 | continue; | |
2916 | } | |
2917 | else | |
2918 | /* Operand parsing should consume whole operands. */ | |
2919 | abort (); | |
2920 | } | |
2921 | ||
2922 | if (!bad_operands && !num_operands_permitted[num_operands_read]) | |
2923 | { | |
2924 | as_bad (_("bad number of operands to '%.*s'"), opc_len, str); | |
2925 | bad_operands = TRUE; | |
2926 | } | |
2927 | ||
2928 | if (!bad_operands) | |
2929 | { | |
2930 | /* Each operand is of the right syntactic form for some opcode | |
2931 | choice, and the number of operands is valid. Check that each | |
2932 | operand is OK in detail for some opcode choice with the right | |
2933 | number of operands. */ | |
2934 | unsigned int i; | |
2935 | ||
2936 | for (i = 0; i < num_operands_read; i++) | |
2937 | { | |
2938 | bfd_boolean coarse_ok = FALSE; | |
2939 | bfd_boolean fine_ok = FALSE; | |
2940 | tic6x_operand_match fine_failure = tic6x_match_matches; | |
2941 | unsigned int j; | |
2942 | ||
2943 | for (j = 0; j < num_matching_opcodes; j++) | |
2944 | { | |
2945 | tic6x_operand_form f; | |
2946 | tic6x_rw rw; | |
2947 | unsigned int cf; | |
2948 | tic6x_operand_match this_fine_failure; | |
2949 | ||
2950 | if (tic6x_opcode_table[opcm[j]].flags & TIC6X_FLAG_SPMASK) | |
2951 | { | |
2952 | f = tic6x_operand_func_unit; | |
2953 | rw = tic6x_rw_none; | |
2954 | } | |
2955 | else | |
2956 | { | |
2957 | if (tic6x_opcode_table[opcm[j]].num_operands | |
2958 | != num_operands_read) | |
2959 | continue; | |
2960 | ||
2961 | f = tic6x_opcode_table[opcm[j]].operand_info[i].form; | |
2962 | rw = tic6x_opcode_table[opcm[j]].operand_info[i].rw; | |
2963 | } | |
2964 | cf = tic6x_coarse_operand_form (f); | |
2965 | ||
2966 | if (operands[i].form != cf) | |
2967 | continue; | |
2968 | ||
2969 | coarse_ok = TRUE; | |
2970 | this_fine_failure | |
2971 | = tic6x_operand_matches_form (&operands[i], f, rw, | |
2972 | func_unit_side, | |
2973 | cross_side, | |
2974 | func_unit_data_side); | |
2975 | if (this_fine_failure == tic6x_match_matches) | |
2976 | { | |
2977 | fine_ok = TRUE; | |
2978 | break; | |
2979 | } | |
2980 | if (fine_failure == tic6x_match_matches | |
2981 | || fine_failure > this_fine_failure) | |
2982 | fine_failure = this_fine_failure; | |
2983 | } | |
2984 | ||
2985 | /* No instructions should have operand syntactic forms only | |
2986 | acceptable with certain numbers of operands, so no | |
2987 | diagnostic for this case. */ | |
2988 | if (!coarse_ok) | |
2989 | abort (); | |
2990 | ||
2991 | if (!fine_ok) | |
2992 | { | |
2993 | switch (fine_failure) | |
2994 | { | |
2995 | case tic6x_match_non_const: | |
2996 | as_bad (_("operand %u of '%.*s' not constant"), | |
2997 | i + 1, opc_len, str); | |
2998 | break; | |
2999 | ||
3000 | case tic6x_match_wrong_side: | |
3001 | as_bad (_("operand %u of '%.*s' on wrong side"), | |
3002 | i + 1, opc_len, str); | |
3003 | break; | |
3004 | ||
3005 | case tic6x_match_bad_return: | |
3006 | as_bad (_("operand %u of '%.*s' not a valid return " | |
3007 | "address register"), | |
3008 | i + 1, opc_len, str); | |
3009 | break; | |
3010 | ||
3011 | case tic6x_match_ctrl_write_only: | |
3012 | as_bad (_("operand %u of '%.*s' is write-only"), | |
3013 | i + 1, opc_len, str); | |
3014 | break; | |
3015 | ||
3016 | case tic6x_match_ctrl_read_only: | |
3017 | as_bad (_("operand %u of '%.*s' is read-only"), | |
3018 | i + 1, opc_len, str); | |
3019 | break; | |
3020 | ||
3021 | case tic6x_match_bad_mem: | |
3022 | as_bad (_("operand %u of '%.*s' not a valid memory " | |
3023 | "reference"), | |
3024 | i + 1, opc_len, str); | |
3025 | break; | |
3026 | ||
3027 | case tic6x_match_bad_address: | |
3028 | as_bad (_("operand %u of '%.*s' not a valid base " | |
3029 | "address register"), | |
3030 | i + 1, opc_len, str); | |
3031 | break; | |
3032 | ||
3033 | default: | |
3034 | abort (); | |
3035 | } | |
3036 | bad_operands = TRUE; | |
3037 | break; | |
3038 | } | |
3039 | } | |
3040 | } | |
3041 | ||
3042 | if (!bad_operands) | |
3043 | { | |
3044 | /* Each operand is OK for some opcode choice, and the number of | |
3045 | operands is valid. Check whether there is an opcode choice | |
3046 | for which all operands are simultaneously valid. */ | |
3047 | unsigned int i; | |
3048 | bfd_boolean found_match = FALSE; | |
3049 | ||
3050 | for (i = 0; i < TIC6X_NUM_PREFER; i++) | |
3051 | opc_rank[i] = (unsigned int) -1; | |
3052 | ||
3053 | min_rank = TIC6X_NUM_PREFER - 1; | |
3054 | max_rank = 0; | |
3055 | ||
3056 | for (i = 0; i < num_matching_opcodes; i++) | |
3057 | { | |
3058 | unsigned int j; | |
3059 | bfd_boolean this_matches = TRUE; | |
3060 | ||
3061 | if (!(tic6x_opcode_table[opcm[i]].flags & TIC6X_FLAG_SPMASK) | |
3062 | && tic6x_opcode_table[opcm[i]].num_operands != num_operands_read) | |
3063 | continue; | |
3064 | ||
3065 | for (j = 0; j < num_operands_read; j++) | |
3066 | { | |
3067 | tic6x_operand_form f; | |
3068 | tic6x_rw rw; | |
3069 | ||
3070 | if (tic6x_opcode_table[opcm[i]].flags & TIC6X_FLAG_SPMASK) | |
3071 | { | |
3072 | f = tic6x_operand_func_unit; | |
3073 | rw = tic6x_rw_none; | |
3074 | } | |
3075 | else | |
3076 | { | |
3077 | f = tic6x_opcode_table[opcm[i]].operand_info[j].form; | |
3078 | rw = tic6x_opcode_table[opcm[i]].operand_info[j].rw; | |
3079 | } | |
3080 | if (tic6x_operand_matches_form (&operands[j], f, rw, | |
3081 | func_unit_side, | |
3082 | cross_side, | |
3083 | func_unit_data_side) | |
3084 | != tic6x_match_matches) | |
3085 | { | |
3086 | this_matches = FALSE; | |
3087 | break; | |
3088 | } | |
3089 | } | |
3090 | ||
3091 | if (this_matches) | |
3092 | { | |
3093 | int rank = TIC6X_PREFER_VAL (tic6x_opcode_table[opcm[i]].flags); | |
3094 | ||
3095 | if (rank < min_rank) | |
3096 | min_rank = rank; | |
3097 | if (rank > max_rank) | |
3098 | max_rank = rank; | |
3099 | ||
3100 | if (opc_rank[rank] == (unsigned int) -1) | |
3101 | opc_rank[rank] = i; | |
3102 | else | |
3103 | /* The opcode table should provide a total ordering | |
3104 | for all cases where multiple matches may get | |
3105 | here. */ | |
3106 | abort (); | |
3107 | ||
3108 | found_match = TRUE; | |
3109 | } | |
3110 | } | |
3111 | ||
3112 | if (!found_match) | |
3113 | { | |
3114 | as_bad (_("bad operand combination for '%.*s'"), opc_len, str); | |
3115 | bad_operands = TRUE; | |
3116 | } | |
3117 | } | |
3118 | ||
3119 | if (bad_operands) | |
3120 | { | |
3121 | free (opcm); | |
3122 | return; | |
3123 | } | |
3124 | ||
3125 | opcode_value = 0; | |
3126 | encoded_ok = FALSE; | |
3127 | for (try_rank = max_rank; try_rank >= min_rank; try_rank--) | |
3128 | { | |
3129 | fix_needed = FALSE; | |
3130 | ||
3131 | if (opc_rank[try_rank] == (unsigned int) -1) | |
3132 | continue; | |
3133 | ||
3134 | opcode_value = tic6x_try_encode (opcm[opc_rank[try_rank]], operands, | |
3135 | num_operands_read, this_line_creg, | |
3136 | this_line_z, func_unit_side, | |
3137 | func_unit_cross, func_unit_data_side, | |
3138 | seginfo->tc_segment_info_data.sploop_ii, | |
3139 | &fix_exp, &fix_pcrel, &fx_r_type, | |
3140 | &fix_adda, &fix_needed, &encoded_ok, | |
3141 | (try_rank == min_rank ? TRUE : FALSE), | |
3142 | str, opc_len); | |
3143 | if (encoded_ok) | |
3144 | { | |
3145 | opct = &tic6x_opcode_table[opcm[opc_rank[try_rank]]]; | |
3146 | break; | |
3147 | } | |
3148 | } | |
3149 | ||
3150 | free (opcm); | |
3151 | ||
3152 | if (!encoded_ok) | |
3153 | return; | |
3154 | ||
3155 | if (this_line_parallel) | |
3156 | { | |
d99e5b39 JM |
3157 | insn_frag = seginfo->tc_segment_info_data.execute_packet_frag; |
3158 | if (insn_frag == NULL) | |
40b36596 JM |
3159 | { |
3160 | as_bad (_("parallel instruction not following another instruction")); | |
3161 | return; | |
3162 | } | |
3163 | ||
d99e5b39 | 3164 | if (insn_frag->fr_fix >= 32) |
40b36596 JM |
3165 | { |
3166 | as_bad (_("too many instructions in execute packet")); | |
3167 | return; | |
3168 | } | |
3169 | ||
d99e5b39 | 3170 | if (this_insn_label_list != NULL) |
40b36596 JM |
3171 | as_bad (_("label not at start of execute packet")); |
3172 | ||
3173 | if (opct->flags & TIC6X_FLAG_FIRST) | |
3174 | as_bad (_("'%.*s' instruction not at start of execute packet"), | |
3175 | opc_len, str); | |
3176 | ||
3177 | *seginfo->tc_segment_info_data.last_insn_lsb |= 0x1; | |
d99e5b39 | 3178 | output = insn_frag->fr_literal + insn_frag->fr_fix; |
40b36596 JM |
3179 | } |
3180 | else | |
3181 | { | |
d99e5b39 JM |
3182 | tic6x_label_list *l; |
3183 | ||
40b36596 | 3184 | seginfo->tc_segment_info_data.spmask_addr = NULL; |
38bd8d09 | 3185 | seginfo->tc_segment_info_data.func_units_used = 0; |
d99e5b39 JM |
3186 | |
3187 | /* Start a new frag for this execute packet. */ | |
3188 | if (frag_now_fix () != 0) | |
3189 | { | |
3190 | if (frag_now->fr_type != rs_machine_dependent) | |
3191 | frag_wane (frag_now); | |
3192 | ||
3193 | frag_new (0); | |
3194 | } | |
3195 | frag_grow (32); | |
3196 | insn_frag = seginfo->tc_segment_info_data.execute_packet_frag = frag_now; | |
3197 | for (l = this_insn_label_list; l; l = l->next) | |
3198 | { | |
3199 | symbol_set_frag (l->label, frag_now); | |
3200 | S_SET_VALUE (l->label, 0); | |
3201 | S_SET_SEGMENT (l->label, now_seg); | |
3202 | } | |
3203 | tic6x_free_label_list (this_insn_label_list); | |
3204 | dwarf2_emit_insn (0); | |
3205 | output = frag_var (rs_machine_dependent, 32, 32, 0, NULL, 0, NULL); | |
3206 | /* This must be the same as the frag to which a pointer was just | |
3207 | saved. */ | |
3208 | if (output != insn_frag->fr_literal) | |
3209 | abort (); | |
3210 | insn_frag->tc_frag_data.is_insns = TRUE; | |
3211 | insn_frag->tc_frag_data.can_cross_fp_boundary | |
3212 | = tic6x_can_cross_fp_boundary; | |
40b36596 JM |
3213 | } |
3214 | ||
38bd8d09 JM |
3215 | if (func_unit_base != tic6x_func_unit_nfu) |
3216 | { | |
3217 | unsigned int func_unit_enc; | |
3218 | ||
3219 | func_unit_enc = tic6x_encode_spmask (func_unit_base, func_unit_side); | |
3220 | ||
3221 | if (seginfo->tc_segment_info_data.func_units_used & func_unit_enc) | |
3222 | as_bad (_("functional unit already used in this execute packet")); | |
3223 | ||
3224 | seginfo->tc_segment_info_data.func_units_used |= func_unit_enc; | |
3225 | } | |
3226 | ||
40b36596 JM |
3227 | if (opct->flags & TIC6X_FLAG_SPLOOP) |
3228 | { | |
3229 | if (seginfo->tc_segment_info_data.sploop_ii) | |
3230 | as_bad (_("nested software pipelined loop")); | |
3231 | if (num_operands_read != 1 | |
3232 | || operands[0].form != TIC6X_OP_EXP | |
3233 | || operands[0].value.exp.X_op != O_constant) | |
3234 | abort (); | |
3235 | seginfo->tc_segment_info_data.sploop_ii | |
3236 | = operands[0].value.exp.X_add_number; | |
3237 | } | |
3238 | else if (opct->flags & TIC6X_FLAG_SPKERNEL) | |
3239 | { | |
3240 | if (!seginfo->tc_segment_info_data.sploop_ii) | |
3241 | as_bad (_("'%.*s' instruction not in a software pipelined loop"), | |
3242 | opc_len, str); | |
3243 | seginfo->tc_segment_info_data.sploop_ii = 0; | |
3244 | } | |
3245 | ||
3246 | if (this_line_spmask) | |
3247 | { | |
3248 | if (seginfo->tc_segment_info_data.spmask_addr == NULL) | |
3249 | as_bad (_("'||^' without previous SPMASK")); | |
3250 | else if (func_unit_base == tic6x_func_unit_nfu) | |
3251 | as_bad (_("cannot mask instruction using no functional unit")); | |
3252 | else | |
3253 | { | |
3254 | unsigned int spmask_opcode; | |
3255 | unsigned int mask_bit; | |
3256 | ||
3257 | spmask_opcode | |
3258 | = md_chars_to_number (seginfo->tc_segment_info_data.spmask_addr, | |
3259 | 4); | |
3260 | mask_bit = tic6x_encode_spmask (func_unit_base, func_unit_side); | |
3261 | mask_bit <<= 18; | |
3262 | if (spmask_opcode & mask_bit) | |
3263 | as_bad (_("functional unit already masked")); | |
3264 | spmask_opcode |= mask_bit; | |
3265 | md_number_to_chars (seginfo->tc_segment_info_data.spmask_addr, | |
3266 | spmask_opcode, 4); | |
3267 | } | |
3268 | } | |
3269 | ||
3270 | record_alignment (now_seg, 5); | |
40b36596 JM |
3271 | md_number_to_chars (output, opcode_value, 4); |
3272 | if (fix_needed) | |
d99e5b39 | 3273 | tic6x_fix_new_exp (insn_frag, output - insn_frag->fr_literal, 4, fix_exp, |
40b36596 | 3274 | fix_pcrel, fx_r_type, fix_adda); |
d99e5b39 JM |
3275 | insn_frag->fr_fix += 4; |
3276 | insn_frag->fr_var -= 4; | |
40b36596 JM |
3277 | seginfo->tc_segment_info_data.last_insn_lsb |
3278 | = (target_big_endian ? output + 3 : output); | |
3279 | if (opct->flags & TIC6X_FLAG_SPMASK) | |
3280 | seginfo->tc_segment_info_data.spmask_addr = output; | |
40b36596 JM |
3281 | } |
3282 | ||
3283 | /* Modify NEWVAL (32-bit) by inserting VALUE, shifted right by SHIFT | |
3284 | and the least significant BITS bits taken, at position POS. */ | |
3285 | #define MODIFY_VALUE(NEWVAL, VALUE, SHIFT, POS, BITS) \ | |
3286 | do { \ | |
3287 | (NEWVAL) &= 0xffffffffU & ~(((1U << (BITS)) - 1) << (POS)); \ | |
3288 | (NEWVAL) |= (((VALUE) >> (SHIFT)) & ((1U << (BITS)) - 1)) << (POS); \ | |
3289 | } while (0) | |
3290 | ||
3291 | /* Apply a fixup to the object file. */ | |
3292 | ||
3293 | void | |
3294 | md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) | |
3295 | { | |
3296 | offsetT value = *valP; | |
3297 | char *buf = fixP->fx_where + fixP->fx_frag->fr_literal; | |
3298 | ||
3299 | value = SEXT (value); | |
3300 | *valP = value; | |
3301 | ||
3302 | fixP->fx_offset = SEXT (fixP->fx_offset); | |
3303 | ||
3304 | if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0) | |
3305 | fixP->fx_done = 1; | |
3306 | ||
3307 | /* We do our own overflow checks. */ | |
3308 | fixP->fx_no_overflow = 1; | |
3309 | ||
3310 | switch (fixP->fx_r_type) | |
3311 | { | |
3312 | case BFD_RELOC_NONE: | |
3313 | /* Force output to the object file. */ | |
3314 | fixP->fx_done = 0; | |
3315 | break; | |
3316 | ||
3317 | case BFD_RELOC_32: | |
3318 | if (fixP->fx_done || !seg->use_rela_p) | |
3319 | md_number_to_chars (buf, value, 4); | |
3320 | break; | |
3321 | ||
3322 | case BFD_RELOC_16: | |
3323 | if (fixP->fx_done || !seg->use_rela_p) | |
3324 | { | |
3325 | if (value < -0x8000 || value > 0xffff) | |
3326 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
3327 | _("value too large for 2-byte field")); | |
3328 | md_number_to_chars (buf, value, 2); | |
3329 | } | |
3330 | break; | |
3331 | ||
3332 | case BFD_RELOC_8: | |
3333 | if (fixP->fx_done || !seg->use_rela_p) | |
3334 | { | |
3335 | if (value < -0x80 || value > 0xff) | |
3336 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
3337 | _("value too large for 1-byte field")); | |
3338 | md_number_to_chars (buf, value, 1); | |
3339 | } | |
3340 | break; | |
3341 | ||
3342 | case BFD_RELOC_C6000_ABS_S16: | |
3343 | case BFD_RELOC_C6000_ABS_L16: | |
3344 | case BFD_RELOC_C6000_SBR_S16: | |
3345 | case BFD_RELOC_C6000_SBR_L16_B: | |
3346 | case BFD_RELOC_C6000_SBR_L16_H: | |
3347 | case BFD_RELOC_C6000_SBR_L16_W: | |
3348 | case BFD_RELOC_C6000_SBR_GOT_L16_W: | |
3349 | if (fixP->fx_done || !seg->use_rela_p) | |
3350 | { | |
3351 | offsetT newval = md_chars_to_number (buf, 4); | |
41820509 JM |
3352 | int shift; |
3353 | ||
3354 | switch (fixP->fx_r_type) | |
3355 | { | |
3356 | case BFD_RELOC_C6000_SBR_L16_H: | |
3357 | shift = 1; | |
3358 | break; | |
3359 | ||
3360 | case BFD_RELOC_C6000_SBR_L16_W: | |
3361 | case BFD_RELOC_C6000_SBR_GOT_L16_W: | |
3362 | shift = 2; | |
3363 | break; | |
3364 | ||
3365 | default: | |
3366 | shift = 0; | |
3367 | break; | |
3368 | } | |
40b36596 | 3369 | |
41820509 | 3370 | MODIFY_VALUE (newval, value, shift, 7, 16); |
40b36596 JM |
3371 | if ((value < -0x8000 || value > 0x7fff) |
3372 | && (fixP->fx_r_type == BFD_RELOC_C6000_ABS_S16 | |
3373 | || fixP->fx_r_type == BFD_RELOC_C6000_SBR_S16)) | |
3374 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
3375 | _("immediate offset out of range")); | |
3376 | ||
3377 | md_number_to_chars (buf, newval, 4); | |
3378 | } | |
3379 | if (fixP->fx_done | |
3380 | && fixP->fx_r_type != BFD_RELOC_C6000_ABS_S16 | |
3381 | && fixP->fx_r_type != BFD_RELOC_C6000_ABS_L16) | |
3382 | abort (); | |
3383 | break; | |
3384 | ||
3385 | case BFD_RELOC_C6000_ABS_H16: | |
3386 | case BFD_RELOC_C6000_SBR_H16_B: | |
3387 | case BFD_RELOC_C6000_SBR_H16_H: | |
3388 | case BFD_RELOC_C6000_SBR_H16_W: | |
3389 | case BFD_RELOC_C6000_SBR_GOT_H16_W: | |
3390 | if (fixP->fx_done || !seg->use_rela_p) | |
3391 | { | |
3392 | offsetT newval = md_chars_to_number (buf, 4); | |
41820509 JM |
3393 | int shift; |
3394 | ||
3395 | switch (fixP->fx_r_type) | |
3396 | { | |
3397 | case BFD_RELOC_C6000_SBR_H16_H: | |
3398 | shift = 17; | |
3399 | break; | |
3400 | ||
3401 | case BFD_RELOC_C6000_SBR_H16_W: | |
3402 | case BFD_RELOC_C6000_SBR_GOT_H16_W: | |
3403 | shift = 18; | |
3404 | break; | |
40b36596 | 3405 | |
41820509 JM |
3406 | default: |
3407 | shift = 16; | |
3408 | break; | |
3409 | } | |
3410 | ||
3411 | MODIFY_VALUE (newval, value, shift, 7, 16); | |
40b36596 JM |
3412 | |
3413 | md_number_to_chars (buf, newval, 4); | |
3414 | } | |
3415 | if (fixP->fx_done && fixP->fx_r_type != BFD_RELOC_C6000_ABS_H16) | |
3416 | abort (); | |
3417 | break; | |
3418 | ||
3419 | case BFD_RELOC_C6000_SBR_U15_B: | |
3420 | if (fixP->fx_done || !seg->use_rela_p) | |
3421 | { | |
3422 | offsetT newval = md_chars_to_number (buf, 4); | |
3423 | ||
3424 | MODIFY_VALUE (newval, value, 0, 8, 15); | |
3425 | if (value < 0 || value > 0x7fff) | |
3426 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
3427 | _("immediate offset out of range")); | |
3428 | ||
3429 | md_number_to_chars (buf, newval, 4); | |
3430 | } | |
3431 | break; | |
3432 | ||
3433 | case BFD_RELOC_C6000_SBR_U15_H: | |
3434 | if (fixP->fx_done || !seg->use_rela_p) | |
3435 | { | |
3436 | offsetT newval = md_chars_to_number (buf, 4); | |
3437 | ||
3438 | /* Constant ADDA operands, processed as constant when the | |
3439 | instruction is parsed, are encoded as-is rather than | |
3440 | shifted. If the operand of an ADDA instruction is now | |
3441 | constant (for example, the difference between two labels | |
3442 | found after the instruction), ensure it is encoded the | |
3443 | same way it would have been if the constant value had | |
3444 | been known when the instruction was parsed. */ | |
3445 | if (fixP->tc_fix_data.fix_adda && fixP->fx_done) | |
3446 | value <<= 1; | |
3447 | ||
3448 | MODIFY_VALUE (newval, value, 1, 8, 15); | |
3449 | if (value & 1) | |
3450 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
3451 | _("immediate offset not 2-byte-aligned")); | |
3452 | if (value < 0 || value > 0xfffe) | |
3453 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
3454 | _("immediate offset out of range")); | |
3455 | ||
3456 | md_number_to_chars (buf, newval, 4); | |
3457 | } | |
3458 | break; | |
3459 | ||
3460 | case BFD_RELOC_C6000_SBR_U15_W: | |
3461 | case BFD_RELOC_C6000_SBR_GOT_U15_W: | |
3462 | if (fixP->fx_done || !seg->use_rela_p) | |
3463 | { | |
3464 | offsetT newval = md_chars_to_number (buf, 4); | |
3465 | ||
3466 | /* Constant ADDA operands, processed as constant when the | |
3467 | instruction is parsed, are encoded as-is rather than | |
3468 | shifted. If the operand of an ADDA instruction is now | |
3469 | constant (for example, the difference between two labels | |
3470 | found after the instruction), ensure it is encoded the | |
3471 | same way it would have been if the constant value had | |
3472 | been known when the instruction was parsed. */ | |
3473 | if (fixP->tc_fix_data.fix_adda && fixP->fx_done) | |
3474 | value <<= 2; | |
3475 | ||
3476 | MODIFY_VALUE (newval, value, 2, 8, 15); | |
3477 | if (value & 3) | |
3478 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
3479 | _("immediate offset not 4-byte-aligned")); | |
3480 | if (value < 0 || value > 0x1fffc) | |
3481 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
3482 | _("immediate offset out of range")); | |
3483 | ||
3484 | md_number_to_chars (buf, newval, 4); | |
3485 | } | |
3486 | if (fixP->fx_done && fixP->fx_r_type != BFD_RELOC_C6000_SBR_U15_W) | |
3487 | abort (); | |
3488 | break; | |
3489 | ||
3490 | case BFD_RELOC_C6000_DSBT_INDEX: | |
3491 | if (value != 0) | |
3492 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
3493 | _("addend used with $DSBT_INDEX")); | |
3494 | if (fixP->fx_done) | |
3495 | abort (); | |
3496 | break; | |
3497 | ||
3498 | case BFD_RELOC_C6000_PCR_S21: | |
3499 | if (fixP->fx_done || !seg->use_rela_p) | |
3500 | { | |
3501 | offsetT newval = md_chars_to_number (buf, 4); | |
3502 | ||
3503 | MODIFY_VALUE (newval, value, 2, 7, 21); | |
3504 | ||
3505 | if (value & 3) | |
3506 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
3507 | _("PC-relative offset not 4-byte-aligned")); | |
3508 | if (value < -0x400000 || value > 0x3ffffc) | |
3509 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
3510 | _("PC-relative offset out of range")); | |
3511 | ||
3512 | md_number_to_chars (buf, newval, 4); | |
3513 | } | |
3514 | break; | |
3515 | ||
3516 | case BFD_RELOC_C6000_PCR_S12: | |
3517 | if (fixP->fx_done || !seg->use_rela_p) | |
3518 | { | |
3519 | offsetT newval = md_chars_to_number (buf, 4); | |
3520 | ||
3521 | MODIFY_VALUE (newval, value, 2, 16, 12); | |
3522 | ||
3523 | if (value & 3) | |
3524 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
3525 | _("PC-relative offset not 4-byte-aligned")); | |
3526 | if (value < -0x2000 || value > 0x1ffc) | |
3527 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
3528 | _("PC-relative offset out of range")); | |
3529 | ||
3530 | md_number_to_chars (buf, newval, 4); | |
3531 | } | |
3532 | break; | |
3533 | ||
3534 | case BFD_RELOC_C6000_PCR_S10: | |
3535 | if (fixP->fx_done || !seg->use_rela_p) | |
3536 | { | |
3537 | offsetT newval = md_chars_to_number (buf, 4); | |
3538 | ||
3539 | MODIFY_VALUE (newval, value, 2, 13, 10); | |
3540 | ||
3541 | if (value & 3) | |
3542 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
3543 | _("PC-relative offset not 4-byte-aligned")); | |
3544 | if (value < -0x800 || value > 0x7fc) | |
3545 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
3546 | _("PC-relative offset out of range")); | |
3547 | ||
3548 | md_number_to_chars (buf, newval, 4); | |
3549 | } | |
3550 | break; | |
3551 | ||
3552 | case BFD_RELOC_C6000_PCR_S7: | |
3553 | if (fixP->fx_done || !seg->use_rela_p) | |
3554 | { | |
3555 | offsetT newval = md_chars_to_number (buf, 4); | |
3556 | ||
3557 | MODIFY_VALUE (newval, value, 2, 16, 7); | |
3558 | ||
3559 | if (value & 3) | |
3560 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
3561 | _("PC-relative offset not 4-byte-aligned")); | |
3562 | if (value < -0x100 || value > 0xfc) | |
3563 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
3564 | _("PC-relative offset out of range")); | |
3565 | ||
3566 | md_number_to_chars (buf, newval, 4); | |
3567 | } | |
3568 | break; | |
3569 | ||
3570 | default: | |
3571 | abort (); | |
3572 | } | |
3573 | } | |
3574 | ||
3575 | /* Convert a floating-point number to target (IEEE) format. */ | |
3576 | ||
3577 | char * | |
3578 | md_atof (int type, char *litP, int *sizeP) | |
3579 | { | |
3580 | return ieee_md_atof (type, litP, sizeP, target_big_endian); | |
3581 | } | |
3582 | ||
d99e5b39 JM |
3583 | /* Adjust the frags in SECTION (see tic6x_end). */ |
3584 | ||
3585 | static void | |
3586 | tic6x_adjust_section (bfd *abfd ATTRIBUTE_UNUSED, segT section, | |
3587 | void *dummy ATTRIBUTE_UNUSED) | |
3588 | { | |
3589 | segment_info_type *info; | |
3590 | frchainS *frchp; | |
3591 | fragS *fragp; | |
3592 | bfd_boolean have_code = FALSE; | |
3593 | bfd_boolean have_non_code = FALSE; | |
3594 | ||
3595 | info = seg_info (section); | |
3596 | if (info == NULL) | |
3597 | return; | |
3598 | ||
3599 | for (frchp = info->frchainP; frchp; frchp = frchp->frch_next) | |
3600 | for (fragp = frchp->frch_root; fragp; fragp = fragp->fr_next) | |
3601 | switch (fragp->fr_type) | |
3602 | { | |
3603 | case rs_machine_dependent: | |
3604 | if (fragp->tc_frag_data.is_insns) | |
3605 | have_code = TRUE; | |
3606 | break; | |
3607 | ||
3608 | case rs_dummy: | |
3609 | case rs_fill: | |
3610 | if (fragp->fr_fix > 0) | |
3611 | have_non_code = TRUE; | |
3612 | break; | |
3613 | ||
3614 | default: | |
3615 | have_non_code = TRUE; | |
3616 | break; | |
3617 | } | |
3618 | ||
3619 | /* Process alignment requirements in a code-only section. */ | |
3620 | if (have_code && !have_non_code) | |
3621 | { | |
3622 | /* If we need to insert an odd number of instructions to meet an | |
3623 | alignment requirement, there must have been an odd number of | |
3624 | instructions since the last 8-byte-aligned execute packet | |
3625 | boundary. So there must have been an execute packet with an | |
3626 | odd number (and so a number fewer than 8) of instructions | |
3627 | into which we can insert a NOP without breaking any previous | |
3628 | alignments. | |
3629 | ||
3630 | If then we need to insert a number 2 mod 4 of instructions, | |
3631 | the number of instructions since the last 16-byte-aligned | |
3632 | execute packet boundary must be 2 mod 4. So between that | |
3633 | boundary and the following 8-byte-aligned boundary there must | |
3634 | either be at least one execute packet with 2-mod-4 | |
3635 | instructions, or at least two with an odd number of | |
3636 | instructions; again, greedily inserting NOPs as soon as | |
3637 | possible suffices to meet the alignment requirement. | |
3638 | ||
3639 | If then we need to insert 4 instructions, we look between the | |
3640 | last 32-byte-aligned boundary and the following | |
3641 | 16-byte-aligned boundary. The sizes of the execute packets | |
3642 | in this range total 4 instructions mod 8, so again there is | |
3643 | room for greedy insertion of NOPs to meet the alignment | |
3644 | requirement, and before any intermediate point with 8-byte | |
3645 | (2-instruction) alignment requirement the sizes of execute | |
3646 | packets (and so the room for NOPs) will total 2 instructions | |
3647 | mod 4 so greedy insertion will not break such alignments. | |
3648 | ||
3649 | So we can always meet these alignment requirements by | |
3650 | inserting NOPs in parallel with existing execute packets, and | |
3651 | by induction the approach described above inserts the minimum | |
3652 | number of such NOPs. */ | |
3653 | ||
3654 | /* The number of NOPs we are currently looking to insert, if we | |
3655 | have gone back to insert NOPs. */ | |
3656 | unsigned int want_insert = 0; | |
3657 | ||
3658 | /* Out of that number, the number inserted so far in the current | |
3659 | stage of the above algorithm. */ | |
3660 | unsigned int want_insert_done_so_far = 0; | |
3661 | ||
3662 | /* The position mod 32 at the start of the current frag. */ | |
3663 | unsigned int pos = 0; | |
3664 | ||
3665 | /* The locations in the frag chain of the most recent frags at | |
3666 | the start of which there is the given alignment. */ | |
3667 | frchainS *frchp_last32, *frchp_last16, *frchp_last8; | |
3668 | fragS *fragp_last32, *fragp_last16, *fragp_last8; | |
3669 | unsigned int pos_last32, pos_last16, pos_last8; | |
3670 | ||
3671 | frchp_last32 = frchp_last16 = frchp_last8 = info->frchainP; | |
3672 | fragp_last32 = fragp_last16 = fragp_last8 = info->frchainP->frch_root; | |
3673 | pos_last32 = pos_last16 = pos_last8 = 0; | |
3674 | ||
3675 | for (frchp = info->frchainP; frchp; frchp = frchp->frch_next) | |
3676 | for (fragp = frchp->frch_root; fragp; fragp = fragp->fr_next) | |
3677 | look_at_frag: | |
3678 | { | |
3679 | bfd_boolean go_back = FALSE; | |
3680 | frchainS *frchp_next; | |
3681 | fragS *fragp_next; | |
3682 | ||
3683 | if (fragp->fr_type != rs_machine_dependent) | |
3684 | continue; | |
3685 | ||
3686 | if (fragp->tc_frag_data.is_insns | |
3687 | && pos + fragp->fr_fix > 32 | |
3688 | && !fragp->tc_frag_data.can_cross_fp_boundary) | |
3689 | { | |
3690 | /* As described above, we should always have met an | |
3691 | alignment requirement by the time we come back to | |
3692 | it. */ | |
3693 | if (want_insert) | |
3694 | abort (); | |
3695 | ||
3696 | if (pos & 3) | |
3697 | abort (); | |
3698 | want_insert = (32 - pos) >> 2; | |
3699 | if (want_insert > 7) | |
3700 | abort (); | |
3701 | want_insert_done_so_far = 0; | |
3702 | go_back = TRUE; | |
3703 | } | |
3704 | ||
3705 | if (!fragp->tc_frag_data.is_insns) | |
3706 | { | |
3707 | unsigned int would_insert_bytes; | |
3708 | ||
3709 | if (!(pos & ((1 << fragp->fr_offset) - 1))) | |
3710 | /* This alignment requirement is already met. */ | |
3711 | continue; | |
3712 | ||
3713 | /* As described above, we should always have met an | |
3714 | alignment requirement by the time we come back to | |
3715 | it. */ | |
3716 | if (want_insert) | |
3717 | abort (); | |
3718 | ||
3719 | /* We may not be able to meet this requirement within | |
3720 | the given number of characters. */ | |
3721 | would_insert_bytes | |
3722 | = ((1 << fragp->fr_offset) | |
3723 | - (pos & ((1 << fragp->fr_offset) - 1))); | |
3724 | ||
3725 | if (fragp->fr_subtype != 0 | |
3726 | && would_insert_bytes > fragp->fr_subtype) | |
3727 | continue; | |
3728 | ||
3729 | /* An unmet alignment must be 8, 16 or 32 bytes; | |
3730 | smaller ones must always be met within code-only | |
3731 | sections and larger ones cause the section not to | |
3732 | be code-only. */ | |
3733 | if (fragp->fr_offset != 3 | |
3734 | && fragp->fr_offset != 4 | |
3735 | && fragp->fr_offset != 5) | |
3736 | abort (); | |
3737 | ||
3738 | if (would_insert_bytes & 3) | |
3739 | abort (); | |
3740 | want_insert = would_insert_bytes >> 2; | |
3741 | if (want_insert > 7) | |
3742 | abort (); | |
3743 | want_insert_done_so_far = 0; | |
3744 | go_back = TRUE; | |
3745 | } | |
3746 | else if (want_insert && !go_back) | |
3747 | { | |
3748 | unsigned int num_insns = fragp->fr_fix >> 2; | |
3749 | unsigned int max_poss_nops = 8 - num_insns; | |
3750 | ||
3751 | if (max_poss_nops) | |
3752 | { | |
3753 | unsigned int cur_want_nops, max_want_nops, do_nops, i; | |
3754 | ||
3755 | if (want_insert & 1) | |
3756 | cur_want_nops = 1; | |
3757 | else if (want_insert & 2) | |
3758 | cur_want_nops = 2; | |
3759 | else if (want_insert & 4) | |
3760 | cur_want_nops = 4; | |
3761 | else | |
3762 | abort (); | |
3763 | ||
3764 | max_want_nops = cur_want_nops - want_insert_done_so_far; | |
3765 | ||
3766 | do_nops = (max_poss_nops < max_want_nops | |
3767 | ? max_poss_nops | |
3768 | : max_want_nops); | |
3769 | for (i = 0; i < do_nops; i++) | |
3770 | { | |
3771 | md_number_to_chars (fragp->fr_literal + fragp->fr_fix, | |
3772 | 0, 4); | |
3773 | if (target_big_endian) | |
3774 | fragp->fr_literal[fragp->fr_fix - 1] |= 0x1; | |
3775 | else | |
3776 | fragp->fr_literal[fragp->fr_fix - 4] |= 0x1; | |
3777 | fragp->fr_fix += 4; | |
3778 | fragp->fr_var -= 4; | |
3779 | } | |
3780 | want_insert_done_so_far += do_nops; | |
3781 | if (want_insert_done_so_far == cur_want_nops) | |
3782 | { | |
3783 | want_insert -= want_insert_done_so_far; | |
3784 | want_insert_done_so_far = 0; | |
3785 | if (want_insert) | |
3786 | go_back = TRUE; | |
3787 | } | |
3788 | } | |
3789 | } | |
3790 | if (go_back) | |
3791 | { | |
3792 | if (want_insert & 1) | |
3793 | { | |
3794 | frchp = frchp_last8; | |
3795 | fragp = fragp_last8; | |
3796 | pos = pos_last8; | |
3797 | } | |
3798 | else if (want_insert & 2) | |
3799 | { | |
3800 | frchp = frchp_last8 = frchp_last16; | |
3801 | fragp = fragp_last8 = fragp_last16; | |
3802 | pos = pos_last8 = pos_last16; | |
3803 | } | |
3804 | else if (want_insert & 4) | |
3805 | { | |
3806 | frchp = frchp_last8 = frchp_last16 = frchp_last32; | |
3807 | fragp = fragp_last8 = fragp_last16 = fragp_last32; | |
3808 | pos = pos_last8 = pos_last16 = pos_last32; | |
3809 | } | |
3810 | else | |
3811 | abort (); | |
3812 | ||
3813 | goto look_at_frag; | |
3814 | } | |
3815 | ||
3816 | /* Update current position for moving past a code | |
3817 | frag. */ | |
3818 | pos += fragp->fr_fix; | |
3819 | pos &= 31; | |
3820 | frchp_next = frchp; | |
3821 | fragp_next = fragp->fr_next; | |
3822 | if (fragp_next == NULL) | |
3823 | { | |
3824 | frchp_next = frchp->frch_next; | |
3825 | if (frchp_next != NULL) | |
3826 | fragp_next = frchp_next->frch_root; | |
3827 | } | |
3828 | if (!(pos & 7)) | |
3829 | { | |
3830 | frchp_last8 = frchp_next; | |
3831 | fragp_last8 = fragp_next; | |
3832 | pos_last8 = pos; | |
3833 | } | |
3834 | if (!(pos & 15)) | |
3835 | { | |
3836 | frchp_last16 = frchp_next; | |
3837 | fragp_last16 = fragp_next; | |
3838 | pos_last16 = pos; | |
3839 | } | |
3840 | if (!(pos & 31)) | |
3841 | { | |
3842 | frchp_last32 = frchp_next; | |
3843 | fragp_last32 = fragp_next; | |
3844 | pos_last32 = pos; | |
3845 | } | |
3846 | } | |
3847 | } | |
3848 | ||
3849 | /* Now convert the machine-dependent frags to machine-independent | |
3850 | ones. */ | |
3851 | for (frchp = info->frchainP; frchp; frchp = frchp->frch_next) | |
3852 | for (fragp = frchp->frch_root; fragp; fragp = fragp->fr_next) | |
3853 | { | |
3854 | if (fragp->fr_type == rs_machine_dependent) | |
3855 | { | |
3856 | if (fragp->tc_frag_data.is_insns) | |
3857 | frag_wane (fragp); | |
3858 | else | |
3859 | { | |
3860 | fragp->fr_type = rs_align_code; | |
3861 | fragp->fr_var = 1; | |
3862 | *fragp->fr_literal = 0; | |
3863 | } | |
3864 | } | |
3865 | } | |
3866 | } | |
3867 | ||
3868 | /* Initialize the machine-dependent parts of a frag. */ | |
3869 | ||
3870 | void | |
3871 | tic6x_frag_init (fragS *fragp) | |
3872 | { | |
3873 | fragp->tc_frag_data.is_insns = FALSE; | |
3874 | fragp->tc_frag_data.can_cross_fp_boundary = FALSE; | |
3875 | } | |
3876 | ||
59e6276b JM |
3877 | /* Set an attribute if it has not already been set by the user. */ |
3878 | ||
3879 | static void | |
3880 | tic6x_set_attribute_int (int tag, int value) | |
3881 | { | |
3882 | if (tag < 1 | |
3883 | || tag >= NUM_KNOWN_OBJ_ATTRIBUTES) | |
3884 | abort (); | |
3885 | if (!tic6x_attributes_set_explicitly[tag]) | |
3886 | bfd_elf_add_proc_attr_int (stdoutput, tag, value); | |
3887 | } | |
3888 | ||
3889 | /* Set object attributes deduced from the input file and command line | |
3890 | rather than given explicitly. */ | |
3891 | static void | |
3892 | tic6x_set_attributes (void) | |
3893 | { | |
75fa6dc1 JM |
3894 | if (tic6x_arch_attribute == C6XABI_Tag_ISA_none) |
3895 | tic6x_arch_attribute = C6XABI_Tag_ISA_C674X; | |
59e6276b | 3896 | |
75fa6dc1 | 3897 | tic6x_set_attribute_int (Tag_ISA, tic6x_arch_attribute); |
59e6276b JM |
3898 | } |
3899 | ||
d99e5b39 JM |
3900 | /* Do machine-dependent manipulations of the frag chains after all |
3901 | input has been read and before the machine-independent sizing and | |
3902 | relaxing. */ | |
3903 | ||
3904 | void | |
3905 | tic6x_end (void) | |
3906 | { | |
59e6276b JM |
3907 | /* Set object attributes at this point if not explicitly set. */ |
3908 | tic6x_set_attributes (); | |
3909 | ||
d99e5b39 JM |
3910 | /* Meeting alignment requirements may require inserting NOPs in |
3911 | parallel in execute packets earlier in the segment. Future | |
3912 | 16-bit instruction generation involves whole-segment optimization | |
3913 | to determine the best choice and ordering of 32-bit or 16-bit | |
3914 | instructions. This doesn't fit will in the general relaxation | |
3915 | framework, so handle alignment and 16-bit instruction generation | |
3916 | here. */ | |
3917 | bfd_map_over_sections (stdoutput, tic6x_adjust_section, NULL); | |
3918 | } | |
3919 | ||
3920 | /* No machine-dependent frags at this stage; all converted in | |
3921 | tic6x_end. */ | |
40b36596 JM |
3922 | |
3923 | void | |
3924 | md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, segT asec ATTRIBUTE_UNUSED, | |
3925 | fragS *fragp ATTRIBUTE_UNUSED) | |
3926 | { | |
3927 | abort (); | |
3928 | } | |
3929 | ||
d99e5b39 JM |
3930 | /* No machine-dependent frags at this stage; all converted in |
3931 | tic6x_end. */ | |
40b36596 JM |
3932 | |
3933 | int | |
3934 | md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED, | |
3935 | segT seg ATTRIBUTE_UNUSED) | |
3936 | { | |
3937 | abort (); | |
3938 | } | |
3939 | ||
3940 | /* Put a number into target byte order. */ | |
3941 | ||
3942 | void | |
3943 | md_number_to_chars (char *buf, valueT val, int n) | |
3944 | { | |
3945 | if (target_big_endian) | |
3946 | number_to_chars_bigendian (buf, val, n); | |
3947 | else | |
3948 | number_to_chars_littleendian (buf, val, n); | |
3949 | } | |
3950 | ||
3951 | /* Machine-dependent operand parsing not currently needed. */ | |
3952 | ||
3953 | void | |
3954 | md_operand (expressionS *op ATTRIBUTE_UNUSED) | |
3955 | { | |
3956 | } | |
3957 | ||
3958 | /* PC-relative operands are relative to the start of the fetch | |
3959 | packet. */ | |
3960 | ||
3961 | long | |
41820509 | 3962 | tic6x_pcrel_from_section (fixS *fixp, segT sec) |
40b36596 | 3963 | { |
41820509 JM |
3964 | if (fixp->fx_addsy != NULL |
3965 | && (!S_IS_DEFINED (fixp->fx_addsy) | |
3966 | || S_GET_SEGMENT (fixp->fx_addsy) != sec)) | |
3967 | return 0; | |
40b36596 JM |
3968 | return (fixp->fx_where + fixp->fx_frag->fr_address) & ~(long) 0x1f; |
3969 | } | |
3970 | ||
3971 | /* Round up a section size to the appropriate boundary. */ | |
3972 | ||
3973 | valueT | |
3974 | md_section_align (segT segment ATTRIBUTE_UNUSED, | |
3975 | valueT size) | |
3976 | { | |
3977 | /* Round up section sizes to ensure that text sections consist of | |
3978 | whole fetch packets. */ | |
3979 | int align = bfd_get_section_alignment (stdoutput, segment); | |
3980 | return ((size + (1 << align) - 1) & ((valueT) -1 << align)); | |
3981 | } | |
3982 | ||
3983 | /* No special undefined symbol handling needed for now. */ | |
3984 | ||
3985 | symbolS * | |
3986 | md_undefined_symbol (char *name ATTRIBUTE_UNUSED) | |
3987 | { | |
3988 | return NULL; | |
3989 | } | |
3990 | ||
3991 | /* Translate internal representation of relocation info to BFD target | |
3992 | format. */ | |
3993 | ||
3994 | arelent * | |
3995 | tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp) | |
3996 | { | |
3997 | arelent *reloc; | |
3998 | bfd_reloc_code_real_type r_type; | |
3999 | ||
4000 | reloc = xmalloc (sizeof (arelent)); | |
4001 | reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *)); | |
4002 | *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); | |
4003 | reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; | |
41820509 | 4004 | reloc->addend = (tic6x_generate_rela ? fixp->fx_offset : 0); |
40b36596 JM |
4005 | r_type = fixp->fx_r_type; |
4006 | reloc->howto = bfd_reloc_type_lookup (stdoutput, r_type); | |
4007 | ||
4008 | if (reloc->howto == NULL) | |
4009 | { | |
4010 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
4011 | _("Cannot represent relocation type %s"), | |
4012 | bfd_get_reloc_code_name (r_type)); | |
4013 | return NULL; | |
4014 | } | |
4015 | ||
41820509 JM |
4016 | /* Correct for adjustments bfd_install_relocation will make. */ |
4017 | if (reloc->howto->pcrel_offset && reloc->howto->partial_inplace) | |
4018 | reloc->addend += reloc->address; | |
4019 | ||
40b36596 JM |
4020 | return reloc; |
4021 | } |