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PowerPC relocations for prefix insns
[deliverable/binutils-gdb.git] / gas / config / tc-tilegx.c
CommitLineData
aa137e4d 1/* tc-tilegx.c -- Assemble for a Tile-Gx chip.
82704155 2 Copyright (C) 2011-2019 Free Software Foundation, Inc.
aa137e4d
NC		 3
4 This file is part of GAS, the GNU Assembler.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
20
21#include "as.h"
aa137e4d
NC		 22#include "subsegs.h"
23
24#include "elf/tilegx.h"
25#include "opcode/tilegx.h"
26
27#include "dwarf2dbg.h"
28#include "dw2gencfi.h"
29
30#include "safe-ctype.h"
31
32
33/* Special registers. */
34#define TREG_IDN0 57
35#define TREG_IDN1 58
36#define TREG_UDN0 59
37#define TREG_UDN1 60
38#define TREG_UDN2 61
39#define TREG_UDN3 62
40#define TREG_ZERO 63
41
42
43/* Generic assembler global variables which must be defined by all
44 targets. */
45
46/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
47int tilegx_cie_data_alignment;
48
49/* Characters which always start a comment. */
50const char comment_chars[] = "#";
51
52/* Characters which start a comment at the beginning of a line. */
53const char line_comment_chars[] = "#";
54
55/* Characters which may be used to separate multiple commands on a
56 single line. */
57const char line_separator_chars[] = ";";
58
59/* Characters which are used to indicate an exponent in a floating
60 point number. */
61const char EXP_CHARS[] = "eE";
62
63/* Characters which mean that a number is a floating point constant,
64 as in 0d1.0. */
65const char FLT_CHARS[] = "rRsSfFdDxXpP";
66
67/* Either 32 or 64. */
68static int tilegx_arch_size = 64;
69
70
71const char *
72tilegx_target_format (void)
73{
fb6cedde
WL		 74 if (target_big_endian) {
75 return tilegx_arch_size == 64 ? "elf64-tilegx-be" : "elf32-tilegx-be";
76 } else {
77 return tilegx_arch_size == 64 ? "elf64-tilegx-le" : "elf32-tilegx-le";
78 }
aa137e4d
NC		 79}
80
81
82#define OPTION_32 (OPTION_MD_BASE + 0)
83#define OPTION_64 (OPTION_MD_BASE + 1)
fb6cedde
WL		 84#define OPTION_EB (OPTION_MD_BASE + 2)
85#define OPTION_EL (OPTION_MD_BASE + 3)
aa137e4d
NC		 86
87const char *md_shortopts = "VQ:";
88
89struct option md_longopts[] =
90{
91 {"32", no_argument, NULL, OPTION_32},
92 {"64", no_argument, NULL, OPTION_64},
fb6cedde
WL		 93 {"EB", no_argument, NULL, OPTION_EB },
94 {"EL", no_argument, NULL, OPTION_EL },
aa137e4d
NC		 95 {NULL, no_argument, NULL, 0}
96};
97
98size_t md_longopts_size = sizeof (md_longopts);
99
100int
17b9d67d 101md_parse_option (int c, const char *arg ATTRIBUTE_UNUSED)
aa137e4d
NC		 102{
103 switch (c)
104 {
105 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
106 should be emitted or not. FIXME: Not implemented. */
107 case 'Q':
108 break;
109
110 /* -V: SVR4 argument to print version ID. */
111 case 'V':
112 print_version_id ();
113 break;
114
115 case OPTION_32:
116 tilegx_arch_size = 32;
117 break;
118
119 case OPTION_64:
120 tilegx_arch_size = 64;
121 break;
122
fb6cedde
WL		 123 case OPTION_EB:
124 target_big_endian = 1;
125 break;
126
127 case OPTION_EL:
128 target_big_endian = 0;
129 break;
130
aa137e4d
NC		 131 default:
132 return 0;
133 }
134
135 return 1;
136}
137
138void
139md_show_usage (FILE *stream)
140{
141 fprintf (stream, _("\
142 -Q ignored\n\
143 -V print assembler version number\n\
fb6cedde 144 -EB/-EL generate big-endian/little-endian code\n\
aa137e4d
NC		 145 --32/--64 generate 32bit/64bit code\n"));
146}
147
148
149/* Extra expression types. */
150
151#define O_hw0 O_md1
152#define O_hw1 O_md2
153#define O_hw2 O_md3
154#define O_hw3 O_md4
155#define O_hw0_last O_md5
156#define O_hw1_last O_md6
157#define O_hw2_last O_md7
158#define O_hw0_got O_md8
6f7be959
WL		 159#define O_hw0_last_got O_md9
160#define O_hw1_last_got O_md10
161#define O_plt O_md11
162#define O_hw0_tls_gd O_md12
163#define O_hw0_last_tls_gd O_md13
164#define O_hw1_last_tls_gd O_md14
165#define O_hw0_tls_ie O_md15
166#define O_hw0_last_tls_ie O_md16
167#define O_hw1_last_tls_ie O_md17
168#define O_hw0_tls_le O_md18
169#define O_hw0_last_tls_le O_md19
170#define O_hw1_last_tls_le O_md20
171#define O_tls_gd_call O_md21
172#define O_tls_gd_add O_md22
173#define O_tls_ie_load O_md23
174#define O_tls_add O_md24
e5b95258
WL		 175#define O_hw0_plt O_md25
176#define O_hw1_plt O_md26
177#define O_hw1_last_plt O_md27
178#define O_hw2_last_plt O_md28
aa137e4d
NC		 179
180static struct hash_control *special_operator_hash;
181
182/* Hash tables for instruction mnemonic lookup. */
183static struct hash_control *op_hash;
184
185/* Hash table for spr lookup. */
186static struct hash_control *spr_hash;
187
188/* True temporarily while parsing an SPR expression. This changes the
189 * namespace to include SPR names. */
190static int parsing_spr;
191
192/* Are we currently inside `{ ... }'? */
193static int inside_bundle;
194
195struct tilegx_instruction
196{
197 const struct tilegx_opcode *opcode;
198 tilegx_pipeline pipe;
199 expressionS operand_values[TILEGX_MAX_OPERANDS];
200};
201
202/* This keeps track of the current bundle being built up. */
203static struct tilegx_instruction current_bundle[TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE];
204
205/* Index in current_bundle for the next instruction to parse. */
206static int current_bundle_index;
207
208/* Allow 'r63' in addition to 'zero', etc. Normally we disallow this as
209 'zero' is not a real register, so using it accidentally would be a
210 nasty bug. For other registers, such as 'sp', code using multiple names
211 for the same physical register is excessively confusing.
212
213 The '.require_canonical_reg_names' pseudo-op turns this error on,
214 and the '.no_require_canonical_reg_names' pseudo-op turns this off.
215 By default the error is on. */
216static int require_canonical_reg_names;
217
218/* Allow bundles that do undefined or suspicious things like write
219 two different values to the same register at the same time.
220
221 The '.no_allow_suspicious_bundles' pseudo-op turns this error on,
222 and the '.allow_suspicious_bundles' pseudo-op turns this off. */
223static int allow_suspicious_bundles;
224
225
226/* A hash table of main processor registers, mapping each register name
227 to its index.
228
229 Furthermore, if the register number is greater than the number
230 of registers for that processor, the user used an illegal alias
231 for that register (e.g. r63 instead of zero), so we should generate
232 a warning. The attempted register number can be found by clearing
233 NONCANONICAL_REG_NAME_FLAG. */
234static struct hash_control *main_reg_hash;
235
236
237/* We cannot unambiguously store a 0 in a hash table and look it up,
238 so we OR in this flag to every canonical register. */
239#define CANONICAL_REG_NAME_FLAG 0x1000
240
241/* By default we disallow register aliases like r63, but we record
242 them in the hash table in case the .no_require_canonical_reg_names
243 directive is used. Noncanonical names have this value added to them. */
244#define NONCANONICAL_REG_NAME_FLAG 0x2000
245
246/* Discards flags for register hash table entries and returns the
247 reg number. */
248#define EXTRACT_REGNO(p) ((p) & 63)
249
250/* This function is called once, at assembler startup time. It should
251 set up all the tables, etc., that the MD part of the assembler will
252 need. */
253
254void
255md_begin (void)
256{
257 const struct tilegx_opcode *op;
258 int i;
82590249
WL		 259 int mach = (tilegx_arch_size == 64) ? bfd_mach_tilegx : bfd_mach_tilegx32;
260
261 if (! bfd_set_arch_mach (stdoutput, bfd_arch_tilegx, mach))
262 as_warn (_("Could not set architecture and machine"));
aa137e4d
NC		 263
264 /* Guarantee text section is aligned. */
265 bfd_set_section_alignment (stdoutput, text_section,
266 TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES);
267
268 require_canonical_reg_names = 1;
269 allow_suspicious_bundles = 0;
270 current_bundle_index = 0;
271 inside_bundle = 0;
272
273 tilegx_cie_data_alignment = (tilegx_arch_size == 64 ? -8 : -4);
274
275 /* Initialize special operator hash table. */
276 special_operator_hash = hash_new ();
277#define INSERT_SPECIAL_OP(name) \
278 hash_insert (special_operator_hash, #name, (void *)O_##name)
279
280 INSERT_SPECIAL_OP (hw0);
281 INSERT_SPECIAL_OP (hw1);
282 INSERT_SPECIAL_OP (hw2);
283 INSERT_SPECIAL_OP (hw3);
284 INSERT_SPECIAL_OP (hw0_last);
285 INSERT_SPECIAL_OP (hw1_last);
286 INSERT_SPECIAL_OP (hw2_last);
287 /* hw3_last is a convenience alias for the equivalent hw3. */
288 hash_insert (special_operator_hash, "hw3_last", (void*)O_hw3);
289 INSERT_SPECIAL_OP (hw0_got);
aa137e4d
NC		 290 INSERT_SPECIAL_OP (hw0_last_got);
291 INSERT_SPECIAL_OP (hw1_last_got);
aa137e4d
NC		 292 INSERT_SPECIAL_OP(plt);
293 INSERT_SPECIAL_OP (hw0_tls_gd);
aa137e4d
NC		 294 INSERT_SPECIAL_OP (hw0_last_tls_gd);
295 INSERT_SPECIAL_OP (hw1_last_tls_gd);
aa137e4d 296 INSERT_SPECIAL_OP (hw0_tls_ie);
aa137e4d
NC		 297 INSERT_SPECIAL_OP (hw0_last_tls_ie);
298 INSERT_SPECIAL_OP (hw1_last_tls_ie);
6f7be959
WL		 299 INSERT_SPECIAL_OP (hw0_tls_le);
300 INSERT_SPECIAL_OP (hw0_last_tls_le);
301 INSERT_SPECIAL_OP (hw1_last_tls_le);
302 INSERT_SPECIAL_OP (tls_gd_call);
303 INSERT_SPECIAL_OP (tls_gd_add);
304 INSERT_SPECIAL_OP (tls_ie_load);
305 INSERT_SPECIAL_OP (tls_add);
e5b95258
WL		 306 INSERT_SPECIAL_OP (hw0_plt);
307 INSERT_SPECIAL_OP (hw1_plt);
308 INSERT_SPECIAL_OP (hw1_last_plt);
309 INSERT_SPECIAL_OP (hw2_last_plt);
aa137e4d
NC		 310#undef INSERT_SPECIAL_OP
311
312 /* Initialize op_hash hash table. */
313 op_hash = hash_new ();
314 for (op = &tilegx_opcodes[0]; op->name != NULL; op++)
315 {
316 const char *hash_err = hash_insert (op_hash, op->name, (void *)op);
317 if (hash_err != NULL)
318 as_fatal (_("Internal Error: Can't hash %s: %s"), op->name, hash_err);
319 }
320
321 /* Initialize the spr hash table. */
322 parsing_spr = 0;
323 spr_hash = hash_new ();
324 for (i = 0; i < tilegx_num_sprs; i++)
325 hash_insert (spr_hash, tilegx_sprs[i].name,
326 (void *) &tilegx_sprs[i]);
327
328 /* Set up the main_reg_hash table. We use this instead of
329 creating a symbol in the register section to avoid ambiguities
330 with labels that have the same names as registers. */
331 main_reg_hash = hash_new ();
332 for (i = 0; i < TILEGX_NUM_REGISTERS; i++)
333 {
334 char buf[64];
335
336 hash_insert (main_reg_hash, tilegx_register_names[i],
337 (void *) (long) (i | CANONICAL_REG_NAME_FLAG));
338
339 /* See if we should insert a noncanonical alias, like r63. */
340 sprintf (buf, "r%d", i);
341 if (strcmp (buf, tilegx_register_names[i]) != 0)
342 hash_insert (main_reg_hash, xstrdup (buf),
343 (void *) (long) (i | NONCANONICAL_REG_NAME_FLAG));
344 }
345}
346
347#define BUNDLE_TEMPLATE_MASK(p0, p1, p2) \
348 ((p0) | ((p1) << 8) | ((p2) << 16))
349#define BUNDLE_TEMPLATE(p0, p1, p2) \
350 { { (p0), (p1), (p2) }, \
351 BUNDLE_TEMPLATE_MASK(1 << (p0), 1 << (p1), (1 << (p2))) \
352 }
353
354#define NO_PIPELINE TILEGX_NUM_PIPELINE_ENCODINGS
355
356struct bundle_template
357{
358 tilegx_pipeline pipe[TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE];
359 unsigned int pipe_mask;
360};
361
362static const struct bundle_template bundle_templates[] =
363{
364 /* In Y format we must always have something in Y2, since it has
365 no fnop, so this conveys that Y2 must always be used. */
366 BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y0, TILEGX_PIPELINE_Y2, NO_PIPELINE),
367 BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y1, TILEGX_PIPELINE_Y2, NO_PIPELINE),
368 BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y2, TILEGX_PIPELINE_Y0, NO_PIPELINE),
369 BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y2, TILEGX_PIPELINE_Y1, NO_PIPELINE),
370
371 /* Y format has three instructions. */
372 BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y0,TILEGX_PIPELINE_Y1,TILEGX_PIPELINE_Y2),
373 BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y0,TILEGX_PIPELINE_Y2,TILEGX_PIPELINE_Y1),
374 BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y1,TILEGX_PIPELINE_Y0,TILEGX_PIPELINE_Y2),
375 BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y1,TILEGX_PIPELINE_Y2,TILEGX_PIPELINE_Y0),
376 BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y2,TILEGX_PIPELINE_Y0,TILEGX_PIPELINE_Y1),
377 BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y2,TILEGX_PIPELINE_Y1,TILEGX_PIPELINE_Y0),
378
379 /* X format has only two instructions. */
380 BUNDLE_TEMPLATE(TILEGX_PIPELINE_X0, TILEGX_PIPELINE_X1, NO_PIPELINE),
381 BUNDLE_TEMPLATE(TILEGX_PIPELINE_X1, TILEGX_PIPELINE_X0, NO_PIPELINE)
382};
383
384
385static void
386prepend_nop_to_bundle (tilegx_mnemonic mnemonic)
387{
388 memmove (&current_bundle[1], &current_bundle[0],
389 current_bundle_index * sizeof current_bundle[0]);
390 current_bundle[0].opcode = &tilegx_opcodes[mnemonic];
391 ++current_bundle_index;
392}
393
394static tilegx_bundle_bits
395insert_operand (tilegx_bundle_bits bits,
396 const struct tilegx_operand *operand,
397 int operand_value,
3b4dbbbf 398 const char *file,
aa137e4d
NC		 399 unsigned lineno)
400{
401 /* Range-check the immediate. */
402 int num_bits = operand->num_bits;
403
404 operand_value >>= operand->rightshift;
405
406 if (bfd_check_overflow (operand->is_signed
407 ? complain_overflow_signed
408 : complain_overflow_unsigned,
409 num_bits,
410 0,
411 bfd_arch_bits_per_address (stdoutput),
412 operand_value)
413 != bfd_reloc_ok)
414 {
415 offsetT min, max;
416 if (operand->is_signed)
417 {
418 min = -(1 << (num_bits - 1));
419 max = (1 << (num_bits - 1)) - 1;
420 }
421 else
422 {
423 min = 0;
424 max = (1 << num_bits) - 1;
425 }
426 as_bad_value_out_of_range (_("operand"), operand_value, min, max,
427 file, lineno);
428 }
429
430 /* Write out the bits for the immediate. */
431 return bits | operand->insert (operand_value);
432}
433
434
435static int
3b4dbbbf
TS		 436apply_special_operator (operatorT op, offsetT num, const char *file,
437 unsigned lineno)
aa137e4d
NC		 438{
439 int ret;
440 int check_shift = -1;
441
442 switch (op)
443 {
aa137e4d
NC		 444 case O_hw0_last:
445 check_shift = 0;
446 /* Fall through. */
aa137e4d
NC		 447 case O_hw0:
448 ret = (signed short)num;
449 break;
450
aa137e4d
NC		 451 case O_hw1_last:
452 check_shift = 16;
453 /* Fall through. */
aa137e4d
NC		 454 case O_hw1:
455 ret = (signed short)(num >> 16);
456 break;
457
aa137e4d
NC		 458 case O_hw2_last:
459 check_shift = 32;
460 /* Fall through. */
aa137e4d
NC		 461 case O_hw2:
462 ret = (signed short)(num >> 32);
463 break;
464
aa137e4d
NC		 465 case O_hw3:
466 ret = (signed short)(num >> 48);
467 break;
468
469 default:
470 abort ();
471 break;
472 }
473
474 if (check_shift >= 0 && ret != (num >> check_shift))
475 {
476 as_bad_value_out_of_range (_("operand"), num,
477 ~0ULL << (check_shift + 16 - 1),
478 ~0ULL >> (64 - (check_shift + 16 - 1)),
479 file, lineno);
480 }
481
482 return ret;
483}
484
485static tilegx_bundle_bits
486emit_tilegx_instruction (tilegx_bundle_bits bits,
487 int num_operands,
488 const unsigned char *operands,
489 expressionS *operand_values,
490 char *bundle_start)
491{
492 int i;
493
494 for (i = 0; i < num_operands; i++)
495 {
496 const struct tilegx_operand *operand =
497 &tilegx_operands[operands[i]];
498 expressionS *operand_exp = &operand_values[i];
499 int is_pc_relative = operand->is_pc_relative;
500
501 if (operand_exp->X_op == O_register
502 || (operand_exp->X_op == O_constant && !is_pc_relative))
503 {
504 /* We know what the bits are right now, so insert them. */
505 bits = insert_operand (bits, operand, operand_exp->X_add_number,
506 NULL, 0);
507 }
508 else
509 {
510 bfd_reloc_code_real_type reloc = operand->default_reloc;
511 expressionS subexp;
512 int die = 0, use_subexp = 0, require_symbol = 0;
513 fixS *fixP;
514
515 /* Take an expression like hw0(x) and turn it into x with
516 a different reloc type. */
517 switch (operand_exp->X_op)
518 {
519#define HANDLE_OP16(suffix) \
520 switch (reloc) \
521 { \
522 case BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST: \
523 reloc = BFD_RELOC_TILEGX_IMM16_X0_##suffix; \
524 break; \
525 case BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST: \
526 reloc = BFD_RELOC_TILEGX_IMM16_X1_##suffix; \
527 break; \
528 default: \
529 die = 1; \
530 break; \
531 } \
532 use_subexp = 1
533
534 case O_hw0:
535 HANDLE_OP16 (HW0);
536 break;
537
538 case O_hw1:
539 HANDLE_OP16 (HW1);
540 break;
541
542 case O_hw2:
543 HANDLE_OP16 (HW2);
544 break;
545
546 case O_hw3:
547 HANDLE_OP16 (HW3);
548 break;
549
550 case O_hw0_last:
551 HANDLE_OP16 (HW0_LAST);
552 break;
553
554 case O_hw1_last:
555 HANDLE_OP16 (HW1_LAST);
556 break;
557
558 case O_hw2_last:
559 HANDLE_OP16 (HW2_LAST);
560 break;
561
562 case O_hw0_got:
563 HANDLE_OP16 (HW0_GOT);
564 require_symbol = 1;
565 break;
566
aa137e4d
NC		 567 case O_hw0_last_got:
568 HANDLE_OP16 (HW0_LAST_GOT);
569 require_symbol = 1;
570 break;
571
572 case O_hw1_last_got:
573 HANDLE_OP16 (HW1_LAST_GOT);
574 require_symbol = 1;
575 break;
576
aa137e4d
NC		 577 case O_hw0_tls_gd:
578 HANDLE_OP16 (HW0_TLS_GD);
579 require_symbol = 1;
580 break;
581
6f7be959
WL		 582 case O_hw0_last_tls_gd:
583 HANDLE_OP16 (HW0_LAST_TLS_GD);
aa137e4d
NC		 584 require_symbol = 1;
585 break;
586
6f7be959
WL		 587 case O_hw1_last_tls_gd:
588 HANDLE_OP16 (HW1_LAST_TLS_GD);
aa137e4d
NC		 589 require_symbol = 1;
590 break;
591
6f7be959
WL		 592 case O_hw0_tls_ie:
593 HANDLE_OP16 (HW0_TLS_IE);
aa137e4d
NC		 594 require_symbol = 1;
595 break;
596
6f7be959
WL		 597 case O_hw0_last_tls_ie:
598 HANDLE_OP16 (HW0_LAST_TLS_IE);
aa137e4d
NC		 599 require_symbol = 1;
600 break;
601
6f7be959
WL		 602 case O_hw1_last_tls_ie:
603 HANDLE_OP16 (HW1_LAST_TLS_IE);
aa137e4d
NC		 604 require_symbol = 1;
605 break;
606
6f7be959
WL		 607 case O_hw0_tls_le:
608 HANDLE_OP16 (HW0_TLS_LE);
aa137e4d
NC		 609 require_symbol = 1;
610 break;
611
6f7be959
WL		 612 case O_hw0_last_tls_le:
613 HANDLE_OP16 (HW0_LAST_TLS_LE);
aa137e4d
NC		 614 require_symbol = 1;
615 break;
616
6f7be959
WL		 617 case O_hw1_last_tls_le:
618 HANDLE_OP16 (HW1_LAST_TLS_LE);
aa137e4d
NC		 619 require_symbol = 1;
620 break;
621
e5b95258
WL		 622 case O_hw0_plt:
623 HANDLE_OP16 (HW0_PLT_PCREL);
624 break;
625
626 case O_hw1_plt:
627 HANDLE_OP16 (HW1_PLT_PCREL);
628 break;
629
630 case O_hw1_last_plt:
631 HANDLE_OP16 (HW1_LAST_PLT_PCREL);
632 break;
633
634 case O_hw2_last_plt:
635 HANDLE_OP16 (HW2_LAST_PLT_PCREL);
636 break;
637
6f7be959 638#undef HANDLE_OP16
aa137e4d 639
6f7be959
WL		 640 case O_plt:
641 switch (reloc)
642 {
643 case BFD_RELOC_TILEGX_JUMPOFF_X1:
644 reloc = BFD_RELOC_TILEGX_JUMPOFF_X1_PLT;
645 break;
646 default:
647 die = 1;
648 break;
649 }
650 use_subexp = 1;
aa137e4d
NC		 651 require_symbol = 1;
652 break;
653
6f7be959
WL		 654 case O_tls_gd_call:
655 switch (reloc)
656 {
657 case BFD_RELOC_TILEGX_JUMPOFF_X1:
658 reloc = BFD_RELOC_TILEGX_TLS_GD_CALL;
659 break;
660 default:
661 die = 1;
662 break;
663 }
664 use_subexp = 1;
aa137e4d
NC		 665 require_symbol = 1;
666 break;
667
6f7be959
WL		 668 case O_tls_gd_add:
669 switch (reloc)
670 {
671 case BFD_RELOC_TILEGX_IMM8_X0:
672 reloc = BFD_RELOC_TILEGX_IMM8_X0_TLS_GD_ADD;
673 break;
674 case BFD_RELOC_TILEGX_IMM8_X1:
675 reloc = BFD_RELOC_TILEGX_IMM8_X1_TLS_GD_ADD;
676 break;
677 case BFD_RELOC_TILEGX_IMM8_Y0:
678 reloc = BFD_RELOC_TILEGX_IMM8_Y0_TLS_GD_ADD;
679 break;
680 case BFD_RELOC_TILEGX_IMM8_Y1:
681 reloc = BFD_RELOC_TILEGX_IMM8_Y1_TLS_GD_ADD;
682 break;
683 default:
684 die = 1;
685 break;
686 }
687 use_subexp = 1;
aa137e4d
NC		 688 require_symbol = 1;
689 break;
690
6f7be959
WL		 691 case O_tls_ie_load:
692 switch (reloc)
693 {
694 case BFD_RELOC_TILEGX_IMM8_X1:
695 reloc = BFD_RELOC_TILEGX_TLS_IE_LOAD;
696 break;
697 default:
698 die = 1;
699 break;
700 }
701 use_subexp = 1;
aa137e4d
NC		 702 require_symbol = 1;
703 break;
704
6f7be959 705 case O_tls_add:
aa137e4d
NC		 706 switch (reloc)
707 {
6f7be959
WL		 708 case BFD_RELOC_TILEGX_IMM8_X0:
709 reloc = BFD_RELOC_TILEGX_IMM8_X0_TLS_ADD;
710 break;
711 case BFD_RELOC_TILEGX_IMM8_X1:
712 reloc = BFD_RELOC_TILEGX_IMM8_X1_TLS_ADD;
713 break;
714 case BFD_RELOC_TILEGX_IMM8_Y0:
715 reloc = BFD_RELOC_TILEGX_IMM8_Y0_TLS_ADD;
716 break;
717 case BFD_RELOC_TILEGX_IMM8_Y1:
718 reloc = BFD_RELOC_TILEGX_IMM8_Y1_TLS_ADD;
aa137e4d
NC		 719 break;
720 default:
721 die = 1;
722 break;
723 }
724 use_subexp = 1;
725 require_symbol = 1;
726 break;
727
728 default:
729 /* Do nothing. */
730 break;
731 }
732
733 if (die)
734 {
735 as_bad (_("Invalid operator for operand."));
736 }
737 else if (use_subexp)
738 {
8d1015a8 739 expressionS *sval = NULL;
aa137e4d
NC		 740 /* Now that we've changed the reloc, change ha16(x) into x,
741 etc. */
742
8d1015a8
AM		 743 if (symbol_symbolS (operand_exp->X_add_symbol))
744 sval = symbol_get_value_expression (operand_exp->X_add_symbol);
745 if (sval && sval->X_md)
aa137e4d 746 {
aa137e4d
NC		 747 /* HACK: We used X_md to mark this symbol as a fake wrapper
748 around a real expression. To unwrap it, we just grab its
749 value here. */
8d1015a8 750 operand_exp = sval;
e8b9f508
WL		 751
752 if (require_symbol)
753 {
754 /* Look at the expression, and reject it if it's not a
755 plain symbol. */
756 if (operand_exp->X_op != O_symbol
757 || operand_exp->X_add_number != 0)
758 as_bad (_("Operator may only be applied to symbols."));
759 }
aa137e4d
NC		 760 }
761 else
762 {
763 /* The value of this expression is an actual symbol, so
764 turn that into an expression. */
765 memset (&subexp, 0, sizeof subexp);
766 subexp.X_op = O_symbol;
767 subexp.X_add_symbol = operand_exp->X_add_symbol;
768 operand_exp = &subexp;
769 }
770 }
771
772 /* Create a fixup to handle this later. */
773 fixP = fix_new_exp (frag_now,
774 bundle_start - frag_now->fr_literal,
775 (operand->num_bits + 7) >> 3,
776 operand_exp,
777 is_pc_relative,
778 reloc);
779 fixP->tc_fix_data = operand;
780
781 /* Don't do overflow checking if we are applying a function like
782 ha16. */
783 fixP->fx_no_overflow |= use_subexp;
784 }
785 }
786 return bits;
787}
788
789
790/* Detects and complains if two instructions in current_bundle write
791 to the same register, either implicitly or explicitly, or if a
792 read-only register is written. */
793static void
794check_illegal_reg_writes (void)
795{
796 BFD_HOST_U_64_BIT all_regs_written = 0;
797 int j;
798
799 for (j = 0; j < current_bundle_index; j++)
800 {
801 const struct tilegx_instruction *instr = &current_bundle[j];
802 int k;
803 BFD_HOST_U_64_BIT regs =
804 ((BFD_HOST_U_64_BIT)1) << instr->opcode->implicitly_written_register;
805 BFD_HOST_U_64_BIT conflict;
806
807 for (k = 0; k < instr->opcode->num_operands; k++)
808 {
809 const struct tilegx_operand *operand =
810 &tilegx_operands[instr->opcode->operands[instr->pipe][k]];
811
812 if (operand->is_dest_reg)
813 {
814 int regno = instr->operand_values[k].X_add_number;
815 BFD_HOST_U_64_BIT mask = ((BFD_HOST_U_64_BIT)1) << regno;
816
817 if ((mask & ( (((BFD_HOST_U_64_BIT)1) << TREG_IDN1)
818 | (((BFD_HOST_U_64_BIT)1) << TREG_UDN1)
819 | (((BFD_HOST_U_64_BIT)1) << TREG_UDN2)
820 | (((BFD_HOST_U_64_BIT)1) << TREG_UDN3))) != 0
821 && !allow_suspicious_bundles)
822 {
823 as_bad (_("Writes to register '%s' are not allowed."),
824 tilegx_register_names[regno]);
825 }
826
827 regs |= mask;
828 }
829 }
830
831 /* Writing to the zero register doesn't count. */
832 regs &= ~(((BFD_HOST_U_64_BIT)1) << TREG_ZERO);
833
834 conflict = all_regs_written & regs;
835 if (conflict != 0 && !allow_suspicious_bundles)
836 {
837 /* Find which register caused the conflict. */
838 const char *conflicting_reg_name = "???";
839 int i;
840
841 for (i = 0; i < TILEGX_NUM_REGISTERS; i++)
842 {
843 if (((conflict >> i) & 1) != 0)
844 {
845 conflicting_reg_name = tilegx_register_names[i];
846 break;
847 }
848 }
849
850 as_bad (_("Two instructions in the same bundle both write "
851 "to register %s, which is not allowed."),
852 conflicting_reg_name);
853 }
854
855 all_regs_written |= regs;
856 }
857}
858
859
860static void
861tilegx_flush_bundle (void)
862{
863 unsigned i;
864 int j;
865 addressT addr_mod;
866 unsigned compatible_pipes;
867 const struct bundle_template *match;
868 char *f;
869
870 inside_bundle = 0;
871
872 switch (current_bundle_index)
873 {
874 case 0:
875 /* No instructions. */
876 return;
877 case 1:
878 if (current_bundle[0].opcode->can_bundle)
879 {
880 /* Simplify later logic by adding an explicit fnop. */
881 prepend_nop_to_bundle (TILEGX_OPC_FNOP);
882 }
883 else
884 {
885 /* This instruction cannot be bundled with anything else.
886 Prepend an explicit 'nop', rather than an 'fnop', because
887 fnops can be replaced by later binary-processing tools while
888 nops cannot. */
889 prepend_nop_to_bundle (TILEGX_OPC_NOP);
890 }
891 break;
892 default:
893 if (!allow_suspicious_bundles)
894 {
895 /* Make sure all instructions can be bundled with other
896 instructions. */
897 const struct tilegx_opcode *cannot_bundle = NULL;
898 bfd_boolean seen_non_nop = FALSE;
899
900 for (j = 0; j < current_bundle_index; j++)
901 {
902 const struct tilegx_opcode *op = current_bundle[j].opcode;
903
904 if (!op->can_bundle && cannot_bundle == NULL)
905 cannot_bundle = op;
906 else if (op->mnemonic != TILEGX_OPC_NOP
907 && op->mnemonic != TILEGX_OPC_INFO
908 && op->mnemonic != TILEGX_OPC_INFOL)
909 seen_non_nop = TRUE;
910 }
911
912 if (cannot_bundle != NULL && seen_non_nop)
913 {
914 current_bundle_index = 0;
915 as_bad (_("'%s' may not be bundled with other instructions."),
916 cannot_bundle->name);
917 return;
918 }
919 }
920 break;
921 }
922
923 compatible_pipes =
924 BUNDLE_TEMPLATE_MASK(current_bundle[0].opcode->pipes,
925 current_bundle[1].opcode->pipes,
926 (current_bundle_index == 3
927 ? current_bundle[2].opcode->pipes
928 : (1 << NO_PIPELINE)));
929
930 /* Find a template that works, if any. */
931 match = NULL;
932 for (i = 0; i < sizeof bundle_templates / sizeof bundle_templates[0]; i++)
933 {
934 const struct bundle_template *b = &bundle_templates[i];
935 if ((b->pipe_mask & compatible_pipes) == b->pipe_mask)
936 {
937 match = b;
938 break;
939 }
940 }
941
942 if (match == NULL)
943 {
944 current_bundle_index = 0;
945 as_bad (_("Invalid combination of instructions for bundle."));
946 return;
947 }
948
949 /* If the section seems to have no alignment set yet, go ahead and
950 make it large enough to hold code. */
951 if (bfd_get_section_alignment (stdoutput, now_seg) == 0)
952 bfd_set_section_alignment (stdoutput, now_seg,
953 TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES);
954
955 for (j = 0; j < current_bundle_index; j++)
956 current_bundle[j].pipe = match->pipe[j];
957
958 if (current_bundle_index == 2 && !tilegx_is_x_pipeline (match->pipe[0]))
959 {
960 /* We are in Y mode with only two instructions, so add an FNOP. */
961 prepend_nop_to_bundle (TILEGX_OPC_FNOP);
962
963 /* Figure out what pipe the fnop must be in via arithmetic.
964 * p0 + p1 + p2 must sum to the sum of TILEGX_PIPELINE_Y[012]. */
965 current_bundle[0].pipe =
966 (tilegx_pipeline)((TILEGX_PIPELINE_Y0
967 + TILEGX_PIPELINE_Y1
968 + TILEGX_PIPELINE_Y2) -
969 (current_bundle[1].pipe + current_bundle[2].pipe));
970 }
971
972 check_illegal_reg_writes ();
973
974 f = frag_more (TILEGX_BUNDLE_SIZE_IN_BYTES);
975
976 /* Check to see if this bundle is at an offset that is a multiple of 8-bytes
977 from the start of the frag. */
978 addr_mod = frag_now_fix () & (TILEGX_BUNDLE_ALIGNMENT_IN_BYTES - 1);
979 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
980 as_bad (_("instruction address is not a multiple of 8"));
981 frag_now->insn_addr = addr_mod;
982 frag_now->has_code = 1;
983
984 tilegx_bundle_bits bits = 0;
985 for (j = 0; j < current_bundle_index; j++)
986 {
987 struct tilegx_instruction *instr = &current_bundle[j];
988 tilegx_pipeline pipeline = instr->pipe;
989 const struct tilegx_opcode *opcode = instr->opcode;
990
991 bits |= emit_tilegx_instruction (opcode->fixed_bit_values[pipeline],
992 opcode->num_operands,
993 &opcode->operands[pipeline][0],
994 instr->operand_values,
995 f);
996 }
997
998 number_to_chars_littleendian (f, bits, 8);
999 current_bundle_index = 0;
1000
1001 /* Emit DWARF2 debugging information. */
1002 dwarf2_emit_insn (TILEGX_BUNDLE_SIZE_IN_BYTES);
1003}
1004
1005
1006/* Extend the expression parser to handle hw0(label), etc.
1007 as well as SPR names when in the context of parsing an SPR. */
1008
1009int
1010tilegx_parse_name (char *name, expressionS *e, char *nextcharP)
1011{
1012 operatorT op = O_illegal;
1013
1014 if (parsing_spr)
1015 {
1016 void* val = hash_find (spr_hash, name);
1017 if (val == NULL)
1018 return 0;
1019
1020 memset (e, 0, sizeof *e);
1021 e->X_op = O_constant;
1022 e->X_add_number = ((const struct tilegx_spr *)val)->number;
1023 return 1;
1024 }
1025
1026 if (*nextcharP != '(')
1027 {
1028 /* hw0, etc. not followed by a paren is just a label with that name. */
1029 return 0;
1030 }
1031 else
1032 {
1033 /* Look up the operator in our table. */
1034 void* val = hash_find (special_operator_hash, name);
1035 if (val == 0)
1036 return 0;
1037 op = (operatorT)(long)val;
1038 }
1039
1040 /* Restore old '(' and skip it. */
1041 *input_line_pointer = '(';
1042 ++input_line_pointer;
1043
1044 expression (e);
1045
1046 if (*input_line_pointer != ')')
1047 {
1048 as_bad (_("Missing ')'"));
1049 *nextcharP = *input_line_pointer;
1050 return 0;
1051 }
1052 /* Skip ')'. */
1053 ++input_line_pointer;
1054
1055 if (e->X_op == O_register || e->X_op == O_absent)
1056 {
1057 as_bad (_("Invalid expression."));
1058 e->X_op = O_constant;
1059 e->X_add_number = 0;
1060 }
1061 else
1062 {
1063 /* Wrap subexpression with a unary operator. */
1064 symbolS *sym = make_expr_symbol (e);
1065
1066 if (sym != e->X_add_symbol)
1067 {
1068 /* HACK: mark this symbol as a temporary wrapper around a proper
1069 expression, so we can unwrap it later once we have communicated
1070 the relocation type. */
8d1015a8 1071 symbol_get_value_expression (sym)->X_md = 1;
aa137e4d
NC		 1072 }
1073
1074 memset (e, 0, sizeof *e);
1075 e->X_op = op;
1076 e->X_add_symbol = sym;
1077 e->X_add_number = 0;
1078 }
1079
1080 *nextcharP = *input_line_pointer;
1081 return 1;
1082}
1083
1084
1085/* Parses an expression which must be a register name. */
1086
1087static void
1088parse_reg_expression (expressionS* expression)
1089{
d02603dc
NC		 1090 char *regname;
1091 char terminating_char;
1092 void *pval;
1093 int regno_and_flags;
1094 int regno;
1095
aa137e4d
NC		 1096 /* Zero everything to make sure we don't miss any flags. */
1097 memset (expression, 0, sizeof *expression);
1098
d02603dc 1099 terminating_char = get_symbol_name (&regname);
aa137e4d 1100
d02603dc 1101 pval = hash_find (main_reg_hash, regname);
aa137e4d 1102 if (pval == NULL)
d02603dc 1103 as_bad (_("Expected register, got '%s'."), regname);
aa137e4d 1104
d02603dc
NC		 1105 regno_and_flags = (int)(size_t)pval;
1106 regno = EXTRACT_REGNO(regno_and_flags);
aa137e4d
NC		 1107
1108 if ((regno_and_flags & NONCANONICAL_REG_NAME_FLAG)
1109 && require_canonical_reg_names)
d02603dc
NC		 1110 as_warn (_("Found use of non-canonical register name %s; "
1111 "use %s instead."),
1112 regname, tilegx_register_names[regno]);
aa137e4d
NC		 1113
1114 /* Restore the old character following the register name. */
d02603dc 1115 (void) restore_line_pointer (terminating_char);
aa137e4d
NC		 1116
1117 /* Fill in the expression fields to indicate it's a register. */
1118 expression->X_op = O_register;
1119 expression->X_add_number = regno;
1120}
1121
1122
1123/* Parses and type-checks comma-separated operands in input_line_pointer. */
1124
1125static void
1126parse_operands (const char *opcode_name,
1127 const unsigned char *operands,
1128 int num_operands,
1129 expressionS *operand_values)
1130{
1131 int i;
1132
1133 memset (operand_values, 0, num_operands * sizeof operand_values[0]);
1134
1135 SKIP_WHITESPACE ();
1136 for (i = 0; i < num_operands; i++)
1137 {
1138 tilegx_operand_type type = tilegx_operands[operands[i]].type;
1139
1140 SKIP_WHITESPACE ();
1141
1142 if (type == TILEGX_OP_TYPE_REGISTER)
1143 {
1144 parse_reg_expression (&operand_values[i]);
1145 }
1146 else if (*input_line_pointer == '}')
1147 {
1148 operand_values[i].X_op = O_absent;
1149 }
1150 else if (type == TILEGX_OP_TYPE_SPR)
1151 {
1152 /* Modify the expression parser to add SPRs to the namespace. */
1153 parsing_spr = 1;
1154 expression (&operand_values[i]);
1155 parsing_spr = 0;
1156 }
1157 else
1158 {
1159 expression (&operand_values[i]);
1160 }
1161
1162 SKIP_WHITESPACE ();
1163
1164 if (i + 1 < num_operands)
1165 {
1166 int separator = (unsigned char)*input_line_pointer++;
1167
1168 if (is_end_of_line[separator] || (separator == '}'))
1169 {
1170 as_bad (_("Too few operands to '%s'."), opcode_name);
1171 return;
1172 }
1173 else if (separator != ',')
1174 {
1175 as_bad (_("Unexpected character '%c' after operand %d to %s."),
1176 (char)separator, i + 1, opcode_name);
1177 return;
1178 }
1179 }
1180
1181 /* Arbitrarily use the first valid pipe to get the operand type,
1182 since they are all the same. */
1183 switch (tilegx_operands[operands[i]].type)
1184 {
1185 case TILEGX_OP_TYPE_REGISTER:
1186 /* Handled in parse_reg_expression already. */
1187 break;
1188 case TILEGX_OP_TYPE_SPR:
1189 /* Fall through */
1190 case TILEGX_OP_TYPE_IMMEDIATE:
1191 /* Fall through */
1192 case TILEGX_OP_TYPE_ADDRESS:
1193 if ( operand_values[i].X_op == O_register
1194 || operand_values[i].X_op == O_illegal
1195 || operand_values[i].X_op == O_absent)
1196 as_bad (_("Expected immediate expression"));
1197 break;
1198 default:
1199 abort();
1200 }
1201 }
1202
1203 if (!is_end_of_line[(unsigned char)*input_line_pointer])
1204 {
1205 switch (*input_line_pointer)
1206 {
1207 case '}':
1208 if (!inside_bundle)
1209 as_bad (_("Found '}' when not bundling."));
1210 ++input_line_pointer;
1211 inside_bundle = 0;
1212 demand_empty_rest_of_line ();
1213 break;
1214
1215 case ',':
1216 as_bad (_("Too many operands"));
1217 break;
1218
1219 default:
1220 /* Use default error for unrecognized garbage. */
1221 demand_empty_rest_of_line ();
1222 break;
1223 }
1224 }
1225}
1226
1227
1228/* This is the guts of the machine-dependent assembler. STR points to a
1229 machine dependent instruction. This function is supposed to emit the
1230 frags/bytes it assembles to. */
1231
1232void
1233md_assemble (char *str)
1234{
1235 char old_char;
1236 size_t opname_len;
1237 char *old_input_line_pointer;
1238 const struct tilegx_opcode *op;
1239 int first_pipe;
1240
1241 /* Split off the opcode and look it up. */
1242 opname_len = strcspn (str, " {}");
1243 old_char = str[opname_len];
1244 str[opname_len] = '\0';
1245
1246 op = hash_find(op_hash, str);
1247 str[opname_len] = old_char;
1248 if (op == NULL)
1249 {
1250 as_bad (_("Unknown opcode `%.*s'."), (int)opname_len, str);
1251 return;
1252 }
1253
1254 /* Prepare to parse the operands. */
1255 old_input_line_pointer = input_line_pointer;
1256 input_line_pointer = str + opname_len;
1257 SKIP_WHITESPACE ();
1258
1259 if (current_bundle_index == TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE)
1260 {
1261 as_bad (_("Too many instructions for bundle."));
1262 tilegx_flush_bundle ();
1263 }
1264
1265 /* Make sure we have room for the upcoming bundle before we
1266 create any fixups. Otherwise if we have to switch to a new
1267 frag the fixup dot_value fields will be wrong. */
1268 frag_grow (TILEGX_BUNDLE_SIZE_IN_BYTES);
1269
1270 /* Find a valid pipe for this opcode. */
1271 for (first_pipe = 0; (op->pipes & (1 << first_pipe)) == 0; first_pipe++)
1272 ;
1273
1274 /* Call the function that assembles this instruction. */
1275 current_bundle[current_bundle_index].opcode = op;
1276 parse_operands (op->name,
1277 &op->operands[first_pipe][0],
1278 op->num_operands,
1279 current_bundle[current_bundle_index].operand_values);
1280 ++current_bundle_index;
1281
1282 /* Restore the saved value of input_line_pointer. */
1283 input_line_pointer = old_input_line_pointer;
1284
1285 /* If we weren't inside curly braces, go ahead and emit
1286 this lone instruction as a bundle right now. */
1287 if (!inside_bundle)
1288 tilegx_flush_bundle ();
1289}
1290
1291
1292static void
1293s_require_canonical_reg_names (int require)
1294{
1295 demand_empty_rest_of_line ();
1296 require_canonical_reg_names = require;
1297}
1298
1299static void
1300s_allow_suspicious_bundles (int allow)
1301{
1302 demand_empty_rest_of_line ();
1303 allow_suspicious_bundles = allow;
1304}
1305
1306const pseudo_typeS md_pseudo_table[] =
1307{
1308 {"align", s_align_bytes, 0}, /* Defaulting is invalid (0). */
1309 {"word", cons, 4},
1310 {"require_canonical_reg_names", s_require_canonical_reg_names, 1 },
1311 {"no_require_canonical_reg_names", s_require_canonical_reg_names, 0 },
1312 {"allow_suspicious_bundles", s_allow_suspicious_bundles, 1 },
1313 {"no_allow_suspicious_bundles", s_allow_suspicious_bundles, 0 },
1314 { NULL, 0, 0 }
1315};
1316
fb6cedde
WL		 1317void
1318md_number_to_chars (char * buf, valueT val, int n)
1319{
1320 if (target_big_endian)
1321 number_to_chars_bigendian (buf, val, n);
1322 else
1323 number_to_chars_littleendian (buf, val, n);
1324}
1325
aa137e4d
NC		 1326/* Turn the string pointed to by litP into a floating point constant
1327 of type TYPE, and emit the appropriate bytes. The number of
1328 LITTLENUMS emitted is stored in *SIZEP. An error message is
1329 returned, or NULL on OK. */
1330
6d4af3c2 1331const char *
aa137e4d
NC		 1332md_atof (int type, char *litP, int *sizeP)
1333{
1334 int prec;
1335 LITTLENUM_TYPE words[MAX_LITTLENUMS];
1336 LITTLENUM_TYPE *wordP;
1337 char *t;
1338
1339 switch (type)
1340 {
1341 case 'f':
1342 case 'F':
1343 prec = 2;
1344 break;
1345
1346 case 'd':
1347 case 'D':
1348 prec = 4;
1349 break;
1350
1351 default:
1352 *sizeP = 0;
1353 return _("Bad call to md_atof ()");
1354 }
1355 t = atof_ieee (input_line_pointer, type, words);
1356 if (t)
1357 input_line_pointer = t;
1358
1359 *sizeP = prec * sizeof (LITTLENUM_TYPE);
1360 /* This loops outputs the LITTLENUMs in REVERSE order; in accord with
1361 the bigendian 386. */
1362 for (wordP = words + prec - 1; prec--;)
1363 {
1364 md_number_to_chars (litP, (valueT) (*wordP--), sizeof (LITTLENUM_TYPE));
1365 litP += sizeof (LITTLENUM_TYPE);
1366 }
1367 return 0;
1368}
1369
1370
1371/* We have no need to default values of symbols. */
1372
1373symbolS *
1374md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
1375{
1376 return NULL;
1377}
1378
1379
1380void
1381tilegx_cons_fix_new (fragS *frag,
1382 int where,
1383 int nbytes,
1384 expressionS *exp)
1385{
1386 expressionS subexp;
1387 bfd_reloc_code_real_type reloc = BFD_RELOC_NONE;
1388 int no_overflow = 0;
1389 fixS *fixP;
1390
1391 /* See if it's one of our special functions. */
1392 switch (exp->X_op)
1393 {
1394 case O_hw0:
1395 reloc = BFD_RELOC_TILEGX_HW0;
1396 no_overflow = 1;
1397 break;
1398 case O_hw1:
1399 reloc = BFD_RELOC_TILEGX_HW1;
1400 no_overflow = 1;
1401 break;
1402 case O_hw2:
1403 reloc = BFD_RELOC_TILEGX_HW2;
1404 no_overflow = 1;
1405 break;
1406 case O_hw3:
1407 reloc = BFD_RELOC_TILEGX_HW3;
1408 no_overflow = 1;
1409 break;
1410 case O_hw0_last:
1411 reloc = BFD_RELOC_TILEGX_HW0_LAST;
1412 break;
1413 case O_hw1_last:
1414 reloc = BFD_RELOC_TILEGX_HW1_LAST;
1415 break;
1416 case O_hw2_last:
1417 reloc = BFD_RELOC_TILEGX_HW2_LAST;
1418 break;
1419
1420 default:
1421 /* Do nothing. */
1422 break;
1423 }
1424
1425 if (reloc != BFD_RELOC_NONE)
1426 {
1427 if (nbytes != 2)
1428 {
1429 as_bad (_("This operator only produces two byte values."));
1430 nbytes = 2;
1431 }
1432
1433 memset (&subexp, 0, sizeof subexp);
1434 subexp.X_op = O_symbol;
1435 subexp.X_add_symbol = exp->X_add_symbol;
1436 exp = &subexp;
1437 }
1438 else
1439 {
1440 switch (nbytes)
1441 {
1442 case 1:
1443 reloc = BFD_RELOC_8;
1444 break;
1445 case 2:
1446 reloc = BFD_RELOC_16;
1447 break;
1448 case 4:
1449 reloc = BFD_RELOC_32;
1450 break;
1451 case 8:
1452 reloc = BFD_RELOC_64;
1453 break;
1454 default:
1455 as_bad (_("unsupported BFD relocation size %d"), nbytes);
1456 reloc = BFD_RELOC_64;
1457 break;
1458 }
1459 }
1460
1461 fixP = fix_new_exp (frag, where, nbytes, exp, 0, reloc);
1462 fixP->tc_fix_data = NULL;
1463 fixP->fx_no_overflow |= no_overflow;
1464}
1465
1466
1467void
1468md_apply_fix (fixS *fixP, valueT * valP, segT seg ATTRIBUTE_UNUSED)
1469{
1470 const struct tilegx_operand *operand;
1471 valueT value = *valP;
1472 operatorT special;
1473 char *p;
1474
1475 /* Leave these for the linker. */
1476 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
1477 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
1478 return;
1479
1480 if (fixP->fx_subsy != (symbolS *) NULL)
1481 {
1482 /* We can't actually support subtracting a symbol. */
1483 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
1484 }
1485
1486 /* Correct relocation types for pc-relativeness. */
1487 switch (fixP->fx_r_type)
1488 {
1489#define FIX_PCREL(rtype) \
1490 case rtype: \
1491 if (fixP->fx_pcrel) \
1492 fixP->fx_r_type = rtype##_PCREL; \
1493 break; \
1494 \
1495 case rtype##_PCREL: \
1496 if (!fixP->fx_pcrel) \
1497 fixP->fx_r_type = rtype; \
1498 break
1499
e5b95258
WL		 1500#define FIX_PLT_PCREL(rtype) \
1501 case rtype##_PLT_PCREL: \
1502 if (!fixP->fx_pcrel) \
1503 fixP->fx_r_type = rtype; \
1504 \
1505 break;
1506
aa137e4d
NC		 1507 FIX_PCREL (BFD_RELOC_8);
1508 FIX_PCREL (BFD_RELOC_16);
1509 FIX_PCREL (BFD_RELOC_32);
1510 FIX_PCREL (BFD_RELOC_64);
1511 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW0);
1512 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW0);
1513 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW1);
1514 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW1);
1515 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW2);
1516 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW2);
1517 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW3);
1518 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW3);
1519 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST);
1520 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST);
1521 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST);
1522 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST);
1523 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST);
1524 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST);
e5b95258
WL		 1525 FIX_PLT_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW0);
1526 FIX_PLT_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW0);
1527 FIX_PLT_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW1);
1528 FIX_PLT_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW1);
1529 FIX_PLT_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST);
1530 FIX_PLT_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST);
1531 FIX_PLT_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST);
1532 FIX_PLT_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST);
aa137e4d
NC		 1533
1534#undef FIX_PCREL
1535
1536 default:
1537 /* Do nothing */
1538 break;
1539 }
1540
1541 if (fixP->fx_addsy != NULL)
1542 {
1543#ifdef OBJ_ELF
1544 switch (fixP->fx_r_type)
1545 {
6f7be959
WL		 1546 case BFD_RELOC_TILEGX_IMM8_X0_TLS_ADD:
1547 case BFD_RELOC_TILEGX_IMM8_X1_TLS_ADD:
1548 case BFD_RELOC_TILEGX_IMM8_Y0_TLS_ADD:
1549 case BFD_RELOC_TILEGX_IMM8_Y1_TLS_ADD:
1550 case BFD_RELOC_TILEGX_IMM8_X0_TLS_GD_ADD:
1551 case BFD_RELOC_TILEGX_IMM8_X1_TLS_GD_ADD:
1552 case BFD_RELOC_TILEGX_IMM8_Y0_TLS_GD_ADD:
1553 case BFD_RELOC_TILEGX_IMM8_Y1_TLS_GD_ADD:
aa137e4d
NC		 1554 case BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_GD:
1555 case BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_GD:
aa137e4d
NC		 1556 case BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_GD:
1557 case BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_GD:
aa137e4d
NC		 1558 case BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_GD:
1559 case BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_GD:
6f7be959
WL		 1560 case BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_IE:
1561 case BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_IE:
1562 case BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_IE:
1563 case BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_IE:
aa137e4d
NC		 1564 case BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_IE:
1565 case BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_IE:
6f7be959
WL		 1566 case BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_LE:
1567 case BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_LE:
1568 case BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_LE:
1569 case BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_LE:
1570 case BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_LE:
1571 case BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_LE:
1572 case BFD_RELOC_TILEGX_TLS_GD_CALL:
1573 case BFD_RELOC_TILEGX_TLS_IE_LOAD:
aa137e4d
NC		 1574 case BFD_RELOC_TILEGX_TLS_DTPMOD64:
1575 case BFD_RELOC_TILEGX_TLS_DTPOFF64:
1576 case BFD_RELOC_TILEGX_TLS_TPOFF64:
1577 case BFD_RELOC_TILEGX_TLS_DTPMOD32:
1578 case BFD_RELOC_TILEGX_TLS_DTPOFF32:
1579 case BFD_RELOC_TILEGX_TLS_TPOFF32:
1580 S_SET_THREAD_LOCAL (fixP->fx_addsy);
1581 break;
1582
1583 default:
1584 /* Do nothing */
1585 break;
1586 }
1587#endif
1588 return;
1589 }
1590
1591 /* Apply hw0, etc. */
1592 special = O_illegal;
1593 switch (fixP->fx_r_type)
1594 {
1595 case BFD_RELOC_TILEGX_HW0:
1596 case BFD_RELOC_TILEGX_IMM16_X0_HW0:
1597 case BFD_RELOC_TILEGX_IMM16_X1_HW0:
1598 case BFD_RELOC_TILEGX_IMM16_X0_HW0_PCREL:
1599 case BFD_RELOC_TILEGX_IMM16_X1_HW0_PCREL:
e5b95258
WL		 1600 case BFD_RELOC_TILEGX_IMM16_X0_HW0_PLT_PCREL:
1601 case BFD_RELOC_TILEGX_IMM16_X1_HW0_PLT_PCREL:
aa137e4d
NC		 1602 special = O_hw0;
1603 break;
1604
1605 case BFD_RELOC_TILEGX_HW0_LAST:
1606 case BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST:
1607 case BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST:
1608 case BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_PCREL:
1609 case BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_PCREL:
e5b95258
WL		 1610 case BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_PLT_PCREL:
1611 case BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_PLT_PCREL:
aa137e4d
NC		 1612 special = O_hw0_last;
1613 break;
1614
1615 case BFD_RELOC_TILEGX_HW1:
1616 case BFD_RELOC_TILEGX_IMM16_X0_HW1:
1617 case BFD_RELOC_TILEGX_IMM16_X1_HW1:
1618 case BFD_RELOC_TILEGX_IMM16_X0_HW1_PCREL:
1619 case BFD_RELOC_TILEGX_IMM16_X1_HW1_PCREL:
e5b95258
WL		 1620 case BFD_RELOC_TILEGX_IMM16_X0_HW1_PLT_PCREL:
1621 case BFD_RELOC_TILEGX_IMM16_X1_HW1_PLT_PCREL:
aa137e4d
NC		 1622 special = O_hw1;
1623 break;
1624
1625 case BFD_RELOC_TILEGX_HW1_LAST:
1626 case BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST:
1627 case BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST:
1628 case BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_PCREL:
1629 case BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_PCREL:
e5b95258
WL		 1630 case BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_PLT_PCREL:
1631 case BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_PLT_PCREL:
aa137e4d
NC		 1632 special = O_hw1_last;
1633 break;
1634
1635 case BFD_RELOC_TILEGX_HW2:
1636 case BFD_RELOC_TILEGX_IMM16_X0_HW2:
1637 case BFD_RELOC_TILEGX_IMM16_X1_HW2:
1638 case BFD_RELOC_TILEGX_IMM16_X0_HW2_PCREL:
1639 case BFD_RELOC_TILEGX_IMM16_X1_HW2_PCREL:
e5b95258
WL		 1640 case BFD_RELOC_TILEGX_IMM16_X0_HW2_PLT_PCREL:
1641 case BFD_RELOC_TILEGX_IMM16_X1_HW2_PLT_PCREL:
aa137e4d
NC		 1642 special = O_hw2;
1643 break;
1644
1645 case BFD_RELOC_TILEGX_HW2_LAST:
1646 case BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST:
1647 case BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST:
1648 case BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_PCREL:
1649 case BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_PCREL:
e5b95258
WL		 1650 case BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_PLT_PCREL:
1651 case BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_PLT_PCREL:
aa137e4d
NC		 1652 special = O_hw2_last;
1653 break;
1654
1655 case BFD_RELOC_TILEGX_HW3:
1656 case BFD_RELOC_TILEGX_IMM16_X0_HW3:
1657 case BFD_RELOC_TILEGX_IMM16_X1_HW3:
1658 case BFD_RELOC_TILEGX_IMM16_X0_HW3_PCREL:
1659 case BFD_RELOC_TILEGX_IMM16_X1_HW3_PCREL:
e5b95258
WL		 1660 case BFD_RELOC_TILEGX_IMM16_X0_HW3_PLT_PCREL:
1661 case BFD_RELOC_TILEGX_IMM16_X1_HW3_PLT_PCREL:
aa137e4d
NC		 1662 special = O_hw3;
1663 break;
1664
1665 default:
1666 /* Do nothing */
1667 break;
1668 }
1669
1670 if (special != O_illegal)
1671 {
1672 *valP = value = apply_special_operator (special, value,
1673 fixP->fx_file, fixP->fx_line);
1674 }
1675
1676 p = fixP->fx_frag->fr_literal + fixP->fx_where;
1677
1678 operand = fixP->tc_fix_data;
1679 if (operand != NULL)
1680 {
1681 /* It's an instruction operand. */
1682 tilegx_bundle_bits bits =
1683 insert_operand (0, operand, value, fixP->fx_file, fixP->fx_line);
1684
1685 /* Note that we might either be writing out bits for a bundle
1686 or a static network instruction, which are different sizes, so it's
1687 important to stop touching memory once we run out of bits.
1688 ORing in values is OK since we know the existing bits for
1689 this operand are zero. */
1690 for (; bits != 0; bits >>= 8)
1691 *p++ |= (char)bits;
1692 }
1693 else
1694 {
1695 /* Some other kind of relocation. */
1696 switch (fixP->fx_r_type)
1697 {
1698 case BFD_RELOC_8:
1699 case BFD_RELOC_8_PCREL:
1700 md_number_to_chars (p, value, 1);
1701 break;
1702
1703 case BFD_RELOC_16:
1704 case BFD_RELOC_16_PCREL:
1705 md_number_to_chars (p, value, 2);
1706 break;
1707
1708 case BFD_RELOC_32:
1709 case BFD_RELOC_32_PCREL:
1710 md_number_to_chars (p, value, 4);
1711 break;
1712
1713 case BFD_RELOC_64:
1714 case BFD_RELOC_64_PCREL:
1715 md_number_to_chars (p, value, 8);
1716 break;
1717
1718 default:
1719 /* Leave it for the linker. */
1720 return;
1721 }
1722 }
1723
1724 fixP->fx_done = 1;
1725}
1726
1727
1728/* Generate the BFD reloc to be stuck in the object file from the
1729 fixup used internally in the assembler. */
1730
1731arelent *
1732tc_gen_reloc (asection *sec ATTRIBUTE_UNUSED, fixS *fixp)
1733{
1734 arelent *reloc;
1735
add39d23
TS		 1736 reloc = XNEW (arelent);
1737 reloc->sym_ptr_ptr = XNEW (asymbol *);
aa137e4d
NC		 1738 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1739 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1740
1741 /* Make sure none of our internal relocations make it this far.
1742 They'd better have been fully resolved by this point. */
1743 gas_assert ((int) fixp->fx_r_type > 0);
1744
1745 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1746 if (reloc->howto == NULL)
1747 {
1748 as_bad_where (fixp->fx_file, fixp->fx_line,
1749 _("cannot represent `%s' relocation in object file"),
1750 bfd_get_reloc_code_name (fixp->fx_r_type));
1751 return NULL;
1752 }
1753
1754 if (!fixp->fx_pcrel != !reloc->howto->pc_relative)
1755 {
1756 as_fatal (_("internal error? cannot generate `%s' relocation (%d, %d)"),
1757 bfd_get_reloc_code_name (fixp->fx_r_type),
1758 fixp->fx_pcrel, reloc->howto->pc_relative);
1759 }
1760 gas_assert (!fixp->fx_pcrel == !reloc->howto->pc_relative);
1761
1762 reloc->addend = fixp->fx_offset;
1763
1764 return reloc;
1765}
1766
1767
1768/* The location from which a PC relative jump should be calculated,
1769 given a PC relative reloc. */
1770
1771long
1772md_pcrel_from (fixS *fixP)
1773{
1774 return fixP->fx_frag->fr_address + fixP->fx_where;
1775}
1776
1777
1778/* Return 1 if it's OK to adjust a reloc by replacing the symbol with
1779 a section symbol plus some offset. */
1780int
1781tilegx_fix_adjustable (fixS *fix)
1782{
1783 /* Prevent all adjustments to global symbols */
1784 if (S_IS_EXTERNAL (fix->fx_addsy) || S_IS_WEAK (fix->fx_addsy))
1785 return 0;
1786
1787 return 1;
1788}
1789
1790
1791int
1792tilegx_unrecognized_line (int ch)
1793{
1794 switch (ch)
1795 {
1796 case '{':
1797 if (inside_bundle)
1798 {
1799 as_bad (_("Found '{' when already bundling."));
1800 }
1801 else
1802 {
1803 inside_bundle = 1;
1804 current_bundle_index = 0;
1805 }
1806 return 1;
1807
1808 case '}':
1809 if (!inside_bundle)
1810 {
1811 as_bad (_("Found '}' when not bundling."));
1812 }
1813 else
1814 {
1815 tilegx_flush_bundle ();
1816 }
1817
1818 /* Allow '{' to follow on the same line. We also allow ";;", but that
1819 happens automatically because ';' is an end of line marker. */
1820 SKIP_WHITESPACE ();
1821 if (input_line_pointer[0] == '{')
1822 {
1823 input_line_pointer++;
1824 return tilegx_unrecognized_line ('{');
1825 }
1826
1827 demand_empty_rest_of_line ();
1828 return 1;
1829
1830 default:
1831 break;
1832 }
1833
1834 /* Not a valid line. */
1835 return 0;
1836}
1837
1838
1839/* This is called from HANDLE_ALIGN in write.c. Fill in the contents
1840 of an rs_align_code fragment. */
1841
1842void
1843tilegx_handle_align (fragS *fragp)
1844{
1845 addressT bytes, fix;
1846 char *p;
1847
1848 if (fragp->fr_type != rs_align_code)
1849 return;
1850
1851 bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix;
1852 p = fragp->fr_literal + fragp->fr_fix;
1853 fix = 0;
1854
1855 /* Determine the bits for NOP. */
1856 const struct tilegx_opcode *nop_opcode =
1857 &tilegx_opcodes[TILEGX_OPC_NOP];
1858 tilegx_bundle_bits nop =
1859 ( nop_opcode->fixed_bit_values[TILEGX_PIPELINE_X0]
1860 | nop_opcode->fixed_bit_values[TILEGX_PIPELINE_X1]);
1861
1862 if ((bytes & (TILEGX_BUNDLE_SIZE_IN_BYTES - 1)) != 0)
1863 {
1864 fix = bytes & (TILEGX_BUNDLE_SIZE_IN_BYTES - 1);
1865 memset (p, 0, fix);
1866 p += fix;
1867 bytes -= fix;
1868 }
1869
1870 number_to_chars_littleendian (p, nop, 8);
1871 fragp->fr_fix += fix;
1872 fragp->fr_var = TILEGX_BUNDLE_SIZE_IN_BYTES;
1873}
1874
1875/* Standard calling conventions leave the CFA at SP on entry. */
1876void
1877tilegx_cfi_frame_initial_instructions (void)
1878{
1879 cfi_add_CFA_def_cfa_register (54);
1880}
1881
1882int
1883tc_tilegx_regname_to_dw2regnum (char *regname)
1884{
1885 int i;
1886 for (i = 0; i < TILEGX_NUM_REGISTERS; i++)
1887 {
1888 if (!strcmp (regname, tilegx_register_names[i]))
1889 return i;
1890 }
1891
1892 return -1;
1893}
GDB Binutils - Deliverables
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