projects / deliverable / binutils-gdb.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Constify more
[deliverable/binutils-gdb.git] / gas / config / tc-tilegx.c
CommitLineData
aa137e4d 1/* tc-tilegx.c -- Assemble for a Tile-Gx chip.
6f2750fe 2 Copyright (C) 2011-2016 Free Software Foundation, Inc.
aa137e4d
NC		 3
4 This file is part of GAS, the GNU Assembler.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
20
21#include "as.h"
22#include "struc-symbol.h"
23#include "subsegs.h"
24
25#include "elf/tilegx.h"
26#include "opcode/tilegx.h"
27
28#include "dwarf2dbg.h"
29#include "dw2gencfi.h"
30
31#include "safe-ctype.h"
32
33
34/* Special registers. */
35#define TREG_IDN0 57
36#define TREG_IDN1 58
37#define TREG_UDN0 59
38#define TREG_UDN1 60
39#define TREG_UDN2 61
40#define TREG_UDN3 62
41#define TREG_ZERO 63
42
43
44/* Generic assembler global variables which must be defined by all
45 targets. */
46
47/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
48int tilegx_cie_data_alignment;
49
50/* Characters which always start a comment. */
51const char comment_chars[] = "#";
52
53/* Characters which start a comment at the beginning of a line. */
54const char line_comment_chars[] = "#";
55
56/* Characters which may be used to separate multiple commands on a
57 single line. */
58const char line_separator_chars[] = ";";
59
60/* Characters which are used to indicate an exponent in a floating
61 point number. */
62const char EXP_CHARS[] = "eE";
63
64/* Characters which mean that a number is a floating point constant,
65 as in 0d1.0. */
66const char FLT_CHARS[] = "rRsSfFdDxXpP";
67
68/* Either 32 or 64. */
69static int tilegx_arch_size = 64;
70
71
72const char *
73tilegx_target_format (void)
74{
fb6cedde
WL		 75 if (target_big_endian) {
76 return tilegx_arch_size == 64 ? "elf64-tilegx-be" : "elf32-tilegx-be";
77 } else {
78 return tilegx_arch_size == 64 ? "elf64-tilegx-le" : "elf32-tilegx-le";
79 }
aa137e4d
NC		 80}
81
82
83#define OPTION_32 (OPTION_MD_BASE + 0)
84#define OPTION_64 (OPTION_MD_BASE + 1)
fb6cedde
WL		 85#define OPTION_EB (OPTION_MD_BASE + 2)
86#define OPTION_EL (OPTION_MD_BASE + 3)
aa137e4d
NC		 87
88const char *md_shortopts = "VQ:";
89
90struct option md_longopts[] =
91{
92 {"32", no_argument, NULL, OPTION_32},
93 {"64", no_argument, NULL, OPTION_64},
fb6cedde
WL		 94 {"EB", no_argument, NULL, OPTION_EB },
95 {"EL", no_argument, NULL, OPTION_EL },
aa137e4d
NC		 96 {NULL, no_argument, NULL, 0}
97};
98
99size_t md_longopts_size = sizeof (md_longopts);
100
101int
17b9d67d 102md_parse_option (int c, const char *arg ATTRIBUTE_UNUSED)
aa137e4d
NC		 103{
104 switch (c)
105 {
106 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
107 should be emitted or not. FIXME: Not implemented. */
108 case 'Q':
109 break;
110
111 /* -V: SVR4 argument to print version ID. */
112 case 'V':
113 print_version_id ();
114 break;
115
116 case OPTION_32:
117 tilegx_arch_size = 32;
118 break;
119
120 case OPTION_64:
121 tilegx_arch_size = 64;
122 break;
123
fb6cedde
WL		 124 case OPTION_EB:
125 target_big_endian = 1;
126 break;
127
128 case OPTION_EL:
129 target_big_endian = 0;
130 break;
131
aa137e4d
NC		 132 default:
133 return 0;
134 }
135
136 return 1;
137}
138
139void
140md_show_usage (FILE *stream)
141{
142 fprintf (stream, _("\
143 -Q ignored\n\
144 -V print assembler version number\n\
fb6cedde 145 -EB/-EL generate big-endian/little-endian code\n\
aa137e4d
NC		 146 --32/--64 generate 32bit/64bit code\n"));
147}
148
149
150/* Extra expression types. */
151
152#define O_hw0 O_md1
153#define O_hw1 O_md2
154#define O_hw2 O_md3
155#define O_hw3 O_md4
156#define O_hw0_last O_md5
157#define O_hw1_last O_md6
158#define O_hw2_last O_md7
159#define O_hw0_got O_md8
6f7be959
WL		 160#define O_hw0_last_got O_md9
161#define O_hw1_last_got O_md10
162#define O_plt O_md11
163#define O_hw0_tls_gd O_md12
164#define O_hw0_last_tls_gd O_md13
165#define O_hw1_last_tls_gd O_md14
166#define O_hw0_tls_ie O_md15
167#define O_hw0_last_tls_ie O_md16
168#define O_hw1_last_tls_ie O_md17
169#define O_hw0_tls_le O_md18
170#define O_hw0_last_tls_le O_md19
171#define O_hw1_last_tls_le O_md20
172#define O_tls_gd_call O_md21
173#define O_tls_gd_add O_md22
174#define O_tls_ie_load O_md23
175#define O_tls_add O_md24
e5b95258
WL		 176#define O_hw0_plt O_md25
177#define O_hw1_plt O_md26
178#define O_hw1_last_plt O_md27
179#define O_hw2_last_plt O_md28
aa137e4d
NC		 180
181static struct hash_control *special_operator_hash;
182
183/* Hash tables for instruction mnemonic lookup. */
184static struct hash_control *op_hash;
185
186/* Hash table for spr lookup. */
187static struct hash_control *spr_hash;
188
189/* True temporarily while parsing an SPR expression. This changes the
190 * namespace to include SPR names. */
191static int parsing_spr;
192
193/* Are we currently inside `{ ... }'? */
194static int inside_bundle;
195
196struct tilegx_instruction
197{
198 const struct tilegx_opcode *opcode;
199 tilegx_pipeline pipe;
200 expressionS operand_values[TILEGX_MAX_OPERANDS];
201};
202
203/* This keeps track of the current bundle being built up. */
204static struct tilegx_instruction current_bundle[TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE];
205
206/* Index in current_bundle for the next instruction to parse. */
207static int current_bundle_index;
208
209/* Allow 'r63' in addition to 'zero', etc. Normally we disallow this as
210 'zero' is not a real register, so using it accidentally would be a
211 nasty bug. For other registers, such as 'sp', code using multiple names
212 for the same physical register is excessively confusing.
213
214 The '.require_canonical_reg_names' pseudo-op turns this error on,
215 and the '.no_require_canonical_reg_names' pseudo-op turns this off.
216 By default the error is on. */
217static int require_canonical_reg_names;
218
219/* Allow bundles that do undefined or suspicious things like write
220 two different values to the same register at the same time.
221
222 The '.no_allow_suspicious_bundles' pseudo-op turns this error on,
223 and the '.allow_suspicious_bundles' pseudo-op turns this off. */
224static int allow_suspicious_bundles;
225
226
227/* A hash table of main processor registers, mapping each register name
228 to its index.
229
230 Furthermore, if the register number is greater than the number
231 of registers for that processor, the user used an illegal alias
232 for that register (e.g. r63 instead of zero), so we should generate
233 a warning. The attempted register number can be found by clearing
234 NONCANONICAL_REG_NAME_FLAG. */
235static struct hash_control *main_reg_hash;
236
237
238/* We cannot unambiguously store a 0 in a hash table and look it up,
239 so we OR in this flag to every canonical register. */
240#define CANONICAL_REG_NAME_FLAG 0x1000
241
242/* By default we disallow register aliases like r63, but we record
243 them in the hash table in case the .no_require_canonical_reg_names
244 directive is used. Noncanonical names have this value added to them. */
245#define NONCANONICAL_REG_NAME_FLAG 0x2000
246
247/* Discards flags for register hash table entries and returns the
248 reg number. */
249#define EXTRACT_REGNO(p) ((p) & 63)
250
251/* This function is called once, at assembler startup time. It should
252 set up all the tables, etc., that the MD part of the assembler will
253 need. */
254
255void
256md_begin (void)
257{
258 const struct tilegx_opcode *op;
259 int i;
82590249
WL		 260 int mach = (tilegx_arch_size == 64) ? bfd_mach_tilegx : bfd_mach_tilegx32;
261
262 if (! bfd_set_arch_mach (stdoutput, bfd_arch_tilegx, mach))
263 as_warn (_("Could not set architecture and machine"));
aa137e4d
NC		 264
265 /* Guarantee text section is aligned. */
266 bfd_set_section_alignment (stdoutput, text_section,
267 TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES);
268
269 require_canonical_reg_names = 1;
270 allow_suspicious_bundles = 0;
271 current_bundle_index = 0;
272 inside_bundle = 0;
273
274 tilegx_cie_data_alignment = (tilegx_arch_size == 64 ? -8 : -4);
275
276 /* Initialize special operator hash table. */
277 special_operator_hash = hash_new ();
278#define INSERT_SPECIAL_OP(name) \
279 hash_insert (special_operator_hash, #name, (void *)O_##name)
280
281 INSERT_SPECIAL_OP (hw0);
282 INSERT_SPECIAL_OP (hw1);
283 INSERT_SPECIAL_OP (hw2);
284 INSERT_SPECIAL_OP (hw3);
285 INSERT_SPECIAL_OP (hw0_last);
286 INSERT_SPECIAL_OP (hw1_last);
287 INSERT_SPECIAL_OP (hw2_last);
288 /* hw3_last is a convenience alias for the equivalent hw3. */
289 hash_insert (special_operator_hash, "hw3_last", (void*)O_hw3);
290 INSERT_SPECIAL_OP (hw0_got);
aa137e4d
NC		 291 INSERT_SPECIAL_OP (hw0_last_got);
292 INSERT_SPECIAL_OP (hw1_last_got);
aa137e4d
NC		 293 INSERT_SPECIAL_OP(plt);
294 INSERT_SPECIAL_OP (hw0_tls_gd);
aa137e4d
NC		 295 INSERT_SPECIAL_OP (hw0_last_tls_gd);
296 INSERT_SPECIAL_OP (hw1_last_tls_gd);
aa137e4d 297 INSERT_SPECIAL_OP (hw0_tls_ie);
aa137e4d
NC		 298 INSERT_SPECIAL_OP (hw0_last_tls_ie);
299 INSERT_SPECIAL_OP (hw1_last_tls_ie);
6f7be959
WL		 300 INSERT_SPECIAL_OP (hw0_tls_le);
301 INSERT_SPECIAL_OP (hw0_last_tls_le);
302 INSERT_SPECIAL_OP (hw1_last_tls_le);
303 INSERT_SPECIAL_OP (tls_gd_call);
304 INSERT_SPECIAL_OP (tls_gd_add);
305 INSERT_SPECIAL_OP (tls_ie_load);
306 INSERT_SPECIAL_OP (tls_add);
e5b95258
WL		 307 INSERT_SPECIAL_OP (hw0_plt);
308 INSERT_SPECIAL_OP (hw1_plt);
309 INSERT_SPECIAL_OP (hw1_last_plt);
310 INSERT_SPECIAL_OP (hw2_last_plt);
aa137e4d
NC		 311#undef INSERT_SPECIAL_OP
312
313 /* Initialize op_hash hash table. */
314 op_hash = hash_new ();
315 for (op = &tilegx_opcodes[0]; op->name != NULL; op++)
316 {
317 const char *hash_err = hash_insert (op_hash, op->name, (void *)op);
318 if (hash_err != NULL)
319 as_fatal (_("Internal Error: Can't hash %s: %s"), op->name, hash_err);
320 }
321
322 /* Initialize the spr hash table. */
323 parsing_spr = 0;
324 spr_hash = hash_new ();
325 for (i = 0; i < tilegx_num_sprs; i++)
326 hash_insert (spr_hash, tilegx_sprs[i].name,
327 (void *) &tilegx_sprs[i]);
328
329 /* Set up the main_reg_hash table. We use this instead of
330 creating a symbol in the register section to avoid ambiguities
331 with labels that have the same names as registers. */
332 main_reg_hash = hash_new ();
333 for (i = 0; i < TILEGX_NUM_REGISTERS; i++)
334 {
335 char buf[64];
336
337 hash_insert (main_reg_hash, tilegx_register_names[i],
338 (void *) (long) (i | CANONICAL_REG_NAME_FLAG));
339
340 /* See if we should insert a noncanonical alias, like r63. */
341 sprintf (buf, "r%d", i);
342 if (strcmp (buf, tilegx_register_names[i]) != 0)
343 hash_insert (main_reg_hash, xstrdup (buf),
344 (void *) (long) (i | NONCANONICAL_REG_NAME_FLAG));
345 }
346}
347
348#define BUNDLE_TEMPLATE_MASK(p0, p1, p2) \
349 ((p0) | ((p1) << 8) | ((p2) << 16))
350#define BUNDLE_TEMPLATE(p0, p1, p2) \
351 { { (p0), (p1), (p2) }, \
352 BUNDLE_TEMPLATE_MASK(1 << (p0), 1 << (p1), (1 << (p2))) \
353 }
354
355#define NO_PIPELINE TILEGX_NUM_PIPELINE_ENCODINGS
356
357struct bundle_template
358{
359 tilegx_pipeline pipe[TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE];
360 unsigned int pipe_mask;
361};
362
363static const struct bundle_template bundle_templates[] =
364{
365 /* In Y format we must always have something in Y2, since it has
366 no fnop, so this conveys that Y2 must always be used. */
367 BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y0, TILEGX_PIPELINE_Y2, NO_PIPELINE),
368 BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y1, TILEGX_PIPELINE_Y2, NO_PIPELINE),
369 BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y2, TILEGX_PIPELINE_Y0, NO_PIPELINE),
370 BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y2, TILEGX_PIPELINE_Y1, NO_PIPELINE),
371
372 /* Y format has three instructions. */
373 BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y0,TILEGX_PIPELINE_Y1,TILEGX_PIPELINE_Y2),
374 BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y0,TILEGX_PIPELINE_Y2,TILEGX_PIPELINE_Y1),
375 BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y1,TILEGX_PIPELINE_Y0,TILEGX_PIPELINE_Y2),
376 BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y1,TILEGX_PIPELINE_Y2,TILEGX_PIPELINE_Y0),
377 BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y2,TILEGX_PIPELINE_Y0,TILEGX_PIPELINE_Y1),
378 BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y2,TILEGX_PIPELINE_Y1,TILEGX_PIPELINE_Y0),
379
380 /* X format has only two instructions. */
381 BUNDLE_TEMPLATE(TILEGX_PIPELINE_X0, TILEGX_PIPELINE_X1, NO_PIPELINE),
382 BUNDLE_TEMPLATE(TILEGX_PIPELINE_X1, TILEGX_PIPELINE_X0, NO_PIPELINE)
383};
384
385
386static void
387prepend_nop_to_bundle (tilegx_mnemonic mnemonic)
388{
389 memmove (&current_bundle[1], &current_bundle[0],
390 current_bundle_index * sizeof current_bundle[0]);
391 current_bundle[0].opcode = &tilegx_opcodes[mnemonic];
392 ++current_bundle_index;
393}
394
395static tilegx_bundle_bits
396insert_operand (tilegx_bundle_bits bits,
397 const struct tilegx_operand *operand,
398 int operand_value,
3b4dbbbf 399 const char *file,
aa137e4d
NC		 400 unsigned lineno)
401{
402 /* Range-check the immediate. */
403 int num_bits = operand->num_bits;
404
405 operand_value >>= operand->rightshift;
406
407 if (bfd_check_overflow (operand->is_signed
408 ? complain_overflow_signed
409 : complain_overflow_unsigned,
410 num_bits,
411 0,
412 bfd_arch_bits_per_address (stdoutput),
413 operand_value)
414 != bfd_reloc_ok)
415 {
416 offsetT min, max;
417 if (operand->is_signed)
418 {
419 min = -(1 << (num_bits - 1));
420 max = (1 << (num_bits - 1)) - 1;
421 }
422 else
423 {
424 min = 0;
425 max = (1 << num_bits) - 1;
426 }
427 as_bad_value_out_of_range (_("operand"), operand_value, min, max,
428 file, lineno);
429 }
430
431 /* Write out the bits for the immediate. */
432 return bits | operand->insert (operand_value);
433}
434
435
436static int
3b4dbbbf
TS		 437apply_special_operator (operatorT op, offsetT num, const char *file,
438 unsigned lineno)
aa137e4d
NC		 439{
440 int ret;
441 int check_shift = -1;
442
443 switch (op)
444 {
aa137e4d
NC		 445 case O_hw0_last:
446 check_shift = 0;
447 /* Fall through. */
aa137e4d
NC		 448 case O_hw0:
449 ret = (signed short)num;
450 break;
451
aa137e4d
NC		 452 case O_hw1_last:
453 check_shift = 16;
454 /* Fall through. */
aa137e4d
NC		 455 case O_hw1:
456 ret = (signed short)(num >> 16);
457 break;
458
aa137e4d
NC		 459 case O_hw2_last:
460 check_shift = 32;
461 /* Fall through. */
aa137e4d
NC		 462 case O_hw2:
463 ret = (signed short)(num >> 32);
464 break;
465
aa137e4d
NC		 466 case O_hw3:
467 ret = (signed short)(num >> 48);
468 break;
469
470 default:
471 abort ();
472 break;
473 }
474
475 if (check_shift >= 0 && ret != (num >> check_shift))
476 {
477 as_bad_value_out_of_range (_("operand"), num,
478 ~0ULL << (check_shift + 16 - 1),
479 ~0ULL >> (64 - (check_shift + 16 - 1)),
480 file, lineno);
481 }
482
483 return ret;
484}
485
486static tilegx_bundle_bits
487emit_tilegx_instruction (tilegx_bundle_bits bits,
488 int num_operands,
489 const unsigned char *operands,
490 expressionS *operand_values,
491 char *bundle_start)
492{
493 int i;
494
495 for (i = 0; i < num_operands; i++)
496 {
497 const struct tilegx_operand *operand =
498 &tilegx_operands[operands[i]];
499 expressionS *operand_exp = &operand_values[i];
500 int is_pc_relative = operand->is_pc_relative;
501
502 if (operand_exp->X_op == O_register
503 || (operand_exp->X_op == O_constant && !is_pc_relative))
504 {
505 /* We know what the bits are right now, so insert them. */
506 bits = insert_operand (bits, operand, operand_exp->X_add_number,
507 NULL, 0);
508 }
509 else
510 {
511 bfd_reloc_code_real_type reloc = operand->default_reloc;
512 expressionS subexp;
513 int die = 0, use_subexp = 0, require_symbol = 0;
514 fixS *fixP;
515
516 /* Take an expression like hw0(x) and turn it into x with
517 a different reloc type. */
518 switch (operand_exp->X_op)
519 {
520#define HANDLE_OP16(suffix) \
521 switch (reloc) \
522 { \
523 case BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST: \
524 reloc = BFD_RELOC_TILEGX_IMM16_X0_##suffix; \
525 break; \
526 case BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST: \
527 reloc = BFD_RELOC_TILEGX_IMM16_X1_##suffix; \
528 break; \
529 default: \
530 die = 1; \
531 break; \
532 } \
533 use_subexp = 1
534
535 case O_hw0:
536 HANDLE_OP16 (HW0);
537 break;
538
539 case O_hw1:
540 HANDLE_OP16 (HW1);
541 break;
542
543 case O_hw2:
544 HANDLE_OP16 (HW2);
545 break;
546
547 case O_hw3:
548 HANDLE_OP16 (HW3);
549 break;
550
551 case O_hw0_last:
552 HANDLE_OP16 (HW0_LAST);
553 break;
554
555 case O_hw1_last:
556 HANDLE_OP16 (HW1_LAST);
557 break;
558
559 case O_hw2_last:
560 HANDLE_OP16 (HW2_LAST);
561 break;
562
563 case O_hw0_got:
564 HANDLE_OP16 (HW0_GOT);
565 require_symbol = 1;
566 break;
567
aa137e4d
NC		 568 case O_hw0_last_got:
569 HANDLE_OP16 (HW0_LAST_GOT);
570 require_symbol = 1;
571 break;
572
573 case O_hw1_last_got:
574 HANDLE_OP16 (HW1_LAST_GOT);
575 require_symbol = 1;
576 break;
577
aa137e4d
NC		 578 case O_hw0_tls_gd:
579 HANDLE_OP16 (HW0_TLS_GD);
580 require_symbol = 1;
581 break;
582
6f7be959
WL		 583 case O_hw0_last_tls_gd:
584 HANDLE_OP16 (HW0_LAST_TLS_GD);
aa137e4d
NC		 585 require_symbol = 1;
586 break;
587
6f7be959
WL		 588 case O_hw1_last_tls_gd:
589 HANDLE_OP16 (HW1_LAST_TLS_GD);
aa137e4d
NC		 590 require_symbol = 1;
591 break;
592
6f7be959
WL		 593 case O_hw0_tls_ie:
594 HANDLE_OP16 (HW0_TLS_IE);
aa137e4d
NC		 595 require_symbol = 1;
596 break;
597
6f7be959
WL		 598 case O_hw0_last_tls_ie:
599 HANDLE_OP16 (HW0_LAST_TLS_IE);
aa137e4d
NC		 600 require_symbol = 1;
601 break;
602
6f7be959
WL		 603 case O_hw1_last_tls_ie:
604 HANDLE_OP16 (HW1_LAST_TLS_IE);
aa137e4d
NC		 605 require_symbol = 1;
606 break;
607
6f7be959
WL		 608 case O_hw0_tls_le:
609 HANDLE_OP16 (HW0_TLS_LE);
aa137e4d
NC		 610 require_symbol = 1;
611 break;
612
6f7be959
WL		 613 case O_hw0_last_tls_le:
614 HANDLE_OP16 (HW0_LAST_TLS_LE);
aa137e4d
NC		 615 require_symbol = 1;
616 break;
617
6f7be959
WL		 618 case O_hw1_last_tls_le:
619 HANDLE_OP16 (HW1_LAST_TLS_LE);
aa137e4d
NC		 620 require_symbol = 1;
621 break;
622
e5b95258
WL		 623 case O_hw0_plt:
624 HANDLE_OP16 (HW0_PLT_PCREL);
625 break;
626
627 case O_hw1_plt:
628 HANDLE_OP16 (HW1_PLT_PCREL);
629 break;
630
631 case O_hw1_last_plt:
632 HANDLE_OP16 (HW1_LAST_PLT_PCREL);
633 break;
634
635 case O_hw2_last_plt:
636 HANDLE_OP16 (HW2_LAST_PLT_PCREL);
637 break;
638
6f7be959 639#undef HANDLE_OP16
aa137e4d 640
6f7be959
WL		 641 case O_plt:
642 switch (reloc)
643 {
644 case BFD_RELOC_TILEGX_JUMPOFF_X1:
645 reloc = BFD_RELOC_TILEGX_JUMPOFF_X1_PLT;
646 break;
647 default:
648 die = 1;
649 break;
650 }
651 use_subexp = 1;
aa137e4d
NC		 652 require_symbol = 1;
653 break;
654
6f7be959
WL		 655 case O_tls_gd_call:
656 switch (reloc)
657 {
658 case BFD_RELOC_TILEGX_JUMPOFF_X1:
659 reloc = BFD_RELOC_TILEGX_TLS_GD_CALL;
660 break;
661 default:
662 die = 1;
663 break;
664 }
665 use_subexp = 1;
aa137e4d
NC		 666 require_symbol = 1;
667 break;
668
6f7be959
WL		 669 case O_tls_gd_add:
670 switch (reloc)
671 {
672 case BFD_RELOC_TILEGX_IMM8_X0:
673 reloc = BFD_RELOC_TILEGX_IMM8_X0_TLS_GD_ADD;
674 break;
675 case BFD_RELOC_TILEGX_IMM8_X1:
676 reloc = BFD_RELOC_TILEGX_IMM8_X1_TLS_GD_ADD;
677 break;
678 case BFD_RELOC_TILEGX_IMM8_Y0:
679 reloc = BFD_RELOC_TILEGX_IMM8_Y0_TLS_GD_ADD;
680 break;
681 case BFD_RELOC_TILEGX_IMM8_Y1:
682 reloc = BFD_RELOC_TILEGX_IMM8_Y1_TLS_GD_ADD;
683 break;
684 default:
685 die = 1;
686 break;
687 }
688 use_subexp = 1;
aa137e4d
NC		 689 require_symbol = 1;
690 break;
691
6f7be959
WL		 692 case O_tls_ie_load:
693 switch (reloc)
694 {
695 case BFD_RELOC_TILEGX_IMM8_X1:
696 reloc = BFD_RELOC_TILEGX_TLS_IE_LOAD;
697 break;
698 default:
699 die = 1;
700 break;
701 }
702 use_subexp = 1;
aa137e4d
NC		 703 require_symbol = 1;
704 break;
705
6f7be959 706 case O_tls_add:
aa137e4d
NC		 707 switch (reloc)
708 {
6f7be959
WL		 709 case BFD_RELOC_TILEGX_IMM8_X0:
710 reloc = BFD_RELOC_TILEGX_IMM8_X0_TLS_ADD;
711 break;
712 case BFD_RELOC_TILEGX_IMM8_X1:
713 reloc = BFD_RELOC_TILEGX_IMM8_X1_TLS_ADD;
714 break;
715 case BFD_RELOC_TILEGX_IMM8_Y0:
716 reloc = BFD_RELOC_TILEGX_IMM8_Y0_TLS_ADD;
717 break;
718 case BFD_RELOC_TILEGX_IMM8_Y1:
719 reloc = BFD_RELOC_TILEGX_IMM8_Y1_TLS_ADD;
aa137e4d
NC		 720 break;
721 default:
722 die = 1;
723 break;
724 }
725 use_subexp = 1;
726 require_symbol = 1;
727 break;
728
729 default:
730 /* Do nothing. */
731 break;
732 }
733
734 if (die)
735 {
736 as_bad (_("Invalid operator for operand."));
737 }
738 else if (use_subexp)
739 {
740 /* Now that we've changed the reloc, change ha16(x) into x,
741 etc. */
742
481fe810
WL		 743 if (!operand_exp->X_add_symbol->sy_flags.sy_local_symbol
744 && operand_exp->X_add_symbol->sy_value.X_md)
aa137e4d 745 {
aa137e4d
NC		 746 /* HACK: We used X_md to mark this symbol as a fake wrapper
747 around a real expression. To unwrap it, we just grab its
748 value here. */
749 operand_exp = &operand_exp->X_add_symbol->sy_value;
e8b9f508
WL		 750
751 if (require_symbol)
752 {
753 /* Look at the expression, and reject it if it's not a
754 plain symbol. */
755 if (operand_exp->X_op != O_symbol
756 || operand_exp->X_add_number != 0)
757 as_bad (_("Operator may only be applied to symbols."));
758 }
aa137e4d
NC		 759 }
760 else
761 {
762 /* The value of this expression is an actual symbol, so
763 turn that into an expression. */
764 memset (&subexp, 0, sizeof subexp);
765 subexp.X_op = O_symbol;
766 subexp.X_add_symbol = operand_exp->X_add_symbol;
767 operand_exp = &subexp;
768 }
769 }
770
771 /* Create a fixup to handle this later. */
772 fixP = fix_new_exp (frag_now,
773 bundle_start - frag_now->fr_literal,
774 (operand->num_bits + 7) >> 3,
775 operand_exp,
776 is_pc_relative,
777 reloc);
778 fixP->tc_fix_data = operand;
779
780 /* Don't do overflow checking if we are applying a function like
781 ha16. */
782 fixP->fx_no_overflow |= use_subexp;
783 }
784 }
785 return bits;
786}
787
788
789/* Detects and complains if two instructions in current_bundle write
790 to the same register, either implicitly or explicitly, or if a
791 read-only register is written. */
792static void
793check_illegal_reg_writes (void)
794{
795 BFD_HOST_U_64_BIT all_regs_written = 0;
796 int j;
797
798 for (j = 0; j < current_bundle_index; j++)
799 {
800 const struct tilegx_instruction *instr = &current_bundle[j];
801 int k;
802 BFD_HOST_U_64_BIT regs =
803 ((BFD_HOST_U_64_BIT)1) << instr->opcode->implicitly_written_register;
804 BFD_HOST_U_64_BIT conflict;
805
806 for (k = 0; k < instr->opcode->num_operands; k++)
807 {
808 const struct tilegx_operand *operand =
809 &tilegx_operands[instr->opcode->operands[instr->pipe][k]];
810
811 if (operand->is_dest_reg)
812 {
813 int regno = instr->operand_values[k].X_add_number;
814 BFD_HOST_U_64_BIT mask = ((BFD_HOST_U_64_BIT)1) << regno;
815
816 if ((mask & ( (((BFD_HOST_U_64_BIT)1) << TREG_IDN1)
817 | (((BFD_HOST_U_64_BIT)1) << TREG_UDN1)
818 | (((BFD_HOST_U_64_BIT)1) << TREG_UDN2)
819 | (((BFD_HOST_U_64_BIT)1) << TREG_UDN3))) != 0
820 && !allow_suspicious_bundles)
821 {
822 as_bad (_("Writes to register '%s' are not allowed."),
823 tilegx_register_names[regno]);
824 }
825
826 regs |= mask;
827 }
828 }
829
830 /* Writing to the zero register doesn't count. */
831 regs &= ~(((BFD_HOST_U_64_BIT)1) << TREG_ZERO);
832
833 conflict = all_regs_written & regs;
834 if (conflict != 0 && !allow_suspicious_bundles)
835 {
836 /* Find which register caused the conflict. */
837 const char *conflicting_reg_name = "???";
838 int i;
839
840 for (i = 0; i < TILEGX_NUM_REGISTERS; i++)
841 {
842 if (((conflict >> i) & 1) != 0)
843 {
844 conflicting_reg_name = tilegx_register_names[i];
845 break;
846 }
847 }
848
849 as_bad (_("Two instructions in the same bundle both write "
850 "to register %s, which is not allowed."),
851 conflicting_reg_name);
852 }
853
854 all_regs_written |= regs;
855 }
856}
857
858
859static void
860tilegx_flush_bundle (void)
861{
862 unsigned i;
863 int j;
864 addressT addr_mod;
865 unsigned compatible_pipes;
866 const struct bundle_template *match;
867 char *f;
868
869 inside_bundle = 0;
870
871 switch (current_bundle_index)
872 {
873 case 0:
874 /* No instructions. */
875 return;
876 case 1:
877 if (current_bundle[0].opcode->can_bundle)
878 {
879 /* Simplify later logic by adding an explicit fnop. */
880 prepend_nop_to_bundle (TILEGX_OPC_FNOP);
881 }
882 else
883 {
884 /* This instruction cannot be bundled with anything else.
885 Prepend an explicit 'nop', rather than an 'fnop', because
886 fnops can be replaced by later binary-processing tools while
887 nops cannot. */
888 prepend_nop_to_bundle (TILEGX_OPC_NOP);
889 }
890 break;
891 default:
892 if (!allow_suspicious_bundles)
893 {
894 /* Make sure all instructions can be bundled with other
895 instructions. */
896 const struct tilegx_opcode *cannot_bundle = NULL;
897 bfd_boolean seen_non_nop = FALSE;
898
899 for (j = 0; j < current_bundle_index; j++)
900 {
901 const struct tilegx_opcode *op = current_bundle[j].opcode;
902
903 if (!op->can_bundle && cannot_bundle == NULL)
904 cannot_bundle = op;
905 else if (op->mnemonic != TILEGX_OPC_NOP
906 && op->mnemonic != TILEGX_OPC_INFO
907 && op->mnemonic != TILEGX_OPC_INFOL)
908 seen_non_nop = TRUE;
909 }
910
911 if (cannot_bundle != NULL && seen_non_nop)
912 {
913 current_bundle_index = 0;
914 as_bad (_("'%s' may not be bundled with other instructions."),
915 cannot_bundle->name);
916 return;
917 }
918 }
919 break;
920 }
921
922 compatible_pipes =
923 BUNDLE_TEMPLATE_MASK(current_bundle[0].opcode->pipes,
924 current_bundle[1].opcode->pipes,
925 (current_bundle_index == 3
926 ? current_bundle[2].opcode->pipes
927 : (1 << NO_PIPELINE)));
928
929 /* Find a template that works, if any. */
930 match = NULL;
931 for (i = 0; i < sizeof bundle_templates / sizeof bundle_templates[0]; i++)
932 {
933 const struct bundle_template *b = &bundle_templates[i];
934 if ((b->pipe_mask & compatible_pipes) == b->pipe_mask)
935 {
936 match = b;
937 break;
938 }
939 }
940
941 if (match == NULL)
942 {
943 current_bundle_index = 0;
944 as_bad (_("Invalid combination of instructions for bundle."));
945 return;
946 }
947
948 /* If the section seems to have no alignment set yet, go ahead and
949 make it large enough to hold code. */
950 if (bfd_get_section_alignment (stdoutput, now_seg) == 0)
951 bfd_set_section_alignment (stdoutput, now_seg,
952 TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES);
953
954 for (j = 0; j < current_bundle_index; j++)
955 current_bundle[j].pipe = match->pipe[j];
956
957 if (current_bundle_index == 2 && !tilegx_is_x_pipeline (match->pipe[0]))
958 {
959 /* We are in Y mode with only two instructions, so add an FNOP. */
960 prepend_nop_to_bundle (TILEGX_OPC_FNOP);
961
962 /* Figure out what pipe the fnop must be in via arithmetic.
963 * p0 + p1 + p2 must sum to the sum of TILEGX_PIPELINE_Y[012]. */
964 current_bundle[0].pipe =
965 (tilegx_pipeline)((TILEGX_PIPELINE_Y0
966 + TILEGX_PIPELINE_Y1
967 + TILEGX_PIPELINE_Y2) -
968 (current_bundle[1].pipe + current_bundle[2].pipe));
969 }
970
971 check_illegal_reg_writes ();
972
973 f = frag_more (TILEGX_BUNDLE_SIZE_IN_BYTES);
974
975 /* Check to see if this bundle is at an offset that is a multiple of 8-bytes
976 from the start of the frag. */
977 addr_mod = frag_now_fix () & (TILEGX_BUNDLE_ALIGNMENT_IN_BYTES - 1);
978 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
979 as_bad (_("instruction address is not a multiple of 8"));
980 frag_now->insn_addr = addr_mod;
981 frag_now->has_code = 1;
982
983 tilegx_bundle_bits bits = 0;
984 for (j = 0; j < current_bundle_index; j++)
985 {
986 struct tilegx_instruction *instr = &current_bundle[j];
987 tilegx_pipeline pipeline = instr->pipe;
988 const struct tilegx_opcode *opcode = instr->opcode;
989
990 bits |= emit_tilegx_instruction (opcode->fixed_bit_values[pipeline],
991 opcode->num_operands,
992 &opcode->operands[pipeline][0],
993 instr->operand_values,
994 f);
995 }
996
997 number_to_chars_littleendian (f, bits, 8);
998 current_bundle_index = 0;
999
1000 /* Emit DWARF2 debugging information. */
1001 dwarf2_emit_insn (TILEGX_BUNDLE_SIZE_IN_BYTES);
1002}
1003
1004
1005/* Extend the expression parser to handle hw0(label), etc.
1006 as well as SPR names when in the context of parsing an SPR. */
1007
1008int
1009tilegx_parse_name (char *name, expressionS *e, char *nextcharP)
1010{
1011 operatorT op = O_illegal;
1012
1013 if (parsing_spr)
1014 {
1015 void* val = hash_find (spr_hash, name);
1016 if (val == NULL)
1017 return 0;
1018
1019 memset (e, 0, sizeof *e);
1020 e->X_op = O_constant;
1021 e->X_add_number = ((const struct tilegx_spr *)val)->number;
1022 return 1;
1023 }
1024
1025 if (*nextcharP != '(')
1026 {
1027 /* hw0, etc. not followed by a paren is just a label with that name. */
1028 return 0;
1029 }
1030 else
1031 {
1032 /* Look up the operator in our table. */
1033 void* val = hash_find (special_operator_hash, name);
1034 if (val == 0)
1035 return 0;
1036 op = (operatorT)(long)val;
1037 }
1038
1039 /* Restore old '(' and skip it. */
1040 *input_line_pointer = '(';
1041 ++input_line_pointer;
1042
1043 expression (e);
1044
1045 if (*input_line_pointer != ')')
1046 {
1047 as_bad (_("Missing ')'"));
1048 *nextcharP = *input_line_pointer;
1049 return 0;
1050 }
1051 /* Skip ')'. */
1052 ++input_line_pointer;
1053
1054 if (e->X_op == O_register || e->X_op == O_absent)
1055 {
1056 as_bad (_("Invalid expression."));
1057 e->X_op = O_constant;
1058 e->X_add_number = 0;
1059 }
1060 else
1061 {
1062 /* Wrap subexpression with a unary operator. */
1063 symbolS *sym = make_expr_symbol (e);
1064
1065 if (sym != e->X_add_symbol)
1066 {
1067 /* HACK: mark this symbol as a temporary wrapper around a proper
1068 expression, so we can unwrap it later once we have communicated
1069 the relocation type. */
1070 sym->sy_value.X_md = 1;
1071 }
1072
1073 memset (e, 0, sizeof *e);
1074 e->X_op = op;
1075 e->X_add_symbol = sym;
1076 e->X_add_number = 0;
1077 }
1078
1079 *nextcharP = *input_line_pointer;
1080 return 1;
1081}
1082
1083
1084/* Parses an expression which must be a register name. */
1085
1086static void
1087parse_reg_expression (expressionS* expression)
1088{
d02603dc
NC		 1089 char *regname;
1090 char terminating_char;
1091 void *pval;
1092 int regno_and_flags;
1093 int regno;
1094
aa137e4d
NC		 1095 /* Zero everything to make sure we don't miss any flags. */
1096 memset (expression, 0, sizeof *expression);
1097
d02603dc 1098 terminating_char = get_symbol_name (&regname);
aa137e4d 1099
d02603dc 1100 pval = hash_find (main_reg_hash, regname);
aa137e4d 1101 if (pval == NULL)
d02603dc 1102 as_bad (_("Expected register, got '%s'."), regname);
aa137e4d 1103
d02603dc
NC		 1104 regno_and_flags = (int)(size_t)pval;
1105 regno = EXTRACT_REGNO(regno_and_flags);
aa137e4d
NC		 1106
1107 if ((regno_and_flags & NONCANONICAL_REG_NAME_FLAG)
1108 && require_canonical_reg_names)
d02603dc
NC		 1109 as_warn (_("Found use of non-canonical register name %s; "
1110 "use %s instead."),
1111 regname, tilegx_register_names[regno]);
aa137e4d
NC		 1112
1113 /* Restore the old character following the register name. */
d02603dc 1114 (void) restore_line_pointer (terminating_char);
aa137e4d
NC		 1115
1116 /* Fill in the expression fields to indicate it's a register. */
1117 expression->X_op = O_register;
1118 expression->X_add_number = regno;
1119}
1120
1121
1122/* Parses and type-checks comma-separated operands in input_line_pointer. */
1123
1124static void
1125parse_operands (const char *opcode_name,
1126 const unsigned char *operands,
1127 int num_operands,
1128 expressionS *operand_values)
1129{
1130 int i;
1131
1132 memset (operand_values, 0, num_operands * sizeof operand_values[0]);
1133
1134 SKIP_WHITESPACE ();
1135 for (i = 0; i < num_operands; i++)
1136 {
1137 tilegx_operand_type type = tilegx_operands[operands[i]].type;
1138
1139 SKIP_WHITESPACE ();
1140
1141 if (type == TILEGX_OP_TYPE_REGISTER)
1142 {
1143 parse_reg_expression (&operand_values[i]);
1144 }
1145 else if (*input_line_pointer == '}')
1146 {
1147 operand_values[i].X_op = O_absent;
1148 }
1149 else if (type == TILEGX_OP_TYPE_SPR)
1150 {
1151 /* Modify the expression parser to add SPRs to the namespace. */
1152 parsing_spr = 1;
1153 expression (&operand_values[i]);
1154 parsing_spr = 0;
1155 }
1156 else
1157 {
1158 expression (&operand_values[i]);
1159 }
1160
1161 SKIP_WHITESPACE ();
1162
1163 if (i + 1 < num_operands)
1164 {
1165 int separator = (unsigned char)*input_line_pointer++;
1166
1167 if (is_end_of_line[separator] || (separator == '}'))
1168 {
1169 as_bad (_("Too few operands to '%s'."), opcode_name);
1170 return;
1171 }
1172 else if (separator != ',')
1173 {
1174 as_bad (_("Unexpected character '%c' after operand %d to %s."),
1175 (char)separator, i + 1, opcode_name);
1176 return;
1177 }
1178 }
1179
1180 /* Arbitrarily use the first valid pipe to get the operand type,
1181 since they are all the same. */
1182 switch (tilegx_operands[operands[i]].type)
1183 {
1184 case TILEGX_OP_TYPE_REGISTER:
1185 /* Handled in parse_reg_expression already. */
1186 break;
1187 case TILEGX_OP_TYPE_SPR:
1188 /* Fall through */
1189 case TILEGX_OP_TYPE_IMMEDIATE:
1190 /* Fall through */
1191 case TILEGX_OP_TYPE_ADDRESS:
1192 if ( operand_values[i].X_op == O_register
1193 || operand_values[i].X_op == O_illegal
1194 || operand_values[i].X_op == O_absent)
1195 as_bad (_("Expected immediate expression"));
1196 break;
1197 default:
1198 abort();
1199 }
1200 }
1201
1202 if (!is_end_of_line[(unsigned char)*input_line_pointer])
1203 {
1204 switch (*input_line_pointer)
1205 {
1206 case '}':
1207 if (!inside_bundle)
1208 as_bad (_("Found '}' when not bundling."));
1209 ++input_line_pointer;
1210 inside_bundle = 0;
1211 demand_empty_rest_of_line ();
1212 break;
1213
1214 case ',':
1215 as_bad (_("Too many operands"));
1216 break;
1217
1218 default:
1219 /* Use default error for unrecognized garbage. */
1220 demand_empty_rest_of_line ();
1221 break;
1222 }
1223 }
1224}
1225
1226
1227/* This is the guts of the machine-dependent assembler. STR points to a
1228 machine dependent instruction. This function is supposed to emit the
1229 frags/bytes it assembles to. */
1230
1231void
1232md_assemble (char *str)
1233{
1234 char old_char;
1235 size_t opname_len;
1236 char *old_input_line_pointer;
1237 const struct tilegx_opcode *op;
1238 int first_pipe;
1239
1240 /* Split off the opcode and look it up. */
1241 opname_len = strcspn (str, " {}");
1242 old_char = str[opname_len];
1243 str[opname_len] = '\0';
1244
1245 op = hash_find(op_hash, str);
1246 str[opname_len] = old_char;
1247 if (op == NULL)
1248 {
1249 as_bad (_("Unknown opcode `%.*s'."), (int)opname_len, str);
1250 return;
1251 }
1252
1253 /* Prepare to parse the operands. */
1254 old_input_line_pointer = input_line_pointer;
1255 input_line_pointer = str + opname_len;
1256 SKIP_WHITESPACE ();
1257
1258 if (current_bundle_index == TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE)
1259 {
1260 as_bad (_("Too many instructions for bundle."));
1261 tilegx_flush_bundle ();
1262 }
1263
1264 /* Make sure we have room for the upcoming bundle before we
1265 create any fixups. Otherwise if we have to switch to a new
1266 frag the fixup dot_value fields will be wrong. */
1267 frag_grow (TILEGX_BUNDLE_SIZE_IN_BYTES);
1268
1269 /* Find a valid pipe for this opcode. */
1270 for (first_pipe = 0; (op->pipes & (1 << first_pipe)) == 0; first_pipe++)
1271 ;
1272
1273 /* Call the function that assembles this instruction. */
1274 current_bundle[current_bundle_index].opcode = op;
1275 parse_operands (op->name,
1276 &op->operands[first_pipe][0],
1277 op->num_operands,
1278 current_bundle[current_bundle_index].operand_values);
1279 ++current_bundle_index;
1280
1281 /* Restore the saved value of input_line_pointer. */
1282 input_line_pointer = old_input_line_pointer;
1283
1284 /* If we weren't inside curly braces, go ahead and emit
1285 this lone instruction as a bundle right now. */
1286 if (!inside_bundle)
1287 tilegx_flush_bundle ();
1288}
1289
1290
1291static void
1292s_require_canonical_reg_names (int require)
1293{
1294 demand_empty_rest_of_line ();
1295 require_canonical_reg_names = require;
1296}
1297
1298static void
1299s_allow_suspicious_bundles (int allow)
1300{
1301 demand_empty_rest_of_line ();
1302 allow_suspicious_bundles = allow;
1303}
1304
1305const pseudo_typeS md_pseudo_table[] =
1306{
1307 {"align", s_align_bytes, 0}, /* Defaulting is invalid (0). */
1308 {"word", cons, 4},
1309 {"require_canonical_reg_names", s_require_canonical_reg_names, 1 },
1310 {"no_require_canonical_reg_names", s_require_canonical_reg_names, 0 },
1311 {"allow_suspicious_bundles", s_allow_suspicious_bundles, 1 },
1312 {"no_allow_suspicious_bundles", s_allow_suspicious_bundles, 0 },
1313 { NULL, 0, 0 }
1314};
1315
1316/* Equal to MAX_PRECISION in atof-ieee.c */
1317#define MAX_LITTLENUMS 6
1318
fb6cedde
WL		 1319void
1320md_number_to_chars (char * buf, valueT val, int n)
1321{
1322 if (target_big_endian)
1323 number_to_chars_bigendian (buf, val, n);
1324 else
1325 number_to_chars_littleendian (buf, val, n);
1326}
1327
aa137e4d
NC		 1328/* Turn the string pointed to by litP into a floating point constant
1329 of type TYPE, and emit the appropriate bytes. The number of
1330 LITTLENUMS emitted is stored in *SIZEP. An error message is
1331 returned, or NULL on OK. */
1332
6d4af3c2 1333const char *
aa137e4d
NC		 1334md_atof (int type, char *litP, int *sizeP)
1335{
1336 int prec;
1337 LITTLENUM_TYPE words[MAX_LITTLENUMS];
1338 LITTLENUM_TYPE *wordP;
1339 char *t;
1340
1341 switch (type)
1342 {
1343 case 'f':
1344 case 'F':
1345 prec = 2;
1346 break;
1347
1348 case 'd':
1349 case 'D':
1350 prec = 4;
1351 break;
1352
1353 default:
1354 *sizeP = 0;
1355 return _("Bad call to md_atof ()");
1356 }
1357 t = atof_ieee (input_line_pointer, type, words);
1358 if (t)
1359 input_line_pointer = t;
1360
1361 *sizeP = prec * sizeof (LITTLENUM_TYPE);
1362 /* This loops outputs the LITTLENUMs in REVERSE order; in accord with
1363 the bigendian 386. */
1364 for (wordP = words + prec - 1; prec--;)
1365 {
1366 md_number_to_chars (litP, (valueT) (*wordP--), sizeof (LITTLENUM_TYPE));
1367 litP += sizeof (LITTLENUM_TYPE);
1368 }
1369 return 0;
1370}
1371
1372
1373/* We have no need to default values of symbols. */
1374
1375symbolS *
1376md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
1377{
1378 return NULL;
1379}
1380
1381
1382void
1383tilegx_cons_fix_new (fragS *frag,
1384 int where,
1385 int nbytes,
1386 expressionS *exp)
1387{
1388 expressionS subexp;
1389 bfd_reloc_code_real_type reloc = BFD_RELOC_NONE;
1390 int no_overflow = 0;
1391 fixS *fixP;
1392
1393 /* See if it's one of our special functions. */
1394 switch (exp->X_op)
1395 {
1396 case O_hw0:
1397 reloc = BFD_RELOC_TILEGX_HW0;
1398 no_overflow = 1;
1399 break;
1400 case O_hw1:
1401 reloc = BFD_RELOC_TILEGX_HW1;
1402 no_overflow = 1;
1403 break;
1404 case O_hw2:
1405 reloc = BFD_RELOC_TILEGX_HW2;
1406 no_overflow = 1;
1407 break;
1408 case O_hw3:
1409 reloc = BFD_RELOC_TILEGX_HW3;
1410 no_overflow = 1;
1411 break;
1412 case O_hw0_last:
1413 reloc = BFD_RELOC_TILEGX_HW0_LAST;
1414 break;
1415 case O_hw1_last:
1416 reloc = BFD_RELOC_TILEGX_HW1_LAST;
1417 break;
1418 case O_hw2_last:
1419 reloc = BFD_RELOC_TILEGX_HW2_LAST;
1420 break;
1421
1422 default:
1423 /* Do nothing. */
1424 break;
1425 }
1426
1427 if (reloc != BFD_RELOC_NONE)
1428 {
1429 if (nbytes != 2)
1430 {
1431 as_bad (_("This operator only produces two byte values."));
1432 nbytes = 2;
1433 }
1434
1435 memset (&subexp, 0, sizeof subexp);
1436 subexp.X_op = O_symbol;
1437 subexp.X_add_symbol = exp->X_add_symbol;
1438 exp = &subexp;
1439 }
1440 else
1441 {
1442 switch (nbytes)
1443 {
1444 case 1:
1445 reloc = BFD_RELOC_8;
1446 break;
1447 case 2:
1448 reloc = BFD_RELOC_16;
1449 break;
1450 case 4:
1451 reloc = BFD_RELOC_32;
1452 break;
1453 case 8:
1454 reloc = BFD_RELOC_64;
1455 break;
1456 default:
1457 as_bad (_("unsupported BFD relocation size %d"), nbytes);
1458 reloc = BFD_RELOC_64;
1459 break;
1460 }
1461 }
1462
1463 fixP = fix_new_exp (frag, where, nbytes, exp, 0, reloc);
1464 fixP->tc_fix_data = NULL;
1465 fixP->fx_no_overflow |= no_overflow;
1466}
1467
1468
1469void
1470md_apply_fix (fixS *fixP, valueT * valP, segT seg ATTRIBUTE_UNUSED)
1471{
1472 const struct tilegx_operand *operand;
1473 valueT value = *valP;
1474 operatorT special;
1475 char *p;
1476
1477 /* Leave these for the linker. */
1478 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
1479 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
1480 return;
1481
1482 if (fixP->fx_subsy != (symbolS *) NULL)
1483 {
1484 /* We can't actually support subtracting a symbol. */
1485 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
1486 }
1487
1488 /* Correct relocation types for pc-relativeness. */
1489 switch (fixP->fx_r_type)
1490 {
1491#define FIX_PCREL(rtype) \
1492 case rtype: \
1493 if (fixP->fx_pcrel) \
1494 fixP->fx_r_type = rtype##_PCREL; \
1495 break; \
1496 \
1497 case rtype##_PCREL: \
1498 if (!fixP->fx_pcrel) \
1499 fixP->fx_r_type = rtype; \
1500 break
1501
e5b95258
WL		 1502#define FIX_PLT_PCREL(rtype) \
1503 case rtype##_PLT_PCREL: \
1504 if (!fixP->fx_pcrel) \
1505 fixP->fx_r_type = rtype; \
1506 \
1507 break;
1508
aa137e4d
NC		 1509 FIX_PCREL (BFD_RELOC_8);
1510 FIX_PCREL (BFD_RELOC_16);
1511 FIX_PCREL (BFD_RELOC_32);
1512 FIX_PCREL (BFD_RELOC_64);
1513 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW0);
1514 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW0);
1515 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW1);
1516 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW1);
1517 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW2);
1518 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW2);
1519 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW3);
1520 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW3);
1521 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST);
1522 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST);
1523 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST);
1524 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST);
1525 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST);
1526 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST);
e5b95258
WL		 1527 FIX_PLT_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW0);
1528 FIX_PLT_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW0);
1529 FIX_PLT_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW1);
1530 FIX_PLT_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW1);
1531 FIX_PLT_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST);
1532 FIX_PLT_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST);
1533 FIX_PLT_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST);
1534 FIX_PLT_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST);
aa137e4d
NC		 1535
1536#undef FIX_PCREL
1537
1538 default:
1539 /* Do nothing */
1540 break;
1541 }
1542
1543 if (fixP->fx_addsy != NULL)
1544 {
1545#ifdef OBJ_ELF
1546 switch (fixP->fx_r_type)
1547 {
6f7be959
WL		 1548 case BFD_RELOC_TILEGX_IMM8_X0_TLS_ADD:
1549 case BFD_RELOC_TILEGX_IMM8_X1_TLS_ADD:
1550 case BFD_RELOC_TILEGX_IMM8_Y0_TLS_ADD:
1551 case BFD_RELOC_TILEGX_IMM8_Y1_TLS_ADD:
1552 case BFD_RELOC_TILEGX_IMM8_X0_TLS_GD_ADD:
1553 case BFD_RELOC_TILEGX_IMM8_X1_TLS_GD_ADD:
1554 case BFD_RELOC_TILEGX_IMM8_Y0_TLS_GD_ADD:
1555 case BFD_RELOC_TILEGX_IMM8_Y1_TLS_GD_ADD:
aa137e4d
NC		 1556 case BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_GD:
1557 case BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_GD:
aa137e4d
NC		 1558 case BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_GD:
1559 case BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_GD:
aa137e4d
NC		 1560 case BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_GD:
1561 case BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_GD:
6f7be959
WL		 1562 case BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_IE:
1563 case BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_IE:
1564 case BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_IE:
1565 case BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_IE:
aa137e4d
NC		 1566 case BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_IE:
1567 case BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_IE:
6f7be959
WL		 1568 case BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_LE:
1569 case BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_LE:
1570 case BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_LE:
1571 case BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_LE:
1572 case BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_LE:
1573 case BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_LE:
1574 case BFD_RELOC_TILEGX_TLS_GD_CALL:
1575 case BFD_RELOC_TILEGX_TLS_IE_LOAD:
aa137e4d
NC		 1576 case BFD_RELOC_TILEGX_TLS_DTPMOD64:
1577 case BFD_RELOC_TILEGX_TLS_DTPOFF64:
1578 case BFD_RELOC_TILEGX_TLS_TPOFF64:
1579 case BFD_RELOC_TILEGX_TLS_DTPMOD32:
1580 case BFD_RELOC_TILEGX_TLS_DTPOFF32:
1581 case BFD_RELOC_TILEGX_TLS_TPOFF32:
1582 S_SET_THREAD_LOCAL (fixP->fx_addsy);
1583 break;
1584
1585 default:
1586 /* Do nothing */
1587 break;
1588 }
1589#endif
1590 return;
1591 }
1592
1593 /* Apply hw0, etc. */
1594 special = O_illegal;
1595 switch (fixP->fx_r_type)
1596 {
1597 case BFD_RELOC_TILEGX_HW0:
1598 case BFD_RELOC_TILEGX_IMM16_X0_HW0:
1599 case BFD_RELOC_TILEGX_IMM16_X1_HW0:
1600 case BFD_RELOC_TILEGX_IMM16_X0_HW0_PCREL:
1601 case BFD_RELOC_TILEGX_IMM16_X1_HW0_PCREL:
e5b95258
WL		 1602 case BFD_RELOC_TILEGX_IMM16_X0_HW0_PLT_PCREL:
1603 case BFD_RELOC_TILEGX_IMM16_X1_HW0_PLT_PCREL:
aa137e4d
NC		 1604 special = O_hw0;
1605 break;
1606
1607 case BFD_RELOC_TILEGX_HW0_LAST:
1608 case BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST:
1609 case BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST:
1610 case BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_PCREL:
1611 case BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_PCREL:
e5b95258
WL		 1612 case BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_PLT_PCREL:
1613 case BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_PLT_PCREL:
aa137e4d
NC		 1614 special = O_hw0_last;
1615 break;
1616
1617 case BFD_RELOC_TILEGX_HW1:
1618 case BFD_RELOC_TILEGX_IMM16_X0_HW1:
1619 case BFD_RELOC_TILEGX_IMM16_X1_HW1:
1620 case BFD_RELOC_TILEGX_IMM16_X0_HW1_PCREL:
1621 case BFD_RELOC_TILEGX_IMM16_X1_HW1_PCREL:
e5b95258
WL		 1622 case BFD_RELOC_TILEGX_IMM16_X0_HW1_PLT_PCREL:
1623 case BFD_RELOC_TILEGX_IMM16_X1_HW1_PLT_PCREL:
aa137e4d
NC		 1624 special = O_hw1;
1625 break;
1626
1627 case BFD_RELOC_TILEGX_HW1_LAST:
1628 case BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST:
1629 case BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST:
1630 case BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_PCREL:
1631 case BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_PCREL:
e5b95258
WL		 1632 case BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_PLT_PCREL:
1633 case BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_PLT_PCREL:
aa137e4d
NC		 1634 special = O_hw1_last;
1635 break;
1636
1637 case BFD_RELOC_TILEGX_HW2:
1638 case BFD_RELOC_TILEGX_IMM16_X0_HW2:
1639 case BFD_RELOC_TILEGX_IMM16_X1_HW2:
1640 case BFD_RELOC_TILEGX_IMM16_X0_HW2_PCREL:
1641 case BFD_RELOC_TILEGX_IMM16_X1_HW2_PCREL:
e5b95258
WL		 1642 case BFD_RELOC_TILEGX_IMM16_X0_HW2_PLT_PCREL:
1643 case BFD_RELOC_TILEGX_IMM16_X1_HW2_PLT_PCREL:
aa137e4d
NC		 1644 special = O_hw2;
1645 break;
1646
1647 case BFD_RELOC_TILEGX_HW2_LAST:
1648 case BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST:
1649 case BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST:
1650 case BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_PCREL:
1651 case BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_PCREL:
e5b95258
WL		 1652 case BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_PLT_PCREL:
1653 case BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_PLT_PCREL:
aa137e4d
NC		 1654 special = O_hw2_last;
1655 break;
1656
1657 case BFD_RELOC_TILEGX_HW3:
1658 case BFD_RELOC_TILEGX_IMM16_X0_HW3:
1659 case BFD_RELOC_TILEGX_IMM16_X1_HW3:
1660 case BFD_RELOC_TILEGX_IMM16_X0_HW3_PCREL:
1661 case BFD_RELOC_TILEGX_IMM16_X1_HW3_PCREL:
e5b95258
WL		 1662 case BFD_RELOC_TILEGX_IMM16_X0_HW3_PLT_PCREL:
1663 case BFD_RELOC_TILEGX_IMM16_X1_HW3_PLT_PCREL:
aa137e4d
NC		 1664 special = O_hw3;
1665 break;
1666
1667 default:
1668 /* Do nothing */
1669 break;
1670 }
1671
1672 if (special != O_illegal)
1673 {
1674 *valP = value = apply_special_operator (special, value,
1675 fixP->fx_file, fixP->fx_line);
1676 }
1677
1678 p = fixP->fx_frag->fr_literal + fixP->fx_where;
1679
1680 operand = fixP->tc_fix_data;
1681 if (operand != NULL)
1682 {
1683 /* It's an instruction operand. */
1684 tilegx_bundle_bits bits =
1685 insert_operand (0, operand, value, fixP->fx_file, fixP->fx_line);
1686
1687 /* Note that we might either be writing out bits for a bundle
1688 or a static network instruction, which are different sizes, so it's
1689 important to stop touching memory once we run out of bits.
1690 ORing in values is OK since we know the existing bits for
1691 this operand are zero. */
1692 for (; bits != 0; bits >>= 8)
1693 *p++ |= (char)bits;
1694 }
1695 else
1696 {
1697 /* Some other kind of relocation. */
1698 switch (fixP->fx_r_type)
1699 {
1700 case BFD_RELOC_8:
1701 case BFD_RELOC_8_PCREL:
1702 md_number_to_chars (p, value, 1);
1703 break;
1704
1705 case BFD_RELOC_16:
1706 case BFD_RELOC_16_PCREL:
1707 md_number_to_chars (p, value, 2);
1708 break;
1709
1710 case BFD_RELOC_32:
1711 case BFD_RELOC_32_PCREL:
1712 md_number_to_chars (p, value, 4);
1713 break;
1714
1715 case BFD_RELOC_64:
1716 case BFD_RELOC_64_PCREL:
1717 md_number_to_chars (p, value, 8);
1718 break;
1719
1720 default:
1721 /* Leave it for the linker. */
1722 return;
1723 }
1724 }
1725
1726 fixP->fx_done = 1;
1727}
1728
1729
1730/* Generate the BFD reloc to be stuck in the object file from the
1731 fixup used internally in the assembler. */
1732
1733arelent *
1734tc_gen_reloc (asection *sec ATTRIBUTE_UNUSED, fixS *fixp)
1735{
1736 arelent *reloc;
1737
1738 reloc = (arelent *) xmalloc (sizeof (arelent));
1739 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
1740 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1741 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1742
1743 /* Make sure none of our internal relocations make it this far.
1744 They'd better have been fully resolved by this point. */
1745 gas_assert ((int) fixp->fx_r_type > 0);
1746
1747 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1748 if (reloc->howto == NULL)
1749 {
1750 as_bad_where (fixp->fx_file, fixp->fx_line,
1751 _("cannot represent `%s' relocation in object file"),
1752 bfd_get_reloc_code_name (fixp->fx_r_type));
1753 return NULL;
1754 }
1755
1756 if (!fixp->fx_pcrel != !reloc->howto->pc_relative)
1757 {
1758 as_fatal (_("internal error? cannot generate `%s' relocation (%d, %d)"),
1759 bfd_get_reloc_code_name (fixp->fx_r_type),
1760 fixp->fx_pcrel, reloc->howto->pc_relative);
1761 }
1762 gas_assert (!fixp->fx_pcrel == !reloc->howto->pc_relative);
1763
1764 reloc->addend = fixp->fx_offset;
1765
1766 return reloc;
1767}
1768
1769
1770/* The location from which a PC relative jump should be calculated,
1771 given a PC relative reloc. */
1772
1773long
1774md_pcrel_from (fixS *fixP)
1775{
1776 return fixP->fx_frag->fr_address + fixP->fx_where;
1777}
1778
1779
1780/* Return 1 if it's OK to adjust a reloc by replacing the symbol with
1781 a section symbol plus some offset. */
1782int
1783tilegx_fix_adjustable (fixS *fix)
1784{
1785 /* Prevent all adjustments to global symbols */
1786 if (S_IS_EXTERNAL (fix->fx_addsy) || S_IS_WEAK (fix->fx_addsy))
1787 return 0;
1788
1789 return 1;
1790}
1791
1792
1793int
1794tilegx_unrecognized_line (int ch)
1795{
1796 switch (ch)
1797 {
1798 case '{':
1799 if (inside_bundle)
1800 {
1801 as_bad (_("Found '{' when already bundling."));
1802 }
1803 else
1804 {
1805 inside_bundle = 1;
1806 current_bundle_index = 0;
1807 }
1808 return 1;
1809
1810 case '}':
1811 if (!inside_bundle)
1812 {
1813 as_bad (_("Found '}' when not bundling."));
1814 }
1815 else
1816 {
1817 tilegx_flush_bundle ();
1818 }
1819
1820 /* Allow '{' to follow on the same line. We also allow ";;", but that
1821 happens automatically because ';' is an end of line marker. */
1822 SKIP_WHITESPACE ();
1823 if (input_line_pointer[0] == '{')
1824 {
1825 input_line_pointer++;
1826 return tilegx_unrecognized_line ('{');
1827 }
1828
1829 demand_empty_rest_of_line ();
1830 return 1;
1831
1832 default:
1833 break;
1834 }
1835
1836 /* Not a valid line. */
1837 return 0;
1838}
1839
1840
1841/* This is called from HANDLE_ALIGN in write.c. Fill in the contents
1842 of an rs_align_code fragment. */
1843
1844void
1845tilegx_handle_align (fragS *fragp)
1846{
1847 addressT bytes, fix;
1848 char *p;
1849
1850 if (fragp->fr_type != rs_align_code)
1851 return;
1852
1853 bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix;
1854 p = fragp->fr_literal + fragp->fr_fix;
1855 fix = 0;
1856
1857 /* Determine the bits for NOP. */
1858 const struct tilegx_opcode *nop_opcode =
1859 &tilegx_opcodes[TILEGX_OPC_NOP];
1860 tilegx_bundle_bits nop =
1861 ( nop_opcode->fixed_bit_values[TILEGX_PIPELINE_X0]
1862 | nop_opcode->fixed_bit_values[TILEGX_PIPELINE_X1]);
1863
1864 if ((bytes & (TILEGX_BUNDLE_SIZE_IN_BYTES - 1)) != 0)
1865 {
1866 fix = bytes & (TILEGX_BUNDLE_SIZE_IN_BYTES - 1);
1867 memset (p, 0, fix);
1868 p += fix;
1869 bytes -= fix;
1870 }
1871
1872 number_to_chars_littleendian (p, nop, 8);
1873 fragp->fr_fix += fix;
1874 fragp->fr_var = TILEGX_BUNDLE_SIZE_IN_BYTES;
1875}
1876
1877/* Standard calling conventions leave the CFA at SP on entry. */
1878void
1879tilegx_cfi_frame_initial_instructions (void)
1880{
1881 cfi_add_CFA_def_cfa_register (54);
1882}
1883
1884int
1885tc_tilegx_regname_to_dw2regnum (char *regname)
1886{
1887 int i;
1888 for (i = 0; i < TILEGX_NUM_REGISTERS; i++)
1889 {
1890 if (!strcmp (regname, tilegx_register_names[i]))
1891 return i;
1892 }
1893
1894 return -1;
1895}
GDB Binutils - Deliverables
This page took 0.325604 seconds and 4 git commands to generate.