Commit | Line | Data |
---|---|---|
252b5132 | 1 | /* tc-v850.c -- Assembler code for the NEC V850 |
8ad7c533 | 2 | Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, |
20203fb9 | 3 | 2006, 2007, 2009 Free Software Foundation, Inc. |
252b5132 RH |
4 | |
5 | This file is part of GAS, the GNU Assembler. | |
6 | ||
7 | GAS is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
ec2655a6 | 9 | the Free Software Foundation; either version 3, or (at your option) |
252b5132 RH |
10 | any later version. |
11 | ||
12 | GAS is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GAS; see the file COPYING. If not, write to | |
4b4da160 NC |
19 | the Free Software Foundation, 51 Franklin Street - Fifth Floor, |
20 | Boston, MA 02110-1301, USA. */ | |
252b5132 | 21 | |
252b5132 | 22 | #include "as.h" |
3882b010 | 23 | #include "safe-ctype.h" |
28e4f854 | 24 | #include "subsegs.h" |
252b5132 | 25 | #include "opcode/v850.h" |
a8761a19 | 26 | #include "dwarf2dbg.h" |
252b5132 | 27 | |
28e4f854 KH |
28 | /* Sign-extend a 16-bit number. */ |
29 | #define SEXT16(x) ((((x) & 0xffff) ^ (~0x7fff)) + 0x8000) | |
252b5132 RH |
30 | |
31 | /* Temporarily holds the reloc in a cons expression. */ | |
a8761a19 | 32 | static bfd_reloc_code_real_type hold_cons_reloc = BFD_RELOC_UNUSED; |
252b5132 RH |
33 | |
34 | /* Set to TRUE if we want to be pedantic about signed overflows. */ | |
b34976b6 AM |
35 | static bfd_boolean warn_signed_overflows = FALSE; |
36 | static bfd_boolean warn_unsigned_overflows = FALSE; | |
252b5132 RH |
37 | |
38 | /* Indicates the target BFD machine number. */ | |
28e4f854 | 39 | static int machine = -1; |
252b5132 RH |
40 | |
41 | /* Indicates the target processor(s) for the assemble. */ | |
28e4f854 | 42 | static int processor_mask = -1; |
252b5132 RH |
43 | \f |
44 | /* Structure to hold information about predefined registers. */ | |
ea1562b3 NC |
45 | struct reg_name |
46 | { | |
28e4f854 KH |
47 | const char *name; |
48 | int value; | |
252b5132 RH |
49 | }; |
50 | ||
28e4f854 KH |
51 | /* Generic assembler global variables which must be defined by all |
52 | targets. */ | |
252b5132 | 53 | |
28e4f854 | 54 | /* Characters which always start a comment. */ |
252b5132 RH |
55 | const char comment_chars[] = "#"; |
56 | ||
57 | /* Characters which start a comment at the beginning of a line. */ | |
58 | const char line_comment_chars[] = ";#"; | |
59 | ||
28e4f854 | 60 | /* Characters which may be used to separate multiple commands on a |
252b5132 RH |
61 | single line. */ |
62 | const char line_separator_chars[] = ";"; | |
63 | ||
28e4f854 | 64 | /* Characters which are used to indicate an exponent in a floating |
252b5132 RH |
65 | point number. */ |
66 | const char EXP_CHARS[] = "eE"; | |
67 | ||
28e4f854 | 68 | /* Characters which mean that a number is a floating point constant, |
252b5132 RH |
69 | as in 0d1.0. */ |
70 | const char FLT_CHARS[] = "dD"; | |
71 | \f | |
ea1562b3 NC |
72 | const relax_typeS md_relax_table[] = |
73 | { | |
252b5132 RH |
74 | /* Conditional branches. */ |
75 | {0xff, -0x100, 2, 1}, | |
76 | {0x1fffff, -0x200000, 6, 0}, | |
77 | /* Unconditional branches. */ | |
78 | {0xff, -0x100, 2, 3}, | |
79 | {0x1fffff, -0x200000, 4, 0}, | |
80 | }; | |
81 | ||
86aba9db NC |
82 | static int v850_relax = 0; |
83 | ||
28e4f854 | 84 | /* Fixups. */ |
ea1562b3 NC |
85 | #define MAX_INSN_FIXUPS 5 |
86 | ||
87 | struct v850_fixup | |
88 | { | |
28e4f854 KH |
89 | expressionS exp; |
90 | int opindex; | |
252b5132 RH |
91 | bfd_reloc_code_real_type reloc; |
92 | }; | |
93 | ||
28e4f854 | 94 | struct v850_fixup fixups[MAX_INSN_FIXUPS]; |
252b5132 | 95 | static int fc; |
252b5132 | 96 | |
9e0665bc | 97 | struct v850_seg_entry |
252b5132 | 98 | { |
9e0665bc AM |
99 | segT s; |
100 | const char *name; | |
101 | flagword flags; | |
102 | }; | |
252b5132 | 103 | |
9e0665bc | 104 | struct v850_seg_entry v850_seg_table[] = |
252b5132 | 105 | { |
9e0665bc AM |
106 | { NULL, ".sdata", |
107 | SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS | |
108 | | SEC_SMALL_DATA }, | |
109 | { NULL, ".tdata", | |
110 | SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS }, | |
111 | { NULL, ".zdata", | |
112 | SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS }, | |
113 | { NULL, ".sbss", | |
114 | SEC_ALLOC | SEC_SMALL_DATA }, | |
115 | { NULL, ".tbss", | |
116 | SEC_ALLOC }, | |
117 | { NULL, ".zbss", | |
118 | SEC_ALLOC}, | |
119 | { NULL, ".rosdata", | |
120 | SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_READONLY | SEC_DATA | |
121 | | SEC_HAS_CONTENTS | SEC_SMALL_DATA }, | |
122 | { NULL, ".rozdata", | |
123 | SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_READONLY | SEC_DATA | |
124 | | SEC_HAS_CONTENTS }, | |
125 | { NULL, ".scommon", | |
126 | SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS | |
127 | | SEC_SMALL_DATA | SEC_IS_COMMON }, | |
128 | { NULL, ".tcommon", | |
129 | SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS | |
130 | | SEC_IS_COMMON }, | |
131 | { NULL, ".zcommon", | |
132 | SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS | |
133 | | SEC_IS_COMMON }, | |
134 | { NULL, ".call_table_data", | |
135 | SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS }, | |
136 | { NULL, ".call_table_text", | |
137 | SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_READONLY | SEC_CODE | |
138 | | SEC_HAS_CONTENTS}, | |
139 | { NULL, ".bss", | |
140 | SEC_ALLOC } | |
141 | }; | |
28e4f854 | 142 | |
9e0665bc AM |
143 | #define SDATA_SECTION 0 |
144 | #define TDATA_SECTION 1 | |
145 | #define ZDATA_SECTION 2 | |
146 | #define SBSS_SECTION 3 | |
147 | #define TBSS_SECTION 4 | |
148 | #define ZBSS_SECTION 5 | |
149 | #define ROSDATA_SECTION 6 | |
150 | #define ROZDATA_SECTION 7 | |
151 | #define SCOMMON_SECTION 8 | |
152 | #define TCOMMON_SECTION 9 | |
153 | #define ZCOMMON_SECTION 10 | |
154 | #define CALL_TABLE_DATA_SECTION 11 | |
155 | #define CALL_TABLE_TEXT_SECTION 12 | |
156 | #define BSS_SECTION 13 | |
157 | ||
9e0665bc | 158 | static void |
ea1562b3 | 159 | do_v850_seg (int i, subsegT sub) |
252b5132 | 160 | { |
9e0665bc | 161 | struct v850_seg_entry *seg = v850_seg_table + i; |
28e4f854 | 162 | |
28e4f854 | 163 | obj_elf_section_change_hook (); |
ea1562b3 | 164 | |
9e0665bc | 165 | if (seg->s != NULL) |
ea1562b3 | 166 | subseg_set (seg->s, sub); |
9e0665bc AM |
167 | else |
168 | { | |
169 | seg->s = subseg_new (seg->name, sub); | |
170 | bfd_set_section_flags (stdoutput, seg->s, seg->flags); | |
171 | if ((seg->flags & SEC_LOAD) == 0) | |
172 | seg_info (seg->s)->bss = 1; | |
173 | } | |
252b5132 RH |
174 | } |
175 | ||
9e0665bc | 176 | static void |
ea1562b3 | 177 | v850_seg (int i) |
252b5132 | 178 | { |
9e0665bc | 179 | subsegT sub = get_absolute_expression (); |
28e4f854 | 180 | |
9e0665bc | 181 | do_v850_seg (i, sub); |
252b5132 RH |
182 | demand_empty_rest_of_line (); |
183 | } | |
184 | ||
9e0665bc | 185 | static void |
ea1562b3 | 186 | v850_offset (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 187 | { |
825487fa | 188 | char *pfrag; |
252b5132 | 189 | int temp = get_absolute_expression (); |
685736be | 190 | |
825487fa | 191 | pfrag = frag_var (rs_org, 1, 1, (relax_substateT)0, (symbolS *)0, |
ec178e1b | 192 | (offsetT) temp, (char *) 0); |
825487fa | 193 | *pfrag = 0; |
28e4f854 | 194 | |
252b5132 RH |
195 | demand_empty_rest_of_line (); |
196 | } | |
197 | ||
28e4f854 KH |
198 | /* Copied from obj_elf_common() in gas/config/obj-elf.c. */ |
199 | ||
252b5132 | 200 | static void |
ea1562b3 | 201 | v850_comm (int area) |
252b5132 | 202 | { |
28e4f854 KH |
203 | char *name; |
204 | char c; | |
205 | char *p; | |
206 | int temp; | |
207 | unsigned int size; | |
208 | symbolS *symbolP; | |
209 | int have_align; | |
252b5132 RH |
210 | |
211 | name = input_line_pointer; | |
212 | c = get_symbol_end (); | |
28e4f854 KH |
213 | |
214 | /* Just after name is now '\0'. */ | |
252b5132 RH |
215 | p = input_line_pointer; |
216 | *p = c; | |
28e4f854 | 217 | |
252b5132 | 218 | SKIP_WHITESPACE (); |
28e4f854 | 219 | |
252b5132 RH |
220 | if (*input_line_pointer != ',') |
221 | { | |
222 | as_bad (_("Expected comma after symbol-name")); | |
223 | ignore_rest_of_line (); | |
224 | return; | |
225 | } | |
28e4f854 KH |
226 | |
227 | /* Skip ','. */ | |
228 | input_line_pointer++; | |
229 | ||
252b5132 RH |
230 | if ((temp = get_absolute_expression ()) < 0) |
231 | { | |
28e4f854 | 232 | /* xgettext:c-format */ |
252b5132 RH |
233 | as_bad (_(".COMMon length (%d.) < 0! Ignored."), temp); |
234 | ignore_rest_of_line (); | |
235 | return; | |
236 | } | |
28e4f854 | 237 | |
252b5132 RH |
238 | size = temp; |
239 | *p = 0; | |
240 | symbolP = symbol_find_or_make (name); | |
241 | *p = c; | |
28e4f854 | 242 | |
252b5132 RH |
243 | if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP)) |
244 | { | |
245 | as_bad (_("Ignoring attempt to re-define symbol")); | |
246 | ignore_rest_of_line (); | |
247 | return; | |
248 | } | |
28e4f854 | 249 | |
252b5132 RH |
250 | if (S_GET_VALUE (symbolP) != 0) |
251 | { | |
252 | if (S_GET_VALUE (symbolP) != size) | |
ea1562b3 NC |
253 | /* xgettext:c-format */ |
254 | as_warn (_("Length of .comm \"%s\" is already %ld. Not changed to %d."), | |
255 | S_GET_NAME (symbolP), (long) S_GET_VALUE (symbolP), size); | |
252b5132 | 256 | } |
28e4f854 KH |
257 | |
258 | know (symbol_get_frag (symbolP) == &zero_address_frag); | |
259 | ||
252b5132 RH |
260 | if (*input_line_pointer != ',') |
261 | have_align = 0; | |
262 | else | |
263 | { | |
264 | have_align = 1; | |
265 | input_line_pointer++; | |
266 | SKIP_WHITESPACE (); | |
267 | } | |
28e4f854 | 268 | |
252b5132 RH |
269 | if (! have_align || *input_line_pointer != '"') |
270 | { | |
271 | if (! have_align) | |
272 | temp = 0; | |
273 | else | |
274 | { | |
275 | temp = get_absolute_expression (); | |
28e4f854 | 276 | |
252b5132 RH |
277 | if (temp < 0) |
278 | { | |
279 | temp = 0; | |
280 | as_warn (_("Common alignment negative; 0 assumed")); | |
281 | } | |
282 | } | |
28e4f854 | 283 | |
cac58fa6 | 284 | if (symbol_get_obj (symbolP)->local) |
252b5132 | 285 | { |
28e4f854 KH |
286 | segT old_sec; |
287 | int old_subsec; | |
288 | char *pfrag; | |
289 | int align; | |
290 | flagword applicable; | |
252b5132 RH |
291 | |
292 | old_sec = now_seg; | |
293 | old_subsec = now_subseg; | |
28e4f854 | 294 | |
252b5132 | 295 | applicable = bfd_applicable_section_flags (stdoutput); |
28e4f854 | 296 | |
252b5132 | 297 | applicable &= SEC_ALLOC; |
28e4f854 | 298 | |
252b5132 RH |
299 | switch (area) |
300 | { | |
9e0665bc AM |
301 | case SCOMMON_SECTION: |
302 | do_v850_seg (SBSS_SECTION, 0); | |
252b5132 | 303 | break; |
28e4f854 | 304 | |
9e0665bc AM |
305 | case ZCOMMON_SECTION: |
306 | do_v850_seg (ZBSS_SECTION, 0); | |
252b5132 | 307 | break; |
28e4f854 | 308 | |
9e0665bc AM |
309 | case TCOMMON_SECTION: |
310 | do_v850_seg (TBSS_SECTION, 0); | |
252b5132 RH |
311 | break; |
312 | } | |
313 | ||
314 | if (temp) | |
315 | { | |
28e4f854 | 316 | /* Convert to a power of 2 alignment. */ |
252b5132 RH |
317 | for (align = 0; (temp & 1) == 0; temp >>= 1, ++align) |
318 | ; | |
28e4f854 | 319 | |
252b5132 RH |
320 | if (temp != 1) |
321 | { | |
322 | as_bad (_("Common alignment not a power of 2")); | |
323 | ignore_rest_of_line (); | |
324 | return; | |
325 | } | |
326 | } | |
327 | else | |
328 | align = 0; | |
28e4f854 | 329 | |
9e0665bc | 330 | record_alignment (now_seg, align); |
28e4f854 | 331 | |
252b5132 RH |
332 | if (align) |
333 | frag_align (align, 0, 0); | |
334 | ||
335 | switch (area) | |
336 | { | |
9e0665bc AM |
337 | case SCOMMON_SECTION: |
338 | if (S_GET_SEGMENT (symbolP) == v850_seg_table[SBSS_SECTION].s) | |
7dcc9865 | 339 | symbol_get_frag (symbolP)->fr_symbol = 0; |
252b5132 RH |
340 | break; |
341 | ||
9e0665bc AM |
342 | case ZCOMMON_SECTION: |
343 | if (S_GET_SEGMENT (symbolP) == v850_seg_table[ZBSS_SECTION].s) | |
7dcc9865 | 344 | symbol_get_frag (symbolP)->fr_symbol = 0; |
252b5132 RH |
345 | break; |
346 | ||
9e0665bc AM |
347 | case TCOMMON_SECTION: |
348 | if (S_GET_SEGMENT (symbolP) == v850_seg_table[TBSS_SECTION].s) | |
7dcc9865 | 349 | symbol_get_frag (symbolP)->fr_symbol = 0; |
252b5132 RH |
350 | break; |
351 | ||
352 | default: | |
cac58fa6 | 353 | abort (); |
252b5132 | 354 | } |
28e4f854 | 355 | |
7dcc9865 | 356 | symbol_set_frag (symbolP, frag_now); |
252b5132 RH |
357 | pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, |
358 | (offsetT) size, (char *) 0); | |
359 | *pfrag = 0; | |
360 | S_SET_SIZE (symbolP, size); | |
28e4f854 | 361 | |
252b5132 RH |
362 | switch (area) |
363 | { | |
9e0665bc AM |
364 | case SCOMMON_SECTION: |
365 | S_SET_SEGMENT (symbolP, v850_seg_table[SBSS_SECTION].s); | |
252b5132 | 366 | break; |
28e4f854 | 367 | |
9e0665bc AM |
368 | case ZCOMMON_SECTION: |
369 | S_SET_SEGMENT (symbolP, v850_seg_table[ZBSS_SECTION].s); | |
252b5132 | 370 | break; |
28e4f854 | 371 | |
9e0665bc AM |
372 | case TCOMMON_SECTION: |
373 | S_SET_SEGMENT (symbolP, v850_seg_table[TBSS_SECTION].s); | |
252b5132 | 374 | break; |
28e4f854 | 375 | |
252b5132 | 376 | default: |
28e4f854 | 377 | abort (); |
252b5132 | 378 | } |
28e4f854 | 379 | |
252b5132 | 380 | S_CLEAR_EXTERNAL (symbolP); |
28e4f854 | 381 | obj_elf_section_change_hook (); |
252b5132 RH |
382 | subseg_set (old_sec, old_subsec); |
383 | } | |
384 | else | |
385 | { | |
ec178e1b AM |
386 | segT old_sec; |
387 | int old_subsec; | |
86aba9db | 388 | |
252b5132 | 389 | allocate_common: |
ec178e1b AM |
390 | old_sec = now_seg; |
391 | old_subsec = now_subseg; | |
86aba9db | 392 | |
252b5132 RH |
393 | S_SET_VALUE (symbolP, (valueT) size); |
394 | S_SET_ALIGN (symbolP, temp); | |
395 | S_SET_EXTERNAL (symbolP); | |
28e4f854 | 396 | |
252b5132 RH |
397 | switch (area) |
398 | { | |
9e0665bc AM |
399 | case SCOMMON_SECTION: |
400 | case ZCOMMON_SECTION: | |
401 | case TCOMMON_SECTION: | |
402 | do_v850_seg (area, 0); | |
403 | S_SET_SEGMENT (symbolP, v850_seg_table[area].s); | |
252b5132 | 404 | break; |
28e4f854 | 405 | |
252b5132 | 406 | default: |
28e4f854 | 407 | abort (); |
252b5132 | 408 | } |
86aba9db NC |
409 | |
410 | obj_elf_section_change_hook (); | |
411 | subseg_set (old_sec, old_subsec); | |
252b5132 RH |
412 | } |
413 | } | |
414 | else | |
415 | { | |
416 | input_line_pointer++; | |
28e4f854 | 417 | |
252b5132 RH |
418 | /* @@ Some use the dot, some don't. Can we get some consistency?? */ |
419 | if (*input_line_pointer == '.') | |
420 | input_line_pointer++; | |
28e4f854 | 421 | |
252b5132 RH |
422 | /* @@ Some say data, some say bss. */ |
423 | if (strncmp (input_line_pointer, "bss\"", 4) | |
424 | && strncmp (input_line_pointer, "data\"", 5)) | |
425 | { | |
426 | while (*--input_line_pointer != '"') | |
427 | ; | |
428 | input_line_pointer--; | |
429 | goto bad_common_segment; | |
430 | } | |
ea1562b3 | 431 | |
252b5132 RH |
432 | while (*input_line_pointer++ != '"') |
433 | ; | |
ea1562b3 | 434 | |
252b5132 RH |
435 | goto allocate_common; |
436 | } | |
437 | ||
fed9b18a | 438 | symbol_get_bfdsym (symbolP)->flags |= BSF_OBJECT; |
252b5132 RH |
439 | |
440 | demand_empty_rest_of_line (); | |
441 | return; | |
442 | ||
443 | { | |
444 | bad_common_segment: | |
445 | p = input_line_pointer; | |
446 | while (*p && *p != '\n') | |
447 | p++; | |
448 | c = *p; | |
449 | *p = '\0'; | |
450 | as_bad (_("bad .common segment %s"), input_line_pointer + 1); | |
451 | *p = c; | |
452 | input_line_pointer = p; | |
453 | ignore_rest_of_line (); | |
454 | return; | |
455 | } | |
456 | } | |
457 | ||
9e0665bc | 458 | static void |
ea1562b3 | 459 | set_machine (int number) |
252b5132 RH |
460 | { |
461 | machine = number; | |
462 | bfd_set_arch_mach (stdoutput, TARGET_ARCH, machine); | |
463 | ||
464 | switch (machine) | |
465 | { | |
ec178e1b | 466 | case 0: processor_mask = PROCESSOR_V850; break; |
28e4f854 | 467 | case bfd_mach_v850e: processor_mask = PROCESSOR_V850E; break; |
8ad30312 | 468 | case bfd_mach_v850e1: processor_mask = PROCESSOR_V850E; break; |
252b5132 RH |
469 | } |
470 | } | |
471 | ||
86aba9db | 472 | static void |
ea1562b3 | 473 | v850_longcode (int type) |
86aba9db NC |
474 | { |
475 | expressionS ex; | |
476 | ||
477 | if (! v850_relax) | |
478 | { | |
479 | if (type == 1) | |
20203fb9 | 480 | as_warn (_(".longcall pseudo-op seen when not relaxing")); |
86aba9db | 481 | else |
20203fb9 | 482 | as_warn (_(".longjump pseudo-op seen when not relaxing")); |
86aba9db NC |
483 | } |
484 | ||
485 | expression (&ex); | |
486 | ||
487 | if (ex.X_op != O_symbol || ex.X_add_number != 0) | |
488 | { | |
20203fb9 | 489 | as_bad (_("bad .longcall format")); |
86aba9db NC |
490 | ignore_rest_of_line (); |
491 | ||
492 | return; | |
493 | } | |
494 | ||
ec178e1b | 495 | if (type == 1) |
86aba9db NC |
496 | fix_new_exp (frag_now, frag_now_fix (), 4, & ex, 1, |
497 | BFD_RELOC_V850_LONGCALL); | |
498 | else | |
499 | fix_new_exp (frag_now, frag_now_fix (), 4, & ex, 1, | |
500 | BFD_RELOC_V850_LONGJUMP); | |
501 | ||
502 | demand_empty_rest_of_line (); | |
503 | } | |
504 | ||
252b5132 | 505 | /* The target specific pseudo-ops which we support. */ |
77c6dd37 NC |
506 | const pseudo_typeS md_pseudo_table[] = |
507 | { | |
9e0665bc AM |
508 | { "sdata", v850_seg, SDATA_SECTION }, |
509 | { "tdata", v850_seg, TDATA_SECTION }, | |
510 | { "zdata", v850_seg, ZDATA_SECTION }, | |
511 | { "sbss", v850_seg, SBSS_SECTION }, | |
512 | { "tbss", v850_seg, TBSS_SECTION }, | |
513 | { "zbss", v850_seg, ZBSS_SECTION }, | |
514 | { "rosdata", v850_seg, ROSDATA_SECTION }, | |
515 | { "rozdata", v850_seg, ROZDATA_SECTION }, | |
516 | { "bss", v850_seg, BSS_SECTION }, | |
517 | { "offset", v850_offset, 0 }, | |
518 | { "word", cons, 4 }, | |
519 | { "zcomm", v850_comm, ZCOMMON_SECTION }, | |
520 | { "scomm", v850_comm, SCOMMON_SECTION }, | |
521 | { "tcomm", v850_comm, TCOMMON_SECTION }, | |
522 | { "v850", set_machine, 0 }, | |
523 | { "call_table_data", v850_seg, CALL_TABLE_DATA_SECTION }, | |
524 | { "call_table_text", v850_seg, CALL_TABLE_TEXT_SECTION }, | |
525 | { "v850e", set_machine, bfd_mach_v850e }, | |
8ad30312 | 526 | { "v850e1", set_machine, bfd_mach_v850e1 }, |
ec178e1b AM |
527 | { "longcall", v850_longcode, 1 }, |
528 | { "longjump", v850_longcode, 2 }, | |
9e0665bc | 529 | { NULL, NULL, 0 } |
252b5132 RH |
530 | }; |
531 | ||
532 | /* Opcode hash table. */ | |
533 | static struct hash_control *v850_hash; | |
534 | ||
28e4f854 | 535 | /* This table is sorted. Suitable for searching by a binary search. */ |
77c6dd37 NC |
536 | static const struct reg_name pre_defined_registers[] = |
537 | { | |
ea1562b3 NC |
538 | { "ep", 30 }, /* ep - element ptr. */ |
539 | { "gp", 4 }, /* gp - global ptr. */ | |
540 | { "hp", 2 }, /* hp - handler stack ptr. */ | |
541 | { "lp", 31 }, /* lp - link ptr. */ | |
252b5132 RH |
542 | { "r0", 0 }, |
543 | { "r1", 1 }, | |
544 | { "r10", 10 }, | |
545 | { "r11", 11 }, | |
546 | { "r12", 12 }, | |
547 | { "r13", 13 }, | |
548 | { "r14", 14 }, | |
549 | { "r15", 15 }, | |
550 | { "r16", 16 }, | |
551 | { "r17", 17 }, | |
552 | { "r18", 18 }, | |
553 | { "r19", 19 }, | |
554 | { "r2", 2 }, | |
555 | { "r20", 20 }, | |
556 | { "r21", 21 }, | |
557 | { "r22", 22 }, | |
558 | { "r23", 23 }, | |
559 | { "r24", 24 }, | |
560 | { "r25", 25 }, | |
561 | { "r26", 26 }, | |
562 | { "r27", 27 }, | |
563 | { "r28", 28 }, | |
564 | { "r29", 29 }, | |
565 | { "r3", 3 }, | |
566 | { "r30", 30 }, | |
567 | { "r31", 31 }, | |
568 | { "r4", 4 }, | |
569 | { "r5", 5 }, | |
570 | { "r6", 6 }, | |
571 | { "r7", 7 }, | |
572 | { "r8", 8 }, | |
573 | { "r9", 9 }, | |
ea1562b3 NC |
574 | { "sp", 3 }, /* sp - stack ptr. */ |
575 | { "tp", 5 }, /* tp - text ptr. */ | |
252b5132 RH |
576 | { "zero", 0 }, |
577 | }; | |
252b5132 | 578 | |
28e4f854 KH |
579 | #define REG_NAME_CNT \ |
580 | (sizeof (pre_defined_registers) / sizeof (struct reg_name)) | |
252b5132 | 581 | |
77c6dd37 NC |
582 | static const struct reg_name system_registers[] = |
583 | { | |
584 | { "asid", 23 }, | |
585 | { "bpc", 22 }, | |
586 | { "bpav", 24 }, | |
587 | { "bpam", 25 }, | |
588 | { "bpdv", 26 }, | |
589 | { "bpdm", 27 }, | |
252b5132 RH |
590 | { "ctbp", 20 }, |
591 | { "ctpc", 16 }, | |
592 | { "ctpsw", 17 }, | |
593 | { "dbpc", 18 }, | |
594 | { "dbpsw", 19 }, | |
77c6dd37 | 595 | { "dir", 21 }, |
252b5132 RH |
596 | { "ecr", 4 }, |
597 | { "eipc", 0 }, | |
598 | { "eipsw", 1 }, | |
599 | { "fepc", 2 }, | |
600 | { "fepsw", 3 }, | |
601 | { "psw", 5 }, | |
602 | }; | |
28e4f854 KH |
603 | |
604 | #define SYSREG_NAME_CNT \ | |
605 | (sizeof (system_registers) / sizeof (struct reg_name)) | |
252b5132 | 606 | |
77c6dd37 NC |
607 | static const struct reg_name system_list_registers[] = |
608 | { | |
252b5132 RH |
609 | {"PS", 5 }, |
610 | {"SR", 0 + 1} | |
611 | }; | |
28e4f854 KH |
612 | |
613 | #define SYSREGLIST_NAME_CNT \ | |
614 | (sizeof (system_list_registers) / sizeof (struct reg_name)) | |
252b5132 | 615 | |
77c6dd37 NC |
616 | static const struct reg_name cc_names[] = |
617 | { | |
252b5132 RH |
618 | { "c", 0x1 }, |
619 | { "e", 0x2 }, | |
620 | { "ge", 0xe }, | |
621 | { "gt", 0xf }, | |
622 | { "h", 0xb }, | |
623 | { "l", 0x1 }, | |
624 | { "le", 0x7 }, | |
625 | { "lt", 0x6 }, | |
626 | { "n", 0x4 }, | |
627 | { "nc", 0x9 }, | |
628 | { "ne", 0xa }, | |
629 | { "nh", 0x3 }, | |
630 | { "nl", 0x9 }, | |
631 | { "ns", 0xc }, | |
632 | { "nv", 0x8 }, | |
633 | { "nz", 0xa }, | |
634 | { "p", 0xc }, | |
635 | { "s", 0x4 }, | |
636 | { "sa", 0xd }, | |
637 | { "t", 0x5 }, | |
638 | { "v", 0x0 }, | |
639 | { "z", 0x2 }, | |
640 | }; | |
252b5132 | 641 | |
28e4f854 KH |
642 | #define CC_NAME_CNT \ |
643 | (sizeof (cc_names) / sizeof (struct reg_name)) | |
644 | ||
645 | /* Do a binary search of the given register table to see if NAME is a | |
646 | valid regiter name. Return the register number from the array on | |
647 | success, or -1 on failure. */ | |
252b5132 RH |
648 | |
649 | static int | |
ea1562b3 NC |
650 | reg_name_search (const struct reg_name *regs, |
651 | int regcount, | |
652 | const char *name, | |
653 | bfd_boolean accept_numbers) | |
252b5132 RH |
654 | { |
655 | int middle, low, high; | |
656 | int cmp; | |
28e4f854 | 657 | symbolS *symbolP; |
252b5132 RH |
658 | |
659 | /* If the register name is a symbol, then evaluate it. */ | |
660 | if ((symbolP = symbol_find (name)) != NULL) | |
661 | { | |
662 | /* If the symbol is an alias for another name then use that. | |
663 | If the symbol is an alias for a number, then return the number. */ | |
a77f5182 | 664 | if (symbol_equated_p (symbolP)) |
ea1562b3 NC |
665 | name |
666 | = S_GET_NAME (symbol_get_value_expression (symbolP)->X_add_symbol); | |
252b5132 RH |
667 | else if (accept_numbers) |
668 | { | |
669 | int reg = S_GET_VALUE (symbolP); | |
28e4f854 | 670 | |
252b5132 RH |
671 | if (reg >= 0 && reg <= 31) |
672 | return reg; | |
673 | } | |
674 | ||
675 | /* Otherwise drop through and try parsing name normally. */ | |
676 | } | |
28e4f854 | 677 | |
252b5132 RH |
678 | low = 0; |
679 | high = regcount - 1; | |
680 | ||
681 | do | |
682 | { | |
683 | middle = (low + high) / 2; | |
684 | cmp = strcasecmp (name, regs[middle].name); | |
685 | if (cmp < 0) | |
686 | high = middle - 1; | |
687 | else if (cmp > 0) | |
688 | low = middle + 1; | |
689 | else | |
690 | return regs[middle].value; | |
691 | } | |
692 | while (low <= high); | |
693 | return -1; | |
694 | } | |
695 | ||
252b5132 | 696 | /* Summary of register_name(). |
ec178e1b | 697 | |
77c6dd37 | 698 | in: Input_line_pointer points to 1st char of operand. |
ec178e1b | 699 | |
77c6dd37 NC |
700 | out: An expressionS. |
701 | The operand may have been a register: in this case, X_op == O_register, | |
702 | X_add_number is set to the register number, and truth is returned. | |
703 | Input_line_pointer->(next non-blank) char after operand, or is in | |
704 | its original state. */ | |
28e4f854 | 705 | |
b34976b6 | 706 | static bfd_boolean |
ea1562b3 | 707 | register_name (expressionS *expressionP) |
252b5132 | 708 | { |
28e4f854 KH |
709 | int reg_number; |
710 | char *name; | |
711 | char *start; | |
712 | char c; | |
252b5132 | 713 | |
28e4f854 | 714 | /* Find the spelling of the operand. */ |
252b5132 RH |
715 | start = name = input_line_pointer; |
716 | ||
717 | c = get_symbol_end (); | |
718 | ||
719 | reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, | |
720 | name, FALSE); | |
721 | ||
28e4f854 KH |
722 | /* Put back the delimiting char. */ |
723 | *input_line_pointer = c; | |
724 | ||
725 | /* Look to see if it's in the register table. */ | |
726 | if (reg_number >= 0) | |
252b5132 | 727 | { |
ec178e1b | 728 | expressionP->X_op = O_register; |
252b5132 RH |
729 | expressionP->X_add_number = reg_number; |
730 | ||
28e4f854 | 731 | /* Make the rest nice. */ |
252b5132 RH |
732 | expressionP->X_add_symbol = NULL; |
733 | expressionP->X_op_symbol = NULL; | |
28e4f854 | 734 | |
b34976b6 | 735 | return TRUE; |
252b5132 RH |
736 | } |
737 | else | |
738 | { | |
28e4f854 | 739 | /* Reset the line as if we had not done anything. */ |
252b5132 | 740 | input_line_pointer = start; |
28e4f854 | 741 | |
b34976b6 | 742 | return FALSE; |
252b5132 RH |
743 | } |
744 | } | |
745 | ||
746 | /* Summary of system_register_name(). | |
ec178e1b | 747 | |
77c6dd37 | 748 | in: INPUT_LINE_POINTER points to 1st char of operand. |
ec178e1b AM |
749 | EXPRESSIONP points to an expression structure to be filled in. |
750 | ACCEPT_NUMBERS is true iff numerical register names may be used. | |
751 | ACCEPT_LIST_NAMES is true iff the special names PS and SR may be | |
752 | accepted. | |
753 | ||
77c6dd37 NC |
754 | out: An expressionS structure in expressionP. |
755 | The operand may have been a register: in this case, X_op == O_register, | |
756 | X_add_number is set to the register number, and truth is returned. | |
757 | Input_line_pointer->(next non-blank) char after operand, or is in | |
758 | its original state. */ | |
28e4f854 | 759 | |
b34976b6 | 760 | static bfd_boolean |
ea1562b3 NC |
761 | system_register_name (expressionS *expressionP, |
762 | bfd_boolean accept_numbers, | |
763 | bfd_boolean accept_list_names) | |
252b5132 | 764 | { |
28e4f854 KH |
765 | int reg_number; |
766 | char *name; | |
767 | char *start; | |
768 | char c; | |
252b5132 | 769 | |
28e4f854 | 770 | /* Find the spelling of the operand. */ |
252b5132 RH |
771 | start = name = input_line_pointer; |
772 | ||
773 | c = get_symbol_end (); | |
774 | reg_number = reg_name_search (system_registers, SYSREG_NAME_CNT, name, | |
775 | accept_numbers); | |
776 | ||
28e4f854 KH |
777 | /* Put back the delimiting char. */ |
778 | *input_line_pointer = c; | |
779 | ||
252b5132 RH |
780 | if (reg_number < 0 |
781 | && accept_numbers) | |
782 | { | |
28e4f854 KH |
783 | /* Reset input_line pointer. */ |
784 | input_line_pointer = start; | |
252b5132 | 785 | |
3882b010 | 786 | if (ISDIGIT (*input_line_pointer)) |
252b5132 | 787 | { |
28e4f854 | 788 | reg_number = strtol (input_line_pointer, &input_line_pointer, 10); |
252b5132 | 789 | |
28e4f854 KH |
790 | /* Make sure that the register number is allowable. */ |
791 | if (reg_number < 0 | |
5480ccf3 | 792 | || (reg_number > 5 && reg_number < 16) |
77c6dd37 | 793 | || reg_number > 27) |
ea1562b3 | 794 | reg_number = -1; |
252b5132 RH |
795 | } |
796 | else if (accept_list_names) | |
797 | { | |
798 | c = get_symbol_end (); | |
799 | reg_number = reg_name_search (system_list_registers, | |
800 | SYSREGLIST_NAME_CNT, name, FALSE); | |
801 | ||
28e4f854 KH |
802 | /* Put back the delimiting char. */ |
803 | *input_line_pointer = c; | |
252b5132 RH |
804 | } |
805 | } | |
28e4f854 KH |
806 | |
807 | /* Look to see if it's in the register table. */ | |
808 | if (reg_number >= 0) | |
252b5132 | 809 | { |
ec178e1b | 810 | expressionP->X_op = O_register; |
252b5132 RH |
811 | expressionP->X_add_number = reg_number; |
812 | ||
28e4f854 | 813 | /* Make the rest nice. */ |
252b5132 RH |
814 | expressionP->X_add_symbol = NULL; |
815 | expressionP->X_op_symbol = NULL; | |
816 | ||
b34976b6 | 817 | return TRUE; |
252b5132 RH |
818 | } |
819 | else | |
820 | { | |
28e4f854 | 821 | /* Reset the line as if we had not done anything. */ |
252b5132 | 822 | input_line_pointer = start; |
28e4f854 | 823 | |
b34976b6 | 824 | return FALSE; |
252b5132 RH |
825 | } |
826 | } | |
827 | ||
828 | /* Summary of cc_name(). | |
ec178e1b | 829 | |
77c6dd37 | 830 | in: INPUT_LINE_POINTER points to 1st char of operand. |
ec178e1b | 831 | |
77c6dd37 NC |
832 | out: An expressionS. |
833 | The operand may have been a register: in this case, X_op == O_register, | |
834 | X_add_number is set to the register number, and truth is returned. | |
835 | Input_line_pointer->(next non-blank) char after operand, or is in | |
836 | its original state. */ | |
28e4f854 | 837 | |
b34976b6 | 838 | static bfd_boolean |
ea1562b3 | 839 | cc_name (expressionS *expressionP) |
252b5132 | 840 | { |
28e4f854 KH |
841 | int reg_number; |
842 | char *name; | |
843 | char *start; | |
844 | char c; | |
252b5132 | 845 | |
28e4f854 | 846 | /* Find the spelling of the operand. */ |
252b5132 RH |
847 | start = name = input_line_pointer; |
848 | ||
849 | c = get_symbol_end (); | |
850 | reg_number = reg_name_search (cc_names, CC_NAME_CNT, name, FALSE); | |
851 | ||
28e4f854 KH |
852 | /* Put back the delimiting char. */ |
853 | *input_line_pointer = c; | |
854 | ||
855 | /* Look to see if it's in the register table. */ | |
856 | if (reg_number >= 0) | |
252b5132 | 857 | { |
ec178e1b | 858 | expressionP->X_op = O_constant; |
252b5132 RH |
859 | expressionP->X_add_number = reg_number; |
860 | ||
28e4f854 | 861 | /* Make the rest nice. */ |
252b5132 RH |
862 | expressionP->X_add_symbol = NULL; |
863 | expressionP->X_op_symbol = NULL; | |
864 | ||
b34976b6 | 865 | return TRUE; |
252b5132 RH |
866 | } |
867 | else | |
868 | { | |
28e4f854 | 869 | /* Reset the line as if we had not done anything. */ |
252b5132 | 870 | input_line_pointer = start; |
28e4f854 | 871 | |
b34976b6 | 872 | return FALSE; |
252b5132 RH |
873 | } |
874 | } | |
875 | ||
876 | static void | |
ea1562b3 | 877 | skip_white_space (void) |
252b5132 | 878 | { |
28e4f854 KH |
879 | while (*input_line_pointer == ' ' |
880 | || *input_line_pointer == '\t') | |
881 | ++input_line_pointer; | |
252b5132 RH |
882 | } |
883 | ||
884 | /* Summary of parse_register_list (). | |
ec178e1b | 885 | |
77c6dd37 | 886 | in: INPUT_LINE_POINTER points to 1st char of a list of registers. |
ec178e1b AM |
887 | INSN is the partially constructed instruction. |
888 | OPERAND is the operand being inserted. | |
889 | ||
77c6dd37 | 890 | out: NULL if the parse completed successfully, otherwise a |
ec178e1b AM |
891 | pointer to an error message is returned. If the parse |
892 | completes the correct bit fields in the instruction | |
893 | will be filled in. | |
894 | ||
77c6dd37 | 895 | Parses register lists with the syntax: |
ec178e1b | 896 | |
77c6dd37 NC |
897 | { rX } |
898 | { rX, rY } | |
899 | { rX - rY } | |
900 | { rX - rY, rZ } | |
901 | etc | |
ec178e1b | 902 | |
33b7f697 | 903 | and also parses constant expressions whoes bits indicate the |
77c6dd37 | 904 | registers in the lists. The LSB in the expression refers to |
33b7f697 | 905 | the lowest numbered permissible register in the register list, |
77c6dd37 NC |
906 | and so on upwards. System registers are considered to be very |
907 | high numbers. */ | |
28e4f854 | 908 | |
252b5132 | 909 | static char * |
ea1562b3 NC |
910 | parse_register_list (unsigned long *insn, |
911 | const struct v850_operand *operand) | |
252b5132 | 912 | { |
ea1562b3 NC |
913 | static int type1_regs[32] = |
914 | { | |
28e4f854 KH |
915 | 30, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, |
916 | 0, 0, 0, 0, 0, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24 | |
917 | }; | |
ea1562b3 NC |
918 | static int type2_regs[32] = |
919 | { | |
28e4f854 KH |
920 | 19, 18, 17, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, |
921 | 0, 0, 0, 0, 30, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24 | |
922 | }; | |
ea1562b3 NC |
923 | static int type3_regs[32] = |
924 | { | |
28e4f854 KH |
925 | 3, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, |
926 | 0, 0, 0, 0, 14, 15, 13, 12, 7, 6, 5, 4, 11, 10, 9, 8 | |
927 | }; | |
928 | int *regs; | |
252b5132 RH |
929 | expressionS exp; |
930 | ||
28e4f854 | 931 | /* Select a register array to parse. */ |
252b5132 RH |
932 | switch (operand->shift) |
933 | { | |
934 | case 0xffe00001: regs = type1_regs; break; | |
935 | case 0xfff8000f: regs = type2_regs; break; | |
936 | case 0xfff8001f: regs = type3_regs; break; | |
937 | default: | |
938 | as_bad (_("unknown operand shift: %x\n"), operand->shift); | |
939 | return _("internal failure in parse_register_list"); | |
940 | } | |
941 | ||
942 | skip_white_space (); | |
943 | ||
944 | /* If the expression starts with a curly brace it is a register list. | |
945 | Otherwise it is a constant expression, whoes bits indicate which | |
946 | registers are to be included in the list. */ | |
28e4f854 | 947 | if (*input_line_pointer != '{') |
252b5132 | 948 | { |
252b5132 RH |
949 | int reg; |
950 | int i; | |
28e4f854 KH |
951 | |
952 | expression (&exp); | |
953 | ||
252b5132 RH |
954 | if (exp.X_op != O_constant) |
955 | return _("constant expression or register list expected"); | |
956 | ||
957 | if (regs == type1_regs) | |
958 | { | |
959 | if (exp.X_add_number & 0xFFFFF000) | |
960 | return _("high bits set in register list expression"); | |
28e4f854 KH |
961 | |
962 | for (reg = 20; reg < 32; reg++) | |
252b5132 RH |
963 | if (exp.X_add_number & (1 << (reg - 20))) |
964 | { | |
965 | for (i = 0; i < 32; i++) | |
966 | if (regs[i] == reg) | |
28e4f854 | 967 | *insn |= (1 << i); |
252b5132 RH |
968 | } |
969 | } | |
970 | else if (regs == type2_regs) | |
971 | { | |
972 | if (exp.X_add_number & 0xFFFE0000) | |
973 | return _("high bits set in register list expression"); | |
28e4f854 KH |
974 | |
975 | for (reg = 1; reg < 16; reg++) | |
252b5132 RH |
976 | if (exp.X_add_number & (1 << (reg - 1))) |
977 | { | |
978 | for (i = 0; i < 32; i++) | |
979 | if (regs[i] == reg) | |
28e4f854 | 980 | *insn |= (1 << i); |
252b5132 RH |
981 | } |
982 | ||
983 | if (exp.X_add_number & (1 << 15)) | |
28e4f854 KH |
984 | *insn |= (1 << 3); |
985 | ||
252b5132 | 986 | if (exp.X_add_number & (1 << 16)) |
28e4f854 | 987 | *insn |= (1 << 19); |
252b5132 | 988 | } |
28e4f854 | 989 | else /* regs == type3_regs */ |
252b5132 RH |
990 | { |
991 | if (exp.X_add_number & 0xFFFE0000) | |
992 | return _("high bits set in register list expression"); | |
28e4f854 KH |
993 | |
994 | for (reg = 16; reg < 32; reg++) | |
252b5132 RH |
995 | if (exp.X_add_number & (1 << (reg - 16))) |
996 | { | |
997 | for (i = 0; i < 32; i++) | |
998 | if (regs[i] == reg) | |
28e4f854 | 999 | *insn |= (1 << i); |
252b5132 RH |
1000 | } |
1001 | ||
1002 | if (exp.X_add_number & (1 << 16)) | |
28e4f854 | 1003 | *insn |= (1 << 19); |
252b5132 RH |
1004 | } |
1005 | ||
1006 | return NULL; | |
1007 | } | |
1008 | ||
28e4f854 | 1009 | input_line_pointer++; |
252b5132 RH |
1010 | |
1011 | /* Parse the register list until a terminator (closing curly brace or | |
1012 | new-line) is found. */ | |
1013 | for (;;) | |
1014 | { | |
28e4f854 | 1015 | if (register_name (&exp)) |
252b5132 | 1016 | { |
28e4f854 KH |
1017 | int i; |
1018 | ||
252b5132 RH |
1019 | /* Locate the given register in the list, and if it is there, |
1020 | insert the corresponding bit into the instruction. */ | |
1021 | for (i = 0; i < 32; i++) | |
1022 | { | |
28e4f854 | 1023 | if (regs[i] == exp.X_add_number) |
252b5132 | 1024 | { |
28e4f854 | 1025 | *insn |= (1 << i); |
252b5132 RH |
1026 | break; |
1027 | } | |
1028 | } | |
1029 | ||
1030 | if (i == 32) | |
77c6dd37 | 1031 | return _("illegal register included in list"); |
252b5132 | 1032 | } |
b34976b6 | 1033 | else if (system_register_name (&exp, TRUE, TRUE)) |
252b5132 RH |
1034 | { |
1035 | if (regs == type1_regs) | |
1036 | { | |
1037 | return _("system registers cannot be included in list"); | |
1038 | } | |
1039 | else if (exp.X_add_number == 5) | |
1040 | { | |
1041 | if (regs == type2_regs) | |
1042 | return _("PSW cannot be included in list"); | |
1043 | else | |
28e4f854 | 1044 | *insn |= 0x8; |
252b5132 RH |
1045 | } |
1046 | else if (exp.X_add_number < 4) | |
28e4f854 | 1047 | *insn |= 0x80000; |
252b5132 RH |
1048 | else |
1049 | return _("High value system registers cannot be included in list"); | |
1050 | } | |
28e4f854 | 1051 | else if (*input_line_pointer == '}') |
252b5132 | 1052 | { |
28e4f854 | 1053 | input_line_pointer++; |
252b5132 RH |
1054 | break; |
1055 | } | |
28e4f854 | 1056 | else if (*input_line_pointer == ',') |
252b5132 | 1057 | { |
28e4f854 | 1058 | input_line_pointer++; |
252b5132 RH |
1059 | continue; |
1060 | } | |
28e4f854 | 1061 | else if (*input_line_pointer == '-') |
252b5132 | 1062 | { |
28e4f854 KH |
1063 | /* We have encountered a range of registers: rX - rY. */ |
1064 | int j; | |
252b5132 RH |
1065 | expressionS exp2; |
1066 | ||
1067 | /* Skip the dash. */ | |
28e4f854 | 1068 | ++input_line_pointer; |
252b5132 RH |
1069 | |
1070 | /* Get the second register in the range. */ | |
28e4f854 | 1071 | if (! register_name (&exp2)) |
252b5132 RH |
1072 | { |
1073 | return _("second register should follow dash in register list"); | |
1074 | exp2.X_add_number = exp.X_add_number; | |
1075 | } | |
1076 | ||
1077 | /* Add the rest of the registers in the range. */ | |
1078 | for (j = exp.X_add_number + 1; j <= exp2.X_add_number; j++) | |
1079 | { | |
28e4f854 KH |
1080 | int i; |
1081 | ||
252b5132 RH |
1082 | /* Locate the given register in the list, and if it is there, |
1083 | insert the corresponding bit into the instruction. */ | |
1084 | for (i = 0; i < 32; i++) | |
1085 | { | |
28e4f854 | 1086 | if (regs[i] == j) |
252b5132 | 1087 | { |
28e4f854 | 1088 | *insn |= (1 << i); |
252b5132 RH |
1089 | break; |
1090 | } | |
1091 | } | |
1092 | ||
1093 | if (i == 32) | |
1094 | return _("illegal register included in list"); | |
1095 | } | |
1096 | } | |
1097 | else | |
77c6dd37 | 1098 | break; |
252b5132 RH |
1099 | |
1100 | skip_white_space (); | |
1101 | } | |
1102 | ||
1103 | return NULL; | |
1104 | } | |
1105 | ||
5a38dc70 | 1106 | const char *md_shortopts = "m:"; |
252b5132 | 1107 | |
ea1562b3 NC |
1108 | struct option md_longopts[] = |
1109 | { | |
252b5132 RH |
1110 | {NULL, no_argument, NULL, 0} |
1111 | }; | |
252b5132 | 1112 | |
28e4f854 | 1113 | size_t md_longopts_size = sizeof (md_longopts); |
252b5132 RH |
1114 | |
1115 | void | |
ea1562b3 | 1116 | md_show_usage (FILE *stream) |
252b5132 RH |
1117 | { |
1118 | fprintf (stream, _(" V850 options:\n")); | |
1119 | fprintf (stream, _(" -mwarn-signed-overflow Warn if signed immediate values overflow\n")); | |
1120 | fprintf (stream, _(" -mwarn-unsigned-overflow Warn if unsigned immediate values overflow\n")); | |
1121 | fprintf (stream, _(" -mv850 The code is targeted at the v850\n")); | |
1122 | fprintf (stream, _(" -mv850e The code is targeted at the v850e\n")); | |
8ad30312 | 1123 | fprintf (stream, _(" -mv850e1 The code is targeted at the v850e1\n")); |
252b5132 | 1124 | fprintf (stream, _(" -mv850any The code is generic, despite any processor specific instructions\n")); |
86aba9db | 1125 | fprintf (stream, _(" -mrelax Enable relaxation\n")); |
252b5132 RH |
1126 | } |
1127 | ||
1128 | int | |
ea1562b3 | 1129 | md_parse_option (int c, char *arg) |
252b5132 RH |
1130 | { |
1131 | if (c != 'm') | |
329e276d | 1132 | return 0; |
252b5132 RH |
1133 | |
1134 | if (strcmp (arg, "warn-signed-overflow") == 0) | |
329e276d NC |
1135 | warn_signed_overflows = TRUE; |
1136 | ||
252b5132 | 1137 | else if (strcmp (arg, "warn-unsigned-overflow") == 0) |
329e276d NC |
1138 | warn_unsigned_overflows = TRUE; |
1139 | ||
252b5132 RH |
1140 | else if (strcmp (arg, "v850") == 0) |
1141 | { | |
1142 | machine = 0; | |
1143 | processor_mask = PROCESSOR_V850; | |
1144 | } | |
1145 | else if (strcmp (arg, "v850e") == 0) | |
1146 | { | |
1147 | machine = bfd_mach_v850e; | |
1148 | processor_mask = PROCESSOR_V850E; | |
1149 | } | |
8ad30312 NC |
1150 | else if (strcmp (arg, "v850e1") == 0) |
1151 | { | |
1152 | machine = bfd_mach_v850e1; | |
1153 | processor_mask = PROCESSOR_V850E1; | |
1154 | } | |
252b5132 RH |
1155 | else if (strcmp (arg, "v850any") == 0) |
1156 | { | |
28e4f854 KH |
1157 | /* Tell the world that this is for any v850 chip. */ |
1158 | machine = 0; | |
1159 | ||
1160 | /* But support instructions for the extended versions. */ | |
86aba9db | 1161 | processor_mask = PROCESSOR_V850E; |
8ad30312 | 1162 | processor_mask |= PROCESSOR_V850E1; |
252b5132 | 1163 | } |
86aba9db NC |
1164 | else if (strcmp (arg, "relax") == 0) |
1165 | v850_relax = 1; | |
252b5132 | 1166 | else |
329e276d | 1167 | return 0; |
28e4f854 | 1168 | |
252b5132 RH |
1169 | return 1; |
1170 | } | |
1171 | ||
1172 | symbolS * | |
ea1562b3 | 1173 | md_undefined_symbol (char *name ATTRIBUTE_UNUSED) |
252b5132 RH |
1174 | { |
1175 | return 0; | |
1176 | } | |
1177 | ||
1178 | char * | |
ea1562b3 | 1179 | md_atof (int type, char *litp, int *sizep) |
252b5132 | 1180 | { |
499ac353 | 1181 | return ieee_md_atof (type, litp, sizep, FALSE); |
252b5132 RH |
1182 | } |
1183 | ||
252b5132 | 1184 | /* Very gross. */ |
28e4f854 | 1185 | |
252b5132 | 1186 | void |
ea1562b3 NC |
1187 | md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, |
1188 | asection *sec, | |
1189 | fragS *fragP) | |
252b5132 | 1190 | { |
8ad7c533 NC |
1191 | /* This code performs some nasty type punning between the |
1192 | fr_opcode field of the frag structure (a char *) and the | |
1193 | fx_r_type field of the fix structure (a bfd_reloc_code_real_type) | |
1194 | On a 64bit host this causes problems because these two fields | |
1195 | are not the same size, but since we know that we are only | |
1196 | ever storing small integers in the fields, it is safe to use | |
1197 | a union to convert between them. */ | |
1198 | union u | |
1199 | { | |
1200 | bfd_reloc_code_real_type fx_r_type; | |
1201 | char * fr_opcode; | |
1202 | } | |
1203 | opcode_converter; | |
252b5132 | 1204 | subseg_change (sec, 0); |
28e4f854 | 1205 | |
8ad7c533 NC |
1206 | opcode_converter.fr_opcode = fragP->fr_opcode; |
1207 | ||
252b5132 RH |
1208 | /* In range conditional or unconditional branch. */ |
1209 | if (fragP->fr_subtype == 0 || fragP->fr_subtype == 2) | |
1210 | { | |
1211 | fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, | |
8ad7c533 NC |
1212 | fragP->fr_offset, 1, |
1213 | BFD_RELOC_UNUSED + opcode_converter.fx_r_type); | |
252b5132 RH |
1214 | fragP->fr_fix += 2; |
1215 | } | |
1216 | /* Out of range conditional branch. Emit a branch around a jump. */ | |
1217 | else if (fragP->fr_subtype == 1) | |
1218 | { | |
28e4f854 | 1219 | unsigned char *buffer = |
252b5132 RH |
1220 | (unsigned char *) (fragP->fr_fix + fragP->fr_literal); |
1221 | ||
1222 | /* Reverse the condition of the first branch. */ | |
1223 | buffer[0] ^= 0x08; | |
1224 | /* Mask off all the displacement bits. */ | |
1225 | buffer[0] &= 0x8f; | |
1226 | buffer[1] &= 0x07; | |
1227 | /* Now set the displacement bits so that we branch | |
1228 | around the unconditional branch. */ | |
1229 | buffer[0] |= 0x30; | |
1230 | ||
1231 | /* Now create the unconditional branch + fixup to the final | |
1232 | target. */ | |
2132e3a3 | 1233 | md_number_to_chars ((char *) buffer + 2, 0x00000780, 4); |
252b5132 | 1234 | fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol, |
8ad7c533 NC |
1235 | fragP->fr_offset, 1, |
1236 | BFD_RELOC_UNUSED + opcode_converter.fx_r_type + 1); | |
252b5132 RH |
1237 | fragP->fr_fix += 6; |
1238 | } | |
1239 | /* Out of range unconditional branch. Emit a jump. */ | |
1240 | else if (fragP->fr_subtype == 3) | |
1241 | { | |
1242 | md_number_to_chars (fragP->fr_fix + fragP->fr_literal, 0x00000780, 4); | |
1243 | fix_new (fragP, fragP->fr_fix, 4, fragP->fr_symbol, | |
8ad7c533 NC |
1244 | fragP->fr_offset, 1, |
1245 | BFD_RELOC_UNUSED + opcode_converter.fx_r_type + 1); | |
252b5132 RH |
1246 | fragP->fr_fix += 4; |
1247 | } | |
1248 | else | |
1249 | abort (); | |
1250 | } | |
1251 | ||
1252 | valueT | |
ea1562b3 | 1253 | md_section_align (asection *seg, valueT addr) |
252b5132 RH |
1254 | { |
1255 | int align = bfd_get_section_alignment (stdoutput, seg); | |
1256 | return ((addr + (1 << align) - 1) & (-1 << align)); | |
1257 | } | |
1258 | ||
1259 | void | |
ea1562b3 | 1260 | md_begin (void) |
252b5132 | 1261 | { |
28e4f854 | 1262 | char *prev_name = ""; |
86aba9db | 1263 | const struct v850_opcode *op; |
28e4f854 | 1264 | |
8ad30312 NC |
1265 | if (strncmp (TARGET_CPU, "v850e1", 6) == 0) |
1266 | { | |
1267 | if (machine == -1) | |
1268 | machine = bfd_mach_v850e1; | |
1269 | ||
1270 | if (processor_mask == -1) | |
1271 | processor_mask = PROCESSOR_V850E1; | |
1272 | } | |
1273 | else if (strncmp (TARGET_CPU, "v850e", 5) == 0) | |
252b5132 RH |
1274 | { |
1275 | if (machine == -1) | |
28e4f854 KH |
1276 | machine = bfd_mach_v850e; |
1277 | ||
252b5132 RH |
1278 | if (processor_mask == -1) |
1279 | processor_mask = PROCESSOR_V850E; | |
1280 | } | |
28e4f854 | 1281 | else if (strncmp (TARGET_CPU, "v850", 4) == 0) |
252b5132 RH |
1282 | { |
1283 | if (machine == -1) | |
28e4f854 KH |
1284 | machine = 0; |
1285 | ||
252b5132 RH |
1286 | if (processor_mask == -1) |
1287 | processor_mask = PROCESSOR_V850; | |
1288 | } | |
1289 | else | |
28e4f854 KH |
1290 | /* xgettext:c-format */ |
1291 | as_bad (_("Unable to determine default target processor from string: %s"), | |
ec178e1b | 1292 | TARGET_CPU); |
252b5132 | 1293 | |
19d63e5d | 1294 | v850_hash = hash_new (); |
252b5132 RH |
1295 | |
1296 | /* Insert unique names into hash table. The V850 instruction set | |
1297 | has many identical opcode names that have different opcodes based | |
1298 | on the operands. This hash table then provides a quick index to | |
1299 | the first opcode with a particular name in the opcode table. */ | |
252b5132 RH |
1300 | op = v850_opcodes; |
1301 | while (op->name) | |
1302 | { | |
28e4f854 | 1303 | if (strcmp (prev_name, op->name)) |
252b5132 RH |
1304 | { |
1305 | prev_name = (char *) op->name; | |
1306 | hash_insert (v850_hash, op->name, (char *) op); | |
1307 | } | |
1308 | op++; | |
1309 | } | |
1310 | ||
9e0665bc | 1311 | v850_seg_table[BSS_SECTION].s = bss_section; |
252b5132 | 1312 | bfd_set_arch_mach (stdoutput, TARGET_ARCH, machine); |
252b5132 RH |
1313 | } |
1314 | ||
1e50d24d RS |
1315 | static bfd_reloc_code_real_type |
1316 | handle_lo16 (const struct v850_operand *operand) | |
1317 | { | |
1318 | if (operand != NULL) | |
1319 | { | |
1320 | if (operand->bits == -1) | |
1321 | return BFD_RELOC_V850_LO16_SPLIT_OFFSET; | |
1322 | ||
1323 | if (!(operand->bits == 16 && operand->shift == 16) | |
1324 | && !(operand->bits == 15 && operand->shift == 17)) | |
1325 | { | |
1326 | as_bad (_("lo() relocation used on an instruction which does " | |
1327 | "not support it")); | |
1328 | return BFD_RELOC_64; /* Used to indicate an error condition. */ | |
1329 | } | |
1330 | } | |
1331 | return BFD_RELOC_LO16; | |
1332 | } | |
1333 | ||
252b5132 | 1334 | static bfd_reloc_code_real_type |
ea1562b3 | 1335 | handle_ctoff (const struct v850_operand *operand) |
252b5132 RH |
1336 | { |
1337 | if (operand == NULL) | |
1338 | return BFD_RELOC_V850_CALLT_16_16_OFFSET; | |
1339 | ||
28e4f854 | 1340 | if (operand->bits != 6 |
252b5132 RH |
1341 | || operand->shift != 0) |
1342 | { | |
1343 | as_bad (_("ctoff() relocation used on an instruction which does not support it")); | |
1344 | return BFD_RELOC_64; /* Used to indicate an error condition. */ | |
1345 | } | |
28e4f854 | 1346 | |
252b5132 RH |
1347 | return BFD_RELOC_V850_CALLT_6_7_OFFSET; |
1348 | } | |
1349 | ||
1350 | static bfd_reloc_code_real_type | |
ea1562b3 | 1351 | handle_sdaoff (const struct v850_operand *operand) |
252b5132 | 1352 | { |
28e4f854 KH |
1353 | if (operand == NULL) |
1354 | return BFD_RELOC_V850_SDA_16_16_OFFSET; | |
1355 | ||
1356 | if (operand->bits == 15 && operand->shift == 17) | |
1357 | return BFD_RELOC_V850_SDA_15_16_OFFSET; | |
1358 | ||
1359 | if (operand->bits == -1) | |
1360 | return BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET; | |
1361 | ||
1362 | if (operand->bits != 16 | |
252b5132 RH |
1363 | || operand->shift != 16) |
1364 | { | |
1365 | as_bad (_("sdaoff() relocation used on an instruction which does not support it")); | |
1366 | return BFD_RELOC_64; /* Used to indicate an error condition. */ | |
1367 | } | |
28e4f854 | 1368 | |
252b5132 RH |
1369 | return BFD_RELOC_V850_SDA_16_16_OFFSET; |
1370 | } | |
1371 | ||
1372 | static bfd_reloc_code_real_type | |
ea1562b3 | 1373 | handle_zdaoff (const struct v850_operand *operand) |
252b5132 | 1374 | { |
28e4f854 KH |
1375 | if (operand == NULL) |
1376 | return BFD_RELOC_V850_ZDA_16_16_OFFSET; | |
1377 | ||
1378 | if (operand->bits == 15 && operand->shift == 17) | |
1379 | return BFD_RELOC_V850_ZDA_15_16_OFFSET; | |
252b5132 | 1380 | |
28e4f854 KH |
1381 | if (operand->bits == -1) |
1382 | return BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET; | |
1383 | ||
1384 | if (operand->bits != 16 | |
252b5132 RH |
1385 | || operand->shift != 16) |
1386 | { | |
1387 | as_bad (_("zdaoff() relocation used on an instruction which does not support it")); | |
28e4f854 KH |
1388 | /* Used to indicate an error condition. */ |
1389 | return BFD_RELOC_64; | |
252b5132 | 1390 | } |
28e4f854 | 1391 | |
252b5132 RH |
1392 | return BFD_RELOC_V850_ZDA_16_16_OFFSET; |
1393 | } | |
1394 | ||
1395 | static bfd_reloc_code_real_type | |
ea1562b3 | 1396 | handle_tdaoff (const struct v850_operand *operand) |
252b5132 | 1397 | { |
28e4f854 KH |
1398 | if (operand == NULL) |
1399 | /* Data item, not an instruction. */ | |
1400 | return BFD_RELOC_V850_TDA_7_7_OFFSET; | |
1401 | ||
1402 | if (operand->bits == 6 && operand->shift == 1) | |
ea1562b3 | 1403 | /* sld.w/sst.w, operand: D8_6. */ |
28e4f854 KH |
1404 | return BFD_RELOC_V850_TDA_6_8_OFFSET; |
1405 | ||
1406 | if (operand->bits == 4 && operand->insert != NULL) | |
ea1562b3 | 1407 | /* sld.hu, operand: D5-4. */ |
28e4f854 KH |
1408 | return BFD_RELOC_V850_TDA_4_5_OFFSET; |
1409 | ||
1410 | if (operand->bits == 4 && operand->insert == NULL) | |
ea1562b3 | 1411 | /* sld.bu, operand: D4. */ |
28e4f854 KH |
1412 | return BFD_RELOC_V850_TDA_4_4_OFFSET; |
1413 | ||
1414 | if (operand->bits == 16 && operand->shift == 16) | |
ea1562b3 | 1415 | /* set1 & chums, operands: D16. */ |
28e4f854 KH |
1416 | return BFD_RELOC_V850_TDA_16_16_OFFSET; |
1417 | ||
252b5132 RH |
1418 | if (operand->bits != 7) |
1419 | { | |
1420 | as_bad (_("tdaoff() relocation used on an instruction which does not support it")); | |
28e4f854 KH |
1421 | /* Used to indicate an error condition. */ |
1422 | return BFD_RELOC_64; | |
252b5132 | 1423 | } |
28e4f854 | 1424 | |
252b5132 | 1425 | return operand->insert != NULL |
ea1562b3 NC |
1426 | ? BFD_RELOC_V850_TDA_7_8_OFFSET /* sld.h/sst.h, operand: D8_7. */ |
1427 | : BFD_RELOC_V850_TDA_7_7_OFFSET; /* sld.b/sst.b, operand: D7. */ | |
252b5132 RH |
1428 | } |
1429 | ||
1430 | /* Warning: The code in this function relies upon the definitions | |
1431 | in the v850_operands[] array (defined in opcodes/v850-opc.c) | |
1432 | matching the hard coded values contained herein. */ | |
1433 | ||
1434 | static bfd_reloc_code_real_type | |
ea1562b3 | 1435 | v850_reloc_prefix (const struct v850_operand *operand) |
252b5132 | 1436 | { |
b34976b6 | 1437 | bfd_boolean paren_skipped = FALSE; |
252b5132 | 1438 | |
252b5132 | 1439 | /* Skip leading opening parenthesis. */ |
28e4f854 | 1440 | if (*input_line_pointer == '(') |
252b5132 | 1441 | { |
28e4f854 | 1442 | ++input_line_pointer; |
b34976b6 | 1443 | paren_skipped = TRUE; |
252b5132 RH |
1444 | } |
1445 | ||
1446 | #define CHECK_(name, reloc) \ | |
ec266e19 | 1447 | if (strncmp (input_line_pointer, name "(", strlen (name) + 1) == 0) \ |
252b5132 RH |
1448 | { \ |
1449 | input_line_pointer += strlen (name); \ | |
1450 | return reloc; \ | |
1451 | } | |
28e4f854 | 1452 | |
ec178e1b AM |
1453 | CHECK_ ("hi0", BFD_RELOC_HI16 ); |
1454 | CHECK_ ("hi", BFD_RELOC_HI16_S ); | |
1e50d24d | 1455 | CHECK_ ("lo", handle_lo16 (operand) ); |
252b5132 RH |
1456 | CHECK_ ("sdaoff", handle_sdaoff (operand)); |
1457 | CHECK_ ("zdaoff", handle_zdaoff (operand)); | |
1458 | CHECK_ ("tdaoff", handle_tdaoff (operand)); | |
ec178e1b | 1459 | CHECK_ ("hilo", BFD_RELOC_32 ); |
28e4f854 KH |
1460 | CHECK_ ("ctoff", handle_ctoff (operand) ); |
1461 | ||
252b5132 RH |
1462 | /* Restore skipped parenthesis. */ |
1463 | if (paren_skipped) | |
28e4f854 KH |
1464 | --input_line_pointer; |
1465 | ||
252b5132 RH |
1466 | return BFD_RELOC_UNUSED; |
1467 | } | |
1468 | ||
1469 | /* Insert an operand value into an instruction. */ | |
1470 | ||
1471 | static unsigned long | |
ea1562b3 NC |
1472 | v850_insert_operand (unsigned long insn, |
1473 | const struct v850_operand *operand, | |
1474 | offsetT val, | |
1475 | char *file, | |
1476 | unsigned int line, | |
1477 | char *str) | |
252b5132 RH |
1478 | { |
1479 | if (operand->insert) | |
1480 | { | |
28e4f854 KH |
1481 | const char *message = NULL; |
1482 | ||
1483 | insn = operand->insert (insn, val, &message); | |
252b5132 RH |
1484 | if (message != NULL) |
1485 | { | |
1486 | if ((operand->flags & V850_OPERAND_SIGNED) | |
1487 | && ! warn_signed_overflows | |
1488 | && strstr (message, "out of range") != NULL) | |
1489 | { | |
28e4f854 | 1490 | /* Skip warning... */ |
252b5132 RH |
1491 | } |
1492 | else if ((operand->flags & V850_OPERAND_SIGNED) == 0 | |
1493 | && ! warn_unsigned_overflows | |
1494 | && strstr (message, "out of range") != NULL) | |
1495 | { | |
28e4f854 | 1496 | /* Skip warning... */ |
252b5132 RH |
1497 | } |
1498 | else if (str) | |
1499 | { | |
1500 | if (file == (char *) NULL) | |
1501 | as_warn ("%s: %s", str, message); | |
1502 | else | |
1503 | as_warn_where (file, line, "%s: %s", str, message); | |
1504 | } | |
1505 | else | |
1506 | { | |
1507 | if (file == (char *) NULL) | |
20203fb9 | 1508 | as_warn ("%s", message); |
252b5132 | 1509 | else |
20203fb9 | 1510 | as_warn_where (file, line, "%s", message); |
252b5132 RH |
1511 | } |
1512 | } | |
1513 | } | |
1514 | else | |
1515 | { | |
1516 | if (operand->bits != 32) | |
1517 | { | |
28e4f854 | 1518 | long min, max; |
252b5132 RH |
1519 | |
1520 | if ((operand->flags & V850_OPERAND_SIGNED) != 0) | |
1521 | { | |
1522 | if (! warn_signed_overflows) | |
1523 | max = (1 << operand->bits) - 1; | |
1524 | else | |
1525 | max = (1 << (operand->bits - 1)) - 1; | |
28e4f854 KH |
1526 | |
1527 | min = -(1 << (operand->bits - 1)); | |
252b5132 RH |
1528 | } |
1529 | else | |
1530 | { | |
1531 | max = (1 << operand->bits) - 1; | |
28e4f854 | 1532 | |
252b5132 | 1533 | if (! warn_unsigned_overflows) |
28e4f854 | 1534 | min = -(1 << (operand->bits - 1)); |
252b5132 RH |
1535 | else |
1536 | min = 0; | |
1537 | } | |
28e4f854 | 1538 | |
252b5132 RH |
1539 | if (val < (offsetT) min || val > (offsetT) max) |
1540 | { | |
e5976317 | 1541 | char buf [128]; |
28e4f854 | 1542 | |
252b5132 RH |
1543 | /* Restore min and mix to expected values for decimal ranges. */ |
1544 | if ((operand->flags & V850_OPERAND_SIGNED) | |
1545 | && ! warn_signed_overflows) | |
1546 | max = (1 << (operand->bits - 1)) - 1; | |
1547 | ||
1548 | if (! (operand->flags & V850_OPERAND_SIGNED) | |
1549 | && ! warn_unsigned_overflows) | |
1550 | min = 0; | |
1551 | ||
1552 | if (str) | |
e5976317 | 1553 | sprintf (buf, "%s: ", str); |
252b5132 | 1554 | else |
e5976317 NC |
1555 | buf[0] = 0; |
1556 | strcat (buf, _("operand")); | |
28e4f854 | 1557 | |
e5976317 | 1558 | as_bad_value_out_of_range (buf, val, (offsetT) min, (offsetT) max, file, line); |
252b5132 RH |
1559 | } |
1560 | } | |
1561 | ||
1562 | insn |= (((long) val & ((1 << operand->bits) - 1)) << operand->shift); | |
1563 | } | |
28e4f854 | 1564 | |
252b5132 RH |
1565 | return insn; |
1566 | } | |
252b5132 | 1567 | \f |
28e4f854 | 1568 | static char copy_of_instruction[128]; |
252b5132 RH |
1569 | |
1570 | void | |
ea1562b3 | 1571 | md_assemble (char *str) |
252b5132 | 1572 | { |
28e4f854 KH |
1573 | char *s; |
1574 | char *start_of_operands; | |
1575 | struct v850_opcode *opcode; | |
1576 | struct v850_opcode *next_opcode; | |
1577 | const unsigned char *opindex_ptr; | |
1578 | int next_opindex; | |
1579 | int relaxable = 0; | |
1580 | unsigned long insn; | |
1581 | unsigned long insn_size; | |
1582 | char *f; | |
1583 | int i; | |
1584 | int match; | |
b34976b6 | 1585 | bfd_boolean extra_data_after_insn = FALSE; |
28e4f854 KH |
1586 | unsigned extra_data_len = 0; |
1587 | unsigned long extra_data = 0; | |
1588 | char *saved_input_line_pointer; | |
1589 | ||
252b5132 | 1590 | strncpy (copy_of_instruction, str, sizeof (copy_of_instruction) - 1); |
28e4f854 | 1591 | |
252b5132 | 1592 | /* Get the opcode. */ |
3882b010 | 1593 | for (s = str; *s != '\0' && ! ISSPACE (*s); s++) |
252b5132 | 1594 | continue; |
28e4f854 | 1595 | |
252b5132 RH |
1596 | if (*s != '\0') |
1597 | *s++ = '\0'; | |
1598 | ||
28e4f854 | 1599 | /* Find the first opcode with the proper name. */ |
252b5132 RH |
1600 | opcode = (struct v850_opcode *) hash_find (v850_hash, str); |
1601 | if (opcode == NULL) | |
1602 | { | |
28e4f854 | 1603 | /* xgettext:c-format */ |
252b5132 RH |
1604 | as_bad (_("Unrecognized opcode: `%s'"), str); |
1605 | ignore_rest_of_line (); | |
1606 | return; | |
1607 | } | |
1608 | ||
1609 | str = s; | |
3882b010 | 1610 | while (ISSPACE (*str)) |
28e4f854 | 1611 | ++str; |
252b5132 RH |
1612 | |
1613 | start_of_operands = str; | |
1614 | ||
1615 | saved_input_line_pointer = input_line_pointer; | |
28e4f854 | 1616 | |
252b5132 RH |
1617 | for (;;) |
1618 | { | |
28e4f854 | 1619 | const char *errmsg = NULL; |
252b5132 RH |
1620 | |
1621 | match = 0; | |
28e4f854 | 1622 | |
252b5132 RH |
1623 | if ((opcode->processors & processor_mask) == 0) |
1624 | { | |
1625 | errmsg = _("Target processor does not support this instruction."); | |
1626 | goto error; | |
1627 | } | |
28e4f854 | 1628 | |
252b5132 RH |
1629 | relaxable = 0; |
1630 | fc = 0; | |
1631 | next_opindex = 0; | |
1632 | insn = opcode->opcode; | |
b34976b6 | 1633 | extra_data_after_insn = FALSE; |
252b5132 RH |
1634 | |
1635 | input_line_pointer = str = start_of_operands; | |
1636 | ||
28e4f854 | 1637 | for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++) |
252b5132 | 1638 | { |
28e4f854 KH |
1639 | const struct v850_operand *operand; |
1640 | char *hold; | |
1641 | expressionS ex; | |
1642 | bfd_reloc_code_real_type reloc; | |
252b5132 RH |
1643 | |
1644 | if (next_opindex == 0) | |
ea1562b3 | 1645 | operand = &v850_operands[*opindex_ptr]; |
252b5132 RH |
1646 | else |
1647 | { | |
28e4f854 | 1648 | operand = &v850_operands[next_opindex]; |
252b5132 RH |
1649 | next_opindex = 0; |
1650 | } | |
1651 | ||
1652 | errmsg = NULL; | |
1653 | ||
1654 | while (*str == ' ' || *str == ',' || *str == '[' || *str == ']') | |
28e4f854 | 1655 | ++str; |
252b5132 RH |
1656 | |
1657 | if (operand->flags & V850_OPERAND_RELAX) | |
1658 | relaxable = 1; | |
1659 | ||
28e4f854 | 1660 | /* Gather the operand. */ |
252b5132 RH |
1661 | hold = input_line_pointer; |
1662 | input_line_pointer = str; | |
28e4f854 KH |
1663 | |
1664 | /* lo(), hi(), hi0(), etc... */ | |
252b5132 RH |
1665 | if ((reloc = v850_reloc_prefix (operand)) != BFD_RELOC_UNUSED) |
1666 | { | |
1667 | /* This is a fake reloc, used to indicate an error condition. */ | |
1668 | if (reloc == BFD_RELOC_64) | |
1669 | { | |
1670 | match = 1; | |
1671 | goto error; | |
1672 | } | |
28e4f854 KH |
1673 | |
1674 | expression (&ex); | |
252b5132 RH |
1675 | |
1676 | if (ex.X_op == O_constant) | |
1677 | { | |
1678 | switch (reloc) | |
1679 | { | |
1680 | case BFD_RELOC_V850_ZDA_16_16_OFFSET: | |
1681 | /* To cope with "not1 7, zdaoff(0xfffff006)[r0]" | |
1682 | and the like. */ | |
1683 | /* Fall through. */ | |
28e4f854 | 1684 | |
252b5132 | 1685 | case BFD_RELOC_LO16: |
1e50d24d | 1686 | case BFD_RELOC_V850_LO16_SPLIT_OFFSET: |
252b5132 RH |
1687 | { |
1688 | /* Truncate, then sign extend the value. */ | |
1689 | ex.X_add_number = SEXT16 (ex.X_add_number); | |
1690 | break; | |
1691 | } | |
1692 | ||
1693 | case BFD_RELOC_HI16: | |
1694 | { | |
1695 | /* Truncate, then sign extend the value. */ | |
1696 | ex.X_add_number = SEXT16 (ex.X_add_number >> 16); | |
1697 | break; | |
1698 | } | |
1699 | ||
1700 | case BFD_RELOC_HI16_S: | |
1701 | { | |
1702 | /* Truncate, then sign extend the value. */ | |
28e4f854 | 1703 | int temp = (ex.X_add_number >> 16) & 0xffff; |
252b5132 RH |
1704 | |
1705 | temp += (ex.X_add_number >> 15) & 1; | |
1706 | ||
1707 | ex.X_add_number = SEXT16 (temp); | |
1708 | break; | |
1709 | } | |
28e4f854 | 1710 | |
252b5132 RH |
1711 | case BFD_RELOC_32: |
1712 | if ((operand->flags & V850E_IMMEDIATE32) == 0) | |
1713 | { | |
1714 | errmsg = _("immediate operand is too large"); | |
1715 | goto error; | |
1716 | } | |
28e4f854 | 1717 | |
b34976b6 | 1718 | extra_data_after_insn = TRUE; |
ec178e1b AM |
1719 | extra_data_len = 4; |
1720 | extra_data = 0; | |
252b5132 | 1721 | break; |
28e4f854 | 1722 | |
252b5132 RH |
1723 | default: |
1724 | fprintf (stderr, "reloc: %d\n", reloc); | |
1725 | as_bad (_("AAARG -> unhandled constant reloc")); | |
1726 | break; | |
1727 | } | |
1728 | ||
1729 | if (fc > MAX_INSN_FIXUPS) | |
1730 | as_fatal (_("too many fixups")); | |
28e4f854 KH |
1731 | |
1732 | fixups[fc].exp = ex; | |
1733 | fixups[fc].opindex = *opindex_ptr; | |
1734 | fixups[fc].reloc = reloc; | |
252b5132 RH |
1735 | fc++; |
1736 | } | |
1737 | else | |
1738 | { | |
1739 | if (reloc == BFD_RELOC_32) | |
1740 | { | |
1741 | if ((operand->flags & V850E_IMMEDIATE32) == 0) | |
1742 | { | |
1743 | errmsg = _("immediate operand is too large"); | |
1744 | goto error; | |
1745 | } | |
28e4f854 | 1746 | |
b34976b6 | 1747 | extra_data_after_insn = TRUE; |
ec178e1b AM |
1748 | extra_data_len = 4; |
1749 | extra_data = ex.X_add_number; | |
252b5132 | 1750 | } |
28e4f854 | 1751 | |
252b5132 RH |
1752 | if (fc > MAX_INSN_FIXUPS) |
1753 | as_fatal (_("too many fixups")); | |
1754 | ||
28e4f854 KH |
1755 | fixups[fc].exp = ex; |
1756 | fixups[fc].opindex = *opindex_ptr; | |
1757 | fixups[fc].reloc = reloc; | |
252b5132 RH |
1758 | fc++; |
1759 | } | |
1760 | } | |
1761 | else | |
1762 | { | |
1763 | errmsg = NULL; | |
28e4f854 KH |
1764 | |
1765 | if ((operand->flags & V850_OPERAND_REG) != 0) | |
252b5132 | 1766 | { |
28e4f854 | 1767 | if (!register_name (&ex)) |
ea1562b3 | 1768 | errmsg = _("invalid register name"); |
252b5132 | 1769 | else if ((operand->flags & V850_NOT_R0) |
28e4f854 | 1770 | && ex.X_add_number == 0) |
252b5132 RH |
1771 | { |
1772 | errmsg = _("register r0 cannot be used here"); | |
28e4f854 | 1773 | |
252b5132 RH |
1774 | /* Force an error message to be generated by |
1775 | skipping over any following potential matches | |
1776 | for this opcode. */ | |
1777 | opcode += 3; | |
1778 | } | |
1779 | } | |
28e4f854 | 1780 | else if ((operand->flags & V850_OPERAND_SRG) != 0) |
252b5132 | 1781 | { |
b34976b6 | 1782 | if (!system_register_name (&ex, TRUE, FALSE)) |
ea1562b3 | 1783 | errmsg = _("invalid system register name"); |
252b5132 RH |
1784 | } |
1785 | else if ((operand->flags & V850_OPERAND_EP) != 0) | |
1786 | { | |
28e4f854 KH |
1787 | char *start = input_line_pointer; |
1788 | char c = get_symbol_end (); | |
1789 | ||
252b5132 RH |
1790 | if (strcmp (start, "ep") != 0 && strcmp (start, "r30") != 0) |
1791 | { | |
1792 | /* Put things back the way we found them. */ | |
1793 | *input_line_pointer = c; | |
1794 | input_line_pointer = start; | |
1795 | errmsg = _("expected EP register"); | |
1796 | goto error; | |
1797 | } | |
28e4f854 | 1798 | |
252b5132 RH |
1799 | *input_line_pointer = c; |
1800 | str = input_line_pointer; | |
1801 | input_line_pointer = hold; | |
28e4f854 KH |
1802 | |
1803 | while (*str == ' ' || *str == ',' | |
1804 | || *str == '[' || *str == ']') | |
1805 | ++str; | |
252b5132 RH |
1806 | continue; |
1807 | } | |
28e4f854 | 1808 | else if ((operand->flags & V850_OPERAND_CC) != 0) |
252b5132 | 1809 | { |
28e4f854 | 1810 | if (!cc_name (&ex)) |
ea1562b3 | 1811 | errmsg = _("invalid condition code name"); |
252b5132 | 1812 | } |
28e4f854 | 1813 | else if (operand->flags & V850E_PUSH_POP) |
252b5132 | 1814 | { |
28e4f854 KH |
1815 | errmsg = parse_register_list (&insn, operand); |
1816 | ||
252b5132 RH |
1817 | /* The parse_register_list() function has already done |
1818 | everything, so fake a dummy expression. */ | |
ec178e1b | 1819 | ex.X_op = O_constant; |
252b5132 RH |
1820 | ex.X_add_number = 0; |
1821 | } | |
28e4f854 | 1822 | else if (operand->flags & V850E_IMMEDIATE16) |
252b5132 | 1823 | { |
28e4f854 | 1824 | expression (&ex); |
252b5132 RH |
1825 | |
1826 | if (ex.X_op != O_constant) | |
1827 | errmsg = _("constant expression expected"); | |
1828 | else if (ex.X_add_number & 0xffff0000) | |
1829 | { | |
1830 | if (ex.X_add_number & 0xffff) | |
1831 | errmsg = _("constant too big to fit into instruction"); | |
1832 | else if ((insn & 0x001fffc0) == 0x00130780) | |
1833 | ex.X_add_number >>= 16; | |
1834 | else | |
1835 | errmsg = _("constant too big to fit into instruction"); | |
1836 | } | |
28e4f854 | 1837 | |
b34976b6 | 1838 | extra_data_after_insn = TRUE; |
ec178e1b AM |
1839 | extra_data_len = 2; |
1840 | extra_data = ex.X_add_number; | |
1841 | ex.X_add_number = 0; | |
252b5132 | 1842 | } |
28e4f854 | 1843 | else if (operand->flags & V850E_IMMEDIATE32) |
252b5132 | 1844 | { |
28e4f854 KH |
1845 | expression (&ex); |
1846 | ||
252b5132 RH |
1847 | if (ex.X_op != O_constant) |
1848 | errmsg = _("constant expression expected"); | |
28e4f854 | 1849 | |
b34976b6 | 1850 | extra_data_after_insn = TRUE; |
ec178e1b AM |
1851 | extra_data_len = 4; |
1852 | extra_data = ex.X_add_number; | |
1853 | ex.X_add_number = 0; | |
252b5132 | 1854 | } |
28e4f854 | 1855 | else if (register_name (&ex) |
252b5132 RH |
1856 | && (operand->flags & V850_OPERAND_REG) == 0) |
1857 | { | |
1858 | char c; | |
28e4f854 KH |
1859 | int exists = 0; |
1860 | ||
252b5132 RH |
1861 | /* It is possible that an alias has been defined that |
1862 | matches a register name. For example the code may | |
1863 | include a ".set ZERO, 0" directive, which matches | |
1864 | the register name "zero". Attempt to reparse the | |
1865 | field as an expression, and only complain if we | |
1866 | cannot generate a constant. */ | |
1867 | ||
1868 | input_line_pointer = str; | |
1869 | ||
1870 | c = get_symbol_end (); | |
28e4f854 | 1871 | |
252b5132 RH |
1872 | if (symbol_find (str) != NULL) |
1873 | exists = 1; | |
28e4f854 KH |
1874 | |
1875 | *input_line_pointer = c; | |
252b5132 | 1876 | input_line_pointer = str; |
28e4f854 KH |
1877 | |
1878 | expression (&ex); | |
252b5132 RH |
1879 | |
1880 | if (ex.X_op != O_constant) | |
1881 | { | |
33b7f697 | 1882 | /* If this register is actually occurring too early on |
252b5132 RH |
1883 | the parsing of the instruction, (because another |
1884 | field is missing) then report this. */ | |
1885 | if (opindex_ptr[1] != 0 | |
28e4f854 KH |
1886 | && (v850_operands[opindex_ptr[1]].flags |
1887 | & V850_OPERAND_REG)) | |
252b5132 RH |
1888 | errmsg = _("syntax error: value is missing before the register name"); |
1889 | else | |
1890 | errmsg = _("syntax error: register not expected"); | |
1891 | ||
28e4f854 KH |
1892 | /* If we created a symbol in the process of this |
1893 | test then delete it now, so that it will not | |
1894 | be output with the real symbols... */ | |
252b5132 RH |
1895 | if (exists == 0 |
1896 | && ex.X_op == O_symbol) | |
1897 | symbol_remove (ex.X_add_symbol, | |
28e4f854 | 1898 | &symbol_rootP, &symbol_lastP); |
252b5132 RH |
1899 | } |
1900 | } | |
b34976b6 | 1901 | else if (system_register_name (&ex, FALSE, FALSE) |
252b5132 | 1902 | && (operand->flags & V850_OPERAND_SRG) == 0) |
ea1562b3 NC |
1903 | errmsg = _("syntax error: system register not expected"); |
1904 | ||
252b5132 RH |
1905 | else if (cc_name (&ex) |
1906 | && (operand->flags & V850_OPERAND_CC) == 0) | |
ea1562b3 NC |
1907 | errmsg = _("syntax error: condition code not expected"); |
1908 | ||
252b5132 RH |
1909 | else |
1910 | { | |
28e4f854 | 1911 | expression (&ex); |
252b5132 | 1912 | /* Special case: |
50b15da2 NC |
1913 | If we are assembling a MOV instruction and the immediate |
1914 | value does not fit into the bits available then create a | |
1915 | fake error so that the next MOV instruction will be | |
1916 | selected. This one has a 32 bit immediate field. */ | |
252b5132 RH |
1917 | |
1918 | if (((insn & 0x07e0) == 0x0200) | |
50b15da2 | 1919 | && operand->bits == 5 /* Do not match the CALLT instruction. */ |
252b5132 | 1920 | && ex.X_op == O_constant |
28e4f854 | 1921 | && (ex.X_add_number < (-(1 << (operand->bits - 1))) |
03223580 | 1922 | || ex.X_add_number > ((1 << (operand->bits - 1)) - 1))) |
252b5132 RH |
1923 | errmsg = _("immediate operand is too large"); |
1924 | } | |
1925 | ||
1926 | if (errmsg) | |
1927 | goto error; | |
252b5132 | 1928 | |
28e4f854 | 1929 | switch (ex.X_op) |
252b5132 RH |
1930 | { |
1931 | case O_illegal: | |
1932 | errmsg = _("illegal operand"); | |
1933 | goto error; | |
1934 | case O_absent: | |
1935 | errmsg = _("missing operand"); | |
1936 | goto error; | |
1937 | case O_register: | |
28e4f854 KH |
1938 | if ((operand->flags |
1939 | & (V850_OPERAND_REG | V850_OPERAND_SRG)) == 0) | |
252b5132 RH |
1940 | { |
1941 | errmsg = _("invalid operand"); | |
1942 | goto error; | |
1943 | } | |
1944 | insn = v850_insert_operand (insn, operand, ex.X_add_number, | |
ea1562b3 | 1945 | NULL, 0, copy_of_instruction); |
252b5132 RH |
1946 | break; |
1947 | ||
1948 | case O_constant: | |
1949 | insn = v850_insert_operand (insn, operand, ex.X_add_number, | |
ea1562b3 | 1950 | NULL, 0, copy_of_instruction); |
252b5132 RH |
1951 | break; |
1952 | ||
1953 | default: | |
1954 | /* We need to generate a fixup for this expression. */ | |
1955 | if (fc >= MAX_INSN_FIXUPS) | |
1956 | as_fatal (_("too many fixups")); | |
1957 | ||
28e4f854 KH |
1958 | fixups[fc].exp = ex; |
1959 | fixups[fc].opindex = *opindex_ptr; | |
1960 | fixups[fc].reloc = BFD_RELOC_UNUSED; | |
252b5132 RH |
1961 | ++fc; |
1962 | break; | |
1963 | } | |
1964 | } | |
1965 | ||
1966 | str = input_line_pointer; | |
1967 | input_line_pointer = hold; | |
1968 | ||
1969 | while (*str == ' ' || *str == ',' || *str == '[' || *str == ']' | |
1970 | || *str == ')') | |
1971 | ++str; | |
1972 | } | |
1973 | match = 1; | |
1974 | ||
1975 | error: | |
1976 | if (match == 0) | |
28e4f854 | 1977 | { |
252b5132 RH |
1978 | next_opcode = opcode + 1; |
1979 | if (next_opcode->name != NULL | |
1980 | && strcmp (next_opcode->name, opcode->name) == 0) | |
1981 | { | |
1982 | opcode = next_opcode; | |
1983 | ||
1984 | /* Skip versions that are not supported by the target | |
1985 | processor. */ | |
1986 | if ((opcode->processors & processor_mask) == 0) | |
1987 | goto error; | |
28e4f854 | 1988 | |
252b5132 RH |
1989 | continue; |
1990 | } | |
28e4f854 | 1991 | |
252b5132 | 1992 | as_bad ("%s: %s", copy_of_instruction, errmsg); |
28e4f854 KH |
1993 | |
1994 | if (*input_line_pointer == ']') | |
1995 | ++input_line_pointer; | |
1996 | ||
252b5132 RH |
1997 | ignore_rest_of_line (); |
1998 | input_line_pointer = saved_input_line_pointer; | |
1999 | return; | |
28e4f854 | 2000 | } |
252b5132 RH |
2001 | break; |
2002 | } | |
28e4f854 | 2003 | |
3882b010 | 2004 | while (ISSPACE (*str)) |
252b5132 RH |
2005 | ++str; |
2006 | ||
2007 | if (*str != '\0') | |
28e4f854 | 2008 | /* xgettext:c-format */ |
252b5132 RH |
2009 | as_bad (_("junk at end of line: `%s'"), str); |
2010 | ||
2011 | input_line_pointer = str; | |
2012 | ||
9fcc94b6 AM |
2013 | /* Tie dwarf2 debug info to the address at the start of the insn. |
2014 | We can't do this after the insn has been output as the current | |
2015 | frag may have been closed off. eg. by frag_var. */ | |
2016 | dwarf2_emit_insn (0); | |
2017 | ||
28e4f854 KH |
2018 | /* Write out the instruction. */ |
2019 | ||
252b5132 RH |
2020 | if (relaxable && fc > 0) |
2021 | { | |
8ad7c533 NC |
2022 | /* On a 64-bit host the size of an 'int' is not the same |
2023 | as the size of a pointer, so we need a union to convert | |
2024 | the opindex field of the fr_cgen structure into a char * | |
2025 | so that it can be stored in the frag. We do not have | |
2026 | to worry about loosing accuracy as we are not going to | |
2027 | be even close to the 32bit limit of the int. */ | |
2028 | union | |
2029 | { | |
2030 | int opindex; | |
2031 | char * ptr; | |
2032 | } | |
2033 | opindex_converter; | |
2034 | ||
2035 | opindex_converter.opindex = fixups[0].opindex; | |
252b5132 RH |
2036 | insn_size = 2; |
2037 | fc = 0; | |
2038 | ||
2039 | if (!strcmp (opcode->name, "br")) | |
2040 | { | |
2041 | f = frag_var (rs_machine_dependent, 4, 2, 2, | |
2042 | fixups[0].exp.X_add_symbol, | |
2043 | fixups[0].exp.X_add_number, | |
8ad7c533 | 2044 | opindex_converter.ptr); |
252b5132 RH |
2045 | md_number_to_chars (f, insn, insn_size); |
2046 | md_number_to_chars (f + 2, 0, 2); | |
2047 | } | |
2048 | else | |
2049 | { | |
2050 | f = frag_var (rs_machine_dependent, 6, 4, 0, | |
2051 | fixups[0].exp.X_add_symbol, | |
2052 | fixups[0].exp.X_add_number, | |
8ad7c533 | 2053 | opindex_converter.ptr); |
252b5132 RH |
2054 | md_number_to_chars (f, insn, insn_size); |
2055 | md_number_to_chars (f + 2, 0, 4); | |
2056 | } | |
2057 | } | |
28e4f854 | 2058 | else |
252b5132 RH |
2059 | { |
2060 | /* Four byte insns have an opcode with the two high bits on. */ | |
2061 | if ((insn & 0x0600) == 0x0600) | |
2062 | insn_size = 4; | |
2063 | else | |
2064 | insn_size = 2; | |
2065 | ||
28e4f854 | 2066 | /* Special case: 32 bit MOV. */ |
252b5132 RH |
2067 | if ((insn & 0xffe0) == 0x0620) |
2068 | insn_size = 2; | |
28e4f854 | 2069 | |
252b5132 | 2070 | f = frag_more (insn_size); |
252b5132 RH |
2071 | md_number_to_chars (f, insn, insn_size); |
2072 | ||
2073 | if (extra_data_after_insn) | |
2074 | { | |
2075 | f = frag_more (extra_data_len); | |
252b5132 RH |
2076 | md_number_to_chars (f, extra_data, extra_data_len); |
2077 | ||
b34976b6 | 2078 | extra_data_after_insn = FALSE; |
252b5132 RH |
2079 | } |
2080 | } | |
2081 | ||
2082 | /* Create any fixups. At this point we do not use a | |
2083 | bfd_reloc_code_real_type, but instead just use the | |
2084 | BFD_RELOC_UNUSED plus the operand index. This lets us easily | |
2085 | handle fixups for any operand type, although that is admittedly | |
2086 | not a very exciting feature. We pick a BFD reloc type in | |
55cf6793 | 2087 | md_apply_fix. */ |
252b5132 RH |
2088 | for (i = 0; i < fc; i++) |
2089 | { | |
28e4f854 KH |
2090 | const struct v850_operand *operand; |
2091 | bfd_reloc_code_real_type reloc; | |
2092 | ||
2093 | operand = &v850_operands[fixups[i].opindex]; | |
252b5132 RH |
2094 | |
2095 | reloc = fixups[i].reloc; | |
28e4f854 | 2096 | |
252b5132 RH |
2097 | if (reloc != BFD_RELOC_UNUSED) |
2098 | { | |
28e4f854 KH |
2099 | reloc_howto_type *reloc_howto = |
2100 | bfd_reloc_type_lookup (stdoutput, reloc); | |
2101 | int size; | |
2102 | int address; | |
2103 | fixS *fixP; | |
252b5132 RH |
2104 | |
2105 | if (!reloc_howto) | |
28e4f854 KH |
2106 | abort (); |
2107 | ||
252b5132 RH |
2108 | size = bfd_get_reloc_size (reloc_howto); |
2109 | ||
2110 | /* XXX This will abort on an R_V850_8 reloc - | |
28e4f854 KH |
2111 | is this reloc actually used? */ |
2112 | if (size != 2 && size != 4) | |
252b5132 RH |
2113 | abort (); |
2114 | ||
2115 | address = (f - frag_now->fr_literal) + insn_size - size; | |
2116 | ||
2117 | if (reloc == BFD_RELOC_32) | |
28e4f854 KH |
2118 | address += 2; |
2119 | ||
252b5132 | 2120 | fixP = fix_new_exp (frag_now, address, size, |
28e4f854 | 2121 | &fixups[i].exp, |
252b5132 RH |
2122 | reloc_howto->pc_relative, |
2123 | reloc); | |
2124 | ||
2d034539 NC |
2125 | fixP->tc_fix_data = (void *) operand; |
2126 | ||
252b5132 RH |
2127 | switch (reloc) |
2128 | { | |
2129 | case BFD_RELOC_LO16: | |
1e50d24d | 2130 | case BFD_RELOC_V850_LO16_SPLIT_OFFSET: |
252b5132 RH |
2131 | case BFD_RELOC_HI16: |
2132 | case BFD_RELOC_HI16_S: | |
2133 | fixP->fx_no_overflow = 1; | |
2134 | break; | |
5480ccf3 NC |
2135 | default: |
2136 | break; | |
252b5132 RH |
2137 | } |
2138 | } | |
2139 | else | |
2140 | { | |
28e4f854 | 2141 | fix_new_exp (frag_now, |
252b5132 RH |
2142 | f - frag_now->fr_literal, 4, |
2143 | & fixups[i].exp, | |
ec178e1b | 2144 | (operand->flags & V850_OPERAND_DISP) != 0, |
252b5132 | 2145 | (bfd_reloc_code_real_type) (fixups[i].opindex |
28e4f854 | 2146 | + (int) BFD_RELOC_UNUSED)); |
252b5132 RH |
2147 | } |
2148 | } | |
2149 | ||
2150 | input_line_pointer = saved_input_line_pointer; | |
2151 | } | |
2152 | ||
28e4f854 KH |
2153 | /* If while processing a fixup, a reloc really needs to be created |
2154 | then it is done here. */ | |
252b5132 | 2155 | |
252b5132 | 2156 | arelent * |
ea1562b3 | 2157 | tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp) |
252b5132 | 2158 | { |
28e4f854 KH |
2159 | arelent *reloc; |
2160 | ||
ea1562b3 NC |
2161 | reloc = xmalloc (sizeof (arelent)); |
2162 | reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *)); | |
28e4f854 KH |
2163 | *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); |
2164 | reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; | |
e30ddb24 NC |
2165 | |
2166 | if ( fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY | |
2167 | || fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT | |
2168 | || fixp->fx_r_type == BFD_RELOC_V850_LONGCALL | |
2169 | || fixp->fx_r_type == BFD_RELOC_V850_LONGJUMP | |
2170 | || fixp->fx_r_type == BFD_RELOC_V850_ALIGN) | |
2171 | reloc->addend = fixp->fx_offset; | |
2172 | else | |
2173 | { | |
2174 | if (fixp->fx_r_type == BFD_RELOC_32 | |
2175 | && fixp->fx_pcrel) | |
2176 | fixp->fx_r_type = BFD_RELOC_32_PCREL; | |
2177 | ||
2178 | reloc->addend = fixp->fx_addnumber; | |
2179 | } | |
2180 | ||
ec178e1b | 2181 | reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); |
252b5132 | 2182 | |
ea1562b3 | 2183 | if (reloc->howto == NULL) |
252b5132 RH |
2184 | { |
2185 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
28e4f854 KH |
2186 | /* xgettext:c-format */ |
2187 | _("reloc %d not supported by object file format"), | |
252b5132 RH |
2188 | (int) fixp->fx_r_type); |
2189 | ||
2190 | xfree (reloc); | |
28e4f854 | 2191 | |
252b5132 RH |
2192 | return NULL; |
2193 | } | |
28e4f854 | 2194 | |
252b5132 RH |
2195 | return reloc; |
2196 | } | |
2197 | ||
86aba9db | 2198 | void |
ea1562b3 | 2199 | v850_handle_align (fragS * frag) |
86aba9db NC |
2200 | { |
2201 | if (v850_relax | |
2202 | && frag->fr_type == rs_align | |
2203 | && frag->fr_address + frag->fr_fix > 0 | |
2204 | && frag->fr_offset > 1 | |
2205 | && now_seg != bss_section | |
2206 | && now_seg != v850_seg_table[SBSS_SECTION].s | |
2207 | && now_seg != v850_seg_table[TBSS_SECTION].s | |
2208 | && now_seg != v850_seg_table[ZBSS_SECTION].s) | |
2209 | fix_new (frag, frag->fr_fix, 2, & abs_symbol, frag->fr_offset, 0, | |
ec178e1b | 2210 | BFD_RELOC_V850_ALIGN); |
86aba9db NC |
2211 | } |
2212 | ||
606ab118 | 2213 | /* Return current size of variable part of frag. */ |
28e4f854 | 2214 | |
252b5132 | 2215 | int |
ea1562b3 | 2216 | md_estimate_size_before_relax (fragS *fragp, asection *seg ATTRIBUTE_UNUSED) |
252b5132 | 2217 | { |
606ab118 | 2218 | if (fragp->fr_subtype >= sizeof (md_relax_table) / sizeof (md_relax_table[0])) |
252b5132 | 2219 | abort (); |
606ab118 AM |
2220 | |
2221 | return md_relax_table[fragp->fr_subtype].rlx_length; | |
28e4f854 | 2222 | } |
252b5132 RH |
2223 | |
2224 | long | |
ea1562b3 | 2225 | v850_pcrel_from_section (fixS *fixp, segT section) |
252b5132 RH |
2226 | { |
2227 | /* If the symbol is undefined, or in a section other than our own, | |
d6c497c7 | 2228 | or it is weak (in which case it may well be in another section, |
252b5132 RH |
2229 | then let the linker figure it out. */ |
2230 | if (fixp->fx_addsy != (symbolS *) NULL | |
2231 | && (! S_IS_DEFINED (fixp->fx_addsy) | |
d6c497c7 | 2232 | || S_IS_WEAK (fixp->fx_addsy) |
252b5132 | 2233 | || (S_GET_SEGMENT (fixp->fx_addsy) != section))) |
d6c497c7 | 2234 | return 0; |
28e4f854 | 2235 | |
252b5132 RH |
2236 | return fixp->fx_frag->fr_address + fixp->fx_where; |
2237 | } | |
2238 | ||
94f592af | 2239 | void |
55cf6793 | 2240 | md_apply_fix (fixS *fixP, valueT *valueP, segT seg ATTRIBUTE_UNUSED) |
252b5132 | 2241 | { |
94f592af | 2242 | valueT value = * valueP; |
28e4f854 | 2243 | char *where; |
252b5132 | 2244 | |
94f592af | 2245 | if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT |
86aba9db NC |
2246 | || fixP->fx_r_type == BFD_RELOC_V850_LONGCALL |
2247 | || fixP->fx_r_type == BFD_RELOC_V850_LONGJUMP | |
94f592af | 2248 | || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY) |
252b5132 | 2249 | { |
94f592af NC |
2250 | fixP->fx_done = 0; |
2251 | return; | |
252b5132 RH |
2252 | } |
2253 | ||
94f592af | 2254 | if (fixP->fx_addsy == (symbolS *) NULL) |
86aba9db | 2255 | fixP->fx_addnumber = value, |
94f592af NC |
2256 | fixP->fx_done = 1; |
2257 | ||
2258 | else if (fixP->fx_pcrel) | |
86aba9db | 2259 | fixP->fx_addnumber = fixP->fx_offset; |
94f592af | 2260 | |
252b5132 RH |
2261 | else |
2262 | { | |
94f592af NC |
2263 | value = fixP->fx_offset; |
2264 | if (fixP->fx_subsy != (symbolS *) NULL) | |
252b5132 | 2265 | { |
94f592af NC |
2266 | if (S_GET_SEGMENT (fixP->fx_subsy) == absolute_section) |
2267 | value -= S_GET_VALUE (fixP->fx_subsy); | |
252b5132 | 2268 | else |
ea1562b3 NC |
2269 | /* We don't actually support subtracting a symbol. */ |
2270 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
2271 | _("expression too complex")); | |
252b5132 | 2272 | } |
86aba9db | 2273 | fixP->fx_addnumber = value; |
252b5132 RH |
2274 | } |
2275 | ||
94f592af | 2276 | if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED) |
252b5132 | 2277 | { |
28e4f854 KH |
2278 | int opindex; |
2279 | const struct v850_operand *operand; | |
2280 | unsigned long insn; | |
252b5132 | 2281 | |
94f592af | 2282 | opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED; |
28e4f854 | 2283 | operand = &v850_operands[opindex]; |
252b5132 RH |
2284 | |
2285 | /* Fetch the instruction, insert the fully resolved operand | |
ec178e1b | 2286 | value, and stuff the instruction back again. |
252b5132 RH |
2287 | |
2288 | Note the instruction has been stored in little endian | |
2289 | format! */ | |
94f592af | 2290 | where = fixP->fx_frag->fr_literal + fixP->fx_where; |
252b5132 RH |
2291 | |
2292 | insn = bfd_getl32 ((unsigned char *) where); | |
2293 | insn = v850_insert_operand (insn, operand, (offsetT) value, | |
94f592af | 2294 | fixP->fx_file, fixP->fx_line, NULL); |
252b5132 RH |
2295 | bfd_putl32 ((bfd_vma) insn, (unsigned char *) where); |
2296 | ||
94f592af NC |
2297 | if (fixP->fx_done) |
2298 | /* Nothing else to do here. */ | |
2299 | return; | |
252b5132 | 2300 | |
28e4f854 KH |
2301 | /* Determine a BFD reloc value based on the operand information. |
2302 | We are only prepared to turn a few of the operands into relocs. */ | |
252b5132 RH |
2303 | |
2304 | if (operand->bits == 22) | |
94f592af | 2305 | fixP->fx_r_type = BFD_RELOC_V850_22_PCREL; |
252b5132 | 2306 | else if (operand->bits == 9) |
94f592af | 2307 | fixP->fx_r_type = BFD_RELOC_V850_9_PCREL; |
252b5132 RH |
2308 | else |
2309 | { | |
94f592af | 2310 | as_bad_where (fixP->fx_file, fixP->fx_line, |
28e4f854 | 2311 | _("unresolved expression that must be resolved")); |
94f592af NC |
2312 | fixP->fx_done = 1; |
2313 | return; | |
252b5132 RH |
2314 | } |
2315 | } | |
94f592af | 2316 | else if (fixP->fx_done) |
252b5132 RH |
2317 | { |
2318 | /* We still have to insert the value into memory! */ | |
94f592af | 2319 | where = fixP->fx_frag->fr_literal + fixP->fx_where; |
252b5132 | 2320 | |
a0ef61f7 NC |
2321 | if (fixP->tc_fix_data != NULL |
2322 | && ((struct v850_operand *) fixP->tc_fix_data)->insert != NULL) | |
2d034539 | 2323 | { |
a0ef61f7 | 2324 | const char * message = NULL; |
2d034539 NC |
2325 | struct v850_operand * operand = (struct v850_operand *) fixP->tc_fix_data; |
2326 | unsigned long insn; | |
2327 | ||
2328 | /* The variable "where" currently points at the exact point inside | |
2329 | the insn where we need to insert the value. But we need to | |
2330 | extract the entire insn so we probably need to move "where" | |
2331 | back a few bytes. */ | |
2332 | if (fixP->fx_size == 2) | |
2333 | where -= 2; | |
2334 | else if (fixP->fx_size == 1) | |
2335 | where -= 3; | |
2336 | ||
2337 | insn = bfd_getl32 ((unsigned char *) where); | |
2338 | ||
2339 | /* Use the operand's insertion procedure, if present, in order to | |
2340 | make sure that the value is correctly stored in the insn. */ | |
45d18c80 | 2341 | insn = operand->insert (insn, (offsetT) value, & message); |
a0ef61f7 | 2342 | /* Ignore message even if it is set. */ |
2d034539 NC |
2343 | |
2344 | bfd_putl32 ((bfd_vma) insn, (unsigned char *) where); | |
2345 | } | |
2346 | else | |
2347 | { | |
2348 | if (fixP->fx_r_type == BFD_RELOC_V850_LO16_SPLIT_OFFSET) | |
2349 | bfd_putl32 (((value << 16) & 0xfffe0000) | |
2350 | | ((value << 5) & 0x20) | |
2351 | | (bfd_getl32 (where) & ~0xfffe0020), where); | |
2352 | else if (fixP->fx_size == 1) | |
2353 | *where = value & 0xff; | |
2354 | else if (fixP->fx_size == 2) | |
2355 | bfd_putl16 (value & 0xffff, (unsigned char *) where); | |
2356 | else if (fixP->fx_size == 4) | |
2357 | bfd_putl32 (value, (unsigned char *) where); | |
2358 | } | |
252b5132 | 2359 | } |
252b5132 | 2360 | } |
252b5132 RH |
2361 | \f |
2362 | /* Parse a cons expression. We have to handle hi(), lo(), etc | |
2363 | on the v850. */ | |
28e4f854 | 2364 | |
252b5132 | 2365 | void |
ea1562b3 | 2366 | parse_cons_expression_v850 (expressionS *exp) |
252b5132 RH |
2367 | { |
2368 | /* See if there's a reloc prefix like hi() we have to handle. */ | |
2369 | hold_cons_reloc = v850_reloc_prefix (NULL); | |
2370 | ||
2371 | /* Do normal expression parsing. */ | |
2372 | expression (exp); | |
2373 | } | |
2374 | ||
2375 | /* Create a fixup for a cons expression. If parse_cons_expression_v850 | |
2376 | found a reloc prefix, then we use that reloc, else we choose an | |
2377 | appropriate one based on the size of the expression. */ | |
28e4f854 | 2378 | |
252b5132 | 2379 | void |
ea1562b3 NC |
2380 | cons_fix_new_v850 (fragS *frag, |
2381 | int where, | |
2382 | int size, | |
2383 | expressionS *exp) | |
252b5132 RH |
2384 | { |
2385 | if (hold_cons_reloc == BFD_RELOC_UNUSED) | |
2386 | { | |
2387 | if (size == 4) | |
2388 | hold_cons_reloc = BFD_RELOC_32; | |
2389 | if (size == 2) | |
2390 | hold_cons_reloc = BFD_RELOC_16; | |
2391 | if (size == 1) | |
2392 | hold_cons_reloc = BFD_RELOC_8; | |
2393 | } | |
2394 | ||
2395 | if (exp != NULL) | |
2396 | fix_new_exp (frag, where, size, exp, 0, hold_cons_reloc); | |
2397 | else | |
2398 | fix_new (frag, where, size, NULL, 0, 0, hold_cons_reloc); | |
a8761a19 DD |
2399 | |
2400 | hold_cons_reloc = BFD_RELOC_UNUSED; | |
252b5132 | 2401 | } |
d6c497c7 | 2402 | |
b34976b6 | 2403 | bfd_boolean |
ea1562b3 | 2404 | v850_fix_adjustable (fixS *fixP) |
252b5132 | 2405 | { |
252b5132 RH |
2406 | if (fixP->fx_addsy == NULL) |
2407 | return 1; | |
28e4f854 | 2408 | |
28e4f854 | 2409 | /* Don't adjust function names. */ |
252b5132 RH |
2410 | if (S_IS_FUNCTION (fixP->fx_addsy)) |
2411 | return 0; | |
2412 | ||
28e4f854 KH |
2413 | /* We need the symbol name for the VTABLE entries. */ |
2414 | if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT | |
252b5132 RH |
2415 | || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY) |
2416 | return 0; | |
28e4f854 | 2417 | |
252b5132 RH |
2418 | return 1; |
2419 | } | |
28e4f854 | 2420 | |
252b5132 | 2421 | int |
ea1562b3 | 2422 | v850_force_relocation (struct fix *fixP) |
252b5132 | 2423 | { |
a161fe53 | 2424 | if (fixP->fx_r_type == BFD_RELOC_V850_LONGCALL |
86aba9db NC |
2425 | || fixP->fx_r_type == BFD_RELOC_V850_LONGJUMP) |
2426 | return 1; | |
2427 | ||
2428 | if (v850_relax | |
2429 | && (fixP->fx_pcrel | |
a161fe53 AM |
2430 | || fixP->fx_r_type == BFD_RELOC_V850_ALIGN |
2431 | || fixP->fx_r_type == BFD_RELOC_V850_22_PCREL | |
2432 | || fixP->fx_r_type == BFD_RELOC_V850_9_PCREL | |
2433 | || fixP->fx_r_type >= BFD_RELOC_UNUSED)) | |
86aba9db NC |
2434 | return 1; |
2435 | ||
ae6063d4 | 2436 | return generic_force_reloc (fixP); |
252b5132 | 2437 | } |