Update all uses of md_apply_fix to use md_apply_fix3. Make it a void function.
[deliverable/binutils-gdb.git] / gas / config / tc-v850.c
CommitLineData
252b5132 1/* tc-v850.c -- Assembler code for the NEC V850
507c8a1a
AM
2 Copyright 1996, 1997, 1998, 1999, 2000, 2001
3 Free Software Foundation, Inc.
252b5132
RH
4
5 This file is part of GAS, the GNU Assembler.
6
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22#include <stdio.h>
252b5132 23#include "as.h"
3882b010 24#include "safe-ctype.h"
28e4f854 25#include "subsegs.h"
252b5132 26#include "opcode/v850.h"
a8761a19 27#include "dwarf2dbg.h"
252b5132
RH
28
29#define AREA_ZDA 0
30#define AREA_SDA 1
31#define AREA_TDA 2
32
28e4f854
KH
33/* Sign-extend a 16-bit number. */
34#define SEXT16(x) ((((x) & 0xffff) ^ (~0x7fff)) + 0x8000)
252b5132
RH
35
36/* Temporarily holds the reloc in a cons expression. */
a8761a19 37static bfd_reloc_code_real_type hold_cons_reloc = BFD_RELOC_UNUSED;
252b5132
RH
38
39/* Set to TRUE if we want to be pedantic about signed overflows. */
40static boolean warn_signed_overflows = FALSE;
41static boolean warn_unsigned_overflows = FALSE;
42
43/* Indicates the target BFD machine number. */
28e4f854 44static int machine = -1;
252b5132
RH
45
46/* Indicates the target processor(s) for the assemble. */
28e4f854 47static int processor_mask = -1;
252b5132
RH
48\f
49/* Structure to hold information about predefined registers. */
19d63e5d 50struct reg_name {
28e4f854
KH
51 const char *name;
52 int value;
252b5132
RH
53};
54
28e4f854
KH
55/* Generic assembler global variables which must be defined by all
56 targets. */
252b5132 57
28e4f854 58/* Characters which always start a comment. */
252b5132
RH
59const char comment_chars[] = "#";
60
61/* Characters which start a comment at the beginning of a line. */
62const char line_comment_chars[] = ";#";
63
28e4f854 64/* Characters which may be used to separate multiple commands on a
252b5132
RH
65 single line. */
66const char line_separator_chars[] = ";";
67
28e4f854 68/* Characters which are used to indicate an exponent in a floating
252b5132
RH
69 point number. */
70const char EXP_CHARS[] = "eE";
71
28e4f854 72/* Characters which mean that a number is a floating point constant,
252b5132
RH
73 as in 0d1.0. */
74const char FLT_CHARS[] = "dD";
75\f
19d63e5d 76const relax_typeS md_relax_table[] = {
252b5132
RH
77 /* Conditional branches. */
78 {0xff, -0x100, 2, 1},
79 {0x1fffff, -0x200000, 6, 0},
80 /* Unconditional branches. */
81 {0xff, -0x100, 2, 3},
82 {0x1fffff, -0x200000, 4, 0},
83};
84
252b5132
RH
85static segT sdata_section = NULL;
86static segT tdata_section = NULL;
87static segT zdata_section = NULL;
88static segT sbss_section = NULL;
89static segT tbss_section = NULL;
90static segT zbss_section = NULL;
91static segT rosdata_section = NULL;
92static segT rozdata_section = NULL;
93static segT scommon_section = NULL;
94static segT tcommon_section = NULL;
95static segT zcommon_section = NULL;
96static segT call_table_data_section = NULL;
97static segT call_table_text_section = NULL;
98
28e4f854 99/* Fixups. */
252b5132 100#define MAX_INSN_FIXUPS (5)
19d63e5d 101struct v850_fixup {
28e4f854
KH
102 expressionS exp;
103 int opindex;
252b5132
RH
104 bfd_reloc_code_real_type reloc;
105};
106
28e4f854 107struct v850_fixup fixups[MAX_INSN_FIXUPS];
252b5132 108static int fc;
252b5132
RH
109\f
110void
5480ccf3 111v850_sdata (int ignore ATTRIBUTE_UNUSED)
252b5132 112{
28e4f854
KH
113 obj_elf_section_change_hook ();
114
252b5132
RH
115 subseg_set (sdata_section, (subsegT) get_absolute_expression ());
116
117 demand_empty_rest_of_line ();
118}
119
120void
5480ccf3 121v850_tdata (int ignore ATTRIBUTE_UNUSED)
252b5132 122{
28e4f854
KH
123 obj_elf_section_change_hook ();
124
252b5132 125 subseg_set (tdata_section, (subsegT) get_absolute_expression ());
28e4f854 126
252b5132
RH
127 demand_empty_rest_of_line ();
128}
129
130void
5480ccf3 131v850_zdata (int ignore ATTRIBUTE_UNUSED)
252b5132 132{
28e4f854
KH
133 obj_elf_section_change_hook ();
134
252b5132 135 subseg_set (zdata_section, (subsegT) get_absolute_expression ());
28e4f854 136
252b5132
RH
137 demand_empty_rest_of_line ();
138}
139
140void
5480ccf3 141v850_sbss (int ignore ATTRIBUTE_UNUSED)
252b5132 142{
28e4f854
KH
143 obj_elf_section_change_hook ();
144
252b5132 145 subseg_set (sbss_section, (subsegT) get_absolute_expression ());
28e4f854 146
252b5132
RH
147 demand_empty_rest_of_line ();
148}
149
150void
5480ccf3 151v850_tbss (int ignore ATTRIBUTE_UNUSED)
252b5132 152{
28e4f854
KH
153 obj_elf_section_change_hook ();
154
252b5132 155 subseg_set (tbss_section, (subsegT) get_absolute_expression ());
28e4f854 156
252b5132
RH
157 demand_empty_rest_of_line ();
158}
159
160void
5480ccf3 161v850_zbss (int ignore ATTRIBUTE_UNUSED)
252b5132 162{
28e4f854
KH
163 obj_elf_section_change_hook ();
164
252b5132 165 subseg_set (zbss_section, (subsegT) get_absolute_expression ());
28e4f854 166
252b5132
RH
167 demand_empty_rest_of_line ();
168}
169
170void
5480ccf3 171v850_rosdata (int ignore ATTRIBUTE_UNUSED)
252b5132 172{
28e4f854
KH
173 obj_elf_section_change_hook ();
174
252b5132 175 subseg_set (rosdata_section, (subsegT) get_absolute_expression ());
28e4f854 176
252b5132
RH
177 demand_empty_rest_of_line ();
178}
179
180void
5480ccf3 181v850_rozdata (int ignore ATTRIBUTE_UNUSED)
252b5132 182{
28e4f854
KH
183 obj_elf_section_change_hook ();
184
252b5132 185 subseg_set (rozdata_section, (subsegT) get_absolute_expression ());
28e4f854 186
252b5132
RH
187 demand_empty_rest_of_line ();
188}
189
190void
5480ccf3 191v850_call_table_data (int ignore ATTRIBUTE_UNUSED)
252b5132 192{
28e4f854
KH
193 obj_elf_section_change_hook ();
194
252b5132 195 subseg_set (call_table_data_section, (subsegT) get_absolute_expression ());
28e4f854 196
252b5132
RH
197 demand_empty_rest_of_line ();
198}
199
200void
5480ccf3 201v850_call_table_text (int ignore ATTRIBUTE_UNUSED)
252b5132 202{
28e4f854
KH
203 obj_elf_section_change_hook ();
204
252b5132 205 subseg_set (call_table_text_section, (subsegT) get_absolute_expression ());
28e4f854 206
252b5132
RH
207 demand_empty_rest_of_line ();
208}
209
210void
5480ccf3 211v850_bss (int ignore ATTRIBUTE_UNUSED)
252b5132
RH
212{
213 register int temp = get_absolute_expression ();
214
28e4f854
KH
215 obj_elf_section_change_hook ();
216
252b5132 217 subseg_set (bss_section, (subsegT) temp);
28e4f854 218
252b5132
RH
219 demand_empty_rest_of_line ();
220}
221
222void
5480ccf3 223v850_offset (int ignore ATTRIBUTE_UNUSED)
252b5132
RH
224{
225 int temp = get_absolute_expression ();
28e4f854
KH
226
227 temp -= frag_now_fix ();
228
252b5132
RH
229 if (temp > 0)
230 (void) frag_more (temp);
28e4f854 231
252b5132
RH
232 demand_empty_rest_of_line ();
233}
234
28e4f854
KH
235/* Copied from obj_elf_common() in gas/config/obj-elf.c. */
236
252b5132
RH
237static void
238v850_comm (area)
239 int area;
240{
28e4f854
KH
241 char *name;
242 char c;
243 char *p;
244 int temp;
245 unsigned int size;
246 symbolS *symbolP;
247 int have_align;
252b5132
RH
248
249 name = input_line_pointer;
250 c = get_symbol_end ();
28e4f854
KH
251
252 /* Just after name is now '\0'. */
252b5132
RH
253 p = input_line_pointer;
254 *p = c;
28e4f854 255
252b5132 256 SKIP_WHITESPACE ();
28e4f854 257
252b5132
RH
258 if (*input_line_pointer != ',')
259 {
260 as_bad (_("Expected comma after symbol-name"));
261 ignore_rest_of_line ();
262 return;
263 }
28e4f854
KH
264
265 /* Skip ','. */
266 input_line_pointer++;
267
252b5132
RH
268 if ((temp = get_absolute_expression ()) < 0)
269 {
28e4f854 270 /* xgettext:c-format */
252b5132
RH
271 as_bad (_(".COMMon length (%d.) < 0! Ignored."), temp);
272 ignore_rest_of_line ();
273 return;
274 }
28e4f854 275
252b5132
RH
276 size = temp;
277 *p = 0;
278 symbolP = symbol_find_or_make (name);
279 *p = c;
28e4f854 280
252b5132
RH
281 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
282 {
283 as_bad (_("Ignoring attempt to re-define symbol"));
284 ignore_rest_of_line ();
285 return;
286 }
28e4f854 287
252b5132
RH
288 if (S_GET_VALUE (symbolP) != 0)
289 {
290 if (S_GET_VALUE (symbolP) != size)
291 {
28e4f854 292 /* xgettext:c-format */
252b5132
RH
293 as_warn (_("Length of .comm \"%s\" is already %ld. Not changed to %d."),
294 S_GET_NAME (symbolP), (long) S_GET_VALUE (symbolP), size);
295 }
296 }
28e4f854
KH
297
298 know (symbol_get_frag (symbolP) == &zero_address_frag);
299
252b5132
RH
300 if (*input_line_pointer != ',')
301 have_align = 0;
302 else
303 {
304 have_align = 1;
305 input_line_pointer++;
306 SKIP_WHITESPACE ();
307 }
28e4f854 308
252b5132
RH
309 if (! have_align || *input_line_pointer != '"')
310 {
311 if (! have_align)
312 temp = 0;
313 else
314 {
315 temp = get_absolute_expression ();
28e4f854 316
252b5132
RH
317 if (temp < 0)
318 {
319 temp = 0;
320 as_warn (_("Common alignment negative; 0 assumed"));
321 }
322 }
28e4f854 323
cac58fa6 324 if (symbol_get_obj (symbolP)->local)
252b5132 325 {
28e4f854
KH
326 segT old_sec;
327 int old_subsec;
328 char *pfrag;
329 int align;
330 flagword applicable;
252b5132
RH
331
332 old_sec = now_seg;
333 old_subsec = now_subseg;
28e4f854 334
252b5132 335 applicable = bfd_applicable_section_flags (stdoutput);
28e4f854 336
252b5132 337 applicable &= SEC_ALLOC;
28e4f854 338
252b5132
RH
339 switch (area)
340 {
341 case AREA_SDA:
342 if (sbss_section == NULL)
343 {
344 sbss_section = subseg_new (".sbss", 0);
28e4f854 345
252b5132 346 bfd_set_section_flags (stdoutput, sbss_section, applicable);
28e4f854 347
252b5132
RH
348 seg_info (sbss_section)->bss = 1;
349 }
350 break;
28e4f854 351
252b5132
RH
352 case AREA_ZDA:
353 if (zbss_section == NULL)
354 {
355 zbss_section = subseg_new (".zbss", 0);
28e4f854 356
252b5132 357 bfd_set_section_flags (stdoutput, sbss_section, applicable);
28e4f854 358
252b5132
RH
359 seg_info (zbss_section)->bss = 1;
360 }
361 break;
28e4f854 362
252b5132
RH
363 case AREA_TDA:
364 if (tbss_section == NULL)
365 {
366 tbss_section = subseg_new (".tbss", 0);
28e4f854 367
252b5132 368 bfd_set_section_flags (stdoutput, tbss_section, applicable);
28e4f854 369
252b5132
RH
370 seg_info (tbss_section)->bss = 1;
371 }
372 break;
373 }
374
375 if (temp)
376 {
28e4f854 377 /* Convert to a power of 2 alignment. */
252b5132
RH
378 for (align = 0; (temp & 1) == 0; temp >>= 1, ++align)
379 ;
28e4f854 380
252b5132
RH
381 if (temp != 1)
382 {
383 as_bad (_("Common alignment not a power of 2"));
384 ignore_rest_of_line ();
385 return;
386 }
387 }
388 else
389 align = 0;
28e4f854 390
252b5132
RH
391 switch (area)
392 {
393 case AREA_SDA:
394 record_alignment (sbss_section, align);
28e4f854 395 obj_elf_section_change_hook ();
252b5132
RH
396 subseg_set (sbss_section, 0);
397 break;
398
399 case AREA_ZDA:
400 record_alignment (zbss_section, align);
28e4f854 401 obj_elf_section_change_hook ();
252b5132
RH
402 subseg_set (zbss_section, 0);
403 break;
404
405 case AREA_TDA:
406 record_alignment (tbss_section, align);
28e4f854 407 obj_elf_section_change_hook ();
252b5132
RH
408 subseg_set (tbss_section, 0);
409 break;
410
411 default:
28e4f854 412 abort ();
252b5132 413 }
28e4f854 414
252b5132
RH
415 if (align)
416 frag_align (align, 0, 0);
417
418 switch (area)
419 {
420 case AREA_SDA:
421 if (S_GET_SEGMENT (symbolP) == sbss_section)
7dcc9865 422 symbol_get_frag (symbolP)->fr_symbol = 0;
252b5132
RH
423 break;
424
425 case AREA_ZDA:
426 if (S_GET_SEGMENT (symbolP) == zbss_section)
7dcc9865 427 symbol_get_frag (symbolP)->fr_symbol = 0;
252b5132
RH
428 break;
429
430 case AREA_TDA:
431 if (S_GET_SEGMENT (symbolP) == tbss_section)
7dcc9865 432 symbol_get_frag (symbolP)->fr_symbol = 0;
252b5132
RH
433 break;
434
435 default:
cac58fa6 436 abort ();
252b5132 437 }
28e4f854 438
7dcc9865 439 symbol_set_frag (symbolP, frag_now);
252b5132
RH
440 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP,
441 (offsetT) size, (char *) 0);
442 *pfrag = 0;
443 S_SET_SIZE (symbolP, size);
28e4f854 444
252b5132
RH
445 switch (area)
446 {
447 case AREA_SDA:
448 S_SET_SEGMENT (symbolP, sbss_section);
449 break;
28e4f854 450
252b5132
RH
451 case AREA_ZDA:
452 S_SET_SEGMENT (symbolP, zbss_section);
453 break;
28e4f854 454
252b5132
RH
455 case AREA_TDA:
456 S_SET_SEGMENT (symbolP, tbss_section);
457 break;
28e4f854 458
252b5132 459 default:
28e4f854 460 abort ();
252b5132 461 }
28e4f854 462
252b5132 463 S_CLEAR_EXTERNAL (symbolP);
28e4f854 464 obj_elf_section_change_hook ();
252b5132
RH
465 subseg_set (old_sec, old_subsec);
466 }
467 else
468 {
469 allocate_common:
470 S_SET_VALUE (symbolP, (valueT) size);
471 S_SET_ALIGN (symbolP, temp);
472 S_SET_EXTERNAL (symbolP);
28e4f854 473
252b5132
RH
474 switch (area)
475 {
476 case AREA_SDA:
477 if (scommon_section == NULL)
478 {
28e4f854
KH
479 flagword applicable =
480 bfd_applicable_section_flags (stdoutput);
481
252b5132 482 scommon_section = subseg_new (".scommon", 0);
28e4f854 483
5480ccf3
NC
484 bfd_set_section_flags (stdoutput, scommon_section,
485 (applicable
252b5132 486 & (SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA
5480ccf3 487 | SEC_HAS_CONTENTS)) | SEC_IS_COMMON);
252b5132
RH
488 }
489 S_SET_SEGMENT (symbolP, scommon_section);
490 break;
28e4f854 491
252b5132
RH
492 case AREA_ZDA:
493 if (zcommon_section == NULL)
494 {
28e4f854
KH
495 flagword applicable =
496 bfd_applicable_section_flags (stdoutput);
497
252b5132 498 zcommon_section = subseg_new (".zcommon", 0);
28e4f854 499
5480ccf3
NC
500 bfd_set_section_flags (stdoutput, zcommon_section,
501 (applicable
252b5132 502 & (SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA
5480ccf3 503 | SEC_HAS_CONTENTS)) | SEC_IS_COMMON);
252b5132
RH
504 }
505 S_SET_SEGMENT (symbolP, zcommon_section);
506 break;
28e4f854 507
252b5132
RH
508 case AREA_TDA:
509 if (tcommon_section == NULL)
510 {
28e4f854
KH
511 flagword applicable =
512 bfd_applicable_section_flags (stdoutput);
513
252b5132 514 tcommon_section = subseg_new (".tcommon", 0);
28e4f854 515
5480ccf3 516 bfd_set_section_flags (stdoutput, tcommon_section,
28e4f854
KH
517 ((applicable
518 & (SEC_ALLOC | SEC_LOAD
519 | SEC_RELOC | SEC_DATA
520 | SEC_HAS_CONTENTS))
521 | SEC_IS_COMMON));
252b5132
RH
522 }
523 S_SET_SEGMENT (symbolP, tcommon_section);
524 break;
28e4f854 525
252b5132 526 default:
28e4f854 527 abort ();
252b5132
RH
528 }
529 }
530 }
531 else
532 {
533 input_line_pointer++;
28e4f854 534
252b5132
RH
535 /* @@ Some use the dot, some don't. Can we get some consistency?? */
536 if (*input_line_pointer == '.')
537 input_line_pointer++;
28e4f854 538
252b5132
RH
539 /* @@ Some say data, some say bss. */
540 if (strncmp (input_line_pointer, "bss\"", 4)
541 && strncmp (input_line_pointer, "data\"", 5))
542 {
543 while (*--input_line_pointer != '"')
544 ;
545 input_line_pointer--;
546 goto bad_common_segment;
547 }
548 while (*input_line_pointer++ != '"')
549 ;
550 goto allocate_common;
551 }
552
fed9b18a 553 symbol_get_bfdsym (symbolP)->flags |= BSF_OBJECT;
252b5132
RH
554
555 demand_empty_rest_of_line ();
556 return;
557
558 {
559 bad_common_segment:
560 p = input_line_pointer;
561 while (*p && *p != '\n')
562 p++;
563 c = *p;
564 *p = '\0';
565 as_bad (_("bad .common segment %s"), input_line_pointer + 1);
566 *p = c;
567 input_line_pointer = p;
568 ignore_rest_of_line ();
569 return;
570 }
571}
572
573void
574set_machine (int number)
575{
576 machine = number;
577 bfd_set_arch_mach (stdoutput, TARGET_ARCH, machine);
578
579 switch (machine)
580 {
28e4f854
KH
581 case 0: processor_mask = PROCESSOR_V850; break;
582 case bfd_mach_v850e: processor_mask = PROCESSOR_V850E; break;
252b5132
RH
583 case bfd_mach_v850ea: processor_mask = PROCESSOR_V850EA; break;
584 }
585}
586
587/* The target specific pseudo-ops which we support. */
19d63e5d 588const pseudo_typeS md_pseudo_table[] = {
252b5132
RH
589 {"sdata", v850_sdata, 0},
590 {"tdata", v850_tdata, 0},
591 {"zdata", v850_zdata, 0},
592 {"sbss", v850_sbss, 0},
593 {"tbss", v850_tbss, 0},
594 {"zbss", v850_zbss, 0},
595 {"rosdata", v850_rosdata, 0},
596 {"rozdata", v850_rozdata, 0},
597 {"bss", v850_bss, 0},
598 {"offset", v850_offset, 0},
599 {"word", cons, 4},
600 {"zcomm", v850_comm, AREA_ZDA},
601 {"scomm", v850_comm, AREA_SDA},
602 {"tcomm", v850_comm, AREA_TDA},
603 {"v850", set_machine, 0},
604 {"call_table_data", v850_call_table_data, 0},
605 {"call_table_text", v850_call_table_text, 0},
606 {"v850e", set_machine, bfd_mach_v850e},
607 {"v850ea", set_machine, bfd_mach_v850ea},
606ab118
AM
608 {"file", dwarf2_directive_file, 0},
609 {"loc", dwarf2_directive_loc, 0},
252b5132
RH
610 { NULL, NULL, 0}
611};
612
613/* Opcode hash table. */
614static struct hash_control *v850_hash;
615
28e4f854 616/* This table is sorted. Suitable for searching by a binary search. */
19d63e5d 617static const struct reg_name pre_defined_registers[] = {
252b5132 618 { "ep", 30 }, /* ep - element ptr */
28e4f854
KH
619 { "gp", 4 }, /* gp - global ptr */
620 { "hp", 2 }, /* hp - handler stack ptr */
621 { "lp", 31 }, /* lp - link ptr */
252b5132
RH
622 { "r0", 0 },
623 { "r1", 1 },
624 { "r10", 10 },
625 { "r11", 11 },
626 { "r12", 12 },
627 { "r13", 13 },
628 { "r14", 14 },
629 { "r15", 15 },
630 { "r16", 16 },
631 { "r17", 17 },
632 { "r18", 18 },
633 { "r19", 19 },
634 { "r2", 2 },
635 { "r20", 20 },
636 { "r21", 21 },
637 { "r22", 22 },
638 { "r23", 23 },
639 { "r24", 24 },
640 { "r25", 25 },
641 { "r26", 26 },
642 { "r27", 27 },
643 { "r28", 28 },
644 { "r29", 29 },
645 { "r3", 3 },
646 { "r30", 30 },
647 { "r31", 31 },
648 { "r4", 4 },
649 { "r5", 5 },
650 { "r6", 6 },
651 { "r7", 7 },
652 { "r8", 8 },
653 { "r9", 9 },
28e4f854
KH
654 { "sp", 3 }, /* sp - stack ptr */
655 { "tp", 5 }, /* tp - text ptr */
252b5132
RH
656 { "zero", 0 },
657};
252b5132 658
28e4f854
KH
659#define REG_NAME_CNT \
660 (sizeof (pre_defined_registers) / sizeof (struct reg_name))
252b5132 661
19d63e5d 662static const struct reg_name system_registers[] = {
252b5132
RH
663 { "ctbp", 20 },
664 { "ctpc", 16 },
665 { "ctpsw", 17 },
666 { "dbpc", 18 },
667 { "dbpsw", 19 },
668 { "ecr", 4 },
669 { "eipc", 0 },
670 { "eipsw", 1 },
671 { "fepc", 2 },
672 { "fepsw", 3 },
673 { "psw", 5 },
674};
28e4f854
KH
675
676#define SYSREG_NAME_CNT \
677 (sizeof (system_registers) / sizeof (struct reg_name))
252b5132 678
19d63e5d 679static const struct reg_name system_list_registers[] = {
252b5132
RH
680 {"PS", 5 },
681 {"SR", 0 + 1}
682};
28e4f854
KH
683
684#define SYSREGLIST_NAME_CNT \
685 (sizeof (system_list_registers) / sizeof (struct reg_name))
252b5132 686
19d63e5d 687static const struct reg_name cc_names[] = {
252b5132
RH
688 { "c", 0x1 },
689 { "e", 0x2 },
690 { "ge", 0xe },
691 { "gt", 0xf },
692 { "h", 0xb },
693 { "l", 0x1 },
694 { "le", 0x7 },
695 { "lt", 0x6 },
696 { "n", 0x4 },
697 { "nc", 0x9 },
698 { "ne", 0xa },
699 { "nh", 0x3 },
700 { "nl", 0x9 },
701 { "ns", 0xc },
702 { "nv", 0x8 },
703 { "nz", 0xa },
704 { "p", 0xc },
705 { "s", 0x4 },
706 { "sa", 0xd },
707 { "t", 0x5 },
708 { "v", 0x0 },
709 { "z", 0x2 },
710};
252b5132 711
28e4f854
KH
712#define CC_NAME_CNT \
713 (sizeof (cc_names) / sizeof (struct reg_name))
714
715/* Do a binary search of the given register table to see if NAME is a
716 valid regiter name. Return the register number from the array on
717 success, or -1 on failure. */
252b5132
RH
718
719static int
720reg_name_search (regs, regcount, name, accept_numbers)
28e4f854
KH
721 const struct reg_name *regs;
722 int regcount;
723 const char *name;
724 boolean accept_numbers;
252b5132
RH
725{
726 int middle, low, high;
727 int cmp;
28e4f854 728 symbolS *symbolP;
252b5132
RH
729
730 /* If the register name is a symbol, then evaluate it. */
731 if ((symbolP = symbol_find (name)) != NULL)
732 {
733 /* If the symbol is an alias for another name then use that.
734 If the symbol is an alias for a number, then return the number. */
a77f5182 735 if (symbol_equated_p (symbolP))
252b5132 736 {
28e4f854
KH
737 name
738 = S_GET_NAME (symbol_get_value_expression (symbolP)->X_add_symbol);
252b5132
RH
739 }
740 else if (accept_numbers)
741 {
742 int reg = S_GET_VALUE (symbolP);
28e4f854 743
252b5132
RH
744 if (reg >= 0 && reg <= 31)
745 return reg;
746 }
747
748 /* Otherwise drop through and try parsing name normally. */
749 }
28e4f854 750
252b5132
RH
751 low = 0;
752 high = regcount - 1;
753
754 do
755 {
756 middle = (low + high) / 2;
757 cmp = strcasecmp (name, regs[middle].name);
758 if (cmp < 0)
759 high = middle - 1;
760 else if (cmp > 0)
761 low = middle + 1;
762 else
763 return regs[middle].value;
764 }
765 while (low <= high);
766 return -1;
767}
768
252b5132
RH
769/* Summary of register_name().
770 *
771 * in: Input_line_pointer points to 1st char of operand.
772 *
b6ff326e 773 * out: An expressionS.
252b5132
RH
774 * The operand may have been a register: in this case, X_op == O_register,
775 * X_add_number is set to the register number, and truth is returned.
776 * Input_line_pointer->(next non-blank) char after operand, or is in
28e4f854
KH
777 * its original state. */
778
252b5132
RH
779static boolean
780register_name (expressionP)
28e4f854 781 expressionS *expressionP;
252b5132 782{
28e4f854
KH
783 int reg_number;
784 char *name;
785 char *start;
786 char c;
252b5132 787
28e4f854 788 /* Find the spelling of the operand. */
252b5132
RH
789 start = name = input_line_pointer;
790
791 c = get_symbol_end ();
792
793 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT,
794 name, FALSE);
795
28e4f854
KH
796 /* Put back the delimiting char. */
797 *input_line_pointer = c;
798
799 /* Look to see if it's in the register table. */
800 if (reg_number >= 0)
252b5132
RH
801 {
802 expressionP->X_op = O_register;
803 expressionP->X_add_number = reg_number;
804
28e4f854 805 /* Make the rest nice. */
252b5132
RH
806 expressionP->X_add_symbol = NULL;
807 expressionP->X_op_symbol = NULL;
28e4f854 808
252b5132
RH
809 return true;
810 }
811 else
812 {
28e4f854 813 /* Reset the line as if we had not done anything. */
252b5132 814 input_line_pointer = start;
28e4f854 815
252b5132
RH
816 return false;
817 }
818}
819
820/* Summary of system_register_name().
821 *
28e4f854
KH
822 * in: INPUT_LINE_POINTER points to 1st char of operand.
823 * EXPRESSIONP points to an expression structure to be filled in.
824 * ACCEPT_NUMBERS is true iff numerical register names may be used.
825 * ACCEPT_LIST_NAMES is true iff the special names PS and SR may be
252b5132
RH
826 * accepted.
827 *
b6ff326e 828 * out: An expressionS structure in expressionP.
252b5132
RH
829 * The operand may have been a register: in this case, X_op == O_register,
830 * X_add_number is set to the register number, and truth is returned.
831 * Input_line_pointer->(next non-blank) char after operand, or is in
28e4f854
KH
832 * its original state. */
833
252b5132
RH
834static boolean
835system_register_name (expressionP, accept_numbers, accept_list_names)
28e4f854
KH
836 expressionS *expressionP;
837 boolean accept_numbers;
838 boolean accept_list_names;
252b5132 839{
28e4f854
KH
840 int reg_number;
841 char *name;
842 char *start;
843 char c;
252b5132 844
28e4f854 845 /* Find the spelling of the operand. */
252b5132
RH
846 start = name = input_line_pointer;
847
848 c = get_symbol_end ();
849 reg_number = reg_name_search (system_registers, SYSREG_NAME_CNT, name,
850 accept_numbers);
851
28e4f854
KH
852 /* Put back the delimiting char. */
853 *input_line_pointer = c;
854
252b5132
RH
855 if (reg_number < 0
856 && accept_numbers)
857 {
28e4f854
KH
858 /* Reset input_line pointer. */
859 input_line_pointer = start;
252b5132 860
3882b010 861 if (ISDIGIT (*input_line_pointer))
252b5132 862 {
28e4f854 863 reg_number = strtol (input_line_pointer, &input_line_pointer, 10);
252b5132 864
28e4f854
KH
865 /* Make sure that the register number is allowable. */
866 if (reg_number < 0
5480ccf3 867 || (reg_number > 5 && reg_number < 16)
28e4f854 868 || reg_number > 20)
252b5132
RH
869 {
870 reg_number = -1;
871 }
872 }
873 else if (accept_list_names)
874 {
875 c = get_symbol_end ();
876 reg_number = reg_name_search (system_list_registers,
877 SYSREGLIST_NAME_CNT, name, FALSE);
878
28e4f854
KH
879 /* Put back the delimiting char. */
880 *input_line_pointer = c;
252b5132
RH
881 }
882 }
28e4f854
KH
883
884 /* Look to see if it's in the register table. */
885 if (reg_number >= 0)
252b5132
RH
886 {
887 expressionP->X_op = O_register;
888 expressionP->X_add_number = reg_number;
889
28e4f854 890 /* Make the rest nice. */
252b5132
RH
891 expressionP->X_add_symbol = NULL;
892 expressionP->X_op_symbol = NULL;
893
894 return true;
895 }
896 else
897 {
28e4f854 898 /* Reset the line as if we had not done anything. */
252b5132 899 input_line_pointer = start;
28e4f854 900
252b5132
RH
901 return false;
902 }
903}
904
905/* Summary of cc_name().
906 *
28e4f854 907 * in: INPUT_LINE_POINTER points to 1st char of operand.
252b5132 908 *
b6ff326e 909 * out: An expressionS.
252b5132
RH
910 * The operand may have been a register: in this case, X_op == O_register,
911 * X_add_number is set to the register number, and truth is returned.
912 * Input_line_pointer->(next non-blank) char after operand, or is in
28e4f854
KH
913 * its original state. */
914
252b5132
RH
915static boolean
916cc_name (expressionP)
28e4f854 917 expressionS *expressionP;
252b5132 918{
28e4f854
KH
919 int reg_number;
920 char *name;
921 char *start;
922 char c;
252b5132 923
28e4f854 924 /* Find the spelling of the operand. */
252b5132
RH
925 start = name = input_line_pointer;
926
927 c = get_symbol_end ();
928 reg_number = reg_name_search (cc_names, CC_NAME_CNT, name, FALSE);
929
28e4f854
KH
930 /* Put back the delimiting char. */
931 *input_line_pointer = c;
932
933 /* Look to see if it's in the register table. */
934 if (reg_number >= 0)
252b5132
RH
935 {
936 expressionP->X_op = O_constant;
937 expressionP->X_add_number = reg_number;
938
28e4f854 939 /* Make the rest nice. */
252b5132
RH
940 expressionP->X_add_symbol = NULL;
941 expressionP->X_op_symbol = NULL;
942
943 return true;
944 }
945 else
946 {
28e4f854 947 /* Reset the line as if we had not done anything. */
252b5132 948 input_line_pointer = start;
28e4f854 949
252b5132
RH
950 return false;
951 }
952}
953
954static void
955skip_white_space (void)
956{
28e4f854
KH
957 while (*input_line_pointer == ' '
958 || *input_line_pointer == '\t')
959 ++input_line_pointer;
252b5132
RH
960}
961
962/* Summary of parse_register_list ().
963 *
28e4f854
KH
964 * in: INPUT_LINE_POINTER points to 1st char of a list of registers.
965 * INSN is the partially constructed instruction.
966 * OPERAND is the operand being inserted.
252b5132
RH
967 *
968 * out: NULL if the parse completed successfully, otherwise a
969 * pointer to an error message is returned. If the parse
970 * completes the correct bit fields in the instruction
971 * will be filled in.
972 *
973 * Parses register lists with the syntax:
974 *
975 * { rX }
976 * { rX, rY }
977 * { rX - rY }
978 * { rX - rY, rZ }
979 * etc
980 *
981 * and also parses constant epxressions whoes bits indicate the
982 * registers in the lists. The LSB in the expression refers to
983 * the lowest numbered permissable register in the register list,
984 * and so on upwards. System registers are considered to be very
28e4f854
KH
985 * high numbers. */
986
252b5132 987static char *
28e4f854
KH
988parse_register_list (insn, operand)
989 unsigned long *insn;
990 const struct v850_operand *operand;
252b5132 991{
28e4f854
KH
992 static int type1_regs[32] = {
993 30, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
994 0, 0, 0, 0, 0, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24
995 };
996 static int type2_regs[32] = {
997 19, 18, 17, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
998 0, 0, 0, 0, 30, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24
999 };
1000 static int type3_regs[32] = {
1001 3, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1002 0, 0, 0, 0, 14, 15, 13, 12, 7, 6, 5, 4, 11, 10, 9, 8
1003 };
1004 int *regs;
252b5132
RH
1005 expressionS exp;
1006
28e4f854 1007 /* Select a register array to parse. */
252b5132
RH
1008 switch (operand->shift)
1009 {
1010 case 0xffe00001: regs = type1_regs; break;
1011 case 0xfff8000f: regs = type2_regs; break;
1012 case 0xfff8001f: regs = type3_regs; break;
1013 default:
1014 as_bad (_("unknown operand shift: %x\n"), operand->shift);
1015 return _("internal failure in parse_register_list");
1016 }
1017
1018 skip_white_space ();
1019
1020 /* If the expression starts with a curly brace it is a register list.
1021 Otherwise it is a constant expression, whoes bits indicate which
1022 registers are to be included in the list. */
28e4f854
KH
1023
1024 if (*input_line_pointer != '{')
252b5132 1025 {
252b5132
RH
1026 int reg;
1027 int i;
28e4f854
KH
1028
1029 expression (&exp);
1030
252b5132
RH
1031 if (exp.X_op != O_constant)
1032 return _("constant expression or register list expected");
1033
1034 if (regs == type1_regs)
1035 {
1036 if (exp.X_add_number & 0xFFFFF000)
1037 return _("high bits set in register list expression");
28e4f854
KH
1038
1039 for (reg = 20; reg < 32; reg++)
252b5132
RH
1040 if (exp.X_add_number & (1 << (reg - 20)))
1041 {
1042 for (i = 0; i < 32; i++)
1043 if (regs[i] == reg)
28e4f854 1044 *insn |= (1 << i);
252b5132
RH
1045 }
1046 }
1047 else if (regs == type2_regs)
1048 {
1049 if (exp.X_add_number & 0xFFFE0000)
1050 return _("high bits set in register list expression");
28e4f854
KH
1051
1052 for (reg = 1; reg < 16; reg++)
252b5132
RH
1053 if (exp.X_add_number & (1 << (reg - 1)))
1054 {
1055 for (i = 0; i < 32; i++)
1056 if (regs[i] == reg)
28e4f854 1057 *insn |= (1 << i);
252b5132
RH
1058 }
1059
1060 if (exp.X_add_number & (1 << 15))
28e4f854
KH
1061 *insn |= (1 << 3);
1062
252b5132 1063 if (exp.X_add_number & (1 << 16))
28e4f854 1064 *insn |= (1 << 19);
252b5132 1065 }
28e4f854 1066 else /* regs == type3_regs */
252b5132
RH
1067 {
1068 if (exp.X_add_number & 0xFFFE0000)
1069 return _("high bits set in register list expression");
28e4f854
KH
1070
1071 for (reg = 16; reg < 32; reg++)
252b5132
RH
1072 if (exp.X_add_number & (1 << (reg - 16)))
1073 {
1074 for (i = 0; i < 32; i++)
1075 if (regs[i] == reg)
28e4f854 1076 *insn |= (1 << i);
252b5132
RH
1077 }
1078
1079 if (exp.X_add_number & (1 << 16))
28e4f854 1080 *insn |= (1 << 19);
252b5132
RH
1081 }
1082
1083 return NULL;
1084 }
1085
28e4f854 1086 input_line_pointer++;
252b5132
RH
1087
1088 /* Parse the register list until a terminator (closing curly brace or
1089 new-line) is found. */
1090 for (;;)
1091 {
28e4f854 1092 if (register_name (&exp))
252b5132 1093 {
28e4f854
KH
1094 int i;
1095
252b5132
RH
1096 /* Locate the given register in the list, and if it is there,
1097 insert the corresponding bit into the instruction. */
1098 for (i = 0; i < 32; i++)
1099 {
28e4f854 1100 if (regs[i] == exp.X_add_number)
252b5132 1101 {
28e4f854 1102 *insn |= (1 << i);
252b5132
RH
1103 break;
1104 }
1105 }
1106
1107 if (i == 32)
1108 {
1109 return _("illegal register included in list");
1110 }
1111 }
28e4f854 1112 else if (system_register_name (&exp, true, true))
252b5132
RH
1113 {
1114 if (regs == type1_regs)
1115 {
1116 return _("system registers cannot be included in list");
1117 }
1118 else if (exp.X_add_number == 5)
1119 {
1120 if (regs == type2_regs)
1121 return _("PSW cannot be included in list");
1122 else
28e4f854 1123 *insn |= 0x8;
252b5132
RH
1124 }
1125 else if (exp.X_add_number < 4)
28e4f854 1126 *insn |= 0x80000;
252b5132
RH
1127 else
1128 return _("High value system registers cannot be included in list");
1129 }
28e4f854 1130 else if (*input_line_pointer == '}')
252b5132 1131 {
28e4f854 1132 input_line_pointer++;
252b5132
RH
1133 break;
1134 }
28e4f854 1135 else if (*input_line_pointer == ',')
252b5132 1136 {
28e4f854 1137 input_line_pointer++;
252b5132
RH
1138 continue;
1139 }
28e4f854 1140 else if (*input_line_pointer == '-')
252b5132 1141 {
28e4f854
KH
1142 /* We have encountered a range of registers: rX - rY. */
1143 int j;
252b5132
RH
1144 expressionS exp2;
1145
1146 /* Skip the dash. */
28e4f854 1147 ++input_line_pointer;
252b5132
RH
1148
1149 /* Get the second register in the range. */
28e4f854 1150 if (! register_name (&exp2))
252b5132
RH
1151 {
1152 return _("second register should follow dash in register list");
1153 exp2.X_add_number = exp.X_add_number;
1154 }
1155
1156 /* Add the rest of the registers in the range. */
1157 for (j = exp.X_add_number + 1; j <= exp2.X_add_number; j++)
1158 {
28e4f854
KH
1159 int i;
1160
252b5132
RH
1161 /* Locate the given register in the list, and if it is there,
1162 insert the corresponding bit into the instruction. */
1163 for (i = 0; i < 32; i++)
1164 {
28e4f854 1165 if (regs[i] == j)
252b5132 1166 {
28e4f854 1167 *insn |= (1 << i);
252b5132
RH
1168 break;
1169 }
1170 }
1171
1172 if (i == 32)
1173 return _("illegal register included in list");
1174 }
1175 }
1176 else
1177 {
1178 break;
1179 }
1180
1181 skip_white_space ();
1182 }
1183
1184 return NULL;
1185}
1186
28e4f854 1187CONST char *md_shortopts = "m:";
252b5132 1188
19d63e5d 1189struct option md_longopts[] = {
252b5132
RH
1190 {NULL, no_argument, NULL, 0}
1191};
252b5132 1192
28e4f854 1193size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH
1194
1195void
1196md_show_usage (stream)
28e4f854 1197 FILE *stream;
252b5132
RH
1198{
1199 fprintf (stream, _(" V850 options:\n"));
1200 fprintf (stream, _(" -mwarn-signed-overflow Warn if signed immediate values overflow\n"));
1201 fprintf (stream, _(" -mwarn-unsigned-overflow Warn if unsigned immediate values overflow\n"));
1202 fprintf (stream, _(" -mv850 The code is targeted at the v850\n"));
1203 fprintf (stream, _(" -mv850e The code is targeted at the v850e\n"));
1204 fprintf (stream, _(" -mv850ea The code is targeted at the v850ea\n"));
1205 fprintf (stream, _(" -mv850any The code is generic, despite any processor specific instructions\n"));
1206}
1207
1208int
1209md_parse_option (c, arg)
28e4f854
KH
1210 int c;
1211 char *arg;
252b5132
RH
1212{
1213 if (c != 'm')
1214 {
5480ccf3 1215 if (c != 'a')
28e4f854 1216 /* xgettext:c-format */
5480ccf3 1217 fprintf (stderr, _("unknown command line option: -%c%s\n"), c, arg);
252b5132
RH
1218 return 0;
1219 }
1220
1221 if (strcmp (arg, "warn-signed-overflow") == 0)
1222 {
1223 warn_signed_overflows = TRUE;
1224 }
1225 else if (strcmp (arg, "warn-unsigned-overflow") == 0)
1226 {
1227 warn_unsigned_overflows = TRUE;
1228 }
1229 else if (strcmp (arg, "v850") == 0)
1230 {
1231 machine = 0;
1232 processor_mask = PROCESSOR_V850;
1233 }
1234 else if (strcmp (arg, "v850e") == 0)
1235 {
1236 machine = bfd_mach_v850e;
1237 processor_mask = PROCESSOR_V850E;
1238 }
1239 else if (strcmp (arg, "v850ea") == 0)
1240 {
1241 machine = bfd_mach_v850ea;
1242 processor_mask = PROCESSOR_V850EA;
1243 }
1244 else if (strcmp (arg, "v850any") == 0)
1245 {
28e4f854
KH
1246 /* Tell the world that this is for any v850 chip. */
1247 machine = 0;
1248
1249 /* But support instructions for the extended versions. */
1250 processor_mask = PROCESSOR_V850EA;
252b5132
RH
1251 }
1252 else
1253 {
28e4f854 1254 /* xgettext:c-format */
252b5132
RH
1255 fprintf (stderr, _("unknown command line option: -%c%s\n"), c, arg);
1256 return 0;
1257 }
28e4f854 1258
252b5132
RH
1259 return 1;
1260}
1261
1262symbolS *
1263md_undefined_symbol (name)
28e4f854 1264 char *name ATTRIBUTE_UNUSED;
252b5132
RH
1265{
1266 return 0;
1267}
1268
1269char *
1270md_atof (type, litp, sizep)
28e4f854
KH
1271 int type;
1272 char *litp;
1273 int *sizep;
252b5132 1274{
28e4f854 1275 int prec;
252b5132 1276 LITTLENUM_TYPE words[4];
28e4f854
KH
1277 char *t;
1278 int i;
252b5132
RH
1279
1280 switch (type)
1281 {
1282 case 'f':
1283 prec = 2;
1284 break;
1285
1286 case 'd':
1287 prec = 4;
1288 break;
1289
1290 default:
1291 *sizep = 0;
1292 return _("bad call to md_atof");
1293 }
28e4f854 1294
252b5132
RH
1295 t = atof_ieee (input_line_pointer, type, words);
1296 if (t)
1297 input_line_pointer = t;
1298
1299 *sizep = prec * 2;
1300
1301 for (i = prec - 1; i >= 0; i--)
1302 {
1303 md_number_to_chars (litp, (valueT) words[i], 2);
1304 litp += 2;
1305 }
1306
1307 return NULL;
1308}
1309
252b5132 1310/* Very gross. */
28e4f854 1311
252b5132
RH
1312void
1313md_convert_frag (abfd, sec, fragP)
19d63e5d
KH
1314 bfd *abfd ATTRIBUTE_UNUSED;
1315 asection *sec;
1316 fragS *fragP;
252b5132
RH
1317{
1318 subseg_change (sec, 0);
28e4f854 1319
252b5132
RH
1320 /* In range conditional or unconditional branch. */
1321 if (fragP->fr_subtype == 0 || fragP->fr_subtype == 2)
1322 {
1323 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol,
1324 fragP->fr_offset, 1, BFD_RELOC_UNUSED + (int)fragP->fr_opcode);
252b5132
RH
1325 fragP->fr_fix += 2;
1326 }
1327 /* Out of range conditional branch. Emit a branch around a jump. */
1328 else if (fragP->fr_subtype == 1)
1329 {
28e4f854 1330 unsigned char *buffer =
252b5132
RH
1331 (unsigned char *) (fragP->fr_fix + fragP->fr_literal);
1332
1333 /* Reverse the condition of the first branch. */
1334 buffer[0] ^= 0x08;
1335 /* Mask off all the displacement bits. */
1336 buffer[0] &= 0x8f;
1337 buffer[1] &= 0x07;
1338 /* Now set the displacement bits so that we branch
1339 around the unconditional branch. */
1340 buffer[0] |= 0x30;
1341
1342 /* Now create the unconditional branch + fixup to the final
1343 target. */
1344 md_number_to_chars (buffer + 2, 0x00000780, 4);
1345 fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol,
1346 fragP->fr_offset, 1, BFD_RELOC_UNUSED +
1347 (int) fragP->fr_opcode + 1);
252b5132
RH
1348 fragP->fr_fix += 6;
1349 }
1350 /* Out of range unconditional branch. Emit a jump. */
1351 else if (fragP->fr_subtype == 3)
1352 {
1353 md_number_to_chars (fragP->fr_fix + fragP->fr_literal, 0x00000780, 4);
1354 fix_new (fragP, fragP->fr_fix, 4, fragP->fr_symbol,
1355 fragP->fr_offset, 1, BFD_RELOC_UNUSED +
1356 (int) fragP->fr_opcode + 1);
252b5132
RH
1357 fragP->fr_fix += 4;
1358 }
1359 else
1360 abort ();
1361}
1362
1363valueT
1364md_section_align (seg, addr)
28e4f854
KH
1365 asection *seg;
1366 valueT addr;
252b5132
RH
1367{
1368 int align = bfd_get_section_alignment (stdoutput, seg);
1369 return ((addr + (1 << align) - 1) & (-1 << align));
1370}
1371
1372void
1373md_begin ()
1374{
28e4f854
KH
1375 char *prev_name = "";
1376 register const struct v850_opcode *op;
1377 flagword applicable;
252b5132
RH
1378
1379 if (strncmp (TARGET_CPU, "v850ea", 6) == 0)
1380 {
1381 if (machine == -1)
1382 machine = bfd_mach_v850ea;
28e4f854 1383
252b5132
RH
1384 if (processor_mask == -1)
1385 processor_mask = PROCESSOR_V850EA;
1386 }
1387 else if (strncmp (TARGET_CPU, "v850e", 5) == 0)
1388 {
1389 if (machine == -1)
28e4f854
KH
1390 machine = bfd_mach_v850e;
1391
252b5132
RH
1392 if (processor_mask == -1)
1393 processor_mask = PROCESSOR_V850E;
1394 }
28e4f854 1395 else if (strncmp (TARGET_CPU, "v850", 4) == 0)
252b5132
RH
1396 {
1397 if (machine == -1)
28e4f854
KH
1398 machine = 0;
1399
252b5132
RH
1400 if (processor_mask == -1)
1401 processor_mask = PROCESSOR_V850;
1402 }
1403 else
28e4f854
KH
1404 /* xgettext:c-format */
1405 as_bad (_("Unable to determine default target processor from string: %s"),
252b5132
RH
1406 TARGET_CPU);
1407
19d63e5d 1408 v850_hash = hash_new ();
252b5132
RH
1409
1410 /* Insert unique names into hash table. The V850 instruction set
1411 has many identical opcode names that have different opcodes based
1412 on the operands. This hash table then provides a quick index to
1413 the first opcode with a particular name in the opcode table. */
1414
1415 op = v850_opcodes;
1416 while (op->name)
1417 {
28e4f854 1418 if (strcmp (prev_name, op->name))
252b5132
RH
1419 {
1420 prev_name = (char *) op->name;
1421 hash_insert (v850_hash, op->name, (char *) op);
1422 }
1423 op++;
1424 }
1425
1426 bfd_set_arch_mach (stdoutput, TARGET_ARCH, machine);
1427
1428 applicable = bfd_applicable_section_flags (stdoutput);
28e4f854 1429
252b5132
RH
1430 call_table_data_section = subseg_new (".call_table_data", 0);
1431 bfd_set_section_flags (stdoutput, call_table_data_section,
1432 applicable & (SEC_ALLOC | SEC_LOAD | SEC_RELOC
1433 | SEC_DATA | SEC_HAS_CONTENTS));
28e4f854 1434
252b5132
RH
1435 call_table_text_section = subseg_new (".call_table_text", 0);
1436 bfd_set_section_flags (stdoutput, call_table_text_section,
1437 applicable & (SEC_ALLOC | SEC_LOAD | SEC_READONLY
1438 | SEC_CODE));
28e4f854 1439
252b5132
RH
1440 /* Restore text section as the current default. */
1441 subseg_set (text_section, 0);
1442}
1443
252b5132 1444static bfd_reloc_code_real_type
28e4f854 1445handle_ctoff (const struct v850_operand *operand)
252b5132
RH
1446{
1447 if (operand == NULL)
1448 return BFD_RELOC_V850_CALLT_16_16_OFFSET;
1449
28e4f854 1450 if (operand->bits != 6
252b5132
RH
1451 || operand->shift != 0)
1452 {
1453 as_bad (_("ctoff() relocation used on an instruction which does not support it"));
1454 return BFD_RELOC_64; /* Used to indicate an error condition. */
1455 }
28e4f854 1456
252b5132
RH
1457 return BFD_RELOC_V850_CALLT_6_7_OFFSET;
1458}
1459
1460static bfd_reloc_code_real_type
28e4f854 1461handle_sdaoff (const struct v850_operand *operand)
252b5132 1462{
28e4f854
KH
1463 if (operand == NULL)
1464 return BFD_RELOC_V850_SDA_16_16_OFFSET;
1465
1466 if (operand->bits == 15 && operand->shift == 17)
1467 return BFD_RELOC_V850_SDA_15_16_OFFSET;
1468
1469 if (operand->bits == -1)
1470 return BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET;
1471
1472 if (operand->bits != 16
252b5132
RH
1473 || operand->shift != 16)
1474 {
1475 as_bad (_("sdaoff() relocation used on an instruction which does not support it"));
1476 return BFD_RELOC_64; /* Used to indicate an error condition. */
1477 }
28e4f854 1478
252b5132
RH
1479 return BFD_RELOC_V850_SDA_16_16_OFFSET;
1480}
1481
1482static bfd_reloc_code_real_type
28e4f854 1483handle_zdaoff (const struct v850_operand *operand)
252b5132 1484{
28e4f854
KH
1485 if (operand == NULL)
1486 return BFD_RELOC_V850_ZDA_16_16_OFFSET;
1487
1488 if (operand->bits == 15 && operand->shift == 17)
1489 return BFD_RELOC_V850_ZDA_15_16_OFFSET;
252b5132 1490
28e4f854
KH
1491 if (operand->bits == -1)
1492 return BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET;
1493
1494 if (operand->bits != 16
252b5132
RH
1495 || operand->shift != 16)
1496 {
1497 as_bad (_("zdaoff() relocation used on an instruction which does not support it"));
28e4f854
KH
1498 /* Used to indicate an error condition. */
1499 return BFD_RELOC_64;
252b5132 1500 }
28e4f854 1501
252b5132
RH
1502 return BFD_RELOC_V850_ZDA_16_16_OFFSET;
1503}
1504
1505static bfd_reloc_code_real_type
28e4f854 1506handle_tdaoff (const struct v850_operand *operand)
252b5132 1507{
28e4f854
KH
1508 if (operand == NULL)
1509 /* Data item, not an instruction. */
1510 return BFD_RELOC_V850_TDA_7_7_OFFSET;
1511
1512 if (operand->bits == 6 && operand->shift == 1)
1513 /* sld.w/sst.w, operand: D8_6 */
1514 return BFD_RELOC_V850_TDA_6_8_OFFSET;
1515
1516 if (operand->bits == 4 && operand->insert != NULL)
1517 /* sld.hu, operand: D5-4 */
1518 return BFD_RELOC_V850_TDA_4_5_OFFSET;
1519
1520 if (operand->bits == 4 && operand->insert == NULL)
1521 /* sld.bu, operand: D4 */
1522 return BFD_RELOC_V850_TDA_4_4_OFFSET;
1523
1524 if (operand->bits == 16 && operand->shift == 16)
1525 /* set1 & chums, operands: D16 */
1526 return BFD_RELOC_V850_TDA_16_16_OFFSET;
1527
252b5132
RH
1528 if (operand->bits != 7)
1529 {
1530 as_bad (_("tdaoff() relocation used on an instruction which does not support it"));
28e4f854
KH
1531 /* Used to indicate an error condition. */
1532 return BFD_RELOC_64;
252b5132 1533 }
28e4f854 1534
252b5132 1535 return operand->insert != NULL
28e4f854
KH
1536 ? BFD_RELOC_V850_TDA_7_8_OFFSET /* sld.h/sst.h, operand: D8_7 */
1537 : BFD_RELOC_V850_TDA_7_7_OFFSET; /* sld.b/sst.b, opreand: D7 */
252b5132
RH
1538}
1539
1540/* Warning: The code in this function relies upon the definitions
1541 in the v850_operands[] array (defined in opcodes/v850-opc.c)
1542 matching the hard coded values contained herein. */
1543
1544static bfd_reloc_code_real_type
28e4f854 1545v850_reloc_prefix (const struct v850_operand *operand)
252b5132
RH
1546{
1547 boolean paren_skipped = false;
1548
252b5132 1549 /* Skip leading opening parenthesis. */
28e4f854 1550 if (*input_line_pointer == '(')
252b5132 1551 {
28e4f854 1552 ++input_line_pointer;
252b5132
RH
1553 paren_skipped = true;
1554 }
1555
1556#define CHECK_(name, reloc) \
1557 if (strncmp (input_line_pointer, name##"(", strlen (name) + 1) == 0) \
1558 { \
1559 input_line_pointer += strlen (name); \
1560 return reloc; \
1561 }
28e4f854
KH
1562
1563 CHECK_ ("hi0", BFD_RELOC_HI16 );
1564 CHECK_ ("hi", BFD_RELOC_HI16_S );
1565 CHECK_ ("lo", BFD_RELOC_LO16 );
252b5132
RH
1566 CHECK_ ("sdaoff", handle_sdaoff (operand));
1567 CHECK_ ("zdaoff", handle_zdaoff (operand));
1568 CHECK_ ("tdaoff", handle_tdaoff (operand));
28e4f854
KH
1569 CHECK_ ("hilo", BFD_RELOC_32 );
1570 CHECK_ ("ctoff", handle_ctoff (operand) );
1571
252b5132
RH
1572 /* Restore skipped parenthesis. */
1573 if (paren_skipped)
28e4f854
KH
1574 --input_line_pointer;
1575
252b5132
RH
1576 return BFD_RELOC_UNUSED;
1577}
1578
1579/* Insert an operand value into an instruction. */
1580
1581static unsigned long
1582v850_insert_operand (insn, operand, val, file, line, str)
28e4f854
KH
1583 unsigned long insn;
1584 const struct v850_operand *operand;
1585 offsetT val;
1586 char *file;
1587 unsigned int line;
1588 char *str;
252b5132
RH
1589{
1590 if (operand->insert)
1591 {
28e4f854
KH
1592 const char *message = NULL;
1593
1594 insn = operand->insert (insn, val, &message);
252b5132
RH
1595 if (message != NULL)
1596 {
1597 if ((operand->flags & V850_OPERAND_SIGNED)
1598 && ! warn_signed_overflows
1599 && strstr (message, "out of range") != NULL)
1600 {
28e4f854 1601 /* Skip warning... */
252b5132
RH
1602 }
1603 else if ((operand->flags & V850_OPERAND_SIGNED) == 0
1604 && ! warn_unsigned_overflows
1605 && strstr (message, "out of range") != NULL)
1606 {
28e4f854 1607 /* Skip warning... */
252b5132
RH
1608 }
1609 else if (str)
1610 {
1611 if (file == (char *) NULL)
1612 as_warn ("%s: %s", str, message);
1613 else
1614 as_warn_where (file, line, "%s: %s", str, message);
1615 }
1616 else
1617 {
1618 if (file == (char *) NULL)
1619 as_warn (message);
1620 else
1621 as_warn_where (file, line, message);
1622 }
1623 }
1624 }
1625 else
1626 {
1627 if (operand->bits != 32)
1628 {
28e4f854 1629 long min, max;
252b5132
RH
1630
1631 if ((operand->flags & V850_OPERAND_SIGNED) != 0)
1632 {
1633 if (! warn_signed_overflows)
1634 max = (1 << operand->bits) - 1;
1635 else
1636 max = (1 << (operand->bits - 1)) - 1;
28e4f854
KH
1637
1638 min = -(1 << (operand->bits - 1));
252b5132
RH
1639 }
1640 else
1641 {
1642 max = (1 << operand->bits) - 1;
28e4f854 1643
252b5132 1644 if (! warn_unsigned_overflows)
28e4f854 1645 min = -(1 << (operand->bits - 1));
252b5132
RH
1646 else
1647 min = 0;
1648 }
28e4f854 1649
252b5132
RH
1650 if (val < (offsetT) min || val > (offsetT) max)
1651 {
28e4f854
KH
1652 /* xgettext:c-format */
1653 const char *err =
1654 _("operand out of range (%s not between %ld and %ld)");
1655 char buf[100];
1656
252b5132
RH
1657 /* Restore min and mix to expected values for decimal ranges. */
1658 if ((operand->flags & V850_OPERAND_SIGNED)
1659 && ! warn_signed_overflows)
1660 max = (1 << (operand->bits - 1)) - 1;
1661
1662 if (! (operand->flags & V850_OPERAND_SIGNED)
1663 && ! warn_unsigned_overflows)
1664 min = 0;
1665
1666 if (str)
1667 {
1668 sprintf (buf, "%s: ", str);
28e4f854 1669
252b5132
RH
1670 sprint_value (buf + strlen (buf), val);
1671 }
1672 else
1673 sprint_value (buf, val);
28e4f854 1674
252b5132
RH
1675 if (file == (char *) NULL)
1676 as_warn (err, buf, min, max);
1677 else
1678 as_warn_where (file, line, err, buf, min, max);
1679 }
1680 }
1681
1682 insn |= (((long) val & ((1 << operand->bits) - 1)) << operand->shift);
1683 }
28e4f854 1684
252b5132
RH
1685 return insn;
1686}
252b5132 1687\f
28e4f854 1688static char copy_of_instruction[128];
252b5132
RH
1689
1690void
28e4f854
KH
1691md_assemble (str)
1692 char *str;
252b5132 1693{
28e4f854
KH
1694 char *s;
1695 char *start_of_operands;
1696 struct v850_opcode *opcode;
1697 struct v850_opcode *next_opcode;
1698 const unsigned char *opindex_ptr;
1699 int next_opindex;
1700 int relaxable = 0;
1701 unsigned long insn;
1702 unsigned long insn_size;
1703 char *f;
1704 int i;
1705 int match;
1706 boolean extra_data_after_insn = false;
1707 unsigned extra_data_len = 0;
1708 unsigned long extra_data = 0;
1709 char *saved_input_line_pointer;
1710
252b5132 1711 strncpy (copy_of_instruction, str, sizeof (copy_of_instruction) - 1);
28e4f854 1712
252b5132 1713 /* Get the opcode. */
3882b010 1714 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132 1715 continue;
28e4f854 1716
252b5132
RH
1717 if (*s != '\0')
1718 *s++ = '\0';
1719
28e4f854 1720 /* Find the first opcode with the proper name. */
252b5132
RH
1721 opcode = (struct v850_opcode *) hash_find (v850_hash, str);
1722 if (opcode == NULL)
1723 {
28e4f854 1724 /* xgettext:c-format */
252b5132
RH
1725 as_bad (_("Unrecognized opcode: `%s'"), str);
1726 ignore_rest_of_line ();
1727 return;
1728 }
1729
1730 str = s;
3882b010 1731 while (ISSPACE (*str))
28e4f854 1732 ++str;
252b5132
RH
1733
1734 start_of_operands = str;
1735
1736 saved_input_line_pointer = input_line_pointer;
28e4f854 1737
252b5132
RH
1738 for (;;)
1739 {
28e4f854 1740 const char *errmsg = NULL;
252b5132
RH
1741
1742 match = 0;
28e4f854 1743
252b5132
RH
1744 if ((opcode->processors & processor_mask) == 0)
1745 {
1746 errmsg = _("Target processor does not support this instruction.");
1747 goto error;
1748 }
28e4f854 1749
252b5132
RH
1750 relaxable = 0;
1751 fc = 0;
1752 next_opindex = 0;
1753 insn = opcode->opcode;
1754 extra_data_after_insn = false;
1755
1756 input_line_pointer = str = start_of_operands;
1757
28e4f854 1758 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
252b5132 1759 {
28e4f854
KH
1760 const struct v850_operand *operand;
1761 char *hold;
1762 expressionS ex;
1763 bfd_reloc_code_real_type reloc;
252b5132
RH
1764
1765 if (next_opindex == 0)
1766 {
28e4f854 1767 operand = &v850_operands[*opindex_ptr];
252b5132
RH
1768 }
1769 else
1770 {
28e4f854 1771 operand = &v850_operands[next_opindex];
252b5132
RH
1772 next_opindex = 0;
1773 }
1774
1775 errmsg = NULL;
1776
1777 while (*str == ' ' || *str == ',' || *str == '[' || *str == ']')
28e4f854 1778 ++str;
252b5132
RH
1779
1780 if (operand->flags & V850_OPERAND_RELAX)
1781 relaxable = 1;
1782
28e4f854 1783 /* Gather the operand. */
252b5132
RH
1784 hold = input_line_pointer;
1785 input_line_pointer = str;
28e4f854
KH
1786
1787 /* lo(), hi(), hi0(), etc... */
252b5132
RH
1788 if ((reloc = v850_reloc_prefix (operand)) != BFD_RELOC_UNUSED)
1789 {
1790 /* This is a fake reloc, used to indicate an error condition. */
1791 if (reloc == BFD_RELOC_64)
1792 {
1793 match = 1;
1794 goto error;
1795 }
28e4f854
KH
1796
1797 expression (&ex);
252b5132
RH
1798
1799 if (ex.X_op == O_constant)
1800 {
1801 switch (reloc)
1802 {
1803 case BFD_RELOC_V850_ZDA_16_16_OFFSET:
1804 /* To cope with "not1 7, zdaoff(0xfffff006)[r0]"
1805 and the like. */
1806 /* Fall through. */
28e4f854 1807
252b5132
RH
1808 case BFD_RELOC_LO16:
1809 {
1810 /* Truncate, then sign extend the value. */
1811 ex.X_add_number = SEXT16 (ex.X_add_number);
1812 break;
1813 }
1814
1815 case BFD_RELOC_HI16:
1816 {
1817 /* Truncate, then sign extend the value. */
1818 ex.X_add_number = SEXT16 (ex.X_add_number >> 16);
1819 break;
1820 }
1821
1822 case BFD_RELOC_HI16_S:
1823 {
1824 /* Truncate, then sign extend the value. */
28e4f854 1825 int temp = (ex.X_add_number >> 16) & 0xffff;
252b5132
RH
1826
1827 temp += (ex.X_add_number >> 15) & 1;
1828
1829 ex.X_add_number = SEXT16 (temp);
1830 break;
1831 }
28e4f854 1832
252b5132
RH
1833 case BFD_RELOC_32:
1834 if ((operand->flags & V850E_IMMEDIATE32) == 0)
1835 {
1836 errmsg = _("immediate operand is too large");
1837 goto error;
1838 }
28e4f854 1839
252b5132
RH
1840 extra_data_after_insn = true;
1841 extra_data_len = 4;
1842 extra_data = ex.X_add_number;
1843 ex.X_add_number = 0;
1844 break;
28e4f854 1845
252b5132
RH
1846 default:
1847 fprintf (stderr, "reloc: %d\n", reloc);
1848 as_bad (_("AAARG -> unhandled constant reloc"));
1849 break;
1850 }
1851
1852 if (fc > MAX_INSN_FIXUPS)
1853 as_fatal (_("too many fixups"));
28e4f854
KH
1854
1855 fixups[fc].exp = ex;
1856 fixups[fc].opindex = *opindex_ptr;
1857 fixups[fc].reloc = reloc;
252b5132
RH
1858 fc++;
1859 }
1860 else
1861 {
1862 if (reloc == BFD_RELOC_32)
1863 {
1864 if ((operand->flags & V850E_IMMEDIATE32) == 0)
1865 {
1866 errmsg = _("immediate operand is too large");
1867 goto error;
1868 }
28e4f854 1869
252b5132
RH
1870 extra_data_after_insn = true;
1871 extra_data_len = 4;
1872 extra_data = ex.X_add_number;
1873 }
28e4f854 1874
252b5132
RH
1875 if (fc > MAX_INSN_FIXUPS)
1876 as_fatal (_("too many fixups"));
1877
28e4f854
KH
1878 fixups[fc].exp = ex;
1879 fixups[fc].opindex = *opindex_ptr;
1880 fixups[fc].reloc = reloc;
252b5132
RH
1881 fc++;
1882 }
1883 }
1884 else
1885 {
1886 errmsg = NULL;
28e4f854
KH
1887
1888 if ((operand->flags & V850_OPERAND_REG) != 0)
252b5132 1889 {
28e4f854 1890 if (!register_name (&ex))
252b5132
RH
1891 {
1892 errmsg = _("invalid register name");
1893 }
1894 else if ((operand->flags & V850_NOT_R0)
28e4f854 1895 && ex.X_add_number == 0)
252b5132
RH
1896 {
1897 errmsg = _("register r0 cannot be used here");
28e4f854 1898
252b5132
RH
1899 /* Force an error message to be generated by
1900 skipping over any following potential matches
1901 for this opcode. */
1902 opcode += 3;
1903 }
1904 }
28e4f854 1905 else if ((operand->flags & V850_OPERAND_SRG) != 0)
252b5132 1906 {
28e4f854 1907 if (!system_register_name (&ex, true, false))
252b5132
RH
1908 {
1909 errmsg = _("invalid system register name");
1910 }
1911 }
1912 else if ((operand->flags & V850_OPERAND_EP) != 0)
1913 {
28e4f854
KH
1914 char *start = input_line_pointer;
1915 char c = get_symbol_end ();
1916
252b5132
RH
1917 if (strcmp (start, "ep") != 0 && strcmp (start, "r30") != 0)
1918 {
1919 /* Put things back the way we found them. */
1920 *input_line_pointer = c;
1921 input_line_pointer = start;
1922 errmsg = _("expected EP register");
1923 goto error;
1924 }
28e4f854 1925
252b5132
RH
1926 *input_line_pointer = c;
1927 str = input_line_pointer;
1928 input_line_pointer = hold;
28e4f854
KH
1929
1930 while (*str == ' ' || *str == ','
1931 || *str == '[' || *str == ']')
1932 ++str;
252b5132
RH
1933 continue;
1934 }
28e4f854 1935 else if ((operand->flags & V850_OPERAND_CC) != 0)
252b5132 1936 {
28e4f854 1937 if (!cc_name (&ex))
252b5132
RH
1938 {
1939 errmsg = _("invalid condition code name");
1940 }
1941 }
28e4f854 1942 else if (operand->flags & V850E_PUSH_POP)
252b5132 1943 {
28e4f854
KH
1944 errmsg = parse_register_list (&insn, operand);
1945
252b5132
RH
1946 /* The parse_register_list() function has already done
1947 everything, so fake a dummy expression. */
1948 ex.X_op = O_constant;
1949 ex.X_add_number = 0;
1950 }
28e4f854 1951 else if (operand->flags & V850E_IMMEDIATE16)
252b5132 1952 {
28e4f854 1953 expression (&ex);
252b5132
RH
1954
1955 if (ex.X_op != O_constant)
1956 errmsg = _("constant expression expected");
1957 else if (ex.X_add_number & 0xffff0000)
1958 {
1959 if (ex.X_add_number & 0xffff)
1960 errmsg = _("constant too big to fit into instruction");
1961 else if ((insn & 0x001fffc0) == 0x00130780)
1962 ex.X_add_number >>= 16;
1963 else
1964 errmsg = _("constant too big to fit into instruction");
1965 }
28e4f854 1966
252b5132
RH
1967 extra_data_after_insn = true;
1968 extra_data_len = 2;
1969 extra_data = ex.X_add_number;
1970 ex.X_add_number = 0;
1971 }
28e4f854 1972 else if (operand->flags & V850E_IMMEDIATE32)
252b5132 1973 {
28e4f854
KH
1974 expression (&ex);
1975
252b5132
RH
1976 if (ex.X_op != O_constant)
1977 errmsg = _("constant expression expected");
28e4f854 1978
252b5132
RH
1979 extra_data_after_insn = true;
1980 extra_data_len = 4;
1981 extra_data = ex.X_add_number;
1982 ex.X_add_number = 0;
1983 }
28e4f854 1984 else if (register_name (&ex)
252b5132
RH
1985 && (operand->flags & V850_OPERAND_REG) == 0)
1986 {
1987 char c;
28e4f854
KH
1988 int exists = 0;
1989
252b5132
RH
1990 /* It is possible that an alias has been defined that
1991 matches a register name. For example the code may
1992 include a ".set ZERO, 0" directive, which matches
1993 the register name "zero". Attempt to reparse the
1994 field as an expression, and only complain if we
1995 cannot generate a constant. */
1996
1997 input_line_pointer = str;
1998
1999 c = get_symbol_end ();
28e4f854 2000
252b5132
RH
2001 if (symbol_find (str) != NULL)
2002 exists = 1;
28e4f854
KH
2003
2004 *input_line_pointer = c;
252b5132 2005 input_line_pointer = str;
28e4f854
KH
2006
2007 expression (&ex);
252b5132
RH
2008
2009 if (ex.X_op != O_constant)
2010 {
2011 /* If this register is actually occuring too early on
2012 the parsing of the instruction, (because another
2013 field is missing) then report this. */
2014 if (opindex_ptr[1] != 0
28e4f854
KH
2015 && (v850_operands[opindex_ptr[1]].flags
2016 & V850_OPERAND_REG))
252b5132
RH
2017 errmsg = _("syntax error: value is missing before the register name");
2018 else
2019 errmsg = _("syntax error: register not expected");
2020
28e4f854
KH
2021 /* If we created a symbol in the process of this
2022 test then delete it now, so that it will not
2023 be output with the real symbols... */
252b5132
RH
2024 if (exists == 0
2025 && ex.X_op == O_symbol)
2026 symbol_remove (ex.X_add_symbol,
28e4f854 2027 &symbol_rootP, &symbol_lastP);
252b5132
RH
2028 }
2029 }
28e4f854 2030 else if (system_register_name (&ex, false, false)
252b5132
RH
2031 && (operand->flags & V850_OPERAND_SRG) == 0)
2032 {
2033 errmsg = _("syntax error: system register not expected");
2034 }
2035 else if (cc_name (&ex)
2036 && (operand->flags & V850_OPERAND_CC) == 0)
2037 {
2038 errmsg = _("syntax error: condition code not expected");
2039 }
2040 else
2041 {
28e4f854 2042 expression (&ex);
252b5132
RH
2043 /* Special case:
2044 If we are assembling a MOV instruction (or a CALLT.... :-)
2045 and the immediate value does not fit into the bits
2046 available then create a fake error so that the next MOV
2047 instruction will be selected. This one has a 32 bit
2048 immediate field. */
2049
2050 if (((insn & 0x07e0) == 0x0200)
2051 && ex.X_op == O_constant
28e4f854 2052 && (ex.X_add_number < (-(1 << (operand->bits - 1)))
252b5132
RH
2053 || ex.X_add_number > ((1 << operand->bits) - 1)))
2054 errmsg = _("immediate operand is too large");
2055 }
2056
2057 if (errmsg)
2058 goto error;
252b5132 2059
28e4f854
KH
2060#if 0
2061 fprintf (stderr,
2062 " insn: %x, operand %d, op: %d, add_number: %d\n",
2063 insn, opindex_ptr - opcode->operands,
2064 ex.X_op, ex.X_add_number);
2065#endif
2066
2067 switch (ex.X_op)
252b5132
RH
2068 {
2069 case O_illegal:
2070 errmsg = _("illegal operand");
2071 goto error;
2072 case O_absent:
2073 errmsg = _("missing operand");
2074 goto error;
2075 case O_register:
28e4f854
KH
2076 if ((operand->flags
2077 & (V850_OPERAND_REG | V850_OPERAND_SRG)) == 0)
252b5132
RH
2078 {
2079 errmsg = _("invalid operand");
2080 goto error;
2081 }
2082 insn = v850_insert_operand (insn, operand, ex.X_add_number,
2083 (char *) NULL, 0,
2084 copy_of_instruction);
2085 break;
2086
2087 case O_constant:
2088 insn = v850_insert_operand (insn, operand, ex.X_add_number,
2089 (char *) NULL, 0,
2090 copy_of_instruction);
2091 break;
2092
2093 default:
2094 /* We need to generate a fixup for this expression. */
2095 if (fc >= MAX_INSN_FIXUPS)
2096 as_fatal (_("too many fixups"));
2097
28e4f854
KH
2098 fixups[fc].exp = ex;
2099 fixups[fc].opindex = *opindex_ptr;
2100 fixups[fc].reloc = BFD_RELOC_UNUSED;
252b5132
RH
2101 ++fc;
2102 break;
2103 }
2104 }
2105
2106 str = input_line_pointer;
2107 input_line_pointer = hold;
2108
2109 while (*str == ' ' || *str == ',' || *str == '[' || *str == ']'
2110 || *str == ')')
2111 ++str;
2112 }
2113 match = 1;
2114
2115 error:
2116 if (match == 0)
28e4f854 2117 {
252b5132
RH
2118 next_opcode = opcode + 1;
2119 if (next_opcode->name != NULL
2120 && strcmp (next_opcode->name, opcode->name) == 0)
2121 {
2122 opcode = next_opcode;
2123
2124 /* Skip versions that are not supported by the target
2125 processor. */
2126 if ((opcode->processors & processor_mask) == 0)
2127 goto error;
28e4f854 2128
252b5132
RH
2129 continue;
2130 }
28e4f854 2131
252b5132 2132 as_bad ("%s: %s", copy_of_instruction, errmsg);
28e4f854
KH
2133
2134 if (*input_line_pointer == ']')
2135 ++input_line_pointer;
2136
252b5132
RH
2137 ignore_rest_of_line ();
2138 input_line_pointer = saved_input_line_pointer;
2139 return;
28e4f854 2140 }
252b5132
RH
2141 break;
2142 }
28e4f854 2143
3882b010 2144 while (ISSPACE (*str))
252b5132
RH
2145 ++str;
2146
2147 if (*str != '\0')
28e4f854 2148 /* xgettext:c-format */
252b5132
RH
2149 as_bad (_("junk at end of line: `%s'"), str);
2150
2151 input_line_pointer = str;
2152
9fcc94b6
AM
2153 /* Tie dwarf2 debug info to the address at the start of the insn.
2154 We can't do this after the insn has been output as the current
2155 frag may have been closed off. eg. by frag_var. */
2156 dwarf2_emit_insn (0);
2157
28e4f854
KH
2158 /* Write out the instruction. */
2159
252b5132
RH
2160 if (relaxable && fc > 0)
2161 {
2162 insn_size = 2;
2163 fc = 0;
2164
2165 if (!strcmp (opcode->name, "br"))
2166 {
2167 f = frag_var (rs_machine_dependent, 4, 2, 2,
2168 fixups[0].exp.X_add_symbol,
2169 fixups[0].exp.X_add_number,
28e4f854 2170 (char *) fixups[0].opindex);
252b5132
RH
2171 md_number_to_chars (f, insn, insn_size);
2172 md_number_to_chars (f + 2, 0, 2);
2173 }
2174 else
2175 {
2176 f = frag_var (rs_machine_dependent, 6, 4, 0,
2177 fixups[0].exp.X_add_symbol,
2178 fixups[0].exp.X_add_number,
28e4f854 2179 (char *) fixups[0].opindex);
252b5132
RH
2180 md_number_to_chars (f, insn, insn_size);
2181 md_number_to_chars (f + 2, 0, 4);
2182 }
2183 }
28e4f854 2184 else
252b5132
RH
2185 {
2186 /* Four byte insns have an opcode with the two high bits on. */
2187 if ((insn & 0x0600) == 0x0600)
2188 insn_size = 4;
2189 else
2190 insn_size = 2;
2191
28e4f854 2192 /* Special case: 32 bit MOV. */
252b5132
RH
2193 if ((insn & 0xffe0) == 0x0620)
2194 insn_size = 2;
28e4f854 2195
252b5132 2196 f = frag_more (insn_size);
252b5132
RH
2197 md_number_to_chars (f, insn, insn_size);
2198
2199 if (extra_data_after_insn)
2200 {
2201 f = frag_more (extra_data_len);
252b5132
RH
2202 md_number_to_chars (f, extra_data, extra_data_len);
2203
2204 extra_data_after_insn = false;
2205 }
2206 }
2207
2208 /* Create any fixups. At this point we do not use a
2209 bfd_reloc_code_real_type, but instead just use the
2210 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2211 handle fixups for any operand type, although that is admittedly
2212 not a very exciting feature. We pick a BFD reloc type in
94f592af 2213 md_apply_fix3. */
252b5132
RH
2214 for (i = 0; i < fc; i++)
2215 {
28e4f854
KH
2216 const struct v850_operand *operand;
2217 bfd_reloc_code_real_type reloc;
2218
2219 operand = &v850_operands[fixups[i].opindex];
252b5132
RH
2220
2221 reloc = fixups[i].reloc;
28e4f854 2222
252b5132
RH
2223 if (reloc != BFD_RELOC_UNUSED)
2224 {
28e4f854
KH
2225 reloc_howto_type *reloc_howto =
2226 bfd_reloc_type_lookup (stdoutput, reloc);
2227 int size;
2228 int address;
2229 fixS *fixP;
252b5132
RH
2230
2231 if (!reloc_howto)
28e4f854
KH
2232 abort ();
2233
252b5132
RH
2234 size = bfd_get_reloc_size (reloc_howto);
2235
2236 /* XXX This will abort on an R_V850_8 reloc -
28e4f854
KH
2237 is this reloc actually used? */
2238 if (size != 2 && size != 4)
252b5132
RH
2239 abort ();
2240
2241 address = (f - frag_now->fr_literal) + insn_size - size;
2242
2243 if (reloc == BFD_RELOC_32)
28e4f854
KH
2244 address += 2;
2245
252b5132 2246 fixP = fix_new_exp (frag_now, address, size,
28e4f854 2247 &fixups[i].exp,
252b5132
RH
2248 reloc_howto->pc_relative,
2249 reloc);
2250
2251 switch (reloc)
2252 {
2253 case BFD_RELOC_LO16:
2254 case BFD_RELOC_HI16:
2255 case BFD_RELOC_HI16_S:
2256 fixP->fx_no_overflow = 1;
2257 break;
5480ccf3
NC
2258 default:
2259 break;
252b5132
RH
2260 }
2261 }
2262 else
2263 {
28e4f854 2264 fix_new_exp (frag_now,
252b5132
RH
2265 f - frag_now->fr_literal, 4,
2266 & fixups[i].exp,
28e4f854 2267 1 /* FIXME: V850_OPERAND_RELATIVE ??? */,
252b5132 2268 (bfd_reloc_code_real_type) (fixups[i].opindex
28e4f854 2269 + (int) BFD_RELOC_UNUSED));
252b5132
RH
2270 }
2271 }
2272
2273 input_line_pointer = saved_input_line_pointer;
2274}
2275
28e4f854
KH
2276/* If while processing a fixup, a reloc really needs to be created
2277 then it is done here. */
252b5132 2278
252b5132
RH
2279arelent *
2280tc_gen_reloc (seg, fixp)
28e4f854
KH
2281 asection *seg ATTRIBUTE_UNUSED;
2282 fixS *fixp;
252b5132 2283{
28e4f854
KH
2284 arelent *reloc;
2285
2286 reloc = (arelent *) xmalloc (sizeof (arelent));
2287 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
2288 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
2289 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
2290 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
252b5132
RH
2291
2292 if (reloc->howto == (reloc_howto_type *) NULL)
2293 {
2294 as_bad_where (fixp->fx_file, fixp->fx_line,
28e4f854
KH
2295 /* xgettext:c-format */
2296 _("reloc %d not supported by object file format"),
252b5132
RH
2297 (int) fixp->fx_r_type);
2298
2299 xfree (reloc);
28e4f854 2300
252b5132
RH
2301 return NULL;
2302 }
28e4f854
KH
2303
2304 if (fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY
252b5132
RH
2305 || fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT)
2306 reloc->addend = fixp->fx_offset;
2307 else
2308 reloc->addend = fixp->fx_addnumber;
28e4f854 2309
252b5132
RH
2310 return reloc;
2311}
2312
606ab118 2313/* Return current size of variable part of frag. */
28e4f854 2314
252b5132
RH
2315int
2316md_estimate_size_before_relax (fragp, seg)
28e4f854
KH
2317 fragS *fragp;
2318 asection *seg ATTRIBUTE_UNUSED;
252b5132 2319{
606ab118 2320 if (fragp->fr_subtype >= sizeof (md_relax_table) / sizeof (md_relax_table[0]))
252b5132 2321 abort ();
606ab118
AM
2322
2323 return md_relax_table[fragp->fr_subtype].rlx_length;
28e4f854 2324}
252b5132
RH
2325
2326long
2327v850_pcrel_from_section (fixp, section)
28e4f854
KH
2328 fixS *fixp;
2329 segT section;
252b5132
RH
2330{
2331 /* If the symbol is undefined, or in a section other than our own,
d6c497c7 2332 or it is weak (in which case it may well be in another section,
252b5132
RH
2333 then let the linker figure it out. */
2334 if (fixp->fx_addsy != (symbolS *) NULL
2335 && (! S_IS_DEFINED (fixp->fx_addsy)
d6c497c7 2336 || S_IS_WEAK (fixp->fx_addsy)
252b5132 2337 || (S_GET_SEGMENT (fixp->fx_addsy) != section)))
d6c497c7 2338 return 0;
28e4f854 2339
252b5132
RH
2340 return fixp->fx_frag->fr_address + fixp->fx_where;
2341}
2342
94f592af
NC
2343void
2344md_apply_fix3 (fixP, valueP, seg)
2345 fixS *fixP;
2346 valueT *valueP;
28e4f854 2347 segT seg ATTRIBUTE_UNUSED;
252b5132 2348{
94f592af 2349 valueT value = * valueP;
28e4f854 2350 char *where;
252b5132 2351
94f592af
NC
2352 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
2353 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
252b5132 2354 {
94f592af
NC
2355 fixP->fx_done = 0;
2356 return;
252b5132
RH
2357 }
2358
94f592af
NC
2359 if (fixP->fx_addsy == (symbolS *) NULL)
2360 fixP->fx_done = 1;
2361
2362 else if (fixP->fx_pcrel)
2363 ;
2364
252b5132
RH
2365 else
2366 {
94f592af
NC
2367 value = fixP->fx_offset;
2368 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 2369 {
94f592af
NC
2370 if (S_GET_SEGMENT (fixP->fx_subsy) == absolute_section)
2371 value -= S_GET_VALUE (fixP->fx_subsy);
252b5132
RH
2372 else
2373 {
2374 /* We don't actually support subtracting a symbol. */
94f592af 2375 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH
2376 _("expression too complex"));
2377 }
2378 }
2379 }
2380
94f592af 2381 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132 2382 {
28e4f854
KH
2383 int opindex;
2384 const struct v850_operand *operand;
2385 unsigned long insn;
252b5132 2386
94f592af 2387 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
28e4f854 2388 operand = &v850_operands[opindex];
252b5132
RH
2389
2390 /* Fetch the instruction, insert the fully resolved operand
2391 value, and stuff the instruction back again.
2392
2393 Note the instruction has been stored in little endian
2394 format! */
94f592af 2395 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH
2396
2397 insn = bfd_getl32 ((unsigned char *) where);
2398 insn = v850_insert_operand (insn, operand, (offsetT) value,
94f592af 2399 fixP->fx_file, fixP->fx_line, NULL);
252b5132
RH
2400 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
2401
94f592af
NC
2402 if (fixP->fx_done)
2403 /* Nothing else to do here. */
2404 return;
252b5132 2405
28e4f854
KH
2406 /* Determine a BFD reloc value based on the operand information.
2407 We are only prepared to turn a few of the operands into relocs. */
252b5132
RH
2408
2409 if (operand->bits == 22)
94f592af 2410 fixP->fx_r_type = BFD_RELOC_V850_22_PCREL;
252b5132 2411 else if (operand->bits == 9)
94f592af 2412 fixP->fx_r_type = BFD_RELOC_V850_9_PCREL;
252b5132
RH
2413 else
2414 {
28e4f854
KH
2415#if 0
2416 fprintf (stderr, "bits: %d, insn: %x\n", operand->bits, insn);
2417#endif
2418
94f592af 2419 as_bad_where (fixP->fx_file, fixP->fx_line,
28e4f854 2420 _("unresolved expression that must be resolved"));
94f592af
NC
2421 fixP->fx_done = 1;
2422 return;
252b5132
RH
2423 }
2424 }
94f592af 2425 else if (fixP->fx_done)
252b5132
RH
2426 {
2427 /* We still have to insert the value into memory! */
94f592af 2428 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132 2429
94f592af 2430 if (fixP->fx_size == 1)
28e4f854 2431 *where = value & 0xff;
94f592af 2432 else if (fixP->fx_size == 2)
252b5132 2433 bfd_putl16 (value & 0xffff, (unsigned char *) where);
94f592af 2434 else if (fixP->fx_size == 4)
252b5132
RH
2435 bfd_putl32 (value, (unsigned char *) where);
2436 }
28e4f854 2437
94f592af 2438 fixP->fx_addnumber = value;
252b5132 2439}
252b5132
RH
2440\f
2441/* Parse a cons expression. We have to handle hi(), lo(), etc
2442 on the v850. */
28e4f854 2443
252b5132
RH
2444void
2445parse_cons_expression_v850 (exp)
28e4f854 2446 expressionS *exp;
252b5132
RH
2447{
2448 /* See if there's a reloc prefix like hi() we have to handle. */
2449 hold_cons_reloc = v850_reloc_prefix (NULL);
2450
2451 /* Do normal expression parsing. */
2452 expression (exp);
2453}
2454
2455/* Create a fixup for a cons expression. If parse_cons_expression_v850
2456 found a reloc prefix, then we use that reloc, else we choose an
2457 appropriate one based on the size of the expression. */
28e4f854 2458
252b5132
RH
2459void
2460cons_fix_new_v850 (frag, where, size, exp)
28e4f854 2461 fragS *frag;
252b5132
RH
2462 int where;
2463 int size;
2464 expressionS *exp;
2465{
2466 if (hold_cons_reloc == BFD_RELOC_UNUSED)
2467 {
2468 if (size == 4)
2469 hold_cons_reloc = BFD_RELOC_32;
2470 if (size == 2)
2471 hold_cons_reloc = BFD_RELOC_16;
2472 if (size == 1)
2473 hold_cons_reloc = BFD_RELOC_8;
2474 }
2475
2476 if (exp != NULL)
2477 fix_new_exp (frag, where, size, exp, 0, hold_cons_reloc);
2478 else
2479 fix_new (frag, where, size, NULL, 0, 0, hold_cons_reloc);
a8761a19
DD
2480
2481 hold_cons_reloc = BFD_RELOC_UNUSED;
252b5132 2482}
d6c497c7 2483
252b5132
RH
2484boolean
2485v850_fix_adjustable (fixP)
28e4f854 2486 fixS *fixP;
252b5132 2487{
252b5132
RH
2488 if (fixP->fx_addsy == NULL)
2489 return 1;
28e4f854
KH
2490
2491 /* Prevent all adjustments to global symbols. */
252b5132
RH
2492 if (S_IS_EXTERN (fixP->fx_addsy))
2493 return 0;
28e4f854 2494
5480ccf3 2495 /* Similarly for weak symbols. */
252b5132
RH
2496 if (S_IS_WEAK (fixP->fx_addsy))
2497 return 0;
28e4f854
KH
2498
2499 /* Don't adjust function names. */
252b5132
RH
2500 if (S_IS_FUNCTION (fixP->fx_addsy))
2501 return 0;
2502
28e4f854
KH
2503 /* We need the symbol name for the VTABLE entries. */
2504 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
252b5132
RH
2505 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
2506 return 0;
28e4f854 2507
252b5132
RH
2508 return 1;
2509}
28e4f854 2510
252b5132 2511int
d6c497c7 2512v850_force_relocation (fixP)
28e4f854 2513 struct fix *fixP;
252b5132 2514{
d6c497c7
NC
2515 if (fixP->fx_addsy && S_IS_WEAK (fixP->fx_addsy))
2516 return 1;
28e4f854
KH
2517
2518 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
d6c497c7 2519 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
252b5132 2520 return 1;
28e4f854 2521
252b5132
RH
2522 return 0;
2523}
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