2000-11-15 Kazu Hirata <kazu@hxi.com>
[deliverable/binutils-gdb.git] / gas / config / tc-v850.c
CommitLineData
252b5132 1/* tc-v850.c -- Assembler code for the NEC V850
a8761a19 2 Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation.
252b5132
RH
3
4 This file is part of GAS, the GNU Assembler.
5
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
10
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
20
21#include <stdio.h>
22#include <ctype.h>
23#include "as.h"
28e4f854 24#include "subsegs.h"
252b5132 25#include "opcode/v850.h"
a8761a19 26#include "dwarf2dbg.h"
252b5132
RH
27
28#define AREA_ZDA 0
29#define AREA_SDA 1
30#define AREA_TDA 2
31
28e4f854
KH
32/* Sign-extend a 16-bit number. */
33#define SEXT16(x) ((((x) & 0xffff) ^ (~0x7fff)) + 0x8000)
252b5132
RH
34
35/* Temporarily holds the reloc in a cons expression. */
a8761a19 36static bfd_reloc_code_real_type hold_cons_reloc = BFD_RELOC_UNUSED;
252b5132
RH
37
38/* Set to TRUE if we want to be pedantic about signed overflows. */
39static boolean warn_signed_overflows = FALSE;
40static boolean warn_unsigned_overflows = FALSE;
41
42/* Indicates the target BFD machine number. */
28e4f854 43static int machine = -1;
252b5132
RH
44
45/* Indicates the target processor(s) for the assemble. */
28e4f854 46static int processor_mask = -1;
252b5132
RH
47\f
48/* Structure to hold information about predefined registers. */
49struct reg_name
50{
28e4f854
KH
51 const char *name;
52 int value;
252b5132
RH
53};
54
28e4f854
KH
55/* Generic assembler global variables which must be defined by all
56 targets. */
252b5132 57
28e4f854 58/* Characters which always start a comment. */
252b5132
RH
59const char comment_chars[] = "#";
60
61/* Characters which start a comment at the beginning of a line. */
62const char line_comment_chars[] = ";#";
63
28e4f854 64/* Characters which may be used to separate multiple commands on a
252b5132
RH
65 single line. */
66const char line_separator_chars[] = ";";
67
28e4f854 68/* Characters which are used to indicate an exponent in a floating
252b5132
RH
69 point number. */
70const char EXP_CHARS[] = "eE";
71
28e4f854 72/* Characters which mean that a number is a floating point constant,
252b5132
RH
73 as in 0d1.0. */
74const char FLT_CHARS[] = "dD";
75\f
252b5132
RH
76const relax_typeS md_relax_table[] =
77{
78 /* Conditional branches. */
79 {0xff, -0x100, 2, 1},
80 {0x1fffff, -0x200000, 6, 0},
81 /* Unconditional branches. */
82 {0xff, -0x100, 2, 3},
83 {0x1fffff, -0x200000, 4, 0},
84};
85
252b5132
RH
86static segT sdata_section = NULL;
87static segT tdata_section = NULL;
88static segT zdata_section = NULL;
89static segT sbss_section = NULL;
90static segT tbss_section = NULL;
91static segT zbss_section = NULL;
92static segT rosdata_section = NULL;
93static segT rozdata_section = NULL;
94static segT scommon_section = NULL;
95static segT tcommon_section = NULL;
96static segT zcommon_section = NULL;
97static segT call_table_data_section = NULL;
98static segT call_table_text_section = NULL;
99
28e4f854 100/* Fixups. */
252b5132
RH
101#define MAX_INSN_FIXUPS (5)
102struct v850_fixup
103{
28e4f854
KH
104 expressionS exp;
105 int opindex;
252b5132
RH
106 bfd_reloc_code_real_type reloc;
107};
108
28e4f854 109struct v850_fixup fixups[MAX_INSN_FIXUPS];
252b5132 110static int fc;
252b5132
RH
111\f
112void
5480ccf3 113v850_sdata (int ignore ATTRIBUTE_UNUSED)
252b5132 114{
28e4f854
KH
115 obj_elf_section_change_hook ();
116
252b5132
RH
117 subseg_set (sdata_section, (subsegT) get_absolute_expression ());
118
119 demand_empty_rest_of_line ();
120}
121
122void
5480ccf3 123v850_tdata (int ignore ATTRIBUTE_UNUSED)
252b5132 124{
28e4f854
KH
125 obj_elf_section_change_hook ();
126
252b5132 127 subseg_set (tdata_section, (subsegT) get_absolute_expression ());
28e4f854 128
252b5132
RH
129 demand_empty_rest_of_line ();
130}
131
132void
5480ccf3 133v850_zdata (int ignore ATTRIBUTE_UNUSED)
252b5132 134{
28e4f854
KH
135 obj_elf_section_change_hook ();
136
252b5132 137 subseg_set (zdata_section, (subsegT) get_absolute_expression ());
28e4f854 138
252b5132
RH
139 demand_empty_rest_of_line ();
140}
141
142void
5480ccf3 143v850_sbss (int ignore ATTRIBUTE_UNUSED)
252b5132 144{
28e4f854
KH
145 obj_elf_section_change_hook ();
146
252b5132 147 subseg_set (sbss_section, (subsegT) get_absolute_expression ());
28e4f854 148
252b5132
RH
149 demand_empty_rest_of_line ();
150}
151
152void
5480ccf3 153v850_tbss (int ignore ATTRIBUTE_UNUSED)
252b5132 154{
28e4f854
KH
155 obj_elf_section_change_hook ();
156
252b5132 157 subseg_set (tbss_section, (subsegT) get_absolute_expression ());
28e4f854 158
252b5132
RH
159 demand_empty_rest_of_line ();
160}
161
162void
5480ccf3 163v850_zbss (int ignore ATTRIBUTE_UNUSED)
252b5132 164{
28e4f854
KH
165 obj_elf_section_change_hook ();
166
252b5132 167 subseg_set (zbss_section, (subsegT) get_absolute_expression ());
28e4f854 168
252b5132
RH
169 demand_empty_rest_of_line ();
170}
171
172void
5480ccf3 173v850_rosdata (int ignore ATTRIBUTE_UNUSED)
252b5132 174{
28e4f854
KH
175 obj_elf_section_change_hook ();
176
252b5132 177 subseg_set (rosdata_section, (subsegT) get_absolute_expression ());
28e4f854 178
252b5132
RH
179 demand_empty_rest_of_line ();
180}
181
182void
5480ccf3 183v850_rozdata (int ignore ATTRIBUTE_UNUSED)
252b5132 184{
28e4f854
KH
185 obj_elf_section_change_hook ();
186
252b5132 187 subseg_set (rozdata_section, (subsegT) get_absolute_expression ());
28e4f854 188
252b5132
RH
189 demand_empty_rest_of_line ();
190}
191
192void
5480ccf3 193v850_call_table_data (int ignore ATTRIBUTE_UNUSED)
252b5132 194{
28e4f854
KH
195 obj_elf_section_change_hook ();
196
252b5132 197 subseg_set (call_table_data_section, (subsegT) get_absolute_expression ());
28e4f854 198
252b5132
RH
199 demand_empty_rest_of_line ();
200}
201
202void
5480ccf3 203v850_call_table_text (int ignore ATTRIBUTE_UNUSED)
252b5132 204{
28e4f854
KH
205 obj_elf_section_change_hook ();
206
252b5132 207 subseg_set (call_table_text_section, (subsegT) get_absolute_expression ());
28e4f854 208
252b5132
RH
209 demand_empty_rest_of_line ();
210}
211
212void
5480ccf3 213v850_bss (int ignore ATTRIBUTE_UNUSED)
252b5132
RH
214{
215 register int temp = get_absolute_expression ();
216
28e4f854
KH
217 obj_elf_section_change_hook ();
218
252b5132 219 subseg_set (bss_section, (subsegT) temp);
28e4f854 220
252b5132
RH
221 demand_empty_rest_of_line ();
222}
223
224void
5480ccf3 225v850_offset (int ignore ATTRIBUTE_UNUSED)
252b5132
RH
226{
227 int temp = get_absolute_expression ();
28e4f854
KH
228
229 temp -= frag_now_fix ();
230
252b5132
RH
231 if (temp > 0)
232 (void) frag_more (temp);
28e4f854 233
252b5132
RH
234 demand_empty_rest_of_line ();
235}
236
28e4f854
KH
237/* Copied from obj_elf_common() in gas/config/obj-elf.c. */
238
252b5132
RH
239static void
240v850_comm (area)
241 int area;
242{
28e4f854
KH
243 char *name;
244 char c;
245 char *p;
246 int temp;
247 unsigned int size;
248 symbolS *symbolP;
249 int have_align;
252b5132
RH
250
251 name = input_line_pointer;
252 c = get_symbol_end ();
28e4f854
KH
253
254 /* Just after name is now '\0'. */
252b5132
RH
255 p = input_line_pointer;
256 *p = c;
28e4f854 257
252b5132 258 SKIP_WHITESPACE ();
28e4f854 259
252b5132
RH
260 if (*input_line_pointer != ',')
261 {
262 as_bad (_("Expected comma after symbol-name"));
263 ignore_rest_of_line ();
264 return;
265 }
28e4f854
KH
266
267 /* Skip ','. */
268 input_line_pointer++;
269
252b5132
RH
270 if ((temp = get_absolute_expression ()) < 0)
271 {
28e4f854 272 /* xgettext:c-format */
252b5132
RH
273 as_bad (_(".COMMon length (%d.) < 0! Ignored."), temp);
274 ignore_rest_of_line ();
275 return;
276 }
28e4f854 277
252b5132
RH
278 size = temp;
279 *p = 0;
280 symbolP = symbol_find_or_make (name);
281 *p = c;
28e4f854 282
252b5132
RH
283 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
284 {
285 as_bad (_("Ignoring attempt to re-define symbol"));
286 ignore_rest_of_line ();
287 return;
288 }
28e4f854 289
252b5132
RH
290 if (S_GET_VALUE (symbolP) != 0)
291 {
292 if (S_GET_VALUE (symbolP) != size)
293 {
28e4f854 294 /* xgettext:c-format */
252b5132
RH
295 as_warn (_("Length of .comm \"%s\" is already %ld. Not changed to %d."),
296 S_GET_NAME (symbolP), (long) S_GET_VALUE (symbolP), size);
297 }
298 }
28e4f854
KH
299
300 know (symbol_get_frag (symbolP) == &zero_address_frag);
301
252b5132
RH
302 if (*input_line_pointer != ',')
303 have_align = 0;
304 else
305 {
306 have_align = 1;
307 input_line_pointer++;
308 SKIP_WHITESPACE ();
309 }
28e4f854 310
252b5132
RH
311 if (! have_align || *input_line_pointer != '"')
312 {
313 if (! have_align)
314 temp = 0;
315 else
316 {
317 temp = get_absolute_expression ();
28e4f854 318
252b5132
RH
319 if (temp < 0)
320 {
321 temp = 0;
322 as_warn (_("Common alignment negative; 0 assumed"));
323 }
324 }
28e4f854 325
cac58fa6 326 if (symbol_get_obj (symbolP)->local)
252b5132 327 {
28e4f854
KH
328 segT old_sec;
329 int old_subsec;
330 char *pfrag;
331 int align;
332 flagword applicable;
252b5132
RH
333
334 old_sec = now_seg;
335 old_subsec = now_subseg;
28e4f854 336
252b5132 337 applicable = bfd_applicable_section_flags (stdoutput);
28e4f854 338
252b5132 339 applicable &= SEC_ALLOC;
28e4f854 340
252b5132
RH
341 switch (area)
342 {
343 case AREA_SDA:
344 if (sbss_section == NULL)
345 {
346 sbss_section = subseg_new (".sbss", 0);
28e4f854 347
252b5132 348 bfd_set_section_flags (stdoutput, sbss_section, applicable);
28e4f854 349
252b5132
RH
350 seg_info (sbss_section)->bss = 1;
351 }
352 break;
28e4f854 353
252b5132
RH
354 case AREA_ZDA:
355 if (zbss_section == NULL)
356 {
357 zbss_section = subseg_new (".zbss", 0);
28e4f854 358
252b5132 359 bfd_set_section_flags (stdoutput, sbss_section, applicable);
28e4f854 360
252b5132
RH
361 seg_info (zbss_section)->bss = 1;
362 }
363 break;
28e4f854 364
252b5132
RH
365 case AREA_TDA:
366 if (tbss_section == NULL)
367 {
368 tbss_section = subseg_new (".tbss", 0);
28e4f854 369
252b5132 370 bfd_set_section_flags (stdoutput, tbss_section, applicable);
28e4f854 371
252b5132
RH
372 seg_info (tbss_section)->bss = 1;
373 }
374 break;
375 }
376
377 if (temp)
378 {
28e4f854 379 /* Convert to a power of 2 alignment. */
252b5132
RH
380 for (align = 0; (temp & 1) == 0; temp >>= 1, ++align)
381 ;
28e4f854 382
252b5132
RH
383 if (temp != 1)
384 {
385 as_bad (_("Common alignment not a power of 2"));
386 ignore_rest_of_line ();
387 return;
388 }
389 }
390 else
391 align = 0;
28e4f854 392
252b5132
RH
393 switch (area)
394 {
395 case AREA_SDA:
396 record_alignment (sbss_section, align);
28e4f854 397 obj_elf_section_change_hook ();
252b5132
RH
398 subseg_set (sbss_section, 0);
399 break;
400
401 case AREA_ZDA:
402 record_alignment (zbss_section, align);
28e4f854 403 obj_elf_section_change_hook ();
252b5132
RH
404 subseg_set (zbss_section, 0);
405 break;
406
407 case AREA_TDA:
408 record_alignment (tbss_section, align);
28e4f854 409 obj_elf_section_change_hook ();
252b5132
RH
410 subseg_set (tbss_section, 0);
411 break;
412
413 default:
28e4f854 414 abort ();
252b5132 415 }
28e4f854 416
252b5132
RH
417 if (align)
418 frag_align (align, 0, 0);
419
420 switch (area)
421 {
422 case AREA_SDA:
423 if (S_GET_SEGMENT (symbolP) == sbss_section)
7dcc9865 424 symbol_get_frag (symbolP)->fr_symbol = 0;
252b5132
RH
425 break;
426
427 case AREA_ZDA:
428 if (S_GET_SEGMENT (symbolP) == zbss_section)
7dcc9865 429 symbol_get_frag (symbolP)->fr_symbol = 0;
252b5132
RH
430 break;
431
432 case AREA_TDA:
433 if (S_GET_SEGMENT (symbolP) == tbss_section)
7dcc9865 434 symbol_get_frag (symbolP)->fr_symbol = 0;
252b5132
RH
435 break;
436
437 default:
cac58fa6 438 abort ();
252b5132 439 }
28e4f854 440
7dcc9865 441 symbol_set_frag (symbolP, frag_now);
252b5132
RH
442 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP,
443 (offsetT) size, (char *) 0);
444 *pfrag = 0;
445 S_SET_SIZE (symbolP, size);
28e4f854 446
252b5132
RH
447 switch (area)
448 {
449 case AREA_SDA:
450 S_SET_SEGMENT (symbolP, sbss_section);
451 break;
28e4f854 452
252b5132
RH
453 case AREA_ZDA:
454 S_SET_SEGMENT (symbolP, zbss_section);
455 break;
28e4f854 456
252b5132
RH
457 case AREA_TDA:
458 S_SET_SEGMENT (symbolP, tbss_section);
459 break;
28e4f854 460
252b5132 461 default:
28e4f854 462 abort ();
252b5132 463 }
28e4f854 464
252b5132 465 S_CLEAR_EXTERNAL (symbolP);
28e4f854 466 obj_elf_section_change_hook ();
252b5132
RH
467 subseg_set (old_sec, old_subsec);
468 }
469 else
470 {
471 allocate_common:
472 S_SET_VALUE (symbolP, (valueT) size);
473 S_SET_ALIGN (symbolP, temp);
474 S_SET_EXTERNAL (symbolP);
28e4f854 475
252b5132
RH
476 switch (area)
477 {
478 case AREA_SDA:
479 if (scommon_section == NULL)
480 {
28e4f854
KH
481 flagword applicable =
482 bfd_applicable_section_flags (stdoutput);
483
252b5132 484 scommon_section = subseg_new (".scommon", 0);
28e4f854 485
5480ccf3
NC
486 bfd_set_section_flags (stdoutput, scommon_section,
487 (applicable
252b5132 488 & (SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA
5480ccf3 489 | SEC_HAS_CONTENTS)) | SEC_IS_COMMON);
252b5132
RH
490 }
491 S_SET_SEGMENT (symbolP, scommon_section);
492 break;
28e4f854 493
252b5132
RH
494 case AREA_ZDA:
495 if (zcommon_section == NULL)
496 {
28e4f854
KH
497 flagword applicable =
498 bfd_applicable_section_flags (stdoutput);
499
252b5132 500 zcommon_section = subseg_new (".zcommon", 0);
28e4f854 501
5480ccf3
NC
502 bfd_set_section_flags (stdoutput, zcommon_section,
503 (applicable
252b5132 504 & (SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA
5480ccf3 505 | SEC_HAS_CONTENTS)) | SEC_IS_COMMON);
252b5132
RH
506 }
507 S_SET_SEGMENT (symbolP, zcommon_section);
508 break;
28e4f854 509
252b5132
RH
510 case AREA_TDA:
511 if (tcommon_section == NULL)
512 {
28e4f854
KH
513 flagword applicable =
514 bfd_applicable_section_flags (stdoutput);
515
252b5132 516 tcommon_section = subseg_new (".tcommon", 0);
28e4f854 517
5480ccf3 518 bfd_set_section_flags (stdoutput, tcommon_section,
28e4f854
KH
519 ((applicable
520 & (SEC_ALLOC | SEC_LOAD
521 | SEC_RELOC | SEC_DATA
522 | SEC_HAS_CONTENTS))
523 | SEC_IS_COMMON));
252b5132
RH
524 }
525 S_SET_SEGMENT (symbolP, tcommon_section);
526 break;
28e4f854 527
252b5132 528 default:
28e4f854 529 abort ();
252b5132
RH
530 }
531 }
532 }
533 else
534 {
535 input_line_pointer++;
28e4f854 536
252b5132
RH
537 /* @@ Some use the dot, some don't. Can we get some consistency?? */
538 if (*input_line_pointer == '.')
539 input_line_pointer++;
28e4f854 540
252b5132
RH
541 /* @@ Some say data, some say bss. */
542 if (strncmp (input_line_pointer, "bss\"", 4)
543 && strncmp (input_line_pointer, "data\"", 5))
544 {
545 while (*--input_line_pointer != '"')
546 ;
547 input_line_pointer--;
548 goto bad_common_segment;
549 }
550 while (*input_line_pointer++ != '"')
551 ;
552 goto allocate_common;
553 }
554
fed9b18a 555 symbol_get_bfdsym (symbolP)->flags |= BSF_OBJECT;
252b5132
RH
556
557 demand_empty_rest_of_line ();
558 return;
559
560 {
561 bad_common_segment:
562 p = input_line_pointer;
563 while (*p && *p != '\n')
564 p++;
565 c = *p;
566 *p = '\0';
567 as_bad (_("bad .common segment %s"), input_line_pointer + 1);
568 *p = c;
569 input_line_pointer = p;
570 ignore_rest_of_line ();
571 return;
572 }
573}
574
575void
576set_machine (int number)
577{
578 machine = number;
579 bfd_set_arch_mach (stdoutput, TARGET_ARCH, machine);
580
581 switch (machine)
582 {
28e4f854
KH
583 case 0: processor_mask = PROCESSOR_V850; break;
584 case bfd_mach_v850e: processor_mask = PROCESSOR_V850E; break;
252b5132
RH
585 case bfd_mach_v850ea: processor_mask = PROCESSOR_V850EA; break;
586 }
587}
588
589/* The target specific pseudo-ops which we support. */
590const pseudo_typeS md_pseudo_table[] =
591{
592 {"sdata", v850_sdata, 0},
593 {"tdata", v850_tdata, 0},
594 {"zdata", v850_zdata, 0},
595 {"sbss", v850_sbss, 0},
596 {"tbss", v850_tbss, 0},
597 {"zbss", v850_zbss, 0},
598 {"rosdata", v850_rosdata, 0},
599 {"rozdata", v850_rozdata, 0},
600 {"bss", v850_bss, 0},
601 {"offset", v850_offset, 0},
602 {"word", cons, 4},
603 {"zcomm", v850_comm, AREA_ZDA},
604 {"scomm", v850_comm, AREA_SDA},
605 {"tcomm", v850_comm, AREA_TDA},
606 {"v850", set_machine, 0},
607 {"call_table_data", v850_call_table_data, 0},
608 {"call_table_text", v850_call_table_text, 0},
609 {"v850e", set_machine, bfd_mach_v850e},
610 {"v850ea", set_machine, bfd_mach_v850ea},
a8761a19
DD
611 {"file", dwarf2_directive_file },
612 {"loc", dwarf2_directive_loc },
252b5132
RH
613 { NULL, NULL, 0}
614};
615
616/* Opcode hash table. */
617static struct hash_control *v850_hash;
618
28e4f854 619/* This table is sorted. Suitable for searching by a binary search. */
252b5132
RH
620static const struct reg_name pre_defined_registers[] =
621{
622 { "ep", 30 }, /* ep - element ptr */
28e4f854
KH
623 { "gp", 4 }, /* gp - global ptr */
624 { "hp", 2 }, /* hp - handler stack ptr */
625 { "lp", 31 }, /* lp - link ptr */
252b5132
RH
626 { "r0", 0 },
627 { "r1", 1 },
628 { "r10", 10 },
629 { "r11", 11 },
630 { "r12", 12 },
631 { "r13", 13 },
632 { "r14", 14 },
633 { "r15", 15 },
634 { "r16", 16 },
635 { "r17", 17 },
636 { "r18", 18 },
637 { "r19", 19 },
638 { "r2", 2 },
639 { "r20", 20 },
640 { "r21", 21 },
641 { "r22", 22 },
642 { "r23", 23 },
643 { "r24", 24 },
644 { "r25", 25 },
645 { "r26", 26 },
646 { "r27", 27 },
647 { "r28", 28 },
648 { "r29", 29 },
649 { "r3", 3 },
650 { "r30", 30 },
651 { "r31", 31 },
652 { "r4", 4 },
653 { "r5", 5 },
654 { "r6", 6 },
655 { "r7", 7 },
656 { "r8", 8 },
657 { "r9", 9 },
28e4f854
KH
658 { "sp", 3 }, /* sp - stack ptr */
659 { "tp", 5 }, /* tp - text ptr */
252b5132
RH
660 { "zero", 0 },
661};
252b5132 662
28e4f854
KH
663#define REG_NAME_CNT \
664 (sizeof (pre_defined_registers) / sizeof (struct reg_name))
252b5132 665
28e4f854 666static const struct reg_name system_registers[] =
252b5132
RH
667{
668 { "ctbp", 20 },
669 { "ctpc", 16 },
670 { "ctpsw", 17 },
671 { "dbpc", 18 },
672 { "dbpsw", 19 },
673 { "ecr", 4 },
674 { "eipc", 0 },
675 { "eipsw", 1 },
676 { "fepc", 2 },
677 { "fepsw", 3 },
678 { "psw", 5 },
679};
28e4f854
KH
680
681#define SYSREG_NAME_CNT \
682 (sizeof (system_registers) / sizeof (struct reg_name))
252b5132
RH
683
684static const struct reg_name system_list_registers[] =
685{
686 {"PS", 5 },
687 {"SR", 0 + 1}
688};
28e4f854
KH
689
690#define SYSREGLIST_NAME_CNT \
691 (sizeof (system_list_registers) / sizeof (struct reg_name))
252b5132
RH
692
693static const struct reg_name cc_names[] =
694{
695 { "c", 0x1 },
696 { "e", 0x2 },
697 { "ge", 0xe },
698 { "gt", 0xf },
699 { "h", 0xb },
700 { "l", 0x1 },
701 { "le", 0x7 },
702 { "lt", 0x6 },
703 { "n", 0x4 },
704 { "nc", 0x9 },
705 { "ne", 0xa },
706 { "nh", 0x3 },
707 { "nl", 0x9 },
708 { "ns", 0xc },
709 { "nv", 0x8 },
710 { "nz", 0xa },
711 { "p", 0xc },
712 { "s", 0x4 },
713 { "sa", 0xd },
714 { "t", 0x5 },
715 { "v", 0x0 },
716 { "z", 0x2 },
717};
252b5132 718
28e4f854
KH
719#define CC_NAME_CNT \
720 (sizeof (cc_names) / sizeof (struct reg_name))
721
722/* Do a binary search of the given register table to see if NAME is a
723 valid regiter name. Return the register number from the array on
724 success, or -1 on failure. */
252b5132
RH
725
726static int
727reg_name_search (regs, regcount, name, accept_numbers)
28e4f854
KH
728 const struct reg_name *regs;
729 int regcount;
730 const char *name;
731 boolean accept_numbers;
252b5132
RH
732{
733 int middle, low, high;
734 int cmp;
28e4f854 735 symbolS *symbolP;
252b5132
RH
736
737 /* If the register name is a symbol, then evaluate it. */
738 if ((symbolP = symbol_find (name)) != NULL)
739 {
740 /* If the symbol is an alias for another name then use that.
741 If the symbol is an alias for a number, then return the number. */
a77f5182 742 if (symbol_equated_p (symbolP))
252b5132 743 {
28e4f854
KH
744 name
745 = S_GET_NAME (symbol_get_value_expression (symbolP)->X_add_symbol);
252b5132
RH
746 }
747 else if (accept_numbers)
748 {
749 int reg = S_GET_VALUE (symbolP);
28e4f854 750
252b5132
RH
751 if (reg >= 0 && reg <= 31)
752 return reg;
753 }
754
755 /* Otherwise drop through and try parsing name normally. */
756 }
28e4f854 757
252b5132
RH
758 low = 0;
759 high = regcount - 1;
760
761 do
762 {
763 middle = (low + high) / 2;
764 cmp = strcasecmp (name, regs[middle].name);
765 if (cmp < 0)
766 high = middle - 1;
767 else if (cmp > 0)
768 low = middle + 1;
769 else
770 return regs[middle].value;
771 }
772 while (low <= high);
773 return -1;
774}
775
252b5132
RH
776/* Summary of register_name().
777 *
778 * in: Input_line_pointer points to 1st char of operand.
779 *
780 * out: A expressionS.
781 * The operand may have been a register: in this case, X_op == O_register,
782 * X_add_number is set to the register number, and truth is returned.
783 * Input_line_pointer->(next non-blank) char after operand, or is in
28e4f854
KH
784 * its original state. */
785
252b5132
RH
786static boolean
787register_name (expressionP)
28e4f854 788 expressionS *expressionP;
252b5132 789{
28e4f854
KH
790 int reg_number;
791 char *name;
792 char *start;
793 char c;
252b5132 794
28e4f854 795 /* Find the spelling of the operand. */
252b5132
RH
796 start = name = input_line_pointer;
797
798 c = get_symbol_end ();
799
800 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT,
801 name, FALSE);
802
28e4f854
KH
803 /* Put back the delimiting char. */
804 *input_line_pointer = c;
805
806 /* Look to see if it's in the register table. */
807 if (reg_number >= 0)
252b5132
RH
808 {
809 expressionP->X_op = O_register;
810 expressionP->X_add_number = reg_number;
811
28e4f854 812 /* Make the rest nice. */
252b5132
RH
813 expressionP->X_add_symbol = NULL;
814 expressionP->X_op_symbol = NULL;
28e4f854 815
252b5132
RH
816 return true;
817 }
818 else
819 {
28e4f854 820 /* Reset the line as if we had not done anything. */
252b5132 821 input_line_pointer = start;
28e4f854 822
252b5132
RH
823 return false;
824 }
825}
826
827/* Summary of system_register_name().
828 *
28e4f854
KH
829 * in: INPUT_LINE_POINTER points to 1st char of operand.
830 * EXPRESSIONP points to an expression structure to be filled in.
831 * ACCEPT_NUMBERS is true iff numerical register names may be used.
832 * ACCEPT_LIST_NAMES is true iff the special names PS and SR may be
252b5132
RH
833 * accepted.
834 *
835 * out: A expressionS structure in expressionP.
836 * The operand may have been a register: in this case, X_op == O_register,
837 * X_add_number is set to the register number, and truth is returned.
838 * Input_line_pointer->(next non-blank) char after operand, or is in
28e4f854
KH
839 * its original state. */
840
252b5132
RH
841static boolean
842system_register_name (expressionP, accept_numbers, accept_list_names)
28e4f854
KH
843 expressionS *expressionP;
844 boolean accept_numbers;
845 boolean accept_list_names;
252b5132 846{
28e4f854
KH
847 int reg_number;
848 char *name;
849 char *start;
850 char c;
252b5132 851
28e4f854 852 /* Find the spelling of the operand. */
252b5132
RH
853 start = name = input_line_pointer;
854
855 c = get_symbol_end ();
856 reg_number = reg_name_search (system_registers, SYSREG_NAME_CNT, name,
857 accept_numbers);
858
28e4f854
KH
859 /* Put back the delimiting char. */
860 *input_line_pointer = c;
861
252b5132
RH
862 if (reg_number < 0
863 && accept_numbers)
864 {
28e4f854
KH
865 /* Reset input_line pointer. */
866 input_line_pointer = start;
252b5132 867
28e4f854 868 if (isdigit (*input_line_pointer))
252b5132 869 {
28e4f854 870 reg_number = strtol (input_line_pointer, &input_line_pointer, 10);
252b5132 871
28e4f854
KH
872 /* Make sure that the register number is allowable. */
873 if (reg_number < 0
5480ccf3 874 || (reg_number > 5 && reg_number < 16)
28e4f854 875 || reg_number > 20)
252b5132
RH
876 {
877 reg_number = -1;
878 }
879 }
880 else if (accept_list_names)
881 {
882 c = get_symbol_end ();
883 reg_number = reg_name_search (system_list_registers,
884 SYSREGLIST_NAME_CNT, name, FALSE);
885
28e4f854
KH
886 /* Put back the delimiting char. */
887 *input_line_pointer = c;
252b5132
RH
888 }
889 }
28e4f854
KH
890
891 /* Look to see if it's in the register table. */
892 if (reg_number >= 0)
252b5132
RH
893 {
894 expressionP->X_op = O_register;
895 expressionP->X_add_number = reg_number;
896
28e4f854 897 /* Make the rest nice. */
252b5132
RH
898 expressionP->X_add_symbol = NULL;
899 expressionP->X_op_symbol = NULL;
900
901 return true;
902 }
903 else
904 {
28e4f854 905 /* Reset the line as if we had not done anything. */
252b5132 906 input_line_pointer = start;
28e4f854 907
252b5132
RH
908 return false;
909 }
910}
911
912/* Summary of cc_name().
913 *
28e4f854 914 * in: INPUT_LINE_POINTER points to 1st char of operand.
252b5132
RH
915 *
916 * out: A expressionS.
917 * The operand may have been a register: in this case, X_op == O_register,
918 * X_add_number is set to the register number, and truth is returned.
919 * Input_line_pointer->(next non-blank) char after operand, or is in
28e4f854
KH
920 * its original state. */
921
252b5132
RH
922static boolean
923cc_name (expressionP)
28e4f854 924 expressionS *expressionP;
252b5132 925{
28e4f854
KH
926 int reg_number;
927 char *name;
928 char *start;
929 char c;
252b5132 930
28e4f854 931 /* Find the spelling of the operand. */
252b5132
RH
932 start = name = input_line_pointer;
933
934 c = get_symbol_end ();
935 reg_number = reg_name_search (cc_names, CC_NAME_CNT, name, FALSE);
936
28e4f854
KH
937 /* Put back the delimiting char. */
938 *input_line_pointer = c;
939
940 /* Look to see if it's in the register table. */
941 if (reg_number >= 0)
252b5132
RH
942 {
943 expressionP->X_op = O_constant;
944 expressionP->X_add_number = reg_number;
945
28e4f854 946 /* Make the rest nice. */
252b5132
RH
947 expressionP->X_add_symbol = NULL;
948 expressionP->X_op_symbol = NULL;
949
950 return true;
951 }
952 else
953 {
28e4f854 954 /* Reset the line as if we had not done anything. */
252b5132 955 input_line_pointer = start;
28e4f854 956
252b5132
RH
957 return false;
958 }
959}
960
961static void
962skip_white_space (void)
963{
28e4f854
KH
964 while (*input_line_pointer == ' '
965 || *input_line_pointer == '\t')
966 ++input_line_pointer;
252b5132
RH
967}
968
969/* Summary of parse_register_list ().
970 *
28e4f854
KH
971 * in: INPUT_LINE_POINTER points to 1st char of a list of registers.
972 * INSN is the partially constructed instruction.
973 * OPERAND is the operand being inserted.
252b5132
RH
974 *
975 * out: NULL if the parse completed successfully, otherwise a
976 * pointer to an error message is returned. If the parse
977 * completes the correct bit fields in the instruction
978 * will be filled in.
979 *
980 * Parses register lists with the syntax:
981 *
982 * { rX }
983 * { rX, rY }
984 * { rX - rY }
985 * { rX - rY, rZ }
986 * etc
987 *
988 * and also parses constant epxressions whoes bits indicate the
989 * registers in the lists. The LSB in the expression refers to
990 * the lowest numbered permissable register in the register list,
991 * and so on upwards. System registers are considered to be very
28e4f854
KH
992 * high numbers. */
993
252b5132 994static char *
28e4f854
KH
995parse_register_list (insn, operand)
996 unsigned long *insn;
997 const struct v850_operand *operand;
252b5132 998{
28e4f854
KH
999 static int type1_regs[32] = {
1000 30, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1001 0, 0, 0, 0, 0, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24
1002 };
1003 static int type2_regs[32] = {
1004 19, 18, 17, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1005 0, 0, 0, 0, 30, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24
1006 };
1007 static int type3_regs[32] = {
1008 3, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1009 0, 0, 0, 0, 14, 15, 13, 12, 7, 6, 5, 4, 11, 10, 9, 8
1010 };
1011 int *regs;
252b5132
RH
1012 expressionS exp;
1013
28e4f854 1014 /* Select a register array to parse. */
252b5132
RH
1015 switch (operand->shift)
1016 {
1017 case 0xffe00001: regs = type1_regs; break;
1018 case 0xfff8000f: regs = type2_regs; break;
1019 case 0xfff8001f: regs = type3_regs; break;
1020 default:
1021 as_bad (_("unknown operand shift: %x\n"), operand->shift);
1022 return _("internal failure in parse_register_list");
1023 }
1024
1025 skip_white_space ();
1026
1027 /* If the expression starts with a curly brace it is a register list.
1028 Otherwise it is a constant expression, whoes bits indicate which
1029 registers are to be included in the list. */
28e4f854
KH
1030
1031 if (*input_line_pointer != '{')
252b5132 1032 {
252b5132
RH
1033 int reg;
1034 int i;
28e4f854
KH
1035
1036 expression (&exp);
1037
252b5132
RH
1038 if (exp.X_op != O_constant)
1039 return _("constant expression or register list expected");
1040
1041 if (regs == type1_regs)
1042 {
1043 if (exp.X_add_number & 0xFFFFF000)
1044 return _("high bits set in register list expression");
28e4f854
KH
1045
1046 for (reg = 20; reg < 32; reg++)
252b5132
RH
1047 if (exp.X_add_number & (1 << (reg - 20)))
1048 {
1049 for (i = 0; i < 32; i++)
1050 if (regs[i] == reg)
28e4f854 1051 *insn |= (1 << i);
252b5132
RH
1052 }
1053 }
1054 else if (regs == type2_regs)
1055 {
1056 if (exp.X_add_number & 0xFFFE0000)
1057 return _("high bits set in register list expression");
28e4f854
KH
1058
1059 for (reg = 1; reg < 16; reg++)
252b5132
RH
1060 if (exp.X_add_number & (1 << (reg - 1)))
1061 {
1062 for (i = 0; i < 32; i++)
1063 if (regs[i] == reg)
28e4f854 1064 *insn |= (1 << i);
252b5132
RH
1065 }
1066
1067 if (exp.X_add_number & (1 << 15))
28e4f854
KH
1068 *insn |= (1 << 3);
1069
252b5132 1070 if (exp.X_add_number & (1 << 16))
28e4f854 1071 *insn |= (1 << 19);
252b5132 1072 }
28e4f854 1073 else /* regs == type3_regs */
252b5132
RH
1074 {
1075 if (exp.X_add_number & 0xFFFE0000)
1076 return _("high bits set in register list expression");
28e4f854
KH
1077
1078 for (reg = 16; reg < 32; reg++)
252b5132
RH
1079 if (exp.X_add_number & (1 << (reg - 16)))
1080 {
1081 for (i = 0; i < 32; i++)
1082 if (regs[i] == reg)
28e4f854 1083 *insn |= (1 << i);
252b5132
RH
1084 }
1085
1086 if (exp.X_add_number & (1 << 16))
28e4f854 1087 *insn |= (1 << 19);
252b5132
RH
1088 }
1089
1090 return NULL;
1091 }
1092
28e4f854 1093 input_line_pointer++;
252b5132
RH
1094
1095 /* Parse the register list until a terminator (closing curly brace or
1096 new-line) is found. */
1097 for (;;)
1098 {
28e4f854 1099 if (register_name (&exp))
252b5132 1100 {
28e4f854
KH
1101 int i;
1102
252b5132
RH
1103 /* Locate the given register in the list, and if it is there,
1104 insert the corresponding bit into the instruction. */
1105 for (i = 0; i < 32; i++)
1106 {
28e4f854 1107 if (regs[i] == exp.X_add_number)
252b5132 1108 {
28e4f854 1109 *insn |= (1 << i);
252b5132
RH
1110 break;
1111 }
1112 }
1113
1114 if (i == 32)
1115 {
1116 return _("illegal register included in list");
1117 }
1118 }
28e4f854 1119 else if (system_register_name (&exp, true, true))
252b5132
RH
1120 {
1121 if (regs == type1_regs)
1122 {
1123 return _("system registers cannot be included in list");
1124 }
1125 else if (exp.X_add_number == 5)
1126 {
1127 if (regs == type2_regs)
1128 return _("PSW cannot be included in list");
1129 else
28e4f854 1130 *insn |= 0x8;
252b5132
RH
1131 }
1132 else if (exp.X_add_number < 4)
28e4f854 1133 *insn |= 0x80000;
252b5132
RH
1134 else
1135 return _("High value system registers cannot be included in list");
1136 }
28e4f854 1137 else if (*input_line_pointer == '}')
252b5132 1138 {
28e4f854 1139 input_line_pointer++;
252b5132
RH
1140 break;
1141 }
28e4f854 1142 else if (*input_line_pointer == ',')
252b5132 1143 {
28e4f854 1144 input_line_pointer++;
252b5132
RH
1145 continue;
1146 }
28e4f854 1147 else if (*input_line_pointer == '-')
252b5132 1148 {
28e4f854
KH
1149 /* We have encountered a range of registers: rX - rY. */
1150 int j;
252b5132
RH
1151 expressionS exp2;
1152
1153 /* Skip the dash. */
28e4f854 1154 ++input_line_pointer;
252b5132
RH
1155
1156 /* Get the second register in the range. */
28e4f854 1157 if (! register_name (&exp2))
252b5132
RH
1158 {
1159 return _("second register should follow dash in register list");
1160 exp2.X_add_number = exp.X_add_number;
1161 }
1162
1163 /* Add the rest of the registers in the range. */
1164 for (j = exp.X_add_number + 1; j <= exp2.X_add_number; j++)
1165 {
28e4f854
KH
1166 int i;
1167
252b5132
RH
1168 /* Locate the given register in the list, and if it is there,
1169 insert the corresponding bit into the instruction. */
1170 for (i = 0; i < 32; i++)
1171 {
28e4f854 1172 if (regs[i] == j)
252b5132 1173 {
28e4f854 1174 *insn |= (1 << i);
252b5132
RH
1175 break;
1176 }
1177 }
1178
1179 if (i == 32)
1180 return _("illegal register included in list");
1181 }
1182 }
1183 else
1184 {
1185 break;
1186 }
1187
1188 skip_white_space ();
1189 }
1190
1191 return NULL;
1192}
1193
28e4f854 1194CONST char *md_shortopts = "m:";
252b5132
RH
1195
1196struct option md_longopts[] =
1197{
1198 {NULL, no_argument, NULL, 0}
1199};
252b5132 1200
28e4f854 1201size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH
1202
1203void
1204md_show_usage (stream)
28e4f854 1205 FILE *stream;
252b5132
RH
1206{
1207 fprintf (stream, _(" V850 options:\n"));
1208 fprintf (stream, _(" -mwarn-signed-overflow Warn if signed immediate values overflow\n"));
1209 fprintf (stream, _(" -mwarn-unsigned-overflow Warn if unsigned immediate values overflow\n"));
1210 fprintf (stream, _(" -mv850 The code is targeted at the v850\n"));
1211 fprintf (stream, _(" -mv850e The code is targeted at the v850e\n"));
1212 fprintf (stream, _(" -mv850ea The code is targeted at the v850ea\n"));
1213 fprintf (stream, _(" -mv850any The code is generic, despite any processor specific instructions\n"));
1214}
1215
1216int
1217md_parse_option (c, arg)
28e4f854
KH
1218 int c;
1219 char *arg;
252b5132
RH
1220{
1221 if (c != 'm')
1222 {
5480ccf3 1223 if (c != 'a')
28e4f854 1224 /* xgettext:c-format */
5480ccf3 1225 fprintf (stderr, _("unknown command line option: -%c%s\n"), c, arg);
252b5132
RH
1226 return 0;
1227 }
1228
1229 if (strcmp (arg, "warn-signed-overflow") == 0)
1230 {
1231 warn_signed_overflows = TRUE;
1232 }
1233 else if (strcmp (arg, "warn-unsigned-overflow") == 0)
1234 {
1235 warn_unsigned_overflows = TRUE;
1236 }
1237 else if (strcmp (arg, "v850") == 0)
1238 {
1239 machine = 0;
1240 processor_mask = PROCESSOR_V850;
1241 }
1242 else if (strcmp (arg, "v850e") == 0)
1243 {
1244 machine = bfd_mach_v850e;
1245 processor_mask = PROCESSOR_V850E;
1246 }
1247 else if (strcmp (arg, "v850ea") == 0)
1248 {
1249 machine = bfd_mach_v850ea;
1250 processor_mask = PROCESSOR_V850EA;
1251 }
1252 else if (strcmp (arg, "v850any") == 0)
1253 {
28e4f854
KH
1254 /* Tell the world that this is for any v850 chip. */
1255 machine = 0;
1256
1257 /* But support instructions for the extended versions. */
1258 processor_mask = PROCESSOR_V850EA;
252b5132
RH
1259 }
1260 else
1261 {
28e4f854 1262 /* xgettext:c-format */
252b5132
RH
1263 fprintf (stderr, _("unknown command line option: -%c%s\n"), c, arg);
1264 return 0;
1265 }
28e4f854 1266
252b5132
RH
1267 return 1;
1268}
1269
1270symbolS *
1271md_undefined_symbol (name)
28e4f854 1272 char *name ATTRIBUTE_UNUSED;
252b5132
RH
1273{
1274 return 0;
1275}
1276
1277char *
1278md_atof (type, litp, sizep)
28e4f854
KH
1279 int type;
1280 char *litp;
1281 int *sizep;
252b5132 1282{
28e4f854 1283 int prec;
252b5132 1284 LITTLENUM_TYPE words[4];
28e4f854
KH
1285 char *t;
1286 int i;
252b5132
RH
1287
1288 switch (type)
1289 {
1290 case 'f':
1291 prec = 2;
1292 break;
1293
1294 case 'd':
1295 prec = 4;
1296 break;
1297
1298 default:
1299 *sizep = 0;
1300 return _("bad call to md_atof");
1301 }
28e4f854 1302
252b5132
RH
1303 t = atof_ieee (input_line_pointer, type, words);
1304 if (t)
1305 input_line_pointer = t;
1306
1307 *sizep = prec * 2;
1308
1309 for (i = prec - 1; i >= 0; i--)
1310 {
1311 md_number_to_chars (litp, (valueT) words[i], 2);
1312 litp += 2;
1313 }
1314
1315 return NULL;
1316}
1317
252b5132 1318/* Very gross. */
28e4f854 1319
252b5132
RH
1320void
1321md_convert_frag (abfd, sec, fragP)
28e4f854
KH
1322 bfd *abfd ATTRIBUTE_UNUSED;
1323 asection *sec;
1324 fragS *fragP;
252b5132
RH
1325{
1326 subseg_change (sec, 0);
28e4f854 1327
252b5132
RH
1328 /* In range conditional or unconditional branch. */
1329 if (fragP->fr_subtype == 0 || fragP->fr_subtype == 2)
1330 {
1331 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol,
1332 fragP->fr_offset, 1, BFD_RELOC_UNUSED + (int)fragP->fr_opcode);
1333 fragP->fr_var = 0;
1334 fragP->fr_fix += 2;
1335 }
1336 /* Out of range conditional branch. Emit a branch around a jump. */
1337 else if (fragP->fr_subtype == 1)
1338 {
28e4f854 1339 unsigned char *buffer =
252b5132
RH
1340 (unsigned char *) (fragP->fr_fix + fragP->fr_literal);
1341
1342 /* Reverse the condition of the first branch. */
1343 buffer[0] ^= 0x08;
1344 /* Mask off all the displacement bits. */
1345 buffer[0] &= 0x8f;
1346 buffer[1] &= 0x07;
1347 /* Now set the displacement bits so that we branch
1348 around the unconditional branch. */
1349 buffer[0] |= 0x30;
1350
1351 /* Now create the unconditional branch + fixup to the final
1352 target. */
1353 md_number_to_chars (buffer + 2, 0x00000780, 4);
1354 fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol,
1355 fragP->fr_offset, 1, BFD_RELOC_UNUSED +
1356 (int) fragP->fr_opcode + 1);
1357 fragP->fr_var = 0;
1358 fragP->fr_fix += 6;
1359 }
1360 /* Out of range unconditional branch. Emit a jump. */
1361 else if (fragP->fr_subtype == 3)
1362 {
1363 md_number_to_chars (fragP->fr_fix + fragP->fr_literal, 0x00000780, 4);
1364 fix_new (fragP, fragP->fr_fix, 4, fragP->fr_symbol,
1365 fragP->fr_offset, 1, BFD_RELOC_UNUSED +
1366 (int) fragP->fr_opcode + 1);
1367 fragP->fr_var = 0;
1368 fragP->fr_fix += 4;
1369 }
1370 else
1371 abort ();
1372}
1373
1374valueT
1375md_section_align (seg, addr)
28e4f854
KH
1376 asection *seg;
1377 valueT addr;
252b5132
RH
1378{
1379 int align = bfd_get_section_alignment (stdoutput, seg);
1380 return ((addr + (1 << align) - 1) & (-1 << align));
1381}
1382
1383void
1384md_begin ()
1385{
28e4f854
KH
1386 char *prev_name = "";
1387 register const struct v850_opcode *op;
1388 flagword applicable;
252b5132
RH
1389
1390 if (strncmp (TARGET_CPU, "v850ea", 6) == 0)
1391 {
1392 if (machine == -1)
1393 machine = bfd_mach_v850ea;
28e4f854 1394
252b5132
RH
1395 if (processor_mask == -1)
1396 processor_mask = PROCESSOR_V850EA;
1397 }
1398 else if (strncmp (TARGET_CPU, "v850e", 5) == 0)
1399 {
1400 if (machine == -1)
28e4f854
KH
1401 machine = bfd_mach_v850e;
1402
252b5132
RH
1403 if (processor_mask == -1)
1404 processor_mask = PROCESSOR_V850E;
1405 }
28e4f854 1406 else if (strncmp (TARGET_CPU, "v850", 4) == 0)
252b5132
RH
1407 {
1408 if (machine == -1)
28e4f854
KH
1409 machine = 0;
1410
252b5132
RH
1411 if (processor_mask == -1)
1412 processor_mask = PROCESSOR_V850;
1413 }
1414 else
28e4f854
KH
1415 /* xgettext:c-format */
1416 as_bad (_("Unable to determine default target processor from string: %s"),
252b5132
RH
1417 TARGET_CPU);
1418
1419 v850_hash = hash_new();
1420
1421 /* Insert unique names into hash table. The V850 instruction set
1422 has many identical opcode names that have different opcodes based
1423 on the operands. This hash table then provides a quick index to
1424 the first opcode with a particular name in the opcode table. */
1425
1426 op = v850_opcodes;
1427 while (op->name)
1428 {
28e4f854 1429 if (strcmp (prev_name, op->name))
252b5132
RH
1430 {
1431 prev_name = (char *) op->name;
1432 hash_insert (v850_hash, op->name, (char *) op);
1433 }
1434 op++;
1435 }
1436
1437 bfd_set_arch_mach (stdoutput, TARGET_ARCH, machine);
1438
1439 applicable = bfd_applicable_section_flags (stdoutput);
28e4f854 1440
252b5132
RH
1441 call_table_data_section = subseg_new (".call_table_data", 0);
1442 bfd_set_section_flags (stdoutput, call_table_data_section,
1443 applicable & (SEC_ALLOC | SEC_LOAD | SEC_RELOC
1444 | SEC_DATA | SEC_HAS_CONTENTS));
28e4f854 1445
252b5132
RH
1446 call_table_text_section = subseg_new (".call_table_text", 0);
1447 bfd_set_section_flags (stdoutput, call_table_text_section,
1448 applicable & (SEC_ALLOC | SEC_LOAD | SEC_READONLY
1449 | SEC_CODE));
28e4f854 1450
252b5132
RH
1451 /* Restore text section as the current default. */
1452 subseg_set (text_section, 0);
1453}
1454
252b5132 1455static bfd_reloc_code_real_type
28e4f854 1456handle_ctoff (const struct v850_operand *operand)
252b5132
RH
1457{
1458 if (operand == NULL)
1459 return BFD_RELOC_V850_CALLT_16_16_OFFSET;
1460
28e4f854 1461 if (operand->bits != 6
252b5132
RH
1462 || operand->shift != 0)
1463 {
1464 as_bad (_("ctoff() relocation used on an instruction which does not support it"));
1465 return BFD_RELOC_64; /* Used to indicate an error condition. */
1466 }
28e4f854 1467
252b5132
RH
1468 return BFD_RELOC_V850_CALLT_6_7_OFFSET;
1469}
1470
1471static bfd_reloc_code_real_type
28e4f854 1472handle_sdaoff (const struct v850_operand *operand)
252b5132 1473{
28e4f854
KH
1474 if (operand == NULL)
1475 return BFD_RELOC_V850_SDA_16_16_OFFSET;
1476
1477 if (operand->bits == 15 && operand->shift == 17)
1478 return BFD_RELOC_V850_SDA_15_16_OFFSET;
1479
1480 if (operand->bits == -1)
1481 return BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET;
1482
1483 if (operand->bits != 16
252b5132
RH
1484 || operand->shift != 16)
1485 {
1486 as_bad (_("sdaoff() relocation used on an instruction which does not support it"));
1487 return BFD_RELOC_64; /* Used to indicate an error condition. */
1488 }
28e4f854 1489
252b5132
RH
1490 return BFD_RELOC_V850_SDA_16_16_OFFSET;
1491}
1492
1493static bfd_reloc_code_real_type
28e4f854 1494handle_zdaoff (const struct v850_operand *operand)
252b5132 1495{
28e4f854
KH
1496 if (operand == NULL)
1497 return BFD_RELOC_V850_ZDA_16_16_OFFSET;
1498
1499 if (operand->bits == 15 && operand->shift == 17)
1500 return BFD_RELOC_V850_ZDA_15_16_OFFSET;
252b5132 1501
28e4f854
KH
1502 if (operand->bits == -1)
1503 return BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET;
1504
1505 if (operand->bits != 16
252b5132
RH
1506 || operand->shift != 16)
1507 {
1508 as_bad (_("zdaoff() relocation used on an instruction which does not support it"));
28e4f854
KH
1509 /* Used to indicate an error condition. */
1510 return BFD_RELOC_64;
252b5132 1511 }
28e4f854 1512
252b5132
RH
1513 return BFD_RELOC_V850_ZDA_16_16_OFFSET;
1514}
1515
1516static bfd_reloc_code_real_type
28e4f854 1517handle_tdaoff (const struct v850_operand *operand)
252b5132 1518{
28e4f854
KH
1519 if (operand == NULL)
1520 /* Data item, not an instruction. */
1521 return BFD_RELOC_V850_TDA_7_7_OFFSET;
1522
1523 if (operand->bits == 6 && operand->shift == 1)
1524 /* sld.w/sst.w, operand: D8_6 */
1525 return BFD_RELOC_V850_TDA_6_8_OFFSET;
1526
1527 if (operand->bits == 4 && operand->insert != NULL)
1528 /* sld.hu, operand: D5-4 */
1529 return BFD_RELOC_V850_TDA_4_5_OFFSET;
1530
1531 if (operand->bits == 4 && operand->insert == NULL)
1532 /* sld.bu, operand: D4 */
1533 return BFD_RELOC_V850_TDA_4_4_OFFSET;
1534
1535 if (operand->bits == 16 && operand->shift == 16)
1536 /* set1 & chums, operands: D16 */
1537 return BFD_RELOC_V850_TDA_16_16_OFFSET;
1538
252b5132
RH
1539 if (operand->bits != 7)
1540 {
1541 as_bad (_("tdaoff() relocation used on an instruction which does not support it"));
28e4f854
KH
1542 /* Used to indicate an error condition. */
1543 return BFD_RELOC_64;
252b5132 1544 }
28e4f854 1545
252b5132 1546 return operand->insert != NULL
28e4f854
KH
1547 ? BFD_RELOC_V850_TDA_7_8_OFFSET /* sld.h/sst.h, operand: D8_7 */
1548 : BFD_RELOC_V850_TDA_7_7_OFFSET; /* sld.b/sst.b, opreand: D7 */
252b5132
RH
1549}
1550
1551/* Warning: The code in this function relies upon the definitions
1552 in the v850_operands[] array (defined in opcodes/v850-opc.c)
1553 matching the hard coded values contained herein. */
1554
1555static bfd_reloc_code_real_type
28e4f854 1556v850_reloc_prefix (const struct v850_operand *operand)
252b5132
RH
1557{
1558 boolean paren_skipped = false;
1559
252b5132 1560 /* Skip leading opening parenthesis. */
28e4f854 1561 if (*input_line_pointer == '(')
252b5132 1562 {
28e4f854 1563 ++input_line_pointer;
252b5132
RH
1564 paren_skipped = true;
1565 }
1566
1567#define CHECK_(name, reloc) \
1568 if (strncmp (input_line_pointer, name##"(", strlen (name) + 1) == 0) \
1569 { \
1570 input_line_pointer += strlen (name); \
1571 return reloc; \
1572 }
28e4f854
KH
1573
1574 CHECK_ ("hi0", BFD_RELOC_HI16 );
1575 CHECK_ ("hi", BFD_RELOC_HI16_S );
1576 CHECK_ ("lo", BFD_RELOC_LO16 );
252b5132
RH
1577 CHECK_ ("sdaoff", handle_sdaoff (operand));
1578 CHECK_ ("zdaoff", handle_zdaoff (operand));
1579 CHECK_ ("tdaoff", handle_tdaoff (operand));
28e4f854
KH
1580 CHECK_ ("hilo", BFD_RELOC_32 );
1581 CHECK_ ("ctoff", handle_ctoff (operand) );
1582
252b5132
RH
1583 /* Restore skipped parenthesis. */
1584 if (paren_skipped)
28e4f854
KH
1585 --input_line_pointer;
1586
252b5132
RH
1587 return BFD_RELOC_UNUSED;
1588}
1589
1590/* Insert an operand value into an instruction. */
1591
1592static unsigned long
1593v850_insert_operand (insn, operand, val, file, line, str)
28e4f854
KH
1594 unsigned long insn;
1595 const struct v850_operand *operand;
1596 offsetT val;
1597 char *file;
1598 unsigned int line;
1599 char *str;
252b5132
RH
1600{
1601 if (operand->insert)
1602 {
28e4f854
KH
1603 const char *message = NULL;
1604
1605 insn = operand->insert (insn, val, &message);
252b5132
RH
1606 if (message != NULL)
1607 {
1608 if ((operand->flags & V850_OPERAND_SIGNED)
1609 && ! warn_signed_overflows
1610 && strstr (message, "out of range") != NULL)
1611 {
28e4f854 1612 /* Skip warning... */
252b5132
RH
1613 }
1614 else if ((operand->flags & V850_OPERAND_SIGNED) == 0
1615 && ! warn_unsigned_overflows
1616 && strstr (message, "out of range") != NULL)
1617 {
28e4f854 1618 /* Skip warning... */
252b5132
RH
1619 }
1620 else if (str)
1621 {
1622 if (file == (char *) NULL)
1623 as_warn ("%s: %s", str, message);
1624 else
1625 as_warn_where (file, line, "%s: %s", str, message);
1626 }
1627 else
1628 {
1629 if (file == (char *) NULL)
1630 as_warn (message);
1631 else
1632 as_warn_where (file, line, message);
1633 }
1634 }
1635 }
1636 else
1637 {
1638 if (operand->bits != 32)
1639 {
28e4f854 1640 long min, max;
252b5132
RH
1641
1642 if ((operand->flags & V850_OPERAND_SIGNED) != 0)
1643 {
1644 if (! warn_signed_overflows)
1645 max = (1 << operand->bits) - 1;
1646 else
1647 max = (1 << (operand->bits - 1)) - 1;
28e4f854
KH
1648
1649 min = -(1 << (operand->bits - 1));
252b5132
RH
1650 }
1651 else
1652 {
1653 max = (1 << operand->bits) - 1;
28e4f854 1654
252b5132 1655 if (! warn_unsigned_overflows)
28e4f854 1656 min = -(1 << (operand->bits - 1));
252b5132
RH
1657 else
1658 min = 0;
1659 }
28e4f854 1660
252b5132
RH
1661 if (val < (offsetT) min || val > (offsetT) max)
1662 {
28e4f854
KH
1663 /* xgettext:c-format */
1664 const char *err =
1665 _("operand out of range (%s not between %ld and %ld)");
1666 char buf[100];
1667
252b5132
RH
1668 /* Restore min and mix to expected values for decimal ranges. */
1669 if ((operand->flags & V850_OPERAND_SIGNED)
1670 && ! warn_signed_overflows)
1671 max = (1 << (operand->bits - 1)) - 1;
1672
1673 if (! (operand->flags & V850_OPERAND_SIGNED)
1674 && ! warn_unsigned_overflows)
1675 min = 0;
1676
1677 if (str)
1678 {
1679 sprintf (buf, "%s: ", str);
28e4f854 1680
252b5132
RH
1681 sprint_value (buf + strlen (buf), val);
1682 }
1683 else
1684 sprint_value (buf, val);
28e4f854 1685
252b5132
RH
1686 if (file == (char *) NULL)
1687 as_warn (err, buf, min, max);
1688 else
1689 as_warn_where (file, line, err, buf, min, max);
1690 }
1691 }
1692
1693 insn |= (((long) val & ((1 << operand->bits) - 1)) << operand->shift);
1694 }
28e4f854 1695
252b5132
RH
1696 return insn;
1697}
252b5132 1698\f
28e4f854 1699static char copy_of_instruction[128];
252b5132
RH
1700
1701void
28e4f854
KH
1702md_assemble (str)
1703 char *str;
252b5132 1704{
28e4f854
KH
1705 char *s;
1706 char *start_of_operands;
1707 struct v850_opcode *opcode;
1708 struct v850_opcode *next_opcode;
1709 const unsigned char *opindex_ptr;
1710 int next_opindex;
1711 int relaxable = 0;
1712 unsigned long insn;
1713 unsigned long insn_size;
a8761a19 1714 unsigned long total_insn_size = 0;
28e4f854
KH
1715 char *f;
1716 int i;
1717 int match;
1718 boolean extra_data_after_insn = false;
1719 unsigned extra_data_len = 0;
1720 unsigned long extra_data = 0;
1721 char *saved_input_line_pointer;
1722
252b5132 1723 strncpy (copy_of_instruction, str, sizeof (copy_of_instruction) - 1);
28e4f854 1724
252b5132
RH
1725 /* Get the opcode. */
1726 for (s = str; *s != '\0' && ! isspace (*s); s++)
1727 continue;
28e4f854 1728
252b5132
RH
1729 if (*s != '\0')
1730 *s++ = '\0';
1731
28e4f854 1732 /* Find the first opcode with the proper name. */
252b5132
RH
1733 opcode = (struct v850_opcode *) hash_find (v850_hash, str);
1734 if (opcode == NULL)
1735 {
28e4f854 1736 /* xgettext:c-format */
252b5132
RH
1737 as_bad (_("Unrecognized opcode: `%s'"), str);
1738 ignore_rest_of_line ();
1739 return;
1740 }
1741
1742 str = s;
28e4f854
KH
1743 while (isspace (*str))
1744 ++str;
252b5132
RH
1745
1746 start_of_operands = str;
1747
1748 saved_input_line_pointer = input_line_pointer;
28e4f854 1749
252b5132
RH
1750 for (;;)
1751 {
28e4f854 1752 const char *errmsg = NULL;
252b5132
RH
1753
1754 match = 0;
28e4f854 1755
252b5132
RH
1756 if ((opcode->processors & processor_mask) == 0)
1757 {
1758 errmsg = _("Target processor does not support this instruction.");
1759 goto error;
1760 }
28e4f854 1761
252b5132
RH
1762 relaxable = 0;
1763 fc = 0;
1764 next_opindex = 0;
1765 insn = opcode->opcode;
1766 extra_data_after_insn = false;
1767
1768 input_line_pointer = str = start_of_operands;
1769
28e4f854 1770 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
252b5132 1771 {
28e4f854
KH
1772 const struct v850_operand *operand;
1773 char *hold;
1774 expressionS ex;
1775 bfd_reloc_code_real_type reloc;
252b5132
RH
1776
1777 if (next_opindex == 0)
1778 {
28e4f854 1779 operand = &v850_operands[*opindex_ptr];
252b5132
RH
1780 }
1781 else
1782 {
28e4f854 1783 operand = &v850_operands[next_opindex];
252b5132
RH
1784 next_opindex = 0;
1785 }
1786
1787 errmsg = NULL;
1788
1789 while (*str == ' ' || *str == ',' || *str == '[' || *str == ']')
28e4f854 1790 ++str;
252b5132
RH
1791
1792 if (operand->flags & V850_OPERAND_RELAX)
1793 relaxable = 1;
1794
28e4f854 1795 /* Gather the operand. */
252b5132
RH
1796 hold = input_line_pointer;
1797 input_line_pointer = str;
28e4f854
KH
1798
1799 /* lo(), hi(), hi0(), etc... */
252b5132
RH
1800 if ((reloc = v850_reloc_prefix (operand)) != BFD_RELOC_UNUSED)
1801 {
1802 /* This is a fake reloc, used to indicate an error condition. */
1803 if (reloc == BFD_RELOC_64)
1804 {
1805 match = 1;
1806 goto error;
1807 }
28e4f854
KH
1808
1809 expression (&ex);
252b5132
RH
1810
1811 if (ex.X_op == O_constant)
1812 {
1813 switch (reloc)
1814 {
1815 case BFD_RELOC_V850_ZDA_16_16_OFFSET:
1816 /* To cope with "not1 7, zdaoff(0xfffff006)[r0]"
1817 and the like. */
1818 /* Fall through. */
28e4f854 1819
252b5132
RH
1820 case BFD_RELOC_LO16:
1821 {
1822 /* Truncate, then sign extend the value. */
1823 ex.X_add_number = SEXT16 (ex.X_add_number);
1824 break;
1825 }
1826
1827 case BFD_RELOC_HI16:
1828 {
1829 /* Truncate, then sign extend the value. */
1830 ex.X_add_number = SEXT16 (ex.X_add_number >> 16);
1831 break;
1832 }
1833
1834 case BFD_RELOC_HI16_S:
1835 {
1836 /* Truncate, then sign extend the value. */
28e4f854 1837 int temp = (ex.X_add_number >> 16) & 0xffff;
252b5132
RH
1838
1839 temp += (ex.X_add_number >> 15) & 1;
1840
1841 ex.X_add_number = SEXT16 (temp);
1842 break;
1843 }
28e4f854 1844
252b5132
RH
1845 case BFD_RELOC_32:
1846 if ((operand->flags & V850E_IMMEDIATE32) == 0)
1847 {
1848 errmsg = _("immediate operand is too large");
1849 goto error;
1850 }
28e4f854 1851
252b5132
RH
1852 extra_data_after_insn = true;
1853 extra_data_len = 4;
1854 extra_data = ex.X_add_number;
1855 ex.X_add_number = 0;
1856 break;
28e4f854 1857
252b5132
RH
1858 default:
1859 fprintf (stderr, "reloc: %d\n", reloc);
1860 as_bad (_("AAARG -> unhandled constant reloc"));
1861 break;
1862 }
1863
1864 if (fc > MAX_INSN_FIXUPS)
1865 as_fatal (_("too many fixups"));
28e4f854
KH
1866
1867 fixups[fc].exp = ex;
1868 fixups[fc].opindex = *opindex_ptr;
1869 fixups[fc].reloc = reloc;
252b5132
RH
1870 fc++;
1871 }
1872 else
1873 {
1874 if (reloc == BFD_RELOC_32)
1875 {
1876 if ((operand->flags & V850E_IMMEDIATE32) == 0)
1877 {
1878 errmsg = _("immediate operand is too large");
1879 goto error;
1880 }
28e4f854 1881
252b5132
RH
1882 extra_data_after_insn = true;
1883 extra_data_len = 4;
1884 extra_data = ex.X_add_number;
1885 }
28e4f854 1886
252b5132
RH
1887 if (fc > MAX_INSN_FIXUPS)
1888 as_fatal (_("too many fixups"));
1889
28e4f854
KH
1890 fixups[fc].exp = ex;
1891 fixups[fc].opindex = *opindex_ptr;
1892 fixups[fc].reloc = reloc;
252b5132
RH
1893 fc++;
1894 }
1895 }
1896 else
1897 {
1898 errmsg = NULL;
28e4f854
KH
1899
1900 if ((operand->flags & V850_OPERAND_REG) != 0)
252b5132 1901 {
28e4f854 1902 if (!register_name (&ex))
252b5132
RH
1903 {
1904 errmsg = _("invalid register name");
1905 }
1906 else if ((operand->flags & V850_NOT_R0)
28e4f854 1907 && ex.X_add_number == 0)
252b5132
RH
1908 {
1909 errmsg = _("register r0 cannot be used here");
28e4f854 1910
252b5132
RH
1911 /* Force an error message to be generated by
1912 skipping over any following potential matches
1913 for this opcode. */
1914 opcode += 3;
1915 }
1916 }
28e4f854 1917 else if ((operand->flags & V850_OPERAND_SRG) != 0)
252b5132 1918 {
28e4f854 1919 if (!system_register_name (&ex, true, false))
252b5132
RH
1920 {
1921 errmsg = _("invalid system register name");
1922 }
1923 }
1924 else if ((operand->flags & V850_OPERAND_EP) != 0)
1925 {
28e4f854
KH
1926 char *start = input_line_pointer;
1927 char c = get_symbol_end ();
1928
252b5132
RH
1929 if (strcmp (start, "ep") != 0 && strcmp (start, "r30") != 0)
1930 {
1931 /* Put things back the way we found them. */
1932 *input_line_pointer = c;
1933 input_line_pointer = start;
1934 errmsg = _("expected EP register");
1935 goto error;
1936 }
28e4f854 1937
252b5132
RH
1938 *input_line_pointer = c;
1939 str = input_line_pointer;
1940 input_line_pointer = hold;
28e4f854
KH
1941
1942 while (*str == ' ' || *str == ','
1943 || *str == '[' || *str == ']')
1944 ++str;
252b5132
RH
1945 continue;
1946 }
28e4f854 1947 else if ((operand->flags & V850_OPERAND_CC) != 0)
252b5132 1948 {
28e4f854 1949 if (!cc_name (&ex))
252b5132
RH
1950 {
1951 errmsg = _("invalid condition code name");
1952 }
1953 }
28e4f854 1954 else if (operand->flags & V850E_PUSH_POP)
252b5132 1955 {
28e4f854
KH
1956 errmsg = parse_register_list (&insn, operand);
1957
252b5132
RH
1958 /* The parse_register_list() function has already done
1959 everything, so fake a dummy expression. */
1960 ex.X_op = O_constant;
1961 ex.X_add_number = 0;
1962 }
28e4f854 1963 else if (operand->flags & V850E_IMMEDIATE16)
252b5132 1964 {
28e4f854 1965 expression (&ex);
252b5132
RH
1966
1967 if (ex.X_op != O_constant)
1968 errmsg = _("constant expression expected");
1969 else if (ex.X_add_number & 0xffff0000)
1970 {
1971 if (ex.X_add_number & 0xffff)
1972 errmsg = _("constant too big to fit into instruction");
1973 else if ((insn & 0x001fffc0) == 0x00130780)
1974 ex.X_add_number >>= 16;
1975 else
1976 errmsg = _("constant too big to fit into instruction");
1977 }
28e4f854 1978
252b5132
RH
1979 extra_data_after_insn = true;
1980 extra_data_len = 2;
1981 extra_data = ex.X_add_number;
1982 ex.X_add_number = 0;
1983 }
28e4f854 1984 else if (operand->flags & V850E_IMMEDIATE32)
252b5132 1985 {
28e4f854
KH
1986 expression (&ex);
1987
252b5132
RH
1988 if (ex.X_op != O_constant)
1989 errmsg = _("constant expression expected");
28e4f854 1990
252b5132
RH
1991 extra_data_after_insn = true;
1992 extra_data_len = 4;
1993 extra_data = ex.X_add_number;
1994 ex.X_add_number = 0;
1995 }
28e4f854 1996 else if (register_name (&ex)
252b5132
RH
1997 && (operand->flags & V850_OPERAND_REG) == 0)
1998 {
1999 char c;
28e4f854
KH
2000 int exists = 0;
2001
252b5132
RH
2002 /* It is possible that an alias has been defined that
2003 matches a register name. For example the code may
2004 include a ".set ZERO, 0" directive, which matches
2005 the register name "zero". Attempt to reparse the
2006 field as an expression, and only complain if we
2007 cannot generate a constant. */
2008
2009 input_line_pointer = str;
2010
2011 c = get_symbol_end ();
28e4f854 2012
252b5132
RH
2013 if (symbol_find (str) != NULL)
2014 exists = 1;
28e4f854
KH
2015
2016 *input_line_pointer = c;
252b5132 2017 input_line_pointer = str;
28e4f854
KH
2018
2019 expression (&ex);
252b5132
RH
2020
2021 if (ex.X_op != O_constant)
2022 {
2023 /* If this register is actually occuring too early on
2024 the parsing of the instruction, (because another
2025 field is missing) then report this. */
2026 if (opindex_ptr[1] != 0
28e4f854
KH
2027 && (v850_operands[opindex_ptr[1]].flags
2028 & V850_OPERAND_REG))
252b5132
RH
2029 errmsg = _("syntax error: value is missing before the register name");
2030 else
2031 errmsg = _("syntax error: register not expected");
2032
28e4f854
KH
2033 /* If we created a symbol in the process of this
2034 test then delete it now, so that it will not
2035 be output with the real symbols... */
252b5132
RH
2036 if (exists == 0
2037 && ex.X_op == O_symbol)
2038 symbol_remove (ex.X_add_symbol,
28e4f854 2039 &symbol_rootP, &symbol_lastP);
252b5132
RH
2040 }
2041 }
28e4f854 2042 else if (system_register_name (&ex, false, false)
252b5132
RH
2043 && (operand->flags & V850_OPERAND_SRG) == 0)
2044 {
2045 errmsg = _("syntax error: system register not expected");
2046 }
2047 else if (cc_name (&ex)
2048 && (operand->flags & V850_OPERAND_CC) == 0)
2049 {
2050 errmsg = _("syntax error: condition code not expected");
2051 }
2052 else
2053 {
28e4f854 2054 expression (&ex);
252b5132
RH
2055 /* Special case:
2056 If we are assembling a MOV instruction (or a CALLT.... :-)
2057 and the immediate value does not fit into the bits
2058 available then create a fake error so that the next MOV
2059 instruction will be selected. This one has a 32 bit
2060 immediate field. */
2061
2062 if (((insn & 0x07e0) == 0x0200)
2063 && ex.X_op == O_constant
28e4f854 2064 && (ex.X_add_number < (-(1 << (operand->bits - 1)))
252b5132
RH
2065 || ex.X_add_number > ((1 << operand->bits) - 1)))
2066 errmsg = _("immediate operand is too large");
2067 }
2068
2069 if (errmsg)
2070 goto error;
252b5132 2071
28e4f854
KH
2072#if 0
2073 fprintf (stderr,
2074 " insn: %x, operand %d, op: %d, add_number: %d\n",
2075 insn, opindex_ptr - opcode->operands,
2076 ex.X_op, ex.X_add_number);
2077#endif
2078
2079 switch (ex.X_op)
252b5132
RH
2080 {
2081 case O_illegal:
2082 errmsg = _("illegal operand");
2083 goto error;
2084 case O_absent:
2085 errmsg = _("missing operand");
2086 goto error;
2087 case O_register:
28e4f854
KH
2088 if ((operand->flags
2089 & (V850_OPERAND_REG | V850_OPERAND_SRG)) == 0)
252b5132
RH
2090 {
2091 errmsg = _("invalid operand");
2092 goto error;
2093 }
2094 insn = v850_insert_operand (insn, operand, ex.X_add_number,
2095 (char *) NULL, 0,
2096 copy_of_instruction);
2097 break;
2098
2099 case O_constant:
2100 insn = v850_insert_operand (insn, operand, ex.X_add_number,
2101 (char *) NULL, 0,
2102 copy_of_instruction);
2103 break;
2104
2105 default:
2106 /* We need to generate a fixup for this expression. */
2107 if (fc >= MAX_INSN_FIXUPS)
2108 as_fatal (_("too many fixups"));
2109
28e4f854
KH
2110 fixups[fc].exp = ex;
2111 fixups[fc].opindex = *opindex_ptr;
2112 fixups[fc].reloc = BFD_RELOC_UNUSED;
252b5132
RH
2113 ++fc;
2114 break;
2115 }
2116 }
2117
2118 str = input_line_pointer;
2119 input_line_pointer = hold;
2120
2121 while (*str == ' ' || *str == ',' || *str == '[' || *str == ']'
2122 || *str == ')')
2123 ++str;
2124 }
2125 match = 1;
2126
2127 error:
2128 if (match == 0)
28e4f854 2129 {
252b5132
RH
2130 next_opcode = opcode + 1;
2131 if (next_opcode->name != NULL
2132 && strcmp (next_opcode->name, opcode->name) == 0)
2133 {
2134 opcode = next_opcode;
2135
2136 /* Skip versions that are not supported by the target
2137 processor. */
2138 if ((opcode->processors & processor_mask) == 0)
2139 goto error;
28e4f854 2140
252b5132
RH
2141 continue;
2142 }
28e4f854 2143
252b5132 2144 as_bad ("%s: %s", copy_of_instruction, errmsg);
28e4f854
KH
2145
2146 if (*input_line_pointer == ']')
2147 ++input_line_pointer;
2148
252b5132
RH
2149 ignore_rest_of_line ();
2150 input_line_pointer = saved_input_line_pointer;
2151 return;
28e4f854 2152 }
252b5132
RH
2153 break;
2154 }
28e4f854 2155
252b5132
RH
2156 while (isspace (*str))
2157 ++str;
2158
2159 if (*str != '\0')
28e4f854 2160 /* xgettext:c-format */
252b5132
RH
2161 as_bad (_("junk at end of line: `%s'"), str);
2162
2163 input_line_pointer = str;
2164
28e4f854
KH
2165 /* Write out the instruction. */
2166
252b5132
RH
2167 if (relaxable && fc > 0)
2168 {
2169 insn_size = 2;
2170 fc = 0;
2171
2172 if (!strcmp (opcode->name, "br"))
2173 {
2174 f = frag_var (rs_machine_dependent, 4, 2, 2,
2175 fixups[0].exp.X_add_symbol,
2176 fixups[0].exp.X_add_number,
28e4f854 2177 (char *) fixups[0].opindex);
252b5132
RH
2178 md_number_to_chars (f, insn, insn_size);
2179 md_number_to_chars (f + 2, 0, 2);
2180 }
2181 else
2182 {
2183 f = frag_var (rs_machine_dependent, 6, 4, 0,
2184 fixups[0].exp.X_add_symbol,
2185 fixups[0].exp.X_add_number,
28e4f854 2186 (char *) fixups[0].opindex);
252b5132
RH
2187 md_number_to_chars (f, insn, insn_size);
2188 md_number_to_chars (f + 2, 0, 4);
2189 }
a8761a19 2190 total_insn_size = insn_size;
252b5132 2191 }
28e4f854 2192 else
252b5132
RH
2193 {
2194 /* Four byte insns have an opcode with the two high bits on. */
2195 if ((insn & 0x0600) == 0x0600)
2196 insn_size = 4;
2197 else
2198 insn_size = 2;
2199
28e4f854 2200 /* Special case: 32 bit MOV. */
252b5132
RH
2201 if ((insn & 0xffe0) == 0x0620)
2202 insn_size = 2;
28e4f854 2203
252b5132 2204 f = frag_more (insn_size);
a8761a19 2205 total_insn_size = insn_size;
28e4f854 2206
252b5132
RH
2207 md_number_to_chars (f, insn, insn_size);
2208
2209 if (extra_data_after_insn)
2210 {
2211 f = frag_more (extra_data_len);
a8761a19 2212 total_insn_size += extra_data_len;
28e4f854 2213
252b5132
RH
2214 md_number_to_chars (f, extra_data, extra_data_len);
2215
2216 extra_data_after_insn = false;
2217 }
2218 }
2219
2220 /* Create any fixups. At this point we do not use a
2221 bfd_reloc_code_real_type, but instead just use the
2222 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2223 handle fixups for any operand type, although that is admittedly
2224 not a very exciting feature. We pick a BFD reloc type in
28e4f854 2225 md_apply_fix. */
252b5132
RH
2226 for (i = 0; i < fc; i++)
2227 {
28e4f854
KH
2228 const struct v850_operand *operand;
2229 bfd_reloc_code_real_type reloc;
2230
2231 operand = &v850_operands[fixups[i].opindex];
252b5132
RH
2232
2233 reloc = fixups[i].reloc;
28e4f854 2234
252b5132
RH
2235 if (reloc != BFD_RELOC_UNUSED)
2236 {
28e4f854
KH
2237 reloc_howto_type *reloc_howto =
2238 bfd_reloc_type_lookup (stdoutput, reloc);
2239 int size;
2240 int address;
2241 fixS *fixP;
252b5132
RH
2242
2243 if (!reloc_howto)
28e4f854
KH
2244 abort ();
2245
252b5132
RH
2246 size = bfd_get_reloc_size (reloc_howto);
2247
2248 /* XXX This will abort on an R_V850_8 reloc -
28e4f854
KH
2249 is this reloc actually used? */
2250 if (size != 2 && size != 4)
252b5132
RH
2251 abort ();
2252
2253 address = (f - frag_now->fr_literal) + insn_size - size;
2254
2255 if (reloc == BFD_RELOC_32)
28e4f854
KH
2256 address += 2;
2257
252b5132 2258 fixP = fix_new_exp (frag_now, address, size,
28e4f854 2259 &fixups[i].exp,
252b5132
RH
2260 reloc_howto->pc_relative,
2261 reloc);
2262
2263 switch (reloc)
2264 {
2265 case BFD_RELOC_LO16:
2266 case BFD_RELOC_HI16:
2267 case BFD_RELOC_HI16_S:
2268 fixP->fx_no_overflow = 1;
2269 break;
5480ccf3
NC
2270 default:
2271 break;
252b5132
RH
2272 }
2273 }
2274 else
2275 {
28e4f854 2276 fix_new_exp (frag_now,
252b5132
RH
2277 f - frag_now->fr_literal, 4,
2278 & fixups[i].exp,
28e4f854 2279 1 /* FIXME: V850_OPERAND_RELATIVE ??? */,
252b5132 2280 (bfd_reloc_code_real_type) (fixups[i].opindex
28e4f854 2281 + (int) BFD_RELOC_UNUSED));
252b5132
RH
2282 }
2283 }
2284
2285 input_line_pointer = saved_input_line_pointer;
a8761a19
DD
2286
2287 if (debug_type == DEBUG_DWARF2)
2288 dwarf2_generate_asm_lineno (total_insn_size);
252b5132
RH
2289}
2290
28e4f854
KH
2291/* If while processing a fixup, a reloc really needs to be created
2292 then it is done here. */
252b5132 2293
252b5132
RH
2294arelent *
2295tc_gen_reloc (seg, fixp)
28e4f854
KH
2296 asection *seg ATTRIBUTE_UNUSED;
2297 fixS *fixp;
252b5132 2298{
28e4f854
KH
2299 arelent *reloc;
2300
2301 reloc = (arelent *) xmalloc (sizeof (arelent));
2302 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
2303 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
2304 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
2305 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
252b5132
RH
2306
2307 if (reloc->howto == (reloc_howto_type *) NULL)
2308 {
2309 as_bad_where (fixp->fx_file, fixp->fx_line,
28e4f854
KH
2310 /* xgettext:c-format */
2311 _("reloc %d not supported by object file format"),
252b5132
RH
2312 (int) fixp->fx_r_type);
2313
2314 xfree (reloc);
28e4f854 2315
252b5132
RH
2316 return NULL;
2317 }
28e4f854
KH
2318
2319 if (fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY
252b5132
RH
2320 || fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT)
2321 reloc->addend = fixp->fx_offset;
2322 else
2323 reloc->addend = fixp->fx_addnumber;
28e4f854 2324
252b5132
RH
2325 return reloc;
2326}
2327
2328/* Assume everything will fit in two bytes, then expand as necessary. */
28e4f854 2329
252b5132
RH
2330int
2331md_estimate_size_before_relax (fragp, seg)
28e4f854
KH
2332 fragS *fragp;
2333 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH
2334{
2335 if (fragp->fr_subtype == 0)
2336 fragp->fr_var = 4;
2337 else if (fragp->fr_subtype == 2)
2338 fragp->fr_var = 2;
2339 else
2340 abort ();
2341 return 2;
28e4f854 2342}
252b5132
RH
2343
2344long
2345v850_pcrel_from_section (fixp, section)
28e4f854
KH
2346 fixS *fixp;
2347 segT section;
252b5132
RH
2348{
2349 /* If the symbol is undefined, or in a section other than our own,
d6c497c7 2350 or it is weak (in which case it may well be in another section,
252b5132
RH
2351 then let the linker figure it out. */
2352 if (fixp->fx_addsy != (symbolS *) NULL
2353 && (! S_IS_DEFINED (fixp->fx_addsy)
d6c497c7 2354 || S_IS_WEAK (fixp->fx_addsy)
252b5132 2355 || (S_GET_SEGMENT (fixp->fx_addsy) != section)))
d6c497c7 2356 return 0;
28e4f854 2357
252b5132
RH
2358 return fixp->fx_frag->fr_address + fixp->fx_where;
2359}
2360
2361int
2362md_apply_fix3 (fixp, valuep, seg)
28e4f854
KH
2363 fixS *fixp;
2364 valueT *valuep;
2365 segT seg ATTRIBUTE_UNUSED;
252b5132
RH
2366{
2367 valueT value;
28e4f854 2368 char *where;
252b5132 2369
28e4f854 2370 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
252b5132
RH
2371 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
2372 {
2373 fixp->fx_done = 0;
2374 return 1;
2375 }
2376
2377 if (fixp->fx_addsy == (symbolS *) NULL)
2378 {
28e4f854 2379 value = *valuep;
252b5132
RH
2380 fixp->fx_done = 1;
2381 }
2382 else if (fixp->fx_pcrel)
28e4f854 2383 value = *valuep;
252b5132
RH
2384 else
2385 {
2386 value = fixp->fx_offset;
2387 if (fixp->fx_subsy != (symbolS *) NULL)
2388 {
2389 if (S_GET_SEGMENT (fixp->fx_subsy) == absolute_section)
2390 value -= S_GET_VALUE (fixp->fx_subsy);
2391 else
2392 {
2393 /* We don't actually support subtracting a symbol. */
2394 as_bad_where (fixp->fx_file, fixp->fx_line,
2395 _("expression too complex"));
2396 }
2397 }
2398 }
2399
2400 if ((int) fixp->fx_r_type >= (int) BFD_RELOC_UNUSED)
2401 {
28e4f854
KH
2402 int opindex;
2403 const struct v850_operand *operand;
2404 unsigned long insn;
252b5132
RH
2405
2406 opindex = (int) fixp->fx_r_type - (int) BFD_RELOC_UNUSED;
28e4f854 2407 operand = &v850_operands[opindex];
252b5132
RH
2408
2409 /* Fetch the instruction, insert the fully resolved operand
2410 value, and stuff the instruction back again.
2411
2412 Note the instruction has been stored in little endian
2413 format! */
2414 where = fixp->fx_frag->fr_literal + fixp->fx_where;
2415
2416 insn = bfd_getl32 ((unsigned char *) where);
2417 insn = v850_insert_operand (insn, operand, (offsetT) value,
2418 fixp->fx_file, fixp->fx_line, NULL);
2419 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
2420
2421 if (fixp->fx_done)
2422 {
28e4f854 2423 /* Nothing else to do here. */
252b5132
RH
2424 return 1;
2425 }
2426
28e4f854
KH
2427 /* Determine a BFD reloc value based on the operand information.
2428 We are only prepared to turn a few of the operands into relocs. */
252b5132
RH
2429
2430 if (operand->bits == 22)
2431 fixp->fx_r_type = BFD_RELOC_V850_22_PCREL;
2432 else if (operand->bits == 9)
2433 fixp->fx_r_type = BFD_RELOC_V850_9_PCREL;
2434 else
2435 {
28e4f854
KH
2436#if 0
2437 fprintf (stderr, "bits: %d, insn: %x\n", operand->bits, insn);
2438#endif
2439
252b5132 2440 as_bad_where (fixp->fx_file, fixp->fx_line,
28e4f854 2441 _("unresolved expression that must be resolved"));
252b5132
RH
2442 fixp->fx_done = 1;
2443 return 1;
2444 }
2445 }
2446 else if (fixp->fx_done)
2447 {
2448 /* We still have to insert the value into memory! */
2449 where = fixp->fx_frag->fr_literal + fixp->fx_where;
2450
2451 if (fixp->fx_size == 1)
28e4f854 2452 *where = value & 0xff;
252b5132
RH
2453 else if (fixp->fx_size == 2)
2454 bfd_putl16 (value & 0xffff, (unsigned char *) where);
2455 else if (fixp->fx_size == 4)
2456 bfd_putl32 (value, (unsigned char *) where);
2457 }
28e4f854 2458
252b5132
RH
2459 fixp->fx_addnumber = value;
2460 return 1;
2461}
252b5132
RH
2462\f
2463/* Parse a cons expression. We have to handle hi(), lo(), etc
2464 on the v850. */
28e4f854 2465
252b5132
RH
2466void
2467parse_cons_expression_v850 (exp)
28e4f854 2468 expressionS *exp;
252b5132
RH
2469{
2470 /* See if there's a reloc prefix like hi() we have to handle. */
2471 hold_cons_reloc = v850_reloc_prefix (NULL);
2472
2473 /* Do normal expression parsing. */
2474 expression (exp);
2475}
2476
2477/* Create a fixup for a cons expression. If parse_cons_expression_v850
2478 found a reloc prefix, then we use that reloc, else we choose an
2479 appropriate one based on the size of the expression. */
28e4f854 2480
252b5132
RH
2481void
2482cons_fix_new_v850 (frag, where, size, exp)
28e4f854 2483 fragS *frag;
252b5132
RH
2484 int where;
2485 int size;
2486 expressionS *exp;
2487{
2488 if (hold_cons_reloc == BFD_RELOC_UNUSED)
2489 {
2490 if (size == 4)
2491 hold_cons_reloc = BFD_RELOC_32;
2492 if (size == 2)
2493 hold_cons_reloc = BFD_RELOC_16;
2494 if (size == 1)
2495 hold_cons_reloc = BFD_RELOC_8;
2496 }
2497
2498 if (exp != NULL)
2499 fix_new_exp (frag, where, size, exp, 0, hold_cons_reloc);
2500 else
2501 fix_new (frag, where, size, NULL, 0, 0, hold_cons_reloc);
a8761a19
DD
2502
2503 hold_cons_reloc = BFD_RELOC_UNUSED;
252b5132 2504}
d6c497c7 2505
252b5132
RH
2506boolean
2507v850_fix_adjustable (fixP)
28e4f854 2508 fixS *fixP;
252b5132 2509{
252b5132
RH
2510 if (fixP->fx_addsy == NULL)
2511 return 1;
28e4f854
KH
2512
2513 /* Prevent all adjustments to global symbols. */
252b5132
RH
2514 if (S_IS_EXTERN (fixP->fx_addsy))
2515 return 0;
28e4f854 2516
5480ccf3 2517 /* Similarly for weak symbols. */
252b5132
RH
2518 if (S_IS_WEAK (fixP->fx_addsy))
2519 return 0;
28e4f854
KH
2520
2521 /* Don't adjust function names. */
252b5132
RH
2522 if (S_IS_FUNCTION (fixP->fx_addsy))
2523 return 0;
2524
28e4f854
KH
2525 /* We need the symbol name for the VTABLE entries. */
2526 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
252b5132
RH
2527 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
2528 return 0;
28e4f854 2529
252b5132
RH
2530 return 1;
2531}
28e4f854 2532
252b5132 2533int
d6c497c7 2534v850_force_relocation (fixP)
28e4f854 2535 struct fix *fixP;
252b5132 2536{
d6c497c7
NC
2537 if (fixP->fx_addsy && S_IS_WEAK (fixP->fx_addsy))
2538 return 1;
28e4f854
KH
2539
2540 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
d6c497c7 2541 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
252b5132 2542 return 1;
28e4f854 2543
252b5132
RH
2544 return 0;
2545}
a8761a19
DD
2546
2547void
2548v850_finalize ()
2549{
2550 if (debug_type == DEBUG_DWARF2)
2551 dwarf2_finish ();
2552}
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