Add pc-relative 32-bit reloc to v850 port. Fixes ld-elf/merge test failure.
[deliverable/binutils-gdb.git] / gas / config / tc-v850.c
CommitLineData
252b5132 1/* tc-v850.c -- Assembler code for the NEC V850
ae6063d4 2 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
507c8a1a 3 Free Software Foundation, Inc.
252b5132
RH
4
5 This file is part of GAS, the GNU Assembler.
6
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22#include <stdio.h>
252b5132 23#include "as.h"
3882b010 24#include "safe-ctype.h"
28e4f854 25#include "subsegs.h"
252b5132 26#include "opcode/v850.h"
a8761a19 27#include "dwarf2dbg.h"
252b5132 28
28e4f854
KH
29/* Sign-extend a 16-bit number. */
30#define SEXT16(x) ((((x) & 0xffff) ^ (~0x7fff)) + 0x8000)
252b5132
RH
31
32/* Temporarily holds the reloc in a cons expression. */
a8761a19 33static bfd_reloc_code_real_type hold_cons_reloc = BFD_RELOC_UNUSED;
252b5132
RH
34
35/* Set to TRUE if we want to be pedantic about signed overflows. */
b34976b6
AM
36static bfd_boolean warn_signed_overflows = FALSE;
37static bfd_boolean warn_unsigned_overflows = FALSE;
252b5132
RH
38
39/* Indicates the target BFD machine number. */
28e4f854 40static int machine = -1;
252b5132
RH
41
42/* Indicates the target processor(s) for the assemble. */
28e4f854 43static int processor_mask = -1;
252b5132
RH
44\f
45/* Structure to hold information about predefined registers. */
19d63e5d 46struct reg_name {
28e4f854
KH
47 const char *name;
48 int value;
252b5132
RH
49};
50
28e4f854
KH
51/* Generic assembler global variables which must be defined by all
52 targets. */
252b5132 53
28e4f854 54/* Characters which always start a comment. */
252b5132
RH
55const char comment_chars[] = "#";
56
57/* Characters which start a comment at the beginning of a line. */
58const char line_comment_chars[] = ";#";
59
28e4f854 60/* Characters which may be used to separate multiple commands on a
252b5132
RH
61 single line. */
62const char line_separator_chars[] = ";";
63
28e4f854 64/* Characters which are used to indicate an exponent in a floating
252b5132
RH
65 point number. */
66const char EXP_CHARS[] = "eE";
67
28e4f854 68/* Characters which mean that a number is a floating point constant,
252b5132
RH
69 as in 0d1.0. */
70const char FLT_CHARS[] = "dD";
71\f
19d63e5d 72const relax_typeS md_relax_table[] = {
252b5132
RH
73 /* Conditional branches. */
74 {0xff, -0x100, 2, 1},
75 {0x1fffff, -0x200000, 6, 0},
76 /* Unconditional branches. */
77 {0xff, -0x100, 2, 3},
78 {0x1fffff, -0x200000, 4, 0},
79};
80
86aba9db
NC
81static int v850_relax = 0;
82
28e4f854 83/* Fixups. */
252b5132 84#define MAX_INSN_FIXUPS (5)
19d63e5d 85struct v850_fixup {
28e4f854
KH
86 expressionS exp;
87 int opindex;
252b5132
RH
88 bfd_reloc_code_real_type reloc;
89};
90
28e4f854 91struct v850_fixup fixups[MAX_INSN_FIXUPS];
252b5132 92static int fc;
252b5132 93
9e0665bc 94struct v850_seg_entry
252b5132 95{
9e0665bc
AM
96 segT s;
97 const char *name;
98 flagword flags;
99};
252b5132 100
9e0665bc 101struct v850_seg_entry v850_seg_table[] =
252b5132 102{
9e0665bc
AM
103 { NULL, ".sdata",
104 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS
105 | SEC_SMALL_DATA },
106 { NULL, ".tdata",
107 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS },
108 { NULL, ".zdata",
109 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS },
110 { NULL, ".sbss",
111 SEC_ALLOC | SEC_SMALL_DATA },
112 { NULL, ".tbss",
113 SEC_ALLOC },
114 { NULL, ".zbss",
115 SEC_ALLOC},
116 { NULL, ".rosdata",
117 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_READONLY | SEC_DATA
118 | SEC_HAS_CONTENTS | SEC_SMALL_DATA },
119 { NULL, ".rozdata",
120 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_READONLY | SEC_DATA
121 | SEC_HAS_CONTENTS },
122 { NULL, ".scommon",
123 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS
124 | SEC_SMALL_DATA | SEC_IS_COMMON },
125 { NULL, ".tcommon",
126 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS
127 | SEC_IS_COMMON },
128 { NULL, ".zcommon",
129 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS
130 | SEC_IS_COMMON },
131 { NULL, ".call_table_data",
132 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS },
133 { NULL, ".call_table_text",
134 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_READONLY | SEC_CODE
135 | SEC_HAS_CONTENTS},
136 { NULL, ".bss",
137 SEC_ALLOC }
138};
28e4f854 139
9e0665bc
AM
140#define SDATA_SECTION 0
141#define TDATA_SECTION 1
142#define ZDATA_SECTION 2
143#define SBSS_SECTION 3
144#define TBSS_SECTION 4
145#define ZBSS_SECTION 5
146#define ROSDATA_SECTION 6
147#define ROZDATA_SECTION 7
148#define SCOMMON_SECTION 8
149#define TCOMMON_SECTION 9
150#define ZCOMMON_SECTION 10
151#define CALL_TABLE_DATA_SECTION 11
152#define CALL_TABLE_TEXT_SECTION 12
153#define BSS_SECTION 13
154
155static void do_v850_seg PARAMS ((int, subsegT));
252b5132 156
9e0665bc
AM
157static void
158do_v850_seg (i, sub)
159 int i;
160 subsegT sub;
252b5132 161{
9e0665bc 162 struct v850_seg_entry *seg = v850_seg_table + i;
28e4f854 163
28e4f854 164 obj_elf_section_change_hook ();
9e0665bc
AM
165 if (seg->s != NULL)
166 {
167 subseg_set (seg->s, sub);
168 }
169 else
170 {
171 seg->s = subseg_new (seg->name, sub);
172 bfd_set_section_flags (stdoutput, seg->s, seg->flags);
173 if ((seg->flags & SEC_LOAD) == 0)
174 seg_info (seg->s)->bss = 1;
175 }
252b5132
RH
176}
177
9e0665bc 178static void v850_seg PARAMS ((int i));
28e4f854 179
9e0665bc
AM
180static void
181v850_seg (i)
182 int i;
252b5132 183{
9e0665bc 184 subsegT sub = get_absolute_expression ();
28e4f854 185
9e0665bc 186 do_v850_seg (i, sub);
252b5132
RH
187 demand_empty_rest_of_line ();
188}
189
9e0665bc 190static void v850_offset PARAMS ((int));
28e4f854 191
9e0665bc
AM
192static void
193v850_offset (ignore)
194 int ignore ATTRIBUTE_UNUSED;
252b5132 195{
825487fa 196 char *pfrag;
252b5132 197 int temp = get_absolute_expression ();
825487fa
JW
198
199 pfrag = frag_var (rs_org, 1, 1, (relax_substateT)0, (symbolS *)0,
200 (offsetT) temp, (char *) 0);
201 *pfrag = 0;
28e4f854 202
252b5132
RH
203 demand_empty_rest_of_line ();
204}
205
28e4f854
KH
206/* Copied from obj_elf_common() in gas/config/obj-elf.c. */
207
9e0665bc
AM
208static void v850_comm PARAMS ((int));
209
252b5132
RH
210static void
211v850_comm (area)
212 int area;
213{
28e4f854
KH
214 char *name;
215 char c;
216 char *p;
217 int temp;
218 unsigned int size;
219 symbolS *symbolP;
220 int have_align;
252b5132
RH
221
222 name = input_line_pointer;
223 c = get_symbol_end ();
28e4f854
KH
224
225 /* Just after name is now '\0'. */
252b5132
RH
226 p = input_line_pointer;
227 *p = c;
28e4f854 228
252b5132 229 SKIP_WHITESPACE ();
28e4f854 230
252b5132
RH
231 if (*input_line_pointer != ',')
232 {
233 as_bad (_("Expected comma after symbol-name"));
234 ignore_rest_of_line ();
235 return;
236 }
28e4f854
KH
237
238 /* Skip ','. */
239 input_line_pointer++;
240
252b5132
RH
241 if ((temp = get_absolute_expression ()) < 0)
242 {
28e4f854 243 /* xgettext:c-format */
252b5132
RH
244 as_bad (_(".COMMon length (%d.) < 0! Ignored."), temp);
245 ignore_rest_of_line ();
246 return;
247 }
28e4f854 248
252b5132
RH
249 size = temp;
250 *p = 0;
251 symbolP = symbol_find_or_make (name);
252 *p = c;
28e4f854 253
252b5132
RH
254 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
255 {
256 as_bad (_("Ignoring attempt to re-define symbol"));
257 ignore_rest_of_line ();
258 return;
259 }
28e4f854 260
252b5132
RH
261 if (S_GET_VALUE (symbolP) != 0)
262 {
263 if (S_GET_VALUE (symbolP) != size)
264 {
28e4f854 265 /* xgettext:c-format */
252b5132
RH
266 as_warn (_("Length of .comm \"%s\" is already %ld. Not changed to %d."),
267 S_GET_NAME (symbolP), (long) S_GET_VALUE (symbolP), size);
268 }
269 }
28e4f854
KH
270
271 know (symbol_get_frag (symbolP) == &zero_address_frag);
272
252b5132
RH
273 if (*input_line_pointer != ',')
274 have_align = 0;
275 else
276 {
277 have_align = 1;
278 input_line_pointer++;
279 SKIP_WHITESPACE ();
280 }
28e4f854 281
252b5132
RH
282 if (! have_align || *input_line_pointer != '"')
283 {
284 if (! have_align)
285 temp = 0;
286 else
287 {
288 temp = get_absolute_expression ();
28e4f854 289
252b5132
RH
290 if (temp < 0)
291 {
292 temp = 0;
293 as_warn (_("Common alignment negative; 0 assumed"));
294 }
295 }
28e4f854 296
cac58fa6 297 if (symbol_get_obj (symbolP)->local)
252b5132 298 {
28e4f854
KH
299 segT old_sec;
300 int old_subsec;
301 char *pfrag;
302 int align;
303 flagword applicable;
252b5132
RH
304
305 old_sec = now_seg;
306 old_subsec = now_subseg;
28e4f854 307
252b5132 308 applicable = bfd_applicable_section_flags (stdoutput);
28e4f854 309
252b5132 310 applicable &= SEC_ALLOC;
28e4f854 311
252b5132
RH
312 switch (area)
313 {
9e0665bc
AM
314 case SCOMMON_SECTION:
315 do_v850_seg (SBSS_SECTION, 0);
252b5132 316 break;
28e4f854 317
9e0665bc
AM
318 case ZCOMMON_SECTION:
319 do_v850_seg (ZBSS_SECTION, 0);
252b5132 320 break;
28e4f854 321
9e0665bc
AM
322 case TCOMMON_SECTION:
323 do_v850_seg (TBSS_SECTION, 0);
252b5132
RH
324 break;
325 }
326
327 if (temp)
328 {
28e4f854 329 /* Convert to a power of 2 alignment. */
252b5132
RH
330 for (align = 0; (temp & 1) == 0; temp >>= 1, ++align)
331 ;
28e4f854 332
252b5132
RH
333 if (temp != 1)
334 {
335 as_bad (_("Common alignment not a power of 2"));
336 ignore_rest_of_line ();
337 return;
338 }
339 }
340 else
341 align = 0;
28e4f854 342
9e0665bc 343 record_alignment (now_seg, align);
28e4f854 344
252b5132
RH
345 if (align)
346 frag_align (align, 0, 0);
347
348 switch (area)
349 {
9e0665bc
AM
350 case SCOMMON_SECTION:
351 if (S_GET_SEGMENT (symbolP) == v850_seg_table[SBSS_SECTION].s)
7dcc9865 352 symbol_get_frag (symbolP)->fr_symbol = 0;
252b5132
RH
353 break;
354
9e0665bc
AM
355 case ZCOMMON_SECTION:
356 if (S_GET_SEGMENT (symbolP) == v850_seg_table[ZBSS_SECTION].s)
7dcc9865 357 symbol_get_frag (symbolP)->fr_symbol = 0;
252b5132
RH
358 break;
359
9e0665bc
AM
360 case TCOMMON_SECTION:
361 if (S_GET_SEGMENT (symbolP) == v850_seg_table[TBSS_SECTION].s)
7dcc9865 362 symbol_get_frag (symbolP)->fr_symbol = 0;
252b5132
RH
363 break;
364
365 default:
cac58fa6 366 abort ();
252b5132 367 }
28e4f854 368
7dcc9865 369 symbol_set_frag (symbolP, frag_now);
252b5132
RH
370 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP,
371 (offsetT) size, (char *) 0);
372 *pfrag = 0;
373 S_SET_SIZE (symbolP, size);
28e4f854 374
252b5132
RH
375 switch (area)
376 {
9e0665bc
AM
377 case SCOMMON_SECTION:
378 S_SET_SEGMENT (symbolP, v850_seg_table[SBSS_SECTION].s);
252b5132 379 break;
28e4f854 380
9e0665bc
AM
381 case ZCOMMON_SECTION:
382 S_SET_SEGMENT (symbolP, v850_seg_table[ZBSS_SECTION].s);
252b5132 383 break;
28e4f854 384
9e0665bc
AM
385 case TCOMMON_SECTION:
386 S_SET_SEGMENT (symbolP, v850_seg_table[TBSS_SECTION].s);
252b5132 387 break;
28e4f854 388
252b5132 389 default:
28e4f854 390 abort ();
252b5132 391 }
28e4f854 392
252b5132 393 S_CLEAR_EXTERNAL (symbolP);
28e4f854 394 obj_elf_section_change_hook ();
252b5132
RH
395 subseg_set (old_sec, old_subsec);
396 }
397 else
398 {
86aba9db
NC
399 segT old_sec;
400 int old_subsec;
401
252b5132 402 allocate_common:
86aba9db
NC
403 old_sec = now_seg;
404 old_subsec = now_subseg;
405
252b5132
RH
406 S_SET_VALUE (symbolP, (valueT) size);
407 S_SET_ALIGN (symbolP, temp);
408 S_SET_EXTERNAL (symbolP);
28e4f854 409
252b5132
RH
410 switch (area)
411 {
9e0665bc
AM
412 case SCOMMON_SECTION:
413 case ZCOMMON_SECTION:
414 case TCOMMON_SECTION:
415 do_v850_seg (area, 0);
416 S_SET_SEGMENT (symbolP, v850_seg_table[area].s);
252b5132 417 break;
28e4f854 418
252b5132 419 default:
28e4f854 420 abort ();
252b5132 421 }
86aba9db
NC
422
423 obj_elf_section_change_hook ();
424 subseg_set (old_sec, old_subsec);
252b5132
RH
425 }
426 }
427 else
428 {
429 input_line_pointer++;
28e4f854 430
252b5132
RH
431 /* @@ Some use the dot, some don't. Can we get some consistency?? */
432 if (*input_line_pointer == '.')
433 input_line_pointer++;
28e4f854 434
252b5132
RH
435 /* @@ Some say data, some say bss. */
436 if (strncmp (input_line_pointer, "bss\"", 4)
437 && strncmp (input_line_pointer, "data\"", 5))
438 {
439 while (*--input_line_pointer != '"')
440 ;
441 input_line_pointer--;
442 goto bad_common_segment;
443 }
444 while (*input_line_pointer++ != '"')
445 ;
446 goto allocate_common;
447 }
448
fed9b18a 449 symbol_get_bfdsym (symbolP)->flags |= BSF_OBJECT;
252b5132
RH
450
451 demand_empty_rest_of_line ();
452 return;
453
454 {
455 bad_common_segment:
456 p = input_line_pointer;
457 while (*p && *p != '\n')
458 p++;
459 c = *p;
460 *p = '\0';
461 as_bad (_("bad .common segment %s"), input_line_pointer + 1);
462 *p = c;
463 input_line_pointer = p;
464 ignore_rest_of_line ();
465 return;
466 }
467}
468
9e0665bc
AM
469static void set_machine PARAMS ((int));
470
471static void
472set_machine (number)
473 int number;
252b5132
RH
474{
475 machine = number;
476 bfd_set_arch_mach (stdoutput, TARGET_ARCH, machine);
477
478 switch (machine)
479 {
28e4f854
KH
480 case 0: processor_mask = PROCESSOR_V850; break;
481 case bfd_mach_v850e: processor_mask = PROCESSOR_V850E; break;
252b5132
RH
482 }
483}
484
86aba9db
NC
485static void v850_longcode PARAMS ((int));
486
487static void
488v850_longcode (type)
489 int type;
490{
491 expressionS ex;
492
493 if (! v850_relax)
494 {
495 if (type == 1)
496 as_warn (".longcall pseudo-op seen when not relaxing");
497 else
498 as_warn (".longjump pseudo-op seen when not relaxing");
499 }
500
501 expression (&ex);
502
503 if (ex.X_op != O_symbol || ex.X_add_number != 0)
504 {
505 as_bad ("bad .longcall format");
506 ignore_rest_of_line ();
507
508 return;
509 }
510
511 if (type == 1)
512 fix_new_exp (frag_now, frag_now_fix (), 4, & ex, 1,
513 BFD_RELOC_V850_LONGCALL);
514 else
515 fix_new_exp (frag_now, frag_now_fix (), 4, & ex, 1,
516 BFD_RELOC_V850_LONGJUMP);
517
518 demand_empty_rest_of_line ();
519}
520
252b5132 521/* The target specific pseudo-ops which we support. */
77c6dd37
NC
522const pseudo_typeS md_pseudo_table[] =
523{
9e0665bc
AM
524 { "sdata", v850_seg, SDATA_SECTION },
525 { "tdata", v850_seg, TDATA_SECTION },
526 { "zdata", v850_seg, ZDATA_SECTION },
527 { "sbss", v850_seg, SBSS_SECTION },
528 { "tbss", v850_seg, TBSS_SECTION },
529 { "zbss", v850_seg, ZBSS_SECTION },
530 { "rosdata", v850_seg, ROSDATA_SECTION },
531 { "rozdata", v850_seg, ROZDATA_SECTION },
532 { "bss", v850_seg, BSS_SECTION },
533 { "offset", v850_offset, 0 },
534 { "word", cons, 4 },
535 { "zcomm", v850_comm, ZCOMMON_SECTION },
536 { "scomm", v850_comm, SCOMMON_SECTION },
537 { "tcomm", v850_comm, TCOMMON_SECTION },
538 { "v850", set_machine, 0 },
539 { "call_table_data", v850_seg, CALL_TABLE_DATA_SECTION },
540 { "call_table_text", v850_seg, CALL_TABLE_TEXT_SECTION },
541 { "v850e", set_machine, bfd_mach_v850e },
86aba9db
NC
542 { "longcall", v850_longcode, 1 },
543 { "longjump", v850_longcode, 2 },
9e0665bc 544 { NULL, NULL, 0 }
252b5132
RH
545};
546
547/* Opcode hash table. */
548static struct hash_control *v850_hash;
549
28e4f854 550/* This table is sorted. Suitable for searching by a binary search. */
77c6dd37
NC
551static const struct reg_name pre_defined_registers[] =
552{
252b5132 553 { "ep", 30 }, /* ep - element ptr */
28e4f854
KH
554 { "gp", 4 }, /* gp - global ptr */
555 { "hp", 2 }, /* hp - handler stack ptr */
556 { "lp", 31 }, /* lp - link ptr */
252b5132
RH
557 { "r0", 0 },
558 { "r1", 1 },
559 { "r10", 10 },
560 { "r11", 11 },
561 { "r12", 12 },
562 { "r13", 13 },
563 { "r14", 14 },
564 { "r15", 15 },
565 { "r16", 16 },
566 { "r17", 17 },
567 { "r18", 18 },
568 { "r19", 19 },
569 { "r2", 2 },
570 { "r20", 20 },
571 { "r21", 21 },
572 { "r22", 22 },
573 { "r23", 23 },
574 { "r24", 24 },
575 { "r25", 25 },
576 { "r26", 26 },
577 { "r27", 27 },
578 { "r28", 28 },
579 { "r29", 29 },
580 { "r3", 3 },
581 { "r30", 30 },
582 { "r31", 31 },
583 { "r4", 4 },
584 { "r5", 5 },
585 { "r6", 6 },
586 { "r7", 7 },
587 { "r8", 8 },
588 { "r9", 9 },
28e4f854
KH
589 { "sp", 3 }, /* sp - stack ptr */
590 { "tp", 5 }, /* tp - text ptr */
252b5132
RH
591 { "zero", 0 },
592};
252b5132 593
28e4f854
KH
594#define REG_NAME_CNT \
595 (sizeof (pre_defined_registers) / sizeof (struct reg_name))
252b5132 596
77c6dd37
NC
597static const struct reg_name system_registers[] =
598{
599 { "asid", 23 },
600 { "bpc", 22 },
601 { "bpav", 24 },
602 { "bpam", 25 },
603 { "bpdv", 26 },
604 { "bpdm", 27 },
252b5132
RH
605 { "ctbp", 20 },
606 { "ctpc", 16 },
607 { "ctpsw", 17 },
608 { "dbpc", 18 },
609 { "dbpsw", 19 },
77c6dd37 610 { "dir", 21 },
252b5132
RH
611 { "ecr", 4 },
612 { "eipc", 0 },
613 { "eipsw", 1 },
614 { "fepc", 2 },
615 { "fepsw", 3 },
616 { "psw", 5 },
617};
28e4f854
KH
618
619#define SYSREG_NAME_CNT \
620 (sizeof (system_registers) / sizeof (struct reg_name))
252b5132 621
77c6dd37
NC
622static const struct reg_name system_list_registers[] =
623{
252b5132
RH
624 {"PS", 5 },
625 {"SR", 0 + 1}
626};
28e4f854
KH
627
628#define SYSREGLIST_NAME_CNT \
629 (sizeof (system_list_registers) / sizeof (struct reg_name))
252b5132 630
77c6dd37
NC
631static const struct reg_name cc_names[] =
632{
252b5132
RH
633 { "c", 0x1 },
634 { "e", 0x2 },
635 { "ge", 0xe },
636 { "gt", 0xf },
637 { "h", 0xb },
638 { "l", 0x1 },
639 { "le", 0x7 },
640 { "lt", 0x6 },
641 { "n", 0x4 },
642 { "nc", 0x9 },
643 { "ne", 0xa },
644 { "nh", 0x3 },
645 { "nl", 0x9 },
646 { "ns", 0xc },
647 { "nv", 0x8 },
648 { "nz", 0xa },
649 { "p", 0xc },
650 { "s", 0x4 },
651 { "sa", 0xd },
652 { "t", 0x5 },
653 { "v", 0x0 },
654 { "z", 0x2 },
655};
252b5132 656
28e4f854
KH
657#define CC_NAME_CNT \
658 (sizeof (cc_names) / sizeof (struct reg_name))
659
660/* Do a binary search of the given register table to see if NAME is a
661 valid regiter name. Return the register number from the array on
662 success, or -1 on failure. */
252b5132 663
9e0665bc 664static int reg_name_search
b34976b6 665 PARAMS ((const struct reg_name *, int, const char *, bfd_boolean));
9e0665bc 666
252b5132
RH
667static int
668reg_name_search (regs, regcount, name, accept_numbers)
28e4f854
KH
669 const struct reg_name *regs;
670 int regcount;
671 const char *name;
b34976b6 672 bfd_boolean accept_numbers;
252b5132
RH
673{
674 int middle, low, high;
675 int cmp;
28e4f854 676 symbolS *symbolP;
252b5132
RH
677
678 /* If the register name is a symbol, then evaluate it. */
679 if ((symbolP = symbol_find (name)) != NULL)
680 {
681 /* If the symbol is an alias for another name then use that.
682 If the symbol is an alias for a number, then return the number. */
a77f5182 683 if (symbol_equated_p (symbolP))
252b5132 684 {
28e4f854
KH
685 name
686 = S_GET_NAME (symbol_get_value_expression (symbolP)->X_add_symbol);
252b5132
RH
687 }
688 else if (accept_numbers)
689 {
690 int reg = S_GET_VALUE (symbolP);
28e4f854 691
252b5132
RH
692 if (reg >= 0 && reg <= 31)
693 return reg;
694 }
695
696 /* Otherwise drop through and try parsing name normally. */
697 }
28e4f854 698
252b5132
RH
699 low = 0;
700 high = regcount - 1;
701
702 do
703 {
704 middle = (low + high) / 2;
705 cmp = strcasecmp (name, regs[middle].name);
706 if (cmp < 0)
707 high = middle - 1;
708 else if (cmp > 0)
709 low = middle + 1;
710 else
711 return regs[middle].value;
712 }
713 while (low <= high);
714 return -1;
715}
716
252b5132 717/* Summary of register_name().
77c6dd37
NC
718
719 in: Input_line_pointer points to 1st char of operand.
720
721 out: An expressionS.
722 The operand may have been a register: in this case, X_op == O_register,
723 X_add_number is set to the register number, and truth is returned.
724 Input_line_pointer->(next non-blank) char after operand, or is in
725 its original state. */
28e4f854 726
b34976b6 727static bfd_boolean register_name PARAMS ((expressionS *));
9e0665bc 728
b34976b6 729static bfd_boolean
252b5132 730register_name (expressionP)
28e4f854 731 expressionS *expressionP;
252b5132 732{
28e4f854
KH
733 int reg_number;
734 char *name;
735 char *start;
736 char c;
252b5132 737
28e4f854 738 /* Find the spelling of the operand. */
252b5132
RH
739 start = name = input_line_pointer;
740
741 c = get_symbol_end ();
742
743 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT,
744 name, FALSE);
745
28e4f854
KH
746 /* Put back the delimiting char. */
747 *input_line_pointer = c;
748
749 /* Look to see if it's in the register table. */
750 if (reg_number >= 0)
252b5132
RH
751 {
752 expressionP->X_op = O_register;
753 expressionP->X_add_number = reg_number;
754
28e4f854 755 /* Make the rest nice. */
252b5132
RH
756 expressionP->X_add_symbol = NULL;
757 expressionP->X_op_symbol = NULL;
28e4f854 758
b34976b6 759 return TRUE;
252b5132
RH
760 }
761 else
762 {
28e4f854 763 /* Reset the line as if we had not done anything. */
252b5132 764 input_line_pointer = start;
28e4f854 765
b34976b6 766 return FALSE;
252b5132
RH
767 }
768}
769
770/* Summary of system_register_name().
77c6dd37
NC
771
772 in: INPUT_LINE_POINTER points to 1st char of operand.
773 EXPRESSIONP points to an expression structure to be filled in.
774 ACCEPT_NUMBERS is true iff numerical register names may be used.
775 ACCEPT_LIST_NAMES is true iff the special names PS and SR may be
776 accepted.
777
778 out: An expressionS structure in expressionP.
779 The operand may have been a register: in this case, X_op == O_register,
780 X_add_number is set to the register number, and truth is returned.
781 Input_line_pointer->(next non-blank) char after operand, or is in
782 its original state. */
28e4f854 783
b34976b6
AM
784static bfd_boolean system_register_name
785 PARAMS ((expressionS *, bfd_boolean, bfd_boolean));
9e0665bc 786
b34976b6 787static bfd_boolean
252b5132 788system_register_name (expressionP, accept_numbers, accept_list_names)
28e4f854 789 expressionS *expressionP;
b34976b6
AM
790 bfd_boolean accept_numbers;
791 bfd_boolean accept_list_names;
252b5132 792{
28e4f854
KH
793 int reg_number;
794 char *name;
795 char *start;
796 char c;
252b5132 797
28e4f854 798 /* Find the spelling of the operand. */
252b5132
RH
799 start = name = input_line_pointer;
800
801 c = get_symbol_end ();
802 reg_number = reg_name_search (system_registers, SYSREG_NAME_CNT, name,
803 accept_numbers);
804
28e4f854
KH
805 /* Put back the delimiting char. */
806 *input_line_pointer = c;
807
252b5132
RH
808 if (reg_number < 0
809 && accept_numbers)
810 {
28e4f854
KH
811 /* Reset input_line pointer. */
812 input_line_pointer = start;
252b5132 813
3882b010 814 if (ISDIGIT (*input_line_pointer))
252b5132 815 {
28e4f854 816 reg_number = strtol (input_line_pointer, &input_line_pointer, 10);
252b5132 817
28e4f854
KH
818 /* Make sure that the register number is allowable. */
819 if (reg_number < 0
5480ccf3 820 || (reg_number > 5 && reg_number < 16)
77c6dd37 821 || reg_number > 27)
252b5132
RH
822 {
823 reg_number = -1;
824 }
825 }
826 else if (accept_list_names)
827 {
828 c = get_symbol_end ();
829 reg_number = reg_name_search (system_list_registers,
830 SYSREGLIST_NAME_CNT, name, FALSE);
831
28e4f854
KH
832 /* Put back the delimiting char. */
833 *input_line_pointer = c;
252b5132
RH
834 }
835 }
28e4f854
KH
836
837 /* Look to see if it's in the register table. */
838 if (reg_number >= 0)
252b5132
RH
839 {
840 expressionP->X_op = O_register;
841 expressionP->X_add_number = reg_number;
842
28e4f854 843 /* Make the rest nice. */
252b5132
RH
844 expressionP->X_add_symbol = NULL;
845 expressionP->X_op_symbol = NULL;
846
b34976b6 847 return TRUE;
252b5132
RH
848 }
849 else
850 {
28e4f854 851 /* Reset the line as if we had not done anything. */
252b5132 852 input_line_pointer = start;
28e4f854 853
b34976b6 854 return FALSE;
252b5132
RH
855 }
856}
857
858/* Summary of cc_name().
77c6dd37
NC
859
860 in: INPUT_LINE_POINTER points to 1st char of operand.
861
862 out: An expressionS.
863 The operand may have been a register: in this case, X_op == O_register,
864 X_add_number is set to the register number, and truth is returned.
865 Input_line_pointer->(next non-blank) char after operand, or is in
866 its original state. */
28e4f854 867
b34976b6 868static bfd_boolean cc_name PARAMS ((expressionS *));
9e0665bc 869
b34976b6 870static bfd_boolean
252b5132 871cc_name (expressionP)
28e4f854 872 expressionS *expressionP;
252b5132 873{
28e4f854
KH
874 int reg_number;
875 char *name;
876 char *start;
877 char c;
252b5132 878
28e4f854 879 /* Find the spelling of the operand. */
252b5132
RH
880 start = name = input_line_pointer;
881
882 c = get_symbol_end ();
883 reg_number = reg_name_search (cc_names, CC_NAME_CNT, name, FALSE);
884
28e4f854
KH
885 /* Put back the delimiting char. */
886 *input_line_pointer = c;
887
888 /* Look to see if it's in the register table. */
889 if (reg_number >= 0)
252b5132
RH
890 {
891 expressionP->X_op = O_constant;
892 expressionP->X_add_number = reg_number;
893
28e4f854 894 /* Make the rest nice. */
252b5132
RH
895 expressionP->X_add_symbol = NULL;
896 expressionP->X_op_symbol = NULL;
897
b34976b6 898 return TRUE;
252b5132
RH
899 }
900 else
901 {
28e4f854 902 /* Reset the line as if we had not done anything. */
252b5132 903 input_line_pointer = start;
28e4f854 904
b34976b6 905 return FALSE;
252b5132
RH
906 }
907}
908
9e0665bc
AM
909static void skip_white_space PARAMS ((void));
910
252b5132 911static void
9e0665bc 912skip_white_space ()
252b5132 913{
28e4f854
KH
914 while (*input_line_pointer == ' '
915 || *input_line_pointer == '\t')
916 ++input_line_pointer;
252b5132
RH
917}
918
919/* Summary of parse_register_list ().
77c6dd37
NC
920
921 in: INPUT_LINE_POINTER points to 1st char of a list of registers.
922 INSN is the partially constructed instruction.
923 OPERAND is the operand being inserted.
924
925 out: NULL if the parse completed successfully, otherwise a
926 pointer to an error message is returned. If the parse
927 completes the correct bit fields in the instruction
928 will be filled in.
929
930 Parses register lists with the syntax:
931
932 { rX }
933 { rX, rY }
934 { rX - rY }
935 { rX - rY, rZ }
936 etc
937
938 and also parses constant epxressions whoes bits indicate the
939 registers in the lists. The LSB in the expression refers to
940 the lowest numbered permissable register in the register list,
941 and so on upwards. System registers are considered to be very
942 high numbers. */
28e4f854 943
9e0665bc
AM
944static char *parse_register_list
945 PARAMS ((unsigned long *, const struct v850_operand *));
946
252b5132 947static char *
28e4f854
KH
948parse_register_list (insn, operand)
949 unsigned long *insn;
950 const struct v850_operand *operand;
252b5132 951{
28e4f854
KH
952 static int type1_regs[32] = {
953 30, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
954 0, 0, 0, 0, 0, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24
955 };
956 static int type2_regs[32] = {
957 19, 18, 17, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
958 0, 0, 0, 0, 30, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24
959 };
960 static int type3_regs[32] = {
961 3, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
962 0, 0, 0, 0, 14, 15, 13, 12, 7, 6, 5, 4, 11, 10, 9, 8
963 };
964 int *regs;
252b5132
RH
965 expressionS exp;
966
28e4f854 967 /* Select a register array to parse. */
252b5132
RH
968 switch (operand->shift)
969 {
970 case 0xffe00001: regs = type1_regs; break;
971 case 0xfff8000f: regs = type2_regs; break;
972 case 0xfff8001f: regs = type3_regs; break;
973 default:
974 as_bad (_("unknown operand shift: %x\n"), operand->shift);
975 return _("internal failure in parse_register_list");
976 }
977
978 skip_white_space ();
979
980 /* If the expression starts with a curly brace it is a register list.
981 Otherwise it is a constant expression, whoes bits indicate which
982 registers are to be included in the list. */
28e4f854 983 if (*input_line_pointer != '{')
252b5132 984 {
252b5132
RH
985 int reg;
986 int i;
28e4f854
KH
987
988 expression (&exp);
989
252b5132
RH
990 if (exp.X_op != O_constant)
991 return _("constant expression or register list expected");
992
993 if (regs == type1_regs)
994 {
995 if (exp.X_add_number & 0xFFFFF000)
996 return _("high bits set in register list expression");
28e4f854
KH
997
998 for (reg = 20; reg < 32; reg++)
252b5132
RH
999 if (exp.X_add_number & (1 << (reg - 20)))
1000 {
1001 for (i = 0; i < 32; i++)
1002 if (regs[i] == reg)
28e4f854 1003 *insn |= (1 << i);
252b5132
RH
1004 }
1005 }
1006 else if (regs == type2_regs)
1007 {
1008 if (exp.X_add_number & 0xFFFE0000)
1009 return _("high bits set in register list expression");
28e4f854
KH
1010
1011 for (reg = 1; reg < 16; reg++)
252b5132
RH
1012 if (exp.X_add_number & (1 << (reg - 1)))
1013 {
1014 for (i = 0; i < 32; i++)
1015 if (regs[i] == reg)
28e4f854 1016 *insn |= (1 << i);
252b5132
RH
1017 }
1018
1019 if (exp.X_add_number & (1 << 15))
28e4f854
KH
1020 *insn |= (1 << 3);
1021
252b5132 1022 if (exp.X_add_number & (1 << 16))
28e4f854 1023 *insn |= (1 << 19);
252b5132 1024 }
28e4f854 1025 else /* regs == type3_regs */
252b5132
RH
1026 {
1027 if (exp.X_add_number & 0xFFFE0000)
1028 return _("high bits set in register list expression");
28e4f854
KH
1029
1030 for (reg = 16; reg < 32; reg++)
252b5132
RH
1031 if (exp.X_add_number & (1 << (reg - 16)))
1032 {
1033 for (i = 0; i < 32; i++)
1034 if (regs[i] == reg)
28e4f854 1035 *insn |= (1 << i);
252b5132
RH
1036 }
1037
1038 if (exp.X_add_number & (1 << 16))
28e4f854 1039 *insn |= (1 << 19);
252b5132
RH
1040 }
1041
1042 return NULL;
1043 }
1044
28e4f854 1045 input_line_pointer++;
252b5132
RH
1046
1047 /* Parse the register list until a terminator (closing curly brace or
1048 new-line) is found. */
1049 for (;;)
1050 {
28e4f854 1051 if (register_name (&exp))
252b5132 1052 {
28e4f854
KH
1053 int i;
1054
252b5132
RH
1055 /* Locate the given register in the list, and if it is there,
1056 insert the corresponding bit into the instruction. */
1057 for (i = 0; i < 32; i++)
1058 {
28e4f854 1059 if (regs[i] == exp.X_add_number)
252b5132 1060 {
28e4f854 1061 *insn |= (1 << i);
252b5132
RH
1062 break;
1063 }
1064 }
1065
1066 if (i == 32)
77c6dd37 1067 return _("illegal register included in list");
252b5132 1068 }
b34976b6 1069 else if (system_register_name (&exp, TRUE, TRUE))
252b5132
RH
1070 {
1071 if (regs == type1_regs)
1072 {
1073 return _("system registers cannot be included in list");
1074 }
1075 else if (exp.X_add_number == 5)
1076 {
1077 if (regs == type2_regs)
1078 return _("PSW cannot be included in list");
1079 else
28e4f854 1080 *insn |= 0x8;
252b5132
RH
1081 }
1082 else if (exp.X_add_number < 4)
28e4f854 1083 *insn |= 0x80000;
252b5132
RH
1084 else
1085 return _("High value system registers cannot be included in list");
1086 }
28e4f854 1087 else if (*input_line_pointer == '}')
252b5132 1088 {
28e4f854 1089 input_line_pointer++;
252b5132
RH
1090 break;
1091 }
28e4f854 1092 else if (*input_line_pointer == ',')
252b5132 1093 {
28e4f854 1094 input_line_pointer++;
252b5132
RH
1095 continue;
1096 }
28e4f854 1097 else if (*input_line_pointer == '-')
252b5132 1098 {
28e4f854
KH
1099 /* We have encountered a range of registers: rX - rY. */
1100 int j;
252b5132
RH
1101 expressionS exp2;
1102
1103 /* Skip the dash. */
28e4f854 1104 ++input_line_pointer;
252b5132
RH
1105
1106 /* Get the second register in the range. */
28e4f854 1107 if (! register_name (&exp2))
252b5132
RH
1108 {
1109 return _("second register should follow dash in register list");
1110 exp2.X_add_number = exp.X_add_number;
1111 }
1112
1113 /* Add the rest of the registers in the range. */
1114 for (j = exp.X_add_number + 1; j <= exp2.X_add_number; j++)
1115 {
28e4f854
KH
1116 int i;
1117
252b5132
RH
1118 /* Locate the given register in the list, and if it is there,
1119 insert the corresponding bit into the instruction. */
1120 for (i = 0; i < 32; i++)
1121 {
28e4f854 1122 if (regs[i] == j)
252b5132 1123 {
28e4f854 1124 *insn |= (1 << i);
252b5132
RH
1125 break;
1126 }
1127 }
1128
1129 if (i == 32)
1130 return _("illegal register included in list");
1131 }
1132 }
1133 else
77c6dd37 1134 break;
252b5132
RH
1135
1136 skip_white_space ();
1137 }
1138
1139 return NULL;
1140}
1141
5a38dc70 1142const char *md_shortopts = "m:";
252b5132 1143
19d63e5d 1144struct option md_longopts[] = {
252b5132
RH
1145 {NULL, no_argument, NULL, 0}
1146};
252b5132 1147
28e4f854 1148size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH
1149
1150void
1151md_show_usage (stream)
28e4f854 1152 FILE *stream;
252b5132
RH
1153{
1154 fprintf (stream, _(" V850 options:\n"));
1155 fprintf (stream, _(" -mwarn-signed-overflow Warn if signed immediate values overflow\n"));
1156 fprintf (stream, _(" -mwarn-unsigned-overflow Warn if unsigned immediate values overflow\n"));
1157 fprintf (stream, _(" -mv850 The code is targeted at the v850\n"));
1158 fprintf (stream, _(" -mv850e The code is targeted at the v850e\n"));
252b5132 1159 fprintf (stream, _(" -mv850any The code is generic, despite any processor specific instructions\n"));
86aba9db
NC
1160 fprintf (stream, _(" -mrelax Enable relaxation\n"));
1161
252b5132
RH
1162}
1163
1164int
1165md_parse_option (c, arg)
28e4f854
KH
1166 int c;
1167 char *arg;
252b5132
RH
1168{
1169 if (c != 'm')
1170 {
5480ccf3 1171 if (c != 'a')
28e4f854 1172 /* xgettext:c-format */
5480ccf3 1173 fprintf (stderr, _("unknown command line option: -%c%s\n"), c, arg);
252b5132
RH
1174 return 0;
1175 }
1176
1177 if (strcmp (arg, "warn-signed-overflow") == 0)
1178 {
1179 warn_signed_overflows = TRUE;
1180 }
1181 else if (strcmp (arg, "warn-unsigned-overflow") == 0)
1182 {
1183 warn_unsigned_overflows = TRUE;
1184 }
1185 else if (strcmp (arg, "v850") == 0)
1186 {
1187 machine = 0;
1188 processor_mask = PROCESSOR_V850;
1189 }
1190 else if (strcmp (arg, "v850e") == 0)
1191 {
1192 machine = bfd_mach_v850e;
1193 processor_mask = PROCESSOR_V850E;
1194 }
252b5132
RH
1195 else if (strcmp (arg, "v850any") == 0)
1196 {
28e4f854
KH
1197 /* Tell the world that this is for any v850 chip. */
1198 machine = 0;
1199
1200 /* But support instructions for the extended versions. */
86aba9db 1201 processor_mask = PROCESSOR_V850E;
252b5132 1202 }
86aba9db
NC
1203 else if (strcmp (arg, "relax") == 0)
1204 v850_relax = 1;
252b5132
RH
1205 else
1206 {
28e4f854 1207 /* xgettext:c-format */
252b5132
RH
1208 fprintf (stderr, _("unknown command line option: -%c%s\n"), c, arg);
1209 return 0;
1210 }
28e4f854 1211
252b5132
RH
1212 return 1;
1213}
1214
1215symbolS *
1216md_undefined_symbol (name)
28e4f854 1217 char *name ATTRIBUTE_UNUSED;
252b5132
RH
1218{
1219 return 0;
1220}
1221
1222char *
1223md_atof (type, litp, sizep)
28e4f854
KH
1224 int type;
1225 char *litp;
1226 int *sizep;
252b5132 1227{
28e4f854 1228 int prec;
252b5132 1229 LITTLENUM_TYPE words[4];
28e4f854
KH
1230 char *t;
1231 int i;
252b5132
RH
1232
1233 switch (type)
1234 {
1235 case 'f':
1236 prec = 2;
1237 break;
1238
1239 case 'd':
1240 prec = 4;
1241 break;
1242
1243 default:
1244 *sizep = 0;
1245 return _("bad call to md_atof");
1246 }
28e4f854 1247
252b5132
RH
1248 t = atof_ieee (input_line_pointer, type, words);
1249 if (t)
1250 input_line_pointer = t;
1251
1252 *sizep = prec * 2;
1253
1254 for (i = prec - 1; i >= 0; i--)
1255 {
1256 md_number_to_chars (litp, (valueT) words[i], 2);
1257 litp += 2;
1258 }
1259
1260 return NULL;
1261}
1262
252b5132 1263/* Very gross. */
28e4f854 1264
252b5132
RH
1265void
1266md_convert_frag (abfd, sec, fragP)
19d63e5d
KH
1267 bfd *abfd ATTRIBUTE_UNUSED;
1268 asection *sec;
1269 fragS *fragP;
252b5132
RH
1270{
1271 subseg_change (sec, 0);
28e4f854 1272
252b5132
RH
1273 /* In range conditional or unconditional branch. */
1274 if (fragP->fr_subtype == 0 || fragP->fr_subtype == 2)
1275 {
1276 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol,
1277 fragP->fr_offset, 1, BFD_RELOC_UNUSED + (int)fragP->fr_opcode);
252b5132
RH
1278 fragP->fr_fix += 2;
1279 }
1280 /* Out of range conditional branch. Emit a branch around a jump. */
1281 else if (fragP->fr_subtype == 1)
1282 {
28e4f854 1283 unsigned char *buffer =
252b5132
RH
1284 (unsigned char *) (fragP->fr_fix + fragP->fr_literal);
1285
1286 /* Reverse the condition of the first branch. */
1287 buffer[0] ^= 0x08;
1288 /* Mask off all the displacement bits. */
1289 buffer[0] &= 0x8f;
1290 buffer[1] &= 0x07;
1291 /* Now set the displacement bits so that we branch
1292 around the unconditional branch. */
1293 buffer[0] |= 0x30;
1294
1295 /* Now create the unconditional branch + fixup to the final
1296 target. */
1297 md_number_to_chars (buffer + 2, 0x00000780, 4);
1298 fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol,
1299 fragP->fr_offset, 1, BFD_RELOC_UNUSED +
1300 (int) fragP->fr_opcode + 1);
252b5132
RH
1301 fragP->fr_fix += 6;
1302 }
1303 /* Out of range unconditional branch. Emit a jump. */
1304 else if (fragP->fr_subtype == 3)
1305 {
1306 md_number_to_chars (fragP->fr_fix + fragP->fr_literal, 0x00000780, 4);
1307 fix_new (fragP, fragP->fr_fix, 4, fragP->fr_symbol,
1308 fragP->fr_offset, 1, BFD_RELOC_UNUSED +
1309 (int) fragP->fr_opcode + 1);
252b5132
RH
1310 fragP->fr_fix += 4;
1311 }
1312 else
1313 abort ();
1314}
1315
1316valueT
1317md_section_align (seg, addr)
28e4f854
KH
1318 asection *seg;
1319 valueT addr;
252b5132
RH
1320{
1321 int align = bfd_get_section_alignment (stdoutput, seg);
1322 return ((addr + (1 << align) - 1) & (-1 << align));
1323}
1324
1325void
1326md_begin ()
1327{
28e4f854 1328 char *prev_name = "";
86aba9db 1329 const struct v850_opcode *op;
28e4f854 1330
86aba9db 1331 if (strncmp (TARGET_CPU, "v850e", 5) == 0)
252b5132
RH
1332 {
1333 if (machine == -1)
28e4f854
KH
1334 machine = bfd_mach_v850e;
1335
252b5132
RH
1336 if (processor_mask == -1)
1337 processor_mask = PROCESSOR_V850E;
1338 }
28e4f854 1339 else if (strncmp (TARGET_CPU, "v850", 4) == 0)
252b5132
RH
1340 {
1341 if (machine == -1)
28e4f854
KH
1342 machine = 0;
1343
252b5132
RH
1344 if (processor_mask == -1)
1345 processor_mask = PROCESSOR_V850;
1346 }
1347 else
28e4f854
KH
1348 /* xgettext:c-format */
1349 as_bad (_("Unable to determine default target processor from string: %s"),
252b5132
RH
1350 TARGET_CPU);
1351
19d63e5d 1352 v850_hash = hash_new ();
252b5132
RH
1353
1354 /* Insert unique names into hash table. The V850 instruction set
1355 has many identical opcode names that have different opcodes based
1356 on the operands. This hash table then provides a quick index to
1357 the first opcode with a particular name in the opcode table. */
252b5132
RH
1358 op = v850_opcodes;
1359 while (op->name)
1360 {
28e4f854 1361 if (strcmp (prev_name, op->name))
252b5132
RH
1362 {
1363 prev_name = (char *) op->name;
1364 hash_insert (v850_hash, op->name, (char *) op);
1365 }
1366 op++;
1367 }
1368
9e0665bc 1369 v850_seg_table[BSS_SECTION].s = bss_section;
252b5132 1370 bfd_set_arch_mach (stdoutput, TARGET_ARCH, machine);
252b5132
RH
1371}
1372
9e0665bc
AM
1373static bfd_reloc_code_real_type handle_ctoff
1374 PARAMS ((const struct v850_operand *));
1375
252b5132 1376static bfd_reloc_code_real_type
9e0665bc
AM
1377handle_ctoff (operand)
1378 const struct v850_operand *operand;
252b5132
RH
1379{
1380 if (operand == NULL)
1381 return BFD_RELOC_V850_CALLT_16_16_OFFSET;
1382
28e4f854 1383 if (operand->bits != 6
252b5132
RH
1384 || operand->shift != 0)
1385 {
1386 as_bad (_("ctoff() relocation used on an instruction which does not support it"));
1387 return BFD_RELOC_64; /* Used to indicate an error condition. */
1388 }
28e4f854 1389
252b5132
RH
1390 return BFD_RELOC_V850_CALLT_6_7_OFFSET;
1391}
1392
9e0665bc
AM
1393static bfd_reloc_code_real_type handle_sdaoff
1394 PARAMS ((const struct v850_operand *));
1395
252b5132 1396static bfd_reloc_code_real_type
9e0665bc
AM
1397handle_sdaoff (operand)
1398 const struct v850_operand *operand;
252b5132 1399{
28e4f854
KH
1400 if (operand == NULL)
1401 return BFD_RELOC_V850_SDA_16_16_OFFSET;
1402
1403 if (operand->bits == 15 && operand->shift == 17)
1404 return BFD_RELOC_V850_SDA_15_16_OFFSET;
1405
1406 if (operand->bits == -1)
1407 return BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET;
1408
1409 if (operand->bits != 16
252b5132
RH
1410 || operand->shift != 16)
1411 {
1412 as_bad (_("sdaoff() relocation used on an instruction which does not support it"));
1413 return BFD_RELOC_64; /* Used to indicate an error condition. */
1414 }
28e4f854 1415
252b5132
RH
1416 return BFD_RELOC_V850_SDA_16_16_OFFSET;
1417}
1418
9e0665bc
AM
1419static bfd_reloc_code_real_type handle_zdaoff
1420 PARAMS ((const struct v850_operand *));
1421
252b5132 1422static bfd_reloc_code_real_type
9e0665bc
AM
1423handle_zdaoff (operand)
1424 const struct v850_operand *operand;
252b5132 1425{
28e4f854
KH
1426 if (operand == NULL)
1427 return BFD_RELOC_V850_ZDA_16_16_OFFSET;
1428
1429 if (operand->bits == 15 && operand->shift == 17)
1430 return BFD_RELOC_V850_ZDA_15_16_OFFSET;
252b5132 1431
28e4f854
KH
1432 if (operand->bits == -1)
1433 return BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET;
1434
1435 if (operand->bits != 16
252b5132
RH
1436 || operand->shift != 16)
1437 {
1438 as_bad (_("zdaoff() relocation used on an instruction which does not support it"));
28e4f854
KH
1439 /* Used to indicate an error condition. */
1440 return BFD_RELOC_64;
252b5132 1441 }
28e4f854 1442
252b5132
RH
1443 return BFD_RELOC_V850_ZDA_16_16_OFFSET;
1444}
1445
9e0665bc
AM
1446static bfd_reloc_code_real_type handle_tdaoff
1447 PARAMS ((const struct v850_operand *));
1448
252b5132 1449static bfd_reloc_code_real_type
9e0665bc
AM
1450handle_tdaoff (operand)
1451 const struct v850_operand *operand;
252b5132 1452{
28e4f854
KH
1453 if (operand == NULL)
1454 /* Data item, not an instruction. */
1455 return BFD_RELOC_V850_TDA_7_7_OFFSET;
1456
1457 if (operand->bits == 6 && operand->shift == 1)
1458 /* sld.w/sst.w, operand: D8_6 */
1459 return BFD_RELOC_V850_TDA_6_8_OFFSET;
1460
1461 if (operand->bits == 4 && operand->insert != NULL)
1462 /* sld.hu, operand: D5-4 */
1463 return BFD_RELOC_V850_TDA_4_5_OFFSET;
1464
1465 if (operand->bits == 4 && operand->insert == NULL)
1466 /* sld.bu, operand: D4 */
1467 return BFD_RELOC_V850_TDA_4_4_OFFSET;
1468
1469 if (operand->bits == 16 && operand->shift == 16)
1470 /* set1 & chums, operands: D16 */
1471 return BFD_RELOC_V850_TDA_16_16_OFFSET;
1472
252b5132
RH
1473 if (operand->bits != 7)
1474 {
1475 as_bad (_("tdaoff() relocation used on an instruction which does not support it"));
28e4f854
KH
1476 /* Used to indicate an error condition. */
1477 return BFD_RELOC_64;
252b5132 1478 }
28e4f854 1479
252b5132 1480 return operand->insert != NULL
28e4f854
KH
1481 ? BFD_RELOC_V850_TDA_7_8_OFFSET /* sld.h/sst.h, operand: D8_7 */
1482 : BFD_RELOC_V850_TDA_7_7_OFFSET; /* sld.b/sst.b, opreand: D7 */
252b5132
RH
1483}
1484
1485/* Warning: The code in this function relies upon the definitions
1486 in the v850_operands[] array (defined in opcodes/v850-opc.c)
1487 matching the hard coded values contained herein. */
1488
9e0665bc
AM
1489static bfd_reloc_code_real_type v850_reloc_prefix
1490 PARAMS ((const struct v850_operand *));
1491
252b5132 1492static bfd_reloc_code_real_type
9e0665bc
AM
1493v850_reloc_prefix (operand)
1494 const struct v850_operand *operand;
252b5132 1495{
b34976b6 1496 bfd_boolean paren_skipped = FALSE;
252b5132 1497
252b5132 1498 /* Skip leading opening parenthesis. */
28e4f854 1499 if (*input_line_pointer == '(')
252b5132 1500 {
28e4f854 1501 ++input_line_pointer;
b34976b6 1502 paren_skipped = TRUE;
252b5132
RH
1503 }
1504
1505#define CHECK_(name, reloc) \
ec266e19 1506 if (strncmp (input_line_pointer, name "(", strlen (name) + 1) == 0) \
252b5132
RH
1507 { \
1508 input_line_pointer += strlen (name); \
1509 return reloc; \
1510 }
28e4f854
KH
1511
1512 CHECK_ ("hi0", BFD_RELOC_HI16 );
1513 CHECK_ ("hi", BFD_RELOC_HI16_S );
1514 CHECK_ ("lo", BFD_RELOC_LO16 );
252b5132
RH
1515 CHECK_ ("sdaoff", handle_sdaoff (operand));
1516 CHECK_ ("zdaoff", handle_zdaoff (operand));
1517 CHECK_ ("tdaoff", handle_tdaoff (operand));
28e4f854
KH
1518 CHECK_ ("hilo", BFD_RELOC_32 );
1519 CHECK_ ("ctoff", handle_ctoff (operand) );
1520
252b5132
RH
1521 /* Restore skipped parenthesis. */
1522 if (paren_skipped)
28e4f854
KH
1523 --input_line_pointer;
1524
252b5132
RH
1525 return BFD_RELOC_UNUSED;
1526}
1527
1528/* Insert an operand value into an instruction. */
1529
9e0665bc
AM
1530static unsigned long v850_insert_operand
1531 PARAMS ((unsigned long, const struct v850_operand *, offsetT, char *,
1532 unsigned int, char *));
1533
252b5132
RH
1534static unsigned long
1535v850_insert_operand (insn, operand, val, file, line, str)
28e4f854
KH
1536 unsigned long insn;
1537 const struct v850_operand *operand;
1538 offsetT val;
1539 char *file;
1540 unsigned int line;
1541 char *str;
252b5132
RH
1542{
1543 if (operand->insert)
1544 {
28e4f854
KH
1545 const char *message = NULL;
1546
1547 insn = operand->insert (insn, val, &message);
252b5132
RH
1548 if (message != NULL)
1549 {
1550 if ((operand->flags & V850_OPERAND_SIGNED)
1551 && ! warn_signed_overflows
1552 && strstr (message, "out of range") != NULL)
1553 {
28e4f854 1554 /* Skip warning... */
252b5132
RH
1555 }
1556 else if ((operand->flags & V850_OPERAND_SIGNED) == 0
1557 && ! warn_unsigned_overflows
1558 && strstr (message, "out of range") != NULL)
1559 {
28e4f854 1560 /* Skip warning... */
252b5132
RH
1561 }
1562 else if (str)
1563 {
1564 if (file == (char *) NULL)
1565 as_warn ("%s: %s", str, message);
1566 else
1567 as_warn_where (file, line, "%s: %s", str, message);
1568 }
1569 else
1570 {
1571 if (file == (char *) NULL)
1572 as_warn (message);
1573 else
1574 as_warn_where (file, line, message);
1575 }
1576 }
1577 }
1578 else
1579 {
1580 if (operand->bits != 32)
1581 {
28e4f854 1582 long min, max;
252b5132
RH
1583
1584 if ((operand->flags & V850_OPERAND_SIGNED) != 0)
1585 {
1586 if (! warn_signed_overflows)
1587 max = (1 << operand->bits) - 1;
1588 else
1589 max = (1 << (operand->bits - 1)) - 1;
28e4f854
KH
1590
1591 min = -(1 << (operand->bits - 1));
252b5132
RH
1592 }
1593 else
1594 {
1595 max = (1 << operand->bits) - 1;
28e4f854 1596
252b5132 1597 if (! warn_unsigned_overflows)
28e4f854 1598 min = -(1 << (operand->bits - 1));
252b5132
RH
1599 else
1600 min = 0;
1601 }
28e4f854 1602
252b5132
RH
1603 if (val < (offsetT) min || val > (offsetT) max)
1604 {
28e4f854
KH
1605 /* xgettext:c-format */
1606 const char *err =
1607 _("operand out of range (%s not between %ld and %ld)");
1608 char buf[100];
1609
252b5132
RH
1610 /* Restore min and mix to expected values for decimal ranges. */
1611 if ((operand->flags & V850_OPERAND_SIGNED)
1612 && ! warn_signed_overflows)
1613 max = (1 << (operand->bits - 1)) - 1;
1614
1615 if (! (operand->flags & V850_OPERAND_SIGNED)
1616 && ! warn_unsigned_overflows)
1617 min = 0;
1618
1619 if (str)
1620 {
1621 sprintf (buf, "%s: ", str);
28e4f854 1622
252b5132
RH
1623 sprint_value (buf + strlen (buf), val);
1624 }
1625 else
1626 sprint_value (buf, val);
28e4f854 1627
252b5132
RH
1628 if (file == (char *) NULL)
1629 as_warn (err, buf, min, max);
1630 else
1631 as_warn_where (file, line, err, buf, min, max);
1632 }
1633 }
1634
1635 insn |= (((long) val & ((1 << operand->bits) - 1)) << operand->shift);
1636 }
28e4f854 1637
252b5132
RH
1638 return insn;
1639}
252b5132 1640\f
28e4f854 1641static char copy_of_instruction[128];
252b5132
RH
1642
1643void
28e4f854
KH
1644md_assemble (str)
1645 char *str;
252b5132 1646{
28e4f854
KH
1647 char *s;
1648 char *start_of_operands;
1649 struct v850_opcode *opcode;
1650 struct v850_opcode *next_opcode;
1651 const unsigned char *opindex_ptr;
1652 int next_opindex;
1653 int relaxable = 0;
1654 unsigned long insn;
1655 unsigned long insn_size;
1656 char *f;
1657 int i;
1658 int match;
b34976b6 1659 bfd_boolean extra_data_after_insn = FALSE;
28e4f854
KH
1660 unsigned extra_data_len = 0;
1661 unsigned long extra_data = 0;
1662 char *saved_input_line_pointer;
1663
252b5132 1664 strncpy (copy_of_instruction, str, sizeof (copy_of_instruction) - 1);
28e4f854 1665
252b5132 1666 /* Get the opcode. */
3882b010 1667 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132 1668 continue;
28e4f854 1669
252b5132
RH
1670 if (*s != '\0')
1671 *s++ = '\0';
1672
28e4f854 1673 /* Find the first opcode with the proper name. */
252b5132
RH
1674 opcode = (struct v850_opcode *) hash_find (v850_hash, str);
1675 if (opcode == NULL)
1676 {
28e4f854 1677 /* xgettext:c-format */
252b5132
RH
1678 as_bad (_("Unrecognized opcode: `%s'"), str);
1679 ignore_rest_of_line ();
1680 return;
1681 }
1682
1683 str = s;
3882b010 1684 while (ISSPACE (*str))
28e4f854 1685 ++str;
252b5132
RH
1686
1687 start_of_operands = str;
1688
1689 saved_input_line_pointer = input_line_pointer;
28e4f854 1690
252b5132
RH
1691 for (;;)
1692 {
28e4f854 1693 const char *errmsg = NULL;
252b5132
RH
1694
1695 match = 0;
28e4f854 1696
252b5132
RH
1697 if ((opcode->processors & processor_mask) == 0)
1698 {
1699 errmsg = _("Target processor does not support this instruction.");
1700 goto error;
1701 }
28e4f854 1702
252b5132
RH
1703 relaxable = 0;
1704 fc = 0;
1705 next_opindex = 0;
1706 insn = opcode->opcode;
b34976b6 1707 extra_data_after_insn = FALSE;
252b5132
RH
1708
1709 input_line_pointer = str = start_of_operands;
1710
28e4f854 1711 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
252b5132 1712 {
28e4f854
KH
1713 const struct v850_operand *operand;
1714 char *hold;
1715 expressionS ex;
1716 bfd_reloc_code_real_type reloc;
252b5132
RH
1717
1718 if (next_opindex == 0)
1719 {
28e4f854 1720 operand = &v850_operands[*opindex_ptr];
252b5132
RH
1721 }
1722 else
1723 {
28e4f854 1724 operand = &v850_operands[next_opindex];
252b5132
RH
1725 next_opindex = 0;
1726 }
1727
1728 errmsg = NULL;
1729
1730 while (*str == ' ' || *str == ',' || *str == '[' || *str == ']')
28e4f854 1731 ++str;
252b5132
RH
1732
1733 if (operand->flags & V850_OPERAND_RELAX)
1734 relaxable = 1;
1735
28e4f854 1736 /* Gather the operand. */
252b5132
RH
1737 hold = input_line_pointer;
1738 input_line_pointer = str;
28e4f854
KH
1739
1740 /* lo(), hi(), hi0(), etc... */
252b5132
RH
1741 if ((reloc = v850_reloc_prefix (operand)) != BFD_RELOC_UNUSED)
1742 {
1743 /* This is a fake reloc, used to indicate an error condition. */
1744 if (reloc == BFD_RELOC_64)
1745 {
1746 match = 1;
1747 goto error;
1748 }
28e4f854
KH
1749
1750 expression (&ex);
252b5132
RH
1751
1752 if (ex.X_op == O_constant)
1753 {
1754 switch (reloc)
1755 {
1756 case BFD_RELOC_V850_ZDA_16_16_OFFSET:
1757 /* To cope with "not1 7, zdaoff(0xfffff006)[r0]"
1758 and the like. */
1759 /* Fall through. */
28e4f854 1760
252b5132
RH
1761 case BFD_RELOC_LO16:
1762 {
1763 /* Truncate, then sign extend the value. */
1764 ex.X_add_number = SEXT16 (ex.X_add_number);
1765 break;
1766 }
1767
1768 case BFD_RELOC_HI16:
1769 {
1770 /* Truncate, then sign extend the value. */
1771 ex.X_add_number = SEXT16 (ex.X_add_number >> 16);
1772 break;
1773 }
1774
1775 case BFD_RELOC_HI16_S:
1776 {
1777 /* Truncate, then sign extend the value. */
28e4f854 1778 int temp = (ex.X_add_number >> 16) & 0xffff;
252b5132
RH
1779
1780 temp += (ex.X_add_number >> 15) & 1;
1781
1782 ex.X_add_number = SEXT16 (temp);
1783 break;
1784 }
28e4f854 1785
252b5132
RH
1786 case BFD_RELOC_32:
1787 if ((operand->flags & V850E_IMMEDIATE32) == 0)
1788 {
1789 errmsg = _("immediate operand is too large");
1790 goto error;
1791 }
28e4f854 1792
b34976b6 1793 extra_data_after_insn = TRUE;
252b5132 1794 extra_data_len = 4;
86aba9db 1795 extra_data = 0;
252b5132 1796 break;
28e4f854 1797
252b5132
RH
1798 default:
1799 fprintf (stderr, "reloc: %d\n", reloc);
1800 as_bad (_("AAARG -> unhandled constant reloc"));
1801 break;
1802 }
1803
1804 if (fc > MAX_INSN_FIXUPS)
1805 as_fatal (_("too many fixups"));
28e4f854
KH
1806
1807 fixups[fc].exp = ex;
1808 fixups[fc].opindex = *opindex_ptr;
1809 fixups[fc].reloc = reloc;
252b5132
RH
1810 fc++;
1811 }
1812 else
1813 {
1814 if (reloc == BFD_RELOC_32)
1815 {
1816 if ((operand->flags & V850E_IMMEDIATE32) == 0)
1817 {
1818 errmsg = _("immediate operand is too large");
1819 goto error;
1820 }
28e4f854 1821
b34976b6 1822 extra_data_after_insn = TRUE;
252b5132
RH
1823 extra_data_len = 4;
1824 extra_data = ex.X_add_number;
1825 }
28e4f854 1826
252b5132
RH
1827 if (fc > MAX_INSN_FIXUPS)
1828 as_fatal (_("too many fixups"));
1829
28e4f854
KH
1830 fixups[fc].exp = ex;
1831 fixups[fc].opindex = *opindex_ptr;
1832 fixups[fc].reloc = reloc;
252b5132
RH
1833 fc++;
1834 }
1835 }
1836 else
1837 {
1838 errmsg = NULL;
28e4f854
KH
1839
1840 if ((operand->flags & V850_OPERAND_REG) != 0)
252b5132 1841 {
28e4f854 1842 if (!register_name (&ex))
252b5132
RH
1843 {
1844 errmsg = _("invalid register name");
1845 }
1846 else if ((operand->flags & V850_NOT_R0)
28e4f854 1847 && ex.X_add_number == 0)
252b5132
RH
1848 {
1849 errmsg = _("register r0 cannot be used here");
28e4f854 1850
252b5132
RH
1851 /* Force an error message to be generated by
1852 skipping over any following potential matches
1853 for this opcode. */
1854 opcode += 3;
1855 }
1856 }
28e4f854 1857 else if ((operand->flags & V850_OPERAND_SRG) != 0)
252b5132 1858 {
b34976b6 1859 if (!system_register_name (&ex, TRUE, FALSE))
252b5132
RH
1860 {
1861 errmsg = _("invalid system register name");
1862 }
1863 }
1864 else if ((operand->flags & V850_OPERAND_EP) != 0)
1865 {
28e4f854
KH
1866 char *start = input_line_pointer;
1867 char c = get_symbol_end ();
1868
252b5132
RH
1869 if (strcmp (start, "ep") != 0 && strcmp (start, "r30") != 0)
1870 {
1871 /* Put things back the way we found them. */
1872 *input_line_pointer = c;
1873 input_line_pointer = start;
1874 errmsg = _("expected EP register");
1875 goto error;
1876 }
28e4f854 1877
252b5132
RH
1878 *input_line_pointer = c;
1879 str = input_line_pointer;
1880 input_line_pointer = hold;
28e4f854
KH
1881
1882 while (*str == ' ' || *str == ','
1883 || *str == '[' || *str == ']')
1884 ++str;
252b5132
RH
1885 continue;
1886 }
28e4f854 1887 else if ((operand->flags & V850_OPERAND_CC) != 0)
252b5132 1888 {
28e4f854 1889 if (!cc_name (&ex))
252b5132
RH
1890 {
1891 errmsg = _("invalid condition code name");
1892 }
1893 }
28e4f854 1894 else if (operand->flags & V850E_PUSH_POP)
252b5132 1895 {
28e4f854
KH
1896 errmsg = parse_register_list (&insn, operand);
1897
252b5132
RH
1898 /* The parse_register_list() function has already done
1899 everything, so fake a dummy expression. */
1900 ex.X_op = O_constant;
1901 ex.X_add_number = 0;
1902 }
28e4f854 1903 else if (operand->flags & V850E_IMMEDIATE16)
252b5132 1904 {
28e4f854 1905 expression (&ex);
252b5132
RH
1906
1907 if (ex.X_op != O_constant)
1908 errmsg = _("constant expression expected");
1909 else if (ex.X_add_number & 0xffff0000)
1910 {
1911 if (ex.X_add_number & 0xffff)
1912 errmsg = _("constant too big to fit into instruction");
1913 else if ((insn & 0x001fffc0) == 0x00130780)
1914 ex.X_add_number >>= 16;
1915 else
1916 errmsg = _("constant too big to fit into instruction");
1917 }
28e4f854 1918
b34976b6 1919 extra_data_after_insn = TRUE;
252b5132
RH
1920 extra_data_len = 2;
1921 extra_data = ex.X_add_number;
1922 ex.X_add_number = 0;
1923 }
28e4f854 1924 else if (operand->flags & V850E_IMMEDIATE32)
252b5132 1925 {
28e4f854
KH
1926 expression (&ex);
1927
252b5132
RH
1928 if (ex.X_op != O_constant)
1929 errmsg = _("constant expression expected");
28e4f854 1930
b34976b6 1931 extra_data_after_insn = TRUE;
252b5132
RH
1932 extra_data_len = 4;
1933 extra_data = ex.X_add_number;
1934 ex.X_add_number = 0;
1935 }
28e4f854 1936 else if (register_name (&ex)
252b5132
RH
1937 && (operand->flags & V850_OPERAND_REG) == 0)
1938 {
1939 char c;
28e4f854
KH
1940 int exists = 0;
1941
252b5132
RH
1942 /* It is possible that an alias has been defined that
1943 matches a register name. For example the code may
1944 include a ".set ZERO, 0" directive, which matches
1945 the register name "zero". Attempt to reparse the
1946 field as an expression, and only complain if we
1947 cannot generate a constant. */
1948
1949 input_line_pointer = str;
1950
1951 c = get_symbol_end ();
28e4f854 1952
252b5132
RH
1953 if (symbol_find (str) != NULL)
1954 exists = 1;
28e4f854
KH
1955
1956 *input_line_pointer = c;
252b5132 1957 input_line_pointer = str;
28e4f854
KH
1958
1959 expression (&ex);
252b5132
RH
1960
1961 if (ex.X_op != O_constant)
1962 {
1963 /* If this register is actually occuring too early on
1964 the parsing of the instruction, (because another
1965 field is missing) then report this. */
1966 if (opindex_ptr[1] != 0
28e4f854
KH
1967 && (v850_operands[opindex_ptr[1]].flags
1968 & V850_OPERAND_REG))
252b5132
RH
1969 errmsg = _("syntax error: value is missing before the register name");
1970 else
1971 errmsg = _("syntax error: register not expected");
1972
28e4f854
KH
1973 /* If we created a symbol in the process of this
1974 test then delete it now, so that it will not
1975 be output with the real symbols... */
252b5132
RH
1976 if (exists == 0
1977 && ex.X_op == O_symbol)
1978 symbol_remove (ex.X_add_symbol,
28e4f854 1979 &symbol_rootP, &symbol_lastP);
252b5132
RH
1980 }
1981 }
b34976b6 1982 else if (system_register_name (&ex, FALSE, FALSE)
252b5132
RH
1983 && (operand->flags & V850_OPERAND_SRG) == 0)
1984 {
1985 errmsg = _("syntax error: system register not expected");
1986 }
1987 else if (cc_name (&ex)
1988 && (operand->flags & V850_OPERAND_CC) == 0)
1989 {
1990 errmsg = _("syntax error: condition code not expected");
1991 }
1992 else
1993 {
28e4f854 1994 expression (&ex);
252b5132 1995 /* Special case:
50b15da2
NC
1996 If we are assembling a MOV instruction and the immediate
1997 value does not fit into the bits available then create a
1998 fake error so that the next MOV instruction will be
1999 selected. This one has a 32 bit immediate field. */
252b5132
RH
2000
2001 if (((insn & 0x07e0) == 0x0200)
50b15da2 2002 && operand->bits == 5 /* Do not match the CALLT instruction. */
252b5132 2003 && ex.X_op == O_constant
28e4f854 2004 && (ex.X_add_number < (-(1 << (operand->bits - 1)))
03223580 2005 || ex.X_add_number > ((1 << (operand->bits - 1)) - 1)))
252b5132
RH
2006 errmsg = _("immediate operand is too large");
2007 }
2008
2009 if (errmsg)
2010 goto error;
252b5132 2011
28e4f854
KH
2012#if 0
2013 fprintf (stderr,
2014 " insn: %x, operand %d, op: %d, add_number: %d\n",
2015 insn, opindex_ptr - opcode->operands,
2016 ex.X_op, ex.X_add_number);
2017#endif
2018
2019 switch (ex.X_op)
252b5132
RH
2020 {
2021 case O_illegal:
2022 errmsg = _("illegal operand");
2023 goto error;
2024 case O_absent:
2025 errmsg = _("missing operand");
2026 goto error;
2027 case O_register:
28e4f854
KH
2028 if ((operand->flags
2029 & (V850_OPERAND_REG | V850_OPERAND_SRG)) == 0)
252b5132
RH
2030 {
2031 errmsg = _("invalid operand");
2032 goto error;
2033 }
2034 insn = v850_insert_operand (insn, operand, ex.X_add_number,
2035 (char *) NULL, 0,
2036 copy_of_instruction);
2037 break;
2038
2039 case O_constant:
2040 insn = v850_insert_operand (insn, operand, ex.X_add_number,
2041 (char *) NULL, 0,
2042 copy_of_instruction);
2043 break;
2044
2045 default:
2046 /* We need to generate a fixup for this expression. */
2047 if (fc >= MAX_INSN_FIXUPS)
2048 as_fatal (_("too many fixups"));
2049
28e4f854
KH
2050 fixups[fc].exp = ex;
2051 fixups[fc].opindex = *opindex_ptr;
2052 fixups[fc].reloc = BFD_RELOC_UNUSED;
252b5132
RH
2053 ++fc;
2054 break;
2055 }
2056 }
2057
2058 str = input_line_pointer;
2059 input_line_pointer = hold;
2060
2061 while (*str == ' ' || *str == ',' || *str == '[' || *str == ']'
2062 || *str == ')')
2063 ++str;
2064 }
2065 match = 1;
2066
2067 error:
2068 if (match == 0)
28e4f854 2069 {
252b5132
RH
2070 next_opcode = opcode + 1;
2071 if (next_opcode->name != NULL
2072 && strcmp (next_opcode->name, opcode->name) == 0)
2073 {
2074 opcode = next_opcode;
2075
2076 /* Skip versions that are not supported by the target
2077 processor. */
2078 if ((opcode->processors & processor_mask) == 0)
2079 goto error;
28e4f854 2080
252b5132
RH
2081 continue;
2082 }
28e4f854 2083
252b5132 2084 as_bad ("%s: %s", copy_of_instruction, errmsg);
28e4f854
KH
2085
2086 if (*input_line_pointer == ']')
2087 ++input_line_pointer;
2088
252b5132
RH
2089 ignore_rest_of_line ();
2090 input_line_pointer = saved_input_line_pointer;
2091 return;
28e4f854 2092 }
252b5132
RH
2093 break;
2094 }
28e4f854 2095
3882b010 2096 while (ISSPACE (*str))
252b5132
RH
2097 ++str;
2098
2099 if (*str != '\0')
28e4f854 2100 /* xgettext:c-format */
252b5132
RH
2101 as_bad (_("junk at end of line: `%s'"), str);
2102
2103 input_line_pointer = str;
2104
9fcc94b6
AM
2105 /* Tie dwarf2 debug info to the address at the start of the insn.
2106 We can't do this after the insn has been output as the current
2107 frag may have been closed off. eg. by frag_var. */
2108 dwarf2_emit_insn (0);
2109
28e4f854
KH
2110 /* Write out the instruction. */
2111
252b5132
RH
2112 if (relaxable && fc > 0)
2113 {
2114 insn_size = 2;
2115 fc = 0;
2116
2117 if (!strcmp (opcode->name, "br"))
2118 {
2119 f = frag_var (rs_machine_dependent, 4, 2, 2,
2120 fixups[0].exp.X_add_symbol,
2121 fixups[0].exp.X_add_number,
28e4f854 2122 (char *) fixups[0].opindex);
252b5132
RH
2123 md_number_to_chars (f, insn, insn_size);
2124 md_number_to_chars (f + 2, 0, 2);
2125 }
2126 else
2127 {
2128 f = frag_var (rs_machine_dependent, 6, 4, 0,
2129 fixups[0].exp.X_add_symbol,
2130 fixups[0].exp.X_add_number,
28e4f854 2131 (char *) fixups[0].opindex);
252b5132
RH
2132 md_number_to_chars (f, insn, insn_size);
2133 md_number_to_chars (f + 2, 0, 4);
2134 }
2135 }
28e4f854 2136 else
252b5132
RH
2137 {
2138 /* Four byte insns have an opcode with the two high bits on. */
2139 if ((insn & 0x0600) == 0x0600)
2140 insn_size = 4;
2141 else
2142 insn_size = 2;
2143
28e4f854 2144 /* Special case: 32 bit MOV. */
252b5132
RH
2145 if ((insn & 0xffe0) == 0x0620)
2146 insn_size = 2;
28e4f854 2147
252b5132 2148 f = frag_more (insn_size);
252b5132
RH
2149 md_number_to_chars (f, insn, insn_size);
2150
2151 if (extra_data_after_insn)
2152 {
2153 f = frag_more (extra_data_len);
252b5132
RH
2154 md_number_to_chars (f, extra_data, extra_data_len);
2155
b34976b6 2156 extra_data_after_insn = FALSE;
252b5132
RH
2157 }
2158 }
2159
2160 /* Create any fixups. At this point we do not use a
2161 bfd_reloc_code_real_type, but instead just use the
2162 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2163 handle fixups for any operand type, although that is admittedly
2164 not a very exciting feature. We pick a BFD reloc type in
94f592af 2165 md_apply_fix3. */
252b5132
RH
2166 for (i = 0; i < fc; i++)
2167 {
28e4f854
KH
2168 const struct v850_operand *operand;
2169 bfd_reloc_code_real_type reloc;
2170
2171 operand = &v850_operands[fixups[i].opindex];
252b5132
RH
2172
2173 reloc = fixups[i].reloc;
28e4f854 2174
252b5132
RH
2175 if (reloc != BFD_RELOC_UNUSED)
2176 {
28e4f854
KH
2177 reloc_howto_type *reloc_howto =
2178 bfd_reloc_type_lookup (stdoutput, reloc);
2179 int size;
2180 int address;
2181 fixS *fixP;
252b5132
RH
2182
2183 if (!reloc_howto)
28e4f854
KH
2184 abort ();
2185
252b5132
RH
2186 size = bfd_get_reloc_size (reloc_howto);
2187
2188 /* XXX This will abort on an R_V850_8 reloc -
28e4f854
KH
2189 is this reloc actually used? */
2190 if (size != 2 && size != 4)
252b5132
RH
2191 abort ();
2192
2193 address = (f - frag_now->fr_literal) + insn_size - size;
2194
2195 if (reloc == BFD_RELOC_32)
28e4f854
KH
2196 address += 2;
2197
252b5132 2198 fixP = fix_new_exp (frag_now, address, size,
28e4f854 2199 &fixups[i].exp,
252b5132
RH
2200 reloc_howto->pc_relative,
2201 reloc);
2202
2203 switch (reloc)
2204 {
2205 case BFD_RELOC_LO16:
2206 case BFD_RELOC_HI16:
2207 case BFD_RELOC_HI16_S:
2208 fixP->fx_no_overflow = 1;
2209 break;
5480ccf3
NC
2210 default:
2211 break;
252b5132
RH
2212 }
2213 }
2214 else
2215 {
28e4f854 2216 fix_new_exp (frag_now,
252b5132
RH
2217 f - frag_now->fr_literal, 4,
2218 & fixups[i].exp,
28e4f854 2219 1 /* FIXME: V850_OPERAND_RELATIVE ??? */,
252b5132 2220 (bfd_reloc_code_real_type) (fixups[i].opindex
28e4f854 2221 + (int) BFD_RELOC_UNUSED));
252b5132
RH
2222 }
2223 }
2224
2225 input_line_pointer = saved_input_line_pointer;
2226}
2227
28e4f854
KH
2228/* If while processing a fixup, a reloc really needs to be created
2229 then it is done here. */
252b5132 2230
252b5132
RH
2231arelent *
2232tc_gen_reloc (seg, fixp)
28e4f854
KH
2233 asection *seg ATTRIBUTE_UNUSED;
2234 fixS *fixp;
252b5132 2235{
28e4f854
KH
2236 arelent *reloc;
2237
2238 reloc = (arelent *) xmalloc (sizeof (arelent));
2239 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
2240 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
2241 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
e30ddb24
NC
2242
2243 if ( fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY
2244 || fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
2245 || fixp->fx_r_type == BFD_RELOC_V850_LONGCALL
2246 || fixp->fx_r_type == BFD_RELOC_V850_LONGJUMP
2247 || fixp->fx_r_type == BFD_RELOC_V850_ALIGN)
2248 reloc->addend = fixp->fx_offset;
2249 else
2250 {
2251 if (fixp->fx_r_type == BFD_RELOC_32
2252 && fixp->fx_pcrel)
2253 fixp->fx_r_type = BFD_RELOC_32_PCREL;
2254
2255 reloc->addend = fixp->fx_addnumber;
2256 }
2257
28e4f854 2258 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
252b5132
RH
2259
2260 if (reloc->howto == (reloc_howto_type *) NULL)
2261 {
2262 as_bad_where (fixp->fx_file, fixp->fx_line,
28e4f854
KH
2263 /* xgettext:c-format */
2264 _("reloc %d not supported by object file format"),
252b5132
RH
2265 (int) fixp->fx_r_type);
2266
2267 xfree (reloc);
28e4f854 2268
252b5132
RH
2269 return NULL;
2270 }
28e4f854 2271
252b5132
RH
2272 return reloc;
2273}
2274
86aba9db
NC
2275void
2276v850_handle_align (frag)
2277 fragS * frag;
2278{
2279 if (v850_relax
2280 && frag->fr_type == rs_align
2281 && frag->fr_address + frag->fr_fix > 0
2282 && frag->fr_offset > 1
2283 && now_seg != bss_section
2284 && now_seg != v850_seg_table[SBSS_SECTION].s
2285 && now_seg != v850_seg_table[TBSS_SECTION].s
2286 && now_seg != v850_seg_table[ZBSS_SECTION].s)
2287 fix_new (frag, frag->fr_fix, 2, & abs_symbol, frag->fr_offset, 0,
2288 BFD_RELOC_V850_ALIGN);
2289}
2290
606ab118 2291/* Return current size of variable part of frag. */
28e4f854 2292
252b5132
RH
2293int
2294md_estimate_size_before_relax (fragp, seg)
28e4f854
KH
2295 fragS *fragp;
2296 asection *seg ATTRIBUTE_UNUSED;
252b5132 2297{
606ab118 2298 if (fragp->fr_subtype >= sizeof (md_relax_table) / sizeof (md_relax_table[0]))
252b5132 2299 abort ();
606ab118
AM
2300
2301 return md_relax_table[fragp->fr_subtype].rlx_length;
28e4f854 2302}
252b5132
RH
2303
2304long
2305v850_pcrel_from_section (fixp, section)
28e4f854
KH
2306 fixS *fixp;
2307 segT section;
252b5132
RH
2308{
2309 /* If the symbol is undefined, or in a section other than our own,
d6c497c7 2310 or it is weak (in which case it may well be in another section,
252b5132
RH
2311 then let the linker figure it out. */
2312 if (fixp->fx_addsy != (symbolS *) NULL
2313 && (! S_IS_DEFINED (fixp->fx_addsy)
d6c497c7 2314 || S_IS_WEAK (fixp->fx_addsy)
252b5132 2315 || (S_GET_SEGMENT (fixp->fx_addsy) != section)))
d6c497c7 2316 return 0;
28e4f854 2317
252b5132
RH
2318 return fixp->fx_frag->fr_address + fixp->fx_where;
2319}
2320
94f592af
NC
2321void
2322md_apply_fix3 (fixP, valueP, seg)
2323 fixS *fixP;
2324 valueT *valueP;
28e4f854 2325 segT seg ATTRIBUTE_UNUSED;
252b5132 2326{
94f592af 2327 valueT value = * valueP;
28e4f854 2328 char *where;
252b5132 2329
94f592af 2330 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
86aba9db
NC
2331 || fixP->fx_r_type == BFD_RELOC_V850_LONGCALL
2332 || fixP->fx_r_type == BFD_RELOC_V850_LONGJUMP
94f592af 2333 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
252b5132 2334 {
94f592af
NC
2335 fixP->fx_done = 0;
2336 return;
252b5132
RH
2337 }
2338
94f592af 2339 if (fixP->fx_addsy == (symbolS *) NULL)
86aba9db 2340 fixP->fx_addnumber = value,
94f592af
NC
2341 fixP->fx_done = 1;
2342
2343 else if (fixP->fx_pcrel)
86aba9db 2344 fixP->fx_addnumber = fixP->fx_offset;
94f592af 2345
252b5132
RH
2346 else
2347 {
94f592af
NC
2348 value = fixP->fx_offset;
2349 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 2350 {
94f592af
NC
2351 if (S_GET_SEGMENT (fixP->fx_subsy) == absolute_section)
2352 value -= S_GET_VALUE (fixP->fx_subsy);
252b5132
RH
2353 else
2354 {
2355 /* We don't actually support subtracting a symbol. */
94f592af 2356 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH
2357 _("expression too complex"));
2358 }
2359 }
86aba9db 2360 fixP->fx_addnumber = value;
252b5132
RH
2361 }
2362
94f592af 2363 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132 2364 {
28e4f854
KH
2365 int opindex;
2366 const struct v850_operand *operand;
2367 unsigned long insn;
252b5132 2368
94f592af 2369 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
28e4f854 2370 operand = &v850_operands[opindex];
252b5132
RH
2371
2372 /* Fetch the instruction, insert the fully resolved operand
2373 value, and stuff the instruction back again.
2374
2375 Note the instruction has been stored in little endian
2376 format! */
94f592af 2377 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH
2378
2379 insn = bfd_getl32 ((unsigned char *) where);
2380 insn = v850_insert_operand (insn, operand, (offsetT) value,
94f592af 2381 fixP->fx_file, fixP->fx_line, NULL);
252b5132
RH
2382 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
2383
94f592af
NC
2384 if (fixP->fx_done)
2385 /* Nothing else to do here. */
2386 return;
252b5132 2387
28e4f854
KH
2388 /* Determine a BFD reloc value based on the operand information.
2389 We are only prepared to turn a few of the operands into relocs. */
252b5132
RH
2390
2391 if (operand->bits == 22)
94f592af 2392 fixP->fx_r_type = BFD_RELOC_V850_22_PCREL;
252b5132 2393 else if (operand->bits == 9)
94f592af 2394 fixP->fx_r_type = BFD_RELOC_V850_9_PCREL;
252b5132
RH
2395 else
2396 {
28e4f854
KH
2397#if 0
2398 fprintf (stderr, "bits: %d, insn: %x\n", operand->bits, insn);
2399#endif
2400
94f592af 2401 as_bad_where (fixP->fx_file, fixP->fx_line,
28e4f854 2402 _("unresolved expression that must be resolved"));
94f592af
NC
2403 fixP->fx_done = 1;
2404 return;
252b5132
RH
2405 }
2406 }
94f592af 2407 else if (fixP->fx_done)
252b5132
RH
2408 {
2409 /* We still have to insert the value into memory! */
94f592af 2410 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132 2411
94f592af 2412 if (fixP->fx_size == 1)
28e4f854 2413 *where = value & 0xff;
94f592af 2414 else if (fixP->fx_size == 2)
252b5132 2415 bfd_putl16 (value & 0xffff, (unsigned char *) where);
94f592af 2416 else if (fixP->fx_size == 4)
252b5132
RH
2417 bfd_putl32 (value, (unsigned char *) where);
2418 }
252b5132 2419}
252b5132
RH
2420\f
2421/* Parse a cons expression. We have to handle hi(), lo(), etc
2422 on the v850. */
28e4f854 2423
252b5132
RH
2424void
2425parse_cons_expression_v850 (exp)
28e4f854 2426 expressionS *exp;
252b5132
RH
2427{
2428 /* See if there's a reloc prefix like hi() we have to handle. */
2429 hold_cons_reloc = v850_reloc_prefix (NULL);
2430
2431 /* Do normal expression parsing. */
2432 expression (exp);
2433}
2434
2435/* Create a fixup for a cons expression. If parse_cons_expression_v850
2436 found a reloc prefix, then we use that reloc, else we choose an
2437 appropriate one based on the size of the expression. */
28e4f854 2438
252b5132
RH
2439void
2440cons_fix_new_v850 (frag, where, size, exp)
28e4f854 2441 fragS *frag;
252b5132
RH
2442 int where;
2443 int size;
2444 expressionS *exp;
2445{
2446 if (hold_cons_reloc == BFD_RELOC_UNUSED)
2447 {
2448 if (size == 4)
2449 hold_cons_reloc = BFD_RELOC_32;
2450 if (size == 2)
2451 hold_cons_reloc = BFD_RELOC_16;
2452 if (size == 1)
2453 hold_cons_reloc = BFD_RELOC_8;
2454 }
2455
2456 if (exp != NULL)
2457 fix_new_exp (frag, where, size, exp, 0, hold_cons_reloc);
2458 else
2459 fix_new (frag, where, size, NULL, 0, 0, hold_cons_reloc);
a8761a19
DD
2460
2461 hold_cons_reloc = BFD_RELOC_UNUSED;
252b5132 2462}
d6c497c7 2463
b34976b6 2464bfd_boolean
252b5132 2465v850_fix_adjustable (fixP)
28e4f854 2466 fixS *fixP;
252b5132 2467{
252b5132
RH
2468 if (fixP->fx_addsy == NULL)
2469 return 1;
28e4f854 2470
28e4f854 2471 /* Don't adjust function names. */
252b5132
RH
2472 if (S_IS_FUNCTION (fixP->fx_addsy))
2473 return 0;
2474
28e4f854
KH
2475 /* We need the symbol name for the VTABLE entries. */
2476 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
252b5132
RH
2477 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
2478 return 0;
28e4f854 2479
252b5132
RH
2480 return 1;
2481}
28e4f854 2482
252b5132 2483int
d6c497c7 2484v850_force_relocation (fixP)
28e4f854 2485 struct fix *fixP;
252b5132 2486{
a161fe53 2487 if (fixP->fx_r_type == BFD_RELOC_V850_LONGCALL
86aba9db
NC
2488 || fixP->fx_r_type == BFD_RELOC_V850_LONGJUMP)
2489 return 1;
2490
2491 if (v850_relax
2492 && (fixP->fx_pcrel
a161fe53
AM
2493 || fixP->fx_r_type == BFD_RELOC_V850_ALIGN
2494 || fixP->fx_r_type == BFD_RELOC_V850_22_PCREL
2495 || fixP->fx_r_type == BFD_RELOC_V850_9_PCREL
2496 || fixP->fx_r_type >= BFD_RELOC_UNUSED))
86aba9db
NC
2497 return 1;
2498
ae6063d4 2499 return generic_force_reloc (fixP);
252b5132 2500}
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