[deliverable/binutils-gdb.git] / gas / config / tc-xtensa.h

/* tc-xtensa.h -- Header file for tc-xtensa.c.
   Copyright (C) 2003-2016 Free Software Foundation, Inc.

   This file is part of GAS, the GNU Assembler.

   GAS is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 3, or (at your option)
   any later version.

   GAS is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with GAS; see the file COPYING.  If not, write to the Free
   Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
   02110-1301, USA.  */

#ifndef TC_XTENSA
#define TC_XTENSA 1

struct fix;

#ifndef OBJ_ELF
#error Xtensa support requires ELF object format
#endif

#include "xtensa-isa.h"
#include "xtensa-config.h"

#define TARGET_BYTES_BIG_ENDIAN XCHAL_HAVE_BE


/* Maximum number of opcode slots in a VLIW instruction.  */
#define MAX_SLOTS 15


/* For all xtensa relax states except RELAX_DESIRE_ALIGN and
   RELAX_DESIRE_ALIGN_IF_TARGET, the amount a frag might grow is stored
   in the fr_var field.  For the two exceptions, fr_var is a float value
   that records the frequency with which the following instruction is
   executed as a branch target.  The aligner uses this information to
   tell which targets are most important to be aligned.  */

enum xtensa_relax_statesE
{
  RELAX_XTENSA_NONE,

  RELAX_ALIGN_NEXT_OPCODE,
  /* Use the first opcode of the next fragment to determine the
     alignment requirements.  This is ONLY used for LOOPs currently.  */

  RELAX_CHECK_ALIGN_NEXT_OPCODE,
  /* The next non-empty frag contains a loop instruction.  Check to see
     if it is correctly aligned, but do not align it.  */

  RELAX_DESIRE_ALIGN_IF_TARGET,
  /* These are placed in front of labels and converted to either
     RELAX_DESIRE_ALIGN / RELAX_LOOP_END or rs_fill of 0 before
     relaxation begins.  */

  RELAX_ADD_NOP_IF_A0_B_RETW,
  /* These are placed in front of conditional branches.  Before
     relaxation begins, they are turned into either NOPs for branches
     immediately followed by RETW or RETW.N or rs_fills of 0.  This is
     used to avoid a hardware bug in some early versions of the
     processor.  */

  RELAX_ADD_NOP_IF_PRE_LOOP_END,
  /* These are placed after JX instructions.  Before relaxation begins,
     they are turned into either NOPs, if the JX is one instruction
     before a loop end label, or rs_fills of 0.  This is used to avoid a
     hardware interlock issue prior to Xtensa version T1040.  */

  RELAX_ADD_NOP_IF_SHORT_LOOP,
  /* These are placed after LOOP instructions and turned into NOPs when:
     (1) there are less than 3 instructions in the loop; we place 2 of
     these in a row to add up to 2 NOPS in short loops; or (2) the
     instructions in the loop do not include a branch or jump.
     Otherwise they are turned into rs_fills of 0 before relaxation
     begins.  This is used to avoid hardware bug PR3830.  */

  RELAX_ADD_NOP_IF_CLOSE_LOOP_END,
  /* These are placed after LOOP instructions and turned into NOPs if
     there are less than 12 bytes to the end of some other loop's end.
     Otherwise they are turned into rs_fills of 0 before relaxation
     begins.  This is used to avoid hardware bug PR3830.  */

  RELAX_DESIRE_ALIGN,
  /* The next fragment would like its first instruction to NOT cross an
     instruction fetch boundary.  */

  RELAX_MAYBE_DESIRE_ALIGN,
  /* The next fragment might like its first instruction to NOT cross an
     instruction fetch boundary.  These are placed after a branch that
     might be relaxed.  If the branch is relaxed, then this frag will be
     a branch target and this frag will be changed to RELAX_DESIRE_ALIGN
     frag.  */

  RELAX_LOOP_END,
  /* This will be turned into a NOP or NOP.N if the previous instruction
     is expanded to negate a loop.  */

  RELAX_LOOP_END_ADD_NOP,
  /* When the code density option is available, this will generate a
     NOP.N marked RELAX_NARROW.  Otherwise, it will create an rs_fill
     fragment with a NOP in it.  Once a frag has been converted to
     RELAX_LOOP_END_ADD_NOP, it should never be changed back to
     RELAX_LOOP_END.  */

  RELAX_LITERAL,
  /* Another fragment could generate an expansion here but has not yet.  */

  RELAX_LITERAL_NR,
  /* Expansion has been generated by an instruction that generates a
     literal.  However, the stretch has NOT been reported yet in this
     fragment.  */

  RELAX_LITERAL_FINAL,
  /* Expansion has been generated by an instruction that generates a
     literal.  */

  RELAX_LITERAL_POOL_BEGIN,
  RELAX_LITERAL_POOL_END,
  RELAX_LITERAL_POOL_CANDIDATE_BEGIN,
  /* Technically these are not relaxations at all but mark a location
     to store literals later.  Note that fr_var stores the frchain for
     BEGIN frags and fr_var stores now_seg for END frags.  */

  RELAX_NARROW,
  /* The last instruction in this fragment (at->fr_opcode) can be
     freely replaced with a single wider instruction if a future
     alignment desires or needs it.  */

  RELAX_IMMED,
  /* The last instruction in this fragment (at->fr_opcode) contains
     an immediate or symbol.  If the value does not fit, relax the
     opcode using expansions from the relax table.  */

  RELAX_IMMED_STEP1,
  /* The last instruction in this fragment (at->fr_opcode) contains a
     literal.  It has already been expanded 1 step.  */

  RELAX_IMMED_STEP2,
  /* The last instruction in this fragment (at->fr_opcode) contains a
     literal.  It has already been expanded 2 steps.  */

  RELAX_IMMED_STEP3,
  /* The last instruction in this fragment (at->fr_opcode) contains a
     literal.  It has already been expanded 3 steps.  */

  RELAX_SLOTS,
  /* There are instructions within the last VLIW instruction that need
     relaxation.  Find the relaxation based on the slot info in
     xtensa_frag_type.  Relaxations that deal with particular opcodes
     are slot-based (e.g., converting a MOVI to an L32R).  Relaxations
     that deal with entire instructions, such as alignment, are not
     slot-based.  */

  RELAX_FILL_NOP,
  /* This marks the location of a pipeline stall.  We can fill these guys
     in for alignment of any size.  */

  RELAX_UNREACHABLE,
  /* This marks the location as unreachable.  The assembler may widen or
     narrow this area to meet alignment requirements of nearby
     instructions.  */

  RELAX_MAYBE_UNREACHABLE,
  /* This marks the location as possibly unreachable.  These are placed
     after a branch that may be relaxed into a branch and jump. If the
     branch is relaxed, then this frag will be converted to a
     RELAX_UNREACHABLE frag.  */

  RELAX_ORG,
  /* This marks the location as having previously been an rs_org frag.
     rs_org frags are converted to fill-zero frags immediately after
     relaxation.  However, we need to remember where they were so we can
     prevent the linker from changing the size of any frag between the
     section start and the org frag.  */

  RELAX_TRAMPOLINE,
  /* Every few thousand frags, we insert one of these, just in case we may
     need some space for a trampoline (jump to a jump) because the function
     has gotten too big. If not needed, it disappears. */

  RELAX_NONE
};

/* This is used as a stopper to bound the number of steps that
   can be taken.  */
#define RELAX_IMMED_MAXSTEPS (RELAX_IMMED_STEP3 - RELAX_IMMED)

struct xtensa_frag_type
{
  /* Info about the current state of assembly, e.g., transform,
     absolute_literals, etc.  These need to be passed to the backend and
     then to the object file.

     When is_assembly_state_set is false, the frag inherits some of the
     state settings from the previous frag in this segment.  Because it
     is not possible to intercept all fragment closures (frag_more and
     frag_append_1_char can close a frag), we use a pass after initial
     assembly to fill in the assembly states.  */

  unsigned int is_assembly_state_set : 1;
  unsigned int is_no_density : 1;
  unsigned int is_no_transform : 1;
  unsigned int use_longcalls : 1;
  unsigned int use_absolute_literals : 1;

  /* Inhibits relaxation of machine-dependent alignment frags the
     first time through a relaxation....  */
  unsigned int relax_seen : 1;

  /* Information that is needed in the object file and set when known.  */
  unsigned int is_literal : 1;
  unsigned int is_loop_target : 1;
  unsigned int is_branch_target : 1;
  unsigned int is_insn : 1;
  unsigned int is_unreachable : 1;

  unsigned int is_specific_opcode : 1; /* also implies no_transform */

  unsigned int is_align : 1;
  unsigned int is_text_align : 1;
  unsigned int alignment : 5;

  /* A frag with this bit set is the first in a loop that actually
     contains an instruction.  */
  unsigned int is_first_loop_insn : 1;

  /* A frag with this bit set is a branch that we are using to
     align branch targets as if it were a normal narrow instruction.  */
  unsigned int is_aligning_branch : 1;

  /* For text fragments that can generate literals at relax time, this
     variable points to the frag where the literal will be stored.  For
     literal frags, this variable points to the nearest literal pool
     location frag.  This literal frag will be moved to after this
     location.  For RELAX_LITERAL_POOL_BEGIN frags, this field points
     to the frag immediately before the corresponding RELAX_LITERAL_POOL_END
     frag, to make moving frags for this literal pool efficient.  */
  fragS *literal_frag;

  /* The destination segment for literal frags.  (Note that this is only
     valid after xtensa_move_literals.)  This field is also used for
     LITERAL_POOL_END frags.  */
  segT lit_seg;

  /* Frag chain for LITERAL_POOL_BEGIN frags.  */
  struct frchain *lit_frchain;

  /* For the relaxation scheme, some literal fragments can have their
     expansions modified by an instruction that relaxes.  */
  int text_expansion[MAX_SLOTS];
  int literal_expansion[MAX_SLOTS];
  int unreported_expansion;

  /* For slots that have a free register for relaxation, record that
     register.  */
  expressionS free_reg[MAX_SLOTS];

  /* For text fragments that can generate literals at relax time:  */
  fragS *literal_frags[MAX_SLOTS];
  enum xtensa_relax_statesE slot_subtypes[MAX_SLOTS];
  symbolS *slot_symbols[MAX_SLOTS];
  offsetT slot_offsets[MAX_SLOTS];

  /* When marking frags after this one in the chain as no transform,
     cache the last one in the chain, so that we can skip to the
     end of the chain.  */
  fragS *no_transform_end;
};


/* For VLIW support, we need to know what slot a fixup applies to.  */
typedef struct xtensa_fix_data_struct
{
  int slot;
  symbolS *X_add_symbol;
  offsetT X_add_number;
} xtensa_fix_data;


/* Structure to record xtensa-specific symbol information.  */
typedef struct xtensa_symfield_type
{
  unsigned int is_loop_target : 1;
  unsigned int is_branch_target : 1;
  symbolS *next_expr_symbol;
} xtensa_symfield_type;


/* Structure for saving information about a block of property data
   for frags that have the same flags.   The forward reference is
   in this header file.  The actual definition is in tc-xtensa.c.  */
struct xtensa_block_info_struct;
typedef struct xtensa_block_info_struct xtensa_block_info;


/* Property section types.  */
typedef enum
{
  xt_literal_sec,
  xt_prop_sec,
  max_xt_sec
} xt_section_type;

typedef struct xtensa_segment_info_struct
{
  fragS *literal_pool_loc;
  xtensa_block_info *blocks[max_xt_sec];
} xtensa_segment_info;


extern const char *xtensa_target_format (void);
extern void xtensa_init_fix_data (struct fix *);
extern void xtensa_frag_init (fragS *);
extern int xtensa_force_relocation (struct fix *);
extern int xtensa_validate_fix_sub (struct fix *);
extern void xtensa_frob_label (struct symbol *);
extern void xtensa_end (void);
extern void xtensa_post_relax_hook (void);
extern void xtensa_file_arch_init (bfd *);
extern void xtensa_flush_pending_output (void);
extern bfd_boolean xtensa_fix_adjustable (struct fix *);
extern void xtensa_symbol_new_hook (symbolS *);
extern long xtensa_relax_frag (fragS *, long, int *);
extern void xtensa_elf_section_change_hook (void);
extern int xtensa_unrecognized_line (int);
extern bfd_boolean xtensa_check_inside_bundle (void);
extern void xtensa_handle_align (fragS *);
extern char *xtensa_section_rename (const char *);

#define TARGET_FORMAT			xtensa_target_format ()
#define TARGET_ARCH			bfd_arch_xtensa
#define TC_SEGMENT_INFO_TYPE		xtensa_segment_info
#define TC_SYMFIELD_TYPE                struct xtensa_symfield_type
#define TC_FIX_TYPE			xtensa_fix_data
#define TC_INIT_FIX_DATA(x)		xtensa_init_fix_data (x)
#define TC_FRAG_TYPE			struct xtensa_frag_type
#define TC_FRAG_INIT(frag)		xtensa_frag_init (frag)
#define TC_FORCE_RELOCATION(fix)	xtensa_force_relocation (fix)
#define TC_FORCE_RELOCATION_SUB_SAME(fix, seg) \
  (! SEG_NORMAL (seg) || xtensa_force_relocation (fix))
#define	TC_VALIDATE_FIX_SUB(fix, seg)	xtensa_validate_fix_sub (fix)
#define NO_PSEUDO_DOT			xtensa_check_inside_bundle ()
#define tc_canonicalize_symbol_name(s)	xtensa_section_rename (s)
#define tc_canonicalize_section_name(s)	xtensa_section_rename (s)
#define tc_init_after_args()		xtensa_file_arch_init (stdoutput)
#define tc_fix_adjustable(fix)		xtensa_fix_adjustable (fix)
#define tc_frob_label(sym)		xtensa_frob_label (sym)
#define tc_unrecognized_line(ch)	xtensa_unrecognized_line (ch)
#define tc_symbol_new_hook(sym)		xtensa_symbol_new_hook (sym)
#define md_do_align(a,b,c,d,e)		xtensa_flush_pending_output ()
#define md_elf_section_change_hook	xtensa_elf_section_change_hook
#define md_end				xtensa_end
#define md_flush_pending_output()	xtensa_flush_pending_output ()
#define md_operand(x)
#define TEXT_SECTION_NAME		xtensa_section_rename (".text")
#define DATA_SECTION_NAME		xtensa_section_rename (".data")
#define BSS_SECTION_NAME		xtensa_section_rename (".bss")
#define HANDLE_ALIGN(fragP)		xtensa_handle_align (fragP)
#define MAX_MEM_FOR_RS_ALIGN_CODE	1


/* The renumber_section function must be mapped over all the sections
   after calling xtensa_post_relax_hook.  That function is static in
   write.c so it cannot be called from xtensa_post_relax_hook itself.  */

#define md_post_relax_hook \
  do \
    { \
      int i = 0; \
      xtensa_post_relax_hook (); \
      bfd_map_over_sections (stdoutput, renumber_sections, &i); \
    } \
  while (0)


/* Because xtensa relaxation can insert a new literal into the middle of
   fragment and thus require re-running the relaxation pass on the
   section, we need an explicit flag here.  We explicitly use the name
   "stretched" here to avoid changing the source code in write.c.  */

#define md_relax_frag(segment, fragP, stretch) \
  xtensa_relax_frag (fragP, stretch, &stretched)

/* Only allow call frame debug info optimization when linker relaxation is
   not enabled as otherwise we could generate the DWARF directives without
   the relocs necessary to patch them up.  */
#define md_allow_eh_opt (linkrelax == 0)

#define LOCAL_LABELS_FB 1
#define WORKING_DOT_WORD 1
#define DOUBLESLASH_LINE_COMMENTS
#define TC_HANDLES_FX_DONE
#define TC_FINALIZE_SYMS_BEFORE_SIZE_SEG 0
#define TC_LINKRELAX_FIXUP(SEG) 0
#define MD_APPLY_SYM_VALUE(FIX) 0
#define SUB_SEGMENT_ALIGN(SEG, FRCHAIN) 0

/* Use line number format that is amenable to linker relaxation.  */
#define DWARF2_USE_FIXED_ADVANCE_PC (linkrelax != 0)


/* Resource reservation info functions.  */

/* Returns the number of copies of a particular unit.  */
typedef int (*unit_num_copies_func) (void *, xtensa_funcUnit);

/* Returns the number of units the opcode uses.  */
typedef int (*opcode_num_units_func) (void *, xtensa_opcode);

/* Given an opcode and an index into the opcode's funcUnit list,
   returns the unit used for the index.  */
typedef int (*opcode_funcUnit_use_unit_func) (void *, xtensa_opcode, int);

/* Given an opcode and an index into the opcode's funcUnit list,
   returns the cycle during which the unit is used.  */
typedef int (*opcode_funcUnit_use_stage_func) (void *, xtensa_opcode, int);

/* The above typedefs parameterize the resource_table so that the
   optional scheduler doesn't need its own resource reservation system.

   For simple resource checking, which is all that happens normally,
   the functions will be as follows (with some wrapping to make the
   interface more convenient):

   unit_num_copies_func = xtensa_funcUnit_num_copies
   opcode_num_units_func = xtensa_opcode_num_funcUnit_uses
   opcode_funcUnit_use_unit_func = xtensa_opcode_funcUnit_use->unit
   opcode_funcUnit_use_stage_func = xtensa_opcode_funcUnit_use->stage

   Of course the optional scheduler has its own reservation table
   and functions.  */

int opcode_funcUnit_use_unit (void *, xtensa_opcode, int);
int opcode_funcUnit_use_stage (void *, xtensa_opcode, int);

typedef struct
{
  void *data;
  int cycles;
  int allocated_cycles;
  int num_units;
  unit_num_copies_func unit_num_copies;
  opcode_num_units_func opcode_num_units;
  opcode_funcUnit_use_unit_func opcode_unit_use;
  opcode_funcUnit_use_stage_func opcode_unit_stage;
  unsigned char **units;
} resource_table;

resource_table *new_resource_table
  (void *, int, int, unit_num_copies_func, opcode_num_units_func,
   opcode_funcUnit_use_unit_func, opcode_funcUnit_use_stage_func);
void resize_resource_table (resource_table *, int);
void clear_resource_table (resource_table *);
bfd_boolean resources_available (resource_table *, xtensa_opcode, int);
void reserve_resources (resource_table *, xtensa_opcode, int);
void release_resources (resource_table *, xtensa_opcode, int);

#endif /* TC_XTENSA */
Commit	Line	Data
e0001a05	1	/* tc-xtensa.h -- Header file for tc-xtensa.c.
6f2750fe	2	Copyright (C) 2003-2016 Free Software Foundation, Inc.
e0001a05 NC	3
	4	This file is part of GAS, the GNU Assembler.
	5
	6	GAS is free software; you can redistribute it and/or modify
	7	it under the terms of the GNU General Public License as published by
ec2655a6	8	the Free Software Foundation; either version 3, or (at your option)
e0001a05 NC	9	any later version.
	10
	11	GAS is distributed in the hope that it will be useful,
	12	but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	GNU General Public License for more details.
	15
	16	You should have received a copy of the GNU General Public License
	17	along with GAS; see the file COPYING. If not, write to the Free
4b4da160 NC	18	Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
4b4da160 NC	19	02110-1301, USA. */
e0001a05 NC	20
	21	#ifndef TC_XTENSA
	22	#define TC_XTENSA 1
	23
e0001a05	24	struct fix;
e0001a05	25
e0001a05 NC	26	#ifndef OBJ_ELF
	27	#error Xtensa support requires ELF object format
	28	#endif
	29
43cd72b9	30	#include "xtensa-isa.h"
e0001a05 NC	31	#include "xtensa-config.h"
	32
	33	#define TARGET_BYTES_BIG_ENDIAN XCHAL_HAVE_BE
	34
	35
43cd72b9	36	/* Maximum number of opcode slots in a VLIW instruction. */
b08b5071	37	#define MAX_SLOTS 15
43cd72b9 BW	38
	39
	40	/* For all xtensa relax states except RELAX_DESIRE_ALIGN and
	41	RELAX_DESIRE_ALIGN_IF_TARGET, the amount a frag might grow is stored
	42	in the fr_var field. For the two exceptions, fr_var is a float value
	43	that records the frequency with which the following instruction is
	44	executed as a branch target. The aligner uses this information to
	45	tell which targets are most important to be aligned. */
	46
	47	enum xtensa_relax_statesE
	48	{
58502fec BW	49	RELAX_XTENSA_NONE,
58502fec BW	50
43cd72b9 BW	51	RELAX_ALIGN_NEXT_OPCODE,
	52	/* Use the first opcode of the next fragment to determine the
	53	alignment requirements. This is ONLY used for LOOPs currently. */
	54
	55	RELAX_CHECK_ALIGN_NEXT_OPCODE,
	56	/* The next non-empty frag contains a loop instruction. Check to see
	57	if it is correctly aligned, but do not align it. */
	58
	59	RELAX_DESIRE_ALIGN_IF_TARGET,
	60	/* These are placed in front of labels and converted to either
	61	RELAX_DESIRE_ALIGN / RELAX_LOOP_END or rs_fill of 0 before
	62	relaxation begins. */
	63
	64	RELAX_ADD_NOP_IF_A0_B_RETW,
	65	/* These are placed in front of conditional branches. Before
	66	relaxation begins, they are turned into either NOPs for branches
	67	immediately followed by RETW or RETW.N or rs_fills of 0. This is
	68	used to avoid a hardware bug in some early versions of the
	69	processor. */
	70
	71	RELAX_ADD_NOP_IF_PRE_LOOP_END,
	72	/* These are placed after JX instructions. Before relaxation begins,
	73	they are turned into either NOPs, if the JX is one instruction
	74	before a loop end label, or rs_fills of 0. This is used to avoid a
	75	hardware interlock issue prior to Xtensa version T1040. */
	76
	77	RELAX_ADD_NOP_IF_SHORT_LOOP,
	78	/* These are placed after LOOP instructions and turned into NOPs when:
	79	(1) there are less than 3 instructions in the loop; we place 2 of
	80	these in a row to add up to 2 NOPS in short loops; or (2) the
	81	instructions in the loop do not include a branch or jump.
	82	Otherwise they are turned into rs_fills of 0 before relaxation
	83	begins. This is used to avoid hardware bug PR3830. */
	84
	85	RELAX_ADD_NOP_IF_CLOSE_LOOP_END,
	86	/* These are placed after LOOP instructions and turned into NOPs if
	87	there are less than 12 bytes to the end of some other loop's end.
	88	Otherwise they are turned into rs_fills of 0 before relaxation
	89	begins. This is used to avoid hardware bug PR3830. */
	90
	91	RELAX_DESIRE_ALIGN,
	92	/* The next fragment would like its first instruction to NOT cross an
	93	instruction fetch boundary. */
	94
	95	RELAX_MAYBE_DESIRE_ALIGN,
	96	/* The next fragment might like its first instruction to NOT cross an
	97	instruction fetch boundary. These are placed after a branch that
	98	might be relaxed. If the branch is relaxed, then this frag will be
	99	a branch target and this frag will be changed to RELAX_DESIRE_ALIGN
	100	frag. */
	101
	102	RELAX_LOOP_END,
	103	/* This will be turned into a NOP or NOP.N if the previous instruction
	104	is expanded to negate a loop. */
	105
	106	RELAX_LOOP_END_ADD_NOP,
	107	/* When the code density option is available, this will generate a
	108	NOP.N marked RELAX_NARROW. Otherwise, it will create an rs_fill
3b492825	109	fragment with a NOP in it. Once a frag has been converted to
3739860c	110	RELAX_LOOP_END_ADD_NOP, it should never be changed back to
3b492825	111	RELAX_LOOP_END. */
43cd72b9 BW	112
	113	RELAX_LITERAL,
	114	/* Another fragment could generate an expansion here but has not yet. */
	115
	116	RELAX_LITERAL_NR,
	117	/* Expansion has been generated by an instruction that generates a
	118	literal. However, the stretch has NOT been reported yet in this
	119	fragment. */
	120
	121	RELAX_LITERAL_FINAL,
	122	/* Expansion has been generated by an instruction that generates a
	123	literal. */
	124
	125	RELAX_LITERAL_POOL_BEGIN,
	126	RELAX_LITERAL_POOL_END,
b46824bd	127	RELAX_LITERAL_POOL_CANDIDATE_BEGIN,
43cd72b9 BW	128	/* Technically these are not relaxations at all but mark a location
	129	to store literals later. Note that fr_var stores the frchain for
	130	BEGIN frags and fr_var stores now_seg for END frags. */
	131
	132	RELAX_NARROW,
	133	/* The last instruction in this fragment (at->fr_opcode) can be
	134	freely replaced with a single wider instruction if a future
	135	alignment desires or needs it. */
	136
	137	RELAX_IMMED,
	138	/* The last instruction in this fragment (at->fr_opcode) contains
b81bf389 BW	139	an immediate or symbol. If the value does not fit, relax the
b81bf389 BW	140	opcode using expansions from the relax table. */
c138bc38	141
43cd72b9 BW	142	RELAX_IMMED_STEP1,
43cd72b9 BW	143	/* The last instruction in this fragment (at->fr_opcode) contains a
b81bf389	144	literal. It has already been expanded 1 step. */
43cd72b9 BW	145
	146	RELAX_IMMED_STEP2,
	147	/* The last instruction in this fragment (at->fr_opcode) contains a
b81bf389 BW	148	literal. It has already been expanded 2 steps. */
	149
	150	RELAX_IMMED_STEP3,
	151	/* The last instruction in this fragment (at->fr_opcode) contains a
	152	literal. It has already been expanded 3 steps. */
43cd72b9 BW	153
	154	RELAX_SLOTS,
	155	/* There are instructions within the last VLIW instruction that need
	156	relaxation. Find the relaxation based on the slot info in
	157	xtensa_frag_type. Relaxations that deal with particular opcodes
	158	are slot-based (e.g., converting a MOVI to an L32R). Relaxations
	159	that deal with entire instructions, such as alignment, are not
	160	slot-based. */
	161
	162	RELAX_FILL_NOP,
	163	/* This marks the location of a pipeline stall. We can fill these guys
	164	in for alignment of any size. */
	165
	166	RELAX_UNREACHABLE,
	167	/* This marks the location as unreachable. The assembler may widen or
	168	narrow this area to meet alignment requirements of nearby
	169	instructions. */
	170
	171	RELAX_MAYBE_UNREACHABLE,
	172	/* This marks the location as possibly unreachable. These are placed
	173	after a branch that may be relaxed into a branch and jump. If the
c138bc38	174	branch is relaxed, then this frag will be converted to a
43cd72b9 BW	175	RELAX_UNREACHABLE frag. */
43cd72b9 BW	176
99ded152	177	RELAX_ORG,
3739860c	178	/* This marks the location as having previously been an rs_org frag.
99ded152 BW	179	rs_org frags are converted to fill-zero frags immediately after
	180	relaxation. However, we need to remember where they were so we can
	181	prevent the linker from changing the size of any frag between the
	182	section start and the org frag. */
	183
a82c7d90 DW	184	RELAX_TRAMPOLINE,
	185	/* Every few thousand frags, we insert one of these, just in case we may
	186	need some space for a trampoline (jump to a jump) because the function
	187	has gotten too big. If not needed, it disappears. */
	188
43cd72b9 BW	189	RELAX_NONE
	190	};
	191
	192	/* This is used as a stopper to bound the number of steps that
	193	can be taken. */
b81bf389	194	#define RELAX_IMMED_MAXSTEPS (RELAX_IMMED_STEP3 - RELAX_IMMED)
43cd72b9	195
e0001a05 NC	196	struct xtensa_frag_type
e0001a05 NC	197	{
43cd72b9 BW	198	/* Info about the current state of assembly, e.g., transform,
	199	absolute_literals, etc. These need to be passed to the backend and
	200	then to the object file.
	201
	202	When is_assembly_state_set is false, the frag inherits some of the
	203	state settings from the previous frag in this segment. Because it
	204	is not possible to intercept all fragment closures (frag_more and
	205	frag_append_1_char can close a frag), we use a pass after initial
	206	assembly to fill in the assembly states. */
	207
	208	unsigned int is_assembly_state_set : 1;
	209	unsigned int is_no_density : 1;
	210	unsigned int is_no_transform : 1;
7c834684	211	unsigned int use_longcalls : 1;
43cd72b9 BW	212	unsigned int use_absolute_literals : 1;
	213
	214	/* Inhibits relaxation of machine-dependent alignment frags the
	215	first time through a relaxation.... */
	216	unsigned int relax_seen : 1;
	217
0fa77c95	218	/* Information that is needed in the object file and set when known. */
43cd72b9 BW	219	unsigned int is_literal : 1;
	220	unsigned int is_loop_target : 1;
	221	unsigned int is_branch_target : 1;
	222	unsigned int is_insn : 1;
	223	unsigned int is_unreachable : 1;
e0001a05	224
43cd72b9	225	unsigned int is_specific_opcode : 1; /* also implies no_transform */
e0001a05	226
43cd72b9 BW	227	unsigned int is_align : 1;
	228	unsigned int is_text_align : 1;
	229	unsigned int alignment : 5;
	230
	231	/* A frag with this bit set is the first in a loop that actually
	232	contains an instruction. */
	233	unsigned int is_first_loop_insn : 1;
e0001a05	234
b5e4a23d BW	235	/* A frag with this bit set is a branch that we are using to
	236	align branch targets as if it were a normal narrow instruction. */
	237	unsigned int is_aligning_branch : 1;
	238
e0001a05 NC	239	/* For text fragments that can generate literals at relax time, this
	240	variable points to the frag where the literal will be stored. For
	241	literal frags, this variable points to the nearest literal pool
	242	location frag. This literal frag will be moved to after this
c48aaca0 BW	243	location. For RELAX_LITERAL_POOL_BEGIN frags, this field points
	244	to the frag immediately before the corresponding RELAX_LITERAL_POOL_END
	245	frag, to make moving frags for this literal pool efficient. */
e0001a05 NC	246	fragS *literal_frag;
	247
	248	/* The destination segment for literal frags. (Note that this is only
dd49a749 BW	249	valid after xtensa_move_literals.) This field is also used for
dd49a749 BW	250	LITERAL_POOL_END frags. */
e0001a05 NC	251	segT lit_seg;
e0001a05 NC	252
dd49a749 BW	253	/* Frag chain for LITERAL_POOL_BEGIN frags. */
	254	struct frchain *lit_frchain;
	255
e0001a05 NC	256	/* For the relaxation scheme, some literal fragments can have their
e0001a05 NC	257	expansions modified by an instruction that relaxes. */
43cd72b9 BW	258	int text_expansion[MAX_SLOTS];
	259	int literal_expansion[MAX_SLOTS];
	260	int unreported_expansion;
	261
19e8f41a BW	262	/* For slots that have a free register for relaxation, record that
	263	register. */
	264	expressionS free_reg[MAX_SLOTS];
	265
43cd72b9 BW	266	/* For text fragments that can generate literals at relax time: */
	267	fragS *literal_frags[MAX_SLOTS];
	268	enum xtensa_relax_statesE slot_subtypes[MAX_SLOTS];
	269	symbolS *slot_symbols[MAX_SLOTS];
43cd72b9 BW	270	offsetT slot_offsets[MAX_SLOTS];
43cd72b9 BW	271
983f90e3 SA	272	/* When marking frags after this one in the chain as no transform,
	273	cache the last one in the chain, so that we can skip to the
	274	end of the chain. */
	275	fragS *no_transform_end;
e0001a05 NC	276	};
e0001a05 NC	277
43cd72b9 BW	278
	279	/* For VLIW support, we need to know what slot a fixup applies to. */
	280	typedef struct xtensa_fix_data_struct
	281	{
	282	int slot;
	283	symbolS *X_add_symbol;
	284	offsetT X_add_number;
	285	} xtensa_fix_data;
	286
	287
	288	/* Structure to record xtensa-specific symbol information. */
	289	typedef struct xtensa_symfield_type
e0001a05	290	{
43cd72b9 BW	291	unsigned int is_loop_target : 1;
43cd72b9 BW	292	unsigned int is_branch_target : 1;
6a7eedfe	293	symbolS *next_expr_symbol;
43cd72b9 BW	294	} xtensa_symfield_type;
	295
	296
	297	/* Structure for saving information about a block of property data
	298	for frags that have the same flags. The forward reference is
	299	in this header file. The actual definition is in tc-xtensa.c. */
	300	struct xtensa_block_info_struct;
	301	typedef struct xtensa_block_info_struct xtensa_block_info;
	302
e0001a05	303
43cd72b9	304	/* Property section types. */
e0001a05 NC	305	typedef enum
e0001a05 NC	306	{
e0001a05	307	xt_literal_sec,
43cd72b9	308	xt_prop_sec,
e0001a05 NC	309	max_xt_sec
	310	} xt_section_type;
	311
	312	typedef struct xtensa_segment_info_struct
	313	{
	314	fragS *literal_pool_loc;
	315	xtensa_block_info *blocks[max_xt_sec];
	316	} xtensa_segment_info;
	317
e0001a05	318
7fa3d080 BW	319	extern const char *xtensa_target_format (void);
	320	extern void xtensa_init_fix_data (struct fix *);
	321	extern void xtensa_frag_init (fragS *);
	322	extern int xtensa_force_relocation (struct fix *);
30f725a1	323	extern int xtensa_validate_fix_sub (struct fix *);
7fa3d080 BW	324	extern void xtensa_frob_label (struct symbol *);
	325	extern void xtensa_end (void);
	326	extern void xtensa_post_relax_hook (void);
	327	extern void xtensa_file_arch_init (bfd *);
	328	extern void xtensa_flush_pending_output (void);
	329	extern bfd_boolean xtensa_fix_adjustable (struct fix *);
	330	extern void xtensa_symbol_new_hook (symbolS *);
	331	extern long xtensa_relax_frag (fragS , long, int );
	332	extern void xtensa_elf_section_change_hook (void);
	333	extern int xtensa_unrecognized_line (int);
	334	extern bfd_boolean xtensa_check_inside_bundle (void);
	335	extern void xtensa_handle_align (fragS *);
e4a0c708	336	extern char xtensa_section_rename (const char );
e0001a05 NC	337
	338	#define TARGET_FORMAT xtensa_target_format ()
	339	#define TARGET_ARCH bfd_arch_xtensa
	340	#define TC_SEGMENT_INFO_TYPE xtensa_segment_info
43cd72b9 BW	341	#define TC_SYMFIELD_TYPE struct xtensa_symfield_type
	342	#define TC_FIX_TYPE xtensa_fix_data
	343	#define TC_INIT_FIX_DATA(x) xtensa_init_fix_data (x)
e0001a05 NC	344	#define TC_FRAG_TYPE struct xtensa_frag_type
e0001a05 NC	345	#define TC_FRAG_INIT(frag) xtensa_frag_init (frag)
43cd72b9	346	#define TC_FORCE_RELOCATION(fix) xtensa_force_relocation (fix)
30f725a1 BW	347	#define TC_FORCE_RELOCATION_SUB_SAME(fix, seg) \
30f725a1 BW	348	(! SEG_NORMAL (seg) \|\| xtensa_force_relocation (fix))
5db484ff	349	#define TC_VALIDATE_FIX_SUB(fix, seg) xtensa_validate_fix_sub (fix)
43cd72b9	350	#define NO_PSEUDO_DOT xtensa_check_inside_bundle ()
e0001a05	351	#define tc_canonicalize_symbol_name(s) xtensa_section_rename (s)
9456465c	352	#define tc_canonicalize_section_name(s) xtensa_section_rename (s)
e0001a05 NC	353	#define tc_init_after_args() xtensa_file_arch_init (stdoutput)
	354	#define tc_fix_adjustable(fix) xtensa_fix_adjustable (fix)
	355	#define tc_frob_label(sym) xtensa_frob_label (sym)
43cd72b9	356	#define tc_unrecognized_line(ch) xtensa_unrecognized_line (ch)
6a7eedfe	357	#define tc_symbol_new_hook(sym) xtensa_symbol_new_hook (sym)
43cd72b9 BW	358	#define md_do_align(a,b,c,d,e) xtensa_flush_pending_output ()
43cd72b9 BW	359	#define md_elf_section_change_hook xtensa_elf_section_change_hook
e0001a05 NC	360	#define md_end xtensa_end
	361	#define md_flush_pending_output() xtensa_flush_pending_output ()
	362	#define md_operand(x)
	363	#define TEXT_SECTION_NAME xtensa_section_rename (".text")
	364	#define DATA_SECTION_NAME xtensa_section_rename (".data")
	365	#define BSS_SECTION_NAME xtensa_section_rename (".bss")
43cd72b9	366	#define HANDLE_ALIGN(fragP) xtensa_handle_align (fragP)
cf523b8e	367	#define MAX_MEM_FOR_RS_ALIGN_CODE 1
e0001a05 NC	368
	369
	370	/* The renumber_section function must be mapped over all the sections
	371	after calling xtensa_post_relax_hook. That function is static in
	372	write.c so it cannot be called from xtensa_post_relax_hook itself. */
	373
	374	#define md_post_relax_hook \
	375	do \
	376	{ \
	377	int i = 0; \
	378	xtensa_post_relax_hook (); \
	379	bfd_map_over_sections (stdoutput, renumber_sections, &i); \
	380	} \
	381	while (0)
	382
	383
	384	/* Because xtensa relaxation can insert a new literal into the middle of
	385	fragment and thus require re-running the relaxation pass on the
	386	section, we need an explicit flag here. We explicitly use the name
	387	"stretched" here to avoid changing the source code in write.c. */
	388
	389	#define md_relax_frag(segment, fragP, stretch) \
	390	xtensa_relax_frag (fragP, stretch, &stretched)
	391
ee6365aa BW	392	/* Only allow call frame debug info optimization when linker relaxation is
	393	not enabled as otherwise we could generate the DWARF directives without
	394	the relocs necessary to patch them up. */
	395	#define md_allow_eh_opt (linkrelax == 0)
e0001a05 NC	396
	397	#define LOCAL_LABELS_FB 1
	398	#define WORKING_DOT_WORD 1
	399	#define DOUBLESLASH_LINE_COMMENTS
	400	#define TC_HANDLES_FX_DONE
	401	#define TC_FINALIZE_SYMS_BEFORE_SIZE_SEG 0
43cd72b9	402	#define TC_LINKRELAX_FIXUP(SEG) 0
e0001a05	403	#define MD_APPLY_SYM_VALUE(FIX) 0
43cd72b9 BW	404	#define SUB_SEGMENT_ALIGN(SEG, FRCHAIN) 0
43cd72b9 BW	405
1737851b BW	406	/* Use line number format that is amenable to linker relaxation. */
	407	#define DWARF2_USE_FIXED_ADVANCE_PC (linkrelax != 0)
	408
43cd72b9 BW	409
	410	/* Resource reservation info functions. */
	411
	412	/* Returns the number of copies of a particular unit. */
	413	typedef int (unit_num_copies_func) (void , xtensa_funcUnit);
	414
	415	/* Returns the number of units the opcode uses. */
	416	typedef int (opcode_num_units_func) (void , xtensa_opcode);
	417
c138bc38	418	/* Given an opcode and an index into the opcode's funcUnit list,
43cd72b9 BW	419	returns the unit used for the index. */
	420	typedef int (opcode_funcUnit_use_unit_func) (void , xtensa_opcode, int);
	421
c138bc38	422	/* Given an opcode and an index into the opcode's funcUnit list,
43cd72b9 BW	423	returns the cycle during which the unit is used. */
	424	typedef int (opcode_funcUnit_use_stage_func) (void , xtensa_opcode, int);
	425
c138bc38	426	/* The above typedefs parameterize the resource_table so that the
43cd72b9	427	optional scheduler doesn't need its own resource reservation system.
c138bc38 BW	428
	429	For simple resource checking, which is all that happens normally,
	430	the functions will be as follows (with some wrapping to make the
	431	interface more convenient):
43cd72b9 BW	432
	433	unit_num_copies_func = xtensa_funcUnit_num_copies
	434	opcode_num_units_func = xtensa_opcode_num_funcUnit_uses
	435	opcode_funcUnit_use_unit_func = xtensa_opcode_funcUnit_use->unit
	436	opcode_funcUnit_use_stage_func = xtensa_opcode_funcUnit_use->stage
	437
c138bc38	438	Of course the optional scheduler has its own reservation table
43cd72b9 BW	439	and functions. */
43cd72b9 BW	440
7fa3d080 BW	441	int opcode_funcUnit_use_unit (void *, xtensa_opcode, int);
7fa3d080 BW	442	int opcode_funcUnit_use_stage (void *, xtensa_opcode, int);
43cd72b9 BW	443
	444	typedef struct
	445	{
	446	void *data;
	447	int cycles;
	448	int allocated_cycles;
	449	int num_units;
	450	unit_num_copies_func unit_num_copies;
	451	opcode_num_units_func opcode_num_units;
	452	opcode_funcUnit_use_unit_func opcode_unit_use;
	453	opcode_funcUnit_use_stage_func opcode_unit_stage;
0bf60745	454	unsigned char **units;
43cd72b9 BW	455	} resource_table;
43cd72b9 BW	456
c138bc38 BW	457	resource_table *new_resource_table
c138bc38 BW	458	(void *, int, int, unit_num_copies_func, opcode_num_units_func,
7fa3d080 BW	459	opcode_funcUnit_use_unit_func, opcode_funcUnit_use_stage_func);
	460	void resize_resource_table (resource_table *, int);
	461	void clear_resource_table (resource_table *);
	462	bfd_boolean resources_available (resource_table *, xtensa_opcode, int);
	463	void reserve_resources (resource_table *, xtensa_opcode, int);
	464	void release_resources (resource_table *, xtensa_opcode, int);
e0001a05	465
e0001a05	466	#endif /* TC_XTENSA */