[deliverable/binutils-gdb.git] / gas / config / tc-xtensa.h

/* tc-xtensa.h -- Header file for tc-xtensa.c.
   Copyright (C) 2003, 2004, 2005, 2006, 2007, 2008, 2009
   Free Software Foundation, Inc.

   This file is part of GAS, the GNU Assembler.

   GAS is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 3, or (at your option)
   any later version.

   GAS is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with GAS; see the file COPYING.  If not, write to the Free
   Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
   02110-1301, USA.  */

#ifndef TC_XTENSA
#define TC_XTENSA 1

struct fix;

#ifndef OBJ_ELF
#error Xtensa support requires ELF object format
#endif

#include "xtensa-isa.h"
#include "xtensa-config.h"

#define TARGET_BYTES_BIG_ENDIAN XCHAL_HAVE_BE


/* Maximum number of opcode slots in a VLIW instruction.  */
#define MAX_SLOTS 15


/* For all xtensa relax states except RELAX_DESIRE_ALIGN and
   RELAX_DESIRE_ALIGN_IF_TARGET, the amount a frag might grow is stored
   in the fr_var field.  For the two exceptions, fr_var is a float value
   that records the frequency with which the following instruction is
   executed as a branch target.  The aligner uses this information to
   tell which targets are most important to be aligned.  */

enum xtensa_relax_statesE
{
  RELAX_XTENSA_NONE,

  RELAX_ALIGN_NEXT_OPCODE,
  /* Use the first opcode of the next fragment to determine the
     alignment requirements.  This is ONLY used for LOOPs currently.  */

  RELAX_CHECK_ALIGN_NEXT_OPCODE,
  /* The next non-empty frag contains a loop instruction.  Check to see
     if it is correctly aligned, but do not align it.  */

  RELAX_DESIRE_ALIGN_IF_TARGET,
  /* These are placed in front of labels and converted to either
     RELAX_DESIRE_ALIGN / RELAX_LOOP_END or rs_fill of 0 before
     relaxation begins.  */

  RELAX_ADD_NOP_IF_A0_B_RETW,
  /* These are placed in front of conditional branches.  Before
     relaxation begins, they are turned into either NOPs for branches
     immediately followed by RETW or RETW.N or rs_fills of 0.  This is
     used to avoid a hardware bug in some early versions of the
     processor.  */

  RELAX_ADD_NOP_IF_PRE_LOOP_END,
  /* These are placed after JX instructions.  Before relaxation begins,
     they are turned into either NOPs, if the JX is one instruction
     before a loop end label, or rs_fills of 0.  This is used to avoid a
     hardware interlock issue prior to Xtensa version T1040.  */

  RELAX_ADD_NOP_IF_SHORT_LOOP,
  /* These are placed after LOOP instructions and turned into NOPs when:
     (1) there are less than 3 instructions in the loop; we place 2 of
     these in a row to add up to 2 NOPS in short loops; or (2) the
     instructions in the loop do not include a branch or jump.
     Otherwise they are turned into rs_fills of 0 before relaxation
     begins.  This is used to avoid hardware bug PR3830.  */

  RELAX_ADD_NOP_IF_CLOSE_LOOP_END,
  /* These are placed after LOOP instructions and turned into NOPs if
     there are less than 12 bytes to the end of some other loop's end.
     Otherwise they are turned into rs_fills of 0 before relaxation
     begins.  This is used to avoid hardware bug PR3830.  */

  RELAX_DESIRE_ALIGN,
  /* The next fragment would like its first instruction to NOT cross an
     instruction fetch boundary.  */

  RELAX_MAYBE_DESIRE_ALIGN,
  /* The next fragment might like its first instruction to NOT cross an
     instruction fetch boundary.  These are placed after a branch that
     might be relaxed.  If the branch is relaxed, then this frag will be
     a branch target and this frag will be changed to RELAX_DESIRE_ALIGN
     frag.  */

  RELAX_LOOP_END,
  /* This will be turned into a NOP or NOP.N if the previous instruction
     is expanded to negate a loop.  */

  RELAX_LOOP_END_ADD_NOP,
  /* When the code density option is available, this will generate a
     NOP.N marked RELAX_NARROW.  Otherwise, it will create an rs_fill
     fragment with a NOP in it.  Once a frag has been converted to
     RELAX_LOOP_END_ADD_NOP, it should never be changed back to 
     RELAX_LOOP_END.  */

  RELAX_LITERAL,
  /* Another fragment could generate an expansion here but has not yet.  */

  RELAX_LITERAL_NR,
  /* Expansion has been generated by an instruction that generates a
     literal.  However, the stretch has NOT been reported yet in this
     fragment.  */

  RELAX_LITERAL_FINAL,
  /* Expansion has been generated by an instruction that generates a
     literal.  */

  RELAX_LITERAL_POOL_BEGIN,
  RELAX_LITERAL_POOL_END,
  /* Technically these are not relaxations at all but mark a location
     to store literals later.  Note that fr_var stores the frchain for
     BEGIN frags and fr_var stores now_seg for END frags.  */

  RELAX_NARROW,
  /* The last instruction in this fragment (at->fr_opcode) can be
     freely replaced with a single wider instruction if a future
     alignment desires or needs it.  */

  RELAX_IMMED,
  /* The last instruction in this fragment (at->fr_opcode) contains
     an immediate or symbol.  If the value does not fit, relax the
     opcode using expansions from the relax table.  */

  RELAX_IMMED_STEP1,
  /* The last instruction in this fragment (at->fr_opcode) contains a
     literal.  It has already been expanded 1 step.  */

  RELAX_IMMED_STEP2,
  /* The last instruction in this fragment (at->fr_opcode) contains a
     literal.  It has already been expanded 2 steps.  */

  RELAX_IMMED_STEP3,
  /* The last instruction in this fragment (at->fr_opcode) contains a
     literal.  It has already been expanded 3 steps.  */

  RELAX_SLOTS,
  /* There are instructions within the last VLIW instruction that need
     relaxation.  Find the relaxation based on the slot info in
     xtensa_frag_type.  Relaxations that deal with particular opcodes
     are slot-based (e.g., converting a MOVI to an L32R).  Relaxations
     that deal with entire instructions, such as alignment, are not
     slot-based.  */

  RELAX_FILL_NOP,
  /* This marks the location of a pipeline stall.  We can fill these guys
     in for alignment of any size.  */

  RELAX_UNREACHABLE,
  /* This marks the location as unreachable.  The assembler may widen or
     narrow this area to meet alignment requirements of nearby
     instructions.  */

  RELAX_MAYBE_UNREACHABLE,
  /* This marks the location as possibly unreachable.  These are placed
     after a branch that may be relaxed into a branch and jump. If the
     branch is relaxed, then this frag will be converted to a
     RELAX_UNREACHABLE frag.  */

  RELAX_ORG,
  /* This marks the location as having previously been an rs_org frag.  
     rs_org frags are converted to fill-zero frags immediately after
     relaxation.  However, we need to remember where they were so we can
     prevent the linker from changing the size of any frag between the
     section start and the org frag.  */

  RELAX_NONE
};

/* This is used as a stopper to bound the number of steps that
   can be taken.  */
#define RELAX_IMMED_MAXSTEPS (RELAX_IMMED_STEP3 - RELAX_IMMED)

struct xtensa_frag_type
{
  /* Info about the current state of assembly, e.g., transform,
     absolute_literals, etc.  These need to be passed to the backend and
     then to the object file.

     When is_assembly_state_set is false, the frag inherits some of the
     state settings from the previous frag in this segment.  Because it
     is not possible to intercept all fragment closures (frag_more and
     frag_append_1_char can close a frag), we use a pass after initial
     assembly to fill in the assembly states.  */

  unsigned int is_assembly_state_set : 1;
  unsigned int is_no_density : 1;
  unsigned int is_no_transform : 1;
  unsigned int use_longcalls : 1;
  unsigned int use_absolute_literals : 1;

  /* Inhibits relaxation of machine-dependent alignment frags the
     first time through a relaxation....  */
  unsigned int relax_seen : 1;

  /* Information that is needed in the object file and set when known.  */
  unsigned int is_literal : 1;
  unsigned int is_loop_target : 1;
  unsigned int is_branch_target : 1;
  unsigned int is_insn : 1;
  unsigned int is_unreachable : 1;

  unsigned int is_specific_opcode : 1; /* also implies no_transform */

  unsigned int is_align : 1;
  unsigned int is_text_align : 1;
  unsigned int alignment : 5;

  /* A frag with this bit set is the first in a loop that actually
     contains an instruction.  */
  unsigned int is_first_loop_insn : 1;

  /* A frag with this bit set is a branch that we are using to
     align branch targets as if it were a normal narrow instruction.  */
  unsigned int is_aligning_branch : 1;

  /* For text fragments that can generate literals at relax time, this
     variable points to the frag where the literal will be stored.  For
     literal frags, this variable points to the nearest literal pool
     location frag.  This literal frag will be moved to after this
     location.  For RELAX_LITERAL_POOL_BEGIN frags, this field points
     to the frag immediately before the corresponding RELAX_LITERAL_POOL_END
     frag, to make moving frags for this literal pool efficient.  */
  fragS *literal_frag;

  /* The destination segment for literal frags.  (Note that this is only
     valid after xtensa_move_literals.)  This field is also used for
     LITERAL_POOL_END frags.  */
  segT lit_seg;

  /* Frag chain for LITERAL_POOL_BEGIN frags.  */
  struct frchain *lit_frchain;

  /* For the relaxation scheme, some literal fragments can have their
     expansions modified by an instruction that relaxes.  */
  int text_expansion[MAX_SLOTS];
  int literal_expansion[MAX_SLOTS];
  int unreported_expansion;

  /* For slots that have a free register for relaxation, record that
     register.  */
  expressionS free_reg[MAX_SLOTS];

  /* For text fragments that can generate literals at relax time:  */
  fragS *literal_frags[MAX_SLOTS];
  enum xtensa_relax_statesE slot_subtypes[MAX_SLOTS];
  symbolS *slot_symbols[MAX_SLOTS];
  offsetT slot_offsets[MAX_SLOTS];

  /* When marking frags after this one in the chain as no transform,
     cache the last one in the chain, so that we can skip to the
     end of the chain.  */
  fragS *no_transform_end;
};


/* For VLIW support, we need to know what slot a fixup applies to.  */
typedef struct xtensa_fix_data_struct
{
  int slot;
  symbolS *X_add_symbol;
  offsetT X_add_number;
} xtensa_fix_data;


/* Structure to record xtensa-specific symbol information.  */
typedef struct xtensa_symfield_type
{
  unsigned int is_loop_target : 1;
  unsigned int is_branch_target : 1;
  symbolS *next_expr_symbol;
} xtensa_symfield_type;


/* Structure for saving information about a block of property data
   for frags that have the same flags.   The forward reference is
   in this header file.  The actual definition is in tc-xtensa.c.  */
struct xtensa_block_info_struct;
typedef struct xtensa_block_info_struct xtensa_block_info;


/* Property section types.  */
typedef enum
{
  xt_literal_sec,
  xt_prop_sec,
  max_xt_sec
} xt_section_type;

typedef struct xtensa_segment_info_struct
{
  fragS *literal_pool_loc;
  xtensa_block_info *blocks[max_xt_sec];
} xtensa_segment_info;


extern const char *xtensa_target_format (void);
extern void xtensa_init_fix_data (struct fix *);
extern void xtensa_frag_init (fragS *);
extern int xtensa_force_relocation (struct fix *);
extern int xtensa_validate_fix_sub (struct fix *);
extern void xtensa_frob_label (struct symbol *);
extern void xtensa_end (void);
extern void xtensa_post_relax_hook (void);
extern void xtensa_file_arch_init (bfd *);
extern void xtensa_flush_pending_output (void);
extern bfd_boolean xtensa_fix_adjustable (struct fix *);
extern void xtensa_symbol_new_hook (symbolS *);
extern long xtensa_relax_frag (fragS *, long, int *);
extern void xtensa_elf_section_change_hook (void);
extern int xtensa_unrecognized_line (int);
extern bfd_boolean xtensa_check_inside_bundle (void);
extern void xtensa_handle_align (fragS *);
extern char *xtensa_section_rename (char *);

#define TARGET_FORMAT			xtensa_target_format ()
#define TARGET_ARCH			bfd_arch_xtensa
#define TC_SEGMENT_INFO_TYPE		xtensa_segment_info
#define TC_SYMFIELD_TYPE                struct xtensa_symfield_type
#define TC_FIX_TYPE			xtensa_fix_data
#define TC_INIT_FIX_DATA(x)		xtensa_init_fix_data (x)
#define TC_FRAG_TYPE			struct xtensa_frag_type
#define TC_FRAG_INIT(frag)		xtensa_frag_init (frag)
#define TC_FORCE_RELOCATION(fix)	xtensa_force_relocation (fix)
#define TC_FORCE_RELOCATION_SUB_SAME(fix, seg) \
  (! SEG_NORMAL (seg) || xtensa_force_relocation (fix))
#define	TC_VALIDATE_FIX_SUB(fix, seg)	xtensa_validate_fix_sub (fix)
#define NO_PSEUDO_DOT			xtensa_check_inside_bundle ()
#define tc_canonicalize_symbol_name(s)	xtensa_section_rename (s)
#define tc_canonicalize_section_name(s)	xtensa_section_rename (s)
#define tc_init_after_args()		xtensa_file_arch_init (stdoutput)
#define tc_fix_adjustable(fix)		xtensa_fix_adjustable (fix)
#define tc_frob_label(sym)		xtensa_frob_label (sym)
#define tc_unrecognized_line(ch)	xtensa_unrecognized_line (ch)
#define tc_symbol_new_hook(sym)		xtensa_symbol_new_hook (sym)
#define md_do_align(a,b,c,d,e)		xtensa_flush_pending_output ()
#define md_elf_section_change_hook	xtensa_elf_section_change_hook
#define md_end				xtensa_end
#define md_flush_pending_output()	xtensa_flush_pending_output ()
#define md_operand(x)
#define TEXT_SECTION_NAME		xtensa_section_rename (".text")
#define DATA_SECTION_NAME		xtensa_section_rename (".data")
#define BSS_SECTION_NAME		xtensa_section_rename (".bss")
#define HANDLE_ALIGN(fragP)		xtensa_handle_align (fragP)
#define MAX_MEM_FOR_RS_ALIGN_CODE	1


/* The renumber_section function must be mapped over all the sections
   after calling xtensa_post_relax_hook.  That function is static in
   write.c so it cannot be called from xtensa_post_relax_hook itself.  */

#define md_post_relax_hook \
  do \
    { \
      int i = 0; \
      xtensa_post_relax_hook (); \
      bfd_map_over_sections (stdoutput, renumber_sections, &i); \
    } \
  while (0)


/* Because xtensa relaxation can insert a new literal into the middle of
   fragment and thus require re-running the relaxation pass on the
   section, we need an explicit flag here.  We explicitly use the name
   "stretched" here to avoid changing the source code in write.c.  */

#define md_relax_frag(segment, fragP, stretch) \
  xtensa_relax_frag (fragP, stretch, &stretched)

/* Only allow call frame debug info optimization when linker relaxation is
   not enabled as otherwise we could generate the DWARF directives without
   the relocs necessary to patch them up.  */
#define md_allow_eh_opt (linkrelax == 0)

#define LOCAL_LABELS_FB 1
#define WORKING_DOT_WORD 1
#define DOUBLESLASH_LINE_COMMENTS
#define TC_HANDLES_FX_DONE
#define TC_FINALIZE_SYMS_BEFORE_SIZE_SEG 0
#define TC_LINKRELAX_FIXUP(SEG) 0
#define MD_APPLY_SYM_VALUE(FIX) 0
#define SUB_SEGMENT_ALIGN(SEG, FRCHAIN) 0

/* Use line number format that is amenable to linker relaxation.  */
#define DWARF2_USE_FIXED_ADVANCE_PC (linkrelax != 0)


/* Resource reservation info functions.  */

/* Returns the number of copies of a particular unit.  */
typedef int (*unit_num_copies_func) (void *, xtensa_funcUnit);

/* Returns the number of units the opcode uses.  */
typedef int (*opcode_num_units_func) (void *, xtensa_opcode);

/* Given an opcode and an index into the opcode's funcUnit list,
   returns the unit used for the index.  */
typedef int (*opcode_funcUnit_use_unit_func) (void *, xtensa_opcode, int);

/* Given an opcode and an index into the opcode's funcUnit list,
   returns the cycle during which the unit is used.  */
typedef int (*opcode_funcUnit_use_stage_func) (void *, xtensa_opcode, int);

/* The above typedefs parameterize the resource_table so that the
   optional scheduler doesn't need its own resource reservation system.

   For simple resource checking, which is all that happens normally,
   the functions will be as follows (with some wrapping to make the
   interface more convenient):

   unit_num_copies_func = xtensa_funcUnit_num_copies
   opcode_num_units_func = xtensa_opcode_num_funcUnit_uses
   opcode_funcUnit_use_unit_func = xtensa_opcode_funcUnit_use->unit
   opcode_funcUnit_use_stage_func = xtensa_opcode_funcUnit_use->stage

   Of course the optional scheduler has its own reservation table
   and functions.  */

int opcode_funcUnit_use_unit (void *, xtensa_opcode, int);
int opcode_funcUnit_use_stage (void *, xtensa_opcode, int);

typedef struct
{
  void *data;
  int cycles;
  int allocated_cycles;
  int num_units;
  unit_num_copies_func unit_num_copies;
  opcode_num_units_func opcode_num_units;
  opcode_funcUnit_use_unit_func opcode_unit_use;
  opcode_funcUnit_use_stage_func opcode_unit_stage;
  unsigned char **units;
} resource_table;

resource_table *new_resource_table
  (void *, int, int, unit_num_copies_func, opcode_num_units_func,
   opcode_funcUnit_use_unit_func, opcode_funcUnit_use_stage_func);
void resize_resource_table (resource_table *, int);
void clear_resource_table (resource_table *);
bfd_boolean resources_available (resource_table *, xtensa_opcode, int);
void reserve_resources (resource_table *, xtensa_opcode, int);
void release_resources (resource_table *, xtensa_opcode, int);

#endif /* TC_XTENSA */
Commit	Line	Data
e0001a05	1	/* tc-xtensa.h -- Header file for tc-xtensa.c.
aa820537 AM	2	Copyright (C) 2003, 2004, 2005, 2006, 2007, 2008, 2009
aa820537 AM	3	Free Software Foundation, Inc.
e0001a05 NC	4
	5	This file is part of GAS, the GNU Assembler.
	6
	7	GAS is free software; you can redistribute it and/or modify
	8	it under the terms of the GNU General Public License as published by
ec2655a6	9	the Free Software Foundation; either version 3, or (at your option)
e0001a05 NC	10	any later version.
	11
	12	GAS is distributed in the hope that it will be useful,
	13	but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	GNU General Public License for more details.
	16
	17	You should have received a copy of the GNU General Public License
	18	along with GAS; see the file COPYING. If not, write to the Free
4b4da160 NC	19	Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
4b4da160 NC	20	02110-1301, USA. */
e0001a05 NC	21
	22	#ifndef TC_XTENSA
	23	#define TC_XTENSA 1
	24
e0001a05	25	struct fix;
e0001a05	26
e0001a05 NC	27	#ifndef OBJ_ELF
	28	#error Xtensa support requires ELF object format
	29	#endif
	30
43cd72b9	31	#include "xtensa-isa.h"
e0001a05 NC	32	#include "xtensa-config.h"
	33
	34	#define TARGET_BYTES_BIG_ENDIAN XCHAL_HAVE_BE
	35
	36
43cd72b9	37	/* Maximum number of opcode slots in a VLIW instruction. */
b08b5071	38	#define MAX_SLOTS 15
43cd72b9 BW	39
	40
	41	/* For all xtensa relax states except RELAX_DESIRE_ALIGN and
	42	RELAX_DESIRE_ALIGN_IF_TARGET, the amount a frag might grow is stored
	43	in the fr_var field. For the two exceptions, fr_var is a float value
	44	that records the frequency with which the following instruction is
	45	executed as a branch target. The aligner uses this information to
	46	tell which targets are most important to be aligned. */
	47
	48	enum xtensa_relax_statesE
	49	{
58502fec BW	50	RELAX_XTENSA_NONE,
58502fec BW	51
43cd72b9 BW	52	RELAX_ALIGN_NEXT_OPCODE,
	53	/* Use the first opcode of the next fragment to determine the
	54	alignment requirements. This is ONLY used for LOOPs currently. */
	55
	56	RELAX_CHECK_ALIGN_NEXT_OPCODE,
	57	/* The next non-empty frag contains a loop instruction. Check to see
	58	if it is correctly aligned, but do not align it. */
	59
	60	RELAX_DESIRE_ALIGN_IF_TARGET,
	61	/* These are placed in front of labels and converted to either
	62	RELAX_DESIRE_ALIGN / RELAX_LOOP_END or rs_fill of 0 before
	63	relaxation begins. */
	64
	65	RELAX_ADD_NOP_IF_A0_B_RETW,
	66	/* These are placed in front of conditional branches. Before
	67	relaxation begins, they are turned into either NOPs for branches
	68	immediately followed by RETW or RETW.N or rs_fills of 0. This is
	69	used to avoid a hardware bug in some early versions of the
	70	processor. */
	71
	72	RELAX_ADD_NOP_IF_PRE_LOOP_END,
	73	/* These are placed after JX instructions. Before relaxation begins,
	74	they are turned into either NOPs, if the JX is one instruction
	75	before a loop end label, or rs_fills of 0. This is used to avoid a
	76	hardware interlock issue prior to Xtensa version T1040. */
	77
	78	RELAX_ADD_NOP_IF_SHORT_LOOP,
	79	/* These are placed after LOOP instructions and turned into NOPs when:
	80	(1) there are less than 3 instructions in the loop; we place 2 of
	81	these in a row to add up to 2 NOPS in short loops; or (2) the
	82	instructions in the loop do not include a branch or jump.
	83	Otherwise they are turned into rs_fills of 0 before relaxation
	84	begins. This is used to avoid hardware bug PR3830. */
	85
	86	RELAX_ADD_NOP_IF_CLOSE_LOOP_END,
	87	/* These are placed after LOOP instructions and turned into NOPs if
	88	there are less than 12 bytes to the end of some other loop's end.
	89	Otherwise they are turned into rs_fills of 0 before relaxation
	90	begins. This is used to avoid hardware bug PR3830. */
	91
	92	RELAX_DESIRE_ALIGN,
	93	/* The next fragment would like its first instruction to NOT cross an
	94	instruction fetch boundary. */
	95
	96	RELAX_MAYBE_DESIRE_ALIGN,
	97	/* The next fragment might like its first instruction to NOT cross an
	98	instruction fetch boundary. These are placed after a branch that
	99	might be relaxed. If the branch is relaxed, then this frag will be
	100	a branch target and this frag will be changed to RELAX_DESIRE_ALIGN
	101	frag. */
	102
	103	RELAX_LOOP_END,
	104	/* This will be turned into a NOP or NOP.N if the previous instruction
	105	is expanded to negate a loop. */
	106
	107	RELAX_LOOP_END_ADD_NOP,
	108	/* When the code density option is available, this will generate a
	109	NOP.N marked RELAX_NARROW. Otherwise, it will create an rs_fill
3b492825 BW	110	fragment with a NOP in it. Once a frag has been converted to
	111	RELAX_LOOP_END_ADD_NOP, it should never be changed back to
	112	RELAX_LOOP_END. */
43cd72b9 BW	113
	114	RELAX_LITERAL,
	115	/* Another fragment could generate an expansion here but has not yet. */
	116
	117	RELAX_LITERAL_NR,
	118	/* Expansion has been generated by an instruction that generates a
	119	literal. However, the stretch has NOT been reported yet in this
	120	fragment. */
	121
	122	RELAX_LITERAL_FINAL,
	123	/* Expansion has been generated by an instruction that generates a
	124	literal. */
	125
	126	RELAX_LITERAL_POOL_BEGIN,
	127	RELAX_LITERAL_POOL_END,
	128	/* Technically these are not relaxations at all but mark a location
	129	to store literals later. Note that fr_var stores the frchain for
	130	BEGIN frags and fr_var stores now_seg for END frags. */
	131
	132	RELAX_NARROW,
	133	/* The last instruction in this fragment (at->fr_opcode) can be
	134	freely replaced with a single wider instruction if a future
	135	alignment desires or needs it. */
	136
	137	RELAX_IMMED,
	138	/* The last instruction in this fragment (at->fr_opcode) contains
b81bf389 BW	139	an immediate or symbol. If the value does not fit, relax the
b81bf389 BW	140	opcode using expansions from the relax table. */
c138bc38	141
43cd72b9 BW	142	RELAX_IMMED_STEP1,
43cd72b9 BW	143	/* The last instruction in this fragment (at->fr_opcode) contains a
b81bf389	144	literal. It has already been expanded 1 step. */
43cd72b9 BW	145
	146	RELAX_IMMED_STEP2,
	147	/* The last instruction in this fragment (at->fr_opcode) contains a
b81bf389 BW	148	literal. It has already been expanded 2 steps. */
	149
	150	RELAX_IMMED_STEP3,
	151	/* The last instruction in this fragment (at->fr_opcode) contains a
	152	literal. It has already been expanded 3 steps. */
43cd72b9 BW	153
	154	RELAX_SLOTS,
	155	/* There are instructions within the last VLIW instruction that need
	156	relaxation. Find the relaxation based on the slot info in
	157	xtensa_frag_type. Relaxations that deal with particular opcodes
	158	are slot-based (e.g., converting a MOVI to an L32R). Relaxations
	159	that deal with entire instructions, such as alignment, are not
	160	slot-based. */
	161
	162	RELAX_FILL_NOP,
	163	/* This marks the location of a pipeline stall. We can fill these guys
	164	in for alignment of any size. */
	165
	166	RELAX_UNREACHABLE,
	167	/* This marks the location as unreachable. The assembler may widen or
	168	narrow this area to meet alignment requirements of nearby
	169	instructions. */
	170
	171	RELAX_MAYBE_UNREACHABLE,
	172	/* This marks the location as possibly unreachable. These are placed
	173	after a branch that may be relaxed into a branch and jump. If the
c138bc38	174	branch is relaxed, then this frag will be converted to a
43cd72b9 BW	175	RELAX_UNREACHABLE frag. */
43cd72b9 BW	176
99ded152 BW	177	RELAX_ORG,
	178	/* This marks the location as having previously been an rs_org frag.
	179	rs_org frags are converted to fill-zero frags immediately after
	180	relaxation. However, we need to remember where they were so we can
	181	prevent the linker from changing the size of any frag between the
	182	section start and the org frag. */
	183
43cd72b9 BW	184	RELAX_NONE
	185	};
	186
	187	/* This is used as a stopper to bound the number of steps that
	188	can be taken. */
b81bf389	189	#define RELAX_IMMED_MAXSTEPS (RELAX_IMMED_STEP3 - RELAX_IMMED)
43cd72b9	190
e0001a05 NC	191	struct xtensa_frag_type
e0001a05 NC	192	{
43cd72b9 BW	193	/* Info about the current state of assembly, e.g., transform,
	194	absolute_literals, etc. These need to be passed to the backend and
	195	then to the object file.
	196
	197	When is_assembly_state_set is false, the frag inherits some of the
	198	state settings from the previous frag in this segment. Because it
	199	is not possible to intercept all fragment closures (frag_more and
	200	frag_append_1_char can close a frag), we use a pass after initial
	201	assembly to fill in the assembly states. */
	202
	203	unsigned int is_assembly_state_set : 1;
	204	unsigned int is_no_density : 1;
	205	unsigned int is_no_transform : 1;
7c834684	206	unsigned int use_longcalls : 1;
43cd72b9 BW	207	unsigned int use_absolute_literals : 1;
	208
	209	/* Inhibits relaxation of machine-dependent alignment frags the
	210	first time through a relaxation.... */
	211	unsigned int relax_seen : 1;
	212
0fa77c95	213	/* Information that is needed in the object file and set when known. */
43cd72b9 BW	214	unsigned int is_literal : 1;
	215	unsigned int is_loop_target : 1;
	216	unsigned int is_branch_target : 1;
	217	unsigned int is_insn : 1;
	218	unsigned int is_unreachable : 1;
e0001a05	219
43cd72b9	220	unsigned int is_specific_opcode : 1; /* also implies no_transform */
e0001a05	221
43cd72b9 BW	222	unsigned int is_align : 1;
	223	unsigned int is_text_align : 1;
	224	unsigned int alignment : 5;
	225
	226	/* A frag with this bit set is the first in a loop that actually
	227	contains an instruction. */
	228	unsigned int is_first_loop_insn : 1;
e0001a05	229
b5e4a23d BW	230	/* A frag with this bit set is a branch that we are using to
	231	align branch targets as if it were a normal narrow instruction. */
	232	unsigned int is_aligning_branch : 1;
	233
e0001a05 NC	234	/* For text fragments that can generate literals at relax time, this
	235	variable points to the frag where the literal will be stored. For
	236	literal frags, this variable points to the nearest literal pool
	237	location frag. This literal frag will be moved to after this
c48aaca0 BW	238	location. For RELAX_LITERAL_POOL_BEGIN frags, this field points
	239	to the frag immediately before the corresponding RELAX_LITERAL_POOL_END
	240	frag, to make moving frags for this literal pool efficient. */
e0001a05 NC	241	fragS *literal_frag;
	242
	243	/* The destination segment for literal frags. (Note that this is only
dd49a749 BW	244	valid after xtensa_move_literals.) This field is also used for
dd49a749 BW	245	LITERAL_POOL_END frags. */
e0001a05 NC	246	segT lit_seg;
e0001a05 NC	247
dd49a749 BW	248	/* Frag chain for LITERAL_POOL_BEGIN frags. */
	249	struct frchain *lit_frchain;
	250
e0001a05 NC	251	/* For the relaxation scheme, some literal fragments can have their
e0001a05 NC	252	expansions modified by an instruction that relaxes. */
43cd72b9 BW	253	int text_expansion[MAX_SLOTS];
	254	int literal_expansion[MAX_SLOTS];
	255	int unreported_expansion;
	256
19e8f41a BW	257	/* For slots that have a free register for relaxation, record that
	258	register. */
	259	expressionS free_reg[MAX_SLOTS];
	260
43cd72b9 BW	261	/* For text fragments that can generate literals at relax time: */
	262	fragS *literal_frags[MAX_SLOTS];
	263	enum xtensa_relax_statesE slot_subtypes[MAX_SLOTS];
	264	symbolS *slot_symbols[MAX_SLOTS];
43cd72b9 BW	265	offsetT slot_offsets[MAX_SLOTS];
43cd72b9 BW	266
983f90e3 SA	267	/* When marking frags after this one in the chain as no transform,
	268	cache the last one in the chain, so that we can skip to the
	269	end of the chain. */
	270	fragS *no_transform_end;
e0001a05 NC	271	};
e0001a05 NC	272
43cd72b9 BW	273
	274	/* For VLIW support, we need to know what slot a fixup applies to. */
	275	typedef struct xtensa_fix_data_struct
	276	{
	277	int slot;
	278	symbolS *X_add_symbol;
	279	offsetT X_add_number;
	280	} xtensa_fix_data;
	281
	282
	283	/* Structure to record xtensa-specific symbol information. */
	284	typedef struct xtensa_symfield_type
e0001a05	285	{
43cd72b9 BW	286	unsigned int is_loop_target : 1;
43cd72b9 BW	287	unsigned int is_branch_target : 1;
6a7eedfe	288	symbolS *next_expr_symbol;
43cd72b9 BW	289	} xtensa_symfield_type;
	290
	291
	292	/* Structure for saving information about a block of property data
	293	for frags that have the same flags. The forward reference is
	294	in this header file. The actual definition is in tc-xtensa.c. */
	295	struct xtensa_block_info_struct;
	296	typedef struct xtensa_block_info_struct xtensa_block_info;
	297
e0001a05	298
43cd72b9	299	/* Property section types. */
e0001a05 NC	300	typedef enum
e0001a05 NC	301	{
e0001a05	302	xt_literal_sec,
43cd72b9	303	xt_prop_sec,
e0001a05 NC	304	max_xt_sec
	305	} xt_section_type;
	306
	307	typedef struct xtensa_segment_info_struct
	308	{
	309	fragS *literal_pool_loc;
	310	xtensa_block_info *blocks[max_xt_sec];
	311	} xtensa_segment_info;
	312
e0001a05	313
7fa3d080 BW	314	extern const char *xtensa_target_format (void);
	315	extern void xtensa_init_fix_data (struct fix *);
	316	extern void xtensa_frag_init (fragS *);
	317	extern int xtensa_force_relocation (struct fix *);
30f725a1	318	extern int xtensa_validate_fix_sub (struct fix *);
7fa3d080 BW	319	extern void xtensa_frob_label (struct symbol *);
	320	extern void xtensa_end (void);
	321	extern void xtensa_post_relax_hook (void);
	322	extern void xtensa_file_arch_init (bfd *);
	323	extern void xtensa_flush_pending_output (void);
	324	extern bfd_boolean xtensa_fix_adjustable (struct fix *);
	325	extern void xtensa_symbol_new_hook (symbolS *);
	326	extern long xtensa_relax_frag (fragS , long, int );
	327	extern void xtensa_elf_section_change_hook (void);
	328	extern int xtensa_unrecognized_line (int);
	329	extern bfd_boolean xtensa_check_inside_bundle (void);
	330	extern void xtensa_handle_align (fragS *);
9456465c	331	extern char xtensa_section_rename (char );
e0001a05 NC	332
	333	#define TARGET_FORMAT xtensa_target_format ()
	334	#define TARGET_ARCH bfd_arch_xtensa
	335	#define TC_SEGMENT_INFO_TYPE xtensa_segment_info
43cd72b9 BW	336	#define TC_SYMFIELD_TYPE struct xtensa_symfield_type
	337	#define TC_FIX_TYPE xtensa_fix_data
	338	#define TC_INIT_FIX_DATA(x) xtensa_init_fix_data (x)
e0001a05 NC	339	#define TC_FRAG_TYPE struct xtensa_frag_type
e0001a05 NC	340	#define TC_FRAG_INIT(frag) xtensa_frag_init (frag)
43cd72b9	341	#define TC_FORCE_RELOCATION(fix) xtensa_force_relocation (fix)
30f725a1 BW	342	#define TC_FORCE_RELOCATION_SUB_SAME(fix, seg) \
30f725a1 BW	343	(! SEG_NORMAL (seg) \|\| xtensa_force_relocation (fix))
5db484ff	344	#define TC_VALIDATE_FIX_SUB(fix, seg) xtensa_validate_fix_sub (fix)
43cd72b9	345	#define NO_PSEUDO_DOT xtensa_check_inside_bundle ()
e0001a05	346	#define tc_canonicalize_symbol_name(s) xtensa_section_rename (s)
9456465c	347	#define tc_canonicalize_section_name(s) xtensa_section_rename (s)
e0001a05 NC	348	#define tc_init_after_args() xtensa_file_arch_init (stdoutput)
	349	#define tc_fix_adjustable(fix) xtensa_fix_adjustable (fix)
	350	#define tc_frob_label(sym) xtensa_frob_label (sym)
43cd72b9	351	#define tc_unrecognized_line(ch) xtensa_unrecognized_line (ch)
6a7eedfe	352	#define tc_symbol_new_hook(sym) xtensa_symbol_new_hook (sym)
43cd72b9 BW	353	#define md_do_align(a,b,c,d,e) xtensa_flush_pending_output ()
43cd72b9 BW	354	#define md_elf_section_change_hook xtensa_elf_section_change_hook
e0001a05 NC	355	#define md_end xtensa_end
	356	#define md_flush_pending_output() xtensa_flush_pending_output ()
	357	#define md_operand(x)
	358	#define TEXT_SECTION_NAME xtensa_section_rename (".text")
	359	#define DATA_SECTION_NAME xtensa_section_rename (".data")
	360	#define BSS_SECTION_NAME xtensa_section_rename (".bss")
43cd72b9	361	#define HANDLE_ALIGN(fragP) xtensa_handle_align (fragP)
cf523b8e	362	#define MAX_MEM_FOR_RS_ALIGN_CODE 1
e0001a05 NC	363
	364
	365	/* The renumber_section function must be mapped over all the sections
	366	after calling xtensa_post_relax_hook. That function is static in
	367	write.c so it cannot be called from xtensa_post_relax_hook itself. */
	368
	369	#define md_post_relax_hook \
	370	do \
	371	{ \
	372	int i = 0; \
	373	xtensa_post_relax_hook (); \
	374	bfd_map_over_sections (stdoutput, renumber_sections, &i); \
	375	} \
	376	while (0)
	377
	378
	379	/* Because xtensa relaxation can insert a new literal into the middle of
	380	fragment and thus require re-running the relaxation pass on the
	381	section, we need an explicit flag here. We explicitly use the name
	382	"stretched" here to avoid changing the source code in write.c. */
	383
	384	#define md_relax_frag(segment, fragP, stretch) \
	385	xtensa_relax_frag (fragP, stretch, &stretched)
	386
ee6365aa BW	387	/* Only allow call frame debug info optimization when linker relaxation is
	388	not enabled as otherwise we could generate the DWARF directives without
	389	the relocs necessary to patch them up. */
	390	#define md_allow_eh_opt (linkrelax == 0)
e0001a05 NC	391
	392	#define LOCAL_LABELS_FB 1
	393	#define WORKING_DOT_WORD 1
	394	#define DOUBLESLASH_LINE_COMMENTS
	395	#define TC_HANDLES_FX_DONE
	396	#define TC_FINALIZE_SYMS_BEFORE_SIZE_SEG 0
43cd72b9	397	#define TC_LINKRELAX_FIXUP(SEG) 0
e0001a05	398	#define MD_APPLY_SYM_VALUE(FIX) 0
43cd72b9 BW	399	#define SUB_SEGMENT_ALIGN(SEG, FRCHAIN) 0
43cd72b9 BW	400
1737851b BW	401	/* Use line number format that is amenable to linker relaxation. */
	402	#define DWARF2_USE_FIXED_ADVANCE_PC (linkrelax != 0)
	403
43cd72b9 BW	404
	405	/* Resource reservation info functions. */
	406
	407	/* Returns the number of copies of a particular unit. */
	408	typedef int (unit_num_copies_func) (void , xtensa_funcUnit);
	409
	410	/* Returns the number of units the opcode uses. */
	411	typedef int (opcode_num_units_func) (void , xtensa_opcode);
	412
c138bc38	413	/* Given an opcode and an index into the opcode's funcUnit list,
43cd72b9 BW	414	returns the unit used for the index. */
	415	typedef int (opcode_funcUnit_use_unit_func) (void , xtensa_opcode, int);
	416
c138bc38	417	/* Given an opcode and an index into the opcode's funcUnit list,
43cd72b9 BW	418	returns the cycle during which the unit is used. */
	419	typedef int (opcode_funcUnit_use_stage_func) (void , xtensa_opcode, int);
	420
c138bc38	421	/* The above typedefs parameterize the resource_table so that the
43cd72b9	422	optional scheduler doesn't need its own resource reservation system.
c138bc38 BW	423
	424	For simple resource checking, which is all that happens normally,
	425	the functions will be as follows (with some wrapping to make the
	426	interface more convenient):
43cd72b9 BW	427
	428	unit_num_copies_func = xtensa_funcUnit_num_copies
	429	opcode_num_units_func = xtensa_opcode_num_funcUnit_uses
	430	opcode_funcUnit_use_unit_func = xtensa_opcode_funcUnit_use->unit
	431	opcode_funcUnit_use_stage_func = xtensa_opcode_funcUnit_use->stage
	432
c138bc38	433	Of course the optional scheduler has its own reservation table
43cd72b9 BW	434	and functions. */
43cd72b9 BW	435
7fa3d080 BW	436	int opcode_funcUnit_use_unit (void *, xtensa_opcode, int);
7fa3d080 BW	437	int opcode_funcUnit_use_stage (void *, xtensa_opcode, int);
43cd72b9 BW	438
	439	typedef struct
	440	{
	441	void *data;
	442	int cycles;
	443	int allocated_cycles;
	444	int num_units;
	445	unit_num_copies_func unit_num_copies;
	446	opcode_num_units_func opcode_num_units;
	447	opcode_funcUnit_use_unit_func opcode_unit_use;
	448	opcode_funcUnit_use_stage_func opcode_unit_stage;
0bf60745	449	unsigned char **units;
43cd72b9 BW	450	} resource_table;
43cd72b9 BW	451
c138bc38 BW	452	resource_table *new_resource_table
c138bc38 BW	453	(void *, int, int, unit_num_copies_func, opcode_num_units_func,
7fa3d080 BW	454	opcode_funcUnit_use_unit_func, opcode_funcUnit_use_stage_func);
	455	void resize_resource_table (resource_table *, int);
	456	void clear_resource_table (resource_table *);
	457	bfd_boolean resources_available (resource_table *, xtensa_opcode, int);
	458	void reserve_resources (resource_table *, xtensa_opcode, int);
	459	void release_resources (resource_table *, xtensa_opcode, int);
e0001a05	460
e0001a05	461	#endif /* TC_XTENSA */