PR 10437
[deliverable/binutils-gdb.git] / gas / config / xtensa-relax.h
CommitLineData
e0001a05 1/* Table of relaxations for Xtensa assembly.
28dbbc02 2 Copyright 2003, 2004, 2007, 2008 Free Software Foundation, Inc.
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3
4 This file is part of GAS, the GNU Assembler.
5
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
ec2655a6 8 the Free Software Foundation; either version 3, or (at your option)
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9 any later version.
10
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
c138bc38 18 the Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
4b4da160 19 MA 02110-1301, USA. */
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20
21#ifndef XTENSA_RELAX_H
22#define XTENSA_RELAX_H
23
24#include "xtensa-isa.h"
25
26
27/* Data structures for the table-driven relaxations for Xtensa processors.
28 See xtensa-relax.c for details. */
29
30typedef struct transition_list TransitionList;
31typedef struct transition_table TransitionTable;
32typedef struct transition_rule TransitionRule;
33typedef struct precondition_list PreconditionList;
34typedef struct precondition Precondition;
35
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36typedef struct req_or_option_list ReqOrOptionList;
37typedef struct req_or_option_list ReqOrOption;
38typedef struct req_option_list ReqOptionList;
39typedef struct req_option_list ReqOption;
40
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41struct transition_table
42{
43 int num_opcodes;
44 TransitionList **table; /* Possible transitions for each opcode. */
45};
46
47struct transition_list
48{
49 TransitionRule *rule;
50 TransitionList *next;
51};
52
53struct precondition_list
54{
55 Precondition *precond;
56 PreconditionList *next;
57};
58
59
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60/* The required options for a rule are represented with a two-level
61 structure, with leaf expressions combined by logical ORs at the
62 lower level, and the results then combined by logical ANDs at the
63 top level. The AND terms are linked in a list, and each one can
64 contain a reference to a list of OR terms. The leaf expressions,
65 i.e., the OR options, can be negated by setting the is_true field
66 to FALSE. There are two classes of leaf expressions: (1) those
67 that are properties of the Xtensa configuration and can be
68 evaluated once when building the tables, and (2) those that depend
69 of the state of directives or other settings that may vary during
70 the assembly. The following expressions may be used in group (1):
71
72 IsaUse*: Xtensa configuration settings.
73 realnop: TRUE if the instruction set includes a NOP instruction.
74
75 There are currently no expressions in group (2), but they are still
76 supported since there is a good chance they'll be needed again for
77 something. */
78
79struct req_option_list
80{
81 ReqOrOptionList *or_option_terms;
82 ReqOptionList *next;
83};
84
85struct req_or_option_list
86{
87 char *option_name;
88 bfd_boolean is_true;
89 ReqOrOptionList *next;
90};
91
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92/* Operand types and constraints on operands: */
93
94typedef enum op_type OpType;
95typedef enum cmp_op CmpOp;
96
97enum op_type
98{
99 OP_CONSTANT,
100 OP_OPERAND,
101 OP_OPERAND_LOW8, /* Sign-extended low 8 bits of immed. */
43cd72b9 102 OP_OPERAND_HI24S, /* High 24 bits of immed,
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103 plus 0x100 if low 8 bits are signed. */
104 OP_OPERAND_F32MINUS, /* 32 - immed. */
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105 OP_OPERAND_LOW16U, /* Low 16 bits of immed. */
106 OP_OPERAND_HI16U, /* High 16 bits of immed. */
e0001a05 107 OP_LITERAL,
19e8f41a 108 OP_FREEREG,
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109 OP_LABEL
110};
111
112enum cmp_op
113{
114 OP_EQUAL,
115 OP_NOTEQUAL,
116};
117
118struct precondition
119{
120 CmpOp cmp;
121 int op_num;
122 OpType typ; /* CONSTANT: op_data is a constant.
123 OPERAND: operand op_num must equal op_data.
124 Cannot be LITERAL or LABEL. */
125 int op_data;
126};
127
43cd72b9 128
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129typedef struct build_op BuildOp;
130
131struct build_op
132{
133 int op_num;
134 OpType typ;
135 unsigned op_data; /* CONSTANT: op_data is the value to encode.
136 OPERAND: op_data is the field in the
137 source instruction to take the value from
138 and encode in the op_num field here.
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139 LITERAL: op_data is field in the source
140 instruction that is stored in the literal.
141 LABEL: unused. */
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142 BuildOp *next;
143};
144
145typedef struct build_instr BuildInstr;
146typedef enum instr_type InstrType;
147
148enum instr_type
149{
150 INSTR_INSTR,
151 INSTR_LITERAL_DEF,
152 INSTR_LABEL_DEF
153};
154
155struct build_instr
156{
157 InstrType typ;
43cd72b9 158 xtensa_opcode opcode; /* Unused for LITERAL_DEF or LABEL_DEF. */
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159 BuildOp *ops;
160 BuildInstr *next;
161};
162
163struct transition_rule
164{
165 xtensa_opcode opcode;
166 PreconditionList *conditions;
43cd72b9 167 ReqOptionList *options;
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168 BuildInstr *to_instr;
169};
170
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171typedef int (*transition_cmp_fn) (const TransitionRule *,
172 const TransitionRule *);
173
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174extern TransitionTable *xg_build_simplify_table (transition_cmp_fn);
175extern TransitionTable *xg_build_widen_table (transition_cmp_fn);
e0001a05 176
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177extern bfd_boolean xg_has_userdef_op_fn (OpType);
178extern long xg_apply_userdef_op_fn (OpType, long);
e0001a05 179
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180enum flix_level
181{
182 FLIX_ALL,
183 FLIX_NO_GENERATE,
184 FLIX_NONE
185};
186
187extern enum flix_level produce_flix;
188
e0001a05 189#endif /* !XTENSA_RELAX_H */
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