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6840198f | 1 | .\" Automatically generated by Pod::Man version 1.02 |
63486801 | 2 | .\" Mon Jun 11 09:28:09 2001 |
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3 | .\" |
4 | .\" Standard preamble: | |
5 | .\" ====================================================================== | |
6 | .de Sh \" Subsection heading | |
252b5132 | 7 | .br |
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8 | .if t .Sp |
9 | .ne 5 | |
10 | .PP | |
11 | \fB\\$1\fR | |
12 | .PP | |
13 | .. | |
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15 | .if t .sp .5v |
16 | .if n .sp | |
17 | .. | |
6840198f | 18 | .de Ip \" List item |
252b5132 | 19 | .br |
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20 | .ie \\n(.$>=3 .ne \\$3 |
21 | .el .ne 3 | |
22 | .IP "\\$1" \\$2 | |
23 | .. | |
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25 | .ft CW |
26 | .nf | |
27 | .ne \\$1 | |
28 | .. | |
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30 | .ft R |
31 | ||
32 | .fi | |
33 | .. | |
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34 | .\" Set up some character translations and predefined strings. \*(-- will |
35 | .\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left | |
36 | .\" double quote, and \*(R" will give a right double quote. | will give a | |
37 | .\" real vertical bar. \*(C+ will give a nicer C++. Capital omega is used | |
38 | .\" to do unbreakable dashes and therefore won't be available. \*(C` and | |
39 | .\" \*(C' expand to `' in nroff, nothing in troff, for use with C<> | |
0285c67d | 40 | .tr \(*W-|\(bv\*(Tr |
6840198f | 41 | .ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p' |
0285c67d | 42 | .ie n \{\ |
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43 | . ds -- \(*W- |
44 | . ds PI pi | |
45 | . if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch | |
46 | . if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch | |
47 | . ds L" "" | |
48 | . ds R" "" | |
49 | . ds C` ` | |
50 | . ds C' ' | |
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51 | 'br\} |
52 | .el\{\ | |
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53 | . ds -- \|\(em\| |
54 | . ds PI \(*p | |
55 | . ds L" `` | |
56 | . ds R" '' | |
0285c67d | 57 | 'br\} |
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58 | .\" |
59 | .\" If the F register is turned on, we'll generate index entries on stderr | |
60 | .\" for titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and | |
61 | .\" index entries marked with X<> in POD. Of course, you'll have to process | |
62 | .\" the output yourself in some meaningful fashion. | |
63 | .if \nF \{\ | |
64 | . de IX | |
65 | . tm Index:\\$1\t\\n%\t"\\$2" | |
66 | . . | |
67 | . nr % 0 | |
68 | . rr F | |
0285c67d | 69 | .\} |
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70 | .\" |
71 | .\" For nroff, turn off justification. Always turn off hyphenation; it | |
72 | .\" makes way too many mistakes in technical documents. | |
73 | .hy 0 | |
74 | .\" | |
75 | .\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2). | |
76 | .\" Fear. Run. Save yourself. No user-serviceable parts. | |
0285c67d | 77 | .bd B 3 |
6840198f | 78 | . \" fudge factors for nroff and troff |
0285c67d | 79 | .if n \{\ |
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80 | . ds #H 0 |
81 | . ds #V .8m | |
82 | . ds #F .3m | |
83 | . ds #[ \f1 | |
84 | . ds #] \fP | |
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85 | .\} |
86 | .if t \{\ | |
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87 | . ds #H ((1u-(\\\\n(.fu%2u))*.13m) |
88 | . ds #V .6m | |
89 | . ds #F 0 | |
90 | . ds #[ \& | |
91 | . ds #] \& | |
0285c67d | 92 | .\} |
6840198f | 93 | . \" simple accents for nroff and troff |
0285c67d | 94 | .if n \{\ |
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95 | . ds ' \& |
96 | . ds ` \& | |
97 | . ds ^ \& | |
98 | . ds , \& | |
99 | . ds ~ ~ | |
100 | . ds / | |
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101 | .\} |
102 | .if t \{\ | |
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103 | . ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u" |
104 | . ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u' | |
105 | . ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u' | |
106 | . ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u' | |
107 | . ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u' | |
108 | . ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u' | |
0285c67d | 109 | .\} |
6840198f | 110 | . \" troff and (daisy-wheel) nroff accents |
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111 | .ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V' |
112 | .ds 8 \h'\*(#H'\(*b\h'-\*(#H' | |
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113 | .ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#] |
114 | .ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H' | |
115 | .ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u' | |
116 | .ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#] | |
117 | .ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#] | |
118 | .ds ae a\h'-(\w'a'u*4/10)'e | |
119 | .ds Ae A\h'-(\w'A'u*4/10)'E | |
6840198f | 120 | . \" corrections for vroff |
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121 | .if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u' |
122 | .if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u' | |
6840198f | 123 | . \" for low resolution devices (crt and lpr) |
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124 | .if \n(.H>23 .if \n(.V>19 \ |
125 | \{\ | |
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126 | . ds : e |
127 | . ds 8 ss | |
128 | . ds o a | |
129 | . ds d- d\h'-1'\(ga | |
130 | . ds D- D\h'-1'\(hy | |
131 | . ds th \o'bp' | |
132 | . ds Th \o'LP' | |
133 | . ds ae ae | |
134 | . ds Ae AE | |
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135 | .\} |
136 | .rm #[ #] #H #V #F C | |
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137 | .\" ====================================================================== |
138 | .\" | |
139 | .IX Title "AS 1" | |
63486801 | 140 | .TH AS 1 "binutils-2.11.90" "2001-06-11" "GNU" |
6840198f | 141 | .UC |
0285c67d | 142 | .SH "NAME" |
6840198f | 143 | \&\s-1AS\s0 \- the portable \s-1GNU\s0 assembler. |
0285c67d | 144 | .SH "SYNOPSIS" |
6840198f NC |
145 | .IX Header "SYNOPSIS" |
146 | as [ \-a[cdhlns][=file] ] [ \-D ] [ \-\-defsym \fIsym\fR=\fIval\fR ] | |
147 | [ \-f ] [ \-\-gstabs ] [ \-\-gdwarf2 ] [ \-\-help ] [ \-I \fIdir\fR ] | |
0285c67d | 148 | [ \-J ] [ \-K ] [ \-L ] |
6840198f NC |
149 | [ \-\-listing\*(--lhs-width=NUM ][ \-\-listing-lhs-width2=NUM ] |
150 | [ \-\-listing-rhs-width=NUM ][ \-\-listing-cont-lines=NUM ] | |
151 | [ \-\-keep-locals ] [ \-o \fIobjfile\fR ] [ \-R ] [ \-\-statistics ] [ \-v ] | |
152 | [ \-version ] [ \-\-version ] [ \-W ] [ \-\-warn ] [ \-\-fatal-warnings ] | |
153 | [ \-w ] [ \-x ] [ \-Z ] [ \-\-target-help ] | |
0285c67d NC |
154 | [ \-marc[5|6|7|8] ] |
155 | [ \-EB | \-EL ] | |
156 | [ \-m[arm]1 | \-m[arm]2 | \-m[arm]250 | \-m[arm]3 | | |
157 | \-m[arm]6 | \-m[arm]60 | \-m[arm]600 | \-m[arm]610 | | |
158 | \-m[arm]620 | \-m[arm]7[t][[d]m[i]][fe] | \-m[arm]70 | | |
159 | \-m[arm]700 | \-m[arm]710[c] | \-m[arm]7100 | | |
160 | \-m[arm]7500 | \-m[arm]8 | \-m[arm]810 | \-m[arm]9 | | |
161 | \-m[arm]920 | \-m[arm]920t | \-m[arm]9tdmi | | |
162 | \-mstrongarm | \-mstrongarm110 | \-mstrongarm1100 ] | |
163 | [ \-m[arm]v2 | \-m[arm]v2a | \-m[arm]v3 | \-m[arm]v3m | | |
164 | \-m[arm]v4 | \-m[arm]v4t | \-m[arm]v5 | \-[arm]v5t | | |
165 | \-[arm]v5te ] | |
166 | [ \-mthumb | \-mall ] | |
167 | [ \-mfpa10 | \-mfpa11 | \-mfpe-old | \-mno-fpu ] | |
168 | [ \-EB | \-EL ] | |
169 | [ \-mapcs-32 | \-mapcs-26 | \-mapcs-float | | |
170 | \-mapcs-reentrant ] | |
171 | [ \-mthumb-interwork ] [ \-moabi ] [ \-k ] | |
172 | [ \-O ] | |
173 | [ \-O | \-n | \-N ] | |
174 | [ \-mb | \-me ] | |
175 | [ \-Av6 | \-Av7 | \-Av8 | \-Asparclet | \-Asparclite | |
176 | \-Av8plus | \-Av8plusa | \-Av9 | \-Av9a ] | |
177 | [ \-xarch=v8plus | \-xarch=v8plusa ] [ \-bump ] | |
178 | [ \-32 | \-64 ] | |
179 | [ \-ACA | \-ACA_A | \-ACB | \-ACC | \-AKA | \-AKB | | |
180 | \-AKC | \-AMC ] | |
181 | [ \-b ] [ \-no-relax ] | |
6840198f NC |
182 | [ \-\-m32rx | \-\-[no-]warn-explicit-parallel-conflicts | |
183 | \-\-W[n]p ] | |
0285c67d NC |
184 | [ \-l ] [ \-m68000 | \-m68010 | \-m68020 | ... ] |
185 | [ \-jsri2bsr ] [ \-sifilter ] [ \-relax ] | |
186 | [ \-mcpu=[210|340] ] | |
187 | [ \-m68hc11 | \-m68hc12 ] | |
6840198f NC |
188 | [ \-\-force-long-branchs ] [ \-\-short-branchs ] |
189 | [ \-\-strict-direct-mode ] [ \-\-print-insn-syntax ] | |
190 | [ \-\-print-opcodes ] [ \-\-generate-example ] | |
191 | [ \-nocpp ] [ \-EL ] [ \-EB ] [ \-G \fInum\fR ] [ \-mcpu=\fI\s-1CPU\s0\fR ] | |
0285c67d NC |
192 | [ \-mips1 ] [ \-mips2 ] [ \-mips3 ] [ \-mips4 ] [ \-mips5 ] |
193 | [ \-mips32 ] [ \-mips64 ] | |
194 | [ \-m4650 ] [ \-no-m4650 ] | |
63486801 | 195 | [ \-\-trap ] [ \-\-break ] [ \-n ] |
6840198f NC |
196 | [ \-\-emulation=\fIname\fR ] |
197 | [ \*(-- | \fIfiles\fR ... ] | |
0285c67d | 198 | .SH "DESCRIPTION" |
6840198f NC |
199 | .IX Header "DESCRIPTION" |
200 | \&\s-1GNU\s0 \f(CW\*(C`as\*(C'\fR is really a family of assemblers. | |
201 | If you use (or have used) the \s-1GNU\s0 assembler on one architecture, you | |
252b5132 RH |
202 | should find a fairly similar environment when you use it on another |
203 | architecture. Each version has much in common with the others, | |
204 | including object file formats, most assembler directives (often called | |
6840198f | 205 | \&\fIpseudo-ops\fR) and assembler syntax. |
0285c67d | 206 | .PP |
6840198f NC |
207 | \&\f(CW\*(C`as\*(C'\fR is primarily intended to assemble the output of the |
208 | \&\s-1GNU\s0 C compiler for use by the linker | |
209 | \&. Nevertheless, we've tried to make \f(CW\*(C`as\*(C'\fR | |
0285c67d NC |
210 | assemble correctly everything that other assemblers for the same |
211 | machine would assemble. | |
212 | Any exceptions are documented explicitly. | |
6840198f | 213 | This doesn't mean \f(CW\*(C`as\*(C'\fR always uses the same syntax as another |
252b5132 RH |
214 | assembler for the same architecture; for example, we know of several |
215 | incompatible versions of 680x0 assembly language syntax. | |
0285c67d | 216 | .PP |
6840198f | 217 | Each time you run \f(CW\*(C`as\*(C'\fR it assembles exactly one source |
252b5132 RH |
218 | program. The source program is made up of one or more files. |
219 | (The standard input is also a file.) | |
0285c67d | 220 | .PP |
6840198f | 221 | You give \f(CW\*(C`as\*(C'\fR a command line that has zero or more input file |
0285c67d NC |
222 | names. The input files are read (from left file name to right). A |
223 | command line argument (in any position) that has no special meaning | |
224 | is taken to be an input file name. | |
225 | .PP | |
6840198f NC |
226 | If you give \f(CW\*(C`as\*(C'\fR no file names it attempts to read one input file |
227 | from the \f(CW\*(C`as\*(C'\fR standard input, which is normally your terminal. You | |
228 | may have to type \fBctl-D\fR to tell \f(CW\*(C`as\*(C'\fR there is no more program | |
0285c67d NC |
229 | to assemble. |
230 | .PP | |
6840198f | 231 | Use \fB\--\fR if you need to explicitly name the standard input file |
252b5132 | 232 | in your command line. |
0285c67d | 233 | .PP |
6840198f | 234 | If the source is empty, \f(CW\*(C`as\*(C'\fR produces a small, empty object |
0285c67d NC |
235 | file. |
236 | .PP | |
6840198f | 237 | \&\f(CW\*(C`as\*(C'\fR may write warnings and error messages to the standard error |
0285c67d | 238 | file (usually your terminal). This should not happen when a compiler |
6840198f NC |
239 | runs \f(CW\*(C`as\*(C'\fR automatically. Warnings report an assumption made so |
240 | that \f(CW\*(C`as\*(C'\fR could keep assembling a flawed program; errors report a | |
252b5132 | 241 | grave problem that stops the assembly. |
0285c67d | 242 | .PP |
6840198f | 243 | If you are invoking \f(CW\*(C`as\*(C'\fR via the \s-1GNU\s0 C compiler (version 2), |
0285c67d NC |
244 | you can use the \fB\-Wa\fR option to pass arguments through to the assembler. |
245 | The assembler arguments must be separated from each other (and the \fB\-Wa\fR) | |
246 | by commas. For example: | |
247 | .PP | |
6840198f | 248 | .Vb 1 |
0285c67d NC |
249 | \& gcc -c -g -O -Wa,-alh,-L file.c |
250 | .Ve | |
251 | This passes two options to the assembler: \fB\-alh\fR (emit a listing to | |
252 | standard output with with high-level and assembly source) and \fB\-L\fR (retain | |
253 | local symbols in the symbol table). | |
254 | .PP | |
255 | Usually you do not need to use this \fB\-Wa\fR mechanism, since many compiler | |
256 | command-line options are automatically passed to the assembler by the compiler. | |
6840198f | 257 | (You can call the \s-1GNU\s0 compiler driver with the \fB\-v\fR option to see |
0285c67d NC |
258 | precisely what options it passes to each compilation pass, including the |
259 | assembler.) | |
260 | .SH "OPTIONS" | |
6840198f NC |
261 | .IX Header "OPTIONS" |
262 | .Ip "\f(CW\*(C`\-a[cdhlmns]\*(C'\fR" 4 | |
263 | .IX Item "-a[cdhlmns]" | |
0285c67d | 264 | Turn on listings, in any of a variety of ways: |
6840198f NC |
265 | .RS 4 |
266 | .Ip "\f(CW\*(C`\-ac\*(C'\fR" 4 | |
267 | .IX Item "-ac" | |
0285c67d | 268 | omit false conditionals |
6840198f NC |
269 | .Ip "\f(CW\*(C`\-ad\*(C'\fR" 4 |
270 | .IX Item "-ad" | |
0285c67d | 271 | omit debugging directives |
6840198f NC |
272 | .Ip "\f(CW\*(C`\-ah\*(C'\fR" 4 |
273 | .IX Item "-ah" | |
0285c67d | 274 | include high-level source |
6840198f NC |
275 | .Ip "\f(CW\*(C`\-al\*(C'\fR" 4 |
276 | .IX Item "-al" | |
0285c67d | 277 | include assembly |
6840198f NC |
278 | .Ip "\f(CW\*(C`\-am\*(C'\fR" 4 |
279 | .IX Item "-am" | |
0285c67d | 280 | include macro expansions |
6840198f NC |
281 | .Ip "\f(CW\*(C`\-an\*(C'\fR" 4 |
282 | .IX Item "-an" | |
0285c67d | 283 | omit forms processing |
6840198f NC |
284 | .Ip "\f(CW\*(C`\-as\*(C'\fR" 4 |
285 | .IX Item "-as" | |
0285c67d | 286 | include symbols |
6840198f NC |
287 | .Ip "\f(CW\*(C`=file\*(C'\fR" 4 |
288 | .IX Item "=file" | |
0285c67d | 289 | set the name of the listing file |
6840198f NC |
290 | .RE |
291 | .RS 4 | |
0285c67d NC |
292 | .Sp |
293 | You may combine these options; for example, use \fB\-aln\fR for assembly | |
294 | listing without forms processing. The \fB=file\fR option, if used, must be | |
295 | the last one. By itself, \fB\-a\fR defaults to \fB\-ahls\fR. | |
6840198f NC |
296 | .RE |
297 | .Ip "\f(CW\*(C`\-D\*(C'\fR" 4 | |
298 | .IX Item "-D" | |
0285c67d NC |
299 | Ignored. This option is accepted for script compatibility with calls to |
300 | other assemblers. | |
6840198f NC |
301 | .Ip "\f(CW\*(C`\-\-defsym \f(CIsym\f(CW=\f(CIvalue\f(CW\*(C'\fR" 4 |
302 | .IX Item "--defsym sym=value" | |
0285c67d | 303 | Define the symbol \fIsym\fR to be \fIvalue\fR before assembling the input file. |
6840198f | 304 | \&\fIvalue\fR must be an integer constant. As in C, a leading \fB0x\fR |
0285c67d | 305 | indicates a hexadecimal value, and a leading \fB0\fR indicates an octal value. |
6840198f NC |
306 | .Ip "\f(CW\*(C`\-f\*(C'\fR" 4 |
307 | .IX Item "-f" | |
308 | ``fast''\-\-\-skip whitespace and comment preprocessing (assume source is | |
0285c67d | 309 | compiler output). |
6840198f NC |
310 | .Ip "\f(CW\*(C`\-\-gstabs\*(C'\fR" 4 |
311 | .IX Item "--gstabs" | |
252b5132 RH |
312 | Generate stabs debugging information for each assembler line. This |
313 | may help debugging assembler code, if the debugger can handle it. | |
6840198f NC |
314 | .Ip "\f(CW\*(C`\-\-gdwarf2\*(C'\fR" 4 |
315 | .IX Item "--gdwarf2" | |
0285c67d NC |
316 | Generate \s-1DWARF2\s0 debugging information for each assembler line. This |
317 | may help debugging assembler code, if the debugger can handle it. Note \- this | |
318 | option is only supported by some targets, not all of them. | |
6840198f NC |
319 | .Ip "\f(CW\*(C`\-\-help\*(C'\fR" 4 |
320 | .IX Item "--help" | |
0285c67d | 321 | Print a summary of the command line options and exit. |
6840198f NC |
322 | .Ip "\f(CW\*(C`\-\-target\-help\*(C'\fR" 4 |
323 | .IX Item "--target-help" | |
0285c67d | 324 | Print a summary of all target specific options and exit. |
6840198f NC |
325 | .Ip "\f(CW\*(C`\-I \f(CIdir\f(CW\*(C'\fR" 4 |
326 | .IX Item "-I dir" | |
327 | Add directory \fIdir\fR to the search list for \f(CW\*(C`.include\*(C'\fR directives. | |
328 | .Ip "\f(CW\*(C`\-J\*(C'\fR" 4 | |
329 | .IX Item "-J" | |
0285c67d | 330 | Don't warn about signed overflow. |
6840198f NC |
331 | .Ip "\f(CW\*(C`\-K\*(C'\fR" 4 |
332 | .IX Item "-K" | |
0285c67d | 333 | This option is accepted but has no effect on the \s-1TARGET\s0 family. |
6840198f NC |
334 | .Ip "\f(CW\*(C`\-L\*(C'\fR" 4 |
335 | .IX Item "-L" | |
336 | .Ip "\f(CW\*(C`\-\-keep\-locals\*(C'\fR" 4 | |
337 | .IX Item "--keep-locals" | |
0285c67d NC |
338 | Keep (in the symbol table) local symbols. On traditional a.out systems |
339 | these start with \fBL\fR, but different systems have different local | |
340 | label prefixes. | |
6840198f NC |
341 | .Ip "\f(CW\*(C`\-\-listing\-lhs\-width=\f(CInumber\f(CW\*(C'\fR" 4 |
342 | .IX Item "--listing-lhs-width=number" | |
0285c67d NC |
343 | Set the maximum width, in words, of the output data column for an assembler |
344 | listing to \fInumber\fR. | |
6840198f NC |
345 | .Ip "\f(CW\*(C`\-\-listing\-lhs\-width2=\f(CInumber\f(CW\*(C'\fR" 4 |
346 | .IX Item "--listing-lhs-width2=number" | |
0285c67d NC |
347 | Set the maximum width, in words, of the output data column for continuation |
348 | lines in an assembler listing to \fInumber\fR. | |
6840198f NC |
349 | .Ip "\f(CW\*(C`\-\-listing\-rhs\-width=\f(CInumber\f(CW\*(C'\fR" 4 |
350 | .IX Item "--listing-rhs-width=number" | |
0285c67d | 351 | Set the maximum width of an input source line, as displayed in a listing, to |
6840198f NC |
352 | \&\fInumber\fR bytes. |
353 | .Ip "\f(CW\*(C`\-\-listing\-cont\-lines=\f(CInumber\f(CW\*(C'\fR" 4 | |
354 | .IX Item "--listing-cont-lines=number" | |
0285c67d NC |
355 | Set the maximum number of lines printed in a listing for a single line of input |
356 | to \fInumber\fR + 1. | |
6840198f NC |
357 | .Ip "\f(CW\*(C`\-o \f(CIobjfile\f(CW\*(C'\fR" 4 |
358 | .IX Item "-o objfile" | |
359 | Name the object-file output from \f(CW\*(C`as\*(C'\fR \fIobjfile\fR. | |
360 | .Ip "\f(CW\*(C`\-R\*(C'\fR" 4 | |
361 | .IX Item "-R" | |
0285c67d | 362 | Fold the data section into the text section. |
6840198f NC |
363 | .Ip "\f(CW\*(C`\-\-statistics\*(C'\fR" 4 |
364 | .IX Item "--statistics" | |
0285c67d NC |
365 | Print the maximum space (in bytes) and total time (in seconds) used by |
366 | assembly. | |
6840198f NC |
367 | .Ip "\f(CW\*(C`\-\-strip\-local\-absolute\*(C'\fR" 4 |
368 | .IX Item "--strip-local-absolute" | |
0285c67d | 369 | Remove local absolute symbols from the outgoing symbol table. |
6840198f NC |
370 | .Ip "\f(CW\*(C`\-v\*(C'\fR" 4 |
371 | .IX Item "-v" | |
372 | .Ip "\f(CW\*(C`\-version\*(C'\fR" 4 | |
373 | .IX Item "-version" | |
374 | Print the \f(CW\*(C`as\*(C'\fR version. | |
375 | .Ip "\f(CW\*(C`\-\-version\*(C'\fR" 4 | |
376 | .IX Item "--version" | |
377 | Print the \f(CW\*(C`as\*(C'\fR version and exit. | |
378 | .Ip "\f(CW\*(C`\-W\*(C'\fR" 4 | |
379 | .IX Item "-W" | |
380 | .Ip "\f(CW\*(C`\-\-no\-warn\*(C'\fR" 4 | |
381 | .IX Item "--no-warn" | |
2bdd6cf5 | 382 | Suppress warning messages. |
6840198f NC |
383 | .Ip "\f(CW\*(C`\-\-fatal\-warnings\*(C'\fR" 4 |
384 | .IX Item "--fatal-warnings" | |
0285c67d | 385 | Treat warnings as errors. |
6840198f NC |
386 | .Ip "\f(CW\*(C`\-\-warn\*(C'\fR" 4 |
387 | .IX Item "--warn" | |
0285c67d | 388 | Don't suppress warning messages or treat them as errors. |
6840198f NC |
389 | .Ip "\f(CW\*(C`\-w\*(C'\fR" 4 |
390 | .IX Item "-w" | |
0285c67d | 391 | Ignored. |
6840198f NC |
392 | .Ip "\f(CW\*(C`\-x\*(C'\fR" 4 |
393 | .IX Item "-x" | |
0285c67d | 394 | Ignored. |
6840198f NC |
395 | .Ip "\f(CW\*(C`\-Z\*(C'\fR" 4 |
396 | .IX Item "-Z" | |
0285c67d | 397 | Generate an object file even after errors. |
6840198f NC |
398 | .Ip "\f(CW\*(C`\-\- | \f(CIfiles\f(CW ...\*(C'\fR" 4 |
399 | .IX Item "-- | files ..." | |
0285c67d NC |
400 | Standard input, or source files to assemble. |
401 | .PP | |
402 | The following options are available when as is configured for | |
403 | an \s-1ARC\s0 processor. | |
6840198f NC |
404 | .Ip "\f(CW\*(C`\-marc[5|6|7|8]\*(C'\fR" 4 |
405 | .IX Item "-marc[5|6|7|8]" | |
0285c67d | 406 | This option selects the core processor variant. |
6840198f NC |
407 | .Ip "\f(CW\*(C`\-EB | \-EL\*(C'\fR" 4 |
408 | .IX Item "-EB | -EL" | |
409 | Select either big-endian (\-EB) or little-endian (\-EL) output. | |
0285c67d NC |
410 | .PP |
411 | The following options are available when as is configured for the \s-1ARM\s0 | |
412 | processor family. | |
6840198f NC |
413 | .Ip "\f(CW\*(C`\-m[arm][1|2|3|6|7|8|9][...] \*(C'\fR" 4 |
414 | .IX Item "-m[arm][1|2|3|6|7|8|9][...] " | |
0285c67d | 415 | Specify which \s-1ARM\s0 processor variant is the target. |
6840198f NC |
416 | .Ip "\f(CW\*(C`\-m[arm]v[2|2a|3|3m|4|4t|5|5t]\*(C'\fR" 4 |
417 | .IX Item "-m[arm]v[2|2a|3|3m|4|4t|5|5t]" | |
0285c67d | 418 | Specify which \s-1ARM\s0 architecture variant is used by the target. |
6840198f NC |
419 | .Ip "\f(CW\*(C`\-mthumb | \-mall\*(C'\fR" 4 |
420 | .IX Item "-mthumb | -mall" | |
0285c67d | 421 | Enable or disable Thumb only instruction decoding. |
6840198f NC |
422 | .Ip "\f(CW\*(C`\-mfpa10 | \-mfpa11 | \-mfpe\-old | \-mno\-fpu\*(C'\fR" 4 |
423 | .IX Item "-mfpa10 | -mfpa11 | -mfpe-old | -mno-fpu" | |
0285c67d | 424 | Select which Floating Point architecture is the target. |
6840198f NC |
425 | .Ip "\f(CW\*(C`\-mapcs\-32 | \-mapcs\-26 | \-mapcs\-float | \-mapcs\-reentrant | \-moabi\*(C'\fR" 4 |
426 | .IX Item "-mapcs-32 | -mapcs-26 | -mapcs-float | -mapcs-reentrant | -moabi" | |
0285c67d | 427 | Select which procedure calling convention is in use. |
6840198f NC |
428 | .Ip "\f(CW\*(C`\-EB | \-EL\*(C'\fR" 4 |
429 | .IX Item "-EB | -EL" | |
430 | Select either big-endian (\-EB) or little-endian (\-EL) output. | |
431 | .Ip "\f(CW\*(C`\-mthumb\-interwork\*(C'\fR" 4 | |
432 | .IX Item "-mthumb-interwork" | |
0285c67d | 433 | Specify that the code has been generated with interworking between Thumb and |
6840198f NC |
434 | \&\s-1ARM\s0 code in mind. |
435 | .Ip "\f(CW\*(C`\-k\*(C'\fR" 4 | |
436 | .IX Item "-k" | |
0285c67d NC |
437 | Specify that \s-1PIC\s0 code has been generated. |
438 | .PP | |
439 | The following options are available when as is configured for | |
440 | a D10V processor. | |
6840198f NC |
441 | .Ip "\f(CW\*(C`\-O\*(C'\fR" 4 |
442 | .IX Item "-O" | |
0285c67d NC |
443 | Optimize output by parallelizing instructions. |
444 | .PP | |
445 | The following options are available when as is configured for a D30V | |
446 | processor. | |
6840198f NC |
447 | .Ip "\f(CW\*(C`\-O\*(C'\fR" 4 |
448 | .IX Item "-O" | |
0285c67d | 449 | Optimize output by parallelizing instructions. |
6840198f NC |
450 | .Ip "\f(CW\*(C`\-n\*(C'\fR" 4 |
451 | .IX Item "-n" | |
0285c67d | 452 | Warn when nops are generated. |
6840198f NC |
453 | .Ip "\f(CW\*(C`\-N\*(C'\fR" 4 |
454 | .IX Item "-N" | |
455 | Warn when a nop after a 32\-bit multiply instruction is generated. | |
0285c67d NC |
456 | .PP |
457 | The following options are available when as is configured for the | |
458 | Intel 80960 processor. | |
6840198f NC |
459 | .Ip "\f(CW\*(C`\-ACA | \-ACA_A | \-ACB | \-ACC | \-AKA | \-AKB | \-AKC | \-AMC\*(C'\fR" 4 |
460 | .IX Item "-ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC" | |
252b5132 | 461 | Specify which variant of the 960 architecture is the target. |
6840198f NC |
462 | .Ip "\f(CW\*(C`\-b\*(C'\fR" 4 |
463 | .IX Item "-b" | |
252b5132 | 464 | Add code to collect statistics about branches taken. |
6840198f NC |
465 | .Ip "\f(CW\*(C`\-no\-relax\*(C'\fR" 4 |
466 | .IX Item "-no-relax" | |
252b5132 RH |
467 | Do not alter compare-and-branch instructions for long displacements; |
468 | error if necessary. | |
0285c67d NC |
469 | .PP |
470 | The following options are available when as is configured for the | |
471 | Mitsubishi M32R series. | |
6840198f NC |
472 | .Ip "\f(CW\*(C`\-\-m32rx\*(C'\fR" 4 |
473 | .IX Item "--m32rx" | |
0285c67d NC |
474 | Specify which processor in the M32R family is the target. The default |
475 | is normally the M32R, but this option changes it to the M32RX. | |
6840198f NC |
476 | .Ip "\f(CW\*(C`\-\-warn\-explicit\-parallel\-conflicts or \-\-Wp\*(C'\fR" 4 |
477 | .IX Item "--warn-explicit-parallel-conflicts or --Wp" | |
0285c67d NC |
478 | Produce warning messages when questionable parallel constructs are |
479 | encountered. | |
6840198f NC |
480 | .Ip "\f(CW\*(C`\-\-no\-warn\-explicit\-parallel\-conflicts or \-\-Wnp\*(C'\fR" 4 |
481 | .IX Item "--no-warn-explicit-parallel-conflicts or --Wnp" | |
0285c67d NC |
482 | Do not produce warning messages when questionable parallel constructs are |
483 | encountered. | |
484 | .PP | |
485 | The following options are available when as is configured for the | |
486 | Motorola 68000 series. | |
6840198f NC |
487 | .Ip "\f(CW\*(C`\-l\*(C'\fR" 4 |
488 | .IX Item "-l" | |
252b5132 | 489 | Shorten references to undefined symbols, to one word instead of two. |
6840198f NC |
490 | .Ip "\f(CW\*(C`\-m68000 | \-m68008 | \-m68010 | \-m68020 | \-m68030\*(C'\fR" 4 |
491 | .IX Item "-m68000 | -m68008 | -m68010 | -m68020 | -m68030" | |
492 | .Ip "\f(CW\*(C`| \-m68040 | \-m68060 | \-m68302 | \-m68331 | \-m68332\*(C'\fR" 4 | |
493 | .IX Item "| -m68040 | -m68060 | -m68302 | -m68331 | -m68332" | |
494 | .Ip "\f(CW\*(C`| \-m68333 | \-m68340 | \-mcpu32 | \-m5200\*(C'\fR" 4 | |
495 | .IX Item "| -m68333 | -m68340 | -mcpu32 | -m5200" | |
0285c67d NC |
496 | Specify what processor in the 68000 family is the target. The default |
497 | is normally the 68020, but this can be changed at configuration time. | |
6840198f NC |
498 | .Ip "\f(CW\*(C`\-m68881 | \-m68882 | \-mno\-68881 | \-mno\-68882\*(C'\fR" 4 |
499 | .IX Item "-m68881 | -m68882 | -mno-68881 | -mno-68882" | |
0285c67d NC |
500 | The target machine does (or does not) have a floating-point coprocessor. |
501 | The default is to assume a coprocessor for 68020, 68030, and cpu32. Although | |
502 | the basic 68000 is not compatible with the 68881, a combination of the | |
503 | two can be specified, since it's possible to do emulation of the | |
504 | coprocessor instructions with the main processor. | |
6840198f NC |
505 | .Ip "\f(CW\*(C`\-m68851 | \-mno\-68851\*(C'\fR" 4 |
506 | .IX Item "-m68851 | -mno-68851" | |
0285c67d NC |
507 | The target machine does (or does not) have a memory-management |
508 | unit coprocessor. The default is to assume an \s-1MMU\s0 for 68020 and up. | |
252b5132 | 509 | .PP |
6840198f NC |
510 | For details about the \s-1PDP-11\s0 machine dependent features options, |
511 | see \f(CW@ref\fR{PDP-11\-Options}. | |
512 | .Ip "\f(CW\*(C`\-mpic | \-mno\-pic\*(C'\fR" 4 | |
513 | .IX Item "-mpic | -mno-pic" | |
0285c67d | 514 | Generate position-independent (or position-dependent) code. The |
6840198f NC |
515 | default is \f(CW\*(C`\-mpic\*(C'\fR. |
516 | .Ip "\f(CW\*(C`\-mall\*(C'\fR" 4 | |
517 | .IX Item "-mall" | |
518 | .Ip "\f(CW\*(C`\-mall\-extensions\*(C'\fR" 4 | |
519 | .IX Item "-mall-extensions" | |
0285c67d | 520 | Enable all instruction set extensions. This is the default. |
6840198f NC |
521 | .Ip "\f(CW\*(C`\-mno\-extensions\*(C'\fR" 4 |
522 | .IX Item "-mno-extensions" | |
0285c67d | 523 | Disable all instruction set extensions. |
6840198f NC |
524 | .Ip "\f(CW\*(C`\-m\f(CIextension\f(CW | \-mno\-\f(CIextension\f(CW\*(C'\fR" 4 |
525 | .IX Item "-mextension | -mno-extension" | |
0285c67d | 526 | Enable (or disable) a particular instruction set extension. |
6840198f NC |
527 | .Ip "\f(CW\*(C`\-m\f(CIcpu\f(CW\*(C'\fR" 4 |
528 | .IX Item "-mcpu" | |
0285c67d NC |
529 | Enable the instruction set extensions supported by a particular \s-1CPU\s0, and |
530 | disable all other extensions. | |
6840198f NC |
531 | .Ip "\f(CW\*(C`\-m\f(CImachine\f(CW\*(C'\fR" 4 |
532 | .IX Item "-mmachine" | |
0285c67d NC |
533 | Enable the instruction set extensions supported by a particular machine |
534 | model, and disable all other extensions. | |
535 | .PP | |
536 | The following options are available when as is configured for | |
537 | a picoJava processor. | |
6840198f NC |
538 | .Ip "\f(CW\*(C`\-mb\*(C'\fR" 4 |
539 | .IX Item "-mb" | |
540 | Generate ``big endian'' format output. | |
541 | .Ip "\f(CW\*(C`\-ml\*(C'\fR" 4 | |
542 | .IX Item "-ml" | |
543 | Generate ``little endian'' format output. | |
0285c67d NC |
544 | .PP |
545 | The following options are available when as is configured for the | |
546 | Motorola 68HC11 or 68HC12 series. | |
6840198f NC |
547 | .Ip "\f(CW\*(C`\-m68hc11 | \-m68hc12\*(C'\fR" 4 |
548 | .IX Item "-m68hc11 | -m68hc12" | |
0285c67d NC |
549 | Specify what processor is the target. The default is |
550 | defined by the configuration option when building the assembler. | |
6840198f NC |
551 | .Ip "\f(CW\*(C`\-\-force\-long\-branchs\*(C'\fR" 4 |
552 | .IX Item "--force-long-branchs" | |
0285c67d NC |
553 | Relative branches are turned into absolute ones. This concerns |
554 | conditional branches, unconditional branches and branches to a | |
555 | sub routine. | |
6840198f NC |
556 | .Ip "\f(CW\*(C`\-S | \-\-short\-branchs\*(C'\fR" 4 |
557 | .IX Item "-S | --short-branchs" | |
0285c67d NC |
558 | Do not turn relative branchs into absolute ones |
559 | when the offset is out of range. | |
6840198f NC |
560 | .Ip "\f(CW\*(C`\-\-strict\-direct\-mode\*(C'\fR" 4 |
561 | .IX Item "--strict-direct-mode" | |
0285c67d NC |
562 | Do not turn the direct addressing mode into extended addressing mode |
563 | when the instruction does not support direct addressing mode. | |
6840198f NC |
564 | .Ip "\f(CW\*(C`\-\-print\-insn\-syntax\*(C'\fR" 4 |
565 | .IX Item "--print-insn-syntax" | |
0285c67d | 566 | Print the syntax of instruction in case of error. |
6840198f NC |
567 | .Ip "\f(CW\*(C`\-\-print\-opcodes\*(C'\fR" 4 |
568 | .IX Item "--print-opcodes" | |
0285c67d | 569 | print the list of instructions with syntax and then exit. |
6840198f NC |
570 | .Ip "\f(CW\*(C`\-\-generate\-example\*(C'\fR" 4 |
571 | .IX Item "--generate-example" | |
0285c67d | 572 | print an example of instruction for each possible instruction and then exit. |
6840198f | 573 | This option is only useful for testing \f(CW\*(C`as\*(C'\fR. |
0285c67d | 574 | .PP |
6840198f | 575 | The following options are available when \f(CW\*(C`as\*(C'\fR is configured |
0285c67d | 576 | for the \s-1SPARC\s0 architecture: |
6840198f NC |
577 | .Ip "\f(CW\*(C`\-Av6 | \-Av7 | \-Av8 | \-Asparclet | \-Asparclite\*(C'\fR" 4 |
578 | .IX Item "-Av6 | -Av7 | -Av8 | -Asparclet | -Asparclite" | |
579 | .Ip "\f(CW\*(C`\-Av8plus | \-Av8plusa | \-Av9 | \-Av9a\*(C'\fR" 4 | |
580 | .IX Item "-Av8plus | -Av8plusa | -Av9 | -Av9a" | |
0285c67d NC |
581 | Explicitly select a variant of the \s-1SPARC\s0 architecture. |
582 | .Sp | |
6840198f NC |
583 | \&\fB\-Av8plus\fR and \fB\-Av8plusa\fR select a 32 bit environment. |
584 | \&\fB\-Av9\fR and \fB\-Av9a\fR select a 64 bit environment. | |
0285c67d | 585 | .Sp |
6840198f | 586 | \&\fB\-Av8plusa\fR and \fB\-Av9a\fR enable the \s-1SPARC\s0 V9 instruction set with |
0285c67d | 587 | UltraSPARC extensions. |
6840198f NC |
588 | .Ip "\f(CW\*(C`\-xarch=v8plus | \-xarch=v8plusa\*(C'\fR" 4 |
589 | .IX Item "-xarch=v8plus | -xarch=v8plusa" | |
0285c67d NC |
590 | For compatibility with the Solaris v9 assembler. These options are |
591 | equivalent to \-Av8plus and \-Av8plusa, respectively. | |
6840198f NC |
592 | .Ip "\f(CW\*(C`\-bump\*(C'\fR" 4 |
593 | .IX Item "-bump" | |
0285c67d NC |
594 | Warn when the assembler switches to another architecture. |
595 | .PP | |
596 | The following options are available when as is configured for | |
597 | a \s-1MIPS\s0 processor. | |
6840198f NC |
598 | .Ip "\f(CW\*(C`\-G \f(CInum\f(CW\*(C'\fR" 4 |
599 | .IX Item "-G num" | |
0285c67d | 600 | This option sets the largest size of an object that can be referenced |
6840198f | 601 | implicitly with the \f(CW\*(C`gp\*(C'\fR register. It is only accepted for targets that |
0285c67d | 602 | use \s-1ECOFF\s0 format, such as a DECstation running Ultrix. The default value is 8. |
6840198f NC |
603 | .Ip "\f(CW\*(C`\-EB\*(C'\fR" 4 |
604 | .IX Item "-EB" | |
605 | Generate ``big endian'' format output. | |
606 | .Ip "\f(CW\*(C`\-EL\*(C'\fR" 4 | |
607 | .IX Item "-EL" | |
608 | Generate ``little endian'' format output. | |
609 | .Ip "\f(CW\*(C`\-mips1\*(C'\fR" 4 | |
610 | .IX Item "-mips1" | |
611 | .Ip "\f(CW\*(C`\-mips2\*(C'\fR" 4 | |
612 | .IX Item "-mips2" | |
613 | .Ip "\f(CW\*(C`\-mips3\*(C'\fR" 4 | |
614 | .IX Item "-mips3" | |
615 | .Ip "\f(CW\*(C`\-mips4\*(C'\fR" 4 | |
616 | .IX Item "-mips4" | |
617 | .Ip "\f(CW\*(C`\-mips32\*(C'\fR" 4 | |
618 | .IX Item "-mips32" | |
0285c67d | 619 | Generate code for a particular \s-1MIPS\s0 Instruction Set Architecture level. |
6840198f NC |
620 | \&\fB\-mips1\fR corresponds to the R2000 and R3000 processors, |
621 | \&\fB\-mips2\fR to the R6000 processor, and \fB\-mips3\fR to the R4000 | |
0285c67d | 622 | processor. |
6840198f | 623 | \&\fB\-mips5\fR, \fB\-mips32\fR, and \fB\-mips64\fR correspond |
0285c67d NC |
624 | to generic \s-1MIPS\s0 V, \s-1MIPS32\s0, and \s-1MIPS64\s0 \s-1ISA\s0 |
625 | processors, respectively. | |
6840198f NC |
626 | .Ip "\f(CW\*(C`\-m4650\*(C'\fR" 4 |
627 | .IX Item "-m4650" | |
628 | .Ip "\f(CW\*(C`\-no\-m4650\*(C'\fR" 4 | |
629 | .IX Item "-no-m4650" | |
0285c67d NC |
630 | Generate code for the \s-1MIPS\s0 R4650 chip. This tells the assembler to accept |
631 | the \fBmad\fR and \fBmadu\fR instruction, and to not schedule \fBnop\fR | |
632 | instructions around accesses to the \fB\s-1HI\s0\fR and \fB\s-1LO\s0\fR registers. | |
6840198f NC |
633 | \&\fB\-no-m4650\fR turns off this option. |
634 | .Ip "\f(CW\*(C`\-mcpu=\f(CI\s\-1CPU\s0\f(CW\*(C'\fR" 4 | |
635 | .IX Item "-mcpu=CPU" | |
0285c67d | 636 | Generate code for a particular \s-1MIPS\s0 cpu. It is exactly equivalent to |
6840198f | 637 | \&\fB\-m\fR\fIcpu\fR, except that there are more value of \fIcpu\fR |
0285c67d | 638 | understood. |
6840198f NC |
639 | .Ip "\f(CW\*(C`\-\-emulation=\f(CIname\f(CW\*(C'\fR" 4 |
640 | .IX Item "--emulation=name" | |
641 | This option causes \f(CW\*(C`as\*(C'\fR to emulate \f(CW\*(C`as\*(C'\fR configured | |
0285c67d NC |
642 | for some other target, in all respects, including output format (choosing |
643 | between \s-1ELF\s0 and \s-1ECOFF\s0 only), handling of pseudo-opcodes which may generate | |
644 | debugging information or store symbol table information, and default | |
645 | endianness. The available configuration names are: \fBmipsecoff\fR, | |
6840198f NC |
646 | \&\fBmipself\fR, \fBmipslecoff\fR, \fBmipsbecoff\fR, \fBmipslelf\fR, |
647 | \&\fBmipsbelf\fR. The first two do not alter the default endianness from that | |
0285c67d NC |
648 | of the primary target for which the assembler was configured; the others change |
649 | the default to little- or big-endian as indicated by the \fBb\fR or \fBl\fR | |
6840198f | 650 | in the name. Using \fB\-EB\fR or \fB\-EL\fR will override the endianness |
0285c67d NC |
651 | selection in any case. |
652 | .Sp | |
653 | This option is currently supported only when the primary target | |
6840198f | 654 | \&\f(CW\*(C`as\*(C'\fR is configured for is a \s-1MIPS\s0 \s-1ELF\s0 or \s-1ECOFF\s0 target. |
0285c67d | 655 | Furthermore, the primary target or others specified with |
6840198f | 656 | \&\fB\*(--enable-targets=...\fR at configuration time must include support for |
0285c67d NC |
657 | the other format, if both are to be available. For example, the Irix 5 |
658 | configuration includes support for both. | |
659 | .Sp | |
660 | Eventually, this option will support more configurations, with more | |
661 | fine-grained control over the assembler's behavior, and will be supported for | |
662 | more processors. | |
6840198f NC |
663 | .Ip "\f(CW\*(C`\-nocpp\*(C'\fR" 4 |
664 | .IX Item "-nocpp" | |
665 | \&\f(CW\*(C`as\*(C'\fR ignores this option. It is accepted for compatibility with | |
0285c67d | 666 | the native tools. |
6840198f NC |
667 | .Ip "\f(CW\*(C`\-\-trap\*(C'\fR" 4 |
668 | .IX Item "--trap" | |
669 | .Ip "\f(CW\*(C`\-\-no\-trap\*(C'\fR" 4 | |
670 | .IX Item "--no-trap" | |
671 | .Ip "\f(CW\*(C`\-\-break\*(C'\fR" 4 | |
672 | .IX Item "--break" | |
673 | .Ip "\f(CW\*(C`\-\-no\-break\*(C'\fR" 4 | |
674 | .IX Item "--no-break" | |
0285c67d | 675 | Control how to deal with multiplication overflow and division by zero. |
6840198f | 676 | \&\fB\*(--trap\fR or \fB\*(--no-break\fR (which are synonyms) take a trap exception |
0285c67d | 677 | (and only work for Instruction Set Architecture level 2 and higher); |
6840198f | 678 | \&\fB\*(--break\fR or \fB\*(--no-trap\fR (also synonyms, and the default) take a |
0285c67d | 679 | break exception. |
63486801 L |
680 | .Ip "\f(CW\*(C`\-n\*(C'\fR" 4 |
681 | .IX Item "-n" | |
682 | When this option is used, \f(CW\*(C`as\*(C'\fR will issue a warning every | |
683 | time it generates a nop instruction from a macro. | |
0285c67d NC |
684 | .PP |
685 | The following options are available when as is configured for | |
686 | an MCore processor. | |
6840198f NC |
687 | .Ip "\f(CW\*(C`\-jsri2bsr\*(C'\fR" 4 |
688 | .IX Item "-jsri2bsr" | |
689 | .Ip "\f(CW\*(C`\-nojsri2bsr\*(C'\fR" 4 | |
690 | .IX Item "-nojsri2bsr" | |
0285c67d NC |
691 | Enable or disable the \s-1JSRI\s0 to \s-1BSR\s0 transformation. By default this is enabled. |
692 | The command line option \fB\-nojsri2bsr\fR can be used to disable it. | |
6840198f NC |
693 | .Ip "\f(CW\*(C`\-sifilter\*(C'\fR" 4 |
694 | .IX Item "-sifilter" | |
695 | .Ip "\f(CW\*(C`\-nosifilter\*(C'\fR" 4 | |
696 | .IX Item "-nosifilter" | |
0285c67d NC |
697 | Enable or disable the silicon filter behaviour. By default this is disabled. |
698 | The default can be overridden by the \fB\-sifilter\fR command line option. | |
6840198f NC |
699 | .Ip "\f(CW\*(C`\-relax\*(C'\fR" 4 |
700 | .IX Item "-relax" | |
0285c67d | 701 | Alter jump instructions for long displacements. |
6840198f NC |
702 | .Ip "\f(CW\*(C`\-mcpu=[210|340]\*(C'\fR" 4 |
703 | .IX Item "-mcpu=[210|340]" | |
0285c67d NC |
704 | Select the cpu type on the target hardware. This controls which instructions |
705 | can be assembled. | |
6840198f NC |
706 | .Ip "\f(CW\*(C`\-EB\*(C'\fR" 4 |
707 | .IX Item "-EB" | |
0285c67d | 708 | Assemble for a big endian target. |
6840198f NC |
709 | .Ip "\f(CW\*(C`\-EL\*(C'\fR" 4 |
710 | .IX Item "-EL" | |
0285c67d | 711 | Assemble for a little endian target. |
252b5132 | 712 | .SH "SEE ALSO" |
6840198f NC |
713 | .IX Header "SEE ALSO" |
714 | \&\fIgcc\fR\|(1), \fIld\fR\|(1), and the Info entries for \fIbinutils\fR and \fIld\fR. | |
0285c67d | 715 | .SH "COPYRIGHT" |
6840198f | 716 | .IX Header "COPYRIGHT" |
0285c67d | 717 | Copyright (C) 1991, 92, 93, 94, 95, 96, 97, 98, 99, 2000, 2001 Free Software Foundation, Inc. |
cf055d54 | 718 | .PP |
0285c67d | 719 | Permission is granted to copy, distribute and/or modify this document |
6840198f | 720 | under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.1 |
0285c67d NC |
721 | or any later version published by the Free Software Foundation; |
722 | with no Invariant Sections, with no Front-Cover Texts, and with no | |
723 | Back-Cover Texts. A copy of the license is included in the | |
6840198f | 724 | section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R". |