[deliverable/binutils-gdb.git] / gas / doc / c-h8300.texi

@c Copyright (C) 1991-2015 Free Software Foundation, Inc.
@c This is part of the GAS manual.
@c For copying conditions, see the file as.texinfo.
@ifset GENERIC
@page
@end ifset
@node H8/300-Dependent
@chapter H8/300 Dependent Features

@cindex H8/300 support
@menu
* H8/300 Options::              Options
* H8/300 Syntax::               Syntax
* H8/300 Floating Point::       Floating Point
* H8/300 Directives::           H8/300 Machine Directives
* H8/300 Opcodes::              Opcodes
@end menu

@node H8/300 Options
@section Options

@cindex H8/300 options
@cindex options, H8/300
The Renesas H8/300 version of @code{@value{AS}} has one
machine-dependent option:

@c man begin OPTIONS
@table @gcctabopt
@item -h-tick-hex
Support H'00 style hex constants in addition to 0x00 style.

@end table
@c man end

@node H8/300 Syntax
@section Syntax
@menu
* H8/300-Chars::                Special Characters
* H8/300-Regs::                 Register Names
* H8/300-Addressing::           Addressing Modes
@end menu

@node H8/300-Chars
@subsection Special Characters

@cindex line comment character, H8/300
@cindex H8/300 line comment character
@samp{;} is the line comment character.

@cindex line separator, H8/300
@cindex statement separator, H8/300
@cindex H8/300 line separator
@samp{$} can be used instead of a newline to separate statements.
Therefore @emph{you may not use @samp{$} in symbol names} on the H8/300.

@node H8/300-Regs
@subsection Register Names

@cindex H8/300 registers
@cindex register names, H8/300
You can use predefined symbols of the form @samp{r@var{n}h} and
@samp{r@var{n}l} to refer to the H8/300 registers as sixteen 8-bit
general-purpose registers.  @var{n} is a digit from @samp{0} to
@samp{7}); for instance, both @samp{r0h} and @samp{r7l} are valid
register names.

You can also use the eight predefined symbols @samp{r@var{n}} to refer
to the H8/300 registers as 16-bit registers (you must use this form for
addressing).

On the H8/300H, you can also use the eight predefined symbols
@samp{er@var{n}} (@samp{er0} @dots{} @samp{er7}) to refer to the 32-bit
general purpose registers.

The two control registers are called @code{pc} (program counter; a
16-bit register, except on the H8/300H where it is 24 bits) and
@code{ccr} (condition code register; an 8-bit register).  @code{r7} is
used as the stack pointer, and can also be called @code{sp}.

@node H8/300-Addressing
@subsection Addressing Modes

@cindex addressing modes, H8/300
@cindex H8/300 addressing modes
@value{AS} understands the following addressing modes for the H8/300:
@table @code
@item r@var{n}
Register direct

@item @@r@var{n}
Register indirect

@need 1200
@item @@(@var{d}, r@var{n})
@itemx @@(@var{d}:16, r@var{n})
@itemx @@(@var{d}:24, r@var{n})
Register indirect: 16-bit or 24-bit displacement @var{d} from register
@var{n}.  (24-bit displacements are only meaningful on the H8/300H.)

@item @@r@var{n}+
Register indirect with post-increment

@item @@-r@var{n}
Register indirect with pre-decrement

@item @code{@@}@var{aa}
@itemx @code{@@}@var{aa}:8
@itemx @code{@@}@var{aa}:16
@itemx @code{@@}@var{aa}:24
Absolute address @code{aa}.  (The address size @samp{:24} only makes
sense on the H8/300H.)

@item #@var{xx}
@itemx #@var{xx}:8
@itemx #@var{xx}:16
@itemx #@var{xx}:32
Immediate data @var{xx}.  You may specify the @samp{:8}, @samp{:16}, or
@samp{:32} for clarity, if you wish; but @code{@value{AS}} neither
requires this nor uses it---the data size required is taken from
context.

@item @code{@@}@code{@@}@var{aa}
@itemx @code{@@}@code{@@}@var{aa}:8
Memory indirect.  You may specify the @samp{:8} for clarity, if you
wish; but @code{@value{AS}} neither requires this nor uses it.
@end table

@node H8/300 Floating Point
@section Floating Point

@cindex floating point, H8/300 (@sc{ieee})
@cindex H8/300 floating point (@sc{ieee})
The H8/300 family has no hardware floating point, but the @code{.float}
directive generates @sc{ieee} floating-point numbers for compatibility
with other development tools.

@page
@node H8/300 Directives
@section H8/300 Machine Directives

@cindex H8/300 machine directives (none)
@cindex machine directives, H8/300 (none)
@cindex @code{word} directive, H8/300
@cindex @code{int} directive, H8/300
@code{@value{AS}} has the following machine-dependent directives for
the H8/300:

@table @code
@cindex H8/300H, assembling for
@item .h8300h
Recognize and emit additional instructions for the H8/300H variant, and
also make @code{.int} emit 32-bit numbers rather than the usual (16-bit)
for the H8/300 family.

@item .h8300s
Recognize and emit additional instructions for the H8S variant, and
also make @code{.int} emit 32-bit numbers rather than the usual (16-bit)
for the H8/300 family.

@item .h8300hn
Recognize and emit additional instructions for the H8/300H variant in
normal mode, and also make @code{.int} emit 32-bit numbers rather than
the usual (16-bit) for the H8/300 family.

@item .h8300sn
Recognize and emit additional instructions for the H8S variant in
normal mode, and also make @code{.int} emit 32-bit numbers rather than
the usual (16-bit) for the H8/300 family.
@end table

On the H8/300 family (including the H8/300H) @samp{.word} directives
generate 16-bit numbers.

@node H8/300 Opcodes
@section Opcodes

@cindex H8/300 opcode summary
@cindex opcode summary, H8/300
@cindex mnemonics, H8/300
@cindex instruction summary, H8/300
For detailed information on the H8/300 machine instruction set, see
@cite{H8/300 Series Programming Manual}.  For information specific to
the H8/300H, see @cite{H8/300H Series Programming Manual} (Renesas).

@code{@value{AS}} implements all the standard H8/300 opcodes.  No additional
pseudo-instructions are needed on this family.

@ifset SMALL
@c this table, due to the multi-col faking and hardcoded order, looks silly
@c except in smallbook.  See comments below "@set SMALL" near top of this file.

The following table summarizes the H8/300 opcodes, and their arguments.
Entries marked @samp{*} are opcodes used only on the H8/300H.

@smallexample
@c Using @group seems to use the normal baselineskip, not the smallexample
@c baselineskip; looks approx doublespaced.
         @i{Legend:}
            Rs   @r{source register}
            Rd   @r{destination register}
            abs  @r{absolute address}
            imm  @r{immediate data}
         disp:N  @r{N-bit displacement from a register}
        pcrel:N  @r{N-bit displacement relative to program counter}

   add.b #imm,rd              *  andc #imm,ccr
   add.b rs,rd                   band #imm,rd
   add.w rs,rd                   band #imm,@@rd
*  add.w #imm,rd                 band #imm,@@abs:8
*  add.l rs,rd                   bra  pcrel:8
*  add.l #imm,rd              *  bra  pcrel:16
   adds #imm,rd                  bt   pcrel:8
   addx #imm,rd               *  bt   pcrel:16
   addx rs,rd                    brn  pcrel:8
   and.b #imm,rd              *  brn  pcrel:16
   and.b rs,rd                   bf   pcrel:8
*  and.w rs,rd                *  bf   pcrel:16
*  and.w #imm,rd                 bhi  pcrel:8
*  and.l #imm,rd              *  bhi  pcrel:16
*  and.l rs,rd                   bls  pcrel:8
@page
*  bls  pcrel:16                 bld  #imm,rd
   bcc  pcrel:8                  bld  #imm,@@rd
*  bcc  pcrel:16                 bld  #imm,@@abs:8
   bhs  pcrel:8                  bnot #imm,rd
*  bhs  pcrel:16                 bnot #imm,@@rd
   bcs  pcrel:8                  bnot #imm,@@abs:8
*  bcs  pcrel:16                 bnot rs,rd
   blo  pcrel:8                  bnot rs,@@rd
*  blo  pcrel:16                 bnot rs,@@abs:8
   bne  pcrel:8                  bor  #imm,rd
*  bne  pcrel:16                 bor  #imm,@@rd
   beq  pcrel:8                  bor  #imm,@@abs:8
*  beq  pcrel:16                 bset #imm,rd
   bvc  pcrel:8                  bset #imm,@@rd
*  bvc  pcrel:16                 bset #imm,@@abs:8
   bvs  pcrel:8                  bset rs,rd
*  bvs  pcrel:16                 bset rs,@@rd
   bpl  pcrel:8                  bset rs,@@abs:8
*  bpl  pcrel:16                 bsr  pcrel:8
   bmi  pcrel:8                  bsr  pcrel:16
*  bmi  pcrel:16                 bst  #imm,rd
   bge  pcrel:8                  bst  #imm,@@rd
*  bge  pcrel:16                 bst  #imm,@@abs:8
   blt  pcrel:8                  btst #imm,rd
*  blt  pcrel:16                 btst #imm,@@rd
   bgt  pcrel:8                  btst #imm,@@abs:8
*  bgt  pcrel:16                 btst rs,rd
   ble  pcrel:8                  btst rs,@@rd
*  ble  pcrel:16                 btst rs,@@abs:8
   bclr #imm,rd                  bxor #imm,rd
   bclr #imm,@@rd                 bxor #imm,@@rd
   bclr #imm,@@abs:8              bxor #imm,@@abs:8
   bclr rs,rd                    cmp.b #imm,rd
   bclr rs,@@rd                   cmp.b rs,rd
   bclr rs,@@abs:8                cmp.w rs,rd
   biand #imm,rd                 cmp.w rs,rd
   biand #imm,@@rd             *  cmp.w #imm,rd
   biand #imm,@@abs:8          *  cmp.l #imm,rd
   bild #imm,rd               *  cmp.l rs,rd
   bild #imm,@@rd                 daa  rs
   bild #imm,@@abs:8              das  rs
   bior #imm,rd                  dec.b rs
   bior #imm,@@rd              *  dec.w #imm,rd
   bior #imm,@@abs:8           *  dec.l #imm,rd
   bist #imm,rd                  divxu.b rs,rd
   bist #imm,@@rd              *  divxu.w rs,rd
   bist #imm,@@abs:8           *  divxs.b rs,rd
   bixor #imm,rd              *  divxs.w rs,rd
   bixor #imm,@@rd                eepmov
   bixor #imm,@@abs:8          *  eepmovw
@page
*  exts.w rd                     mov.w rs,@@abs:16
*  exts.l rd                  *  mov.l #imm,rd
*  extu.w rd                  *  mov.l rs,rd
*  extu.l rd                  *  mov.l @@rs,rd
   inc  rs                    *  mov.l @@(disp:16,rs),rd
*  inc.w #imm,rd              *  mov.l @@(disp:24,rs),rd
*  inc.l #imm,rd              *  mov.l @@rs+,rd
   jmp  @@rs                   *  mov.l @@abs:16,rd
   jmp  abs                   *  mov.l @@abs:24,rd
   jmp  @@@@abs:8               *  mov.l rs,@@rd
   jsr  @@rs                   *  mov.l rs,@@(disp:16,rd)
   jsr  abs                   *  mov.l rs,@@(disp:24,rd)
   jsr  @@@@abs:8               *  mov.l rs,@@-rd
   ldc  #imm,ccr              *  mov.l rs,@@abs:16
   ldc  rs,ccr                *  mov.l rs,@@abs:24
*  ldc  @@abs:16,ccr              movfpe @@abs:16,rd
*  ldc  @@abs:24,ccr              movtpe rs,@@abs:16
*  ldc  @@(disp:16,rs),ccr        mulxu.b rs,rd
*  ldc  @@(disp:24,rs),ccr     *  mulxu.w rs,rd
*  ldc  @@rs+,ccr              *  mulxs.b rs,rd
*  ldc  @@rs,ccr               *  mulxs.w rs,rd
*  mov.b @@(disp:24,rs),rd        neg.b rs
*  mov.b rs,@@(disp:24,rd)     *  neg.w rs
   mov.b @@abs:16,rd           *  neg.l rs
   mov.b rs,rd                   nop
   mov.b @@abs:8,rd               not.b rs
   mov.b rs,@@abs:8            *  not.w rs
   mov.b rs,rd                *  not.l rs
   mov.b #imm,rd                 or.b #imm,rd
   mov.b @@rs,rd                  or.b rs,rd
   mov.b @@(disp:16,rs),rd     *  or.w #imm,rd
   mov.b @@rs+,rd              *  or.w rs,rd
   mov.b @@abs:8,rd            *  or.l #imm,rd
   mov.b rs,@@rd               *  or.l rs,rd
   mov.b rs,@@(disp:16,rd)        orc  #imm,ccr
   mov.b rs,@@-rd                 pop.w rs
   mov.b rs,@@abs:8            *  pop.l rs
   mov.w rs,@@rd                  push.w rs
*  mov.w @@(disp:24,rs),rd     *  push.l rs
*  mov.w rs,@@(disp:24,rd)        rotl.b rs
*  mov.w @@abs:24,rd           *  rotl.w rs
*  mov.w rs,@@abs:24           *  rotl.l rs
   mov.w rs,rd                   rotr.b rs
   mov.w #imm,rd              *  rotr.w rs
   mov.w @@rs,rd               *  rotr.l rs
   mov.w @@(disp:16,rs),rd        rotxl.b rs
   mov.w @@rs+,rd              *  rotxl.w rs
   mov.w @@abs:16,rd           *  rotxl.l rs
   mov.w rs,@@(disp:16,rd)        rotxr.b rs
   mov.w rs,@@-rd              *  rotxr.w rs
@page
*  rotxr.l rs                 *  stc  ccr,@@(disp:24,rd)
   bpt                        *  stc  ccr,@@-rd
   rte                        *  stc  ccr,@@abs:16
   rts                        *  stc  ccr,@@abs:24
   shal.b rs                     sub.b rs,rd
*  shal.w rs                     sub.w rs,rd
*  shal.l rs                  *  sub.w #imm,rd
   shar.b rs                  *  sub.l rs,rd
*  shar.w rs                  *  sub.l #imm,rd
*  shar.l rs                     subs #imm,rd
   shll.b rs                     subx #imm,rd
*  shll.w rs                     subx rs,rd
*  shll.l rs                  *  trapa #imm
   shlr.b rs                     xor  #imm,rd
*  shlr.w rs                     xor  rs,rd
*  shlr.l rs                  *  xor.w #imm,rd
   sleep                      *  xor.w rs,rd
   stc  ccr,rd                *  xor.l #imm,rd
*  stc  ccr,@@rs               *  xor.l rs,rd
*  stc  ccr,@@(disp:16,rd)        xorc #imm,ccr
@end smallexample
@end ifset

@cindex size suffixes, H8/300
@cindex H8/300 size suffixes
Four H8/300 instructions (@code{add}, @code{cmp}, @code{mov},
@code{sub}) are defined with variants using the suffixes @samp{.b},
@samp{.w}, and @samp{.l} to specify the size of a memory operand.
@code{@value{AS}} supports these suffixes, but does not require them;
since one of the operands is always a register, @code{@value{AS}} can
deduce the correct size.

For example, since @code{r0} refers to a 16-bit register,
@example
mov    r0,@@foo
@exdent is equivalent to
mov.w  r0,@@foo
@end example

If you use the size suffixes, @code{@value{AS}} issues a warning when
the suffix and the register size do not match.
Commit	Line	Data
b90efa5b	1	@c Copyright (C) 1991-2015 Free Software Foundation, Inc.
252b5132 RH	2	@c This is part of the GAS manual.
	3	@c For copying conditions, see the file as.texinfo.
	4	@ifset GENERIC
	5	@page
	6	@end ifset
	7	@node H8/300-Dependent
	8	@chapter H8/300 Dependent Features
	9
	10	@cindex H8/300 support
	11	@menu
	12	* H8/300 Options:: Options
	13	* H8/300 Syntax:: Syntax
	14	* H8/300 Floating Point:: Floating Point
	15	* H8/300 Directives:: H8/300 Machine Directives
	16	* H8/300 Opcodes:: Opcodes
	17	@end menu
	18
	19	@node H8/300 Options
	20	@section Options
	21
6fd4f6cc DD	22	@cindex H8/300 options
	23	@cindex options, H8/300
	24	The Renesas H8/300 version of @code{@value{AS}} has one
	25	machine-dependent option:
	26
0c76cae8 AM	27	@c man begin OPTIONS
0c76cae8 AM	28	@table @gcctabopt
6fd4f6cc DD	29	@item -h-tick-hex
	30	Support H'00 style hex constants in addition to 0x00 style.
	31
	32	@end table
0c76cae8	33	@c man end
252b5132 RH	34
	35	@node H8/300 Syntax
	36	@section Syntax
	37	@menu
	38	* H8/300-Chars:: Special Characters
	39	* H8/300-Regs:: Register Names
	40	* H8/300-Addressing:: Addressing Modes
	41	@end menu
	42
	43	@node H8/300-Chars
	44	@subsection Special Characters
	45
	46	@cindex line comment character, H8/300
	47	@cindex H8/300 line comment character
	48	@samp{;} is the line comment character.
	49
	50	@cindex line separator, H8/300
	51	@cindex statement separator, H8/300
	52	@cindex H8/300 line separator
	53	@samp{$} can be used instead of a newline to separate statements.
	54	Therefore @emph{you may not use @samp{$} in symbol names} on the H8/300.
	55
	56	@node H8/300-Regs
	57	@subsection Register Names
	58
	59	@cindex H8/300 registers
	60	@cindex register names, H8/300
	61	You can use predefined symbols of the form @samp{r@var{n}h} and
	62	@samp{r@var{n}l} to refer to the H8/300 registers as sixteen 8-bit
	63	general-purpose registers. @var{n} is a digit from @samp{0} to
	64	@samp{7}); for instance, both @samp{r0h} and @samp{r7l} are valid
	65	register names.
	66
	67	You can also use the eight predefined symbols @samp{r@var{n}} to refer
	68	to the H8/300 registers as 16-bit registers (you must use this form for
	69	addressing).
	70
	71	On the H8/300H, you can also use the eight predefined symbols
	72	@samp{er@var{n}} (@samp{er0} @dots{} @samp{er7}) to refer to the 32-bit
	73	general purpose registers.
	74
	75	The two control registers are called @code{pc} (program counter; a
	76	16-bit register, except on the H8/300H where it is 24 bits) and
	77	@code{ccr} (condition code register; an 8-bit register). @code{r7} is
	78	used as the stack pointer, and can also be called @code{sp}.
	79
	80	@node H8/300-Addressing
	81	@subsection Addressing Modes
	82
	83	@cindex addressing modes, H8/300
	84	@cindex H8/300 addressing modes
	85	@value{AS} understands the following addressing modes for the H8/300:
	86	@table @code
	87	@item r@var{n}
	88	Register direct
	89
	90	@item @@r@var{n}
	91	Register indirect
	92
	93	@need 1200
	94	@item @@(@var{d}, r@var{n})
	95	@itemx @@(@var{d}:16, r@var{n})
	96	@itemx @@(@var{d}:24, r@var{n})
	97	Register indirect: 16-bit or 24-bit displacement @var{d} from register
98	@var{n}. (24-bit displacements are only meaningful on the H8/300H.)
99
100	@item @@r@var{n}+
101	Register indirect with post-increment
102
103	@item @@-r@var{n}
104	Register indirect with pre-decrement
105
106	@item @code{@@}@var{aa}
107	@itemx @code{@@}@var{aa}:8
108	@itemx @code{@@}@var{aa}:16
109	@itemx @code{@@}@var{aa}:24
110	Absolute address @code{aa}. (The address size @samp{:24} only makes
111	sense on the H8/300H.)
112
113	@item #@var{xx}
114	@itemx #@var{xx}:8
115	@itemx #@var{xx}:16
116	@itemx #@var{xx}:32
117	Immediate data @var{xx}. You may specify the @samp{:8}, @samp{:16}, or
118	@samp{:32} for clarity, if you wish; but @code{@value{AS}} neither
119	requires this nor uses it---the data size required is taken from
120	context.
121
122	@item @code{@@}@code{@@}@var{aa}
123	@itemx @code{@@}@code{@@}@var{aa}:8
124	Memory indirect. You may specify the @samp{:8} for clarity, if you
125	wish; but @code{@value{AS}} neither requires this nor uses it.
126	@end table
127
128	@node H8/300 Floating Point
129	@section Floating Point
130
131	@cindex floating point, H8/300 (@sc{ieee})
132	@cindex H8/300 floating point (@sc{ieee})
133	The H8/300 family has no hardware floating point, but the @code{.float}
134	directive generates @sc{ieee} floating-point numbers for compatibility
135	with other development tools.
136
137	@page
138	@node H8/300 Directives
139	@section H8/300 Machine Directives
140
141	@cindex H8/300 machine directives (none)
142	@cindex machine directives, H8/300 (none)
143	@cindex @code{word} directive, H8/300
144	@cindex @code{int} directive, H8/300
8d9cd6b1 NC	145	@code{@value{AS}} has the following machine-dependent directives for
8d9cd6b1 NC	146	the H8/300:
252b5132 RH	147
	148	@table @code
	149	@cindex H8/300H, assembling for
	150	@item .h8300h
	151	Recognize and emit additional instructions for the H8/300H variant, and
	152	also make @code{.int} emit 32-bit numbers rather than the usual (16-bit)
	153	for the H8/300 family.
8d9cd6b1 NC	154
	155	@item .h8300s
	156	Recognize and emit additional instructions for the H8S variant, and
	157	also make @code{.int} emit 32-bit numbers rather than the usual (16-bit)
	158	for the H8/300 family.
	159
	160	@item .h8300hn
	161	Recognize and emit additional instructions for the H8/300H variant in
34bca508	162	normal mode, and also make @code{.int} emit 32-bit numbers rather than
8d9cd6b1 NC	163	the usual (16-bit) for the H8/300 family.
	164
	165	@item .h8300sn
	166	Recognize and emit additional instructions for the H8S variant in
34bca508	167	normal mode, and also make @code{.int} emit 32-bit numbers rather than
8d9cd6b1	168	the usual (16-bit) for the H8/300 family.
252b5132 RH	169	@end table
	170
	171	On the H8/300 family (including the H8/300H) @samp{.word} directives
	172	generate 16-bit numbers.
	173
	174	@node H8/300 Opcodes
	175	@section Opcodes
	176
	177	@cindex H8/300 opcode summary
	178	@cindex opcode summary, H8/300
	179	@cindex mnemonics, H8/300
	180	@cindex instruction summary, H8/300
	181	For detailed information on the H8/300 machine instruction set, see
c2dcd04e NC	182	@cite{H8/300 Series Programming Manual}. For information specific to
c2dcd04e NC	183	the H8/300H, see @cite{H8/300H Series Programming Manual} (Renesas).
252b5132 RH	184
	185	@code{@value{AS}} implements all the standard H8/300 opcodes. No additional
	186	pseudo-instructions are needed on this family.
	187
	188	@ifset SMALL
	189	@c this table, due to the multi-col faking and hardcoded order, looks silly
	190	@c except in smallbook. See comments below "@set SMALL" near top of this file.
	191
	192	The following table summarizes the H8/300 opcodes, and their arguments.
	193	Entries marked @samp{*} are opcodes used only on the H8/300H.
	194
	195	@smallexample
	196	@c Using @group seems to use the normal baselineskip, not the smallexample
	197	@c baselineskip; looks approx doublespaced.
	198	@i{Legend:}
	199	Rs @r{source register}
	200	Rd @r{destination register}
	201	abs @r{absolute address}
	202	imm @r{immediate data}
	203	disp:N @r{N-bit displacement from a register}
	204	pcrel:N @r{N-bit displacement relative to program counter}
	205
	206	add.b #imm,rd * andc #imm,ccr
	207	add.b rs,rd band #imm,rd
	208	add.w rs,rd band #imm,@@rd
	209	* add.w #imm,rd band #imm,@@abs:8
	210	* add.l rs,rd bra pcrel:8
	211	* add.l #imm,rd * bra pcrel:16
	212	adds #imm,rd bt pcrel:8
	213	addx #imm,rd * bt pcrel:16
	214	addx rs,rd brn pcrel:8
	215	and.b #imm,rd * brn pcrel:16
	216	and.b rs,rd bf pcrel:8
	217	* and.w rs,rd * bf pcrel:16
	218	* and.w #imm,rd bhi pcrel:8
	219	* and.l #imm,rd * bhi pcrel:16
	220	* and.l rs,rd bls pcrel:8
	221	@page
	222	* bls pcrel:16 bld #imm,rd
	223	bcc pcrel:8 bld #imm,@@rd
	224	* bcc pcrel:16 bld #imm,@@abs:8
	225	bhs pcrel:8 bnot #imm,rd
	226	* bhs pcrel:16 bnot #imm,@@rd
	227	bcs pcrel:8 bnot #imm,@@abs:8
	228	* bcs pcrel:16 bnot rs,rd
	229	blo pcrel:8 bnot rs,@@rd
	230	* blo pcrel:16 bnot rs,@@abs:8
	231	bne pcrel:8 bor #imm,rd
	232	* bne pcrel:16 bor #imm,@@rd
	233	beq pcrel:8 bor #imm,@@abs:8
	234	* beq pcrel:16 bset #imm,rd
	235	bvc pcrel:8 bset #imm,@@rd
	236	* bvc pcrel:16 bset #imm,@@abs:8
	237	bvs pcrel:8 bset rs,rd
	238	* bvs pcrel:16 bset rs,@@rd
	239	bpl pcrel:8 bset rs,@@abs:8
	240	* bpl pcrel:16 bsr pcrel:8
	241	bmi pcrel:8 bsr pcrel:16
	242	* bmi pcrel:16 bst #imm,rd
	243	bge pcrel:8 bst #imm,@@rd
	244	* bge pcrel:16 bst #imm,@@abs:8
	245	blt pcrel:8 btst #imm,rd
	246	* blt pcrel:16 btst #imm,@@rd
	247	bgt pcrel:8 btst #imm,@@abs:8
248	* bgt pcrel:16 btst rs,rd
249	ble pcrel:8 btst rs,@@rd
250	* ble pcrel:16 btst rs,@@abs:8
251	bclr #imm,rd bxor #imm,rd
252	bclr #imm,@@rd bxor #imm,@@rd
253	bclr #imm,@@abs:8 bxor #imm,@@abs:8
254	bclr rs,rd cmp.b #imm,rd
255	bclr rs,@@rd cmp.b rs,rd
256	bclr rs,@@abs:8 cmp.w rs,rd
257	biand #imm,rd cmp.w rs,rd
258	biand #imm,@@rd * cmp.w #imm,rd
259	biand #imm,@@abs:8 * cmp.l #imm,rd
260	bild #imm,rd * cmp.l rs,rd
261	bild #imm,@@rd daa rs
262	bild #imm,@@abs:8 das rs
263	bior #imm,rd dec.b rs
264	bior #imm,@@rd * dec.w #imm,rd
265	bior #imm,@@abs:8 * dec.l #imm,rd
266	bist #imm,rd divxu.b rs,rd
267	bist #imm,@@rd * divxu.w rs,rd
268	bist #imm,@@abs:8 * divxs.b rs,rd
269	bixor #imm,rd * divxs.w rs,rd
270	bixor #imm,@@rd eepmov
271	bixor #imm,@@abs:8 * eepmovw
272	@page
273	* exts.w rd mov.w rs,@@abs:16
274	* exts.l rd * mov.l #imm,rd
275	* extu.w rd * mov.l rs,rd
276	* extu.l rd * mov.l @@rs,rd
277	inc rs * mov.l @@(disp:16,rs),rd
278	* inc.w #imm,rd * mov.l @@(disp:24,rs),rd
279	* inc.l #imm,rd * mov.l @@rs+,rd
280	jmp @@rs * mov.l @@abs:16,rd
281	jmp abs * mov.l @@abs:24,rd
282	jmp @@@@abs:8 * mov.l rs,@@rd
283	jsr @@rs * mov.l rs,@@(disp:16,rd)
284	jsr abs * mov.l rs,@@(disp:24,rd)
285	jsr @@@@abs:8 * mov.l rs,@@-rd
286	ldc #imm,ccr * mov.l rs,@@abs:16
287	ldc rs,ccr * mov.l rs,@@abs:24
288	* ldc @@abs:16,ccr movfpe @@abs:16,rd
289	* ldc @@abs:24,ccr movtpe rs,@@abs:16
290	* ldc @@(disp:16,rs),ccr mulxu.b rs,rd
291	* ldc @@(disp:24,rs),ccr * mulxu.w rs,rd
292	* ldc @@rs+,ccr * mulxs.b rs,rd
293	* ldc @@rs,ccr * mulxs.w rs,rd
294	* mov.b @@(disp:24,rs),rd neg.b rs
295	* mov.b rs,@@(disp:24,rd) * neg.w rs
296	mov.b @@abs:16,rd * neg.l rs
297	mov.b rs,rd nop
298	mov.b @@abs:8,rd not.b rs
299	mov.b rs,@@abs:8 * not.w rs
300	mov.b rs,rd * not.l rs
301	mov.b #imm,rd or.b #imm,rd
302	mov.b @@rs,rd or.b rs,rd
303	mov.b @@(disp:16,rs),rd * or.w #imm,rd
304	mov.b @@rs+,rd * or.w rs,rd
305	mov.b @@abs:8,rd * or.l #imm,rd
306	mov.b rs,@@rd * or.l rs,rd
307	mov.b rs,@@(disp:16,rd) orc #imm,ccr
308	mov.b rs,@@-rd pop.w rs
309	mov.b rs,@@abs:8 * pop.l rs
310	mov.w rs,@@rd push.w rs
311	* mov.w @@(disp:24,rs),rd * push.l rs
312	* mov.w rs,@@(disp:24,rd) rotl.b rs
313	* mov.w @@abs:24,rd * rotl.w rs
314	* mov.w rs,@@abs:24 * rotl.l rs
315	mov.w rs,rd rotr.b rs
316	mov.w #imm,rd * rotr.w rs
317	mov.w @@rs,rd * rotr.l rs
318	mov.w @@(disp:16,rs),rd rotxl.b rs
319	mov.w @@rs+,rd * rotxl.w rs
320	mov.w @@abs:16,rd * rotxl.l rs
321	mov.w rs,@@(disp:16,rd) rotxr.b rs
322	mov.w rs,@@-rd * rotxr.w rs
323	@page
324	* rotxr.l rs * stc ccr,@@(disp:24,rd)
325	bpt * stc ccr,@@-rd
326	rte * stc ccr,@@abs:16
327	rts * stc ccr,@@abs:24
328	shal.b rs sub.b rs,rd
329	* shal.w rs sub.w rs,rd
330	* shal.l rs * sub.w #imm,rd
331	shar.b rs * sub.l rs,rd
332	* shar.w rs * sub.l #imm,rd
333	* shar.l rs subs #imm,rd
334	shll.b rs subx #imm,rd
335	* shll.w rs subx rs,rd
336	* shll.l rs * trapa #imm
337	shlr.b rs xor #imm,rd
338	* shlr.w rs xor rs,rd
339	* shlr.l rs * xor.w #imm,rd
340	sleep * xor.w rs,rd
341	stc ccr,rd * xor.l #imm,rd
342	* stc ccr,@@rs * xor.l rs,rd
343	* stc ccr,@@(disp:16,rd) xorc #imm,ccr
344	@end smallexample
345	@end ifset
346
347	@cindex size suffixes, H8/300
348	@cindex H8/300 size suffixes
349	Four H8/300 instructions (@code{add}, @code{cmp}, @code{mov},
350	@code{sub}) are defined with variants using the suffixes @samp{.b},
351	@samp{.w}, and @samp{.l} to specify the size of a memory operand.
352	@code{@value{AS}} supports these suffixes, but does not require them;
353	since one of the operands is always a register, @code{@value{AS}} can
354	deduce the correct size.
355
356	For example, since @code{r0} refers to a 16-bit register,
357	@example
358	mov r0,@@foo
359	@exdent is equivalent to
360	mov.w r0,@@foo
361	@end example
362
363	If you use the size suffixes, @code{@value{AS}} issues a warning when
364	the suffix and the register size do not match.