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82704155 | 1 | @c Copyright (C) 2018-2019 Free Software Foundation, Inc. |
7b4ae824 JD |
2 | @c This is part of the GAS manual. |
3 | @c For copying conditions, see the file as.texinfo. | |
4 | @ifset GENERIC | |
5 | @page | |
6 | @node S12Z-Dependent | |
7 | @chapter S12Z Dependent Features | |
8 | @end ifset | |
9 | @ifclear GENERIC | |
10 | @node Machine Dependencies | |
11 | @chapter S12Z Dependent Features | |
12 | @end ifclear | |
13 | ||
14 | The Freescale S12Z version of @code{@value{AS}} has a few machine | |
15 | dependent features. | |
16 | ||
17 | @cindex S12Z support | |
18 | @menu | |
19 | * S12Z-Opts:: S12Z Options | |
20 | * S12Z-Syntax:: Syntax | |
21 | * S12Z-Directives:: Assembler Directives | |
22 | * S12Z-opcodes:: Opcodes | |
23 | @end menu | |
24 | ||
25 | @node S12Z-Opts | |
26 | @section S12Z Options | |
27 | ||
28 | @cindex options, S12Z | |
29 | @cindex S12Z options | |
30 | ||
31 | @node S12Z-Syntax | |
32 | @section Syntax | |
33 | ||
34 | @cindex S12Z syntax | |
35 | @cindex syntax, S12Z | |
36 | ||
37 | In the S12Z syntax, the instruction name comes first and it may | |
38 | be followed by one or by several operands. | |
39 | In most cases the maximum number of operands is three. | |
40 | Some instructions accept and (in certain situations require) a suffix | |
41 | indicating the size of the operand. | |
42 | The suffix is separated from the instruction name by a period (@samp{.}) | |
43 | and may be one of @samp{b}, @samp{w}, @samp{p} or @samp{l} indicating | |
44 | `byte' (a single byte), `word' (2 bytes), `pointer' (3 bytes) or `long' (4 bytes) | |
45 | respectively. | |
46 | Operands are separated by a comma (@samp{,}). | |
47 | A comma however does not act as a separator if it appears within parentheses | |
48 | (@samp{()}) or within square brackets (@samp{[]}). | |
49 | @code{@value{AS}} will complain if too many, too few or inappropriate operands | |
50 | are specified for a given instruction. | |
51 | The MRI mode is not supported for this architecture. | |
52 | Example: | |
53 | ||
54 | @smallexample | |
55 | bset.b 0xA98, #5 | |
56 | mov.b #6, 0x2409 | |
57 | ld d0, #4 | |
58 | mov.l (d0, x), 0x2409 | |
59 | inc d0 | |
60 | cmp d0, #12 | |
61 | blt *-4 | |
62 | lea x, 0x2409 | |
63 | st y, (1, x) | |
64 | @end smallexample | |
65 | ||
66 | @cindex line comment character, S12Z | |
67 | @cindex S12Z line comment character | |
68 | The presence of a @samp{;} character anywhere | |
69 | on a line indicates the start of a comment that extends to the end of | |
70 | that line. | |
71 | ||
72 | A @samp{*} or a @samp{#} character at the start of a line also | |
73 | introduces a line comment, but these characters do not work elsewhere | |
74 | on the line. If the first character of the line is a @samp{#} then as | |
75 | well as starting a comment, the line could also be logical line number | |
76 | directive (@pxref{Comments}) or a preprocessor control command | |
77 | (@pxref{Preprocessing}). | |
78 | ||
79 | @cindex line separator, S12Z | |
80 | @cindex statement separator, S12Z | |
81 | @cindex S12Z line separator | |
82 | The S12Z assembler does not currently support a line separator | |
83 | character. | |
84 | ||
85 | @cindex S12Z addressing modes | |
86 | @cindex addressing modes, S12Z | |
87 | The following addressing modes are understood for the S12Z. | |
88 | @table @dfn | |
89 | @item Immediate | |
90 | @samp{#@var{number}} | |
91 | ||
92 | @item Immediate Bit Field | |
93 | @samp{#@var{width}:@var{offset}} | |
94 | ||
95 | Bit field instructions in the immediate mode require the width and offset to | |
96 | be specified. | |
97 | The @var{width} pararmeter specifies the number of bits in the field. | |
98 | It should be a number in the range [1,32]. | |
99 | @var{Offset} determines the position within the field where the operation | |
100 | should start. | |
101 | It should be a number in the range [0,31]. | |
102 | ||
103 | @item Relative | |
104 | @samp{*@var{symbol}}, or @samp{*[+-]@var{digits}} | |
105 | ||
106 | Program counter relative addresses have a width of 15 bits. | |
107 | Thus, they must be within the range [-32768, 32767]. | |
108 | ||
109 | @item Register | |
110 | @samp{@var{reg}} | |
111 | ||
112 | Some instructions accept a register as an operand. | |
113 | In general, @var{reg} may be a data register (@samp{D0}, @samp{D1} @dots{} | |
114 | @samp{D7}), the @var{X} register or the @var{Y} register. | |
115 | ||
116 | A few instructions accept as an argument the stack pointer | |
117 | register (@samp{S}), and/or the program counter (@samp{P}). | |
118 | ||
119 | Some very special instructions accept arguments which refer to the | |
120 | condition code register. For these arguments the syntax is | |
121 | @samp{CCR}, @samp{CCH} or @samp{CCL} which refer to the complete condition code register, the condition code register high byte and the condition code register low byte respectively. | |
122 | ||
123 | @item Absolute Direct | |
124 | @samp{@var{symbol}}, or @samp{@var{digits}} | |
125 | ||
126 | @item Absolute Indirect | |
127 | @samp{[@var{symbol}}, or @samp{@var{digits}]} | |
128 | ||
129 | ||
130 | @item Constant Offset Indexed | |
131 | @samp{(@var{number},@var{reg})} | |
132 | ||
133 | @var{Reg} may be either @samp{X}, @samp{Y}, @samp{S} or | |
134 | @samp{P} or one of the data registers @samp{D0}, @samp{D1} @dots{} | |
135 | @samp{D7}. | |
136 | If any of the registers @samp{D2} @dots{} @samp{D5} are specified, then the | |
137 | register value is treated as a signed value. | |
138 | Otherwise it is treated as unsigned. | |
139 | @var{Number} may be any integer in the range [-8388608,8388607]. | |
140 | ||
141 | @item Offset Indexed Indirect | |
142 | @samp{[@var{number},@var{reg}]} | |
143 | ||
144 | @var{Reg} may be either @samp{X}, @samp{Y}, @samp{S} or | |
145 | @samp{P}. | |
146 | @var{Number} may be any integer in the range [-8388608,8388607]. | |
147 | ||
148 | @item Auto Pre-Increment/Pre-Decrement/Post-Increment/Post-Decrement | |
149 | @samp{-@var{reg}}, | |
150 | @samp{+@var{reg}}, | |
151 | @samp{@var{reg}-} or | |
152 | @samp{@var{reg}+} | |
153 | ||
154 | This addressing mode is typically used to access a value at an address, | |
155 | and simultaneously to increment/decrement the register pointing to that | |
156 | address. | |
157 | Thus @var{reg} may be any of the 24 bit registers @samp{X}, @samp{Y}, or | |
158 | @samp{S}. | |
159 | Pre-increment and post-decrement are not available for | |
160 | register @samp{S} (only post-increment and pre-decrement are available). | |
161 | ||
162 | @item Register Offset Direct | |
163 | @samp{(@var{data-reg},@var{reg})} | |
164 | ||
165 | @var{Reg} can be either @samp{X}, @samp{Y}, or @samp{S}. | |
166 | @var{Data-reg} | |
167 | must be one of the data registers @samp{D0}, @samp{D1} @dots{} @samp{D7}. | |
168 | If any of the registers @samp{D2} @dots{} @samp{D5} are specified, then | |
169 | the register value is treated as a signed value. | |
170 | Otherwise it is treated as unsigned. | |
171 | ||
172 | @item Register Offset Indirect | |
173 | @samp{[@var{data-reg},@var{reg}]} | |
174 | ||
175 | @var{Reg} can be either @samp{X} or @samp{Y}. | |
176 | @var{Data-reg} | |
177 | must be one of the data registers @samp{D0}, @samp{D1} @dots{} @samp{D7}. | |
178 | If any of the registers @samp{D2} @dots{} @samp{D5} are specified, then | |
179 | the register value is treated as a signed value. | |
180 | Otherwise it is treated as unsigned. | |
181 | ||
182 | ||
183 | @end table | |
184 | ||
185 | For example: | |
186 | ||
187 | @smallexample | |
188 | trap #197 | |
189 | bra *+49 | |
190 | bra .L0 | |
191 | jmp 0xFE0034 | |
192 | jmp [0xFD0012] | |
193 | inc.b (4,x) | |
194 | dec.w [4,y] | |
195 | clr.p (-s) | |
196 | neg.l (d0, s) | |
197 | com.b [d1, x] | |
198 | jsr (45, d0) | |
199 | psh cch | |
200 | @end smallexample | |
201 | ||
202 | @node S12Z-Directives | |
203 | @section Assembler Directives | |
204 | ||
205 | @cindex assembler directives, S12Z | |
206 | ||
207 | @node S12Z-opcodes | |
208 | @section Opcodes | |
209 | ||
210 | @cindex S12Z opcodes | |
211 | @cindex opcodes, S12Z | |
212 | @cindex instruction set, S12Z |