Commit | Line | Data |
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efec4a28 | 1 | /* itbl-ops.h |
efec4a28 DP |
2 | Copyright (C) 1997 Free Software Foundation, Inc. |
3 | ||
4 | This file is part of GAS, the GNU Assembler. | |
5 | ||
6 | GAS is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2, or (at your option) | |
9 | any later version. | |
10 | ||
11 | GAS is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GAS; see the file COPYING. If not, write to the Free | |
18 | Software Foundation, 59 Temple Place - Suite 330, Boston, MA | |
19 | 02111-1307, USA. */ | |
20 | ||
8e5c905e DP |
21 | /* External functions, constants and defines for itbl support */ |
22 | ||
efec4a28 | 23 | #include "ansidecl.h" |
8e5c905e DP |
24 | #include "itbl-cpu.h" |
25 | ||
efec4a28 | 26 | /* Defaults for definitions required by generic code */ |
8e5c905e DP |
27 | #ifndef ITBL_NUMBER_OF_PROCESSORS |
28 | #define ITBL_NUMBER_OF_PROCESSORS 1 | |
29 | #endif | |
30 | ||
efec4a28 | 31 | #ifndef ITBL_MAX_BITPOS |
8e5c905e DP |
32 | #define ITBL_MAX_BITPOS 31 |
33 | #endif | |
34 | ||
efec4a28 | 35 | #ifndef ITBL_TYPE |
8e5c905e DP |
36 | #define ITBL_TYPE unsigned long |
37 | #endif | |
38 | ||
39 | #ifndef ITBL_IS_INSN | |
40 | #define ITBL_IS_INSN(insn) 1 | |
41 | #endif | |
42 | ||
43 | #ifndef ITBL_DECODE_PNUM | |
44 | #define ITBL_DECODE_PNUM(insn) 0 | |
45 | #endif | |
46 | ||
47 | #ifndef ITBL_ENCODE_PNUM | |
48 | #define ITBL_ENCODE_PNUM(pnum) 0 | |
49 | #endif | |
50 | ||
51 | typedef ITBL_TYPE t_insn; | |
52 | ||
53 | /* types of entries */ | |
efec4a28 DP |
54 | typedef enum |
55 | { | |
8e5c905e DP |
56 | e_insn, |
57 | e_dreg, | |
efec4a28 | 58 | e_regtype0 = e_dreg, |
8e5c905e DP |
59 | e_creg, |
60 | e_greg, | |
61 | e_addr, | |
efec4a28 | 62 | e_nregtypes = e_greg + 1, |
8e5c905e DP |
63 | e_immed, |
64 | e_ntypes, | |
efec4a28 DP |
65 | e_invtype /* invalid type */ |
66 | } e_type; | |
8e5c905e | 67 | |
efec4a28 DP |
68 | typedef enum |
69 | { | |
8e5c905e | 70 | e_p0, |
efec4a28 DP |
71 | e_nprocs = NUMBER_OF_PROCESSORS, |
72 | e_invproc /* invalid processor */ | |
73 | } e_processor; | |
8e5c905e | 74 | |
efec4a28 DP |
75 | /* 0 means an instruction table was not specified. */ |
76 | extern int itbl_have_entries; | |
8e5c905e | 77 | |
efec4a28 | 78 | /* These routines are visible to the main part of the assembler */ |
8e5c905e | 79 | |
efec4a28 DP |
80 | int itbl_parse PARAMS ((char *insntbl)); |
81 | void itbl_init PARAMS ((void)); | |
82 | char *itbl_get_field PARAMS ((char **s)); | |
83 | unsigned long itbl_assemble PARAMS ((char *name, char *operands)); | |
84 | int itbl_disassemble PARAMS ((char *str, unsigned long insn)); | |
85 | int itbl_parse PARAMS ((char *tbl)); /* parses insn tbl */ | |
86 | unsigned long itbl_get_reg_val PARAMS ((char *name)); | |
87 | unsigned long itbl_get_val PARAMS ((e_processor processor, e_type type, | |
88 | char *name)); | |
89 | char *itbl_get_name PARAMS ((e_processor processor, e_type type, | |
90 | unsigned long val)); | |
91 | ||
92 | /* These routines are called by the table parser used to build the | |
93 | dynamic list of new processor instructions and registers. */ | |
94 | ||
95 | struct itbl_entry *itbl_add_reg PARAMS ((int yyproc, int yytype, | |
96 | char *regname, int regnum)); | |
97 | struct itbl_entry *itbl_add_insn PARAMS ((int yyproc, char *name, | |
98 | unsigned long value, int sbit, int ebit, unsigned long flags)); | |
99 | struct itbl_field *itbl_add_operand PARAMS ((struct itbl_entry * e, int yytype, | |
100 | int sbit, int ebit, unsigned long flags)); |