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a06ea964 NC |
1 | /* bitfield-bfm.s Test file for AArch64 bitfield instructions |
2 | sbfm, bfm and ubfm mnemonics. | |
3 | ||
b90efa5b | 4 | Copyright (C) 2011-2015 Free Software Foundation, Inc. |
a06ea964 NC |
5 | Contributed by ARM Ltd. |
6 | ||
7 | This file is part of GAS. | |
8 | ||
9 | GAS is free software; you can redistribute it and/or modify | |
10 | it under the terms of the GNU General Public License as published by | |
11 | the Free Software Foundation; either version 3 of the license, or | |
12 | (at your option) any later version. | |
13 | ||
14 | GAS is distributed in the hope that it will be useful, | |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
18 | ||
19 | You should have received a copy of the GNU General Public License | |
20 | along with this program; see the file COPYING3. If not, | |
21 | see <http://www.gnu.org/licenses/>. */ | |
22 | ||
23 | /* This file tests the GAS's ability in assembling sbfm, bfm and ubfm | |
24 | instructions. Disassembler should use alias mnemonics to display | |
25 | {[u|s]}bfm instructions. bitfield-bfm.s and bitfield-alias.s will be | |
26 | assembled into idential binary, which is why the two tests share the | |
27 | same dump match file 'bitfield-dump'. */ | |
28 | ||
29 | // <op> <Wd>, <Wn> | |
30 | .macro bf_32r op | |
31 | \op wzr, w7 | |
32 | .endm | |
33 | ||
34 | // <op> <Xd>, <Wn> | |
35 | .macro bf_64x op | |
36 | \op xzr, w7 | |
37 | .endm | |
38 | ||
39 | // <op> <Wd>, <Wn>, #<shift> | |
40 | .macro bf_32s op, shift | |
41 | \op wzr, w7, \shift | |
42 | .endm | |
43 | ||
44 | // <op> <Xd>, <Xn>, #<shift> | |
45 | .macro bf_64s op, shift | |
46 | \op xzr, x7, \shift | |
47 | .endm | |
48 | ||
49 | ||
50 | .macro op_bfm signed, reg, immr, imms | |
51 | \signed\()bfm \reg\()zr, \reg\()7, #\immr, #\imms // e.g. sbfm xzr, x7, #0, #15 | |
52 | .endm | |
53 | ||
54 | .macro ext2bfm signed, reg, imms | |
55 | op_bfm signed=\signed, reg=\reg, immr=0, imms=\imms | |
56 | .endm | |
57 | ||
58 | // shift right -> bfm | |
59 | .macro sr2bfm signed, reg, shift, imms | |
60 | op_bfm signed=\signed, reg=\reg, immr=\shift, imms=\imms | |
61 | .endm | |
62 | ||
63 | // shift left -> bfm | |
64 | .macro sl2bfm signed, reg, shift | |
65 | .ifc \reg, w | |
66 | op_bfm signed=\signed, reg=\reg, immr="((32-\shift)&31)", imms="(31-\shift)" | |
67 | .else | |
68 | op_bfm signed=\signed, reg=\reg, immr="((64-\shift)&63)", imms="(63-\shift)" | |
69 | .endif | |
70 | .endm | |
71 | ||
72 | // bitfield insert -> bfm | |
73 | .macro ins2bfm signed, reg, lsb, width | |
74 | .ifc \reg, w | |
75 | op_bfm signed=\signed, reg=\reg, immr="((32-\lsb)&31)", imms="(\width-1)" | |
76 | .else | |
77 | op_bfm signed=\signed, reg=\reg, immr="((64-\lsb)&63)", imms="(\width-1)" | |
78 | .endif | |
79 | .endm | |
80 | ||
81 | // bitfield extract -> bfm | |
82 | .macro x2bfm signed, reg, lsb, width | |
83 | op_bfm signed=\signed, reg=\reg, immr=\lsb, imms="(\lsb+\width-1)" | |
84 | .endm | |
85 | ||
86 | .text | |
87 | /* | |
88 | * aliasing extend | |
89 | */ | |
90 | ||
91 | ext2bfm s, w, 7 // sxtb wzr, w7 | |
92 | ext2bfm s, x, 7 // sxtb xzr, x7 | |
93 | ext2bfm s, w, 15 // sxth wzr, w7 | |
94 | ext2bfm s, x, 15 // sxth xzr, x7 | |
95 | ext2bfm s, x, 31 // sxtw xzr, x7 | |
96 | ||
97 | ext2bfm u, w, 7 // uxtb wzr, w7 | |
98 | ext2bfm u, w, 7 // uxtb xzr, w7 | |
99 | ext2bfm u, w, 15 // uxth wzr, w7 | |
100 | ext2bfm u, w, 15 // uxth xzr, w7 | |
101 | orr wzr, wzr, w7 // uxtw wzr, w7 | |
102 | orr wzr, wzr, w7 // uxtw wzr, w7 | |
103 | ||
104 | /* | |
105 | * aliasing shift | |
106 | */ | |
107 | ||
108 | .irp shift 0, 16, 31 // asr wzr, w7, #\shift | |
109 | sr2bfm s, w, \shift, 31 | |
110 | .endr | |
111 | ||
112 | .irp shift 0, 31, 63 // asr xzr, x7, #\shift | |
113 | sr2bfm s, x, \shift, 63 | |
114 | .endr | |
115 | ||
116 | .irp shift 0, 16, 31 // lsr wzr, w7, #\shift | |
117 | sr2bfm u, w, \shift, 31 | |
118 | .endr | |
119 | ||
120 | .irp shift 0, 31, 63 // lsr xzr, x7, #\shift | |
121 | sr2bfm u, x, \shift, 63 | |
122 | .endr | |
123 | ||
124 | .irp shift 0, 16, 31 // lsl wzr, w7, #\shift | |
125 | sl2bfm u, w, \shift | |
126 | .endr | |
127 | ||
128 | .irp shift 0, 31, 63 // lsl xzr, x7, #\shift | |
129 | sl2bfm u, x, \shift | |
130 | .endr | |
131 | ||
132 | /* | |
133 | * aliasing insert and extract | |
134 | */ | |
135 | ||
136 | .irp signed, s, , u | |
137 | .irp whichm, ins2bfm, x2bfm | |
138 | \whichm \signed, w, 0, 1 | |
139 | \whichm \signed, w, 0, 16 | |
140 | \whichm \signed, w, 0, 32 | |
141 | \whichm \signed, w, 16, 1 | |
142 | \whichm \signed, w, 16, 8 | |
143 | \whichm \signed, w, 16, 16 | |
144 | \whichm \signed, w, 31, 1 | |
145 | ||
146 | \whichm \signed, x, 0, 1 | |
147 | \whichm \signed, x, 0, 32 | |
148 | \whichm \signed, x, 0, 64 | |
149 | \whichm \signed, x, 32, 1 | |
150 | \whichm \signed, x, 32, 16 | |
151 | \whichm \signed, x, 32, 32 | |
152 | \whichm \signed, x, 63, 1 | |
153 | .endr | |
154 | .endr |