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a06ea964 NC |
1 | // mov.s Test file for AArch64 mov aliases. |
2 | // This test file is also used for the mov-no-aliases test. | |
3 | ||
4 | .text | |
5 | ||
6 | // MOV/xr Xd|SP, Xn|SP | |
7 | // Move (extended register) is an alias for ADD/xi Xd,Xn,#0, but | |
8 | // only when one or other of the registers is SP. In other cases | |
9 | // the ORR/xr Xd,#0,Xn instruction will be used. | |
10 | ||
11 | mov w15, wsp | |
12 | mov x15, sp | |
13 | mov wsp, w7 | |
14 | mov sp, x7 | |
15 | mov wsp, wsp | |
16 | mov sp, sp | |
17 | ||
18 | mov x7, x15 | |
19 | mov w7, w15 | |
20 | ||
21 | mov w1, 88 | |
22 | mov w0, -1 | |
23 | ||
24 | mov x0, -4294967296 | |
25 | ||
26 | mov sp, #15 | |
27 | mov wsp, #15 | |
28 | mov xzr, #15 | |
29 | mov wzr, #15 | |
30 | ||
31 | mov w7, v15.s[3] | |
32 | mov x15, v31.d[1] | |
33 | ||
34 | mov x0, $$5 | |
35 | .set $$5, 0xff | |
36 | ||
37 | // ORR w0,w0,#0x99999999 with a non-standard encoding, i.e. the top | |
38 | // 4 bits in the 'immr' field is non-zero. The top bits are ignored | |
39 | // during the decoding. | |
40 | .inst 0x320de400 |