Commit | Line | Data |
---|---|---|
bc33f5f9 | 1 | .*: Assembler messages: |
ab3b8fcf RS |
2 | .*: Error: operand 3 must be a SIMD vector register -- `cmeq v0\.4s,v1\.4s,x0' |
3 | .*: Error: operand 3 must be a SIMD vector register -- `cmeq v0\.4s,v1\.4s,s0' | |
bc33f5f9 RS |
4 | .*: Error: immediate zero expected at operand 3 -- `cmeq v0\.4s,v1\.4s,p0\.b' |
5 | .*: Error: immediate zero expected at operand 3 -- `cmeq v0\.4s,v1\.4s,#p0\.b' | |
6 | .*: Error: 64-bit integer or SP register expected at operand 2 -- `ldr x1,\[s0\]' | |
7 | .*: Error: 64-bit integer or SP register expected at operand 2 -- `ldr x1,\[z0\]' | |
8 | .*: Error: 64-bit integer or SP register expected at operand 2 -- `ldr x1,\[z0\.s\]' | |
9 | .*: Error: 64-bit integer or SP register expected at operand 2 -- `ldr x1,\[p0\]' | |
10 | .*: Error: 64-bit integer or SP register expected at operand 2 -- `ldr x1,\[p0\.b\]' | |
11 | .*: Error: invalid shift amount at operand 2 -- `ldr x0,\[x1,x2,lsl p0\.b\]' | |
12 | .*: Error: invalid shift amount at operand 2 -- `ldr x0,\[x1,x2,lsl#p0\.b\]' | |
13 | .*: Error: immediate out of range at operand 3 -- `and x0,x0,#x0' | |
14 | .*: Error: immediate out of range at operand 3 -- `and x0,x0,s0' | |
15 | .*: Error: immediate out of range at operand 3 -- `and x0,x0,#s0' | |
16 | .*: Error: immediate out of range at operand 3 -- `and x0,x0,z0' | |
17 | .*: Error: immediate out of range at operand 3 -- `and x0,x0,#z0' | |
18 | .*: Error: immediate out of range at operand 3 -- `and x0,x0,z0\.s' | |
19 | .*: Error: immediate out of range at operand 3 -- `and x0,x0,#z0\.s' | |
20 | .*: Error: immediate out of range at operand 3 -- `and x0,x0,p0' | |
21 | .*: Error: immediate out of range at operand 3 -- `and x0,x0,#p0' | |
ab3b8fcf | 22 | .*: Error: operand 3 must be an integer register -- `lsl x0,x0,s0' |
bc33f5f9 RS |
23 | .*: Error: immediate operand required at operand 1 -- `svc x0' |
24 | .*: Error: immediate operand required at operand 1 -- `svc s0' |