projects / deliverable / binutils-gdb.git / blame
| Commit | Line | Data |
|---|---|---|
| 1a04d1a7 MW |
1 | /* sysreg-2.s Test file for ARMv8.2 system registers. */ |
| 2 | ||
| 3 | .macro rw_sys_reg sys_reg xreg r w | |
| 4 | .ifc \w, 1 | |
| 5 | msr \sys_reg, \xreg | |
| 6 | .endif | |
| 7 | .ifc \r, 1 | |
| 8 | mrs \xreg, \sys_reg | |
| 9 | .endif | |
| 10 | .endm | |
| 11 | ||
| 12 | .text | |
| 13 | ||
| 14 | rw_sys_reg sys_reg=id_aa64mmfr1_el1 xreg=x5 r=1 w=0 | |
| 15 | rw_sys_reg sys_reg=id_aa64mmfr2_el1 xreg=x7 r=1 w=0 | |
| 47f81142 MW |
16 | |
| 17 | /* RAS extension. */ | |
| 18 | ||
| 19 | rw_sys_reg sys_reg=erridr_el1 xreg=x5 r=1 w=0 | |
| 20 | rw_sys_reg sys_reg=errselr_el1 xreg=x7 r=1 w=1 | |
| 21 | ||
| 22 | rw_sys_reg sys_reg=erxfr_el1 xreg=x5 r=1 w=0 | |
| 23 | rw_sys_reg sys_reg=erxctlr_el1 xreg=x5 r=1 w=1 | |
| 24 | rw_sys_reg sys_reg=erxstatus_el1 xreg=x5 r=1 w=1 | |
| 25 | rw_sys_reg sys_reg=erxaddr_el1 xreg=x5 r=1 w=1 | |
| 26 | ||
| 27 | rw_sys_reg sys_reg=erxmisc0_el1 xreg=x5 r=1 w=1 | |
| 28 | rw_sys_reg sys_reg=erxmisc1_el1 xreg=x5 r=1 w=1 | |
| 29 | ||
| 30 | rw_sys_reg sys_reg=vsesr_el2 xreg=x5 r=1 w=0 | |
| 31 | rw_sys_reg sys_reg=disr_el1 xreg=x5 r=1 w=1 | |
| 32 | rw_sys_reg sys_reg=vdisr_el2 xreg=x5 r=1 w=0 | |
| d6bf7ce6 MW |
33 | |
| 34 | /* DC CVAP. */ | |
| 35 | ||
| 36 | dc cvac, x0 | |
| 37 | dc cvau, x1 | |
| 38 | dc cvap, x2 |