projects / deliverable / binutils-gdb.git / blame
| Commit | Line | Data |
|---|---|---|
| 6456d318 TC |
1 | # Generates tests to see if setting bit 22 (sz) and 21 (L) together correctly |
| 2 | # marks the instruction as undefined. This pattern can't be created by the | |
| 3 | # assembler so instead manually encode it. | |
| 4 | .macro gen_insns opc | |
| 5 | .inst \opc | |
| 6 | .inst (\opc | 0x600000) | |
| 7 | .endm | |
| 8 | ||
| 9 | # fmul s0, s0, v16.s[0] | |
| 10 | gen_insns 0x5f909000 | |
| 11 | ||
| 12 | # fmla s0, s0, v16.s[0] | |
| 13 | gen_insns 0x5f901000 | |
| 14 | ||
| 15 | # fmls s0, s0, v16.s[0] | |
| 16 | gen_insns 0x5f905000 | |
| 17 | ||
| 18 | # fmulx s0, s0, v16.s[0] | |
| 19 | gen_insns 0x7f909000 | |
| 20 | ||
| 21 | # fmul d0, d0, v16.d[0] | |
| 22 | gen_insns 0x5fd09000 | |
| 23 | ||
| 24 | # fmla d0, d0, v16.d[0] | |
| 25 | gen_insns 0x5fd01000 | |
| 26 | ||
| 27 | # fmls d0, d0, v16.d[0] | |
| 28 | gen_insns 0x5fd05000 | |
| 29 | ||
| 30 | # fmulx d0, d0, v16.d[0] | |
| 31 | gen_insns 0x7fd09000 | |
| 32 | ||
| 33 | # fmul v0.4s, v0.4s, v16.s[0] | |
| 34 | gen_insns 0x4f909000 | |
| 35 | ||
| 36 | # fmla v0.4s, v0.4s, v16.s[0] | |
| 37 | gen_insns 0x4f901000 | |
| 38 | ||
| 39 | # fmls v0.4s, v0.4s, v16.s[0] | |
| 40 | gen_insns 0x4f905000 | |
| 41 | ||
| 42 | # fmulx v0.4s, v0.4s, v16.s[0] | |
| 43 | gen_insns 0x6f909000 | |
| 44 | ||
| 45 | # fmul v0.2d, v0.2d, v16.d[0] | |
| 46 | gen_insns 0x4fd09000 | |
| 47 | ||
| 48 | # fmla v0.2d, v0.2d, v16.d[0] | |
| 49 | gen_insns 0x4fd01000 | |
| 50 | ||
| 51 | # fmls v0.2d, v0.2d, v16.d[0] | |
| 52 | gen_insns 0x4fd05000 | |
| 53 | ||
| 54 | # fmulx v0.2d, v0.2d, v16.d[0] | |
| 55 | gen_insns 0x6fd09000 |