projects / deliverable / binutils-gdb.git / blame
| Commit | Line | Data |
|---|---|---|
| 50463d2a RE |
1 | #objdump: -dr --prefix-addresses --show-raw-insn |
| 2 | #name: ARM v1 instructions | |
| 49e5c6c5 | 3 | #as: -mcpu=arm7t |
| 088fa78e | 4 | #error-output: armv1.l |
| 50463d2a RE |
5 | |
| 6 | # Test the ARM v1 instructions | |
| 7 | ||
| 8 | .*: +file format .*arm.* | |
| 9 | ||
| 10 | Disassembly of section .text: | |
| 11 | 0+00 <[^>]*> e0000000 ? and r0, r0, r0 | |
| 12 | 0+04 <[^>]*> e0100000 ? ands r0, r0, r0 | |
| 13 | 0+08 <[^>]*> e0200000 ? eor r0, r0, r0 | |
| 14 | 0+0c <[^>]*> e0300000 ? eors r0, r0, r0 | |
| 15 | 0+10 <[^>]*> e0400000 ? sub r0, r0, r0 | |
| 16 | 0+14 <[^>]*> e0500000 ? subs r0, r0, r0 | |
| 17 | 0+18 <[^>]*> e0600000 ? rsb r0, r0, r0 | |
| 18 | 0+1c <[^>]*> e0700000 ? rsbs r0, r0, r0 | |
| 19 | 0+20 <[^>]*> e0800000 ? add r0, r0, r0 | |
| 20 | 0+24 <[^>]*> e0900000 ? adds r0, r0, r0 | |
| 21 | 0+28 <[^>]*> e0a00000 ? adc r0, r0, r0 | |
| 22 | 0+2c <[^>]*> e0b00000 ? adcs r0, r0, r0 | |
| 23 | 0+30 <[^>]*> e0c00000 ? sbc r0, r0, r0 | |
| 24 | 0+34 <[^>]*> e0d00000 ? sbcs r0, r0, r0 | |
| 25 | 0+38 <[^>]*> e0e00000 ? rsc r0, r0, r0 | |
| 26 | 0+3c <[^>]*> e0f00000 ? rscs r0, r0, r0 | |
| 27 | 0+40 <[^>]*> e1800000 ? orr r0, r0, r0 | |
| 28 | 0+44 <[^>]*> e1900000 ? orrs r0, r0, r0 | |
| 29 | 0+48 <[^>]*> e1c00000 ? bic r0, r0, r0 | |
| 30 | 0+4c <[^>]*> e1d00000 ? bics r0, r0, r0 | |
| 31 | 0+50 <[^>]*> e1100000 ? tst r0, r0 | |
| 32 | 0+54 <[^>]*> e1100000 ? tst r0, r0 | |
| 945ee430 | 33 | 0+58 <[^>]*> e110f000 ? tst r0, r0 |
| 50463d2a RE |
34 | 0+5c <[^>]*> e1300000 ? teq r0, r0 |
| 35 | 0+60 <[^>]*> e1300000 ? teq r0, r0 | |
| 945ee430 | 36 | 0+64 <[^>]*> e130f000 ? teq r0, r0 |
| 50463d2a RE |
37 | 0+68 <[^>]*> e1500000 ? cmp r0, r0 |
| 38 | 0+6c <[^>]*> e1500000 ? cmp r0, r0 | |
| 945ee430 | 39 | 0+70 <[^>]*> e150f000 ? cmp r0, r0 |
| 50463d2a RE |
40 | 0+74 <[^>]*> e1700000 ? cmn r0, r0 |
| 41 | 0+78 <[^>]*> e1700000 ? cmn r0, r0 | |
| 945ee430 | 42 | 0+7c <[^>]*> e170f000 ? cmn r0, r0 |
| 50463d2a RE |
43 | 0+80 <[^>]*> e1a00000 ? nop[ ]+\(mov r0,r0\) |
| 44 | 0+84 <[^>]*> e1b00000 ? movs r0, r0 | |
| 45 | 0+88 <[^>]*> e1e00000 ? mvn r0, r0 | |
| 46 | 0+8c <[^>]*> e1f00000 ? mvns r0, r0 | |
| c16d2bf0 | 47 | 0+90 <[^>]*> ef000000 ? (swi|svc) 0x00000000 |
| 50463d2a RE |
48 | 0+94 <[^>]*> e5900000 ? ldr r0, \[r0\] |
| 49 | 0+98 <[^>]*> e5d00000 ? ldrb r0, \[r0\] | |
| 50 | 0+9c <[^>]*> e4b10000 ? ldrt r0, \[r1\] | |
| 51 | 0+a0 <[^>]*> e4f10000 ? ldrbt r0, \[r1\] | |
| 52 | 0+a4 <[^>]*> e5800000 ? str r0, \[r0\] | |
| 53 | 0+a8 <[^>]*> e5c00000 ? strb r0, \[r0\] | |
| 54 | 0+ac <[^>]*> e4a10000 ? strt r0, \[r1\] | |
| 55 | 0+b0 <[^>]*> e4e10000 ? strbt r0, \[r1\] | |
| 5f69fa6d | 56 | 0+b4 <[^>]*> e8800001 ? stm r0, {r0} |
| 50463d2a RE |
57 | 0+b8 <[^>]*> e9800001 ? stmib r0, {r0} |
| 58 | 0+bc <[^>]*> e8000001 ? stmda r0, {r0} | |
| 59 | 0+c0 <[^>]*> e9000001 ? stmdb r0, {r0} | |
| 60 | 0+c4 <[^>]*> e9000001 ? stmdb r0, {r0} | |
| 61 | 0+c8 <[^>]*> e9800001 ? stmib r0, {r0} | |
| 5f69fa6d | 62 | 0+cc <[^>]*> e8800001 ? stm r0, {r0} |
| 50463d2a | 63 | 0+d0 <[^>]*> e8000001 ? stmda r0, {r0} |
| 5f69fa6d | 64 | 0+d4 <[^>]*> e8900001 ? ldm r0, {r0} |
| 50463d2a RE |
65 | 0+d8 <[^>]*> e9900001 ? ldmib r0, {r0} |
| 66 | 0+dc <[^>]*> e8100001 ? ldmda r0, {r0} | |
| 67 | 0+e0 <[^>]*> e9100001 ? ldmdb r0, {r0} | |
| 5f69fa6d | 68 | 0+e4 <[^>]*> e8900001 ? ldm r0, {r0} |
| 50463d2a RE |
69 | 0+e8 <[^>]*> e8100001 ? ldmda r0, {r0} |
| 70 | 0+ec <[^>]*> e9100001 ? ldmdb r0, {r0} | |
| 71 | 0+f0 <[^>]*> e9900001 ? ldmib r0, {r0} | |
| f598fd5e NC |
72 | 0+f4 <[^>]*> e1a00000 ? nop[ ]+\(mov r0,r0\) |
| 73 | 0+f8 <[^>]*> e1a00000 ? nop[ ]+\(mov r0,r0\) | |
| 74 | 0+fc <[^>]*> e1a00000 ? nop[ ]+\(mov r0,r0\) |