[PATCH 14/57][Arm][GAS] Add support for MVE instructions: vcadd, vcmla and vcmul
[deliverable/binutils-gdb.git] / gas / testsuite / gas / arm / msr-reg-thumb.d
CommitLineData
59b42a0d
MGD
1# name: MSR register operands in thumb mode
2# as: -march=armv7-a -mthumb
3# source: msr-reg.s
4# objdump: -dr --prefix-addresses --show-raw-insn
d2cd1205 5# warning: writing to APSR without specifying a bitmask is deprecated
2ac93be7 6# skip: *-*-pe *-*-wince
59b42a0d
MGD
7
8.*: +file format .*arm.*
9
10Disassembly of section .text:
d2cd1205 1100000000 <[^>]*> f389 8800 msr CPSR_f, r9
59b42a0d
MGD
1200000004 <[^>]*> f389 8400 msr CPSR_s, r9
1300000008 <[^>]*> f389 8800 msr CPSR_f, r9
140000000c <[^>]*> f389 8c00 msr CPSR_fs, r9
1500000010 <[^>]*> f389 8900 msr CPSR_fc, r9
1600000014 <[^>]*> f389 8400 msr CPSR_s, r9
1700000018 <[^>]*> f389 8800 msr CPSR_f, r9
180000001c <[^>]*> f389 8100 msr CPSR_c, r9
1900000020 <[^>]*> f389 8200 msr CPSR_x, r9
2000000024 <[^>]*> f389 8c00 msr CPSR_fs, r9
2100000028 <[^>]*> f389 8a00 msr CPSR_fx, r9
220000002c <[^>]*> f389 8900 msr CPSR_fc, r9
2300000030 <[^>]*> f389 8c00 msr CPSR_fs, r9
2400000034 <[^>]*> f389 8600 msr CPSR_sx, r9
2500000038 <[^>]*> f389 8500 msr CPSR_sc, r9
260000003c <[^>]*> f389 8a00 msr CPSR_fx, r9
2700000040 <[^>]*> f389 8600 msr CPSR_sx, r9
2800000044 <[^>]*> f389 8300 msr CPSR_xc, r9
2900000048 <[^>]*> f389 8900 msr CPSR_fc, r9
300000004c <[^>]*> f389 8500 msr CPSR_sc, r9
3100000050 <[^>]*> f389 8300 msr CPSR_xc, r9
3200000054 <[^>]*> f389 8e00 msr CPSR_fsx, r9
3300000058 <[^>]*> f389 8d00 msr CPSR_fsc, r9
340000005c <[^>]*> f389 8e00 msr CPSR_fsx, r9
3500000060 <[^>]*> f389 8b00 msr CPSR_fxc, r9
3600000064 <[^>]*> f389 8d00 msr CPSR_fsc, r9
3700000068 <[^>]*> f389 8b00 msr CPSR_fxc, r9
380000006c <[^>]*> f389 8e00 msr CPSR_fsx, r9
3900000070 <[^>]*> f389 8d00 msr CPSR_fsc, r9
4000000074 <[^>]*> f389 8e00 msr CPSR_fsx, r9
4100000078 <[^>]*> f389 8700 msr CPSR_sxc, r9
420000007c <[^>]*> f389 8d00 msr CPSR_fsc, r9
4300000080 <[^>]*> f389 8700 msr CPSR_sxc, r9
4400000084 <[^>]*> f389 8e00 msr CPSR_fsx, r9
4500000088 <[^>]*> f389 8b00 msr CPSR_fxc, r9
460000008c <[^>]*> f389 8e00 msr CPSR_fsx, r9
4700000090 <[^>]*> f389 8700 msr CPSR_sxc, r9
4800000094 <[^>]*> f389 8b00 msr CPSR_fxc, r9
4900000098 <[^>]*> f389 8700 msr CPSR_sxc, r9
500000009c <[^>]*> f389 8d00 msr CPSR_fsc, r9
51000000a0 <[^>]*> f389 8b00 msr CPSR_fxc, r9
52000000a4 <[^>]*> f389 8d00 msr CPSR_fsc, r9
53000000a8 <[^>]*> f389 8700 msr CPSR_sxc, r9
54000000ac <[^>]*> f389 8b00 msr CPSR_fxc, r9
55000000b0 <[^>]*> f389 8700 msr CPSR_sxc, r9
56000000b4 <[^>]*> f389 8f00 msr CPSR_fsxc, r9
57000000b8 <[^>]*> f389 8f00 msr CPSR_fsxc, r9
58000000bc <[^>]*> f389 8f00 msr CPSR_fsxc, r9
59000000c0 <[^>]*> f389 8f00 msr CPSR_fsxc, r9
60000000c4 <[^>]*> f389 8f00 msr CPSR_fsxc, r9
61000000c8 <[^>]*> f389 8f00 msr CPSR_fsxc, r9
62000000cc <[^>]*> f389 8f00 msr CPSR_fsxc, r9
63000000d0 <[^>]*> f389 8f00 msr CPSR_fsxc, r9
64000000d4 <[^>]*> f389 8f00 msr CPSR_fsxc, r9
65000000d8 <[^>]*> f389 8f00 msr CPSR_fsxc, r9
66000000dc <[^>]*> f389 8f00 msr CPSR_fsxc, r9
67000000e0 <[^>]*> f389 8f00 msr CPSR_fsxc, r9
68000000e4 <[^>]*> f389 8f00 msr CPSR_fsxc, r9
69000000e8 <[^>]*> f389 8f00 msr CPSR_fsxc, r9
70000000ec <[^>]*> f389 8f00 msr CPSR_fsxc, r9
71000000f0 <[^>]*> f389 8f00 msr CPSR_fsxc, r9
72000000f4 <[^>]*> f389 8f00 msr CPSR_fsxc, r9
73000000f8 <[^>]*> f389 8f00 msr CPSR_fsxc, r9
74000000fc <[^>]*> f389 8f00 msr CPSR_fsxc, r9
7500000100 <[^>]*> f389 8f00 msr CPSR_fsxc, r9
7600000104 <[^>]*> f389 8f00 msr CPSR_fsxc, r9
7700000108 <[^>]*> f389 8f00 msr CPSR_fsxc, r9
780000010c <[^>]*> f389 8f00 msr CPSR_fsxc, r9
7900000110 <[^>]*> f389 8f00 msr CPSR_fsxc, r9
8000000114 <[^>]*> f399 8900 msr SPSR_fc, r9
8100000118 <[^>]*> f399 8400 msr SPSR_s, r9
820000011c <[^>]*> f399 8800 msr SPSR_f, r9
8300000120 <[^>]*> f399 8100 msr SPSR_c, r9
8400000124 <[^>]*> f399 8200 msr SPSR_x, r9
8500000128 <[^>]*> f399 8c00 msr SPSR_fs, r9
860000012c <[^>]*> f399 8a00 msr SPSR_fx, r9
8700000130 <[^>]*> f399 8900 msr SPSR_fc, r9
8800000134 <[^>]*> f399 8c00 msr SPSR_fs, r9
8900000138 <[^>]*> f399 8600 msr SPSR_sx, r9
900000013c <[^>]*> f399 8500 msr SPSR_sc, r9
9100000140 <[^>]*> f399 8a00 msr SPSR_fx, r9
9200000144 <[^>]*> f399 8600 msr SPSR_sx, r9
9300000148 <[^>]*> f399 8300 msr SPSR_xc, r9
940000014c <[^>]*> f399 8900 msr SPSR_fc, r9
9500000150 <[^>]*> f399 8500 msr SPSR_sc, r9
9600000154 <[^>]*> f399 8300 msr SPSR_xc, r9
9700000158 <[^>]*> f399 8e00 msr SPSR_fsx, r9
980000015c <[^>]*> f399 8d00 msr SPSR_fsc, r9
9900000160 <[^>]*> f399 8e00 msr SPSR_fsx, r9
10000000164 <[^>]*> f399 8b00 msr SPSR_fxc, r9
10100000168 <[^>]*> f399 8d00 msr SPSR_fsc, r9
1020000016c <[^>]*> f399 8b00 msr SPSR_fxc, r9
10300000170 <[^>]*> f399 8e00 msr SPSR_fsx, r9
10400000174 <[^>]*> f399 8d00 msr SPSR_fsc, r9
10500000178 <[^>]*> f399 8e00 msr SPSR_fsx, r9
1060000017c <[^>]*> f399 8700 msr SPSR_sxc, r9
10700000180 <[^>]*> f399 8d00 msr SPSR_fsc, r9
10800000184 <[^>]*> f399 8700 msr SPSR_sxc, r9
10900000188 <[^>]*> f399 8e00 msr SPSR_fsx, r9
1100000018c <[^>]*> f399 8b00 msr SPSR_fxc, r9
11100000190 <[^>]*> f399 8e00 msr SPSR_fsx, r9
11200000194 <[^>]*> f399 8700 msr SPSR_sxc, r9
11300000198 <[^>]*> f399 8b00 msr SPSR_fxc, r9
1140000019c <[^>]*> f399 8700 msr SPSR_sxc, r9
115000001a0 <[^>]*> f399 8d00 msr SPSR_fsc, r9
116000001a4 <[^>]*> f399 8b00 msr SPSR_fxc, r9
117000001a8 <[^>]*> f399 8d00 msr SPSR_fsc, r9
118000001ac <[^>]*> f399 8700 msr SPSR_sxc, r9
119000001b0 <[^>]*> f399 8b00 msr SPSR_fxc, r9
120000001b4 <[^>]*> f399 8700 msr SPSR_sxc, r9
121000001b8 <[^>]*> f399 8f00 msr SPSR_fsxc, r9
122000001bc <[^>]*> f399 8f00 msr SPSR_fsxc, r9
123000001c0 <[^>]*> f399 8f00 msr SPSR_fsxc, r9
124000001c4 <[^>]*> f399 8f00 msr SPSR_fsxc, r9
125000001c8 <[^>]*> f399 8f00 msr SPSR_fsxc, r9
126000001cc <[^>]*> f399 8f00 msr SPSR_fsxc, r9
127000001d0 <[^>]*> f399 8f00 msr SPSR_fsxc, r9
128000001d4 <[^>]*> f399 8f00 msr SPSR_fsxc, r9
129000001d8 <[^>]*> f399 8f00 msr SPSR_fsxc, r9
130000001dc <[^>]*> f399 8f00 msr SPSR_fsxc, r9
131000001e0 <[^>]*> f399 8f00 msr SPSR_fsxc, r9
132000001e4 <[^>]*> f399 8f00 msr SPSR_fsxc, r9
133000001e8 <[^>]*> f399 8f00 msr SPSR_fsxc, r9
134000001ec <[^>]*> f399 8f00 msr SPSR_fsxc, r9
135000001f0 <[^>]*> f399 8f00 msr SPSR_fsxc, r9
136000001f4 <[^>]*> f399 8f00 msr SPSR_fsxc, r9
137000001f8 <[^>]*> f399 8f00 msr SPSR_fsxc, r9
138000001fc <[^>]*> f399 8f00 msr SPSR_fsxc, r9
13900000200 <[^>]*> f399 8f00 msr SPSR_fsxc, r9
14000000204 <[^>]*> f399 8f00 msr SPSR_fsxc, r9
14100000208 <[^>]*> f399 8f00 msr SPSR_fsxc, r9
1420000020c <[^>]*> f399 8f00 msr SPSR_fsxc, r9
14300000210 <[^>]*> f399 8f00 msr SPSR_fsxc, r9
14400000214 <[^>]*> f399 8f00 msr SPSR_fsxc, r9
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