Commit | Line | Data |
---|---|---|
acca5630 AV |
1 | [^:]*: Assembler messages: |
2 | [^:]*:10: Error: bad type in SIMD instruction -- `vshllt.s32 q0,q1,#1' | |
3 | [^:]*:11: Error: bad type in SIMD instruction -- `vshllt.i8 q0,q1,#1' | |
4 | [^:]*:12: Error: immediate value out of range -- `vshllt.u8 q0,q1,#0' | |
5 | [^:]*:13: Error: immediate value out of range -- `vshllt.u8 q0,q1,#9' | |
6 | [^:]*:14: Error: immediate value out of range -- `vshllt.s16 q0,q1,#0' | |
7 | [^:]*:15: Error: immediate value out of range -- `vshllt.s16 q0,q1,#17' | |
8 | [^:]*:16: Error: bad type in SIMD instruction -- `vshllb.s32 q0,q1,#1' | |
9 | [^:]*:17: Error: bad type in SIMD instruction -- `vshllb.i8 q0,q1,#1' | |
10 | [^:]*:18: Error: immediate value out of range -- `vshllb.u8 q0,q1,#0' | |
11 | [^:]*:19: Error: immediate value out of range -- `vshllb.u8 q0,q1,#9' | |
12 | [^:]*:20: Error: immediate value out of range -- `vshllb.s16 q0,q1,#0' | |
13 | [^:]*:21: Error: immediate value out of range -- `vshllb.s16 q0,q1,#17' | |
14 | [^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block | |
15 | [^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block | |
16 | [^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block | |
17 | [^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block | |
18 | [^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block | |
19 | [^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block | |
20 | [^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block | |
21 | [^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block | |
22 | [^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block | |
23 | [^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block | |
24 | [^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block | |
25 | [^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block | |
26 | [^:]*:25: Error: syntax error -- `vshllteq.s8 q0,q1,#1' | |
27 | [^:]*:26: Error: syntax error -- `vshllteq.s8 q0,q1,#1' | |
28 | [^:]*:28: Error: syntax error -- `vshllteq.s8 q0,q1,#1' | |
29 | [^:]*:29: Error: vector predicated instruction should be in VPT/VPST block -- `vshlltt.s8 q0,q1,#1' | |
30 | [^:]*:31: Error: instruction missing MVE vector predication code -- `vshllt.s8 q0,q1,#1' | |
31 | [^:]*:33: Error: syntax error -- `vshllbeq.s8 q0,q1,#1' | |
32 | [^:]*:34: Error: syntax error -- `vshllbeq.s8 q0,q1,#1' | |
33 | [^:]*:36: Error: syntax error -- `vshllbeq.s8 q0,q1,#1' | |
34 | [^:]*:37: Error: vector predicated instruction should be in VPT/VPST block -- `vshllbt.s8 q0,q1,#1' | |
35 | [^:]*:39: Error: instruction missing MVE vector predication code -- `vshllb.s8 q0,q1,#1' |