Adds the speculation barrier instructions to the ARM assembler and disassembler.
[deliverable/binutils-gdb.git] / gas / testsuite / gas / arm / vfp-fma-arm.d
CommitLineData
62f3b8c8
PB
1# name: FMA instructions, ARM mode
2# as: -mfpu=vfpv4 -I$srcdir/$subdir
3# objdump: -dr --prefix-addresses --show-raw-insn
4
5.*: +file format .*arm.*
6
7Disassembly of section .text:
80[0-9a-f]+ <[^>]+> eea00a81 vfma\.f32 s0, s1, s2
90[0-9a-f]+ <[^>]+> eea10b02 vfma\.f64 d0, d1, d2
100[0-9a-f]+ <[^>]+> 0ea00a81 vfmaeq\.f32 s0, s1, s2
110[0-9a-f]+ <[^>]+> 0ea10b02 vfmaeq\.f64 d0, d1, d2
120[0-9a-f]+ <[^>]+> eea00ac1 vfms\.f32 s0, s1, s2
130[0-9a-f]+ <[^>]+> eea10b42 vfms\.f64 d0, d1, d2
140[0-9a-f]+ <[^>]+> 0ea00ac1 vfmseq\.f32 s0, s1, s2
150[0-9a-f]+ <[^>]+> 0ea10b42 vfmseq\.f64 d0, d1, d2
160[0-9a-f]+ <[^>]+> ee900ac1 vfnma\.f32 s0, s1, s2
170[0-9a-f]+ <[^>]+> ee910b42 vfnma\.f64 d0, d1, d2
180[0-9a-f]+ <[^>]+> 0e900ac1 vfnmaeq\.f32 s0, s1, s2
190[0-9a-f]+ <[^>]+> 0e910b42 vfnmaeq\.f64 d0, d1, d2
200[0-9a-f]+ <[^>]+> ee900a81 vfnms\.f32 s0, s1, s2
210[0-9a-f]+ <[^>]+> ee910b02 vfnms\.f64 d0, d1, d2
220[0-9a-f]+ <[^>]+> 0e900a81 vfnmseq\.f32 s0, s1, s2
230[0-9a-f]+ <[^>]+> 0e910b02 vfnmseq\.f64 d0, d1, d2
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