Add support to the ARC disassembler for selecting instruction classes.
[deliverable/binutils-gdb.git] / gas / testsuite / gas / arm / vfpv3xd.d
CommitLineData
62f3b8c8
PB
1#objdump: -dr --prefix-addresses --show-raw-insn
2#name: VFP Double-precision load/store
3#as: -mfpu=vfpv3xd
4
5# Test the ARM VFP Double Precision load/store on single precision FPU
6
7.*: +file format .*arm.*
8
9Disassembly of section .text:
100+[0-9a-f]* <[^>]*> ed900b00 vldr d0, \[r0\]
110+[0-9a-f]* <[^>]*> ed800b00 vstr d0, \[r0\]
120+[0-9a-f]* <[^>]*> ec900b02 vldmia r0, {d0}
130+[0-9a-f]* <[^>]*> ec900b02 vldmia r0, {d0}
140+[0-9a-f]* <[^>]*> ecb00b02 vldmia r0!, {d0}
150+[0-9a-f]* <[^>]*> ecb00b02 vldmia r0!, {d0}
160+[0-9a-f]* <[^>]*> ed300b02 vldmdb r0!, {d0}
170+[0-9a-f]* <[^>]*> ed300b02 vldmdb r0!, {d0}
180+[0-9a-f]* <[^>]*> ec800b02 vstmia r0, {d0}
190+[0-9a-f]* <[^>]*> ec800b02 vstmia r0, {d0}
200+[0-9a-f]* <[^>]*> eca00b02 vstmia r0!, {d0}
210+[0-9a-f]* <[^>]*> eca00b02 vstmia r0!, {d0}
220+[0-9a-f]* <[^>]*> ed200b02 vstmdb r0!, {d0}
230+[0-9a-f]* <[^>]*> ed200b02 vstmdb r0!, {d0}
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