projects / deliverable / binutils-gdb.git / blame
| Commit | Line | Data |
|---|---|---|
| 48521003 IT |
1 | #as: |
| 2 | #objdump: -dw -Mintel | |
| 3 | #name: i386 AVX512F/GFNI insns (Intel disassembly) | |
| 4 | #source: avx512f_gfni.s | |
| 5 | ||
| 6 | .*: +file format .* | |
| 7 | ||
| 8 | ||
| 9 | Disassembly of section \.text: | |
| 10 | ||
| 11 | 00000000 <_start>: | |
| 12 | [ ]*[a-f0-9]+:[ ]*62 f3 d5 48 ce f4 ab[ ]*vgf2p8affineqb zmm6,zmm5,zmm4,0xab | |
| 13 | [ ]*[a-f0-9]+:[ ]*62 f3 d5 4f ce f4 ab[ ]*vgf2p8affineqb zmm6\{k7\},zmm5,zmm4,0xab | |
| 14 | [ ]*[a-f0-9]+:[ ]*62 f3 d5 cf ce f4 ab[ ]*vgf2p8affineqb zmm6\{k7\}\{z\},zmm5,zmm4,0xab | |
| 15 | [ ]*[a-f0-9]+:[ ]*62 f3 d5 48 ce b4 f4 c0 1d fe ff 7b[ ]*vgf2p8affineqb zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\],0x7b | |
| 16 | [ ]*[a-f0-9]+:[ ]*62 f3 d5 48 ce 72 7f 7b[ ]*vgf2p8affineqb zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\],0x7b | |
| 17 | [ ]*[a-f0-9]+:[ ]*62 f3 d5 58 ce 72 7f 7b[ ]*vgf2p8affineqb zmm6,zmm5,QWORD PTR \[edx\+0x3f8\]\{1to8\},0x7b | |
| 18 | [ ]*[a-f0-9]+:[ ]*62 f3 d5 48 cf f4 ab[ ]*vgf2p8affineinvqb zmm6,zmm5,zmm4,0xab | |
| 19 | [ ]*[a-f0-9]+:[ ]*62 f3 d5 4f cf f4 ab[ ]*vgf2p8affineinvqb zmm6\{k7\},zmm5,zmm4,0xab | |
| 20 | [ ]*[a-f0-9]+:[ ]*62 f3 d5 cf cf f4 ab[ ]*vgf2p8affineinvqb zmm6\{k7\}\{z\},zmm5,zmm4,0xab | |
| 21 | [ ]*[a-f0-9]+:[ ]*62 f3 d5 48 cf b4 f4 c0 1d fe ff 7b[ ]*vgf2p8affineinvqb zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\],0x7b | |
| 22 | [ ]*[a-f0-9]+:[ ]*62 f3 d5 48 cf 72 7f 7b[ ]*vgf2p8affineinvqb zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\],0x7b | |
| 23 | [ ]*[a-f0-9]+:[ ]*62 f3 d5 58 cf 72 7f 7b[ ]*vgf2p8affineinvqb zmm6,zmm5,QWORD PTR \[edx\+0x3f8\]\{1to8\},0x7b | |
| 24 | [ ]*[a-f0-9]+:[ ]*62 f2 55 48 cf f4[ ]*vgf2p8mulb zmm6,zmm5,zmm4 | |
| 25 | [ ]*[a-f0-9]+:[ ]*62 f2 55 4f cf f4[ ]*vgf2p8mulb zmm6\{k7\},zmm5,zmm4 | |
| 26 | [ ]*[a-f0-9]+:[ ]*62 f2 55 cf cf f4[ ]*vgf2p8mulb zmm6\{k7\}\{z\},zmm5,zmm4 | |
| 27 | [ ]*[a-f0-9]+:[ ]*62 f2 55 48 cf b4 f4 c0 1d fe ff[ ]*vgf2p8mulb zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\] | |
| 28 | [ ]*[a-f0-9]+:[ ]*62 f2 55 48 cf 72 7f[ ]*vgf2p8mulb zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\] | |
| 29 | [ ]*[a-f0-9]+:[ ]*62 f3 d5 48 ce f4 ab[ ]*vgf2p8affineqb zmm6,zmm5,zmm4,0xab | |
| 30 | [ ]*[a-f0-9]+:[ ]*62 f3 d5 4f ce f4 ab[ ]*vgf2p8affineqb zmm6\{k7\},zmm5,zmm4,0xab | |
| 31 | [ ]*[a-f0-9]+:[ ]*62 f3 d5 cf ce f4 ab[ ]*vgf2p8affineqb zmm6\{k7\}\{z\},zmm5,zmm4,0xab | |
| 32 | [ ]*[a-f0-9]+:[ ]*62 f3 d5 48 ce b4 f4 c0 1d fe ff 7b[ ]*vgf2p8affineqb zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\],0x7b | |
| 33 | [ ]*[a-f0-9]+:[ ]*62 f3 d5 48 ce 72 7f 7b[ ]*vgf2p8affineqb zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\],0x7b | |
| 34 | [ ]*[a-f0-9]+:[ ]*62 f3 d5 58 ce 72 7f 7b[ ]*vgf2p8affineqb zmm6,zmm5,QWORD PTR \[edx\+0x3f8\]\{1to8\},0x7b | |
| 35 | [ ]*[a-f0-9]+:[ ]*62 f3 d5 48 cf f4 ab[ ]*vgf2p8affineinvqb zmm6,zmm5,zmm4,0xab | |
| 36 | [ ]*[a-f0-9]+:[ ]*62 f3 d5 4f cf f4 ab[ ]*vgf2p8affineinvqb zmm6\{k7\},zmm5,zmm4,0xab | |
| 37 | [ ]*[a-f0-9]+:[ ]*62 f3 d5 cf cf f4 ab[ ]*vgf2p8affineinvqb zmm6\{k7\}\{z\},zmm5,zmm4,0xab | |
| 38 | [ ]*[a-f0-9]+:[ ]*62 f3 d5 48 cf b4 f4 c0 1d fe ff 7b[ ]*vgf2p8affineinvqb zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\],0x7b | |
| 39 | [ ]*[a-f0-9]+:[ ]*62 f3 d5 48 cf 72 7f 7b[ ]*vgf2p8affineinvqb zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\],0x7b | |
| 40 | [ ]*[a-f0-9]+:[ ]*62 f3 d5 58 cf 72 7f 7b[ ]*vgf2p8affineinvqb zmm6,zmm5,QWORD PTR \[edx\+0x3f8\]\{1to8\},0x7b | |
| 41 | [ ]*[a-f0-9]+:[ ]*62 f2 55 48 cf f4[ ]*vgf2p8mulb zmm6,zmm5,zmm4 | |
| 42 | [ ]*[a-f0-9]+:[ ]*62 f2 55 4f cf f4[ ]*vgf2p8mulb zmm6\{k7\},zmm5,zmm4 | |
| 43 | [ ]*[a-f0-9]+:[ ]*62 f2 55 cf cf f4[ ]*vgf2p8mulb zmm6\{k7\}\{z\},zmm5,zmm4 | |
| 44 | [ ]*[a-f0-9]+:[ ]*62 f2 55 48 cf b4 f4 c0 1d fe ff[ ]*vgf2p8mulb zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\] | |
| 45 | [ ]*[a-f0-9]+:[ ]*62 f2 55 48 cf 72 7f[ ]*vgf2p8mulb zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\] | |
| 46 | #pass |