projects / deliverable / binutils-gdb.git / blame
| Commit | Line | Data |
|---|---|---|
| 8cfcb765 IT |
1 | # Check 32bit AVX512{VNNI,VL} instructions |
| 2 | ||
| 3 | .allow_index_reg | |
| 4 | .text | |
| 5 | _start: | |
| 6 | vpdpwssd %xmm2, %xmm4, %xmm2{%k3} # AVX512{VNNI,VL} | |
| 7 | vpdpwssd %xmm2, %xmm4, %xmm2{%k3}{z} # AVX512{VNNI,VL} | |
| 8 | vpdpwssd -123456(%esp,%esi,8), %xmm4, %xmm2{%k1} # AVX512{VNNI,VL} | |
| 9 | vpdpwssd 2032(%edx), %xmm4, %xmm2{%k1} # AVX512{VNNI,VL} Disp8 | |
| 10 | vpdpwssd 508(%edx){1to4}, %xmm4, %xmm2{%k1} # AVX512{VNNI,VL} Disp8 | |
| 11 | vpdpwssd %ymm1, %ymm3, %ymm3{%k1} # AVX512{VNNI,VL} | |
| 12 | vpdpwssd %ymm1, %ymm3, %ymm3{%k1}{z} # AVX512{VNNI,VL} | |
| 13 | vpdpwssd -123456(%esp,%esi,8), %ymm3, %ymm3{%k4} # AVX512{VNNI,VL} | |
| 14 | vpdpwssd 4064(%edx), %ymm3, %ymm3{%k4} # AVX512{VNNI,VL} Disp8 | |
| 15 | vpdpwssd 508(%edx){1to8}, %ymm3, %ymm3{%k4} # AVX512{VNNI,VL} Disp8 | |
| 16 | ||
| 17 | vpdpwssds %xmm1, %xmm4, %xmm2{%k1} # AVX512{VNNI,VL} | |
| 18 | vpdpwssds %xmm1, %xmm4, %xmm2{%k1}{z} # AVX512{VNNI,VL} | |
| 19 | vpdpwssds -123456(%esp,%esi,8), %xmm4, %xmm2{%k4} # AVX512{VNNI,VL} | |
| 20 | vpdpwssds 2032(%edx), %xmm4, %xmm2{%k4} # AVX512{VNNI,VL} Disp8 | |
| 21 | vpdpwssds 508(%edx){1to4}, %xmm4, %xmm2{%k4} # AVX512{VNNI,VL} Disp8 | |
| 22 | vpdpwssds %ymm4, %ymm1, %ymm4{%k7} # AVX512{VNNI,VL} | |
| 23 | vpdpwssds %ymm4, %ymm1, %ymm4{%k7}{z} # AVX512{VNNI,VL} | |
| 24 | vpdpwssds -123456(%esp,%esi,8), %ymm1, %ymm4{%k3} # AVX512{VNNI,VL} | |
| 25 | vpdpwssds 4064(%edx), %ymm1, %ymm4{%k3} # AVX512{VNNI,VL} Disp8 | |
| 26 | vpdpwssds 508(%edx){1to8}, %ymm1, %ymm4{%k3} # AVX512{VNNI,VL} Disp8 | |
| 27 | ||
| 28 | vpdpbusd %xmm1, %xmm3, %xmm2{%k4} # AVX512{VNNI,VL} | |
| 29 | vpdpbusd %xmm1, %xmm3, %xmm2{%k4}{z} # AVX512{VNNI,VL} | |
| 30 | vpdpbusd -123456(%esp,%esi,8), %xmm3, %xmm2{%k2} # AVX512{VNNI,VL} | |
| 31 | vpdpbusd 2032(%edx), %xmm3, %xmm2{%k2} # AVX512{VNNI,VL} Disp8 | |
| 32 | vpdpbusd 508(%edx){1to4}, %xmm3, %xmm2{%k2} # AVX512{VNNI,VL} Disp8 | |
| 33 | vpdpbusd %ymm2, %ymm2, %ymm2{%k5} # AVX512{VNNI,VL} | |
| 34 | vpdpbusd %ymm2, %ymm2, %ymm2{%k5}{z} # AVX512{VNNI,VL} | |
| 35 | vpdpbusd -123456(%esp,%esi,8), %ymm2, %ymm2{%k7} # AVX512{VNNI,VL} | |
| 36 | vpdpbusd 4064(%edx), %ymm2, %ymm2{%k7} # AVX512{VNNI,VL} Disp8 | |
| 37 | vpdpbusd 508(%edx){1to8}, %ymm2, %ymm2{%k7} # AVX512{VNNI,VL} Disp8 | |
| 38 | ||
| 39 | vpdpbusds %xmm4, %xmm2, %xmm6{%k6} # AVX512{VNNI,VL} | |
| 40 | vpdpbusds %xmm4, %xmm2, %xmm6{%k6}{z} # AVX512{VNNI,VL} | |
| 41 | vpdpbusds -123456(%esp,%esi,8), %xmm2, %xmm6{%k4} # AVX512{VNNI,VL} | |
| 42 | vpdpbusds 2032(%edx), %xmm2, %xmm6{%k4} # AVX512{VNNI,VL} Disp8 | |
| 43 | vpdpbusds 508(%edx){1to4}, %xmm2, %xmm6{%k4} # AVX512{VNNI,VL} Disp8 | |
| 44 | vpdpbusds %ymm1, %ymm3, %ymm4{%k7} # AVX512{VNNI,VL} | |
| 45 | vpdpbusds %ymm1, %ymm3, %ymm4{%k7}{z} # AVX512{VNNI,VL} | |
| 46 | vpdpbusds -123456(%esp,%esi,8), %ymm3, %ymm4{%k1} # AVX512{VNNI,VL} | |
| 47 | vpdpbusds 4064(%edx), %ymm3, %ymm4{%k1} # AVX512{VNNI,VL} Disp8 | |
| 48 | vpdpbusds 508(%edx){1to8}, %ymm3, %ymm4{%k1} # AVX512{VNNI,VL} Disp8 | |
| 49 | ||
| 50 | .intel_syntax noprefix | |
| 51 | vpdpwssd xmm5{k1}, xmm2, xmm2 # AVX512{VNNI,VL} | |
| 52 | vpdpwssd xmm5{k1}{z}, xmm2, xmm2 # AVX512{VNNI,VL} | |
| 53 | vpdpwssd xmm5{k6}, xmm2, XMMWORD PTR [esp+esi*8-123456] # AVX512{VNNI,VL} | |
| 54 | vpdpwssd xmm5{k6}, xmm2, XMMWORD PTR [edx+2032] # AVX512{VNNI,VL} Disp8 | |
| 55 | vpdpwssd xmm5{k6}, xmm2, [edx+508]{1to4} # AVX512{VNNI,VL} Disp8 | |
| 56 | vpdpwssd ymm1{k7}, ymm2, ymm4 # AVX512{VNNI,VL} | |
| 57 | vpdpwssd ymm1{k7}{z}, ymm2, ymm4 # AVX512{VNNI,VL} | |
| 58 | vpdpwssd ymm1{k6}, ymm2, YMMWORD PTR [esp+esi*8-123456] # AVX512{VNNI,VL} | |
| 59 | vpdpwssd ymm1{k6}, ymm2, YMMWORD PTR [edx+4064] # AVX512{VNNI,VL} Disp8 | |
| 60 | vpdpwssd ymm1{k6}, ymm2, [edx+508]{1to8} # AVX512{VNNI,VL} Disp8 | |
| 61 | ||
| 62 | vpdpwssds xmm1{k2}, xmm4, xmm1 # AVX512{VNNI,VL} | |
| 63 | vpdpwssds xmm1{k2}{z}, xmm4, xmm1 # AVX512{VNNI,VL} | |
| 64 | vpdpwssds xmm1{k6}, xmm4, XMMWORD PTR [esp+esi*8-123456] # AVX512{VNNI,VL} | |
| 65 | vpdpwssds xmm1{k6}, xmm4, XMMWORD PTR [edx+2032] # AVX512{VNNI,VL} Disp8 | |
| 66 | vpdpwssds xmm1{k6}, xmm4, [edx+508]{1to4} # AVX512{VNNI,VL} Disp8 | |
| 67 | vpdpwssds ymm3{k4}, ymm2, ymm4 # AVX512{VNNI,VL} | |
| 68 | vpdpwssds ymm3{k4}{z}, ymm2, ymm4 # AVX512{VNNI,VL} | |
| 69 | vpdpwssds ymm3{k5}, ymm2, YMMWORD PTR [esp+esi*8-123456] # AVX512{VNNI,VL} | |
| 70 | vpdpwssds ymm3{k5}, ymm2, YMMWORD PTR [edx+4064] # AVX512{VNNI,VL} Disp8 | |
| 71 | vpdpwssds ymm3{k5}, ymm2, [edx+508]{1to8} # AVX512{VNNI,VL} Disp8 | |
| 72 | ||
| 73 | vpdpbusd xmm3{k7}, xmm4, xmm4 # AVX512{VNNI,VL} | |
| 74 | vpdpbusd xmm3{k7}{z}, xmm4, xmm4 # AVX512{VNNI,VL} | |
| 75 | vpdpbusd xmm3{k1}, xmm4, XMMWORD PTR [esp+esi*8-123456] # AVX512{VNNI,VL} | |
| 76 | vpdpbusd xmm3{k1}, xmm4, XMMWORD PTR [edx+2032] # AVX512{VNNI,VL} Disp8 | |
| 77 | vpdpbusd xmm3{k1}, xmm4, [edx+508]{1to4} # AVX512{VNNI,VL} Disp8 | |
| 78 | vpdpbusd ymm6{k5}, ymm2, ymm4 # AVX512{VNNI,VL} | |
| 79 | vpdpbusd ymm6{k5}{z}, ymm2, ymm4 # AVX512{VNNI,VL} | |
| 80 | vpdpbusd ymm6{k5}, ymm2, YMMWORD PTR [esp+esi*8-123456] # AVX512{VNNI,VL} | |
| 81 | vpdpbusd ymm6{k5}, ymm2, YMMWORD PTR [edx+4064] # AVX512{VNNI,VL} Disp8 | |
| 82 | vpdpbusd ymm6{k5}, ymm2, [edx+508]{1to8} # AVX512{VNNI,VL} Disp8 | |
| 83 | ||
| 84 | vpdpbusds xmm3{k5}, xmm3, xmm4 # AVX512{VNNI,VL} | |
| 85 | vpdpbusds xmm3{k5}{z}, xmm3, xmm4 # AVX512{VNNI,VL} | |
| 86 | vpdpbusds xmm3{k4}, xmm3, XMMWORD PTR [esp+esi*8-123456] # AVX512{VNNI,VL} | |
| 87 | vpdpbusds xmm3{k4}, xmm3, XMMWORD PTR [edx+2032] # AVX512{VNNI,VL} Disp8 | |
| 88 | vpdpbusds xmm3{k4}, xmm3, [edx+508]{1to4} # AVX512{VNNI,VL} Disp8 | |
| 89 | vpdpbusds ymm2{k4}, ymm3, ymm4 # AVX512{VNNI,VL} | |
| 90 | vpdpbusds ymm2{k4}{z}, ymm3, ymm4 # AVX512{VNNI,VL} | |
| 91 | vpdpbusds ymm2{k1}, ymm3, YMMWORD PTR [esp+esi*8-123456] # AVX512{VNNI,VL} | |
| 92 | vpdpbusds ymm2{k1}, ymm3, YMMWORD PTR [edx+4064] # AVX512{VNNI,VL} Disp8 | |
| 93 | vpdpbusds ymm2{k1}, ymm3, [edx+508]{1to8} # AVX512{VNNI,VL} Disp8 |