Commit | Line | Data |
---|---|---|
fd71a375 JB |
1 | #as: -mavxscalar=256 |
2 | #objdump: -dw | |
3 | #name: i386 VEX non-LIG insns with -mavxscalar=256 | |
4 | ||
5 | .*: +file format .* | |
6 | ||
7 | ||
8 | Disassembly of section .text: | |
9 | ||
10 | 0+ <_start>: | |
11 | +[a-f0-9]+: c5 f9 6e c0 vmovd %eax,%xmm0 | |
12 | +[a-f0-9]+: c5 f9 6e 00 vmovd \(%eax\),%xmm0 | |
13 | +[a-f0-9]+: c4 e1 79 6e c0 vmovd %eax,%xmm0 | |
14 | +[a-f0-9]+: c4 e1 79 6e 00 vmovd \(%eax\),%xmm0 | |
15 | +[a-f0-9]+: c5 f9 7e c0 vmovd %xmm0,%eax | |
16 | +[a-f0-9]+: c5 f9 7e 00 vmovd %xmm0,\(%eax\) | |
17 | +[a-f0-9]+: c4 e1 79 7e c0 vmovd %xmm0,%eax | |
18 | +[a-f0-9]+: c4 e1 79 7e 00 vmovd %xmm0,\(%eax\) | |
19 | +[a-f0-9]+: c5 fa 7e c0 vmovq %xmm0,%xmm0 | |
20 | +[a-f0-9]+: c5 fa 7e 00 vmovq \(%eax\),%xmm0 | |
21 | +[a-f0-9]+: c4 e1 7a 7e c0 vmovq %xmm0,%xmm0 | |
22 | +[a-f0-9]+: c4 e1 7a 7e 00 vmovq \(%eax\),%xmm0 | |
23 | +[a-f0-9]+: c5 f9 d6 c0 vmovq %xmm0,%xmm0 | |
24 | +[a-f0-9]+: c5 f9 d6 00 vmovq %xmm0,\(%eax\) | |
25 | +[a-f0-9]+: c4 e1 79 d6 c0 vmovq %xmm0,%xmm0 | |
26 | +[a-f0-9]+: c4 e1 79 d6 00 vmovq %xmm0,\(%eax\) | |
27 | +[a-f0-9]+: c4 e3 79 17 c0 00 vextractps \$0x0,%xmm0,%eax | |
28 | +[a-f0-9]+: c4 e3 79 17 00 00 vextractps \$0x0,%xmm0,\(%eax\) | |
29 | +[a-f0-9]+: c4 e3 79 14 c0 00 vpextrb \$0x0,%xmm0,%eax | |
30 | +[a-f0-9]+: c4 e3 79 14 00 00 vpextrb \$0x0,%xmm0,\(%eax\) | |
31 | +[a-f0-9]+: c5 f9 c5 c0 00 vpextrw \$0x0,%xmm0,%eax | |
32 | +[a-f0-9]+: c4 e1 79 c5 c0 00 vpextrw \$0x0,%xmm0,%eax | |
33 | +[a-f0-9]+: c4 e3 79 15 c0 00 vpextrw \$0x0,%xmm0,%eax | |
34 | +[a-f0-9]+: c4 e3 79 15 00 00 vpextrw \$0x0,%xmm0,\(%eax\) | |
35 | +[a-f0-9]+: c4 e3 79 16 c0 00 vpextrd \$0x0,%xmm0,%eax | |
36 | +[a-f0-9]+: c4 e3 79 16 00 00 vpextrd \$0x0,%xmm0,\(%eax\) | |
37 | +[a-f0-9]+: c4 e3 79 21 c0 00 vinsertps \$0x0,%xmm0,%xmm0,%xmm0 | |
38 | +[a-f0-9]+: c4 e3 79 21 00 00 vinsertps \$0x0,\(%eax\),%xmm0,%xmm0 | |
39 | +[a-f0-9]+: c4 e3 79 20 c0 00 vpinsrb \$0x0,%eax,%xmm0,%xmm0 | |
40 | +[a-f0-9]+: c4 e3 79 20 00 00 vpinsrb \$0x0,\(%eax\),%xmm0,%xmm0 | |
41 | +[a-f0-9]+: c5 f9 c4 c0 00 vpinsrw \$0x0,%eax,%xmm0,%xmm0 | |
42 | +[a-f0-9]+: c5 f9 c4 00 00 vpinsrw \$0x0,\(%eax\),%xmm0,%xmm0 | |
43 | +[a-f0-9]+: c4 e1 79 c4 c0 00 vpinsrw \$0x0,%eax,%xmm0,%xmm0 | |
44 | +[a-f0-9]+: c4 e1 79 c4 00 00 vpinsrw \$0x0,\(%eax\),%xmm0,%xmm0 | |
45 | +[a-f0-9]+: c4 e3 79 22 c0 00 vpinsrd \$0x0,%eax,%xmm0,%xmm0 | |
46 | +[a-f0-9]+: c4 e3 79 22 00 00 vpinsrd \$0x0,\(%eax\),%xmm0,%xmm0 | |
47 | +[a-f0-9]+: c5 f8 ae 10 vldmxcsr \(%eax\) | |
48 | +[a-f0-9]+: c5 f8 ae 18 vstmxcsr \(%eax\) | |
49 | +[a-f0-9]+: c4 e1 78 ae 10 vldmxcsr \(%eax\) | |
50 | +[a-f0-9]+: c4 e1 78 ae 18 vstmxcsr \(%eax\) | |
51 | +[a-f0-9]+: c4 e2 78 f2 00 andn \(%eax\),%eax,%eax | |
52 | +[a-f0-9]+: c4 e2 78 f7 00 bextr %eax,\(%eax\),%eax | |
53 | +[a-f0-9]+: c4 e2 78 f3 18 blsi \(%eax\),%eax | |
54 | +[a-f0-9]+: c4 e2 78 f3 10 blsmsk \(%eax\),%eax | |
55 | +[a-f0-9]+: c4 e2 78 f3 08 blsr \(%eax\),%eax | |
56 | +[a-f0-9]+: c4 e2 78 f5 00 bzhi %eax,\(%eax\),%eax | |
57 | +[a-f0-9]+: c4 e2 7b f6 00 mulx \(%eax\),%eax,%eax | |
58 | +[a-f0-9]+: c4 e2 7b f5 00 pdep \(%eax\),%eax,%eax | |
59 | +[a-f0-9]+: c4 e2 7a f5 00 pext \(%eax\),%eax,%eax | |
60 | +[a-f0-9]+: c4 e3 7b f0 00 00 rorx \$0x0,\(%eax\),%eax | |
61 | +[a-f0-9]+: c4 e2 7a f7 00 sarx %eax,\(%eax\),%eax | |
62 | +[a-f0-9]+: c4 e2 79 f7 00 shlx %eax,\(%eax\),%eax | |
63 | +[a-f0-9]+: c4 e2 7b f7 00 shrx %eax,\(%eax\),%eax | |
64 | +[a-f0-9]+: 8f ea 78 10 00 00 00 00 00 bextr \$0x0,\(%eax\),%eax | |
65 | +[a-f0-9]+: 8f e9 78 01 08 blcfill \(%eax\),%eax | |
66 | +[a-f0-9]+: 8f e9 78 02 30 blci \(%eax\),%eax | |
67 | +[a-f0-9]+: 8f e9 78 01 28 blcic \(%eax\),%eax | |
68 | +[a-f0-9]+: 8f e9 78 02 08 blcmsk \(%eax\),%eax | |
69 | +[a-f0-9]+: 8f e9 78 01 18 blcs \(%eax\),%eax | |
70 | +[a-f0-9]+: 8f e9 78 01 10 blsfill \(%eax\),%eax | |
71 | +[a-f0-9]+: 8f e9 78 01 30 blsic \(%eax\),%eax | |
72 | +[a-f0-9]+: 8f e9 78 01 38 t1mskc \(%eax\),%eax | |
73 | +[a-f0-9]+: 8f e9 78 01 20 tzmsk \(%eax\),%eax | |
74 | #pass |