x86: add missing pseudo ops for VPCLMULQDQ ISA extension
[deliverable/binutils-gdb.git] / gas / testsuite / gas / i386 / vpclmulqdq-intel.d
CommitLineData
ff1982d5
IT
1#as:
2#objdump: -dw -Mintel
3#name: i386 VPCLMULQDQ insns (Intel disassembly)
4#source: vpclmulqdq.s
5
6.*: +file format .*
7
8
9Disassembly of section \.text:
10
1100000000 <_start>:
12[ ]*[a-f0-9]+:[ ]*c4 e3 55 44 f4 ab[ ]*vpclmulqdq ymm6,ymm5,ymm4,0xab
13[ ]*[a-f0-9]+:[ ]*c4 e3 55 44 b4 f4 c0 1d fe ff 7b[ ]*vpclmulqdq ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\],0x7b
14[ ]*[a-f0-9]+:[ ]*c4 e3 55 44 b2 e0 0f 00 00 7b[ ]*vpclmulqdq ymm6,ymm5,YMMWORD PTR \[edx\+0xfe0\],0x7b
cd546e7b
JB
15[ ]*[a-f0-9]+:[ ]*c4 e3 6d 44 d9 11[ ]*vpclmulhqhqdq ymm3,ymm2,ymm1
16[ ]*[a-f0-9]+:[ ]*c4 e3 65 44 e2 01[ ]*vpclmulhqlqdq ymm4,ymm3,ymm2
17[ ]*[a-f0-9]+:[ ]*c4 e3 5d 44 eb 10[ ]*vpclmullqhqdq ymm5,ymm4,ymm3
18[ ]*[a-f0-9]+:[ ]*c4 e3 55 44 f4 00[ ]*vpclmullqlqdq ymm6,ymm5,ymm4
ff1982d5
IT
19[ ]*[a-f0-9]+:[ ]*c4 e3 55 44 f4 ab[ ]*vpclmulqdq ymm6,ymm5,ymm4,0xab
20[ ]*[a-f0-9]+:[ ]*c4 e3 55 44 b4 f4 c0 1d fe ff 7b[ ]*vpclmulqdq ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\],0x7b
21[ ]*[a-f0-9]+:[ ]*c4 e3 55 44 b2 e0 0f 00 00 7b[ ]*vpclmulqdq ymm6,ymm5,YMMWORD PTR \[edx\+0xfe0\],0x7b
22#pass
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